diff -Nrcpad gcc-12.3.0/ChangeLog gcc-12.4.0/ChangeLog
*** gcc-12.3.0/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,15 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-04-22  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2022-06-26  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* configure: Regenerate.
+ 	* configure.ac: Correct use of $host.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/INSTALL/binaries.html gcc-12.4.0/INSTALL/binaries.html
*** gcc-12.3.0/INSTALL/binaries.html	Mon May  8 12:15:27 2023
--- gcc-12.4.0/INSTALL/binaries.html	Thu Jun 20 08:10:31 2024
***************
*** 1,5 ****
--- 1,8 ----
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
+ <!-- Created by GNU Texinfo 6.8, https://www.gnu.org/software/texinfo/ -->
+ <head>
+ <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <!-- Copyright (C) 1988-2022 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
*************** A GNU Manual
*** 19,27 ****
  You have freedom to copy and modify this GNU Manual, like GNU
       software.  Copies published by the Free Software Foundation raise
       funds for GNU development. -->
- <!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
- <head>
- <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <title>Installing GCC: Binaries</title>
  
  <meta name="description" content="Installing GCC: Binaries">
--- 22,27 ----
*************** You have freedom to copy and modify this
*** 29,58 ****
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
  <style type="text/css">
  <!--
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
- blockquote.smallindentedblock {margin-right: 0em; font-size: smaller}
- blockquote.smallquotation {font-size: smaller}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
- div.lisp {margin-left: 3.2em}
- div.smalldisplay {margin-left: 3.2em}
- div.smallexample {margin-left: 3.2em}
- div.smalllisp {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
- pre.smalldisplay {font-family: inherit; font-size: smaller}
- pre.smallexample {font-size: smaller}
- pre.smallformat {font-family: inherit; font-size: smaller}
- pre.smalllisp {font-size: smaller}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
  ul.no-bullet {list-style: none}
  -->
  </style>
--- 29,52 ----
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
+ <meta name="viewport" content="width=device-width,initial-scale=1">
+ 
  <style type="text/css">
  <!--
+ a.copiable-anchor {visibility: hidden; text-decoration: none; line-height: 0em}
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
+ span:hover a.copiable-anchor {visibility: visible}
  ul.no-bullet {list-style: none}
  -->
  </style>
*************** ul.no-bullet {list-style: none}
*** 85,92 ****
  
  
  
! <a name="index-Binaries"></a>
! <a name="index-Installing-GCC_003a-Binaries"></a>
  
  <p>We are often asked about pre-compiled versions of GCC.  While we cannot
  provide these for all platforms, below you&rsquo;ll find links to binaries for
--- 79,86 ----
  
  
  
! <span id="index-Binaries"></span>
! <span id="index-Installing-GCC_003a-Binaries"></span>
  
  <p>We are often asked about pre-compiled versions of GCC.  While we cannot
  provide these for all platforms, below you&rsquo;ll find links to binaries for
diff -Nrcpad gcc-12.3.0/INSTALL/build.html gcc-12.4.0/INSTALL/build.html
*** gcc-12.3.0/INSTALL/build.html	Mon May  8 12:15:26 2023
--- gcc-12.4.0/INSTALL/build.html	Thu Jun 20 08:10:31 2024
***************
*** 1,5 ****
--- 1,8 ----
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
+ <!-- Created by GNU Texinfo 6.8, https://www.gnu.org/software/texinfo/ -->
+ <head>
+ <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <!-- Copyright (C) 1988-2022 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
*************** A GNU Manual
*** 19,27 ****
  You have freedom to copy and modify this GNU Manual, like GNU
       software.  Copies published by the Free Software Foundation raise
       funds for GNU development. -->
- <!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
- <head>
- <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <title>Installing GCC: Building</title>
  
  <meta name="description" content="Installing GCC: Building">
--- 22,27 ----
*************** You have freedom to copy and modify this
*** 29,58 ****
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
  <style type="text/css">
  <!--
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
- blockquote.smallindentedblock {margin-right: 0em; font-size: smaller}
- blockquote.smallquotation {font-size: smaller}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
- div.lisp {margin-left: 3.2em}
- div.smalldisplay {margin-left: 3.2em}
- div.smallexample {margin-left: 3.2em}
- div.smalllisp {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
- pre.smalldisplay {font-family: inherit; font-size: smaller}
- pre.smallexample {font-size: smaller}
- pre.smallformat {font-family: inherit; font-size: smaller}
- pre.smalllisp {font-size: smaller}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
  ul.no-bullet {list-style: none}
  -->
  </style>
--- 29,52 ----
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
+ <meta name="viewport" content="width=device-width,initial-scale=1">
+ 
  <style type="text/css">
  <!--
+ a.copiable-anchor {visibility: hidden; text-decoration: none; line-height: 0em}
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
+ span:hover a.copiable-anchor {visibility: visible}
  ul.no-bullet {list-style: none}
  -->
  </style>
*************** ul.no-bullet {list-style: none}
*** 82,88 ****
  
  
  
! <a name="index-Installing-GCC_003a-Building"></a>
  
  <p>Now that GCC is configured, you are ready to build the compiler and
  runtime libraries.
--- 76,82 ----
  
  
  
! <span id="index-Installing-GCC_003a-Building"></span>
  
  <p>Now that GCC is configured, you are ready to build the compiler and
  runtime libraries.
*************** documentation, you need version 4.7 or l
*** 129,135 ****
  want Info documentation to be regenerated.  Releases contain Info
  documentation pre-built for the unmodified documentation in the release.
  </p>
! <a name="Building-a-native-compiler"></a>
  <h3 class="section">Building a native compiler</h3>
  
  <p>For a native build, the default configuration is to perform
--- 123,129 ----
  want Info documentation to be regenerated.  Releases contain Info
  documentation pre-built for the unmodified documentation in the release.
  </p>
! <div class="section" id="Building-a-native-compiler">
  <h3 class="section">Building a native compiler</h3>
  
  <p>For a native build, the default configuration is to perform
*************** following example.  This will save rough
*** 172,179 ****
  the bootstrap and the final installation.  (Libraries will still contain
  debugging information.)
  </p>
! <div class="smallexample">
! <pre class="smallexample">make BOOT_CFLAGS='-O' bootstrap
  </pre></div>
  
  <p>You can place non-default optimization flags into <code>BOOT_CFLAGS</code>; they
--- 166,173 ----
  the bootstrap and the final installation.  (Libraries will still contain
  debugging information.)
  </p>
! <div class="example">
! <pre class="example">make BOOT_CFLAGS='-O' bootstrap
  </pre></div>
  
  <p>You can place non-default optimization flags into <code>BOOT_CFLAGS</code>; they
*************** configure option <samp>--with-build-conf
*** 224,241 ****
  examples of supported build configurations are:
  </p>
  <dl compact="compact">
! <dt>&lsquo;<samp>bootstrap-O1</samp>&rsquo;</dt>
  <dd><p>Removes any <samp>-O</samp>-started option from <code>BOOT_CFLAGS</code>, and adds
  <samp>-O1</samp> to it.  &lsquo;<samp>BUILD_CONFIG=bootstrap-O1</samp>&rsquo; is equivalent to
  &lsquo;<samp>BOOT_CFLAGS='-g -O1'</samp>&rsquo;.
  </p>
  </dd>
! <dt>&lsquo;<samp>bootstrap-O3</samp>&rsquo;</dt>
! <dt>&lsquo;<samp>bootstrap-Og</samp>&rsquo;</dt>
  <dd><p>Analogous to <code>bootstrap-O1</code>.
  </p>
  </dd>
! <dt>&lsquo;<samp>bootstrap-lto</samp>&rsquo;</dt>
  <dd><p>Enables Link-Time Optimization for host tools during bootstrapping.
  &lsquo;<samp>BUILD_CONFIG=bootstrap-lto</samp>&rsquo; is equivalent to adding
  <samp>-flto</samp> to &lsquo;<samp>BOOT_CFLAGS</samp>&rsquo;.  This option assumes that the host
--- 218,235 ----
  examples of supported build configurations are:
  </p>
  <dl compact="compact">
! <dt><span>&lsquo;<samp>bootstrap-O1</samp>&rsquo;</span></dt>
  <dd><p>Removes any <samp>-O</samp>-started option from <code>BOOT_CFLAGS</code>, and adds
  <samp>-O1</samp> to it.  &lsquo;<samp>BUILD_CONFIG=bootstrap-O1</samp>&rsquo; is equivalent to
  &lsquo;<samp>BOOT_CFLAGS='-g -O1'</samp>&rsquo;.
  </p>
  </dd>
! <dt><span>&lsquo;<samp>bootstrap-O3</samp>&rsquo;</span></dt>
! <dt><span>&lsquo;<samp>bootstrap-Og</samp>&rsquo;</span></dt>
  <dd><p>Analogous to <code>bootstrap-O1</code>.
  </p>
  </dd>
! <dt><span>&lsquo;<samp>bootstrap-lto</samp>&rsquo;</span></dt>
  <dd><p>Enables Link-Time Optimization for host tools during bootstrapping.
  &lsquo;<samp>BUILD_CONFIG=bootstrap-lto</samp>&rsquo; is equivalent to adding
  <samp>-flto</samp> to &lsquo;<samp>BOOT_CFLAGS</samp>&rsquo;.  This option assumes that the host
*************** supports the linker plugin (e.g. GNU ld
*** 243,249 ****
  version 2.21 or later).
  </p>
  </dd>
! <dt>&lsquo;<samp>bootstrap-lto-noplugin</samp>&rsquo;</dt>
  <dd><p>This option is similar to <code>bootstrap-lto</code>, but is intended for
  hosts that do not support the linker plugin.  Without the linker plugin 
  static libraries are not compiled with link-time optimizations.  Since 
--- 237,243 ----
  version 2.21 or later).
  </p>
  </dd>
! <dt><span>&lsquo;<samp>bootstrap-lto-noplugin</samp>&rsquo;</span></dt>
  <dd><p>This option is similar to <code>bootstrap-lto</code>, but is intended for
  hosts that do not support the linker plugin.  Without the linker plugin 
  static libraries are not compiled with link-time optimizations.  Since 
*************** the GCC middle end and back end are in <
*** 251,264 ****
  that only the front end is actually LTO optimized.
  </p>
  </dd>
! <dt>&lsquo;<samp>bootstrap-lto-lean</samp>&rsquo;</dt>
  <dd><p>This option is similar to <code>bootstrap-lto</code>, but is intended for
  faster build by only using LTO in the final bootstrap stage.
  With &lsquo;<samp>make profiledbootstrap</samp>&rsquo; the LTO frontend
  is trained only on generator files.
  </p>
  </dd>
! <dt>&lsquo;<samp>bootstrap-debug</samp>&rsquo;</dt>
  <dd><p>Verifies that the compiler generates the same executable code, whether
  or not it is asked to emit debug information.  To this end, this
  option builds stage2 host programs without debug information, and uses
--- 245,258 ----
  that only the front end is actually LTO optimized.
  </p>
  </dd>
! <dt><span>&lsquo;<samp>bootstrap-lto-lean</samp>&rsquo;</span></dt>
  <dd><p>This option is similar to <code>bootstrap-lto</code>, but is intended for
  faster build by only using LTO in the final bootstrap stage.
  With &lsquo;<samp>make profiledbootstrap</samp>&rsquo; the LTO frontend
  is trained only on generator files.
  </p>
  </dd>
! <dt><span>&lsquo;<samp>bootstrap-debug</samp>&rsquo;</span></dt>
  <dd><p>Verifies that the compiler generates the same executable code, whether
  or not it is asked to emit debug information.  To this end, this
  option builds stage2 host programs without debug information, and uses
*************** info into identical object files.  In ad
*** 271,277 ****
  coverage, this option makes default bootstraps faster and leaner.
  </p>
  </dd>
! <dt>&lsquo;<samp>bootstrap-debug-big</samp>&rsquo;</dt>
  <dd><p>Rather than comparing stripped object files, as in
  <code>bootstrap-debug</code>, this option saves internal compiler dumps
  during stage2 and stage3 and compares them as well, which helps catch
--- 265,271 ----
  coverage, this option makes default bootstraps faster and leaner.
  </p>
  </dd>
! <dt><span>&lsquo;<samp>bootstrap-debug-big</samp>&rsquo;</span></dt>
  <dd><p>Rather than comparing stripped object files, as in
  <code>bootstrap-debug</code>, this option saves internal compiler dumps
  during stage2 and stage3 and compares them as well, which helps catch
*************** additional potential problems, but at a
*** 279,285 ****
  space.  It can be specified in addition to &lsquo;<samp>bootstrap-debug</samp>&rsquo;.
  </p>
  </dd>
! <dt>&lsquo;<samp>bootstrap-debug-lean</samp>&rsquo;</dt>
  <dd><p>This option saves disk space compared with <code>bootstrap-debug-big</code>,
  but at the expense of some recompilation.  Instead of saving the dumps
  of stage2 and stage3 until the final compare, it uses
--- 273,279 ----
  space.  It can be specified in addition to &lsquo;<samp>bootstrap-debug</samp>&rsquo;.
  </p>
  </dd>
! <dt><span>&lsquo;<samp>bootstrap-debug-lean</samp>&rsquo;</span></dt>
  <dd><p>This option saves disk space compared with <code>bootstrap-debug-big</code>,
  but at the expense of some recompilation.  Instead of saving the dumps
  of stage2 and stage3 until the final compare, it uses
*************** during stage3, repeating the compilation
*** 288,294 ****
  stage2, whose dumps were not saved.
  </p>
  </dd>
! <dt>&lsquo;<samp>bootstrap-debug-lib</samp>&rsquo;</dt>
  <dd><p>This option tests executable code invariance over debug information
  generation on target libraries, just like <code>bootstrap-debug-lean</code>
  tests it on host programs.  It builds stage3 libraries with
--- 282,288 ----
  stage2, whose dumps were not saved.
  </p>
  </dd>
! <dt><span>&lsquo;<samp>bootstrap-debug-lib</samp>&rsquo;</span></dt>
  <dd><p>This option tests executable code invariance over debug information
  generation on target libraries, just like <code>bootstrap-debug-lean</code>
  tests it on host programs.  It builds stage3 libraries with
*************** in stage2 are used in stage3 host progra
*** 302,308 ****
  compile stage2 libraries with different options for comparison purposes.
  </p>
  </dd>
! <dt>&lsquo;<samp>bootstrap-debug-ckovw</samp>&rsquo;</dt>
  <dd><p>Arranges for error messages to be issued if the compiler built on any
  stage is run without the option <samp>-fcompare-debug</samp>.  This is
  useful to verify the full <samp>-fcompare-debug</samp> testing coverage.  It
--- 296,302 ----
  compile stage2 libraries with different options for comparison purposes.
  </p>
  </dd>
! <dt><span>&lsquo;<samp>bootstrap-debug-ckovw</samp>&rsquo;</span></dt>
  <dd><p>Arranges for error messages to be issued if the compiler built on any
  stage is run without the option <samp>-fcompare-debug</samp>.  This is
  useful to verify the full <samp>-fcompare-debug</samp> testing coverage.  It
*************** must be used along with <code>bootstrap-
*** 310,316 ****
  <code>bootstrap-debug-lib</code>.
  </p>
  </dd>
! <dt>&lsquo;<samp>bootstrap-cet</samp>&rsquo;</dt>
  <dd><p>This option enables Intel CET for host tools during bootstrapping.
  &lsquo;<samp>BUILD_CONFIG=bootstrap-cet</samp>&rsquo; is equivalent to adding
  <samp>-fcf-protection</samp> to &lsquo;<samp>BOOT_CFLAGS</samp>&rsquo;.  This option
--- 304,310 ----
  <code>bootstrap-debug-lib</code>.
  </p>
  </dd>
! <dt><span>&lsquo;<samp>bootstrap-cet</samp>&rsquo;</span></dt>
  <dd><p>This option enables Intel CET for host tools during bootstrapping.
  &lsquo;<samp>BUILD_CONFIG=bootstrap-cet</samp>&rsquo; is equivalent to adding
  <samp>-fcf-protection</samp> to &lsquo;<samp>BOOT_CFLAGS</samp>&rsquo;.  This option
*************** assumes that the host supports Intel CET
*** 318,335 ****
  2.30 or later).
  </p>
  </dd>
! <dt>&lsquo;<samp>bootstrap-time</samp>&rsquo;</dt>
  <dd><p>Arranges for the run time of each program started by the GCC driver,
  built in any stage, to be logged to <samp>time.log</samp>, in the top level of
  the build tree.
  </p>
  </dd>
! <dt>&lsquo;<samp>bootstrap-asan</samp>&rsquo;</dt>
  <dd><p>Compiles GCC itself using Address Sanitization in order to catch invalid memory
  accesses within the GCC code.
  </p>
  </dd>
! <dt>&lsquo;<samp>bootstrap-hwasan</samp>&rsquo;</dt>
  <dd><p>Compiles GCC itself using HWAddress Sanitization in order to catch invalid
  memory accesses within the GCC code.  This option is only available on AArch64
  systems that are running Linux kernel version 5.4 or later.
--- 312,329 ----
  2.30 or later).
  </p>
  </dd>
! <dt><span>&lsquo;<samp>bootstrap-time</samp>&rsquo;</span></dt>
  <dd><p>Arranges for the run time of each program started by the GCC driver,
  built in any stage, to be logged to <samp>time.log</samp>, in the top level of
  the build tree.
  </p>
  </dd>
! <dt><span>&lsquo;<samp>bootstrap-asan</samp>&rsquo;</span></dt>
  <dd><p>Compiles GCC itself using Address Sanitization in order to catch invalid memory
  accesses within the GCC code.
  </p>
  </dd>
! <dt><span>&lsquo;<samp>bootstrap-hwasan</samp>&rsquo;</span></dt>
  <dd><p>Compiles GCC itself using HWAddress Sanitization in order to catch invalid
  memory accesses within the GCC code.  This option is only available on AArch64
  systems that are running Linux kernel version 5.4 or later.
*************** systems that are running Linux kernel ve
*** 337,343 ****
  </dd>
  </dl>
  
! <a name="Building-a-cross-compiler"></a>
  <h3 class="section">Building a cross compiler</h3>
  
  <p>When building a cross compiler, it is not generally possible to do a
--- 331,338 ----
  </dd>
  </dl>
  
! </div>
! <div class="section" id="Building-a-cross-compiler">
  <h3 class="section">Building a cross compiler</h3>
  
  <p>When building a cross compiler, it is not generally possible to do a
*************** configuring GCC.  Put them in the direct
*** 375,394 ****
  you should put in this directory:
  </p>
  <dl compact="compact">
! <dt><samp>as</samp></dt>
  <dd><p>This should be the cross-assembler.
  </p>
  </dd>
! <dt><samp>ld</samp></dt>
  <dd><p>This should be the cross-linker.
  </p>
  </dd>
! <dt><samp>ar</samp></dt>
  <dd><p>This should be the cross-archiver: a program which can manipulate
  archive files (linker libraries) in the target machine&rsquo;s format.
  </p>
  </dd>
! <dt><samp>ranlib</samp></dt>
  <dd><p>This should be a program to construct a symbol table in an archive file.
  </p></dd>
  </dl>
--- 370,389 ----
  you should put in this directory:
  </p>
  <dl compact="compact">
! <dt><span><samp>as</samp></span></dt>
  <dd><p>This should be the cross-assembler.
  </p>
  </dd>
! <dt><span><samp>ld</samp></span></dt>
  <dd><p>This should be the cross-linker.
  </p>
  </dd>
! <dt><span><samp>ar</samp></span></dt>
  <dd><p>This should be the cross-archiver: a program which can manipulate
  archive files (linker libraries) in the target machine&rsquo;s format.
  </p>
  </dd>
! <dt><span><samp>ranlib</samp></span></dt>
  <dd><p>This should be a program to construct a symbol table in an archive file.
  </p></dd>
  </dl>
*************** alternatives for <samp>crt0.o</samp>, fo
*** 415,421 ****
  compilation options.  Check your target&rsquo;s definition of
  <code>STARTFILE_SPEC</code> to find out what start files it uses.
  </p>
! <a name="Building-in-parallel"></a>
  <h3 class="section">Building in parallel</h3>
  
  <p>GNU Make 3.80 and above, which is necessary to build GCC, support
--- 410,417 ----
  compilation options.  Check your target&rsquo;s definition of
  <code>STARTFILE_SPEC</code> to find out what start files it uses.
  </p>
! </div>
! <div class="section" id="Building-in-parallel">
  <h3 class="section">Building in parallel</h3>
  
  <p>GNU Make 3.80 and above, which is necessary to build GCC, support
*************** your machine will result in fewer and sh
*** 426,442 ****
  improving overall throughput; this is especially true for slow drives
  and network filesystems.
  </p>
! <a name="Building-the-Ada-compiler"></a>
  <h3 class="section">Building the Ada compiler</h3>
  
  <p><a href="prerequisites.html#GNAT-prerequisite">GNAT prerequisites</a>.
  </p>
! <a name="Building-the-D-compiler"></a>
  <h3 class="section">Building the D compiler</h3>
  
  <p><a href="prerequisites.html#GDC-prerequisite">GDC prerequisites</a>.
  </p>
! <a name="Building-with-profile-feedback"></a>
  <h3 class="section">Building with profile feedback</h3>
  
  <p>It is possible to use profile feedback to optimize the compiler itself.  This
--- 422,441 ----
  improving overall throughput; this is especially true for slow drives
  and network filesystems.
  </p>
! </div>
! <div class="section" id="Building-the-Ada-compiler">
  <h3 class="section">Building the Ada compiler</h3>
  
  <p><a href="prerequisites.html#GNAT-prerequisite">GNAT prerequisites</a>.
  </p>
! </div>
! <div class="section" id="Building-the-D-compiler">
  <h3 class="section">Building the D compiler</h3>
  
  <p><a href="prerequisites.html#GDC-prerequisite">GDC prerequisites</a>.
  </p>
! </div>
! <div class="section" id="Building-with-profile-feedback">
  <h3 class="section">Building with profile feedback</h3>
  
  <p>It is possible to use profile feedback to optimize the compiler itself.  This
*************** the code quality may be much worse.
*** 476,482 ****
  
  
  
! <hr>
  
  
  
--- 475,481 ----
  
  
  
! <hr></div>
  
  
  
diff -Nrcpad gcc-12.3.0/INSTALL/configure.html gcc-12.4.0/INSTALL/configure.html
*** gcc-12.3.0/INSTALL/configure.html	Mon May  8 12:15:26 2023
--- gcc-12.4.0/INSTALL/configure.html	Thu Jun 20 08:10:30 2024
***************
*** 1,5 ****
--- 1,8 ----
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
+ <!-- Created by GNU Texinfo 6.8, https://www.gnu.org/software/texinfo/ -->
+ <head>
+ <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <!-- Copyright (C) 1988-2022 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
*************** A GNU Manual
*** 19,27 ****
  You have freedom to copy and modify this GNU Manual, like GNU
       software.  Copies published by the Free Software Foundation raise
       funds for GNU development. -->
- <!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
- <head>
- <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <title>Installing GCC: Configuration</title>
  
  <meta name="description" content="Installing GCC: Configuration">
--- 22,27 ----
*************** You have freedom to copy and modify this
*** 29,58 ****
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
  <style type="text/css">
  <!--
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
- blockquote.smallindentedblock {margin-right: 0em; font-size: smaller}
- blockquote.smallquotation {font-size: smaller}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
- div.lisp {margin-left: 3.2em}
- div.smalldisplay {margin-left: 3.2em}
- div.smallexample {margin-left: 3.2em}
- div.smalllisp {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
- pre.smalldisplay {font-family: inherit; font-size: smaller}
- pre.smallexample {font-size: smaller}
- pre.smallformat {font-family: inherit; font-size: smaller}
- pre.smalllisp {font-size: smaller}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
  ul.no-bullet {list-style: none}
  -->
  </style>
--- 29,52 ----
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
+ <meta name="viewport" content="width=device-width,initial-scale=1">
+ 
  <style type="text/css">
  <!--
+ a.copiable-anchor {visibility: hidden; text-decoration: none; line-height: 0em}
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
+ span:hover a.copiable-anchor {visibility: visible}
  ul.no-bullet {list-style: none}
  -->
  </style>
*************** ul.no-bullet {list-style: none}
*** 81,88 ****
  
  
  
! <a name="index-Configuration"></a>
! <a name="index-Installing-GCC_003a-Configuration"></a>
  
  <p>Like most GNU software, GCC must be configured before it can be built.
  This document describes the recommended configuration procedure
--- 75,82 ----
  
  
  
! <span id="index-Configuration"></span>
! <span id="index-Installing-GCC_003a-Configuration"></span>
  
  <p>Like most GNU software, GCC must be configured before it can be built.
  This document describes the recommended configuration procedure
*************** scripts may fail.
*** 128,148 ****
  
  <p>To configure GCC:
  </p>
! <div class="smallexample">
! <pre class="smallexample">% mkdir <var>objdir</var>
  % cd <var>objdir</var>
  % <var>srcdir</var>/configure [<var>options</var>] [<var>target</var>]
  </pre></div>
  
! <a name="Distributor-options"></a>
! <h3 class="heading">Distributor options</h3>
  
  <p>If you will be distributing binary versions of GCC, with modifications
  to the source code, you should use the options described in this
  section to make clear that your version contains modifications.
  </p>
  <dl compact="compact">
! <dt><code>--with-pkgversion=<var>version</var></code></dt>
  <dd><p>Specify a string that identifies your package.  You may wish
  to include a build number or build date.  This version string will be
  included in the output of <code>gcc --version</code>.  This suffix does
--- 122,141 ----
  
  <p>To configure GCC:
  </p>
! <div class="example">
! <pre class="example">% mkdir <var>objdir</var>
  % cd <var>objdir</var>
  % <var>srcdir</var>/configure [<var>options</var>] [<var>target</var>]
  </pre></div>
  
! <span id="Distributor-options"></span><h3 class="heading">Distributor options</h3>
  
  <p>If you will be distributing binary versions of GCC, with modifications
  to the source code, you should use the options described in this
  section to make clear that your version contains modifications.
  </p>
  <dl compact="compact">
! <dt><span><code>--with-pkgversion=<var>version</var></code></span></dt>
  <dd><p>Specify a string that identifies your package.  You may wish
  to include a build number or build date.  This version string will be
  included in the output of <code>gcc --version</code>.  This suffix does
*************** not replace the default version string,
*** 151,157 ****
  <p>The default value is &lsquo;<samp>GCC</samp>&rsquo;.
  </p>
  </dd>
! <dt><code>--with-bugurl=<var>url</var></code></dt>
  <dd><p>Specify the URL that users should visit if they wish to report a bug.
  You are of course welcome to forward bugs reported to you to the FSF,
  if you determine that they are not bugs in your modifications.
--- 144,150 ----
  <p>The default value is &lsquo;<samp>GCC</samp>&rsquo;.
  </p>
  </dd>
! <dt><span><code>--with-bugurl=<var>url</var></code></span></dt>
  <dd><p>Specify the URL that users should visit if they wish to report a bug.
  You are of course welcome to forward bugs reported to you to the FSF,
  if you determine that they are not bugs in your modifications.
*************** if you determine that they are not bugs
*** 159,172 ****
  <p>The default value refers to the FSF&rsquo;s GCC bug tracker.
  </p>
  </dd>
! <dt><code>--with-documentation-root-url=<var>url</var></code></dt>
  <dd><p>Specify the URL root that contains GCC option documentation.  The <var>url</var>
  should end with a <code>/</code> character.
  </p>
  <p>The default value is <a href="https://gcc.gnu.org/onlinedocs/">https://gcc.gnu.org/onlinedocs/</a>.
  </p>
  </dd>
! <dt><code>--with-changes-root-url=<var>url</var></code></dt>
  <dd><p>Specify the URL root that contains information about changes in GCC
  releases like <code>gcc-<var>version</var>/changes.html</code>.
  The <var>url</var> should end with a <code>/</code> character.
--- 152,165 ----
  <p>The default value refers to the FSF&rsquo;s GCC bug tracker.
  </p>
  </dd>
! <dt><span><code>--with-documentation-root-url=<var>url</var></code></span></dt>
  <dd><p>Specify the URL root that contains GCC option documentation.  The <var>url</var>
  should end with a <code>/</code> character.
  </p>
  <p>The default value is <a href="https://gcc.gnu.org/onlinedocs/">https://gcc.gnu.org/onlinedocs/</a>.
  </p>
  </dd>
! <dt><span><code>--with-changes-root-url=<var>url</var></code></span></dt>
  <dd><p>Specify the URL root that contains information about changes in GCC
  releases like <code>gcc-<var>version</var>/changes.html</code>.
  The <var>url</var> should end with a <code>/</code> character.
*************** The <var>url</var> should end with a <co
*** 176,183 ****
  </dd>
  </dl>
  
! <a name="Host_002c-Build-and-Target-specification"></a>
! <h3 class="heading">Host, Build and Target specification</h3>
  
  <p>Specify the host, build and target machine configurations.  You do this
  when you run the <samp>configure</samp> script.
--- 169,175 ----
  </dd>
  </dl>
  
! <span id="Host_002c-Build-and-Target-specification"></span><h3 class="heading">Host, Build and Target specification</h3>
  
  <p>Specify the host, build and target machine configurations.  You do this
  when you run the <samp>configure</samp> script.
*************** the same as the host machine.
*** 201,208 ****
  </p>
  <p>Here is an example:
  </p>
! <div class="smallexample">
! <pre class="smallexample">./configure --host=x86_64-pc-linux-gnu
  </pre></div>
  
  <p>A configuration name may be canonical or it may be more or less
--- 193,200 ----
  </p>
  <p>Here is an example:
  </p>
! <div class="example">
! <pre class="example">./configure --host=x86_64-pc-linux-gnu
  </pre></div>
  
  <p>A configuration name may be canonical or it may be more or less
*************** rtems, solaris<var>version</var>, symbia
*** 239,246 ****
  vxworks, vxworksae, vxworksmils
  </p></blockquote>
  
! <a name="Options-specification"></a>
! <h3 class="heading">Options specification</h3>
  
  <p>Use <var>options</var> to override several configure time options for
  GCC.  A list of supported <var>options</var> follows; &lsquo;<samp>configure
--- 231,237 ----
  vxworks, vxworksae, vxworksmils
  </p></blockquote>
  
! <span id="Options-specification"></span><h3 class="heading">Options specification</h3>
  
  <p>Use <var>options</var> to override several configure time options for
  GCC.  A list of supported <var>options</var> follows; &lsquo;<samp>configure
*************** work and should not normally be used.
*** 252,258 ****
  corresponding <samp>--without</samp> option.
  </p>
  <dl compact="compact">
! <dt><code>--prefix=<var>dirname</var></code></dt>
  <dd><p>Specify the toplevel installation
  directory.  This is the recommended way to install the tools into a directory
  other than the default.  The toplevel installation directory defaults to
--- 243,249 ----
  corresponding <samp>--without</samp> option.
  </p>
  <dl compact="compact">
! <dt><span><code>--prefix=<var>dirname</var></code></span></dt>
  <dd><p>Specify the toplevel installation
  directory.  This is the recommended way to install the tools into a directory
  other than the default.  The toplevel installation directory defaults to
*************** beneath a user&rsquo;s home directory tr
*** 267,329 ****
  <p>The following standard <code>autoconf</code> options are supported.  Normally you
  should not need to use these options.
  </p><dl compact="compact">
! <dt><code>--exec-prefix=<var>dirname</var></code></dt>
  <dd><p>Specify the toplevel installation directory for architecture-dependent
  files.  The default is <samp><var>prefix</var></samp>.
  </p>
  </dd>
! <dt><code>--bindir=<var>dirname</var></code></dt>
  <dd><p>Specify the installation directory for the executables called by users
  (such as <code>gcc</code> and <code>g++</code>).  The default is
  <samp><var>exec-prefix</var>/bin</samp>.
  </p>
  </dd>
! <dt><code>--libdir=<var>dirname</var></code></dt>
  <dd><p>Specify the installation directory for object code libraries and
  internal data files of GCC.  The default is <samp><var>exec-prefix</var>/lib</samp>.
  </p>
  </dd>
! <dt><code>--libexecdir=<var>dirname</var></code></dt>
  <dd><p>Specify the installation directory for internal executables of GCC.
  The default is <samp><var>exec-prefix</var>/libexec</samp>.
  </p>
  </dd>
! <dt><code>--with-slibdir=<var>dirname</var></code></dt>
  <dd><p>Specify the installation directory for the shared libgcc library.  The
  default is <samp><var>libdir</var></samp>.
  </p>
  </dd>
! <dt><code>--datarootdir=<var>dirname</var></code></dt>
  <dd><p>Specify the root of the directory tree for read-only architecture-independent
  data files referenced by GCC.  The default is <samp><var>prefix</var>/share</samp>.
  </p>
  </dd>
! <dt><code>--infodir=<var>dirname</var></code></dt>
  <dd><p>Specify the installation directory for documentation in info format.
  The default is <samp><var>datarootdir</var>/info</samp>.
  </p>
  </dd>
! <dt><code>--datadir=<var>dirname</var></code></dt>
  <dd><p>Specify the installation directory for some architecture-independent
  data files referenced by GCC.  The default is <samp><var>datarootdir</var></samp>.
  </p>
  </dd>
! <dt><code>--docdir=<var>dirname</var></code></dt>
  <dd><p>Specify the installation directory for documentation files (other
  than Info) for GCC.  The default is <samp><var>datarootdir</var>/doc</samp>.
  </p>
  </dd>
! <dt><code>--htmldir=<var>dirname</var></code></dt>
  <dd><p>Specify the installation directory for HTML documentation files.
  The default is <samp><var>docdir</var></samp>.
  </p>
  </dd>
! <dt><code>--pdfdir=<var>dirname</var></code></dt>
  <dd><p>Specify the installation directory for PDF documentation files.
  The default is <samp><var>docdir</var></samp>.
  </p>
  </dd>
! <dt><code>--mandir=<var>dirname</var></code></dt>
  <dd><p>Specify the installation directory for manual pages.  The default is
  <samp><var>datarootdir</var>/man</samp>.  (Note that the manual pages are only extracts
  from the full GCC manuals, which are provided in Texinfo format.  The manpages
--- 258,320 ----
  <p>The following standard <code>autoconf</code> options are supported.  Normally you
  should not need to use these options.
  </p><dl compact="compact">
! <dt><span><code>--exec-prefix=<var>dirname</var></code></span></dt>
  <dd><p>Specify the toplevel installation directory for architecture-dependent
  files.  The default is <samp><var>prefix</var></samp>.
  </p>
  </dd>
! <dt><span><code>--bindir=<var>dirname</var></code></span></dt>
  <dd><p>Specify the installation directory for the executables called by users
  (such as <code>gcc</code> and <code>g++</code>).  The default is
  <samp><var>exec-prefix</var>/bin</samp>.
  </p>
  </dd>
! <dt><span><code>--libdir=<var>dirname</var></code></span></dt>
  <dd><p>Specify the installation directory for object code libraries and
  internal data files of GCC.  The default is <samp><var>exec-prefix</var>/lib</samp>.
  </p>
  </dd>
! <dt><span><code>--libexecdir=<var>dirname</var></code></span></dt>
  <dd><p>Specify the installation directory for internal executables of GCC.
  The default is <samp><var>exec-prefix</var>/libexec</samp>.
  </p>
  </dd>
! <dt><span><code>--with-slibdir=<var>dirname</var></code></span></dt>
  <dd><p>Specify the installation directory for the shared libgcc library.  The
  default is <samp><var>libdir</var></samp>.
  </p>
  </dd>
! <dt><span><code>--datarootdir=<var>dirname</var></code></span></dt>
  <dd><p>Specify the root of the directory tree for read-only architecture-independent
  data files referenced by GCC.  The default is <samp><var>prefix</var>/share</samp>.
  </p>
  </dd>
! <dt><span><code>--infodir=<var>dirname</var></code></span></dt>
  <dd><p>Specify the installation directory for documentation in info format.
  The default is <samp><var>datarootdir</var>/info</samp>.
  </p>
  </dd>
! <dt><span><code>--datadir=<var>dirname</var></code></span></dt>
  <dd><p>Specify the installation directory for some architecture-independent
  data files referenced by GCC.  The default is <samp><var>datarootdir</var></samp>.
  </p>
  </dd>
! <dt><span><code>--docdir=<var>dirname</var></code></span></dt>
  <dd><p>Specify the installation directory for documentation files (other
  than Info) for GCC.  The default is <samp><var>datarootdir</var>/doc</samp>.
  </p>
  </dd>
! <dt><span><code>--htmldir=<var>dirname</var></code></span></dt>
  <dd><p>Specify the installation directory for HTML documentation files.
  The default is <samp><var>docdir</var></samp>.
  </p>
  </dd>
! <dt><span><code>--pdfdir=<var>dirname</var></code></span></dt>
  <dd><p>Specify the installation directory for PDF documentation files.
  The default is <samp><var>docdir</var></samp>.
  </p>
  </dd>
! <dt><span><code>--mandir=<var>dirname</var></code></span></dt>
  <dd><p>Specify the installation directory for manual pages.  The default is
  <samp><var>datarootdir</var>/man</samp>.  (Note that the manual pages are only extracts
  from the full GCC manuals, which are provided in Texinfo format.  The manpages
*************** are derived by an automatic conversion p
*** 331,344 ****
  manual.)
  </p>
  </dd>
! <dt><code>--with-gxx-include-dir=<var>dirname</var></code></dt>
  <dd><p>Specify
  the installation directory for G++ header files.  The default depends
  on other configuration options, and differs between cross and native
  configurations.
  </p>
  </dd>
! <dt><code>--with-specs=<var>specs</var></code></dt>
  <dd><p>Specify additional command line driver SPECS.
  This can be useful if you need to turn on a non-standard feature by
  default without modifying the compiler&rsquo;s source code, for instance
--- 322,335 ----
  manual.)
  </p>
  </dd>
! <dt><span><code>--with-gxx-include-dir=<var>dirname</var></code></span></dt>
  <dd><p>Specify
  the installation directory for G++ header files.  The default depends
  on other configuration options, and differs between cross and native
  configurations.
  </p>
  </dd>
! <dt><span><code>--with-specs=<var>specs</var></code></span></dt>
  <dd><p>Specify additional command line driver SPECS.
  This can be useful if you need to turn on a non-standard feature by
  default without modifying the compiler&rsquo;s source code, for instance
*************** See &ldquo;Spec Files&rdquo; in the main
*** 349,355 ****
  </dl>
  
  </dd>
! <dt><code>--program-prefix=<var>prefix</var></code></dt>
  <dd><p>GCC supports some transformations of the names of its programs when
  installing them.  This option prepends <var>prefix</var> to the names of
  programs to install in <var>bindir</var> (see above).  For example, specifying
--- 340,346 ----
  </dl>
  
  </dd>
! <dt><span><code>--program-prefix=<var>prefix</var></code></span></dt>
  <dd><p>GCC supports some transformations of the names of its programs when
  installing them.  This option prepends <var>prefix</var> to the names of
  programs to install in <var>bindir</var> (see above).  For example, specifying
*************** programs to install in <var>bindir</var>
*** 357,370 ****
  being installed as <samp>/usr/local/bin/foo-gcc</samp>.
  </p>
  </dd>
! <dt><code>--program-suffix=<var>suffix</var></code></dt>
  <dd><p>Appends <var>suffix</var> to the names of programs to install in <var>bindir</var>
  (see above).  For example, specifying <samp>--program-suffix=-3.1</samp>
  would result in &lsquo;<samp>gcc</samp>&rsquo; being installed as
  <samp>/usr/local/bin/gcc-3.1</samp>.
  </p>
  </dd>
! <dt><code>--program-transform-name=<var>pattern</var></code></dt>
  <dd><p>Applies the &lsquo;<samp>sed</samp>&rsquo; script <var>pattern</var> to be applied to the names
  of programs to install in <var>bindir</var> (see above).  <var>pattern</var> has to
  consist of one or more basic &lsquo;<samp>sed</samp>&rsquo; editing commands, separated by
--- 348,361 ----
  being installed as <samp>/usr/local/bin/foo-gcc</samp>.
  </p>
  </dd>
! <dt><span><code>--program-suffix=<var>suffix</var></code></span></dt>
  <dd><p>Appends <var>suffix</var> to the names of programs to install in <var>bindir</var>
  (see above).  For example, specifying <samp>--program-suffix=-3.1</samp>
  would result in &lsquo;<samp>gcc</samp>&rsquo; being installed as
  <samp>/usr/local/bin/gcc-3.1</samp>.
  </p>
  </dd>
! <dt><span><code>--program-transform-name=<var>pattern</var></code></span></dt>
  <dd><p>Applies the &lsquo;<samp>sed</samp>&rsquo; script <var>pattern</var> to be applied to the names
  of programs to install in <var>bindir</var> (see above).  <var>pattern</var> has to
  consist of one or more basic &lsquo;<samp>sed</samp>&rsquo; editing commands, separated by
*************** resulting binary would be installed as
*** 397,403 ****
  transformed yet, which will be fixed in some time.
  </p>
  </dd>
! <dt><code>--with-local-prefix=<var>dirname</var></code></dt>
  <dd><p>Specify the
  installation directory for local include files.  The default is
  <samp>/usr/local</samp>.  Specify this option if you want the compiler to
--- 388,394 ----
  transformed yet, which will be fixed in some time.
  </p>
  </dd>
! <dt><span><code>--with-local-prefix=<var>dirname</var></code></span></dt>
  <dd><p>Specify the
  installation directory for local include files.  The default is
  <samp>/usr/local</samp>.  Specify this option if you want the compiler to
*************** install part of GCC.  Perhaps they make
*** 470,481 ****
  installing GCC creates the directory.
  </p>
  </dd>
! <dt><code>--with-gcc-major-version-only</code></dt>
  <dd><p>Specifies that GCC should use only the major number rather than
  <var>major</var>.<var>minor</var>.<var>patchlevel</var> in filesystem paths.
  </p>
  </dd>
! <dt><code>--with-native-system-header-dir=<var>dirname</var></code></dt>
  <dd><p>Specifies that <var>dirname</var> is the directory that contains native system
  header files, rather than <samp>/usr/include</samp>.  This option is most useful
  if you are creating a compiler that should be isolated from the system
--- 461,472 ----
  installing GCC creates the directory.
  </p>
  </dd>
! <dt><span><code>--with-gcc-major-version-only</code></span></dt>
  <dd><p>Specifies that GCC should use only the major number rather than
  <var>major</var>.<var>minor</var>.<var>patchlevel</var> in filesystem paths.
  </p>
  </dd>
! <dt><span><code>--with-native-system-header-dir=<var>dirname</var></code></span></dt>
  <dd><p>Specifies that <var>dirname</var> is the directory that contains native system
  header files, rather than <samp>/usr/include</samp>.  This option is most useful
  if you are creating a compiler that should be isolated from the system
*************** as much as possible.  It is most commonl
*** 484,490 ****
  <var>dirname</var> inside the system root specified by that option.
  </p>
  </dd>
! <dt><code>--enable-shared[=<var>package</var>[,&hellip;]]</code></dt>
  <dd><p>Build shared versions of libraries, if shared libraries are supported on
  the target platform.  Unlike GCC 2.95.x and earlier, shared libraries
  are enabled by default on all platforms that support shared libraries.
--- 475,481 ----
  <var>dirname</var> inside the system root specified by that option.
  </p>
  </dd>
! <dt><span><code>--enable-shared[=<var>package</var>[,&hellip;]]</code></span></dt>
  <dd><p>Build shared versions of libraries, if shared libraries are supported on
  the target platform.  Unlike GCC 2.95.x and earlier, shared libraries
  are enabled by default on all platforms that support shared libraries.
*************** argument, only <samp>--enable-shared</sa
*** 505,511 ****
  code.
  </p>
  </dd>
! <dt><code>--enable-host-shared</code></dt>
  <dd><p>Specify that the <em>host</em> code should be built into position-independent
  machine code (with -fPIC), allowing it to be used within shared libraries,
  but yielding a slightly slower compiler.
--- 496,502 ----
  code.
  </p>
  </dd>
! <dt><span><code>--enable-host-shared</code></span></dt>
  <dd><p>Specify that the <em>host</em> code should be built into position-independent
  machine code (with -fPIC), allowing it to be used within shared libraries,
  but yielding a slightly slower compiler.
*************** but yielding a slightly slower compiler.
*** 516,522 ****
  libraries.
  </p>
  </dd>
! <dt><code><a name="with-gnu-as"></a>--with-gnu-as</code></dt>
  <dd><p>Specify that the compiler should assume that the
  assembler it finds is the GNU assembler.  However, this does not modify
  the rules to find an assembler and will result in confusion if the
--- 507,513 ----
  libraries.
  </p>
  </dd>
! <dt><span><code><span id="with-gnu-as"></span>--with-gnu-as</code></span></dt>
  <dd><p>Specify that the compiler should assume that the
  assembler it finds is the GNU assembler.  However, this does not modify
  the rules to find an assembler and will result in confusion if the
*************** whether you use the GNU assembler.  On a
*** 539,545 ****
  </li></ul>
  
  </dd>
! <dt><code><a name="with-as"></a>--with-as=<var>pathname</var></code></dt>
  <dd><p>Specify that the compiler should use the assembler pointed to by
  <var>pathname</var>, rather than the one found by the standard rules to find
  an assembler, which are:
--- 530,536 ----
  </li></ul>
  
  </dd>
! <dt><span><code><span id="with-as"></span>--with-as=<var>pathname</var></code></span></dt>
  <dd><p>Specify that the compiler should use the assembler pointed to by
  <var>pathname</var>, rather than the one found by the standard rules to find
  an assembler, which are:
*************** assemblers installed and want to choose
*** 572,600 ****
  above rules.
  </p>
  </dd>
! <dt><code><a name="with-gnu-ld"></a>--with-gnu-ld</code></dt>
  <dd><p>Same as <a href="#with-gnu-as"><samp>--with-gnu-as</samp></a>
  but for the linker.
  </p>
  </dd>
! <dt><code>--with-ld=<var>pathname</var></code></dt>
  <dd><p>Same as <a href="#with-as"><samp>--with-as</samp></a>
  but for the linker.
  </p>
  </dd>
! <dt><code>--with-dsymutil=<var>pathname</var></code></dt>
  <dd><p>Same as <a href="#with-as"><samp>--with-as</samp></a>
  but for the debug linker (only used on Darwin platforms so far).
  </p>
  </dd>
! <dt><code>--with-tls=<var>dialect</var></code></dt>
  <dd><p>Specify the default TLS dialect, for systems were there is a choice.
  For ARM targets, possible values for <var>dialect</var> are <code>gnu</code> or
  <code>gnu2</code>, which select between the original GNU dialect and the GNU TLS
  descriptor-based dialect.
  </p>
  </dd>
! <dt><code>--enable-multiarch</code></dt>
  <dd><p>Specify whether to enable or disable multiarch support.  The default is
  to check for glibc start files in a multiarch location, and enable it
  if the files are found.  The auto detection is enabled for native builds,
--- 563,591 ----
  above rules.
  </p>
  </dd>
! <dt><span><code><span id="with-gnu-ld"></span>--with-gnu-ld</code></span></dt>
  <dd><p>Same as <a href="#with-gnu-as"><samp>--with-gnu-as</samp></a>
  but for the linker.
  </p>
  </dd>
! <dt><span><code>--with-ld=<var>pathname</var></code></span></dt>
  <dd><p>Same as <a href="#with-as"><samp>--with-as</samp></a>
  but for the linker.
  </p>
  </dd>
! <dt><span><code>--with-dsymutil=<var>pathname</var></code></span></dt>
  <dd><p>Same as <a href="#with-as"><samp>--with-as</samp></a>
  but for the debug linker (only used on Darwin platforms so far).
  </p>
  </dd>
! <dt><span><code>--with-tls=<var>dialect</var></code></span></dt>
  <dd><p>Specify the default TLS dialect, for systems were there is a choice.
  For ARM targets, possible values for <var>dialect</var> are <code>gnu</code> or
  <code>gnu2</code>, which select between the original GNU dialect and the GNU TLS
  descriptor-based dialect.
  </p>
  </dd>
! <dt><span><code>--enable-multiarch</code></span></dt>
  <dd><p>Specify whether to enable or disable multiarch support.  The default is
  to check for glibc start files in a multiarch location, and enable it
  if the files are found.  The auto detection is enabled for native builds,
*************** More documentation about multiarch can b
*** 604,616 ****
  <a href="https://wiki.debian.org/Multiarch">https://wiki.debian.org/Multiarch</a>.
  </p>
  </dd>
! <dt><code>--enable-sjlj-exceptions</code></dt>
  <dd><p>Force use of the <code>setjmp</code>/<code>longjmp</code>-based scheme for exceptions.
  &lsquo;<samp>configure</samp>&rsquo; ordinarily picks the correct value based on the platform.
  Only use this option if you are sure you need a different setting.
  </p>
  </dd>
! <dt><code>--enable-vtable-verify</code></dt>
  <dd><p>Specify whether to enable or disable the vtable verification feature.
  Enabling this feature causes libstdc++ to be built with its virtual calls
  in verifiable mode.  This means that, when linked with libvtv, every
--- 595,607 ----
  <a href="https://wiki.debian.org/Multiarch">https://wiki.debian.org/Multiarch</a>.
  </p>
  </dd>
! <dt><span><code>--enable-sjlj-exceptions</code></span></dt>
  <dd><p>Force use of the <code>setjmp</code>/<code>longjmp</code>-based scheme for exceptions.
  &lsquo;<samp>configure</samp>&rsquo; ordinarily picks the correct value based on the platform.
  Only use this option if you are sure you need a different setting.
  </p>
  </dd>
! <dt><span><code>--enable-vtable-verify</code></span></dt>
  <dd><p>Specify whether to enable or disable the vtable verification feature.
  Enabling this feature causes libstdc++ to be built with its virtual calls
  in verifiable mode.  This means that, when linked with libvtv, every
*************** still be built (see <samp>--disable-libv
*** 623,634 ****
  <samp>--disable-vtable-verify</samp> is the default.
  </p>
  </dd>
! <dt><code>--disable-gcov</code></dt>
  <dd><p>Specify that the run-time library used for coverage analysis
  and associated host tools should not be built.
  </p>
  </dd>
! <dt><code>--disable-multilib</code></dt>
  <dd><p>Specify that multiple target
  libraries to support different target variants, calling
  conventions, etc. should not be built.  The default is to build a
--- 614,625 ----
  <samp>--disable-vtable-verify</samp> is the default.
  </p>
  </dd>
! <dt><span><code>--disable-gcov</code></span></dt>
  <dd><p>Specify that the run-time library used for coverage analysis
  and associated host tools should not be built.
  </p>
  </dd>
! <dt><span><code>--disable-multilib</code></span></dt>
  <dd><p>Specify that multiple target
  libraries to support different target variants, calling
  conventions, etc. should not be built.  The default is to build a
*************** predefined set of them.
*** 637,659 ****
  <p>Some targets provide finer-grained control over which multilibs are built
  (e.g., <samp>--disable-softfloat</samp>):
  </p><dl compact="compact">
! <dt><code>arm-*-*</code></dt>
  <dd><p>fpu, 26bit, underscore, interwork, biendian, nofmult.
  </p>
  </dd>
! <dt><code>m68*-*-*</code></dt>
  <dd><p>softfloat, m68881, m68000, m68020.
  </p>
  </dd>
! <dt><code>mips*-*-*</code></dt>
  <dd><p>single-float, biendian, softfloat.
  </p>
  </dd>
! <dt><code>msp430-*-*</code></dt>
  <dd><p>no-exceptions
  </p>
  </dd>
! <dt><code>powerpc*-*-*, rs6000*-*-*</code></dt>
  <dd><p>aix64, pthread, softfloat, powercpu, powerpccpu, powerpcos, biendian,
  sysv, aix.
  </p>
--- 628,650 ----
  <p>Some targets provide finer-grained control over which multilibs are built
  (e.g., <samp>--disable-softfloat</samp>):
  </p><dl compact="compact">
! <dt><span><code>arm-*-*</code></span></dt>
  <dd><p>fpu, 26bit, underscore, interwork, biendian, nofmult.
  </p>
  </dd>
! <dt><span><code>m68*-*-*</code></span></dt>
  <dd><p>softfloat, m68881, m68000, m68020.
  </p>
  </dd>
! <dt><span><code>mips*-*-*</code></span></dt>
  <dd><p>single-float, biendian, softfloat.
  </p>
  </dd>
! <dt><span><code>msp430-*-*</code></span></dt>
  <dd><p>no-exceptions
  </p>
  </dd>
! <dt><span><code>powerpc*-*-*, rs6000*-*-*</code></span></dt>
  <dd><p>aix64, pthread, softfloat, powercpu, powerpccpu, powerpcos, biendian,
  sysv, aix.
  </p>
*************** sysv, aix.
*** 661,668 ****
  </dl>
  
  </dd>
! <dt><code>--with-multilib-list=<var>list</var></code></dt>
! <dt><code>--without-multilib-list</code></dt>
  <dd><p>Specify what multilibs to build.  <var>list</var> is a comma separated list of
  values, possibly consisting of a single value.  Currently only implemented
  for aarch64*-*-*, arm*-*-*, loongarch64-*-*, riscv*-*-*, sh*-*-* and
--- 652,659 ----
  </dl>
  
  </dd>
! <dt><span><code>--with-multilib-list=<var>list</var></code></span></dt>
! <dt><span><code>--without-multilib-list</code></span></dt>
  <dd><p>Specify what multilibs to build.  <var>list</var> is a comma separated list of
  values, possibly consisting of a single value.  Currently only implemented
  for aarch64*-*-*, arm*-*-*, loongarch64-*-*, riscv*-*-*, sh*-*-* and
*************** x86-64-*-linux*.  The accepted values an
*** 670,676 ****
  below.
  </p>
  <dl compact="compact">
! <dt><code>aarch64*-*-*</code></dt>
  <dd><p><var>list</var> is a comma separated list of <code>ilp32</code>, and <code>lp64</code>
  to enable ILP32 and LP64 run-time libraries, respectively.  If
  <var>list</var> is empty, then there will be no multilibs and only the
--- 661,667 ----
  below.
  </p>
  <dl compact="compact">
! <dt><span><code>aarch64*-*-*</code></span></dt>
  <dd><p><var>list</var> is a comma separated list of <code>ilp32</code>, and <code>lp64</code>
  to enable ILP32 and LP64 run-time libraries, respectively.  If
  <var>list</var> is empty, then there will be no multilibs and only the
*************** default set of libraries is selected bas
*** 680,686 ****
  <samp>--target</samp>.
  </p>
  </dd>
! <dt><code>arm*-*-*</code></dt>
  <dd><p><var>list</var> is a comma separated list of <code>aprofile</code> and
  <code>rmprofile</code> to build multilibs for A or R and M architecture
  profiles respectively.  Note that, due to some limitation of the current
--- 671,677 ----
  <samp>--target</samp>.
  </p>
  </dd>
! <dt><span><code>arm*-*-*</code></span></dt>
  <dd><p><var>list</var> is a comma separated list of <code>aprofile</code> and
  <code>rmprofile</code> to build multilibs for A or R and M architecture
  profiles respectively.  Note that, due to some limitation of the current
*************** profile.  The union of these options is
*** 742,748 ****
  </table>
  
  </dd>
! <dt><code>loongarch*-*-*</code></dt>
  <dd><p><var>list</var> is a comma-separated list of the following ABI identifiers:
  <code>lp64d[/base]</code> <code>lp64f[/base]</code> <code>lp64d[/base]</code>, where the
  <code>/base</code> suffix may be omitted, to enable their respective run-time
--- 733,739 ----
  </table>
  
  </dd>
! <dt><span><code>loongarch*-*-*</code></span></dt>
  <dd><p><var>list</var> is a comma-separated list of the following ABI identifiers:
  <code>lp64d[/base]</code> <code>lp64f[/base]</code> <code>lp64d[/base]</code>, where the
  <code>/base</code> suffix may be omitted, to enable their respective run-time
*************** or if <samp>--with-multilib-list</samp>
*** 751,757 ****
  as specified by <samp>--with-abi</samp> or implied by <samp>--target</samp> is selected.
  </p>
  </dd>
! <dt><code>riscv*-*-*</code></dt>
  <dd><p><var>list</var> is a single ABI name.  The target architecture must be either
  <code>rv32gc</code> or <code>rv64gc</code>.  This will build a single multilib for the
  specified architecture and ABI pair.  If <code>--with-multilib-list</code> is not
--- 742,748 ----
  as specified by <samp>--with-abi</samp> or implied by <samp>--target</samp> is selected.
  </p>
  </dd>
! <dt><span><code>riscv*-*-*</code></span></dt>
  <dd><p><var>list</var> is a single ABI name.  The target architecture must be either
  <code>rv32gc</code> or <code>rv64gc</code>.  This will build a single multilib for the
  specified architecture and ABI pair.  If <code>--with-multilib-list</code> is not
*************** given, then a default set of multilibs i
*** 759,765 ****
  <samp>--target</samp>.  This is usually a large set of multilibs.
  </p>
  </dd>
! <dt><code>sh*-*-*</code></dt>
  <dd><p><var>list</var> is a comma separated list of CPU names.  These must be of the
  form <code>sh*</code> or <code>m*</code> (in which case they match the compiler option
  for that processor).  The list should not contain any endian options -
--- 750,756 ----
  <samp>--target</samp>.  This is usually a large set of multilibs.
  </p>
  </dd>
! <dt><span><code>sh*-*-*</code></span></dt>
  <dd><p><var>list</var> is a comma separated list of CPU names.  These must be of the
  form <code>sh*</code> or <code>m*</code> (in which case they match the compiler option
  for that processor).  The list should not contain any endian options -
*************** specialized subset.
*** 780,798 ****
  </p>
  <p>Example 1: to configure a compiler for SH4A only, but supporting both
  endians, with little endian being the default:
! </p><div class="smallexample">
! <pre class="smallexample">--with-cpu=sh4a --with-endian=little,big --with-multilib-list=
  </pre></div>
  
  <p>Example 2: to configure a compiler for both SH4A and SH4AL-DSP, but with
  only little endian SH4AL:
! </p><div class="smallexample">
! <pre class="smallexample">--with-cpu=sh4a --with-endian=little,big \
  --with-multilib-list=sh4al,!mb/m4al
  </pre></div>
  
  </dd>
! <dt><code>x86-64-*-linux*</code></dt>
  <dd><p><var>list</var> is a comma separated list of <code>m32</code>, <code>m64</code> and
  <code>mx32</code> to enable 32-bit, 64-bit and x32 run-time libraries,
  respectively.  If <var>list</var> is empty, then there will be no multilibs
--- 771,789 ----
  </p>
  <p>Example 1: to configure a compiler for SH4A only, but supporting both
  endians, with little endian being the default:
! </p><div class="example">
! <pre class="example">--with-cpu=sh4a --with-endian=little,big --with-multilib-list=
  </pre></div>
  
  <p>Example 2: to configure a compiler for both SH4A and SH4AL-DSP, but with
  only little endian SH4AL:
! </p><div class="example">
! <pre class="example">--with-cpu=sh4a --with-endian=little,big \
  --with-multilib-list=sh4al,!mb/m4al
  </pre></div>
  
  </dd>
! <dt><span><code>x86-64-*-linux*</code></span></dt>
  <dd><p><var>list</var> is a comma separated list of <code>m32</code>, <code>m64</code> and
  <code>mx32</code> to enable 32-bit, 64-bit and x32 run-time libraries,
  respectively.  If <var>list</var> is empty, then there will be no multilibs
*************** and only the default run-time library wi
*** 804,810 ****
  </dl>
  
  </dd>
! <dt><code>--with-multilib-generator=<var>config</var></code></dt>
  <dd><p>Specify what multilibs to build.  <var>config</var> is a semicolon separated list of
  values, possibly consisting of a single value.  Currently only implemented
  for riscv*-*-elf*.  The accepted values and meanings are given below.
--- 795,801 ----
  </dl>
  
  </dd>
! <dt><span><code>--with-multilib-generator=<var>config</var></code></span></dt>
  <dd><p>Specify what multilibs to build.  <var>config</var> is a semicolon separated list of
  values, possibly consisting of a single value.  Currently only implemented
  for riscv*-*-elf*.  The accepted values and meanings are given below.
*************** for riscv*-*-elf*.  The accepted values
*** 814,838 ****
  reuse rule with architecture string and reuse rule with sub-extension.
  </p>
  <p>Example 1: Add multi-lib suppport for rv32i with ilp32.
! </p><div class="smallexample">
! <pre class="smallexample">rv32i-ilp32--
  </pre></div>
  
  <p>Example 2: Add multi-lib suppport for rv32i with ilp32 and rv32imafd with ilp32.
! </p><div class="smallexample">
! <pre class="smallexample">rv32i-ilp32--;rv32imafd-ilp32--
  </pre></div>
  
  <p>Example 3: Add multi-lib suppport for rv32i with ilp32; rv32im with ilp32 and
  rv32ic with ilp32 will reuse this multi-lib set.
! </p><div class="smallexample">
! <pre class="smallexample">rv32i-ilp32-rv32im-c
  </pre></div>
  
  <p>Example 4: Add multi-lib suppport for rv64ima with lp64; rv64imaf with lp64,
  rv64imac with lp64 and rv64imafc with lp64 will reuse this multi-lib set.
! </p><div class="smallexample">
! <pre class="smallexample">rv64ima-lp64--f,c,fc
  </pre></div>
  
  <p><samp>--with-multilib-generator</samp> have an optional configuration argument
--- 805,829 ----
  reuse rule with architecture string and reuse rule with sub-extension.
  </p>
  <p>Example 1: Add multi-lib suppport for rv32i with ilp32.
! </p><div class="example">
! <pre class="example">rv32i-ilp32--
  </pre></div>
  
  <p>Example 2: Add multi-lib suppport for rv32i with ilp32 and rv32imafd with ilp32.
! </p><div class="example">
! <pre class="example">rv32i-ilp32--;rv32imafd-ilp32--
  </pre></div>
  
  <p>Example 3: Add multi-lib suppport for rv32i with ilp32; rv32im with ilp32 and
  rv32ic with ilp32 will reuse this multi-lib set.
! </p><div class="example">
! <pre class="example">rv32i-ilp32-rv32im-c
  </pre></div>
  
  <p>Example 4: Add multi-lib suppport for rv64ima with lp64; rv64imaf with lp64,
  rv64imac with lp64 and rv64imafc with lp64 will reuse this multi-lib set.
! </p><div class="example">
! <pre class="example">rv64ima-lp64--f,c,fc
  </pre></div>
  
  <p><samp>--with-multilib-generator</samp> have an optional configuration argument
*************** currently we support medlow and medany.
*** 842,880 ****
  </p>
  <p>Example 5: Add multi-lib suppport for rv64ima with lp64; rv64ima with lp64 and
  medlow code model
! </p><div class="smallexample">
! <pre class="smallexample">rv64ima-lp64--;--cmodel=medlow
  </pre></div>
  
  <p>Example 6: Add multi-lib suppport for rv64ima with lp64; rv64ima with lp64 and
  medlow code model; rv64ima with lp64 and medany code model
! </p><div class="smallexample">
! <pre class="smallexample">rv64ima-lp64--;--cmodel=medlow,medany
  </pre></div>
  
  </dd>
! <dt><code>--with-endian=<var>endians</var></code></dt>
  <dd><p>Specify what endians to use.
  Currently only implemented for sh*-*-*.
  </p>
  <p><var>endians</var> may be one of the following:
  </p><dl compact="compact">
! <dt><code>big</code></dt>
  <dd><p>Use big endian exclusively.
  </p></dd>
! <dt><code>little</code></dt>
  <dd><p>Use little endian exclusively.
  </p></dd>
! <dt><code>big,little</code></dt>
  <dd><p>Use big endian by default.  Provide a multilib for little endian.
  </p></dd>
! <dt><code>little,big</code></dt>
  <dd><p>Use little endian by default.  Provide a multilib for big endian.
  </p></dd>
  </dl>
  
  </dd>
! <dt><code>--enable-threads</code></dt>
  <dd><p>Specify that the target
  supports threads.  This affects the Objective-C compiler and runtime
  library, and exception handling for other languages like C++.
--- 833,871 ----
  </p>
  <p>Example 5: Add multi-lib suppport for rv64ima with lp64; rv64ima with lp64 and
  medlow code model
! </p><div class="example">
! <pre class="example">rv64ima-lp64--;--cmodel=medlow
  </pre></div>
  
  <p>Example 6: Add multi-lib suppport for rv64ima with lp64; rv64ima with lp64 and
  medlow code model; rv64ima with lp64 and medany code model
! </p><div class="example">
! <pre class="example">rv64ima-lp64--;--cmodel=medlow,medany
  </pre></div>
  
  </dd>
! <dt><span><code>--with-endian=<var>endians</var></code></span></dt>
  <dd><p>Specify what endians to use.
  Currently only implemented for sh*-*-*.
  </p>
  <p><var>endians</var> may be one of the following:
  </p><dl compact="compact">
! <dt><span><code>big</code></span></dt>
  <dd><p>Use big endian exclusively.
  </p></dd>
! <dt><span><code>little</code></span></dt>
  <dd><p>Use little endian exclusively.
  </p></dd>
! <dt><span><code>big,little</code></span></dt>
  <dd><p>Use big endian by default.  Provide a multilib for little endian.
  </p></dd>
! <dt><span><code>little,big</code></span></dt>
  <dd><p>Use little endian by default.  Provide a multilib for big endian.
  </p></dd>
  </dl>
  
  </dd>
! <dt><span><code>--enable-threads</code></span></dt>
  <dd><p>Specify that the target
  supports threads.  This affects the Objective-C compiler and runtime
  library, and exception handling for other languages like C++.
*************** available for the system.  In this case,
*** 887,941 ****
  alias for <samp>--enable-threads=single</samp>.
  </p>
  </dd>
! <dt><code>--disable-threads</code></dt>
  <dd><p>Specify that threading support should be disabled for the system.
  This is an alias for <samp>--enable-threads=single</samp>.
  </p>
  </dd>
! <dt><code>--enable-threads=<var>lib</var></code></dt>
  <dd><p>Specify that
  <var>lib</var> is the thread support library.  This affects the Objective-C
  compiler and runtime library, and exception handling for other languages
  like C++.  The possibilities for <var>lib</var> are:
  </p>
  <dl compact="compact">
! <dt><code>aix</code></dt>
  <dd><p>AIX thread support.
  </p></dd>
! <dt><code>dce</code></dt>
  <dd><p>DCE thread support.
  </p></dd>
! <dt><code>lynx</code></dt>
  <dd><p>LynxOS thread support.
  </p></dd>
! <dt><code>mipssde</code></dt>
  <dd><p>MIPS SDE thread support.
  </p></dd>
! <dt><code>no</code></dt>
  <dd><p>This is an alias for &lsquo;<samp>single</samp>&rsquo;.
  </p></dd>
! <dt><code>posix</code></dt>
  <dd><p>Generic POSIX/Unix98 thread support.
  </p></dd>
! <dt><code>rtems</code></dt>
  <dd><p>RTEMS thread support.
  </p></dd>
! <dt><code>single</code></dt>
  <dd><p>Disable thread support, should work for all platforms.
  </p></dd>
! <dt><code>tpf</code></dt>
  <dd><p>TPF thread support.
  </p></dd>
! <dt><code>vxworks</code></dt>
  <dd><p>VxWorks thread support.
  </p></dd>
! <dt><code>win32</code></dt>
  <dd><p>Microsoft Win32 API thread support.
  </p></dd>
  </dl>
  
  </dd>
! <dt><code>--enable-tls</code></dt>
  <dd><p>Specify that the target supports TLS (Thread Local Storage).  Usually
  configure can correctly determine if TLS is supported.  In cases where
  it guesses incorrectly, TLS can be explicitly enabled or disabled with
--- 878,932 ----
  alias for <samp>--enable-threads=single</samp>.
  </p>
  </dd>
! <dt><span><code>--disable-threads</code></span></dt>
  <dd><p>Specify that threading support should be disabled for the system.
  This is an alias for <samp>--enable-threads=single</samp>.
  </p>
  </dd>
! <dt><span><code>--enable-threads=<var>lib</var></code></span></dt>
  <dd><p>Specify that
  <var>lib</var> is the thread support library.  This affects the Objective-C
  compiler and runtime library, and exception handling for other languages
  like C++.  The possibilities for <var>lib</var> are:
  </p>
  <dl compact="compact">
! <dt><span><code>aix</code></span></dt>
  <dd><p>AIX thread support.
  </p></dd>
! <dt><span><code>dce</code></span></dt>
  <dd><p>DCE thread support.
  </p></dd>
! <dt><span><code>lynx</code></span></dt>
  <dd><p>LynxOS thread support.
  </p></dd>
! <dt><span><code>mipssde</code></span></dt>
  <dd><p>MIPS SDE thread support.
  </p></dd>
! <dt><span><code>no</code></span></dt>
  <dd><p>This is an alias for &lsquo;<samp>single</samp>&rsquo;.
  </p></dd>
! <dt><span><code>posix</code></span></dt>
  <dd><p>Generic POSIX/Unix98 thread support.
  </p></dd>
! <dt><span><code>rtems</code></span></dt>
  <dd><p>RTEMS thread support.
  </p></dd>
! <dt><span><code>single</code></span></dt>
  <dd><p>Disable thread support, should work for all platforms.
  </p></dd>
! <dt><span><code>tpf</code></span></dt>
  <dd><p>TPF thread support.
  </p></dd>
! <dt><span><code>vxworks</code></span></dt>
  <dd><p>VxWorks thread support.
  </p></dd>
! <dt><span><code>win32</code></span></dt>
  <dd><p>Microsoft Win32 API thread support.
  </p></dd>
  </dl>
  
  </dd>
! <dt><span><code>--enable-tls</code></span></dt>
  <dd><p>Specify that the target supports TLS (Thread Local Storage).  Usually
  configure can correctly determine if TLS is supported.  In cases where
  it guesses incorrectly, TLS can be explicitly enabled or disabled with
*************** the assembler supports TLS but the C lib
*** 944,963 ****
  assumptions made by the configure test are incorrect.
  </p>
  </dd>
! <dt><code>--disable-tls</code></dt>
  <dd><p>Specify that the target does not support TLS.
  This is an alias for <samp>--enable-tls=no</samp>.
  </p>
  </dd>
! <dt><code>--disable-tm-clone-registry</code></dt>
  <dd><p>Disable TM clone registry in libgcc. It is enabled in libgcc by default.
  This option helps to reduce code size for embedded targets which do
  not use transactional memory.
  </p>
  </dd>
! <dt><code>--with-cpu=<var>cpu</var></code></dt>
! <dt><code>--with-cpu-32=<var>cpu</var></code></dt>
! <dt><code>--with-cpu-64=<var>cpu</var></code></dt>
  <dd><p>Specify which cpu variant the compiler should generate code for by default.
  <var>cpu</var> will be used as the default value of the <samp>-mcpu=</samp> switch.
  This option is only supported on some targets, including ARC, ARM, i386, M68k,
--- 935,954 ----
  assumptions made by the configure test are incorrect.
  </p>
  </dd>
! <dt><span><code>--disable-tls</code></span></dt>
  <dd><p>Specify that the target does not support TLS.
  This is an alias for <samp>--enable-tls=no</samp>.
  </p>
  </dd>
! <dt><span><code>--disable-tm-clone-registry</code></span></dt>
  <dd><p>Disable TM clone registry in libgcc. It is enabled in libgcc by default.
  This option helps to reduce code size for embedded targets which do
  not use transactional memory.
  </p>
  </dd>
! <dt><span><code>--with-cpu=<var>cpu</var></code></span></dt>
! <dt><span><code>--with-cpu-32=<var>cpu</var></code></span></dt>
! <dt><span><code>--with-cpu-64=<var>cpu</var></code></span></dt>
  <dd><p>Specify which cpu variant the compiler should generate code for by default.
  <var>cpu</var> will be used as the default value of the <samp>-mcpu=</samp> switch.
  This option is only supported on some targets, including ARC, ARM, i386, M68k,
*************** PowerPC, and SPARC.  It is mandatory for
*** 967,982 ****
  x86-64, PowerPC, and SPARC.
  </p>
  </dd>
! <dt><code>--with-schedule=<var>cpu</var></code></dt>
! <dt><code>--with-arch=<var>cpu</var></code></dt>
! <dt><code>--with-arch-32=<var>cpu</var></code></dt>
! <dt><code>--with-arch-64=<var>cpu</var></code></dt>
! <dt><code>--with-tune=<var>cpu</var></code></dt>
! <dt><code>--with-tune-32=<var>cpu</var></code></dt>
! <dt><code>--with-tune-64=<var>cpu</var></code></dt>
! <dt><code>--with-abi=<var>abi</var></code></dt>
! <dt><code>--with-fpu=<var>type</var></code></dt>
! <dt><code>--with-float=<var>type</var></code></dt>
  <dd><p>These configure options provide default values for the <samp>-mschedule=</samp>,
  <samp>-march=</samp>, <samp>-mtune=</samp>, <samp>-mabi=</samp>, and <samp>-mfpu=</samp>
  options and for <samp>-mhard-float</samp> or <samp>-msoft-float</samp>.  As with
--- 958,973 ----
  x86-64, PowerPC, and SPARC.
  </p>
  </dd>
! <dt><span><code>--with-schedule=<var>cpu</var></code></span></dt>
! <dt><span><code>--with-arch=<var>cpu</var></code></span></dt>
! <dt><span><code>--with-arch-32=<var>cpu</var></code></span></dt>
! <dt><span><code>--with-arch-64=<var>cpu</var></code></span></dt>
! <dt><span><code>--with-tune=<var>cpu</var></code></span></dt>
! <dt><span><code>--with-tune-32=<var>cpu</var></code></span></dt>
! <dt><span><code>--with-tune-64=<var>cpu</var></code></span></dt>
! <dt><span><code>--with-abi=<var>abi</var></code></span></dt>
! <dt><span><code>--with-fpu=<var>type</var></code></span></dt>
! <dt><span><code>--with-float=<var>type</var></code></span></dt>
  <dd><p>These configure options provide default values for the <samp>-mschedule=</samp>,
  <samp>-march=</samp>, <samp>-mtune=</samp>, <samp>-mabi=</samp>, and <samp>-mfpu=</samp>
  options and for <samp>-mhard-float</samp> or <samp>-msoft-float</samp>.  As with
*************** options and for <samp>-mhard-float</samp
*** 984,1020 ****
  of the arguments depend on the target.
  </p>
  </dd>
! <dt><code>--with-mode=<var>mode</var></code></dt>
  <dd><p>Specify if the compiler should default to <samp>-marm</samp> or <samp>-mthumb</samp>.
  This option is only supported on ARM targets.
  </p>
  </dd>
! <dt><code>--with-stack-offset=<var>num</var></code></dt>
  <dd><p>This option sets the default for the -mstack-offset=<var>num</var> option,
  and will thus generally also control the setting of this option for
  libraries.  This option is only supported on Epiphany targets.
  </p>
  </dd>
! <dt><code>--with-fpmath=<var>isa</var></code></dt>
  <dd><p>This options sets <samp>-mfpmath=sse</samp> by default and specifies the default
  ISA for floating-point arithmetics.  You can select either &lsquo;<samp>sse</samp>&rsquo; which
  enables <samp>-msse2</samp> or &lsquo;<samp>avx</samp>&rsquo; which enables <samp>-mavx</samp> by default.
  This option is only supported on i386 and x86-64 targets.
  </p>
  </dd>
! <dt><code>--with-fp-32=<var>mode</var></code></dt>
  <dd><p>On MIPS targets, set the default value for the <samp>-mfp</samp> option when using
  the o32 ABI.  The possibilities for <var>mode</var> are:
  </p><dl compact="compact">
! <dt><code>32</code></dt>
  <dd><p>Use the o32 FP32 ABI extension, as with the <samp>-mfp32</samp> command-line
  option.
  </p></dd>
! <dt><code>xx</code></dt>
  <dd><p>Use the o32 FPXX ABI extension, as with the <samp>-mfpxx</samp> command-line
  option.
  </p></dd>
! <dt><code>64</code></dt>
  <dd><p>Use the o32 FP64 ABI extension, as with the <samp>-mfp64</samp> command-line
  option.
  </p></dd>
--- 975,1011 ----
  of the arguments depend on the target.
  </p>
  </dd>
! <dt><span><code>--with-mode=<var>mode</var></code></span></dt>
  <dd><p>Specify if the compiler should default to <samp>-marm</samp> or <samp>-mthumb</samp>.
  This option is only supported on ARM targets.
  </p>
  </dd>
! <dt><span><code>--with-stack-offset=<var>num</var></code></span></dt>
  <dd><p>This option sets the default for the -mstack-offset=<var>num</var> option,
  and will thus generally also control the setting of this option for
  libraries.  This option is only supported on Epiphany targets.
  </p>
  </dd>
! <dt><span><code>--with-fpmath=<var>isa</var></code></span></dt>
  <dd><p>This options sets <samp>-mfpmath=sse</samp> by default and specifies the default
  ISA for floating-point arithmetics.  You can select either &lsquo;<samp>sse</samp>&rsquo; which
  enables <samp>-msse2</samp> or &lsquo;<samp>avx</samp>&rsquo; which enables <samp>-mavx</samp> by default.
  This option is only supported on i386 and x86-64 targets.
  </p>
  </dd>
! <dt><span><code>--with-fp-32=<var>mode</var></code></span></dt>
  <dd><p>On MIPS targets, set the default value for the <samp>-mfp</samp> option when using
  the o32 ABI.  The possibilities for <var>mode</var> are:
  </p><dl compact="compact">
! <dt><span><code>32</code></span></dt>
  <dd><p>Use the o32 FP32 ABI extension, as with the <samp>-mfp32</samp> command-line
  option.
  </p></dd>
! <dt><span><code>xx</code></span></dt>
  <dd><p>Use the o32 FPXX ABI extension, as with the <samp>-mfpxx</samp> command-line
  option.
  </p></dd>
! <dt><span><code>64</code></span></dt>
  <dd><p>Use the o32 FP64 ABI extension, as with the <samp>-mfp64</samp> command-line
  option.
  </p></dd>
*************** option.
*** 1023,1049 ****
  FP32 ABI extension.
  </p>
  </dd>
! <dt><code>--with-odd-spreg-32</code></dt>
  <dd><p>On MIPS targets, set the <samp>-modd-spreg</samp> option by default when using
  the o32 ABI.
  </p>
  </dd>
! <dt><code>--without-odd-spreg-32</code></dt>
  <dd><p>On MIPS targets, set the <samp>-mno-odd-spreg</samp> option by default when using
  the o32 ABI.  This is normally used in conjunction with
  <samp>--with-fp-32=64</samp> in order to target the o32 FP64A ABI extension.
  </p>
  </dd>
! <dt><code>--with-nan=<var>encoding</var></code></dt>
  <dd><p>On MIPS targets, set the default encoding convention to use for the
  special not-a-number (NaN) IEEE 754 floating-point data.  The
  possibilities for <var>encoding</var> are:
  </p><dl compact="compact">
! <dt><code>legacy</code></dt>
  <dd><p>Use the legacy encoding, as with the <samp>-mnan=legacy</samp> command-line
  option.
  </p></dd>
! <dt><code>2008</code></dt>
  <dd><p>Use the 754-2008 encoding, as with the <samp>-mnan=2008</samp> command-line
  option.
  </p></dd>
--- 1014,1040 ----
  FP32 ABI extension.
  </p>
  </dd>
! <dt><span><code>--with-odd-spreg-32</code></span></dt>
  <dd><p>On MIPS targets, set the <samp>-modd-spreg</samp> option by default when using
  the o32 ABI.
  </p>
  </dd>
! <dt><span><code>--without-odd-spreg-32</code></span></dt>
  <dd><p>On MIPS targets, set the <samp>-mno-odd-spreg</samp> option by default when using
  the o32 ABI.  This is normally used in conjunction with
  <samp>--with-fp-32=64</samp> in order to target the o32 FP64A ABI extension.
  </p>
  </dd>
! <dt><span><code>--with-nan=<var>encoding</var></code></span></dt>
  <dd><p>On MIPS targets, set the default encoding convention to use for the
  special not-a-number (NaN) IEEE 754 floating-point data.  The
  possibilities for <var>encoding</var> are:
  </p><dl compact="compact">
! <dt><span><code>legacy</code></span></dt>
  <dd><p>Use the legacy encoding, as with the <samp>-mnan=legacy</samp> command-line
  option.
  </p></dd>
! <dt><span><code>2008</code></span></dt>
  <dd><p>Use the 754-2008 encoding, as with the <samp>-mnan=2008</samp> command-line
  option.
  </p></dd>
*************** the legacy encoding, as when neither of
*** 1055,1104 ****
  <samp>-mnan=legacy</samp> command-line options has been used.
  </p>
  </dd>
! <dt><code>--with-divide=<var>type</var></code></dt>
  <dd><p>Specify how the compiler should generate code for checking for
  division by zero.  This option is only supported on the MIPS target.
  The possibilities for <var>type</var> are:
  </p><dl compact="compact">
! <dt><code>traps</code></dt>
  <dd><p>Division by zero checks use conditional traps (this is the default on
  systems that support conditional traps).
  </p></dd>
! <dt><code>breaks</code></dt>
  <dd><p>Division by zero checks use the break instruction.
  </p></dd>
  </dl>
  
  
  </dd>
! <dt><code>--with-llsc</code></dt>
  <dd><p>On MIPS targets, make <samp>-mllsc</samp> the default when no
  <samp>-mno-llsc</samp> option is passed.  This is the default for
  Linux-based targets, as the kernel will emulate them if the ISA does
  not provide them.
  </p>
  </dd>
! <dt><code>--without-llsc</code></dt>
  <dd><p>On MIPS targets, make <samp>-mno-llsc</samp> the default when no
  <samp>-mllsc</samp> option is passed.
  </p>
  </dd>
! <dt><code>--with-synci</code></dt>
  <dd><p>On MIPS targets, make <samp>-msynci</samp> the default when no
  <samp>-mno-synci</samp> option is passed.
  </p>
  </dd>
! <dt><code>--without-synci</code></dt>
  <dd><p>On MIPS targets, make <samp>-mno-synci</samp> the default when no
  <samp>-msynci</samp> option is passed.  This is the default.
  </p>
  </dd>
! <dt><code>--with-lxc1-sxc1</code></dt>
  <dd><p>On MIPS targets, make <samp>-mlxc1-sxc1</samp> the default when no
  <samp>-mno-lxc1-sxc1</samp> option is passed.  This is the default.
  </p>
  </dd>
! <dt><code>--without-lxc1-sxc1</code></dt>
  <dd><p>On MIPS targets, make <samp>-mno-lxc1-sxc1</samp> the default when no
  <samp>-mlxc1-sxc1</samp> option is passed.  The indexed load/store
  instructions are not directly a problem but can lead to unexpected
--- 1046,1095 ----
  <samp>-mnan=legacy</samp> command-line options has been used.
  </p>
  </dd>
! <dt><span><code>--with-divide=<var>type</var></code></span></dt>
  <dd><p>Specify how the compiler should generate code for checking for
  division by zero.  This option is only supported on the MIPS target.
  The possibilities for <var>type</var> are:
  </p><dl compact="compact">
! <dt><span><code>traps</code></span></dt>
  <dd><p>Division by zero checks use conditional traps (this is the default on
  systems that support conditional traps).
  </p></dd>
! <dt><span><code>breaks</code></span></dt>
  <dd><p>Division by zero checks use the break instruction.
  </p></dd>
  </dl>
  
  
  </dd>
! <dt><span><code>--with-llsc</code></span></dt>
  <dd><p>On MIPS targets, make <samp>-mllsc</samp> the default when no
  <samp>-mno-llsc</samp> option is passed.  This is the default for
  Linux-based targets, as the kernel will emulate them if the ISA does
  not provide them.
  </p>
  </dd>
! <dt><span><code>--without-llsc</code></span></dt>
  <dd><p>On MIPS targets, make <samp>-mno-llsc</samp> the default when no
  <samp>-mllsc</samp> option is passed.
  </p>
  </dd>
! <dt><span><code>--with-synci</code></span></dt>
  <dd><p>On MIPS targets, make <samp>-msynci</samp> the default when no
  <samp>-mno-synci</samp> option is passed.
  </p>
  </dd>
! <dt><span><code>--without-synci</code></span></dt>
  <dd><p>On MIPS targets, make <samp>-mno-synci</samp> the default when no
  <samp>-msynci</samp> option is passed.  This is the default.
  </p>
  </dd>
! <dt><span><code>--with-lxc1-sxc1</code></span></dt>
  <dd><p>On MIPS targets, make <samp>-mlxc1-sxc1</samp> the default when no
  <samp>-mno-lxc1-sxc1</samp> option is passed.  This is the default.
  </p>
  </dd>
! <dt><span><code>--without-lxc1-sxc1</code></span></dt>
  <dd><p>On MIPS targets, make <samp>-mno-lxc1-sxc1</samp> the default when no
  <samp>-mlxc1-sxc1</samp> option is passed.  The indexed load/store
  instructions are not directly a problem but can lead to unexpected
*************** pure 32-bit environment and can hold tru
*** 1114,1125 ****
  the address space is accurately set to be 32-bit for o32 and n32.
  </p>
  </dd>
! <dt><code>--with-madd4</code></dt>
  <dd><p>On MIPS targets, make <samp>-mmadd4</samp> the default when no
  <samp>-mno-madd4</samp> option is passed.  This is the default.
  </p>
  </dd>
! <dt><code>--without-madd4</code></dt>
  <dd><p>On MIPS targets, make <samp>-mno-madd4</samp> the default when no
  <samp>-mmadd4</samp> option is passed.  The <code>madd4</code> instruction
  family can be problematic when targeting a combination of cores that
--- 1105,1116 ----
  the address space is accurately set to be 32-bit for o32 and n32.
  </p>
  </dd>
! <dt><span><code>--with-madd4</code></span></dt>
  <dd><p>On MIPS targets, make <samp>-mmadd4</samp> the default when no
  <samp>-mno-madd4</samp> option is passed.  This is the default.
  </p>
  </dd>
! <dt><span><code>--without-madd4</code></span></dt>
  <dd><p>On MIPS targets, make <samp>-mno-madd4</samp> the default when no
  <samp>-mmadd4</samp> option is passed.  The <code>madd4</code> instruction
  family can be problematic when targeting a combination of cores that
*************** only way to ensure compatible code is ge
*** 1130,1167 ****
  a performance penalty.
  </p>
  </dd>
! <dt><code>--with-mips-plt</code></dt>
  <dd><p>On MIPS targets, make use of copy relocations and PLTs.
  These features are extensions to the traditional
  SVR4-based MIPS ABIs and require support from GNU binutils
  and the runtime C library.
  </p>
  </dd>
! <dt><code>--with-stack-clash-protection-guard-size=<var>size</var></code></dt>
  <dd><p>On certain targets this option sets the default stack clash protection guard
  size as a power of two in bytes.  On AArch64 <var>size</var> is required to be either
  12 (4KB) or 16 (64KB).
  </p>
  </dd>
! <dt><code>--with-isa-spec=<var>ISA-spec-string</var></code></dt>
  <dd><p>On RISC-V targets specify the default version of the RISC-V Unprivileged
  (formerly User-Level) ISA specification to produce code conforming to.
  The possibilities for <var>ISA-spec-string</var> are:
  </p><dl compact="compact">
! <dt><code>2.2</code></dt>
  <dd><p>Produce code conforming to version 2.2.
  </p></dd>
! <dt><code>20190608</code></dt>
  <dd><p>Produce code conforming to version 20190608.
  </p></dd>
! <dt><code>20191213</code></dt>
  <dd><p>Produce code conforming to version 20191213.
  </p></dd>
  </dl>
  <p>In the absence of this configuration option the default version is 20191213.
  </p>
  </dd>
! <dt><code>--enable-__cxa_atexit</code></dt>
  <dd><p>Define if you want to use __cxa_atexit, rather than atexit, to
  register C++ destructors for local statics and global objects.
  This is essential for fully standards-compliant handling of
--- 1121,1158 ----
  a performance penalty.
  </p>
  </dd>
! <dt><span><code>--with-mips-plt</code></span></dt>
  <dd><p>On MIPS targets, make use of copy relocations and PLTs.
  These features are extensions to the traditional
  SVR4-based MIPS ABIs and require support from GNU binutils
  and the runtime C library.
  </p>
  </dd>
! <dt><span><code>--with-stack-clash-protection-guard-size=<var>size</var></code></span></dt>
  <dd><p>On certain targets this option sets the default stack clash protection guard
  size as a power of two in bytes.  On AArch64 <var>size</var> is required to be either
  12 (4KB) or 16 (64KB).
  </p>
  </dd>
! <dt><span><code>--with-isa-spec=<var>ISA-spec-string</var></code></span></dt>
  <dd><p>On RISC-V targets specify the default version of the RISC-V Unprivileged
  (formerly User-Level) ISA specification to produce code conforming to.
  The possibilities for <var>ISA-spec-string</var> are:
  </p><dl compact="compact">
! <dt><span><code>2.2</code></span></dt>
  <dd><p>Produce code conforming to version 2.2.
  </p></dd>
! <dt><span><code>20190608</code></span></dt>
  <dd><p>Produce code conforming to version 20190608.
  </p></dd>
! <dt><span><code>20191213</code></span></dt>
  <dd><p>Produce code conforming to version 20191213.
  </p></dd>
  </dl>
  <p>In the absence of this configuration option the default version is 20191213.
  </p>
  </dd>
! <dt><span><code>--enable-__cxa_atexit</code></span></dt>
  <dd><p>Define if you want to use __cxa_atexit, rather than atexit, to
  register C++ destructors for local statics and global objects.
  This is essential for fully standards-compliant handling of
*************** only available on systems with GNU libc.
*** 1170,1197 ****
  <samp>-fuse-cxa-atexit</samp> to be passed by default.
  </p>
  </dd>
! <dt><code>--enable-gnu-indirect-function</code></dt>
  <dd><p>Define if you want to enable the <code>ifunc</code> attribute.  This option is
  currently only available on systems with GNU libc on certain targets.
  </p>
  </dd>
! <dt><code>--enable-target-optspace</code></dt>
  <dd><p>Specify that target
  libraries should be optimized for code space instead of code speed.
  This is the default for the m32r platform.
  </p>
  </dd>
! <dt><code>--with-cpp-install-dir=<var>dirname</var></code></dt>
  <dd><p>Specify that the user visible <code>cpp</code> program should be installed
  in <samp><var>prefix</var>/<var>dirname</var>/cpp</samp>, in addition to <var>bindir</var>.
  </p>
  </dd>
! <dt><code>--enable-comdat</code></dt>
  <dd><p>Enable COMDAT group support.  This is primarily used to override the
  automatically detected value.
  </p>
  </dd>
! <dt><code>--enable-initfini-array</code></dt>
  <dd><p>Force the use of sections <code>.init_array</code> and <code>.fini_array</code>
  (instead of <code>.init</code> and <code>.fini</code>) for constructors and
  destructors.  Option <samp>--disable-initfini-array</samp> has the
--- 1161,1188 ----
  <samp>-fuse-cxa-atexit</samp> to be passed by default.
  </p>
  </dd>
! <dt><span><code>--enable-gnu-indirect-function</code></span></dt>
  <dd><p>Define if you want to enable the <code>ifunc</code> attribute.  This option is
  currently only available on systems with GNU libc on certain targets.
  </p>
  </dd>
! <dt><span><code>--enable-target-optspace</code></span></dt>
  <dd><p>Specify that target
  libraries should be optimized for code space instead of code speed.
  This is the default for the m32r platform.
  </p>
  </dd>
! <dt><span><code>--with-cpp-install-dir=<var>dirname</var></code></span></dt>
  <dd><p>Specify that the user visible <code>cpp</code> program should be installed
  in <samp><var>prefix</var>/<var>dirname</var>/cpp</samp>, in addition to <var>bindir</var>.
  </p>
  </dd>
! <dt><span><code>--enable-comdat</code></span></dt>
  <dd><p>Enable COMDAT group support.  This is primarily used to override the
  automatically detected value.
  </p>
  </dd>
! <dt><span><code>--enable-initfini-array</code></span></dt>
  <dd><p>Force the use of sections <code>.init_array</code> and <code>.fini_array</code>
  (instead of <code>.init</code> and <code>.fini</code>) for constructors and
  destructors.  Option <samp>--disable-initfini-array</samp> has the
*************** will try to guess whether the <code>.ini
*** 1200,1212 ****
  <code>.fini_array</code> sections are supported and, if they are, use them.
  </p>
  </dd>
! <dt><code>--enable-link-mutex</code></dt>
  <dd><p>When building GCC, use a mutex to avoid linking the compilers for
  multiple languages at the same time, to avoid thrashing on build
  systems with limited free memory.  The default is not to use such a mutex.
  </p>
  </dd>
! <dt><code>--enable-link-serialization</code></dt>
  <dd><p>When building GCC, use make dependencies to serialize linking the compilers for
  multiple languages, to avoid thrashing on build
  systems with limited free memory.  The default is not to add such
--- 1191,1203 ----
  <code>.fini_array</code> sections are supported and, if they are, use them.
  </p>
  </dd>
! <dt><span><code>--enable-link-mutex</code></span></dt>
  <dd><p>When building GCC, use a mutex to avoid linking the compilers for
  multiple languages at the same time, to avoid thrashing on build
  systems with limited free memory.  The default is not to use such a mutex.
  </p>
  </dd>
! <dt><span><code>--enable-link-serialization</code></span></dt>
  <dd><p>When building GCC, use make dependencies to serialize linking the compilers for
  multiple languages, to avoid thrashing on build
  systems with limited free memory.  The default is not to add such
*************** compilers concurrently.  If the argument
*** 1215,1221 ****
  that number of concurrent link processes for the large binaries.
  </p>
  </dd>
! <dt><code>--enable-maintainer-mode</code></dt>
  <dd><p>The build rules that regenerate the Autoconf and Automake output files as
  well as the GCC master message catalog <samp>gcc.pot</samp> are normally
  disabled.  This is because it can only be rebuilt if the complete source
--- 1206,1212 ----
  that number of concurrent link processes for the large binaries.
  </p>
  </dd>
! <dt><span><code>--enable-maintainer-mode</code></span></dt>
  <dd><p>The build rules that regenerate the Autoconf and Automake output files as
  well as the GCC master message catalog <samp>gcc.pot</samp> are normally
  disabled.  This is because it can only be rebuilt if the complete source
*************** this.  Note that you need a recent versi
*** 1225,1238 ****
  to do so.
  </p>
  </dd>
! <dt><code>--disable-bootstrap</code></dt>
  <dd><p>For a native build, the default configuration is to perform
  a 3-stage bootstrap of the compiler when &lsquo;<samp>make</samp>&rsquo; is invoked,
  testing that GCC can compile itself correctly.  If you want to disable
  this process, you can configure with <samp>--disable-bootstrap</samp>.
  </p>
  </dd>
! <dt><code>--enable-bootstrap</code></dt>
  <dd><p>In special cases, you may want to perform a 3-stage build
  even if the target and host triplets are different.
  This is possible when the host can run code compiled for
--- 1216,1229 ----
  to do so.
  </p>
  </dd>
! <dt><span><code>--disable-bootstrap</code></span></dt>
  <dd><p>For a native build, the default configuration is to perform
  a 3-stage bootstrap of the compiler when &lsquo;<samp>make</samp>&rsquo; is invoked,
  testing that GCC can compile itself correctly.  If you want to disable
  this process, you can configure with <samp>--disable-bootstrap</samp>.
  </p>
  </dd>
! <dt><span><code>--enable-bootstrap</code></span></dt>
  <dd><p>In special cases, you may want to perform a 3-stage build
  even if the target and host triplets are different.
  This is possible when the host can run code compiled for
*************** Starting from GCC 4.2, to do this you ha
*** 1241,1247 ****
  with <samp>--enable-bootstrap</samp>.
  </p>
  </dd>
! <dt><code>--enable-generated-files-in-srcdir</code></dt>
  <dd><p>Neither the .c and .h files that are generated from Bison and flex nor the
  info manuals and man pages that are built from the .texi files are present
  in the repository development tree.  When building GCC from that development tree,
--- 1232,1238 ----
  with <samp>--enable-bootstrap</samp>.
  </p>
  </dd>
! <dt><span><code>--enable-generated-files-in-srcdir</code></span></dt>
  <dd><p>Neither the .c and .h files that are generated from Bison and flex nor the
  info manuals and man pages that are built from the .texi files are present
  in the repository development tree.  When building GCC from that development tree,
*************** is not a requirement that the users of s
*** 1256,1262 ****
  or makeinfo.
  </p>
  </dd>
! <dt><code>--enable-version-specific-runtime-libs</code></dt>
  <dd><p>Specify
  that runtime libraries should be installed in the compiler specific
  subdirectory (<samp><var>libdir</var>/gcc</samp>) rather than the usual places.  In
--- 1247,1253 ----
  or makeinfo.
  </p>
  </dd>
! <dt><span><code>--enable-version-specific-runtime-libs</code></span></dt>
  <dd><p>Specify
  that runtime libraries should be installed in the compiler specific
  subdirectory (<samp><var>libdir</var>/gcc</samp>) rather than the usual places.  In
*************** parallel.  The default is &lsquo;<samp>y
*** 1268,1274 ****
  the remaining libraries.
  </p>
  </dd>
! <dt><code><a name="WithAixSoname"></a>--with-aix-soname=&lsquo;<samp>aix</samp>&rsquo;, &lsquo;<samp>svr4</samp>&rsquo; or &lsquo;<samp>both</samp>&rsquo;</code></dt>
  <dd><p>Traditional AIX shared library versioning (versioned <code>Shared Object</code>
  files as members of unversioned <code>Archive Library</code> files named
  &lsquo;<samp>lib.a</samp>&rsquo;) causes numerous headaches for package managers. However,
--- 1259,1265 ----
  the remaining libraries.
  </p>
  </dd>
! <dt><span><code><span id="WithAixSoname"></span>--with-aix-soname=&lsquo;<samp>aix</samp>&rsquo;, &lsquo;<samp>svr4</samp>&rsquo; or &lsquo;<samp>both</samp>&rsquo;</code></span></dt>
  <dd><p>Traditional AIX shared library versioning (versioned <code>Shared Object</code>
  files as members of unversioned <code>Archive Library</code> files named
  &lsquo;<samp>lib.a</samp>&rsquo;) causes numerous headaches for package managers. However,
*************** where this is called the &quot;SONAME&qu
*** 1279,1292 ****
  linker does search for &lsquo;<samp>libNAME.so</samp>&rsquo; before &lsquo;<samp>libNAME.a</samp>&rsquo; library
  filenames with the &lsquo;<samp>-lNAME</samp>&rsquo; linker flag.
  </p>
! <a name="AixLdCommand"></a><p>For detailed information please refer to the AIX
  <a href="https://www.ibm.com/support/knowledgecenter/search/%22the%20ld%20command%2C%20also%20called%20the%20linkage%20editor%20or%20binder%22">ld
  Command</a> reference.
  </p>
  <p>As long as shared library creation is enabled, upon:
  </p><dl compact="compact">
! <dt><code>--with-aix-soname=aix</code></dt>
! <dt><code>--with-aix-soname=both</code></dt>
  <dd><p>A (traditional AIX) <code>Shared Archive Library</code> file is created:
   </p><ul>
  <li> using the &lsquo;<samp>libNAME.a</samp>&rsquo; filename scheme
--- 1270,1283 ----
  linker does search for &lsquo;<samp>libNAME.so</samp>&rsquo; before &lsquo;<samp>libNAME.a</samp>&rsquo; library
  filenames with the &lsquo;<samp>-lNAME</samp>&rsquo; linker flag.
  </p>
! <span id="AixLdCommand"></span><p>For detailed information please refer to the AIX
  <a href="https://www.ibm.com/support/knowledgecenter/search/%22the%20ld%20command%2C%20also%20called%20the%20linkage%20editor%20or%20binder%22">ld
  Command</a> reference.
  </p>
  <p>As long as shared library creation is enabled, upon:
  </p><dl compact="compact">
! <dt><span><code>--with-aix-soname=aix</code></span></dt>
! <dt><span><code>--with-aix-soname=both</code></span></dt>
  <dd><p>A (traditional AIX) <code>Shared Archive Library</code> file is created:
   </p><ul>
  <li> using the &lsquo;<samp>libNAME.a</samp>&rsquo; filename scheme
*************** Command</a> reference.
*** 1303,1310 ****
    </li></ul>
  </li></ul>
  </dd>
! <dt><code>--with-aix-soname=both</code></dt>
! <dt><code>--with-aix-soname=svr4</code></dt>
  <dd><p>A (second) <code>Shared Archive Library</code> file is created:
   </p><ul>
  <li> using the &lsquo;<samp>libNAME.so.V</samp>&rsquo; filename scheme
--- 1294,1301 ----
    </li></ul>
  </li></ul>
  </dd>
! <dt><span><code>--with-aix-soname=both</code></span></dt>
! <dt><span><code>--with-aix-soname=svr4</code></span></dt>
  <dd><p>A (second) <code>Shared Archive Library</code> file is created:
   </p><ul>
  <li> using the &lsquo;<samp>libNAME.so.V</samp>&rsquo; filename scheme
*************** Command</a> reference.
*** 1342,1348 ****
  
  <p>As long as static library creation is enabled, upon:
  </p><dl compact="compact">
! <dt><code>--with-aix-soname=svr4</code></dt>
  <dd><p>A <code>Static Archive Library</code> is created:
   </p><ul>
  <li> using the &lsquo;<samp>libNAME.a</samp>&rsquo; filename scheme
--- 1333,1339 ----
  
  <p>As long as static library creation is enabled, upon:
  </p><dl compact="compact">
! <dt><span><code>--with-aix-soname=svr4</code></span></dt>
  <dd><p>A <code>Static Archive Library</code> is created:
   </p><ul>
  <li> using the &lsquo;<samp>libNAME.a</samp>&rsquo; filename scheme
*************** this option is still experimental and no
*** 1374,1386 ****
  <p>Default is the traditional behavior <samp>--with-aix-soname=&lsquo;<samp>aix</samp>&rsquo;</samp>.
  </p>
  </dd>
! <dt><code>--enable-languages=<var>lang1</var>,<var>lang2</var>,&hellip;</code></dt>
  <dd><p>Specify that only a particular subset of compilers and
  their runtime libraries should be built.  For a list of valid values for
  <var>langN</var> you can issue the following command in the
  <samp>gcc</samp> directory of your GCC source tree:<br>
! </p><div class="smallexample">
! <pre class="smallexample">grep ^language= */config-lang.in
  </pre></div>
  <p>Currently, you can use any of the following:
  <code>all</code>, <code>default</code>, <code>ada</code>, <code>c</code>, <code>c++</code>, <code>d</code>,
--- 1365,1377 ----
  <p>Default is the traditional behavior <samp>--with-aix-soname=&lsquo;<samp>aix</samp>&rsquo;</samp>.
  </p>
  </dd>
! <dt><span><code>--enable-languages=<var>lang1</var>,<var>lang2</var>,&hellip;</code></span></dt>
  <dd><p>Specify that only a particular subset of compilers and
  their runtime libraries should be built.  For a list of valid values for
  <var>langN</var> you can issue the following command in the
  <samp>gcc</samp> directory of your GCC source tree:<br>
! </p><div class="example">
! <pre class="example">grep ^language= */config-lang.in
  </pre></div>
  <p>Currently, you can use any of the following:
  <code>all</code>, <code>default</code>, <code>ada</code>, <code>c</code>, <code>c++</code>, <code>d</code>,
*************** exception is <code>jit</code> language,
*** 1396,1402 ****
  <samp>--enable-host-shared</samp> to be included with <code>all</code>.
  </p>
  </dd>
! <dt><code>--enable-stage1-languages=<var>lang1</var>,<var>lang2</var>,&hellip;</code></dt>
  <dd><p>Specify that a particular subset of compilers and their runtime
  libraries should be built with the system C compiler during stage 1 of
  the bootstrap process, rather than only in later stages with the
--- 1387,1393 ----
  <samp>--enable-host-shared</samp> to be included with <code>all</code>.
  </p>
  </dd>
! <dt><span><code>--enable-stage1-languages=<var>lang1</var>,<var>lang2</var>,&hellip;</code></span></dt>
  <dd><p>Specify that a particular subset of compilers and their runtime
  libraries should be built with the system C compiler during stage 1 of
  the bootstrap process, rather than only in later stages with the
*************** stage1-bubble all-target</code>, or run
*** 1412,1463 ****
  for the specified languages using <code>make stage1-start check-gcc</code>.
  </p>
  </dd>
! <dt><code>--disable-libada</code></dt>
  <dd><p>Specify that the run-time libraries and tools used by GNAT should not
  be built.  This can be useful for debugging, or for compatibility with
  previous Ada build procedures, when it was required to explicitly
  do a &lsquo;<samp>make -C gcc gnatlib_and_tools</samp>&rsquo;.
  </p>
  </dd>
! <dt><code>--disable-libsanitizer</code></dt>
  <dd><p>Specify that the run-time libraries for the various sanitizers should
  not be built.
  </p>
  </dd>
! <dt><code>--disable-libssp</code></dt>
  <dd><p>Specify that the run-time libraries for stack smashing protection
  should not be built or linked against.  On many targets library support
  is provided by the C library instead.
  </p>
  </dd>
! <dt><code>--disable-libquadmath</code></dt>
  <dd><p>Specify that the GCC quad-precision math library should not be built.
  On some systems, the library is required to be linkable when building
  the Fortran front end, unless <samp>--disable-libquadmath-support</samp>
  is used.
  </p>
  </dd>
! <dt><code>--disable-libquadmath-support</code></dt>
  <dd><p>Specify that the Fortran front end and <code>libgfortran</code> do not add
  support for <code>libquadmath</code> on systems supporting it.
  </p>
  </dd>
! <dt><code>--disable-libgomp</code></dt>
  <dd><p>Specify that the GNU Offloading and Multi Processing Runtime Library
  should not be built.
  </p>
  </dd>
! <dt><code>--disable-libvtv</code></dt>
  <dd><p>Specify that the run-time libraries used by vtable verification
  should not be built.
  </p>
  </dd>
! <dt><code>--with-dwarf2</code></dt>
  <dd><p>Specify that the compiler should
  use DWARF 2 debugging information as the default.
  </p>
  </dd>
! <dt><code>--with-advance-toolchain=<var>at</var></code></dt>
  <dd><p>On 64-bit PowerPC Linux systems, configure the compiler to use the
  header files, library files, and the dynamic linker from the Advance
  Toolchain release <var>at</var> instead of the default versions that are
--- 1403,1454 ----
  for the specified languages using <code>make stage1-start check-gcc</code>.
  </p>
  </dd>
! <dt><span><code>--disable-libada</code></span></dt>
  <dd><p>Specify that the run-time libraries and tools used by GNAT should not
  be built.  This can be useful for debugging, or for compatibility with
  previous Ada build procedures, when it was required to explicitly
  do a &lsquo;<samp>make -C gcc gnatlib_and_tools</samp>&rsquo;.
  </p>
  </dd>
! <dt><span><code>--disable-libsanitizer</code></span></dt>
  <dd><p>Specify that the run-time libraries for the various sanitizers should
  not be built.
  </p>
  </dd>
! <dt><span><code>--disable-libssp</code></span></dt>
  <dd><p>Specify that the run-time libraries for stack smashing protection
  should not be built or linked against.  On many targets library support
  is provided by the C library instead.
  </p>
  </dd>
! <dt><span><code>--disable-libquadmath</code></span></dt>
  <dd><p>Specify that the GCC quad-precision math library should not be built.
  On some systems, the library is required to be linkable when building
  the Fortran front end, unless <samp>--disable-libquadmath-support</samp>
  is used.
  </p>
  </dd>
! <dt><span><code>--disable-libquadmath-support</code></span></dt>
  <dd><p>Specify that the Fortran front end and <code>libgfortran</code> do not add
  support for <code>libquadmath</code> on systems supporting it.
  </p>
  </dd>
! <dt><span><code>--disable-libgomp</code></span></dt>
  <dd><p>Specify that the GNU Offloading and Multi Processing Runtime Library
  should not be built.
  </p>
  </dd>
! <dt><span><code>--disable-libvtv</code></span></dt>
  <dd><p>Specify that the run-time libraries used by vtable verification
  should not be built.
  </p>
  </dd>
! <dt><span><code>--with-dwarf2</code></span></dt>
  <dd><p>Specify that the compiler should
  use DWARF 2 debugging information as the default.
  </p>
  </dd>
! <dt><span><code>--with-advance-toolchain=<var>at</var></code></span></dt>
  <dd><p>On 64-bit PowerPC Linux systems, configure the compiler to use the
  header files, library files, and the dynamic linker from the Advance
  Toolchain release <var>at</var> instead of the default versions that are
*************** intended for the developers of GCC, and
*** 1466,1473 ****
  use.
  </p>
  </dd>
! <dt><code>--enable-targets=all</code></dt>
! <dt><code>--enable-targets=<var>target_list</var></code></dt>
  <dd><p>Some GCC targets, e.g. powerpc64-linux, build bi-arch compilers.
  These are compilers that are able to generate either 64-bit or 32-bit
  code.  Typically, the corresponding 32-bit target, e.g.
--- 1457,1464 ----
  use.
  </p>
  </dd>
! <dt><span><code>--enable-targets=all</code></span></dt>
! <dt><span><code>--enable-targets=<var>target_list</var></code></span></dt>
  <dd><p>Some GCC targets, e.g. powerpc64-linux, build bi-arch compilers.
  These are compilers that are able to generate either 64-bit or 32-bit
  code.  Typically, the corresponding 32-bit target, e.g.
*************** Currently, this option only affects spar
*** 1481,1505 ****
  mips-linux and s390-linux.
  </p>
  </dd>
! <dt><code>--enable-default-pie</code></dt>
  <dd><p>Turn on <samp>-fPIE</samp> and <samp>-pie</samp> by default.
  </p>
  </dd>
! <dt><code>--enable-secureplt</code></dt>
  <dd><p>This option enables <samp>-msecure-plt</samp> by default for powerpc-linux.
  See &ldquo;RS/6000 and PowerPC Options&rdquo; in the main manual
  </p>
  </dd>
! <dt><code>--enable-default-ssp</code></dt>
  <dd><p>Turn on <samp>-fstack-protector-strong</samp> by default.
  </p>
  </dd>
! <dt><code>--enable-cld</code></dt>
  <dd><p>This option enables <samp>-mcld</samp> by default for 32-bit x86 targets.
  See &ldquo;i386 and x86-64 Options&rdquo; in the main manual
  </p>
  </dd>
! <dt><code>--enable-large-address-aware</code></dt>
  <dd><p>The <samp>--enable-large-address-aware</samp> option arranges for MinGW
  executables to be linked using the <samp>--large-address-aware</samp>
  option, that enables the use of more than 2GB of memory.  If GCC is
--- 1472,1496 ----
  mips-linux and s390-linux.
  </p>
  </dd>
! <dt><span><code>--enable-default-pie</code></span></dt>
  <dd><p>Turn on <samp>-fPIE</samp> and <samp>-pie</samp> by default.
  </p>
  </dd>
! <dt><span><code>--enable-secureplt</code></span></dt>
  <dd><p>This option enables <samp>-msecure-plt</samp> by default for powerpc-linux.
  See &ldquo;RS/6000 and PowerPC Options&rdquo; in the main manual
  </p>
  </dd>
! <dt><span><code>--enable-default-ssp</code></span></dt>
  <dd><p>Turn on <samp>-fstack-protector-strong</samp> by default.
  </p>
  </dd>
! <dt><span><code>--enable-cld</code></span></dt>
  <dd><p>This option enables <samp>-mcld</samp> by default for 32-bit x86 targets.
  See &ldquo;i386 and x86-64 Options&rdquo; in the main manual
  </p>
  </dd>
! <dt><span><code>--enable-large-address-aware</code></span></dt>
  <dd><p>The <samp>--enable-large-address-aware</samp> option arranges for MinGW
  executables to be linked using the <samp>--large-address-aware</samp>
  option, that enables the use of more than 2GB of memory.  If GCC is
*************** configured with this option, its effects
*** 1508,1521 ****
  compiler driver.
  </p>
  </dd>
! <dt><code>--enable-win32-registry</code></dt>
! <dt><code>--enable-win32-registry=<var>key</var></code></dt>
! <dt><code>--disable-win32-registry</code></dt>
  <dd><p>The <samp>--enable-win32-registry</samp> option enables Microsoft Windows-hosted GCC
  to look up installations paths in the registry using the following key:
  </p>
! <div class="smallexample">
! <pre class="smallexample"><code>HKEY_LOCAL_MACHINE\SOFTWARE\Free Software Foundation\<var>key</var></code>
  </pre></div>
  
  <p><var>key</var> defaults to GCC version number, and can be overridden by the
--- 1499,1512 ----
  compiler driver.
  </p>
  </dd>
! <dt><span><code>--enable-win32-registry</code></span></dt>
! <dt><span><code>--enable-win32-registry=<var>key</var></code></span></dt>
! <dt><span><code>--disable-win32-registry</code></span></dt>
  <dd><p>The <samp>--enable-win32-registry</samp> option enables Microsoft Windows-hosted GCC
  to look up installations paths in the registry using the following key:
  </p>
! <div class="example">
! <pre class="example"><code>HKEY_LOCAL_MACHINE\SOFTWARE\Free Software Foundation\<var>key</var></code>
  </pre></div>
  
  <p><var>key</var> defaults to GCC version number, and can be overridden by the
*************** by default, and can be disabled by <samp
*** 1527,1542 ****
  option.  This option has no effect on the other hosts.
  </p>
  </dd>
! <dt><code>--nfp</code></dt>
  <dd><p>Specify that the machine does not have a floating point unit.  This
  option only applies to &lsquo;<samp>m68k-sun-sunos<var>n</var></samp>&rsquo;.  On any other
  system, <samp>--nfp</samp> has no effect.
  </p>
  </dd>
! <dt><code>--enable-werror</code></dt>
! <dt><code>--disable-werror</code></dt>
! <dt><code>--enable-werror=yes</code></dt>
! <dt><code>--enable-werror=no</code></dt>
  <dd><p>When you specify this option, it controls whether certain files in the
  compiler are built with <samp>-Werror</samp> in bootstrap stage2 and later.
  If you don&rsquo;t specify it, <samp>-Werror</samp> is turned on for the main
--- 1518,1533 ----
  option.  This option has no effect on the other hosts.
  </p>
  </dd>
! <dt><span><code>--nfp</code></span></dt>
  <dd><p>Specify that the machine does not have a floating point unit.  This
  option only applies to &lsquo;<samp>m68k-sun-sunos<var>n</var></samp>&rsquo;.  On any other
  system, <samp>--nfp</samp> has no effect.
  </p>
  </dd>
! <dt><span><code>--enable-werror</code></span></dt>
! <dt><span><code>--disable-werror</code></span></dt>
! <dt><span><code>--enable-werror=yes</code></span></dt>
! <dt><span><code>--enable-werror=no</code></span></dt>
  <dd><p>When you specify this option, it controls whether certain files in the
  compiler are built with <samp>-Werror</samp> in bootstrap stage2 and later.
  If you don&rsquo;t specify it, <samp>-Werror</samp> is turned on for the main
*************** final releases.  The specific files whic
*** 1545,1553 ****
  controlled by the Makefiles.
  </p>
  </dd>
! <dt><code>--enable-checking</code></dt>
! <dt><code>--disable-checking</code></dt>
! <dt><code>--enable-checking=<var>list</var></code></dt>
  <dd><p>This option controls performing internal consistency checks in the compiler.
  It does not change the generated code, but adds error checking of the
  requested complexity.  This slows down the compiler and may only work
--- 1536,1544 ----
  controlled by the Makefiles.
  </p>
  </dd>
! <dt><span><code>--enable-checking</code></span></dt>
! <dt><span><code>--disable-checking</code></span></dt>
! <dt><span><code>--enable-checking=<var>list</var></code></span></dt>
  <dd><p>This option controls performing internal consistency checks in the compiler.
  It does not change the generated code, but adds error checking of the
  requested complexity.  This slows down the compiler and may only work
*************** expensive and the &lsquo;<samp>df</samp>
*** 1585,1593 ****
  expensive.
  </p>
  </dd>
! <dt><code>--disable-stage1-checking</code></dt>
! <dt><code>--enable-stage1-checking</code></dt>
! <dt><code>--enable-stage1-checking=<var>list</var></code></dt>
  <dd><p>This option affects only bootstrap build.  If no <samp>--enable-checking</samp>
  option is specified the stage1 compiler is built with &lsquo;<samp>yes</samp>&rsquo; checking
  enabled, otherwise the stage1 checking flags are the same as specified by
--- 1576,1584 ----
  expensive.
  </p>
  </dd>
! <dt><span><code>--disable-stage1-checking</code></span></dt>
! <dt><span><code>--enable-stage1-checking</code></span></dt>
! <dt><span><code>--enable-stage1-checking=<var>list</var></code></span></dt>
  <dd><p>This option affects only bootstrap build.  If no <samp>--enable-checking</samp>
  option is specified the stage1 compiler is built with &lsquo;<samp>yes</samp>&rsquo; checking
  enabled, otherwise the stage1 checking flags are the same as specified by
*************** with checking for stage1 enabled, you ca
*** 1599,1606 ****
  to disable checking for the stage1 compiler.
  </p>
  </dd>
! <dt><code>--enable-coverage</code></dt>
! <dt><code>--enable-coverage=<var>level</var></code></dt>
  <dd><p>With this option, the compiler is built to collect self coverage
  information, every time it is run.  This is for internal development
  purposes, and only works when the compiler is being built with gcc.  The
--- 1590,1597 ----
  to disable checking for the stage1 compiler.
  </p>
  </dd>
! <dt><span><code>--enable-coverage</code></span></dt>
! <dt><span><code>--enable-coverage=<var>level</var></code></span></dt>
  <dd><p>With this option, the compiler is built to collect self coverage
  information, every time it is run.  This is for internal development
  purposes, and only works when the compiler is being built with gcc.  The
*************** enable optimization.  When coverage is e
*** 1611,1641 ****
  without optimization.
  </p>
  </dd>
! <dt><code>--enable-gather-detailed-mem-stats</code></dt>
  <dd><p>When this option is specified more detailed information on memory
  allocation is gathered.  This information is printed when using
  <samp>-fmem-report</samp>.
  </p>
  </dd>
! <dt><code>--enable-valgrind-annotations</code></dt>
  <dd><p>Mark selected memory related operations in the compiler when run under
  valgrind to suppress false positives.
  </p>
  </dd>
! <dt><code>--enable-nls</code></dt>
! <dt><code>--disable-nls</code></dt>
  <dd><p>The <samp>--enable-nls</samp> option enables Native Language Support (NLS),
  which lets GCC output diagnostics in languages other than American
  English.  Native Language Support is enabled by default if not doing a
  canadian cross build.  The <samp>--disable-nls</samp> option disables NLS.
  </p>
  </dd>
! <dt><code>--with-included-gettext</code></dt>
  <dd><p>If NLS is enabled, the <samp>--with-included-gettext</samp> option causes the build
  procedure to prefer its copy of GNU <code>gettext</code>.
  </p>
  </dd>
! <dt><code>--with-catgets</code></dt>
  <dd><p>If NLS is enabled, and if the host lacks <code>gettext</code> but has the
  inferior <code>catgets</code> interface, the GCC build procedure normally
  ignores <code>catgets</code> and instead uses GCC&rsquo;s copy of the GNU
--- 1602,1632 ----
  without optimization.
  </p>
  </dd>
! <dt><span><code>--enable-gather-detailed-mem-stats</code></span></dt>
  <dd><p>When this option is specified more detailed information on memory
  allocation is gathered.  This information is printed when using
  <samp>-fmem-report</samp>.
  </p>
  </dd>
! <dt><span><code>--enable-valgrind-annotations</code></span></dt>
  <dd><p>Mark selected memory related operations in the compiler when run under
  valgrind to suppress false positives.
  </p>
  </dd>
! <dt><span><code>--enable-nls</code></span></dt>
! <dt><span><code>--disable-nls</code></span></dt>
  <dd><p>The <samp>--enable-nls</samp> option enables Native Language Support (NLS),
  which lets GCC output diagnostics in languages other than American
  English.  Native Language Support is enabled by default if not doing a
  canadian cross build.  The <samp>--disable-nls</samp> option disables NLS.
  </p>
  </dd>
! <dt><span><code>--with-included-gettext</code></span></dt>
  <dd><p>If NLS is enabled, the <samp>--with-included-gettext</samp> option causes the build
  procedure to prefer its copy of GNU <code>gettext</code>.
  </p>
  </dd>
! <dt><span><code>--with-catgets</code></span></dt>
  <dd><p>If NLS is enabled, and if the host lacks <code>gettext</code> but has the
  inferior <code>catgets</code> interface, the GCC build procedure normally
  ignores <code>catgets</code> and instead uses GCC&rsquo;s copy of the GNU
*************** ignores <code>catgets</code> and instead
*** 1643,1654 ****
  build procedure to use the host&rsquo;s <code>catgets</code> in this situation.
  </p>
  </dd>
! <dt><code>--with-libiconv-prefix=<var>dir</var></code></dt>
  <dd><p>Search for libiconv header files in <samp><var>dir</var>/include</samp> and
  libiconv library files in <samp><var>dir</var>/lib</samp>.
  </p>
  </dd>
! <dt><code>--enable-obsolete</code></dt>
  <dd><p>Enable configuration for an obsoleted system.  If you attempt to
  configure GCC for a system (build, host, or target) which has been
  obsoleted, and you do not specify this flag, configure will halt with an
--- 1634,1645 ----
  build procedure to use the host&rsquo;s <code>catgets</code> in this situation.
  </p>
  </dd>
! <dt><span><code>--with-libiconv-prefix=<var>dir</var></code></span></dt>
  <dd><p>Search for libiconv header files in <samp><var>dir</var>/include</samp> and
  libiconv library files in <samp><var>dir</var>/lib</samp>.
  </p>
  </dd>
! <dt><span><code>--enable-obsolete</code></span></dt>
  <dd><p>Enable configuration for an obsoleted system.  If you attempt to
  configure GCC for a system (build, host, or target) which has been
  obsoleted, and you do not specify this flag, configure will halt with an
*************** is removed entirely in the next major re
*** 1659,1670 ****
  forward to maintain the port.
  </p>
  </dd>
! <dt><code>--enable-decimal-float</code></dt>
! <dt><code>--enable-decimal-float=yes</code></dt>
! <dt><code>--enable-decimal-float=no</code></dt>
! <dt><code>--enable-decimal-float=bid</code></dt>
! <dt><code>--enable-decimal-float=dpd</code></dt>
! <dt><code>--disable-decimal-float</code></dt>
  <dd><p>Enable (or disable) support for the C decimal floating point extension
  that is in the IEEE 754-2008 standard.  This is enabled by default only
  on PowerPC, i386, and x86_64 GNU/Linux systems.  Other systems may also
--- 1650,1661 ----
  forward to maintain the port.
  </p>
  </dd>
! <dt><span><code>--enable-decimal-float</code></span></dt>
! <dt><span><code>--enable-decimal-float=yes</code></span></dt>
! <dt><span><code>--enable-decimal-float=no</code></span></dt>
! <dt><span><code>--enable-decimal-float=bid</code></span></dt>
! <dt><span><code>--enable-decimal-float=dpd</code></span></dt>
! <dt><span><code>--disable-decimal-float</code></span></dt>
  <dd><p>Enable (or disable) support for the C decimal floating point extension
  that is in the IEEE 754-2008 standard.  This is enabled by default only
  on PowerPC, i386, and x86_64 GNU/Linux systems.  Other systems may also
*************** format is default on i386 and x86_64 sys
*** 1675,1689 ****
  (densely packed decimal) format is default on PowerPC systems.
  </p>
  </dd>
! <dt><code>--enable-fixed-point</code></dt>
! <dt><code>--disable-fixed-point</code></dt>
  <dd><p>Enable (or disable) support for C fixed-point arithmetic.
  This option is enabled by default for some targets (such as MIPS) which
  have hardware-support for fixed-point operations.  On other targets, you
  may enable this option manually.
  </p>
  </dd>
! <dt><code>--with-long-double-128</code></dt>
  <dd><p>Specify if <code>long double</code> type should be 128-bit by default on selected
  GNU/Linux architectures.  If using <code>--without-long-double-128</code>,
  <code>long double</code> will be by default 64-bit, the same as <code>double</code> type.
--- 1666,1680 ----
  (densely packed decimal) format is default on PowerPC systems.
  </p>
  </dd>
! <dt><span><code>--enable-fixed-point</code></span></dt>
! <dt><span><code>--disable-fixed-point</code></span></dt>
  <dd><p>Enable (or disable) support for C fixed-point arithmetic.
  This option is enabled by default for some targets (such as MIPS) which
  have hardware-support for fixed-point operations.  On other targets, you
  may enable this option manually.
  </p>
  </dd>
! <dt><span><code>--with-long-double-128</code></span></dt>
  <dd><p>Specify if <code>long double</code> type should be 128-bit by default on selected
  GNU/Linux architectures.  If using <code>--without-long-double-128</code>,
  <code>long double</code> will be by default 64-bit, the same as <code>double</code> type.
*************** When neither of these configure options
*** 1692,1699 ****
  64-bit <code>long double</code> otherwise.
  </p>
  </dd>
! <dt><code>--with-long-double-format=ibm</code></dt>
! <dt><code>--with-long-double-format=ieee</code></dt>
  <dd><p>Specify whether <code>long double</code> uses the IBM extended double format
  or the IEEE 128-bit floating point format on PowerPC Linux systems.
  This configuration switch will only work on little endian PowerPC
--- 1683,1690 ----
  64-bit <code>long double</code> otherwise.
  </p>
  </dd>
! <dt><span><code>--with-long-double-format=ibm</code></span></dt>
! <dt><span><code>--with-long-double-format=ieee</code></span></dt>
  <dd><p>Specify whether <code>long double</code> uses the IBM extended double format
  or the IEEE 128-bit floating point format on PowerPC Linux systems.
  This configuration switch will only work on little endian PowerPC
*************** point, it is not recommended to use
*** 1711,1729 ****
  <samp>--with-long-double-format=ieee</samp>.
  </p>
  </dd>
! <dt><code>--enable-fdpic</code></dt>
  <dd><p>On SH Linux systems, generate ELF FDPIC code.
  </p>
  </dd>
! <dt><code>--with-gmp=<var>pathname</var></code></dt>
! <dt><code>--with-gmp-include=<var>pathname</var></code></dt>
! <dt><code>--with-gmp-lib=<var>pathname</var></code></dt>
! <dt><code>--with-mpfr=<var>pathname</var></code></dt>
! <dt><code>--with-mpfr-include=<var>pathname</var></code></dt>
! <dt><code>--with-mpfr-lib=<var>pathname</var></code></dt>
! <dt><code>--with-mpc=<var>pathname</var></code></dt>
! <dt><code>--with-mpc-include=<var>pathname</var></code></dt>
! <dt><code>--with-mpc-lib=<var>pathname</var></code></dt>
  <dd><p>If you want to build GCC but do not have the GMP library, the MPFR
  library and/or the MPC library installed in a standard location and
  do not have their sources present in the GCC source tree then you
--- 1702,1720 ----
  <samp>--with-long-double-format=ieee</samp>.
  </p>
  </dd>
! <dt><span><code>--enable-fdpic</code></span></dt>
  <dd><p>On SH Linux systems, generate ELF FDPIC code.
  </p>
  </dd>
! <dt><span><code>--with-gmp=<var>pathname</var></code></span></dt>
! <dt><span><code>--with-gmp-include=<var>pathname</var></code></span></dt>
! <dt><span><code>--with-gmp-lib=<var>pathname</var></code></span></dt>
! <dt><span><code>--with-mpfr=<var>pathname</var></code></span></dt>
! <dt><span><code>--with-mpfr-include=<var>pathname</var></code></span></dt>
! <dt><span><code>--with-mpfr-lib=<var>pathname</var></code></span></dt>
! <dt><span><code>--with-mpc=<var>pathname</var></code></span></dt>
! <dt><span><code>--with-mpc-include=<var>pathname</var></code></span></dt>
! <dt><span><code>--with-mpc-lib=<var>pathname</var></code></span></dt>
  <dd><p>If you want to build GCC but do not have the GMP library, the MPFR
  library and/or the MPC library installed in a standard location and
  do not have their sources present in the GCC source tree then you
*************** variable (<code>LD_LIBRARY_PATH</code> o
*** 1750,1758 ****
  a cross compiler, they will not be used to configure target libraries.
  </p>
  </dd>
! <dt><code>--with-isl=<var>pathname</var></code></dt>
! <dt><code>--with-isl-include=<var>pathname</var></code></dt>
! <dt><code>--with-isl-lib=<var>pathname</var></code></dt>
  <dd><p>If you do not have the isl library installed in a standard location and you
  want to build GCC, you can explicitly specify the directory where it is
  installed (&lsquo;<samp>--with-isl=<var>islinstalldir</var></samp>&rsquo;). The
--- 1741,1749 ----
  a cross compiler, they will not be used to configure target libraries.
  </p>
  </dd>
! <dt><span><code>--with-isl=<var>pathname</var></code></span></dt>
! <dt><span><code>--with-isl-include=<var>pathname</var></code></span></dt>
! <dt><span><code>--with-isl-lib=<var>pathname</var></code></span></dt>
  <dd><p>If you do not have the isl library installed in a standard location and you
  want to build GCC, you can explicitly specify the directory where it is
  installed (&lsquo;<samp>--with-isl=<var>islinstalldir</var></samp>&rsquo;). The
*************** include and lib options directly.
*** 1766,1772 ****
  a cross compiler, they will not be used to configure target libraries.
  </p>
  </dd>
! <dt><code>--with-stage1-ldflags=<var>flags</var></code></dt>
  <dd><p>This option may be used to set linker flags to be used when linking
  stage 1 of GCC.  These are also used when linking GCC if configured with
  <samp>--disable-bootstrap</samp>.  If <samp>--with-stage1-libs</samp> is not set to a
--- 1757,1763 ----
  a cross compiler, they will not be used to configure target libraries.
  </p>
  </dd>
! <dt><span><code>--with-stage1-ldflags=<var>flags</var></code></span></dt>
  <dd><p>This option may be used to set linker flags to be used when linking
  stage 1 of GCC.  These are also used when linking GCC if configured with
  <samp>--disable-bootstrap</samp>.  If <samp>--with-stage1-libs</samp> is not set to a
*************** value, then the default is &lsquo;<samp>
*** 1774,1804 ****
  supported.
  </p>
  </dd>
! <dt><code>--with-stage1-libs=<var>libs</var></code></dt>
  <dd><p>This option may be used to set libraries to be used when linking stage 1
  of GCC.  These are also used when linking GCC if configured with
  <samp>--disable-bootstrap</samp>.
  </p>
  </dd>
! <dt><code>--with-boot-ldflags=<var>flags</var></code></dt>
  <dd><p>This option may be used to set linker flags to be used when linking
  stage 2 and later when bootstrapping GCC.  If &ndash;with-boot-libs
  is not is set to a value, then the default is
  &lsquo;<samp>-static-libstdc++ -static-libgcc</samp>&rsquo;.
  </p>
  </dd>
! <dt><code>--with-boot-libs=<var>libs</var></code></dt>
  <dd><p>This option may be used to set libraries to be used when linking stage 2
  and later when bootstrapping GCC.
  </p>
  </dd>
! <dt><code>--with-debug-prefix-map=<var>map</var></code></dt>
  <dd><p>Convert source directory names using <samp>-fdebug-prefix-map</samp> when
  building runtime libraries.  &lsquo;<samp><var>map</var></samp>&rsquo; is a space-separated
  list of maps of the form &lsquo;<samp><var>old</var>=<var>new</var></samp>&rsquo;.
  </p>
  </dd>
! <dt><code>--enable-linker-build-id</code></dt>
  <dd><p>Tells GCC to pass <samp>--build-id</samp> option to the linker for all final
  links (links performed without the <samp>-r</samp> or <samp>--relocatable</samp>
  option), if the linker supports it.  If you specify
--- 1765,1795 ----
  supported.
  </p>
  </dd>
! <dt><span><code>--with-stage1-libs=<var>libs</var></code></span></dt>
  <dd><p>This option may be used to set libraries to be used when linking stage 1
  of GCC.  These are also used when linking GCC if configured with
  <samp>--disable-bootstrap</samp>.
  </p>
  </dd>
! <dt><span><code>--with-boot-ldflags=<var>flags</var></code></span></dt>
  <dd><p>This option may be used to set linker flags to be used when linking
  stage 2 and later when bootstrapping GCC.  If &ndash;with-boot-libs
  is not is set to a value, then the default is
  &lsquo;<samp>-static-libstdc++ -static-libgcc</samp>&rsquo;.
  </p>
  </dd>
! <dt><span><code>--with-boot-libs=<var>libs</var></code></span></dt>
  <dd><p>This option may be used to set libraries to be used when linking stage 2
  and later when bootstrapping GCC.
  </p>
  </dd>
! <dt><span><code>--with-debug-prefix-map=<var>map</var></code></span></dt>
  <dd><p>Convert source directory names using <samp>-fdebug-prefix-map</samp> when
  building runtime libraries.  &lsquo;<samp><var>map</var></samp>&rsquo; is a space-separated
  list of maps of the form &lsquo;<samp><var>old</var>=<var>new</var></samp>&rsquo;.
  </p>
  </dd>
! <dt><span><code>--enable-linker-build-id</code></span></dt>
  <dd><p>Tells GCC to pass <samp>--build-id</samp> option to the linker for all final
  links (links performed without the <samp>-r</samp> or <samp>--relocatable</samp>
  option), if the linker supports it.  If you specify
*************** support <samp>--build-id</samp> option,
*** 1807,1827 ****
  <samp>--enable-linker-build-id</samp> option is ignored.  The default is off.
  </p>
  </dd>
! <dt><code>--with-linker-hash-style=<var>choice</var></code></dt>
  <dd><p>Tells GCC to pass <samp>--hash-style=<var>choice</var></samp> option to the
  linker for all final links. <var>choice</var> can be one of
  &lsquo;<samp>sysv</samp>&rsquo;, &lsquo;<samp>gnu</samp>&rsquo;, and &lsquo;<samp>both</samp>&rsquo; where &lsquo;<samp>sysv</samp>&rsquo; is the default.
  </p>
  </dd>
! <dt><code>--enable-gnu-unique-object</code></dt>
! <dt><code>--disable-gnu-unique-object</code></dt>
  <dd><p>Tells GCC to use the gnu_unique_object relocation for C++ template
  static data members and inline function local statics.  Enabled by
  default for a toolchain with an assembler that accepts it and
  GLIBC 2.11 or above, otherwise disabled.
  </p>
  </dd>
! <dt><code>--with-diagnostics-color=<var>choice</var></code></dt>
  <dd><p>Tells GCC to use <var>choice</var> as the default for <samp>-fdiagnostics-color=</samp>
  option (if not used explicitly on the command line).  <var>choice</var>
  can be one of &lsquo;<samp>never</samp>&rsquo;, &lsquo;<samp>auto</samp>&rsquo;, &lsquo;<samp>always</samp>&rsquo;, and &lsquo;<samp>auto-if-env</samp>&rsquo;
--- 1798,1818 ----
  <samp>--enable-linker-build-id</samp> option is ignored.  The default is off.
  </p>
  </dd>
! <dt><span><code>--with-linker-hash-style=<var>choice</var></code></span></dt>
  <dd><p>Tells GCC to pass <samp>--hash-style=<var>choice</var></samp> option to the
  linker for all final links. <var>choice</var> can be one of
  &lsquo;<samp>sysv</samp>&rsquo;, &lsquo;<samp>gnu</samp>&rsquo;, and &lsquo;<samp>both</samp>&rsquo; where &lsquo;<samp>sysv</samp>&rsquo; is the default.
  </p>
  </dd>
! <dt><span><code>--enable-gnu-unique-object</code></span></dt>
! <dt><span><code>--disable-gnu-unique-object</code></span></dt>
  <dd><p>Tells GCC to use the gnu_unique_object relocation for C++ template
  static data members and inline function local statics.  Enabled by
  default for a toolchain with an assembler that accepts it and
  GLIBC 2.11 or above, otherwise disabled.
  </p>
  </dd>
! <dt><span><code>--with-diagnostics-color=<var>choice</var></code></span></dt>
  <dd><p>Tells GCC to use <var>choice</var> as the default for <samp>-fdiagnostics-color=</samp>
  option (if not used explicitly on the command line).  <var>choice</var>
  can be one of &lsquo;<samp>never</samp>&rsquo;, &lsquo;<samp>auto</samp>&rsquo;, &lsquo;<samp>always</samp>&rsquo;, and &lsquo;<samp>auto-if-env</samp>&rsquo;
*************** is present and non-empty in the environm
*** 1831,1837 ****
  <samp>-fdiagnostics-color=never</samp> otherwise.
  </p>
  </dd>
! <dt><code>--with-diagnostics-urls=<var>choice</var></code></dt>
  <dd><p>Tells GCC to use <var>choice</var> as the default for <samp>-fdiagnostics-urls=</samp>
  option (if not used explicitly on the command line).  <var>choice</var>
  can be one of &lsquo;<samp>never</samp>&rsquo;, &lsquo;<samp>auto</samp>&rsquo;, &lsquo;<samp>always</samp>&rsquo;, and &lsquo;<samp>auto-if-env</samp>&rsquo;
--- 1822,1828 ----
  <samp>-fdiagnostics-color=never</samp> otherwise.
  </p>
  </dd>
! <dt><span><code>--with-diagnostics-urls=<var>choice</var></code></span></dt>
  <dd><p>Tells GCC to use <var>choice</var> as the default for <samp>-fdiagnostics-urls=</samp>
  option (if not used explicitly on the command line).  <var>choice</var>
  can be one of &lsquo;<samp>never</samp>&rsquo;, &lsquo;<samp>auto</samp>&rsquo;, &lsquo;<samp>always</samp>&rsquo;, and &lsquo;<samp>auto-if-env</samp>&rsquo;
*************** or <code>TERM_URLS</code> is present and
*** 1841,1854 ****
  compiler, and <samp>-fdiagnostics-urls=never</samp> otherwise.
  </p>
  </dd>
! <dt><code>--enable-lto</code></dt>
! <dt><code>--disable-lto</code></dt>
  <dd><p>Enable support for link-time optimization (LTO).  This is enabled by
  default, and may be disabled using <samp>--disable-lto</samp>.
  </p>
  </dd>
! <dt><code>--enable-linker-plugin-configure-flags=FLAGS</code></dt>
! <dt><code>--enable-linker-plugin-flags=FLAGS</code></dt>
  <dd><p>By default, linker plugins (such as the LTO plugin) are built for the
  host system architecture.  For the case that the linker has a
  different (but run-time compatible) architecture, these flags can be
--- 1832,1845 ----
  compiler, and <samp>-fdiagnostics-urls=never</samp> otherwise.
  </p>
  </dd>
! <dt><span><code>--enable-lto</code></span></dt>
! <dt><span><code>--disable-lto</code></span></dt>
  <dd><p>Enable support for link-time optimization (LTO).  This is enabled by
  default, and may be disabled using <samp>--disable-lto</samp>.
  </p>
  </dd>
! <dt><span><code>--enable-linker-plugin-configure-flags=FLAGS</code></span></dt>
! <dt><span><code>--enable-linker-plugin-flags=FLAGS</code></span></dt>
  <dd><p>By default, linker plugins (such as the LTO plugin) are built for the
  host system architecture.  For the case that the linker has a
  different (but run-time compatible) architecture, these flags can be
*************** GNU/Linux (&lsquo;<samp>i686-pc-linux-gn
*** 1859,1873 ****
  executable on the former system), you can configure GCC as follows for
  getting compatible linker plugins:
  </p>
! <div class="smallexample">
! <pre class="smallexample">% <var>srcdir</var>/configure \
      --host=x86_64-pc-linux-gnu \
      --enable-linker-plugin-configure-flags=--host=i686-pc-linux-gnu \
      --enable-linker-plugin-flags='CC=gcc\ -m32\ -Wl,-rpath,[...]/i686-pc-linux-gnu/lib'
  </pre></div>
  
  </dd>
! <dt><code>--with-plugin-ld=<var>pathname</var></code></dt>
  <dd><p>Enable an alternate linker to be used at link-time optimization (LTO)
  link time when <samp>-fuse-linker-plugin</samp> is enabled.
  This linker should have plugin support such as gold starting with
--- 1850,1864 ----
  executable on the former system), you can configure GCC as follows for
  getting compatible linker plugins:
  </p>
! <div class="example">
! <pre class="example">% <var>srcdir</var>/configure \
      --host=x86_64-pc-linux-gnu \
      --enable-linker-plugin-configure-flags=--host=i686-pc-linux-gnu \
      --enable-linker-plugin-flags='CC=gcc\ -m32\ -Wl,-rpath,[...]/i686-pc-linux-gnu/lib'
  </pre></div>
  
  </dd>
! <dt><span><code>--with-plugin-ld=<var>pathname</var></code></span></dt>
  <dd><p>Enable an alternate linker to be used at link-time optimization (LTO)
  link time when <samp>-fuse-linker-plugin</samp> is enabled.
  This linker should have plugin support such as gold starting with
*************** version 2.20 or GNU ld starting with ver
*** 1875,1882 ****
  See <samp>-fuse-linker-plugin</samp> for details.
  </p>
  </dd>
! <dt><code>--enable-canonical-system-headers</code></dt>
! <dt><code>--disable-canonical-system-headers</code></dt>
  <dd><p>Enable system header path canonicalization for <samp>libcpp</samp>.  This can
  produce shorter header file paths in diagnostics and dependency output
  files, but these changed header paths may conflict with some compilation
--- 1866,1873 ----
  See <samp>-fuse-linker-plugin</samp> for details.
  </p>
  </dd>
! <dt><span><code>--enable-canonical-system-headers</code></span></dt>
! <dt><span><code>--disable-canonical-system-headers</code></span></dt>
  <dd><p>Enable system header path canonicalization for <samp>libcpp</samp>.  This can
  produce shorter header file paths in diagnostics and dependency output
  files, but these changed header paths may conflict with some compilation
*************** environments.  Enabled by default, and m
*** 1884,1890 ****
  <samp>--disable-canonical-system-headers</samp>.
  </p>
  </dd>
! <dt><code>--with-glibc-version=<var>major</var>.<var>minor</var></code></dt>
  <dd><p>Tell GCC that when the GNU C Library (glibc) is used on the target it
  will be version <var>major</var>.<var>minor</var> or later.  Normally this can
  be detected from the C library&rsquo;s header files, but this option may be
--- 1875,1881 ----
  <samp>--disable-canonical-system-headers</samp>.
  </p>
  </dd>
! <dt><span><code>--with-glibc-version=<var>major</var>.<var>minor</var></code></span></dt>
  <dd><p>Tell GCC that when the GNU C Library (glibc) is used on the target it
  will be version <var>major</var>.<var>minor</var> or later.  Normally this can
  be detected from the C library&rsquo;s header files, but this option may be
*************** However, such configurations may not wor
*** 1897,1919 ****
  configuration in GCC is on a per-multilib basis.
  </p>
  </dd>
! <dt><code>--enable-as-accelerator-for=<var>target</var></code></dt>
  <dd><p>Build as offload target compiler. Specify offload host triple by <var>target</var>.
  </p>
  </dd>
! <dt><code>--enable-offload-targets=<var>target1</var>[=<var>path1</var>],&hellip;,<var>targetN</var>[=<var>pathN</var>]</code></dt>
  <dd><p>Enable offloading to targets <var>target1</var>, &hellip;, <var>targetN</var>.
  Offload compilers are expected to be already installed.  Default search
  path for them is <samp><var>exec-prefix</var></samp>, but it can be changed by
  specifying paths <var>path1</var>, &hellip;, <var>pathN</var>.
  </p>
! <div class="smallexample">
! <pre class="smallexample">% <var>srcdir</var>/configure \
      --enable-offload-targets=x86_64-intelmicemul-linux-gnu=/path/to/x86_64/compiler,nvptx-none
  </pre></div>
  
  </dd>
! <dt><code>--enable-offload-defaulted</code></dt>
  <dd>
  <p>Tell GCC that configured but not installed offload compilers and libgomp
  plugins are silently ignored.  Useful for distribution compilers where
--- 1888,1910 ----
  configuration in GCC is on a per-multilib basis.
  </p>
  </dd>
! <dt><span><code>--enable-as-accelerator-for=<var>target</var></code></span></dt>
  <dd><p>Build as offload target compiler. Specify offload host triple by <var>target</var>.
  </p>
  </dd>
! <dt><span><code>--enable-offload-targets=<var>target1</var>[=<var>path1</var>],&hellip;,<var>targetN</var>[=<var>pathN</var>]</code></span></dt>
  <dd><p>Enable offloading to targets <var>target1</var>, &hellip;, <var>targetN</var>.
  Offload compilers are expected to be already installed.  Default search
  path for them is <samp><var>exec-prefix</var></samp>, but it can be changed by
  specifying paths <var>path1</var>, &hellip;, <var>pathN</var>.
  </p>
! <div class="example">
! <pre class="example">% <var>srcdir</var>/configure \
      --enable-offload-targets=x86_64-intelmicemul-linux-gnu=/path/to/x86_64/compiler,nvptx-none
  </pre></div>
  
  </dd>
! <dt><span><code>--enable-offload-defaulted</code></span></dt>
  <dd>
  <p>Tell GCC that configured but not installed offload compilers and libgomp
  plugins are silently ignored.  Useful for distribution compilers where
*************** of those optional packages should determ
*** 1922,1930 ****
  target set rather than the GCC configure-time selection.
  </p>
  </dd>
! <dt><code>--with-hsa-runtime=<var>pathname</var></code></dt>
! <dt><code>--with-hsa-runtime-include=<var>pathname</var></code></dt>
! <dt><code>--with-hsa-runtime-lib=<var>pathname</var></code></dt>
  <dd>
  <p>If you configure GCC with offloading which uses an HSA run-time such as
  AMDGCN but do not have the HSA run-time library installed in a standard
--- 1913,1921 ----
  target set rather than the GCC configure-time selection.
  </p>
  </dd>
! <dt><span><code>--with-hsa-runtime=<var>pathname</var></code></span></dt>
! <dt><span><code>--with-hsa-runtime-include=<var>pathname</var></code></span></dt>
! <dt><span><code>--with-hsa-runtime-lib=<var>pathname</var></code></span></dt>
  <dd>
  <p>If you configure GCC with offloading which uses an HSA run-time such as
  AMDGCN but do not have the HSA run-time library installed in a standard
*************** is a shorthand for
*** 1935,1942 ****
  <samp>--with-hsa-runtime-include=<var>hsainstalldir</var>/include</samp>.
  </p>
  </dd>
! <dt><code>--enable-cet</code></dt>
! <dt><code>--disable-cet</code></dt>
  <dd><p>Enable building target run-time libraries with control-flow
  instrumentation, see <samp>-fcf-protection</samp> option.  When
  <code>--enable-cet</code> is specified target libraries are configured
--- 1926,1933 ----
  <samp>--with-hsa-runtime-include=<var>hsainstalldir</var>/include</samp>.
  </p>
  </dd>
! <dt><span><code>--enable-cet</code></span></dt>
! <dt><span><code>--disable-cet</code></span></dt>
  <dd><p>Enable building target run-time libraries with control-flow
  instrumentation, see <samp>-fcf-protection</samp> option.  When
  <code>--enable-cet</code> is specified target libraries are configured
*************** otherwise.  In this case, the target lib
*** 1949,1955 ****
  additional <samp>-fcf-protection</samp> option.
  </p>
  </dd>
! <dt><code>--with-riscv-attribute=&lsquo;<samp>yes</samp>&rsquo;, &lsquo;<samp>no</samp>&rsquo; or &lsquo;<samp>default</samp>&rsquo;</code></dt>
  <dd><p>Generate RISC-V attribute by default, in order to record extra build
  information in object.
  </p>
--- 1940,1946 ----
  additional <samp>-fcf-protection</samp> option.
  </p>
  </dd>
! <dt><span><code>--with-riscv-attribute=&lsquo;<samp>yes</samp>&rsquo;, &lsquo;<samp>no</samp>&rsquo; or &lsquo;<samp>default</samp>&rsquo;</code></span></dt>
  <dd><p>Generate RISC-V attribute by default, in order to record extra build
  information in object.
  </p>
*************** information in object.
*** 1957,1964 ****
  target if target binutils supported.
  </p>
  </dd>
! <dt><code>--enable-s390-excess-float-precision</code></dt>
! <dt><code>--disable-s390-excess-float-precision</code></dt>
  <dd><p>On s390(x) targets, enable treatment of float expressions with double precision
  when in standards-compliant mode (e.g., when <code>--std=c99</code> or
  <code>-fexcess-precision=standard</code> are given).
--- 1948,1955 ----
  target if target binutils supported.
  </p>
  </dd>
! <dt><span><code>--enable-s390-excess-float-precision</code></span></dt>
! <dt><span><code>--disable-s390-excess-float-precision</code></span></dt>
  <dd><p>On s390(x) targets, enable treatment of float expressions with double precision
  when in standards-compliant mode (e.g., when <code>--std=c99</code> or
  <code>-fexcess-precision=standard</code> are given).
*************** GCC follows and enables the option. For
*** 1969,1977 ****
  disabled.
  </p>
  </dd>
! <dt><code>--with-zstd=<var>pathname</var></code></dt>
! <dt><code>--with-zstd-include=<var>pathname</var></code></dt>
! <dt><code>--with-zstd-lib=<var>pathname</var></code></dt>
  <dd><p>If you do not have the <code>zstd</code> library installed in a standard
  location and you want to build GCC, you can explicitly specify the
  directory where it is installed (&lsquo;<samp>--with-zstd=<var>zstdinstalldir</var></samp>&rsquo;).
--- 1960,1968 ----
  disabled.
  </p>
  </dd>
! <dt><span><code>--with-zstd=<var>pathname</var></code></span></dt>
! <dt><span><code>--with-zstd-include=<var>pathname</var></code></span></dt>
! <dt><span><code>--with-zstd-lib=<var>pathname</var></code></span></dt>
  <dd><p>If you do not have the <code>zstd</code> library installed in a standard
  location and you want to build GCC, you can explicitly specify the
  directory where it is installed (&lsquo;<samp>--with-zstd=<var>zstdinstalldir</var></samp>&rsquo;).
*************** a cross compiler, they will not be used
*** 1986,2003 ****
  </p></dd>
  </dl>
  
! <a name="Cross-Compiler-Specific-Options"></a>
! <h4 class="subheading">Cross-Compiler-Specific Options</h4>
  <p>The following options only apply to building cross compilers.
  </p>
  <dl compact="compact">
! <dt><code>--with-toolexeclibdir=<var>dir</var></code></dt>
  <dd><p>Specify the installation directory for libraries built with a cross compiler.
  The default is <samp>${gcc_tooldir}/lib</samp>.
  </p>
  </dd>
! <dt><code>--with-sysroot</code></dt>
! <dt><code>--with-sysroot=<var>dir</var></code></dt>
  <dd><p>Tells GCC to consider <var>dir</var> as the root of a tree that contains
  (a subset of) the root filesystem of the target operating system.
  Target system headers, libraries and run-time object files will be
--- 1977,1993 ----
  </p></dd>
  </dl>
  
! <span id="Cross-Compiler-Specific-Options"></span><h4 class="subheading">Cross-Compiler-Specific Options</h4>
  <p>The following options only apply to building cross compilers.
  </p>
  <dl compact="compact">
! <dt><span><code>--with-toolexeclibdir=<var>dir</var></code></span></dt>
  <dd><p>Specify the installation directory for libraries built with a cross compiler.
  The default is <samp>${gcc_tooldir}/lib</samp>.
  </p>
  </dd>
! <dt><span><code>--with-sysroot</code></span></dt>
! <dt><span><code>--with-sysroot=<var>dir</var></code></span></dt>
  <dd><p>Tells GCC to consider <var>dir</var> as the root of a tree that contains
  (a subset of) the root filesystem of the target operating system.
  Target system headers, libraries and run-time object files will be
*************** option then the compiler will search tha
*** 2021,2028 ****
  native system headers rather than the default <samp>/usr/include</samp>.
  </p>
  </dd>
! <dt><code>--with-build-sysroot</code></dt>
! <dt><code>--with-build-sysroot=<var>dir</var></code></dt>
  <dd><p>Tells GCC to consider <var>dir</var> as the system root (see
  <samp>--with-sysroot</samp>) while building target libraries, instead of
  the directory specified with <samp>--with-sysroot</samp>.  This option is
--- 2011,2018 ----
  native system headers rather than the default <samp>/usr/include</samp>.
  </p>
  </dd>
! <dt><span><code>--with-build-sysroot</code></span></dt>
! <dt><span><code>--with-build-sysroot=<var>dir</var></code></span></dt>
  <dd><p>Tells GCC to consider <var>dir</var> as the system root (see
  <samp>--with-sysroot</samp>) while building target libraries, instead of
  the directory specified with <samp>--with-sysroot</samp>.  This option is
*************** option then the compiler will search tha
*** 2040,2047 ****
  native system headers rather than the default <samp>/usr/include</samp>.
  </p>
  </dd>
! <dt><code>--with-headers</code></dt>
! <dt><code>--with-headers=<var>dir</var></code></dt>
  <dd><p>Deprecated in favor of <samp>--with-sysroot</samp>.
  Specifies that target headers are available when building a cross compiler.
  The <var>dir</var> argument specifies a directory which has the target include
--- 2030,2037 ----
  native system headers rather than the default <samp>/usr/include</samp>.
  </p>
  </dd>
! <dt><span><code>--with-headers</code></span></dt>
! <dt><span><code>--with-headers=<var>dir</var></code></span></dt>
  <dd><p>Deprecated in favor of <samp>--with-sysroot</samp>.
  Specifies that target headers are available when building a cross compiler.
  The <var>dir</var> argument specifies a directory which has the target include
*************** pre-exist, the <var>dir</var> argument m
*** 2053,2066 ****
  will be run on these files to make them compatible with GCC.
  </p>
  </dd>
! <dt><code>--without-headers</code></dt>
  <dd><p>Tells GCC not use any target headers from a libc when building a cross
  compiler.  When crossing to GNU/Linux, you need the headers so GCC
  can build the exception handling for libgcc.
  </p>
  </dd>
! <dt><code>--with-libs</code></dt>
! <dt><code>--with-libs=&quot;<var>dir1</var> <var>dir2</var> &hellip; <var>dirN</var>&quot;</code></dt>
  <dd><p>Deprecated in favor of <samp>--with-sysroot</samp>.
  Specifies a list of directories which contain the target runtime
  libraries.  These libraries will be copied into the <samp>gcc</samp> install
--- 2043,2056 ----
  will be run on these files to make them compatible with GCC.
  </p>
  </dd>
! <dt><span><code>--without-headers</code></span></dt>
  <dd><p>Tells GCC not use any target headers from a libc when building a cross
  compiler.  When crossing to GNU/Linux, you need the headers so GCC
  can build the exception handling for libgcc.
  </p>
  </dd>
! <dt><span><code>--with-libs</code></span></dt>
! <dt><span><code>--with-libs=&quot;<var>dir1</var> <var>dir2</var> &hellip; <var>dirN</var>&quot;</code></span></dt>
  <dd><p>Deprecated in favor of <samp>--with-sysroot</samp>.
  Specifies a list of directories which contain the target runtime
  libraries.  These libraries will be copied into the <samp>gcc</samp> install
*************** directory.  If the directory list is omi
*** 2068,2074 ****
  effect.
  </p>
  </dd>
! <dt><code>--with-newlib</code></dt>
  <dd><p>Specifies that &lsquo;<samp>newlib</samp>&rsquo; is
  being used as the target C library.  This causes <code>__eprintf</code> to be
  omitted from <samp>libgcc.a</samp> on the assumption that it will be provided by
--- 2058,2064 ----
  effect.
  </p>
  </dd>
! <dt><span><code>--with-newlib</code></span></dt>
  <dd><p>Specifies that &lsquo;<samp>newlib</samp>&rsquo; is
  being used as the target C library.  This causes <code>__eprintf</code> to be
  omitted from <samp>libgcc.a</samp> on the assumption that it will be provided by
*************** omitted from <samp>libgcc.a</samp> on th
*** 2076,2082 ****
  </p>
  <a name="avr"></a>
  </dd>
! <dt><code>--with-avrlibc</code></dt>
  <dd><p>Only supported for the AVR target. Specifies that &lsquo;<samp>AVR-Libc</samp>&rsquo; is
  being used as the target C&nbsp; library.  This causes float support
  functions like <code>__addsf3</code> to be omitted from <samp>libgcc.a</samp> on
--- 2066,2072 ----
  </p>
  <a name="avr"></a>
  </dd>
! <dt><span><code>--with-avrlibc</code></span></dt>
  <dd><p>Only supported for the AVR target. Specifies that &lsquo;<samp>AVR-Libc</samp>&rsquo; is
  being used as the target C&nbsp; library.  This causes float support
  functions like <code>__addsf3</code> to be omitted from <samp>libgcc.a</samp> on
*************** RTEMS configurations, which currently us
*** 2087,2094 ****
  supported since version 4.7.2 and is the default in 4.8.0 and newer.
  </p>
  </dd>
! <dt><code>--with-double={32|64|32,64|64,32}</code></dt>
! <dt><code>--with-long-double={32|64|32,64|64,32|double}</code></dt>
  <dd><p>Only supported for the AVR target since version&nbsp;10.
  Specify the default layout available for the C/C++ &lsquo;<samp>double</samp>&rsquo;
  and &lsquo;<samp>long double</samp>&rsquo; type, respectively. The following rules apply:
--- 2077,2084 ----
  supported since version 4.7.2 and is the default in 4.8.0 and newer.
  </p>
  </dd>
! <dt><span><code>--with-double={32|64|32,64|64,32}</code></span></dt>
! <dt><span><code>--with-long-double={32|64|32,64|64,32|double}</code></span></dt>
  <dd><p>Only supported for the AVR target since version&nbsp;10.
  Specify the default layout available for the C/C++ &lsquo;<samp>double</samp>&rsquo;
  and &lsquo;<samp>long double</samp>&rsquo; type, respectively. The following rules apply:
*************** that &lsquo;<samp>long double</samp>&rsq
*** 2115,2121 ****
  32&nbsp;bits wide.
  </p>
  </dd>
! <dt><code>--with-double-comparison={tristate|bool|libf7}</code></dt>
  <dd><p>Only supported for the AVR target since version&nbsp;10.
  Specify what result format is returned by library functions that
  compare 64-bit floating point values (<code>DFmode</code>).
--- 2105,2111 ----
  32&nbsp;bits wide.
  </p>
  </dd>
! <dt><span><code>--with-double-comparison={tristate|bool|libf7}</code></span></dt>
  <dd><p>Only supported for the AVR target since version&nbsp;10.
  Specify what result format is returned by library functions that
  compare 64-bit floating point values (<code>DFmode</code>).
*************** The GCC default is &lsquo;<samp>tristate
*** 2123,2129 ****
  implementation returns a boolean instead, set it to &lsquo;<samp>bool</samp>&rsquo;.
  </p>
  </dd>
! <dt><code>--with-libf7={libgcc|math|math-symbols|no}</code></dt>
  <dd><p>Only supported for the AVR target since version&nbsp;10.
  Specify to which degree code from LibF7 is included in libgcc.
  LibF7 is an ad-hoc, AVR-specific, 64-bit floating point emulation
--- 2113,2119 ----
  implementation returns a boolean instead, set it to &lsquo;<samp>bool</samp>&rsquo;.
  </p>
  </dd>
! <dt><span><code>--with-libf7={libgcc|math|math-symbols|no}</code></span></dt>
  <dd><p>Only supported for the AVR target since version&nbsp;10.
  Specify to which degree code from LibF7 is included in libgcc.
  LibF7 is an ad-hoc, AVR-specific, 64-bit floating point emulation
*************** from elsewhere.  This option sets <samp>
*** 2139,2151 ****
  to &lsquo;<samp>bool</samp>&rsquo;.
  </p>
  </dd>
! <dt><code>--with-nds32-lib=<var>library</var></code></dt>
  <dd><p>Specifies that <var>library</var> setting is used for building <samp>libgcc.a</samp>.
  Currently, the valid <var>library</var> is &lsquo;<samp>newlib</samp>&rsquo; or &lsquo;<samp>mculib</samp>&rsquo;.
  This option is only supported for the NDS32 target.
  </p>
  </dd>
! <dt><code>--with-build-time-tools=<var>dir</var></code></dt>
  <dd><p>Specifies where to find the set of target tools (assembler, linker, etc.)
  that will be used while building GCC itself.  This option can be useful
  if the directory layouts are different between the system you are building
--- 2129,2141 ----
  to &lsquo;<samp>bool</samp>&rsquo;.
  </p>
  </dd>
! <dt><span><code>--with-nds32-lib=<var>library</var></code></span></dt>
  <dd><p>Specifies that <var>library</var> setting is used for building <samp>libgcc.a</samp>.
  Currently, the valid <var>library</var> is &lsquo;<samp>newlib</samp>&rsquo; or &lsquo;<samp>mculib</samp>&rsquo;.
  This option is only supported for the NDS32 target.
  </p>
  </dd>
! <dt><span><code>--with-build-time-tools=<var>dir</var></code></span></dt>
  <dd><p>Specifies where to find the set of target tools (assembler, linker, etc.)
  that will be used while building GCC itself.  This option can be useful
  if the directory layouts are different between the system you are building
*************** tools.
*** 2164,2171 ****
  </p></dd>
  </dl>
  
! <a name="Overriding-configure-test-results"></a>
! <h4 class="subsubheading">Overriding <code>configure</code> test results</h4>
  
  <p>Sometimes, it might be necessary to override the result of some
  <code>configure</code> test, for example in order to ease porting to a new
--- 2154,2160 ----
  </p></dd>
  </dl>
  
! <span id="Overriding-configure-test-results"></span><h4 class="subsubheading">Overriding <code>configure</code> test results</h4>
  
  <p>Sometimes, it might be necessary to override the result of some
  <code>configure</code> test, for example in order to ease porting to a new
*************** system or work around a bug in a test.
*** 2173,2193 ****
  script provides three variables for this:
  </p>
  <dl compact="compact">
! <dt><code>build_configargs</code></dt>
! <dd><a name="index-build_005fconfigargs"></a>
! <p>The contents of this variable is passed to all build <code>configure</code>
  scripts.
  </p>
  </dd>
! <dt><code>host_configargs</code></dt>
! <dd><a name="index-host_005fconfigargs"></a>
! <p>The contents of this variable is passed to all host <code>configure</code>
  scripts.
  </p>
  </dd>
! <dt><code>target_configargs</code></dt>
! <dd><a name="index-target_005fconfigargs"></a>
! <p>The contents of this variable is passed to all target <code>configure</code>
  scripts.
  </p>
  </dd>
--- 2162,2179 ----
  script provides three variables for this:
  </p>
  <dl compact="compact">
! <dt id='index-build_005fconfigargs'><span><code>build_configargs</code><a href='#index-build_005fconfigargs' class='copiable-anchor'> &para;</a></span></dt>
! <dd><p>The contents of this variable is passed to all build <code>configure</code>
  scripts.
  </p>
  </dd>
! <dt id='index-host_005fconfigargs'><span><code>host_configargs</code><a href='#index-host_005fconfigargs' class='copiable-anchor'> &para;</a></span></dt>
! <dd><p>The contents of this variable is passed to all host <code>configure</code>
  scripts.
  </p>
  </dd>
! <dt id='index-target_005fconfigargs'><span><code>target_configargs</code><a href='#index-target_005fconfigargs' class='copiable-anchor'> &para;</a></span></dt>
! <dd><p>The contents of this variable is passed to all target <code>configure</code>
  scripts.
  </p>
  </dd>
*************** scripts.
*** 2197,2209 ****
  overrides, you can pass a setting for <code>CONFIG_SITE</code> and set
  variables in the site file.
  </p>
! <a name="Objective-C-Specific-Options"></a>
! <h4 class="subheading">Objective-C-Specific Options</h4>
  
  <p>The following options apply to the build of the Objective-C runtime library.
  </p>
  <dl compact="compact">
! <dt><code>--enable-objc-gc</code></dt>
  <dd><p>Specify that an additional variant of the GNU Objective-C runtime library
  is built, using an external build of the Boehm-Demers-Weiser garbage
  collector (<a href="https://www.hboehm.info/gc/">https://www.hboehm.info/gc/</a>).  This library needs to be
--- 2183,2194 ----
  overrides, you can pass a setting for <code>CONFIG_SITE</code> and set
  variables in the site file.
  </p>
! <span id="Objective-C-Specific-Options"></span><h4 class="subheading">Objective-C-Specific Options</h4>
  
  <p>The following options apply to the build of the Objective-C runtime library.
  </p>
  <dl compact="compact">
! <dt><span><code>--enable-objc-gc</code></span></dt>
  <dd><p>Specify that an additional variant of the GNU Objective-C runtime library
  is built, using an external build of the Boehm-Demers-Weiser garbage
  collector (<a href="https://www.hboehm.info/gc/">https://www.hboehm.info/gc/</a>).  This library needs to be
*************** additional runtime library is skipped wh
*** 2213,2221 ****
  continues.
  </p>
  </dd>
! <dt><code>--with-target-bdw-gc=<var>list</var></code></dt>
! <dt><code>--with-target-bdw-gc-include=<var>list</var></code></dt>
! <dt><code>--with-target-bdw-gc-lib=<var>list</var></code></dt>
  <dd><p>Specify search directories for the garbage collector header files and
  libraries. <var>list</var> is a comma separated list of key value pairs of the
  form &lsquo;<samp><var>multilibdir</var>=<var>path</var></samp>&rsquo;, where the default multilib key
--- 2198,2206 ----
  continues.
  </p>
  </dd>
! <dt><span><code>--with-target-bdw-gc=<var>list</var></code></span></dt>
! <dt><span><code>--with-target-bdw-gc-include=<var>list</var></code></span></dt>
! <dt><span><code>--with-target-bdw-gc-lib=<var>list</var></code></span></dt>
  <dd><p>Specify search directories for the garbage collector header files and
  libraries. <var>list</var> is a comma separated list of key value pairs of the
  form &lsquo;<samp><var>multilibdir</var>=<var>path</var></samp>&rsquo;, where the default multilib key
*************** default locations.
*** 2234,2248 ****
  </p></dd>
  </dl>
  
! <a name="D-Specific-Options"></a>
! <h4 class="subheading">D-Specific Options</h4>
  
  <p>The following options apply to the build of the D runtime library.
  </p>
  <dl compact="compact">
! <dt><code>--enable-libphobos-checking</code></dt>
! <dt><code>--disable-libphobos-checking</code></dt>
! <dt><code>--enable-libphobos-checking=<var>list</var></code></dt>
  <dd><p>This option controls whether run-time checks and contracts are compiled into
  the D runtime library.  When the option is not specified, the library is built
  with &lsquo;<samp>release</samp>&rsquo; checking.  When the option is specified without a
--- 2219,2232 ----
  </p></dd>
  </dl>
  
! <span id="D-Specific-Options"></span><h4 class="subheading">D-Specific Options</h4>
  
  <p>The following options apply to the build of the D runtime library.
  </p>
  <dl compact="compact">
! <dt><span><code>--enable-libphobos-checking</code></span></dt>
! <dt><span><code>--disable-libphobos-checking</code></span></dt>
! <dt><span><code>--enable-libphobos-checking=<var>list</var></code></span></dt>
  <dd><p>This option controls whether run-time checks and contracts are compiled into
  the D runtime library.  When the option is not specified, the library is built
  with &lsquo;<samp>release</samp>&rsquo; checking.  When the option is specified without a
*************** libphobos with <samp>-fno-release</samp>
*** 2259,2266 ****
  with an extra option <samp>-fassert</samp>).
  </p>
  </dd>
! <dt><code>--with-libphobos-druntime-only</code></dt>
! <dt><code>--with-libphobos-druntime-only=<var>choice</var></code></dt>
  <dd><p>Specify whether to build only the core D runtime library (druntime), or both
  the core and standard library (phobos) into libphobos.  This is useful for
  targets that have full support in druntime, but no or incomplete support
--- 2243,2250 ----
  with an extra option <samp>-fassert</samp>).
  </p>
  </dd>
! <dt><span><code>--with-libphobos-druntime-only</code></span></dt>
! <dt><span><code>--with-libphobos-druntime-only=<var>choice</var></code></span></dt>
  <dd><p>Specify whether to build only the core D runtime library (druntime), or both
  the core and standard library (phobos) into libphobos.  This is useful for
  targets that have full support in druntime, but no or incomplete support
*************** When the option is specified without a <
*** 2273,2279 ****
  &lsquo;<samp>--with-libphobos-druntime-only=yes</samp>&rsquo;.
  </p>
  </dd>
! <dt><code>--with-target-system-zlib</code></dt>
  <dd><p>Use installed &lsquo;<samp>zlib</samp>&rsquo; rather than that included with GCC.  This needs
  to be available for each multilib variant, unless configured with
  <samp>--with-target-system-zlib=&lsquo;<samp>auto</samp>&rsquo;</samp> in which case the GCC&nbsp;included
--- 2257,2263 ----
  &lsquo;<samp>--with-libphobos-druntime-only=yes</samp>&rsquo;.
  </p>
  </dd>
! <dt><span><code>--with-target-system-zlib</code></span></dt>
  <dd><p>Use installed &lsquo;<samp>zlib</samp>&rsquo; rather than that included with GCC.  This needs
  to be available for each multilib variant, unless configured with
  <samp>--with-target-system-zlib=&lsquo;<samp>auto</samp>&rsquo;</samp> in which case the GCC&nbsp;included
diff -Nrcpad gcc-12.3.0/INSTALL/download.html gcc-12.4.0/INSTALL/download.html
*** gcc-12.3.0/INSTALL/download.html	Mon May  8 12:15:26 2023
--- gcc-12.4.0/INSTALL/download.html	Thu Jun 20 08:10:30 2024
***************
*** 1,5 ****
--- 1,8 ----
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
+ <!-- Created by GNU Texinfo 6.8, https://www.gnu.org/software/texinfo/ -->
+ <head>
+ <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <!-- Copyright (C) 1988-2022 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
*************** A GNU Manual
*** 19,27 ****
  You have freedom to copy and modify this GNU Manual, like GNU
       software.  Copies published by the Free Software Foundation raise
       funds for GNU development. -->
- <!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
- <head>
- <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <title>Downloading GCC</title>
  
  <meta name="description" content="Downloading GCC">
--- 22,27 ----
*************** You have freedom to copy and modify this
*** 29,58 ****
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
  <style type="text/css">
  <!--
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
- blockquote.smallindentedblock {margin-right: 0em; font-size: smaller}
- blockquote.smallquotation {font-size: smaller}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
- div.lisp {margin-left: 3.2em}
- div.smalldisplay {margin-left: 3.2em}
- div.smallexample {margin-left: 3.2em}
- div.smalllisp {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
- pre.smalldisplay {font-family: inherit; font-size: smaller}
- pre.smallexample {font-size: smaller}
- pre.smallformat {font-family: inherit; font-size: smaller}
- pre.smalllisp {font-size: smaller}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
  ul.no-bullet {list-style: none}
  -->
  </style>
--- 29,52 ----
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
+ <meta name="viewport" content="width=device-width,initial-scale=1">
+ 
  <style type="text/css">
  <!--
+ a.copiable-anchor {visibility: hidden; text-decoration: none; line-height: 0em}
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
+ span:hover a.copiable-anchor {visibility: visible}
  ul.no-bullet {list-style: none}
  -->
  </style>
*************** ul.no-bullet {list-style: none}
*** 80,87 ****
  
  
  
! <a name="index-Downloading-GCC"></a>
! <a name="index-Downloading-the-Source"></a>
  
  <p>GCC is distributed via <a href="https://gcc.gnu.org/git.html">git</a> and via
  HTTPS as tarballs compressed with <code>gzip</code> or <code>bzip2</code>.
--- 74,81 ----
  
  
  
! <span id="index-Downloading-GCC"></span>
! <span id="index-Downloading-the-Source"></span>
  
  <p>GCC is distributed via <a href="https://gcc.gnu.org/git.html">git</a> and via
  HTTPS as tarballs compressed with <code>gzip</code> or <code>bzip2</code>.
diff -Nrcpad gcc-12.3.0/INSTALL/finalinstall.html gcc-12.4.0/INSTALL/finalinstall.html
*** gcc-12.3.0/INSTALL/finalinstall.html	Mon May  8 12:15:27 2023
--- gcc-12.4.0/INSTALL/finalinstall.html	Thu Jun 20 08:10:31 2024
***************
*** 1,5 ****
--- 1,8 ----
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
+ <!-- Created by GNU Texinfo 6.8, https://www.gnu.org/software/texinfo/ -->
+ <head>
+ <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <!-- Copyright (C) 1988-2022 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
*************** A GNU Manual
*** 19,27 ****
  You have freedom to copy and modify this GNU Manual, like GNU
       software.  Copies published by the Free Software Foundation raise
       funds for GNU development. -->
- <!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
- <head>
- <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <title>Installing GCC: Final installation</title>
  
  <meta name="description" content="Installing GCC: Final installation">
--- 22,27 ----
*************** You have freedom to copy and modify this
*** 29,58 ****
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
  <style type="text/css">
  <!--
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
- blockquote.smallindentedblock {margin-right: 0em; font-size: smaller}
- blockquote.smallquotation {font-size: smaller}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
- div.lisp {margin-left: 3.2em}
- div.smalldisplay {margin-left: 3.2em}
- div.smallexample {margin-left: 3.2em}
- div.smalllisp {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
- pre.smalldisplay {font-family: inherit; font-size: smaller}
- pre.smallexample {font-size: smaller}
- pre.smallformat {font-family: inherit; font-size: smaller}
- pre.smalllisp {font-size: smaller}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
  ul.no-bullet {list-style: none}
  -->
  </style>
--- 29,52 ----
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
+ <meta name="viewport" content="width=device-width,initial-scale=1">
+ 
  <style type="text/css">
  <!--
+ a.copiable-anchor {visibility: hidden; text-decoration: none; line-height: 0em}
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
+ span:hover a.copiable-anchor {visibility: visible}
  ul.no-bullet {list-style: none}
  -->
  </style>
*************** ul.no-bullet {list-style: none}
*** 86,93 ****
  
  
  <p>Now that GCC has been built (and optionally tested), you can install it with
! </p><div class="smallexample">
! <pre class="smallexample">cd <var>objdir</var> &amp;&amp; make install
  </pre></div>
  
  <p>We strongly recommend to install into a target directory where there is
--- 80,87 ----
  
  
  <p>Now that GCC has been built (and optionally tested), you can install it with
! </p><div class="example">
! <pre class="example">cd <var>objdir</var> &amp;&amp; make install
  </pre></div>
  
  <p>We strongly recommend to install into a target directory where there is
*************** binutils, including assembler and linker
*** 119,126 ****
  <p>Installation into a temporary staging area or into a <code>chroot</code>
  jail can be achieved with the command
  </p>
! <div class="smallexample">
! <pre class="smallexample">make DESTDIR=<var>path-to-rootdir</var> install
  </pre></div>
  
  <p>where <var>path-to-rootdir</var> is the absolute path of
--- 113,120 ----
  <p>Installation into a temporary staging area or into a <code>chroot</code>
  jail can be achieved with the command
  </p>
! <div class="example">
! <pre class="example">make DESTDIR=<var>path-to-rootdir</var> install
  </pre></div>
  
  <p>where <var>path-to-rootdir</var> is the absolute path of
*************** using the <code>DESTDIR</code> feature.
*** 139,146 ****
  </p>
  <p>You can install stripped programs and libraries with
  </p>
! <div class="smallexample">
! <pre class="smallexample">make install-strip
  </pre></div>
  
  <p>If you are bootstrapping a released version of GCC then please
--- 133,140 ----
  </p>
  <p>You can install stripped programs and libraries with
  </p>
! <div class="example">
! <pre class="example">make install-strip
  </pre></div>
  
  <p>If you are bootstrapping a released version of GCC then please
diff -Nrcpad gcc-12.3.0/INSTALL/gfdl.html gcc-12.4.0/INSTALL/gfdl.html
*** gcc-12.3.0/INSTALL/gfdl.html	Mon May  8 12:15:27 2023
--- gcc-12.4.0/INSTALL/gfdl.html	Thu Jun 20 08:10:31 2024
***************
*** 1,5 ****
--- 1,8 ----
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
+ <!-- Created by GNU Texinfo 6.8, https://www.gnu.org/software/texinfo/ -->
+ <head>
+ <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <!-- Copyright (C) 1988-2022 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
*************** A GNU Manual
*** 19,27 ****
  You have freedom to copy and modify this GNU Manual, like GNU
       software.  Copies published by the Free Software Foundation raise
       funds for GNU development. -->
- <!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
- <head>
- <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <title>Installing GCC: GNU Free Documentation License</title>
  
  <meta name="description" content="Installing GCC: GNU Free Documentation License">
--- 22,27 ----
*************** You have freedom to copy and modify this
*** 29,58 ****
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
  <style type="text/css">
  <!--
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
- blockquote.smallindentedblock {margin-right: 0em; font-size: smaller}
- blockquote.smallquotation {font-size: smaller}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
- div.lisp {margin-left: 3.2em}
- div.smalldisplay {margin-left: 3.2em}
- div.smallexample {margin-left: 3.2em}
- div.smalllisp {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
- pre.smalldisplay {font-family: inherit; font-size: smaller}
- pre.smallexample {font-size: smaller}
- pre.smallformat {font-family: inherit; font-size: smaller}
- pre.smalllisp {font-size: smaller}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
  ul.no-bullet {list-style: none}
  -->
  </style>
--- 29,52 ----
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
+ <meta name="viewport" content="width=device-width,initial-scale=1">
+ 
  <style type="text/css">
  <!--
+ a.copiable-anchor {visibility: hidden; text-decoration: none; line-height: 0em}
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
+ span:hover a.copiable-anchor {visibility: visible}
  ul.no-bullet {list-style: none}
  -->
  </style>
*************** ul.no-bullet {list-style: none}
*** 89,95 ****
  
  <h1 align="center">Installing GCC: GNU Free Documentation License</h1>
  
! <a name="index-FDL_002c-GNU-Free-Documentation-License"></a>
  <div align="center">Version 1.3, 3 November 2008
  </div>
  <div class="display">
--- 83,89 ----
  
  <h1 align="center">Installing GCC: GNU Free Documentation License</h1>
  
! <span id="index-FDL_002c-GNU-Free-Documentation-License"></span>
  <div align="center">Version 1.3, 3 November 2008
  </div>
  <div class="display">
*************** provided the MMC is eligible for relicen
*** 522,536 ****
  </p>
  </li></ol>
  
! <a name="ADDENDUM_003a-How-to-use-this-License-for-your-documents"></a>
  <h3 class="unnumberedsec">ADDENDUM: How to use this License for your documents</h3>
  
  <p>To use this License in a document you have written, include a copy of
  the License in the document and put the following copyright and
  license notices just after the title page:
  </p>
! <div class="smallexample">
! <pre class="smallexample">  Copyright (C)  <var>year</var>  <var>your name</var>.
    Permission is granted to copy, distribute and/or modify this document
    under the terms of the GNU Free Documentation License, Version 1.3
    or any later version published by the Free Software Foundation;
--- 516,530 ----
  </p>
  </li></ol>
  
! <div class="unnumberedsec" id="ADDENDUM_003a-How-to-use-this-License-for-your-documents">
  <h3 class="unnumberedsec">ADDENDUM: How to use this License for your documents</h3>
  
  <p>To use this License in a document you have written, include a copy of
  the License in the document and put the following copyright and
  license notices just after the title page:
  </p>
! <div class="example">
! <pre class="example">  Copyright (C)  <var>year</var>  <var>your name</var>.
    Permission is granted to copy, distribute and/or modify this document
    under the terms of the GNU Free Documentation License, Version 1.3
    or any later version published by the Free Software Foundation;
*************** license notices just after the title pag
*** 542,549 ****
  <p>If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts,
  replace the &ldquo;with...Texts.&rdquo; line with this:
  </p>
! <div class="smallexample">
! <pre class="smallexample">    with the Invariant Sections being <var>list their titles</var>, with
      the Front-Cover Texts being <var>list</var>, and with the Back-Cover Texts
      being <var>list</var>.
  </pre></div>
--- 536,543 ----
  <p>If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts,
  replace the &ldquo;with...Texts.&rdquo; line with this:
  </p>
! <div class="example">
! <pre class="example">    with the Invariant Sections being <var>list their titles</var>, with
      the Front-Cover Texts being <var>list</var>, and with the Back-Cover Texts
      being <var>list</var>.
  </pre></div>
*************** to permit their use in free software.
*** 563,569 ****
  <p><a href="./index.html">Return to the GCC Installation page</a>
  </p>
  
! <hr>
  
  
  
--- 557,563 ----
  <p><a href="./index.html">Return to the GCC Installation page</a>
  </p>
  
! <hr></div>
  
  
  
diff -Nrcpad gcc-12.3.0/INSTALL/index.html gcc-12.4.0/INSTALL/index.html
*** gcc-12.3.0/INSTALL/index.html	Mon May  8 12:15:25 2023
--- gcc-12.4.0/INSTALL/index.html	Thu Jun 20 08:10:29 2024
***************
*** 1,5 ****
--- 1,8 ----
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
+ <!-- Created by GNU Texinfo 6.8, https://www.gnu.org/software/texinfo/ -->
+ <head>
+ <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <!-- Copyright (C) 1988-2022 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
*************** A GNU Manual
*** 19,27 ****
  You have freedom to copy and modify this GNU Manual, like GNU
       software.  Copies published by the Free Software Foundation raise
       funds for GNU development. -->
- <!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
- <head>
- <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <title>Installing GCC</title>
  
  <meta name="description" content="Installing GCC">
--- 22,27 ----
*************** You have freedom to copy and modify this
*** 29,58 ****
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
  <style type="text/css">
  <!--
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
- blockquote.smallindentedblock {margin-right: 0em; font-size: smaller}
- blockquote.smallquotation {font-size: smaller}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
- div.lisp {margin-left: 3.2em}
- div.smalldisplay {margin-left: 3.2em}
- div.smallexample {margin-left: 3.2em}
- div.smalllisp {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
- pre.smalldisplay {font-family: inherit; font-size: smaller}
- pre.smallexample {font-size: smaller}
- pre.smallformat {font-family: inherit; font-size: smaller}
- pre.smalllisp {font-size: smaller}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
  ul.no-bullet {list-style: none}
  -->
  </style>
--- 29,52 ----
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
+ <meta name="viewport" content="width=device-width,initial-scale=1">
+ 
  <style type="text/css">
  <!--
+ a.copiable-anchor {visibility: hidden; text-decoration: none; line-height: 0em}
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
+ span:hover a.copiable-anchor {visibility: visible}
  ul.no-bullet {list-style: none}
  -->
  </style>
*************** Free Documentation License</a>&rdquo;.
*** 145,151 ****
  
  
  
- 
  
  
  
--- 139,144 ----
diff -Nrcpad gcc-12.3.0/INSTALL/prerequisites.html gcc-12.4.0/INSTALL/prerequisites.html
*** gcc-12.3.0/INSTALL/prerequisites.html	Mon May  8 12:15:26 2023
--- gcc-12.4.0/INSTALL/prerequisites.html	Thu Jun 20 08:10:30 2024
***************
*** 1,5 ****
--- 1,8 ----
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
+ <!-- Created by GNU Texinfo 6.8, https://www.gnu.org/software/texinfo/ -->
+ <head>
+ <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <!-- Copyright (C) 1988-2022 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
*************** A GNU Manual
*** 19,27 ****
  You have freedom to copy and modify this GNU Manual, like GNU
       software.  Copies published by the Free Software Foundation raise
       funds for GNU development. -->
- <!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
- <head>
- <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <title>Prerequisites for GCC</title>
  
  <meta name="description" content="Prerequisites for GCC">
--- 22,27 ----
*************** You have freedom to copy and modify this
*** 29,58 ****
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
  <style type="text/css">
  <!--
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
- blockquote.smallindentedblock {margin-right: 0em; font-size: smaller}
- blockquote.smallquotation {font-size: smaller}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
- div.lisp {margin-left: 3.2em}
- div.smalldisplay {margin-left: 3.2em}
- div.smallexample {margin-left: 3.2em}
- div.smalllisp {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
- pre.smalldisplay {font-family: inherit; font-size: smaller}
- pre.smallexample {font-size: smaller}
- pre.smallformat {font-family: inherit; font-size: smaller}
- pre.smalllisp {font-size: smaller}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
  ul.no-bullet {list-style: none}
  -->
  </style>
--- 29,52 ----
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
+ <meta name="viewport" content="width=device-width,initial-scale=1">
+ 
  <style type="text/css">
  <!--
+ a.copiable-anchor {visibility: hidden; text-decoration: none; line-height: 0em}
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
+ span:hover a.copiable-anchor {visibility: visible}
  ul.no-bullet {list-style: none}
  -->
  </style>
*************** ul.no-bullet {list-style: none}
*** 79,94 ****
  
  
  
! <a name="index-Prerequisites"></a>
  
  <p>GCC requires that various tools and packages be available for use in the
  build procedure.  Modifying GCC sources requires additional tools
  described below.
  </p>
! <a name="Tools_002fpackages-necessary-for-building-GCC"></a>
! <h3 class="heading">Tools/packages necessary for building GCC</h3>
  <dl compact="compact">
! <dt>ISO C++11 compiler</dt>
  <dd><p>Necessary to bootstrap GCC.  GCC 4.8.3 or newer has sufficient
  support for used C++11 features, with earlier GCC versions you
  might run into implementation bugs.
--- 73,87 ----
  
  
  
! <span id="index-Prerequisites"></span>
  
  <p>GCC requires that various tools and packages be available for use in the
  build procedure.  Modifying GCC sources requires additional tools
  described below.
  </p>
! <span id="Tools_002fpackages-necessary-for-building-GCC"></span><h3 class="heading">Tools/packages necessary for building GCC</h3>
  <dl compact="compact">
! <dt><span>ISO C++11 compiler</span></dt>
  <dd><p>Necessary to bootstrap GCC.  GCC 4.8.3 or newer has sufficient
  support for used C++11 features, with earlier GCC versions you
  might run into implementation bugs.
*************** GCC binary (version 4.8.3 or later) beca
*** 104,110 ****
  frontends other than C might use GCC extensions.
  </p>
  </dd>
! <dt>C standard library and headers</dt>
  <dd>
  <p>In order to build GCC, the C standard library and headers must be present
  for all target variants for which target libraries will be built (and not
--- 97,103 ----
  frontends other than C might use GCC extensions.
  </p>
  </dd>
! <dt><span>C standard library and headers</span></dt>
  <dd>
  <p>In order to build GCC, the C standard library and headers must be present
  for all target variants for which target libraries will be built (and not
*************** name of the package depends on your dist
*** 121,127 ****
  &lsquo;<samp>fatal error: gnu/stubs-32.h: No such file</samp>&rsquo;
  </p>
  </dd>
! <dt><a name="GNAT-prerequisite"></a>GNAT</dt>
  <dd>
  <p>In order to build GNAT, the Ada compiler, you need a working GNAT
  compiler (GCC version 5.1 or later).
--- 114,120 ----
  &lsquo;<samp>fatal error: gnu/stubs-32.h: No such file</samp>&rsquo;
  </p>
  </dd>
! <dt><span><span id="GNAT-prerequisite"></span>GNAT</span></dt>
  <dd>
  <p>In order to build GNAT, the Ada compiler, you need a working GNAT
  compiler (GCC version 5.1 or later).
*************** by verifying that &lsquo;<samp>gnatls -v
*** 151,157 ****
  section.
  </p>
  </dd>
! <dt><a name="GDC-prerequisite"></a>GDC</dt>
  <dd>
  <p>In order to build GDC, the D compiler, you need a working GDC
  compiler (GCC version 9.4 or later) and D runtime library,
--- 144,150 ----
  section.
  </p>
  </dd>
! <dt><span><span id="GDC-prerequisite"></span>GDC</span></dt>
  <dd>
  <p>In order to build GDC, the D compiler, you need a working GDC
  compiler (GCC version 9.4 or later) and D runtime library,
*************** and works if <samp>--enable-libphobos</s
*** 176,182 ****
  documented for affected targets.
  </p>
  </dd>
! <dt>A &ldquo;working&rdquo; POSIX compatible shell, or GNU bash</dt>
  <dd>
  <p>Necessary when running <code>configure</code> because some
  <code>/bin/sh</code> shells have bugs and may crash when configuring the
--- 169,175 ----
  documented for affected targets.
  </p>
  </dd>
! <dt><span>A &ldquo;working&rdquo; POSIX compatible shell, or GNU bash</span></dt>
  <dd>
  <p>Necessary when running <code>configure</code> because some
  <code>/bin/sh</code> shells have bugs and may crash when configuring the
*************** environment to your &ldquo;good&rdquo; s
*** 195,208 ****
  work when configuring GCC.
  </p>
  </dd>
! <dt>A POSIX or SVR4 awk</dt>
  <dd>
  <p>Necessary for creating some of the generated source files for GCC.
  If in doubt, use a recent GNU awk version, as some of the older ones
  are broken.  GNU awk version 3.1.5 is known to work.
  </p>
  </dd>
! <dt>GNU binutils</dt>
  <dd>
  <p>Necessary in some circumstances, optional in others.  See the
  host/target specific instructions for your platform for the exact
--- 188,201 ----
  work when configuring GCC.
  </p>
  </dd>
! <dt><span>A POSIX or SVR4 awk</span></dt>
  <dd>
  <p>Necessary for creating some of the generated source files for GCC.
  If in doubt, use a recent GNU awk version, as some of the older ones
  are broken.  GNU awk version 3.1.5 is known to work.
  </p>
  </dd>
! <dt><span>GNU binutils</span></dt>
  <dd>
  <p>Necessary in some circumstances, optional in others.  See the
  host/target specific instructions for your platform for the exact
*************** requirements.
*** 212,237 ****
  with GNU libtool that includes doing a bootstrap with LTO enabled.
  </p>
  </dd>
! <dt>gzip version 1.2.4 (or later) or</dt>
! <dt>bzip2 version 1.0.2 (or later)</dt>
  <dd>
  <p>Necessary to uncompress GCC <code>tar</code> files when source code is
  obtained via HTTPS mirror sites.
  </p>
  </dd>
! <dt>GNU make version 3.80 (or later)</dt>
  <dd>
  <p>You must have GNU make installed to build GCC.
  </p>
  </dd>
! <dt>GNU tar version 1.14 (or later)</dt>
  <dd>
  <p>Necessary (only on some platforms) to untar the source code.  Many
  systems&rsquo; <code>tar</code> programs will also work, only try GNU
  <code>tar</code> if you have problems.
  </p>
  </dd>
! <dt>Perl version between 5.6.1 and 5.6.24</dt>
  <dd>
  <p>Necessary when targeting Darwin, building &lsquo;<samp>libstdc++</samp>&rsquo;,
  and not using <samp>--disable-symvers</samp>.
--- 205,230 ----
  with GNU libtool that includes doing a bootstrap with LTO enabled.
  </p>
  </dd>
! <dt><span>gzip version 1.2.4 (or later) or</span></dt>
! <dt><span>bzip2 version 1.0.2 (or later)</span></dt>
  <dd>
  <p>Necessary to uncompress GCC <code>tar</code> files when source code is
  obtained via HTTPS mirror sites.
  </p>
  </dd>
! <dt><span>GNU make version 3.80 (or later)</span></dt>
  <dd>
  <p>You must have GNU make installed to build GCC.
  </p>
  </dd>
! <dt><span>GNU tar version 1.14 (or later)</span></dt>
  <dd>
  <p>Necessary (only on some platforms) to untar the source code.  Many
  systems&rsquo; <code>tar</code> programs will also work, only try GNU
  <code>tar</code> if you have problems.
  </p>
  </dd>
! <dt><span>Perl version between 5.6.1 and 5.6.24</span></dt>
  <dd>
  <p>Necessary when targeting Darwin, building &lsquo;<samp>libstdc++</samp>&rsquo;,
  and not using <samp>--disable-symvers</samp>.
*************** tables.
*** 247,252 ****
--- 240,248 ----
  </p>
  <p>Used by <code>automake</code>.
  </p>
+ <p>If available, enables parallel testing of &lsquo;<samp>libgomp</samp>&rsquo; in case that
+ <code>flock</code> is not available.
+ </p>
  </dd>
  </dl>
  
*************** support libraries then using those packa
*** 260,266 ****
  install the libraries.
  </p>
  <dl compact="compact">
! <dt>GNU Multiple Precision Library (GMP) version 4.3.2 (or later)</dt>
  <dd>
  <p>Necessary to build GCC.  If a GMP source distribution is found in a
  subdirectory of your GCC sources named <samp>gmp</samp>, it will be built
--- 256,262 ----
  install the libraries.
  </p>
  <dl compact="compact">
! <dt><span>GNU Multiple Precision Library (GMP) version 4.3.2 (or later)</span></dt>
  <dd>
  <p>Necessary to build GCC.  If a GMP source distribution is found in a
  subdirectory of your GCC sources named <samp>gmp</samp>, it will be built
*************** The in-tree build is only supported with
*** 272,278 ****
  download_prerequisites installs.
  </p>
  </dd>
! <dt>MPFR Library version 3.1.0 (or later)</dt>
  <dd>
  <p>Necessary to build GCC.  It can be downloaded from
  <a href="https://www.mpfr.org">https://www.mpfr.org</a>.  If an MPFR source distribution is found
--- 268,274 ----
  download_prerequisites installs.
  </p>
  </dd>
! <dt><span>MPFR Library version 3.1.0 (or later)</span></dt>
  <dd>
  <p>Necessary to build GCC.  It can be downloaded from
  <a href="https://www.mpfr.org">https://www.mpfr.org</a>.  If an MPFR source distribution is found
*************** The in-tree build is only supported with
*** 285,291 ****
  download_prerequisites installs.
  </p>
  </dd>
! <dt>MPC Library version 1.0.1 (or later)</dt>
  <dd>
  <p>Necessary to build GCC.  It can be downloaded from
  <a href="https://www.multiprecision.org/mpc/">https://www.multiprecision.org/mpc/</a>.  If an MPC source distribution
--- 281,287 ----
  download_prerequisites installs.
  </p>
  </dd>
! <dt><span>MPC Library version 1.0.1 (or later)</span></dt>
  <dd>
  <p>Necessary to build GCC.  It can be downloaded from
  <a href="https://www.multiprecision.org/mpc/">https://www.multiprecision.org/mpc/</a>.  If an MPC source distribution
*************** The in-tree build is only supported with
*** 298,304 ****
  download_prerequisites installs.
  </p>
  </dd>
! <dt>isl Library version 0.15 or later.</dt>
  <dd>
  <p>Necessary to build GCC with the Graphite loop optimizations.
  It can be downloaded from <a href="https://gcc.gnu.org/pub/gcc/infrastructure/">https://gcc.gnu.org/pub/gcc/infrastructure/</a>.
--- 294,300 ----
  download_prerequisites installs.
  </p>
  </dd>
! <dt><span>isl Library version 0.15 or later.</span></dt>
  <dd>
  <p>Necessary to build GCC with the Graphite loop optimizations.
  It can be downloaded from <a href="https://gcc.gnu.org/pub/gcc/infrastructure/">https://gcc.gnu.org/pub/gcc/infrastructure/</a>.
*************** option should be used if isl is not inst
*** 309,315 ****
  search path.
  </p>
  </dd>
! <dt>zstd Library.</dt>
  <dd>
  <p>Necessary to build GCC with zstd compression used for LTO bytecode.
  The library is searched in your default library patch search.
--- 305,311 ----
  search path.
  </p>
  </dd>
! <dt><span>zstd Library.</span></dt>
  <dd>
  <p>Necessary to build GCC with zstd compression used for LTO bytecode.
  The library is searched in your default library patch search.
*************** Alternatively, the <samp>--with-zstd</sa
*** 318,334 ****
  </dd>
  </dl>
  
! <a name="Tools_002fpackages-necessary-for-modifying-GCC"></a>
! <h3 class="heading">Tools/packages necessary for modifying GCC</h3>
  <dl compact="compact">
! <dt>autoconf version 2.69</dt>
! <dt>GNU m4 version 1.4.6 (or later)</dt>
  <dd>
  <p>Necessary when modifying <samp>configure.ac</samp>, <samp>aclocal.m4</samp>, etc.
  to regenerate <samp>configure</samp> and <samp>config.in</samp> files.
  </p>
  </dd>
! <dt>automake version 1.15.1</dt>
  <dd>
  <p>Necessary when modifying a <samp>Makefile.am</samp> file to regenerate its
  associated <samp>Makefile.in</samp>.
--- 314,329 ----
  </dd>
  </dl>
  
! <span id="Tools_002fpackages-necessary-for-modifying-GCC"></span><h3 class="heading">Tools/packages necessary for modifying GCC</h3>
  <dl compact="compact">
! <dt><span>autoconf version 2.69</span></dt>
! <dt><span>GNU m4 version 1.4.6 (or later)</span></dt>
  <dd>
  <p>Necessary when modifying <samp>configure.ac</samp>, <samp>aclocal.m4</samp>, etc.
  to regenerate <samp>configure</samp> and <samp>config.in</samp> files.
  </p>
  </dd>
! <dt><span>automake version 1.15.1</span></dt>
  <dd>
  <p>Necessary when modifying a <samp>Makefile.am</samp> file to regenerate its
  associated <samp>Makefile.in</samp>.
*************** to a newer version, please update all th
*** 344,371 ****
  to the latest released version.
  </p>
  </dd>
! <dt>gettext version 0.14.5 (or later)</dt>
  <dd>
  <p>Needed to regenerate <samp>gcc.pot</samp>.
  </p>
  </dd>
! <dt>gperf version 2.7.2 (or later)</dt>
  <dd>
  <p>Necessary when modifying <code>gperf</code> input files, e.g.
  <samp>gcc/cp/cfns.gperf</samp> to regenerate its associated header file, e.g.
  <samp>gcc/cp/cfns.h</samp>.
  </p>
  </dd>
! <dt>DejaGnu version 1.5.3 (or later)</dt>
! <dt>Expect</dt>
! <dt>Tcl</dt>
  <dd>
  <p>Necessary to run the GCC testsuite; see the section on testing for
  details.
  </p>
  </dd>
! <dt>autogen version 5.5.4 (or later) and</dt>
! <dt>guile version 1.4.1 (or later)</dt>
  <dd>
  <p>Necessary to regenerate <samp>fixinc/fixincl.x</samp> from
  <samp>fixinc/inclhack.def</samp> and <samp>fixinc/*.tpl</samp>.
--- 339,366 ----
  to the latest released version.
  </p>
  </dd>
! <dt><span>gettext version 0.14.5 (or later)</span></dt>
  <dd>
  <p>Needed to regenerate <samp>gcc.pot</samp>.
  </p>
  </dd>
! <dt><span>gperf version 2.7.2 (or later)</span></dt>
  <dd>
  <p>Necessary when modifying <code>gperf</code> input files, e.g.
  <samp>gcc/cp/cfns.gperf</samp> to regenerate its associated header file, e.g.
  <samp>gcc/cp/cfns.h</samp>.
  </p>
  </dd>
! <dt><span>DejaGnu version 1.5.3 (or later)</span></dt>
! <dt><span>Expect</span></dt>
! <dt><span>Tcl</span></dt>
  <dd>
  <p>Necessary to run the GCC testsuite; see the section on testing for
  details.
  </p>
  </dd>
! <dt><span>autogen version 5.5.4 (or later) and</span></dt>
! <dt><span>guile version 1.4.1 (or later)</span></dt>
  <dd>
  <p>Necessary to regenerate <samp>fixinc/fixincl.x</samp> from
  <samp>fixinc/inclhack.def</samp> and <samp>fixinc/*.tpl</samp>.
*************** details.
*** 376,382 ****
  <samp>Makefile.tpl</samp> and <samp>Makefile.def</samp>.
  </p>
  </dd>
! <dt>Flex version 2.5.4 (or later)</dt>
  <dd>
  <p>Necessary when modifying <samp>*.l</samp> files.
  </p>
--- 371,377 ----
  <samp>Makefile.tpl</samp> and <samp>Makefile.def</samp>.
  </p>
  </dd>
! <dt><span>Flex version 2.5.4 (or later)</span></dt>
  <dd>
  <p>Necessary when modifying <samp>*.l</samp> files.
  </p>
*************** files are not included in the version-co
*** 385,391 ****
  They are included in releases.
  </p>
  </dd>
! <dt>Texinfo version 4.7 (or later)</dt>
  <dd>
  <p>Necessary for running <code>makeinfo</code> when modifying <samp>*.texi</samp>
  files to test your changes.
--- 380,386 ----
  They are included in releases.
  </p>
  </dd>
! <dt><span>Texinfo version 4.7 (or later)</span></dt>
  <dd>
  <p>Necessary for running <code>makeinfo</code> when modifying <samp>*.texi</samp>
  files to test your changes.
*************** generated output files are not included
*** 399,430 ****
  included in releases.
  </p>
  </dd>
! <dt>TeX (any working version)</dt>
  <dd>
  <p>Necessary for running <code>texi2dvi</code> and <code>texi2pdf</code>, which
  are used when running <code>make dvi</code> or <code>make pdf</code> to create
  DVI or PDF files, respectively.
  </p>
  </dd>
! <dt>Sphinx version 1.0 (or later)</dt>
  <dd>
  <p>Necessary to regenerate <samp>jit/docs/_build/texinfo</samp> from the <samp>.rst</samp>
  files in the directories below <samp>jit/docs</samp>.
  </p>
  </dd>
! <dt>git (any version)</dt>
! <dt>SSH (any version)</dt>
  <dd>
  <p>Necessary to access the source repository.  Public releases and weekly
  snapshots of the development sources are also available via HTTPS.
  </p>
  </dd>
! <dt>GNU diffutils version 2.7 (or later)</dt>
  <dd>
  <p>Useful when submitting patches for the GCC source code.
  </p>
  </dd>
! <dt>patch version 2.5.4 (or later)</dt>
  <dd>
  <p>Necessary when applying patches, created with <code>diff</code>, to one&rsquo;s
  own sources.
--- 394,425 ----
  included in releases.
  </p>
  </dd>
! <dt><span>TeX (any working version)</span></dt>
  <dd>
  <p>Necessary for running <code>texi2dvi</code> and <code>texi2pdf</code>, which
  are used when running <code>make dvi</code> or <code>make pdf</code> to create
  DVI or PDF files, respectively.
  </p>
  </dd>
! <dt><span>Sphinx version 1.0 (or later)</span></dt>
  <dd>
  <p>Necessary to regenerate <samp>jit/docs/_build/texinfo</samp> from the <samp>.rst</samp>
  files in the directories below <samp>jit/docs</samp>.
  </p>
  </dd>
! <dt><span>git (any version)</span></dt>
! <dt><span>SSH (any version)</span></dt>
  <dd>
  <p>Necessary to access the source repository.  Public releases and weekly
  snapshots of the development sources are also available via HTTPS.
  </p>
  </dd>
! <dt><span>GNU diffutils version 2.7 (or later)</span></dt>
  <dd>
  <p>Useful when submitting patches for the GCC source code.
  </p>
  </dd>
! <dt><span>patch version 2.5.4 (or later)</span></dt>
  <dd>
  <p>Necessary when applying patches, created with <code>diff</code>, to one&rsquo;s
  own sources.
diff -Nrcpad gcc-12.3.0/INSTALL/specific.html gcc-12.4.0/INSTALL/specific.html
*** gcc-12.3.0/INSTALL/specific.html	Mon May  8 12:15:26 2023
--- gcc-12.4.0/INSTALL/specific.html	Thu Jun 20 08:10:30 2024
***************
*** 1,5 ****
--- 1,8 ----
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
+ <!-- Created by GNU Texinfo 6.8, https://www.gnu.org/software/texinfo/ -->
+ <head>
+ <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <!-- Copyright (C) 1988-2022 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
*************** A GNU Manual
*** 19,27 ****
  You have freedom to copy and modify this GNU Manual, like GNU
       software.  Copies published by the Free Software Foundation raise
       funds for GNU development. -->
- <!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
- <head>
- <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <title>Host/Target specific installation notes for GCC</title>
  
  <meta name="description" content="Host/Target specific installation notes for GCC">
--- 22,27 ----
*************** You have freedom to copy and modify this
*** 29,58 ****
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
  <style type="text/css">
  <!--
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
- blockquote.smallindentedblock {margin-right: 0em; font-size: smaller}
- blockquote.smallquotation {font-size: smaller}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
- div.lisp {margin-left: 3.2em}
- div.smalldisplay {margin-left: 3.2em}
- div.smallexample {margin-left: 3.2em}
- div.smalllisp {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
- pre.smalldisplay {font-family: inherit; font-size: smaller}
- pre.smallexample {font-size: smaller}
- pre.smallformat {font-family: inherit; font-size: smaller}
- pre.smalllisp {font-size: smaller}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
  ul.no-bullet {list-style: none}
  -->
  </style>
--- 29,52 ----
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
+ <meta name="viewport" content="width=device-width,initial-scale=1">
+ 
  <style type="text/css">
  <!--
+ a.copiable-anchor {visibility: hidden; text-decoration: none; line-height: 0em}
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
+ span:hover a.copiable-anchor {visibility: visible}
  ul.no-bullet {list-style: none}
  -->
  </style>
*************** ul.no-bullet {list-style: none}
*** 86,96 ****
  
  
  
! <a name="index-Specific"></a>
! <a name="index-Specific-installation-notes"></a>
! <a name="index-Target-specific-installation"></a>
! <a name="index-Host-specific-installation"></a>
! <a name="index-Target-specific-installation-notes"></a>
  
  <p>Please read this document carefully <em>before</em> installing the
  GNU Compiler Collection on your machine.
--- 80,90 ----
  
  
  
! <span id="index-Specific"></span>
! <span id="index-Specific-installation-notes"></span>
! <span id="index-Target-specific-installation"></span>
! <span id="index-Host-specific-installation"></span>
! <span id="index-Target-specific-installation-notes"></span>
  
  <p>Please read this document carefully <em>before</em> installing the
  GNU Compiler Collection on your machine.
*************** information have to.
*** 191,198 ****
  
  <!-- -------- host/target specific issues start here ---------------- -->
  <hr />
! <a name="aarch64-x-x"></a><a name="aarch64*-*-*"></a>
! <h3 class="heading">aarch64*-*-*</h3>
  <p>Binutils pre 2.24 does not have support for selecting <samp>-mabi</samp> and
  does not support ILP32.  If it is used to build GCC 4.9 or later, GCC will
  not support option <samp>-mabi=ilp32</samp>.
--- 185,191 ----
  
  <!-- -------- host/target specific issues start here ---------------- -->
  <hr />
! <span id="aarch64-x-x"></span><span id="aarch64*-*-*"></span><h3 class="heading">aarch64*-*-*</h3>
  <p>Binutils pre 2.24 does not have support for selecting <samp>-mabi</samp> and
  does not support ILP32.  If it is used to build GCC 4.9 or later, GCC will
  not support option <samp>-mabi=ilp32</samp>.
*************** protections by default.  This mechanism
*** 229,248 ****
  of the options are given at configure time.
  </p>
  <hr />
! <a name="alpha-x-x"></a><a name="alpha*-*-*"></a>
! <h3 class="heading">alpha*-*-*</h3>
  <p>This section contains general configuration information for all
  Alpha-based platforms using ELF.  In addition to reading this
  section, please read all other sections that match your target.
  </p>
  <hr />
! <a name="amd64-x-solaris2"></a><a name="amd64-*-solaris2*"></a>
! <h3 class="heading">amd64-*-solaris2*</h3>
  <p>This is a synonym for &lsquo;<samp>x86_64-*-solaris2*</samp>&rsquo;.
  </p>
  <hr />
! <a name="amdgcn-x-amdhsa"></a><a name="amdgcn-*-amdhsa"></a>
! <h3 class="heading">amdgcn-*-amdhsa</h3>
  <p>AMD GCN GPU target.
  </p>
  <p>Instead of GNU Binutils, you will need to install LLVM 13.0.1, or later, and copy
--- 222,238 ----
  of the options are given at configure time.
  </p>
  <hr />
! <span id="alpha-x-x"></span><span id="alpha*-*-*"></span><h3 class="heading">alpha*-*-*</h3>
  <p>This section contains general configuration information for all
  Alpha-based platforms using ELF.  In addition to reading this
  section, please read all other sections that match your target.
  </p>
  <hr />
! <span id="amd64-x-solaris2"></span><span id="amd64-*-solaris2*"></span><h3 class="heading">amd64-*-solaris2*</h3>
  <p>This is a synonym for &lsquo;<samp>x86_64-*-solaris2*</samp>&rsquo;.
  </p>
  <hr />
! <span id="amdgcn-x-amdhsa"></span><span id="amdgcn-*-amdhsa"></span><h3 class="heading">amdgcn-*-amdhsa</h3>
  <p>AMD GCN GPU target.
  </p>
  <p>Instead of GNU Binutils, you will need to install LLVM 13.0.1, or later, and copy
*************** section, please read all other sections
*** 260,281 ****
  on the GPU.
  </p>
  <hr />
! <a name="arc-x-elf32"></a><a name="arc-*-elf32"></a>
! <h3 class="heading">arc-*-elf32</h3>
  
  <p>Use &lsquo;<samp>configure --target=arc-elf32 --with-cpu=<var>cpu</var> --enable-languages=&quot;c,c++&quot;</samp>&rsquo;
  to configure GCC, with <var>cpu</var> being one of &lsquo;<samp>arc600</samp>&rsquo;, &lsquo;<samp>arc601</samp>&rsquo;,
  or &lsquo;<samp>arc700</samp>&rsquo;.
  </p>
  <hr />
! <a name="arc-linux-uclibc"></a><a name="arc-linux-uclibc-1"></a>
! <h3 class="heading">arc-linux-uclibc</h3>
  
  <p>Use &lsquo;<samp>configure --target=arc-linux-uclibc --with-cpu=arc700 --enable-languages=&quot;c,c++&quot;</samp>&rsquo; to configure GCC.
  </p>
  <hr />
! <a name="arm-x-eabi"></a><a name="arm-*-eabi"></a>
! <h3 class="heading">arm-*-eabi</h3>
  <p>ARM-family processors.
  </p>
  <p>Building the Ada frontend commonly fails (an infinite loop executing
--- 250,268 ----
  on the GPU.
  </p>
  <hr />
! <span id="arc-x-elf32"></span><span id="arc-*-elf32"></span><h3 class="heading">arc-*-elf32</h3>
  
  <p>Use &lsquo;<samp>configure --target=arc-elf32 --with-cpu=<var>cpu</var> --enable-languages=&quot;c,c++&quot;</samp>&rsquo;
  to configure GCC, with <var>cpu</var> being one of &lsquo;<samp>arc600</samp>&rsquo;, &lsquo;<samp>arc601</samp>&rsquo;,
  or &lsquo;<samp>arc700</samp>&rsquo;.
  </p>
  <hr />
! <span id="arc-linux-uclibc"></span><span id="arc-linux-uclibc-1"></span><h3 class="heading">arc-linux-uclibc</h3>
  
  <p>Use &lsquo;<samp>configure --target=arc-linux-uclibc --with-cpu=arc700 --enable-languages=&quot;c,c++&quot;</samp>&rsquo; to configure GCC.
  </p>
  <hr />
! <span id="arm-x-eabi"></span><span id="arm-*-eabi"></span><h3 class="heading">arm-*-eabi</h3>
  <p>ARM-family processors.
  </p>
  <p>Building the Ada frontend commonly fails (an infinite loop executing
*************** or &lsquo;<samp>arc700</samp>&rsquo;.
*** 283,290 ****
  GNAT 4.6, 4.9 or 5 release branches are known to succeed.
  </p>
  <hr />
! <a name="avr"></a><a name="avr-1"></a>
! <h3 class="heading">avr</h3>
  <p>ATMEL AVR-family micro controllers.  These are used in embedded
  applications.  There are no standard Unix configurations.
  See &ldquo;AVR Options&rdquo; in the main manual
--- 270,276 ----
  GNAT 4.6, 4.9 or 5 release branches are known to succeed.
  </p>
  <hr />
! <span id="avr"></span><span id="avr-1"></span><h3 class="heading">avr</h3>
  <p>ATMEL AVR-family micro controllers.  These are used in embedded
  applications.  There are no standard Unix configurations.
  See &ldquo;AVR Options&rdquo; in the main manual
*************** can also be obtained from:
*** 301,315 ****
  </li></ul>
  
  <p>The following error:
! </p><div class="smallexample">
! <pre class="smallexample">Error: register required
  </pre></div>
  
  <p>indicates that you should upgrade to a newer version of the binutils.
  </p>
  <hr />
! <a name="bfin"></a><a name="Blackfin"></a>
! <h3 class="heading">Blackfin</h3>
  <p>The Blackfin processor, an Analog Devices DSP.
  See &ldquo;Blackfin Options&rdquo; in the main manual
  </p>
--- 287,300 ----
  </li></ul>
  
  <p>The following error:
! </p><div class="example">
! <pre class="example">Error: register required
  </pre></div>
  
  <p>indicates that you should upgrade to a newer version of the binutils.
  </p>
  <hr />
! <span id="bfin"></span><span id="Blackfin"></span><h3 class="heading">Blackfin</h3>
  <p>The Blackfin processor, an Analog Devices DSP.
  See &ldquo;Blackfin Options&rdquo; in the main manual
  </p>
*************** See &ldquo;Blackfin Options&rdquo; in th
*** 317,324 ****
  are available at <a href="https://sourceforge.net/projects/adi-toolchain/">https://sourceforge.net/projects/adi-toolchain/</a>.
  </p>
  <hr />
! <a name="cr16"></a><a name="CR16"></a>
! <h3 class="heading">CR16</h3>
  <p>The CR16 CompactRISC architecture is a 16-bit architecture. This
  architecture is used in embedded applications.
  </p>
--- 302,308 ----
  are available at <a href="https://sourceforge.net/projects/adi-toolchain/">https://sourceforge.net/projects/adi-toolchain/</a>.
  </p>
  <hr />
! <span id="cr16"></span><span id="CR16"></span><h3 class="heading">CR16</h3>
  <p>The CR16 CompactRISC architecture is a 16-bit architecture. This
  architecture is used in embedded applications.
  </p>
*************** GCC&nbsp;for building a CR16 elf cross-c
*** 332,339 ****
  configure GCC&nbsp;for building a CR16 uclinux cross-compiler.
  </p>
  <hr />
! <a name="cris"></a><a name="CRIS"></a>
! <h3 class="heading">CRIS</h3>
  <p>CRIS is a CPU architecture in Axis Communications systems-on-a-chip, for
  example the ETRAX series.  These are used in embedded applications.
  </p>
--- 316,322 ----
  configure GCC&nbsp;for building a CR16 uclinux cross-compiler.
  </p>
  <hr />
! <span id="cris"></span><span id="CRIS"></span><h3 class="heading">CRIS</h3>
  <p>CRIS is a CPU architecture in Axis Communications systems-on-a-chip, for
  example the ETRAX series.  These are used in embedded applications.
  </p>
*************** for a list of CRIS-specific options.
*** 343,350 ****
  <p>Use &lsquo;<samp>configure --target=cris-elf</samp>&rsquo; to configure GCC&nbsp;for building
  a cross-compiler for CRIS.
  <hr />
! <a name="dos"></a></p><a name="DOS"></a>
! <h3 class="heading">DOS</h3>
  <p>Please have a look at the <a href="binaries.html">binaries page</a>.
  </p>
  <p>You cannot install GCC by itself on MSDOS; it will not compile under
--- 326,332 ----
  <p>Use &lsquo;<samp>configure --target=cris-elf</samp>&rsquo; to configure GCC&nbsp;for building
  a cross-compiler for CRIS.
  <hr />
! <span id="dos"></span></p><span id="DOS"></span><h3 class="heading">DOS</h3>
  <p>Please have a look at the <a href="binaries.html">binaries page</a>.
  </p>
  <p>You cannot install GCC by itself on MSDOS; it will not compile under
*************** compilation package DJGPP, which include
*** 353,366 ****
  and includes all the necessary compilation tools and libraries.
  </p>
  <hr />
! <a name="epiphany-x-elf"></a><a name="epiphany-*-elf"></a>
! <h3 class="heading">epiphany-*-elf</h3>
  <p>Adapteva Epiphany.
  This configuration is intended for embedded systems.
  </p>
  <hr />
! <a name="x-x-freebsd"></a><a name="g_t*-*-freebsd*"></a>
! <h3 class="heading">*-*-freebsd*</h3>
  <p>In order to better utilize FreeBSD base system functionality and match
  the configuration of the system compiler, GCC 4.5 and above as well as
  GCC 4.4 past 2010-06-20 leverage SSP support in libc (which is present
--- 335,346 ----
  and includes all the necessary compilation tools and libraries.
  </p>
  <hr />
! <span id="epiphany-x-elf"></span><span id="epiphany-*-elf"></span><h3 class="heading">epiphany-*-elf</h3>
  <p>Adapteva Epiphany.
  This configuration is intended for embedded systems.
  </p>
  <hr />
! <span id="x-x-freebsd"></span><span id="g_t*-*-freebsd*"></span><h3 class="heading">*-*-freebsd*</h3>
  <p>In order to better utilize FreeBSD base system functionality and match
  the configuration of the system compiler, GCC 4.5 and above as well as
  GCC 4.4 past 2010-06-20 leverage SSP support in libc (which is present
*************** properly on FreeBSD prior to the FreeBSD
*** 391,404 ****
  after 2.16.1.
  </p>
  <hr />
! <a name="ft32-x-elf"></a><a name="ft32-*-elf"></a>
! <h3 class="heading">ft32-*-elf</h3>
  <p>The FT32 processor.
  This configuration is intended for embedded systems.
  </p>
  <hr />
! <a name="h8300-hms"></a><a name="h8300-hms-1"></a>
! <h3 class="heading">h8300-hms</h3>
  <p>Renesas H8/300 series of processors.
  </p>
  <p>Please have a look at the <a href="binaries.html">binaries page</a>.
--- 371,382 ----
  after 2.16.1.
  </p>
  <hr />
! <span id="ft32-x-elf"></span><span id="ft32-*-elf"></span><h3 class="heading">ft32-*-elf</h3>
  <p>The FT32 processor.
  This configuration is intended for embedded systems.
  </p>
  <hr />
! <span id="h8300-hms"></span><span id="h8300-hms-1"></span><h3 class="heading">h8300-hms</h3>
  <p>Renesas H8/300 series of processors.
  </p>
  <p>Please have a look at the <a href="binaries.html">binaries page</a>.
*************** first three arguments in function calls
*** 409,416 ****
  longer a multiple of 2 bytes.
  </p>
  <hr />
! <a name="hppa-hp-hpux"></a><a name="hppa*-hp-hpux*"></a>
! <h3 class="heading">hppa*-hp-hpux*</h3>
  <p>Support for HP-UX version 9 and older was discontinued in GCC 3.4.
  </p>
  <p>We require using gas/binutils on all hppa platforms.  Version 2.19 or
--- 387,393 ----
  longer a multiple of 2 bytes.
  </p>
  <hr />
! <span id="hppa-hp-hpux"></span><span id="hppa*-hp-hpux*"></span><h3 class="heading">hppa*-hp-hpux*</h3>
  <p>Support for HP-UX version 9 and older was discontinued in GCC 3.4.
  </p>
  <p>We require using gas/binutils on all hppa platforms.  Version 2.19 or
*************** a list of the predefines used with each
*** 460,467 ****
  <p>More specific information to &lsquo;<samp>hppa*-hp-hpux*</samp>&rsquo; targets follows.
  </p>
  <hr />
! <a name="hppa-hp-hpux10"></a><a name="hppa*-hp-hpux10"></a>
! <h3 class="heading">hppa*-hp-hpux10</h3>
  <p>For hpux10.20, we <em>highly</em> recommend you pick up the latest sed patch
  <code>PHCO_19798</code> from HP.
  </p>
--- 437,443 ----
  <p>More specific information to &lsquo;<samp>hppa*-hp-hpux*</samp>&rsquo; targets follows.
  </p>
  <hr />
! <span id="hppa-hp-hpux10"></span><span id="hppa*-hp-hpux10"></span><h3 class="heading">hppa*-hp-hpux10</h3>
  <p>For hpux10.20, we <em>highly</em> recommend you pick up the latest sed patch
  <code>PHCO_19798</code> from HP.
  </p>
*************** problems in using C++ on this target.  H
*** 471,478 ****
  with the one implemented under HP-UX 11 using secondary definitions.
  </p>
  <hr />
! <a name="hppa-hp-hpux11"></a><a name="hppa*-hp-hpux11"></a>
! <h3 class="heading">hppa*-hp-hpux11</h3>
  <p>GCC 3.0 and up support HP-UX 11.  GCC 2.95.x is not supported and cannot
  be used to compile GCC 3.0 and up.
  </p>
--- 447,453 ----
  with the one implemented under HP-UX 11 using secondary definitions.
  </p>
  <hr />
! <span id="hppa-hp-hpux11"></span><span id="hppa*-hp-hpux11"></span><h3 class="heading">hppa*-hp-hpux11</h3>
  <p>GCC 3.0 and up support HP-UX 11.  GCC 2.95.x is not supported and cannot
  be used to compile GCC 3.0 and up.
  </p>
*************** versioning with <samp>--disable-symvers<
*** 575,582 ****
  supported, so <samp>--enable-threads=dce</samp> does not work.
  </p>
  <hr />
! <a name="x-x-linux-gnu"></a><a name="g_t*-*-linux-gnu"></a>
! <h3 class="heading">*-*-linux-gnu</h3>
  <p>The <code>.init_array</code> and <code>.fini_array</code> sections are enabled
  unconditionally which requires at least glibc 2.1 and binutils 2.12.
  </p>
--- 550,556 ----
  supported, so <samp>--enable-threads=dce</samp> does not work.
  </p>
  <hr />
! <span id="x-x-linux-gnu"></span><span id="g_t*-*-linux-gnu"></span><h3 class="heading">*-*-linux-gnu</h3>
  <p>The <code>.init_array</code> and <code>.fini_array</code> sections are enabled
  unconditionally which requires at least glibc 2.1 and binutils 2.12.
  </p>
*************** in glibc 2.2.5 and later.  More informat
*** 585,592 ****
  libstdc++-v3 documentation.
  </p>
  <hr />
! <a name="ix86-x-linux"></a><a name="i_003f86-*-linux*"></a>
! <h3 class="heading">i?86-*-linux*</h3>
  <p>As of GCC 3.3, binutils 2.13.1 or later is required for this platform.
  See <a href="https://gcc.gnu.org/PR10877">bug 10877</a> for more information.
  </p>
--- 559,565 ----
  libstdc++-v3 documentation.
  </p>
  <hr />
! <span id="ix86-x-linux"></span><span id="i_003f86-*-linux*"></span><h3 class="heading">i?86-*-linux*</h3>
  <p>As of GCC 3.3, binutils 2.13.1 or later is required for this platform.
  See <a href="https://gcc.gnu.org/PR10877">bug 10877</a> for more information.
  </p>
*************** possible you have a hardware problem.  F
*** 595,602 ****
  found on <a href="https://www.bitwizard.nl/sig11/">www.bitwizard.nl</a>.
  </p>
  <hr />
! <a name="ix86-x-solaris2"></a><a name="i_003f86-*-solaris2*"></a>
! <h3 class="heading">i?86-*-solaris2*</h3>
  <p>Use this for Solaris 11.3 or later on x86 and x86-64 systems.  Starting
  with GCC 4.7, there is also a 64-bit &lsquo;<samp>amd64-*-solaris2*</samp>&rsquo; or
  &lsquo;<samp>x86_64-*-solaris2*</samp>&rsquo; configuration that corresponds to
--- 568,574 ----
  found on <a href="https://www.bitwizard.nl/sig11/">www.bitwizard.nl</a>.
  </p>
  <hr />
! <span id="ix86-x-solaris2"></span><span id="i_003f86-*-solaris2*"></span><h3 class="heading">i?86-*-solaris2*</h3>
  <p>Use this for Solaris 11.3 or later on x86 and x86-64 systems.  Starting
  with GCC 4.7, there is also a 64-bit &lsquo;<samp>amd64-*-solaris2*</samp>&rsquo; or
  &lsquo;<samp>x86_64-*-solaris2*</samp>&rsquo; configuration that corresponds to
*************** to configure with <samp>--without-gnu-ld
*** 620,627 ****
  guarantee use of Solaris <code>ld</code>.
  </p>
  <hr />
! <a name="ia64-x-linux"></a><a name="ia64-*-linux"></a>
! <h3 class="heading">ia64-*-linux</h3>
  <p>IA-64 processor (also known as IPF, or Itanium Processor Family)
  running GNU/Linux.
  </p>
--- 592,598 ----
  guarantee use of Solaris <code>ld</code>.
  </p>
  <hr />
! <span id="ia64-x-linux"></span><span id="ia64-*-linux"></span><h3 class="heading">ia64-*-linux</h3>
  <p>IA-64 processor (also known as IPF, or Itanium Processor Family)
  running GNU/Linux.
  </p>
*************** running GNU/Linux.
*** 630,637 ****
  later.
  </p>
  <hr />
! <a name="ia64-x-hpux"></a><a name="ia64-*-hpux*"></a>
! <h3 class="heading">ia64-*-hpux*</h3>
  <p>Building GCC on this target requires the GNU Assembler.  The bundled HP
  assembler will not work.  To prevent GCC from using the wrong assembler,
  the option <samp>--with-gnu-as</samp> may be necessary.
--- 601,607 ----
  later.
  </p>
  <hr />
! <span id="ia64-x-hpux"></span><span id="ia64-*-hpux*"></span><h3 class="heading">ia64-*-hpux*</h3>
  <p>Building GCC on this target requires the GNU Assembler.  The bundled HP
  assembler will not work.  To prevent GCC from using the wrong assembler,
  the option <samp>--with-gnu-as</samp> may be necessary.
*************** removed and the system libunwind library
*** 644,651 ****
  </p>
  <hr />
  <!-- rs6000-ibm-aix*, powerpc-ibm-aix* -->
! <a name="x-ibm-aix"></a><a name="g_t*-ibm-aix*"></a>
! <h3 class="heading">*-ibm-aix*</h3>
  <p>Support for AIX version 3 and older was discontinued in GCC 3.4.
  Support for AIX version 4.2 and older was discontinued in GCC 4.5.
  </p>
--- 614,620 ----
  </p>
  <hr />
  <!-- rs6000-ibm-aix*, powerpc-ibm-aix* -->
! <span id="x-ibm-aix"></span><span id="g_t*-ibm-aix*"></span><h3 class="heading">*-ibm-aix*</h3>
  <p>Support for AIX version 3 and older was discontinued in GCC 3.4.
  Support for AIX version 4.2 and older was discontinued in GCC 4.5.
  </p>
*************** with an earlier release of GCC is recomm
*** 662,669 ****
  requires a larger data segment, which can be enabled through the
  <var>LDR_CNTRL</var> environment variable, e.g.,
  </p>
! <div class="smallexample">
! <pre class="smallexample">% LDR_CNTRL=MAXDATA=0x50000000
  % export LDR_CNTRL
  </pre></div>
  
--- 631,638 ----
  requires a larger data segment, which can be enabled through the
  <var>LDR_CNTRL</var> environment variable, e.g.,
  </p>
! <div class="example">
! <pre class="example">% LDR_CNTRL=MAXDATA=0x50000000
  % export LDR_CNTRL
  </pre></div>
  
*************** with a version of GCC built for an earli
*** 674,681 ****
  <p>To speed up the configuration phases of bootstrapping and installing GCC,
  one may use GNU Bash instead of AIX <code>/bin/sh</code>, e.g.,
  </p>
! <div class="smallexample">
! <pre class="smallexample">% CONFIG_SHELL=/opt/freeware/bin/bash
  % export CONFIG_SHELL
  </pre></div>
  
--- 643,650 ----
  <p>To speed up the configuration phases of bootstrapping and installing GCC,
  one may use GNU Bash instead of AIX <code>/bin/sh</code>, e.g.,
  </p>
! <div class="example">
! <pre class="example">% CONFIG_SHELL=/opt/freeware/bin/bash
  % export CONFIG_SHELL
  </pre></div>
  
*************** APAR IY26685 (AIX 4.3) or APAR IY25528 (
*** 725,731 ****
  fix for another AIX Assembler bug and a co-dependent AIX Archiver fix
  referenced as APAR IY53606 (AIX 5.2) or as APAR IY54774 (AIX 5.1)
  </p>
! <a name="TransferAixShobj"></a><p>&lsquo;<samp>libstdc++</samp>&rsquo; in GCC 3.4 increments the major version number of the
  shared object and GCC installation places the <samp>libstdc++.a</samp>
  shared library in a common location which will overwrite the and GCC
  3.3 version of the shared library.  Applications either need to be
--- 694,700 ----
  fix for another AIX Assembler bug and a co-dependent AIX Archiver fix
  referenced as APAR IY53606 (AIX 5.2) or as APAR IY54774 (AIX 5.1)
  </p>
! <span id="TransferAixShobj"></span><p>&lsquo;<samp>libstdc++</samp>&rsquo; in GCC 3.4 increments the major version number of the
  shared object and GCC installation places the <samp>libstdc++.a</samp>
  shared library in a common location which will overwrite the and GCC
  3.3 version of the shared library.  Applications either need to be
*************** multilib <samp>libstdc++.a</samp> instal
*** 739,758 ****
  </p>
  <p>Extract the shared objects from the currently installed
  <samp>libstdc++.a</samp> archive:
! </p><div class="smallexample">
! <pre class="smallexample">% ar -x libstdc++.a libstdc++.so.4 libstdc++.so.5
  </pre></div>
  
  <p>Enable the &lsquo;<samp>F_LOADONLY</samp>&rsquo; flag so that the shared object will be
  available for runtime dynamic loading, but not linking:
! </p><div class="smallexample">
! <pre class="smallexample">% strip -e libstdc++.so.4 libstdc++.so.5
  </pre></div>
  
  <p>Archive the runtime-only shared object in the GCC 3.4
  <samp>libstdc++.a</samp> archive:
! </p><div class="smallexample">
! <pre class="smallexample">% ar -q libstdc++.a libstdc++.so.4 libstdc++.so.5
  </pre></div>
  
  <p>Eventually, the
--- 708,727 ----
  </p>
  <p>Extract the shared objects from the currently installed
  <samp>libstdc++.a</samp> archive:
! </p><div class="example">
! <pre class="example">% ar -x libstdc++.a libstdc++.so.4 libstdc++.so.5
  </pre></div>
  
  <p>Enable the &lsquo;<samp>F_LOADONLY</samp>&rsquo; flag so that the shared object will be
  available for runtime dynamic loading, but not linking:
! </p><div class="example">
! <pre class="example">% strip -e libstdc++.so.4 libstdc++.so.5
  </pre></div>
  
  <p>Archive the runtime-only shared object in the GCC 3.4
  <samp>libstdc++.a</samp> archive:
! </p><div class="example">
! <pre class="example">% ar -q libstdc++.a libstdc++.so.4 libstdc++.so.5
  </pre></div>
  
  <p>Eventually, the
*************** environment variable to &lsquo;<samp>C</
*** 809,854 ****
  switch and using the configure option <samp>--with-cpu-<var>cpu_type</var></samp>.
  </p>
  <hr />
! <a name="iq2000-x-elf"></a><a name="iq2000-*-elf"></a>
! <h3 class="heading">iq2000-*-elf</h3>
  <p>Vitesse IQ2000 processors.  These are used in embedded
  applications.  There are no standard Unix configurations.
  </p>
  <hr />
! <a name="lm32-x-elf"></a><a name="lm32-*-elf"></a>
! <h3 class="heading">lm32-*-elf</h3>
  <p>Lattice Mico32 processor.
  This configuration is intended for embedded systems.
  </p>
  <hr />
! <a name="lm32-x-uclinux"></a><a name="lm32-*-uclinux"></a>
! <h3 class="heading">lm32-*-uclinux</h3>
  <p>Lattice Mico32 processor.
  This configuration is intended for embedded systems running uClinux.
  </p>
  <hr />
! <a name="loongarch"></a><a name="LoongArch"></a>
! <h3 class="heading">LoongArch</h3>
  <p>LoongArch processor.
  The following LoongArch targets are available:
  </p><dl compact="compact">
! <dt><code>loongarch64-linux-gnu*</code></dt>
  <dd><p>LoongArch processor running GNU/Linux.  This target triplet may be coupled
  with a small set of possible suffixes to identify their default ABI type:
  </p><dl compact="compact">
! <dt><code>f64</code></dt>
  <dd><p>Uses <code>lp64d/base</code> ABI by default.
  </p></dd>
! <dt><code>f32</code></dt>
  <dd><p>Uses <code>lp64f/base</code> ABI by default.
  </p></dd>
! <dt><code>sf</code></dt>
  <dd><p>Uses <code>lp64s/base</code> ABI by default.
  </p></dd>
  </dl>
  
  </dd>
! <dt><code>loongarch64-linux-gnu</code></dt>
  <dd><p>Same as <code>loongarch64-linux-gnuf64</code>, but may be used with
  <samp>--with-abi=*</samp> to configure the default ABI type.
  </p></dd>
--- 778,819 ----
  switch and using the configure option <samp>--with-cpu-<var>cpu_type</var></samp>.
  </p>
  <hr />
! <span id="iq2000-x-elf"></span><span id="iq2000-*-elf"></span><h3 class="heading">iq2000-*-elf</h3>
  <p>Vitesse IQ2000 processors.  These are used in embedded
  applications.  There are no standard Unix configurations.
  </p>
  <hr />
! <span id="lm32-x-elf"></span><span id="lm32-*-elf"></span><h3 class="heading">lm32-*-elf</h3>
  <p>Lattice Mico32 processor.
  This configuration is intended for embedded systems.
  </p>
  <hr />
! <span id="lm32-x-uclinux"></span><span id="lm32-*-uclinux"></span><h3 class="heading">lm32-*-uclinux</h3>
  <p>Lattice Mico32 processor.
  This configuration is intended for embedded systems running uClinux.
  </p>
  <hr />
! <span id="loongarch"></span><span id="LoongArch"></span><h3 class="heading">LoongArch</h3>
  <p>LoongArch processor.
  The following LoongArch targets are available:
  </p><dl compact="compact">
! <dt><span><code>loongarch64-linux-gnu*</code></span></dt>
  <dd><p>LoongArch processor running GNU/Linux.  This target triplet may be coupled
  with a small set of possible suffixes to identify their default ABI type:
  </p><dl compact="compact">
! <dt><span><code>f64</code></span></dt>
  <dd><p>Uses <code>lp64d/base</code> ABI by default.
  </p></dd>
! <dt><span><code>f32</code></span></dt>
  <dd><p>Uses <code>lp64f/base</code> ABI by default.
  </p></dd>
! <dt><span><code>sf</code></span></dt>
  <dd><p>Uses <code>lp64s/base</code> ABI by default.
  </p></dd>
  </dl>
  
  </dd>
! <dt><span><code>loongarch64-linux-gnu</code></span></dt>
  <dd><p>Same as <code>loongarch64-linux-gnuf64</code>, but may be used with
  <samp>--with-abi=*</samp> to configure the default ABI type.
  </p></dd>
*************** with a small set of possible suffixes to
*** 858,877 ****
  <a href="https://github.com/loongson/LoongArch-Documentation">https://github.com/loongson/LoongArch-Documentation</a>.
  </p>
  <hr />
! <a name="m32c-x-elf"></a><a name="m32c-*-elf"></a>
! <h3 class="heading">m32c-*-elf</h3>
  <p>Renesas M32C processor.
  This configuration is intended for embedded systems.
  </p>
  <hr />
! <a name="m32r-x-elf"></a><a name="m32r-*-elf"></a>
! <h3 class="heading">m32r-*-elf</h3>
  <p>Renesas M32R processor.
  This configuration is intended for embedded systems.
  </p>
  <hr />
! <a name="m68k-x-x"></a><a name="m68k-*-*"></a>
! <h3 class="heading">m68k-*-*</h3>
  <p>By default,
  &lsquo;<samp>m68k-*-elf*</samp>&rsquo;, &lsquo;<samp>m68k-*-rtems</samp>&rsquo;,  &lsquo;<samp>m68k-*-uclinux</samp>&rsquo; and
  &lsquo;<samp>m68k-*-linux</samp>&rsquo;
--- 823,839 ----
  <a href="https://github.com/loongson/LoongArch-Documentation">https://github.com/loongson/LoongArch-Documentation</a>.
  </p>
  <hr />
! <span id="m32c-x-elf"></span><span id="m32c-*-elf"></span><h3 class="heading">m32c-*-elf</h3>
  <p>Renesas M32C processor.
  This configuration is intended for embedded systems.
  </p>
  <hr />
! <span id="m32r-x-elf"></span><span id="m32r-*-elf"></span><h3 class="heading">m32r-*-elf</h3>
  <p>Renesas M32R processor.
  This configuration is intended for embedded systems.
  </p>
  <hr />
! <span id="m68k-x-x"></span><span id="m68k-*-*"></span><h3 class="heading">m68k-*-*</h3>
  <p>By default,
  &lsquo;<samp>m68k-*-elf*</samp>&rsquo;, &lsquo;<samp>m68k-*-rtems</samp>&rsquo;,  &lsquo;<samp>m68k-*-uclinux</samp>&rsquo; and
  &lsquo;<samp>m68k-*-linux</samp>&rsquo;
*************** be a <samp>-mcpu</samp> argument or one
*** 897,918 ****
  <p>GCC requires at least binutils version 2.17 on these targets.
  </p>
  <hr />
! <a name="m68k-x-uclinux"></a><a name="m68k-*-uclinux"></a>
! <h3 class="heading">m68k-*-uclinux</h3>
  <p>GCC 4.3 changed the uClinux configuration so that it uses the
  &lsquo;<samp>m68k-linux-gnu</samp>&rsquo; ABI rather than the &lsquo;<samp>m68k-elf</samp>&rsquo; ABI.
  It also added improved support for C++ and flat shared libraries,
  both of which were ABI changes.
  </p>
  <hr />
! <a name="microblaze-x-elf"></a><a name="microblaze-*-elf"></a>
! <h3 class="heading">microblaze-*-elf</h3>
  <p>Xilinx MicroBlaze processor.
  This configuration is intended for embedded systems.
  </p>
  <hr />
! <a name="mips-x-x"></a><a name="mips-*-*"></a>
! <h3 class="heading">mips-*-*</h3>
  <p>If on a MIPS system you get an error message saying &ldquo;does not have gp
  sections for all it&rsquo;s [sic] sectons [sic]&rdquo;, don&rsquo;t worry about it.  This
  happens whenever you use GAS with the MIPS linker, but there is not
--- 859,877 ----
  <p>GCC requires at least binutils version 2.17 on these targets.
  </p>
  <hr />
! <span id="m68k-x-uclinux"></span><span id="m68k-*-uclinux"></span><h3 class="heading">m68k-*-uclinux</h3>
  <p>GCC 4.3 changed the uClinux configuration so that it uses the
  &lsquo;<samp>m68k-linux-gnu</samp>&rsquo; ABI rather than the &lsquo;<samp>m68k-elf</samp>&rsquo; ABI.
  It also added improved support for C++ and flat shared libraries,
  both of which were ABI changes.
  </p>
  <hr />
! <span id="microblaze-x-elf"></span><span id="microblaze-*-elf"></span><h3 class="heading">microblaze-*-elf</h3>
  <p>Xilinx MicroBlaze processor.
  This configuration is intended for embedded systems.
  </p>
  <hr />
! <span id="mips-x-x"></span><span id="mips-*-*"></span><h3 class="heading">mips-*-*</h3>
  <p>If on a MIPS system you get an error message saying &ldquo;does not have gp
  sections for all it&rsquo;s [sic] sectons [sic]&rdquo;, don&rsquo;t worry about it.  This
  happens whenever you use GAS with the MIPS linker, but there is not
*************** the use of break, use the <samp>--with-d
*** 952,964 ****
  use traps on systems that support them.
  </p>
  <hr />
! <a name="moxie-x-elf"></a><a name="moxie-*-elf"></a>
! <h3 class="heading">moxie-*-elf</h3>
  <p>The moxie processor.
  </p>
  <hr />
! <a name="msp430-x-elf"></a><a name="msp430-*-elf*"></a>
! <h3 class="heading">msp430-*-elf*</h3>
  <p>TI MSP430 processor.
  This configuration is intended for embedded systems.
  </p>
--- 911,921 ----
  use traps on systems that support them.
  </p>
  <hr />
! <span id="moxie-x-elf"></span><span id="moxie-*-elf"></span><h3 class="heading">moxie-*-elf</h3>
  <p>The moxie processor.
  </p>
  <hr />
! <span id="msp430-x-elf"></span><span id="msp430-*-elf*"></span><h3 class="heading">msp430-*-elf*</h3>
  <p>TI MSP430 processor.
  This configuration is intended for embedded systems.
  </p>
*************** in a minimal run-time environment by def
*** 977,994 ****
  </li></ul>
  
  <hr />
! <a name="nds32le-x-elf"></a><a name="nds32le-*-elf"></a>
! <h3 class="heading">nds32le-*-elf</h3>
  <p>Andes NDS32 target in little endian mode.
  </p>
  <hr />
! <a name="nds32be-x-elf"></a><a name="nds32be-*-elf"></a>
! <h3 class="heading">nds32be-*-elf</h3>
  <p>Andes NDS32 target in big endian mode.
  </p>
  <hr />
! <a name="nvptx-x-none"></a><a name="nvptx-*-none"></a>
! <h3 class="heading">nvptx-*-none</h3>
  <p>Nvidia PTX target.
  </p>
  <p>Instead of GNU binutils, you will need to install
--- 934,948 ----
  </li></ul>
  
  <hr />
! <span id="nds32le-x-elf"></span><span id="nds32le-*-elf"></span><h3 class="heading">nds32le-*-elf</h3>
  <p>Andes NDS32 target in little endian mode.
  </p>
  <hr />
! <span id="nds32be-x-elf"></span><span id="nds32be-*-elf"></span><h3 class="heading">nds32be-*-elf</h3>
  <p>Andes NDS32 target in big endian mode.
  </p>
  <hr />
! <span id="nvptx-x-none"></span><span id="nvptx-*-none"></span><h3 class="heading">nvptx-*-none</h3>
  <p>Nvidia PTX target.
  </p>
  <p>Instead of GNU binutils, you will need to install
*************** the GCC sources.
*** 1005,1031 ****
  <samp>--enable-newlib-io-long-long</samp> options when configuring.
  </p>
  <hr />
! <a name="or1k-x-elf"></a><a name="or1k-*-elf"></a>
! <h3 class="heading">or1k-*-elf</h3>
  <p>The OpenRISC 1000 32-bit processor with delay slots.
  This configuration is intended for embedded systems.
  </p>
  <hr />
! <a name="or1k-x-linux"></a><a name="or1k-*-linux"></a>
! <h3 class="heading">or1k-*-linux</h3>
  <p>The OpenRISC 1000 32-bit processor with delay slots.
  </p>
  <hr />
! <a name="powerpc-x-x"></a><a name="powerpc-*-*"></a>
! <h3 class="heading">powerpc-*-*</h3>
  <p>You can specify a default version for the <samp>-mcpu=<var>cpu_type</var></samp>
  switch by using the configure option <samp>--with-cpu-<var>cpu_type</var></samp>.
  </p>
  <p>You will need GNU binutils 2.20 or newer.
  </p>
  <hr />
! <a name="powerpc-x-darwin"></a><a name="powerpc-*-darwin*"></a>
! <h3 class="heading">powerpc-*-darwin*</h3>
  <p>PowerPC running Darwin (Mac OS X kernel).
  </p>
  <p>Pre-installed versions of Mac OS X may not include any developer tools,
--- 959,981 ----
  <samp>--enable-newlib-io-long-long</samp> options when configuring.
  </p>
  <hr />
! <span id="or1k-x-elf"></span><span id="or1k-*-elf"></span><h3 class="heading">or1k-*-elf</h3>
  <p>The OpenRISC 1000 32-bit processor with delay slots.
  This configuration is intended for embedded systems.
  </p>
  <hr />
! <span id="or1k-x-linux"></span><span id="or1k-*-linux"></span><h3 class="heading">or1k-*-linux</h3>
  <p>The OpenRISC 1000 32-bit processor with delay slots.
  </p>
  <hr />
! <span id="powerpc-x-x"></span><span id="powerpc-*-*"></span><h3 class="heading">powerpc-*-*</h3>
  <p>You can specify a default version for the <samp>-mcpu=<var>cpu_type</var></samp>
  switch by using the configure option <samp>--with-cpu-<var>cpu_type</var></samp>.
  </p>
  <p>You will need GNU binutils 2.20 or newer.
  </p>
  <hr />
! <span id="powerpc-x-darwin"></span><span id="powerpc-*-darwin*"></span><h3 class="heading">powerpc-*-darwin*</h3>
  <p>PowerPC running Darwin (Mac OS X kernel).
  </p>
  <p>Pre-installed versions of Mac OS X may not include any developer tools,
*************** cctools-590.36 package referenced from
*** 1039,1141 ****
  on systems older than 10.3.9 (aka darwin7.9.0).
  </p>
  <hr />
! <a name="powerpc-x-elf"></a><a name="powerpc-*-elf"></a>
! <h3 class="heading">powerpc-*-elf</h3>
  <p>PowerPC system in big endian mode, running System V.4.
  </p>
  <hr />
! <a name="powerpc-x-linux-gnu"></a><a name="powerpc*-*-linux-gnu*"></a>
! <h3 class="heading">powerpc*-*-linux-gnu*</h3>
  <p>PowerPC system in big endian mode running Linux.
  </p>
  <hr />
! <a name="powerpc-x-netbsd"></a><a name="powerpc-*-netbsd*"></a>
! <h3 class="heading">powerpc-*-netbsd*</h3>
  <p>PowerPC system in big endian mode running NetBSD.
  </p>
  <hr />
! <a name="powerpc-x-eabisim"></a><a name="powerpc-*-eabisim"></a>
! <h3 class="heading">powerpc-*-eabisim</h3>
  <p>Embedded PowerPC system in big endian mode for use in running under the
  PSIM simulator.
  </p>
  <hr />
! <a name="powerpc-x-eabi"></a><a name="powerpc-*-eabi"></a>
! <h3 class="heading">powerpc-*-eabi</h3>
  <p>Embedded PowerPC system in big endian mode.
  </p>
  <hr />
! <a name="powerpcle-x-elf"></a><a name="powerpcle-*-elf"></a>
! <h3 class="heading">powerpcle-*-elf</h3>
  <p>PowerPC system in little endian mode, running System V.4.
  </p>
  <hr />
! <a name="powerpcle-x-eabisim"></a><a name="powerpcle-*-eabisim"></a>
! <h3 class="heading">powerpcle-*-eabisim</h3>
  <p>Embedded PowerPC system in little endian mode for use in running under
  the PSIM simulator.
  </p>
  <hr />
! <a name="powerpcle-x-eabi"></a><a name="powerpcle-*-eabi"></a>
! <h3 class="heading">powerpcle-*-eabi</h3>
  <p>Embedded PowerPC system in little endian mode.
  </p>
  <hr />
! <a name="rl78-x-elf"></a><a name="rl78-*-elf"></a>
! <h3 class="heading">rl78-*-elf</h3>
  <p>The Renesas RL78 processor.
  This configuration is intended for embedded systems.
  </p>
  <hr />
! <a name="riscv32-x-elf"></a><a name="riscv32-*-elf"></a>
! <h3 class="heading">riscv32-*-elf</h3>
  <p>The RISC-V RV32 instruction set.
  This configuration is intended for embedded systems.
  This (and all other RISC-V) targets require the binutils 2.30 release.
  </p>
  <hr />
! <a name="riscv32-x-linux"></a><a name="riscv32-*-linux"></a>
! <h3 class="heading">riscv32-*-linux</h3>
  <p>The RISC-V RV32 instruction set running GNU/Linux.
  This (and all other RISC-V) targets require the binutils 2.30 release.
  </p>
  <hr />
! <a name="riscv64-x-elf"></a><a name="riscv64-*-elf"></a>
! <h3 class="heading">riscv64-*-elf</h3>
  <p>The RISC-V RV64 instruction set.
  This configuration is intended for embedded systems.
  This (and all other RISC-V) targets require the binutils 2.30 release.
  </p>
  <hr />
! <a name="riscv64-x-linux"></a><a name="riscv64-*-linux"></a>
! <h3 class="heading">riscv64-*-linux</h3>
  <p>The RISC-V RV64 instruction set running GNU/Linux.
  This (and all other RISC-V) targets require the binutils 2.30 release.
  </p>
  <hr />
! <a name="rx-x-elf"></a><a name="rx-*-elf"></a>
! <h3 class="heading">rx-*-elf</h3>
  <p>The Renesas RX processor.
  </p>
  <hr />
! <a name="s390-x-linux"></a><a name="s390-*-linux*"></a>
! <h3 class="heading">s390-*-linux*</h3>
  <p>S/390 system running GNU/Linux for S/390.
  </p>
  <hr />
! <a name="s390x-x-linux"></a><a name="s390x-*-linux*"></a>
! <h3 class="heading">s390x-*-linux*</h3>
  <p>zSeries system (64-bit) running GNU/Linux for zSeries.
  </p>
  <hr />
! <a name="s390x-ibm-tpf"></a><a name="s390x-ibm-tpf*"></a>
! <h3 class="heading">s390x-ibm-tpf*</h3>
  <p>zSeries system (64-bit) running TPF.  This platform is
  supported as cross-compilation target only.
  </p>
  <hr />
! <a name="x-x-solaris2"></a><a name="g_t*-*-solaris2*"></a>
! <h3 class="heading">*-*-solaris2*</h3>
  <p>Support for Solaris 10 has been removed in GCC 10.  Support for Solaris
  9 has been removed in GCC 5.  Support for Solaris 8 has been removed in
  GCC 4.8.  Support for Solaris 7 has been removed in GCC 4.6.
--- 989,1073 ----
  on systems older than 10.3.9 (aka darwin7.9.0).
  </p>
  <hr />
! <span id="powerpc-x-elf"></span><span id="powerpc-*-elf"></span><h3 class="heading">powerpc-*-elf</h3>
  <p>PowerPC system in big endian mode, running System V.4.
  </p>
  <hr />
! <span id="powerpc-x-linux-gnu"></span><span id="powerpc*-*-linux-gnu*"></span><h3 class="heading">powerpc*-*-linux-gnu*</h3>
  <p>PowerPC system in big endian mode running Linux.
  </p>
  <hr />
! <span id="powerpc-x-netbsd"></span><span id="powerpc-*-netbsd*"></span><h3 class="heading">powerpc-*-netbsd*</h3>
  <p>PowerPC system in big endian mode running NetBSD.
  </p>
  <hr />
! <span id="powerpc-x-eabisim"></span><span id="powerpc-*-eabisim"></span><h3 class="heading">powerpc-*-eabisim</h3>
  <p>Embedded PowerPC system in big endian mode for use in running under the
  PSIM simulator.
  </p>
  <hr />
! <span id="powerpc-x-eabi"></span><span id="powerpc-*-eabi"></span><h3 class="heading">powerpc-*-eabi</h3>
  <p>Embedded PowerPC system in big endian mode.
  </p>
  <hr />
! <span id="powerpcle-x-elf"></span><span id="powerpcle-*-elf"></span><h3 class="heading">powerpcle-*-elf</h3>
  <p>PowerPC system in little endian mode, running System V.4.
  </p>
  <hr />
! <span id="powerpcle-x-eabisim"></span><span id="powerpcle-*-eabisim"></span><h3 class="heading">powerpcle-*-eabisim</h3>
  <p>Embedded PowerPC system in little endian mode for use in running under
  the PSIM simulator.
  </p>
  <hr />
! <span id="powerpcle-x-eabi"></span><span id="powerpcle-*-eabi"></span><h3 class="heading">powerpcle-*-eabi</h3>
  <p>Embedded PowerPC system in little endian mode.
  </p>
  <hr />
! <span id="rl78-x-elf"></span><span id="rl78-*-elf"></span><h3 class="heading">rl78-*-elf</h3>
  <p>The Renesas RL78 processor.
  This configuration is intended for embedded systems.
  </p>
  <hr />
! <span id="riscv32-x-elf"></span><span id="riscv32-*-elf"></span><h3 class="heading">riscv32-*-elf</h3>
  <p>The RISC-V RV32 instruction set.
  This configuration is intended for embedded systems.
  This (and all other RISC-V) targets require the binutils 2.30 release.
  </p>
  <hr />
! <span id="riscv32-x-linux"></span><span id="riscv32-*-linux"></span><h3 class="heading">riscv32-*-linux</h3>
  <p>The RISC-V RV32 instruction set running GNU/Linux.
  This (and all other RISC-V) targets require the binutils 2.30 release.
  </p>
  <hr />
! <span id="riscv64-x-elf"></span><span id="riscv64-*-elf"></span><h3 class="heading">riscv64-*-elf</h3>
  <p>The RISC-V RV64 instruction set.
  This configuration is intended for embedded systems.
  This (and all other RISC-V) targets require the binutils 2.30 release.
  </p>
  <hr />
! <span id="riscv64-x-linux"></span><span id="riscv64-*-linux"></span><h3 class="heading">riscv64-*-linux</h3>
  <p>The RISC-V RV64 instruction set running GNU/Linux.
  This (and all other RISC-V) targets require the binutils 2.30 release.
  </p>
  <hr />
! <span id="rx-x-elf"></span><span id="rx-*-elf"></span><h3 class="heading">rx-*-elf</h3>
  <p>The Renesas RX processor.
  </p>
  <hr />
! <span id="s390-x-linux"></span><span id="s390-*-linux*"></span><h3 class="heading">s390-*-linux*</h3>
  <p>S/390 system running GNU/Linux for S/390.
  </p>
  <hr />
! <span id="s390x-x-linux"></span><span id="s390x-*-linux*"></span><h3 class="heading">s390x-*-linux*</h3>
  <p>zSeries system (64-bit) running GNU/Linux for zSeries.
  </p>
  <hr />
! <span id="s390x-ibm-tpf"></span><span id="s390x-ibm-tpf*"></span><h3 class="heading">s390x-ibm-tpf*</h3>
  <p>zSeries system (64-bit) running TPF.  This platform is
  supported as cross-compilation target only.
  </p>
  <hr />
! <span id="x-x-solaris2"></span><span id="g_t*-*-solaris2*"></span><h3 class="heading">*-*-solaris2*</h3>
  <p>Support for Solaris 10 has been removed in GCC 10.  Support for Solaris
  9 has been removed in GCC 5.  Support for Solaris 8 has been removed in
  GCC 4.8.  Support for Solaris 7 has been removed in GCC 4.6.
*************** you can install a pre-built GCC to boots
*** 1150,1157 ****
  &lsquo;<samp>libstdc++-v3</samp>&rsquo;.  We therefore recommend using the
  following initial sequence of commands
  </p>
! <div class="smallexample">
! <pre class="smallexample">% CONFIG_SHELL=/bin/ksh
  % export CONFIG_SHELL
  </pre></div>
  
--- 1082,1089 ----
  &lsquo;<samp>libstdc++-v3</samp>&rsquo;.  We therefore recommend using the
  following initial sequence of commands
  </p>
! <div class="example">
! <pre class="example">% CONFIG_SHELL=/bin/ksh
  % export CONFIG_SHELL
  </pre></div>
  
*************** need to provide a more recent one.
*** 1215,1222 ****
  </li></ul>
  
  <hr />
! <a name="sparc-x-x"></a><a name="sparc*-*-*"></a>
! <h3 class="heading">sparc*-*-*</h3>
  <p>This section contains general configuration information for all
  SPARC-based platforms.  In addition to reading this section, please
  read all other sections that match your target.
--- 1147,1153 ----
  </li></ul>
  
  <hr />
! <span id="sparc-x-x"></span><span id="sparc*-*-*"></span><h3 class="heading">sparc*-*-*</h3>
  <p>This section contains general configuration information for all
  SPARC-based platforms.  In addition to reading this section, please
  read all other sections that match your target.
*************** of the exact versions of these libraries
*** 1228,1235 ****
  in <a href="prerequisites.html">the prerequisites</a>.
  </p>
  <hr />
! <a name="sparc-sun-solaris2"></a><a name="sparc-sun-solaris2*"></a>
! <h3 class="heading">sparc-sun-solaris2*</h3>
  <p>When GCC is configured to use GNU binutils 2.14 or later, the binaries
  produced are smaller than the ones produced using Solaris native tools;
  this difference is quite significant for binaries containing debugging
--- 1159,1165 ----
  in <a href="prerequisites.html">the prerequisites</a>.
  </p>
  <hr />
! <span id="sparc-sun-solaris2"></span><span id="sparc-sun-solaris2*"></span><h3 class="heading">sparc-sun-solaris2*</h3>
  <p>When GCC is configured to use GNU binutils 2.14 or later, the binaries
  produced are smaller than the ones produced using Solaris native tools;
  this difference is quite significant for binaries containing debugging
*************** target triplet must be specified as the
*** 1249,1265 ****
  configure line.  This target triplet can be obtained by invoking <code>./config.guess</code> in the toplevel source directory of GCC (and
  not that of GMP or MPFR or MPC).  For example on a Solaris 11 system:
  </p>
! <div class="smallexample">
! <pre class="smallexample">% ./configure --build=sparc-sun-solaris2.11 --prefix=xxx
  </pre></div>
  
  <hr />
! <a name="sparc-x-linux"></a><a name="sparc-*-linux*"></a>
! <h3 class="heading">sparc-*-linux*</h3>
  
  <hr />
! <a name="sparc64-x-solaris2"></a><a name="sparc64-*-solaris2*"></a>
! <h3 class="heading">sparc64-*-solaris2*</h3>
  <p>When configuring a 64-bit-default GCC on Solaris/SPARC, you must use a
  build compiler that generates 64-bit code, either by default or by
  specifying &lsquo;<samp>CC='gcc -m64' CXX='gcc-m64'</samp>&rsquo; to <code>configure</code>.
--- 1179,1193 ----
  configure line.  This target triplet can be obtained by invoking <code>./config.guess</code> in the toplevel source directory of GCC (and
  not that of GMP or MPFR or MPC).  For example on a Solaris 11 system:
  </p>
! <div class="example">
! <pre class="example">% ./configure --build=sparc-sun-solaris2.11 --prefix=xxx
  </pre></div>
  
  <hr />
! <span id="sparc-x-linux"></span><span id="sparc-*-linux*"></span><h3 class="heading">sparc-*-linux*</h3>
  
  <hr />
! <span id="sparc64-x-solaris2"></span><span id="sparc64-*-solaris2*"></span><h3 class="heading">sparc64-*-solaris2*</h3>
  <p>When configuring a 64-bit-default GCC on Solaris/SPARC, you must use a
  build compiler that generates 64-bit code, either by default or by
  specifying &lsquo;<samp>CC='gcc -m64' CXX='gcc-m64'</samp>&rsquo; to <code>configure</code>.
*************** library or the MPC library, the canonica
*** 1272,1318 ****
  as the <code>build</code> parameter on the configure line.  For example
  on a Solaris 11 system:
  </p>
! <div class="smallexample">
! <pre class="smallexample">% ./configure --build=sparc64-sun-solaris2.11 --prefix=xxx
  </pre></div>
  
  <hr />
! <a name="sparcv9-x-solaris2"></a><a name="sparcv9-*-solaris2*"></a>
! <h3 class="heading">sparcv9-*-solaris2*</h3>
  <p>This is a synonym for &lsquo;<samp>sparc64-*-solaris2*</samp>&rsquo;.
  </p>
  <hr />
! <a name="c6x-x-x"></a><a name="c6x-*-*"></a>
! <h3 class="heading">c6x-*-*</h3>
  <p>The C6X family of processors. This port requires binutils-2.22 or newer.
  </p>
  <hr />
! <a name="tilegx-*-linux"></a><a name="tilegx-*-linux*"></a>
! <h3 class="heading">tilegx-*-linux*</h3>
  <p>The TILE-Gx processor in little endian mode, running GNU/Linux.  This
  port requires binutils-2.22 or newer.
  </p>
  <hr />
! <a name="tilegxbe-*-linux"></a><a name="tilegxbe-*-linux*"></a>
! <h3 class="heading">tilegxbe-*-linux*</h3>
  <p>The TILE-Gx processor in big endian mode, running GNU/Linux.  This
  port requires binutils-2.23 or newer.
  </p>
  <hr />
! <a name="tilepro-*-linux"></a><a name="tilepro-*-linux*"></a>
! <h3 class="heading">tilepro-*-linux*</h3>
  <p>The TILEPro processor running GNU/Linux.  This port requires
  binutils-2.22 or newer.
  </p>
  <hr />
! <a name="visium-x-elf"></a><a name="visium-*-elf"></a>
! <h3 class="heading">visium-*-elf</h3>
  <p>CDS VISIUMcore processor.
  This configuration is intended for embedded systems.
  </p>
  <hr />
! <a name="x-x-vxworks"></a><a name="g_t*-*-vxworks*"></a>
! <h3 class="heading">*-*-vxworks*</h3>
  <p>Support for VxWorks is in flux.  At present GCC supports <em>only</em> the
  very recent VxWorks 5.5 (aka Tornado 2.2) release, and only on PowerPC.
  We welcome patches for other architectures supported by VxWorks 5.5.
--- 1200,1239 ----
  as the <code>build</code> parameter on the configure line.  For example
  on a Solaris 11 system:
  </p>
! <div class="example">
! <pre class="example">% ./configure --build=sparc64-sun-solaris2.11 --prefix=xxx
  </pre></div>
  
  <hr />
! <span id="sparcv9-x-solaris2"></span><span id="sparcv9-*-solaris2*"></span><h3 class="heading">sparcv9-*-solaris2*</h3>
  <p>This is a synonym for &lsquo;<samp>sparc64-*-solaris2*</samp>&rsquo;.
  </p>
  <hr />
! <span id="c6x-x-x"></span><span id="c6x-*-*"></span><h3 class="heading">c6x-*-*</h3>
  <p>The C6X family of processors. This port requires binutils-2.22 or newer.
  </p>
  <hr />
! <span id="tilegx-*-linux"></span><span id="tilegx-*-linux*"></span><h3 class="heading">tilegx-*-linux*</h3>
  <p>The TILE-Gx processor in little endian mode, running GNU/Linux.  This
  port requires binutils-2.22 or newer.
  </p>
  <hr />
! <span id="tilegxbe-*-linux"></span><span id="tilegxbe-*-linux*"></span><h3 class="heading">tilegxbe-*-linux*</h3>
  <p>The TILE-Gx processor in big endian mode, running GNU/Linux.  This
  port requires binutils-2.23 or newer.
  </p>
  <hr />
! <span id="tilepro-*-linux"></span><span id="tilepro-*-linux*"></span><h3 class="heading">tilepro-*-linux*</h3>
  <p>The TILEPro processor running GNU/Linux.  This port requires
  binutils-2.22 or newer.
  </p>
  <hr />
! <span id="visium-x-elf"></span><span id="visium-*-elf"></span><h3 class="heading">visium-*-elf</h3>
  <p>CDS VISIUMcore processor.
  This configuration is intended for embedded systems.
  </p>
  <hr />
! <span id="x-x-vxworks"></span><span id="g_t*-*-vxworks*"></span><h3 class="heading">*-*-vxworks*</h3>
  <p>Support for VxWorks is in flux.  At present GCC supports <em>only</em> the
  very recent VxWorks 5.5 (aka Tornado 2.2) release, and only on PowerPC.
  We welcome patches for other architectures supported by VxWorks 5.5.
*************** that file to add the module to your kern
*** 1345,1360 ****
  VxWorks will incorporate this module.)
  </p>
  <hr />
! <a name="x86-64-x-x"></a><a name="x86_005f64-*-*_002c-amd64-*-*"></a>
! <h3 class="heading">x86_64-*-*, amd64-*-*</h3>
  <p>GCC supports the x86-64 architecture implemented by the AMD64 processor
  (amd64-*-* is an alias for x86_64-*-*) on GNU/Linux, FreeBSD and NetBSD.
  On GNU/Linux the default is a bi-arch compiler which is able to generate
  both 64-bit x86-64 and 32-bit x86 code (via the <samp>-m32</samp> switch).
  </p>
  <hr />
! <a name="x86-64-x-solaris2"></a><a name="x86_005f64-*-solaris2*"></a>
! <h3 class="heading">x86_64-*-solaris2*</h3>
  <p>GCC also supports the x86-64 architecture implemented by the AMD64
  processor (&lsquo;<samp>amd64-*-*</samp>&rsquo; is an alias for &lsquo;<samp>x86_64-*-*</samp>&rsquo;) on
  Solaris 10 or later.  Unlike other systems, without special options a
--- 1266,1279 ----
  VxWorks will incorporate this module.)
  </p>
  <hr />
! <span id="x86-64-x-x"></span><span id="x86_005f64-*-*_002c-amd64-*-*"></span><h3 class="heading">x86_64-*-*, amd64-*-*</h3>
  <p>GCC supports the x86-64 architecture implemented by the AMD64 processor
  (amd64-*-* is an alias for x86_64-*-*) on GNU/Linux, FreeBSD and NetBSD.
  On GNU/Linux the default is a bi-arch compiler which is able to generate
  both 64-bit x86-64 and 32-bit x86 code (via the <samp>-m32</samp> switch).
  </p>
  <hr />
! <span id="x86-64-x-solaris2"></span><span id="x86_005f64-*-solaris2*"></span><h3 class="heading">x86_64-*-solaris2*</h3>
  <p>GCC also supports the x86-64 architecture implemented by the AMD64
  processor (&lsquo;<samp>amd64-*-*</samp>&rsquo; is an alias for &lsquo;<samp>x86_64-*-*</samp>&rsquo;) on
  Solaris 10 or later.  Unlike other systems, without special options a
*************** as 64-bit code, configure with <samp>--t
*** 1367,1374 ****
  and &lsquo;<samp>CC=gcc -m64</samp>&rsquo;.
  </p>
  <hr />
! <a name="xtensa-x-elf"></a><a name="xtensa*-*-elf"></a>
! <h3 class="heading">xtensa*-*-elf</h3>
  <p>This target is intended for embedded Xtensa systems using the
  &lsquo;<samp>newlib</samp>&rsquo; C library.  It uses ELF but does not support shared
  objects.  Designed-defined instructions specified via the
--- 1286,1292 ----
  and &lsquo;<samp>CC=gcc -m64</samp>&rsquo;.
  </p>
  <hr />
! <span id="xtensa-x-elf"></span><span id="xtensa*-*-elf"></span><h3 class="heading">xtensa*-*-elf</h3>
  <p>This target is intended for embedded Xtensa systems using the
  &lsquo;<samp>newlib</samp>&rsquo; C library.  It uses ELF but does not support shared
  objects.  Designed-defined instructions specified via the
*************** downloaded files include a customized co
*** 1383,1390 ****
  which you can use to replace the default header file.
  </p>
  <hr />
! <a name="xtensa-x-linux"></a><a name="xtensa*-*-linux*"></a>
! <h3 class="heading">xtensa*-*-linux*</h3>
  <p>This target is for Xtensa systems running GNU/Linux.  It supports ELF
  shared objects and the GNU C library (glibc).  It also generates
  position-independent code (PIC) regardless of whether the
--- 1301,1307 ----
  which you can use to replace the default header file.
  </p>
  <hr />
! <span id="xtensa-x-linux"></span><span id="xtensa*-*-linux*"></span><h3 class="heading">xtensa*-*-linux*</h3>
  <p>This target is for Xtensa systems running GNU/Linux.  It supports ELF
  shared objects and the GNU C library (glibc).  It also generates
  position-independent code (PIC) regardless of whether the
*************** respects, this target is the same as the
*** 1393,1411 ****
  <a href="#xtensa*-*-elf">&lsquo;<samp>xtensa*-*-elf</samp>&rsquo;</a> target.
  </p>
  <hr />
! <a name="windows"></a><a name="Microsoft-Windows"></a>
! <h3 class="heading">Microsoft Windows</h3>
  
! <a name="Intel-16-bit-versions"></a>
! <h4 class="subheading">Intel 16-bit versions</h4>
  <p>The 16-bit versions of Microsoft Windows, such as Windows 3.1, are not
  supported.
  </p>
  <p>However, the 32-bit port has limited support for Microsoft
  Windows 3.11 in the Win32s environment, as a target only.  See below.
  </p>
! <a name="Intel-32-bit-versions"></a>
! <h4 class="subheading">Intel 32-bit versions</h4>
  <p>The 32-bit versions of Windows, including Windows 95, Windows NT, Windows
  XP, and Windows Vista, are supported by several different target
  platforms.  These targets differ in which Windows subsystem they target
--- 1310,1325 ----
  <a href="#xtensa*-*-elf">&lsquo;<samp>xtensa*-*-elf</samp>&rsquo;</a> target.
  </p>
  <hr />
! <span id="windows"></span><span id="Microsoft-Windows"></span><h3 class="heading">Microsoft Windows</h3>
  
! <span id="Intel-16-bit-versions"></span><h4 class="subheading">Intel 16-bit versions</h4>
  <p>The 16-bit versions of Microsoft Windows, such as Windows 3.1, are not
  supported.
  </p>
  <p>However, the 32-bit port has limited support for Microsoft
  Windows 3.11 in the Win32s environment, as a target only.  See below.
  </p>
! <span id="Intel-32-bit-versions"></span><h4 class="subheading">Intel 32-bit versions</h4>
  <p>The 32-bit versions of Windows, including Windows 95, Windows NT, Windows
  XP, and Windows Vista, are supported by several different target
  platforms.  These targets differ in which Windows subsystem they target
*************** the Win32 subsystem that provides a subs
*** 1420,1438 ****
  <a href="https://www.mkssoftware.com">https://www.mkssoftware.com</a> for more information.
  </li></ul>
  
! <a name="Intel-64-bit-versions"></a>
! <h4 class="subheading">Intel 64-bit versions</h4>
  <p>GCC contains support for x86-64 using the mingw-w64
  runtime library, available from <a href="https://www.mingw-w64.org/downloads/">https://www.mingw-w64.org/downloads/</a>.
  This library should be used with the target triple x86_64-pc-mingw32.
  </p>
! <a name="Windows-CE"></a>
! <h4 class="subheading">Windows CE</h4>
  <p>Windows CE is supported as a target only on Hitachi
  SuperH (sh-wince-pe), and MIPS (mips-wince-pe).
  </p>
! <a name="Other-Windows-Platforms"></a>
! <h4 class="subheading">Other Windows Platforms</h4>
  <p>GCC no longer supports Windows NT on the Alpha or PowerPC.
  </p>
  <p>GCC no longer supports the Windows POSIX subsystem.  However, it does
--- 1334,1349 ----
  <a href="https://www.mkssoftware.com">https://www.mkssoftware.com</a> for more information.
  </li></ul>
  
! <span id="Intel-64-bit-versions"></span><h4 class="subheading">Intel 64-bit versions</h4>
  <p>GCC contains support for x86-64 using the mingw-w64
  runtime library, available from <a href="https://www.mingw-w64.org/downloads/">https://www.mingw-w64.org/downloads/</a>.
  This library should be used with the target triple x86_64-pc-mingw32.
  </p>
! <span id="Windows-CE"></span><h4 class="subheading">Windows CE</h4>
  <p>Windows CE is supported as a target only on Hitachi
  SuperH (sh-wince-pe), and MIPS (mips-wince-pe).
  </p>
! <span id="Other-Windows-Platforms"></span><h4 class="subheading">Other Windows Platforms</h4>
  <p>GCC no longer supports Windows NT on the Alpha or PowerPC.
  </p>
  <p>GCC no longer supports the Windows POSIX subsystem.  However, it does
*************** be inactive.  See <a href="http://pw32.s
*** 1446,1453 ****
  <p>UWIN support has been removed due to a lack of maintenance.
  </p>
  <hr />
! <a name="x-x-cygwin"></a><a name="g_t*-*-cygwin"></a>
! <h3 class="heading">*-*-cygwin</h3>
  <p>Ports of GCC are included with the
  <a href="http://www.cygwin.com/">Cygwin environment</a>.
  </p>
--- 1357,1363 ----
  <p>UWIN support has been removed due to a lack of maintenance.
  </p>
  <hr />
! <span id="x-x-cygwin"></span><span id="g_t*-*-cygwin"></span><h3 class="heading">*-*-cygwin</h3>
  <p>Ports of GCC are included with the
  <a href="http://www.cygwin.com/">Cygwin environment</a>.
  </p>
*************** the latest official GNU binutils release
*** 1461,1468 ****
  or version 2.20 or above if building your own.
  </p>
  <hr />
! <a name="x-x-mingw32"></a><a name="g_t*-*-mingw32"></a>
! <h3 class="heading">*-*-mingw32</h3>
  <p>GCC will build with and support only MinGW runtime 3.12 and later.
  Earlier versions of headers are incompatible with the new default semantics
  of <code>extern inline</code> in <code>-std=c99</code> and <code>-std=gnu99</code> modes.
--- 1371,1377 ----
  or version 2.20 or above if building your own.
  </p>
  <hr />
! <span id="x-x-mingw32"></span><span id="g_t*-*-mingw32"></span><h3 class="heading">*-*-mingw32</h3>
  <p>GCC will build with and support only MinGW runtime 3.12 and later.
  Earlier versions of headers are incompatible with the new default semantics
  of <code>extern inline</code> in <code>-std=c99</code> and <code>-std=gnu99</code> modes.
*************** version 2.16 or above containing support
*** 1472,1479 ****
  assembler pseudo-op.
  </p>
  <hr />
! <a name="older"></a><a name="Older-systems"></a>
! <h3 class="heading">Older systems</h3>
  <p>GCC contains support files for many older (1980s and early
  1990s) Unix variants.  For the most part, support for these systems
  has not been deliberately removed, but it has not been maintained for
--- 1381,1387 ----
  assembler pseudo-op.
  </p>
  <hr />
! <span id="older"></span><span id="Older-systems"></span><h3 class="heading">Older systems</h3>
  <p>GCC contains support files for many older (1980s and early
  1990s) Unix variants.  For the most part, support for these systems
  has not been deliberately removed, but it has not been maintained for
*************** about GCC on such systems (which may no
*** 1516,1523 ****
  current GCC) is to be found in the GCC texinfo manual.
  </p>
  <hr />
! <a name="elf"></a><a name="all-ELF-targets-_0028SVR4_002c-Solaris-2_002c-etc_002e_0029"></a>
! <h3 class="heading">all ELF targets (SVR4, Solaris 2, etc.)</h3>
  <p>C++ support is significantly better on ELF targets if you use the
  <a href="./configure.html#with-gnu-ld">GNU linker</a>; duplicate copies of
  inlines, vtables and template instantiations will be discarded
--- 1424,1430 ----
  current GCC) is to be found in the GCC texinfo manual.
  </p>
  <hr />
! <span id="elf"></span><span id="all-ELF-targets-_0028SVR4_002c-Solaris-2_002c-etc_002e_0029"></span><h3 class="heading">all ELF targets (SVR4, Solaris 2, etc.)</h3>
  <p>C++ support is significantly better on ELF targets if you use the
  <a href="./configure.html#with-gnu-ld">GNU linker</a>; duplicate copies of
  inlines, vtables and template instantiations will be discarded
diff -Nrcpad gcc-12.3.0/INSTALL/test.html gcc-12.4.0/INSTALL/test.html
*** gcc-12.3.0/INSTALL/test.html	Mon May  8 12:15:26 2023
--- gcc-12.4.0/INSTALL/test.html	Thu Jun 20 08:10:31 2024
***************
*** 1,5 ****
--- 1,8 ----
  <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  <html>
+ <!-- Created by GNU Texinfo 6.8, https://www.gnu.org/software/texinfo/ -->
+ <head>
+ <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <!-- Copyright (C) 1988-2022 Free Software Foundation, Inc.
  
  Permission is granted to copy, distribute and/or modify this document
*************** A GNU Manual
*** 19,27 ****
  You have freedom to copy and modify this GNU Manual, like GNU
       software.  Copies published by the Free Software Foundation raise
       funds for GNU development. -->
- <!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
- <head>
- <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
  <title>Installing GCC: Testing</title>
  
  <meta name="description" content="Installing GCC: Testing">
--- 22,27 ----
*************** You have freedom to copy and modify this
*** 29,58 ****
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
  <style type="text/css">
  <!--
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
- blockquote.smallindentedblock {margin-right: 0em; font-size: smaller}
- blockquote.smallquotation {font-size: smaller}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
- div.lisp {margin-left: 3.2em}
- div.smalldisplay {margin-left: 3.2em}
- div.smallexample {margin-left: 3.2em}
- div.smalllisp {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
- pre.smalldisplay {font-family: inherit; font-size: smaller}
- pre.smallexample {font-size: smaller}
- pre.smallformat {font-family: inherit; font-size: smaller}
- pre.smalllisp {font-size: smaller}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
  ul.no-bullet {list-style: none}
  -->
  </style>
--- 29,52 ----
  <meta name="resource-type" content="document">
  <meta name="distribution" content="global">
  <meta name="Generator" content="makeinfo">
+ <meta name="viewport" content="width=device-width,initial-scale=1">
+ 
  <style type="text/css">
  <!--
+ a.copiable-anchor {visibility: hidden; text-decoration: none; line-height: 0em}
  a.summary-letter {text-decoration: none}
  blockquote.indentedblock {margin-right: 0em}
  div.display {margin-left: 3.2em}
  div.example {margin-left: 3.2em}
  kbd {font-style: oblique}
  pre.display {font-family: inherit}
  pre.format {font-family: inherit}
  pre.menu-comment {font-family: serif}
  pre.menu-preformatted {font-family: serif}
  span.nolinebreak {white-space: nowrap}
  span.roman {font-family: initial; font-weight: normal}
  span.sansserif {font-family: sans-serif; font-weight: normal}
+ span:hover a.copiable-anchor {visibility: visible}
  ul.no-bullet {list-style: none}
  -->
  </style>
*************** ul.no-bullet {list-style: none}
*** 83,91 ****
  
  
  
! <a name="index-Testing"></a>
! <a name="index-Installing-GCC_003a-Testing"></a>
! <a name="index-Testsuite"></a>
  
  <p>Before you install GCC, we encourage you to run the testsuites and to
  compare your results with results from a similar configuration that have
--- 77,85 ----
  
  
  
! <span id="index-Testing"></span>
! <span id="index-Installing-GCC_003a-Testing"></span>
! <span id="index-Testsuite"></span>
  
  <p>Before you install GCC, we encourage you to run the testsuites and to
  compare your results with results from a similar configuration that have
*************** installed are not in the <code>PATH</cod
*** 113,120 ****
  environment variables appropriately, as in the following example (which
  assumes that DejaGnu has been installed under <samp>/usr/local</samp>):
  </p>
! <div class="smallexample">
! <pre class="smallexample">TCL_LIBRARY = /usr/local/share/tcl8.0
  DEJAGNULIBS = /usr/local/share/dejagnu
  </pre></div>
  
--- 107,114 ----
  environment variables appropriately, as in the following example (which
  assumes that DejaGnu has been installed under <samp>/usr/local</samp>):
  </p>
! <div class="example">
! <pre class="example">TCL_LIBRARY = /usr/local/share/tcl8.0
  DEJAGNULIBS = /usr/local/share/dejagnu
  </pre></div>
  
*************** portability in the DejaGnu code.)
*** 124,131 ****
  </p>
  
  <p>Finally, you can run the testsuite (which may take a long time):
! </p><div class="smallexample">
! <pre class="smallexample">cd <var>objdir</var>; make -k check
  </pre></div>
  
  <p>This will test various components of GCC, such as compiler
--- 118,125 ----
  </p>
  
  <p>Finally, you can run the testsuite (which may take a long time):
! </p><div class="example">
! <pre class="example">cd <var>objdir</var>; make -k check
  </pre></div>
  
  <p>This will test various components of GCC, such as compiler
*************** might emit some harmless messages resemb
*** 137,143 ****
  <p>If you are testing a cross-compiler, you may want to run the testsuite
  on a simulator as described at <a href="https://gcc.gnu.org/simtest-howto.html">https://gcc.gnu.org/simtest-howto.html</a>.
  </p>
! <a name="How-can-you-run-the-testsuite-on-selected-tests_003f"></a>
  <h3 class="section">How can you run the testsuite on selected tests?</h3>
  
  <p>In order to run sets of tests selectively, there are targets
--- 131,137 ----
  <p>If you are testing a cross-compiler, you may want to run the testsuite
  on a simulator as described at <a href="https://gcc.gnu.org/simtest-howto.html">https://gcc.gnu.org/simtest-howto.html</a>.
  </p>
! <div class="section" id="How-can-you-run-the-testsuite-on-selected-tests_003f">
  <h3 class="section">How can you run the testsuite on selected tests?</h3>
  
  <p>In order to run sets of tests selectively, there are targets
*************** just run &lsquo;<samp>make check</samp>&
*** 152,166 ****
  <p>A more selective way to just run all <code>gcc</code> execute tests in the
  testsuite is to use
  </p>
! <div class="smallexample">
! <pre class="smallexample">make check-gcc RUNTESTFLAGS=&quot;execute.exp <var>other-options</var>&quot;
  </pre></div>
  
  <p>Likewise, in order to run only the <code>g++</code> &ldquo;old-deja&rdquo; tests in
  the testsuite with filenames matching &lsquo;<samp>9805*</samp>&rsquo;, you would use
  </p>
! <div class="smallexample">
! <pre class="smallexample">make check-g++ RUNTESTFLAGS=&quot;old-deja.exp=9805* <var>other-options</var>&quot;
  </pre></div>
  
  <p>The file-matching expression following <var>filename</var><code>.exp=</code> is treated
--- 146,160 ----
  <p>A more selective way to just run all <code>gcc</code> execute tests in the
  testsuite is to use
  </p>
! <div class="example">
! <pre class="example">make check-gcc RUNTESTFLAGS=&quot;execute.exp <var>other-options</var>&quot;
  </pre></div>
  
  <p>Likewise, in order to run only the <code>g++</code> &ldquo;old-deja&rdquo; tests in
  the testsuite with filenames matching &lsquo;<samp>9805*</samp>&rsquo;, you would use
  </p>
! <div class="example">
! <pre class="example">make check-g++ RUNTESTFLAGS=&quot;old-deja.exp=9805* <var>other-options</var>&quot;
  </pre></div>
  
  <p>The file-matching expression following <var>filename</var><code>.exp=</code> is treated
*************** as a series of whitespace-delimited glob
*** 168,175 ****
  may be passed, although any whitespace must either be escaped or surrounded by
  single quotes if multiple expressions are desired. For example,
  </p>
! <div class="smallexample">
! <pre class="smallexample">make check-g++ RUNTESTFLAGS=&quot;old-deja.exp=9805*\ virtual2.c <var>other-options</var>&quot;
  make check-g++ RUNTESTFLAGS=&quot;'old-deja.exp=9805* virtual2.c' <var>other-options</var>&quot;
  </pre></div>
  
--- 162,169 ----
  may be passed, although any whitespace must either be escaped or surrounded by
  single quotes if multiple expressions are desired. For example,
  </p>
! <div class="example">
! <pre class="example">make check-g++ RUNTESTFLAGS=&quot;old-deja.exp=9805*\ virtual2.c <var>other-options</var>&quot;
  make check-g++ RUNTESTFLAGS=&quot;'old-deja.exp=9805* virtual2.c' <var>other-options</var>&quot;
  </pre></div>
  
*************** To get a list of the possible <samp>*.ex
*** 180,186 ****
  output of &lsquo;<samp>make check</samp>&rsquo; into a file and look at the
  &lsquo;<samp>Running &hellip;  .exp</samp>&rsquo; lines.
  </p>
! <a name="Passing-options-and-running-multiple-testsuites"></a>
  <h3 class="section">Passing options and running multiple testsuites</h3>
  
  <p>You can pass multiple options to the testsuite using the
--- 174,181 ----
  output of &lsquo;<samp>make check</samp>&rsquo; into a file and look at the
  &lsquo;<samp>Running &hellip;  .exp</samp>&rsquo; lines.
  </p>
! </div>
! <div class="section" id="Passing-options-and-running-multiple-testsuites">
  <h3 class="section">Passing options and running multiple testsuites</h3>
  
  <p>You can pass multiple options to the testsuite using the
*************** output of &lsquo;<samp>make check</samp>
*** 188,195 ****
  &lsquo;<samp>RUNTESTFLAGS</samp>&rsquo;, or directly to <code>runtest</code> if you prefer to
  work outside the makefiles.  For example,
  </p>
! <div class="smallexample">
! <pre class="smallexample">make check-g++ RUNTESTFLAGS=&quot;--target_board=unix/-O3/-fmerge-constants&quot;
  </pre></div>
  
  <p>will run the standard <code>g++</code> testsuites (&ldquo;unix&rdquo; is the target name
--- 183,190 ----
  &lsquo;<samp>RUNTESTFLAGS</samp>&rsquo;, or directly to <code>runtest</code> if you prefer to
  work outside the makefiles.  For example,
  </p>
! <div class="example">
! <pre class="example">make check-g++ RUNTESTFLAGS=&quot;--target_board=unix/-O3/-fmerge-constants&quot;
  </pre></div>
  
  <p>will run the standard <code>g++</code> testsuites (&ldquo;unix&rdquo; is the target name
*************** slashes separate options.
*** 200,215 ****
  <p>You can run the testsuites multiple times using combinations of options
  with a syntax similar to the brace expansion of popular shells:
  </p>
! <div class="smallexample">
! <pre class="smallexample">&hellip;&quot;--target_board=arm-sim\{-mhard-float,-msoft-float\}\{-O1,-O2,-O3,\}&quot;
  </pre></div>
  
  <p>(Note the empty option caused by the trailing comma in the final group.)
  The following will run each testsuite eight times using the &lsquo;<samp>arm-sim</samp>&rsquo;
  target, as if you had specified all possible combinations yourself:
  </p>
! <div class="smallexample">
! <pre class="smallexample">--target_board='arm-sim/-mhard-float/-O1 \
                  arm-sim/-mhard-float/-O2 \
                  arm-sim/-mhard-float/-O3 \
                  arm-sim/-mhard-float \
--- 195,210 ----
  <p>You can run the testsuites multiple times using combinations of options
  with a syntax similar to the brace expansion of popular shells:
  </p>
! <div class="example">
! <pre class="example">&hellip;&quot;--target_board=arm-sim\{-mhard-float,-msoft-float\}\{-O1,-O2,-O3,\}&quot;
  </pre></div>
  
  <p>(Note the empty option caused by the trailing comma in the final group.)
  The following will run each testsuite eight times using the &lsquo;<samp>arm-sim</samp>&rsquo;
  target, as if you had specified all possible combinations yourself:
  </p>
! <div class="example">
! <pre class="example">--target_board='arm-sim/-mhard-float/-O1 \
                  arm-sim/-mhard-float/-O2 \
                  arm-sim/-mhard-float/-O3 \
                  arm-sim/-mhard-float \
*************** target, as if you had specified all poss
*** 222,229 ****
  <p>They can be combined as many times as you wish, in arbitrary ways.  This
  list:
  </p>
! <div class="smallexample">
! <pre class="smallexample">&hellip;&quot;--target_board=unix/-Wextra\{-O3,-fno-strength\}\{-fomit-frame,\}&quot;
  </pre></div>
  
  <p>will generate four combinations, all involving &lsquo;<samp>-Wextra</samp>&rsquo;.
--- 217,224 ----
  <p>They can be combined as many times as you wish, in arbitrary ways.  This
  list:
  </p>
! <div class="example">
! <pre class="example">&hellip;&quot;--target_board=unix/-Wextra\{-O3,-fno-strength\}\{-fomit-frame,\}&quot;
  </pre></div>
  
  <p>will generate four combinations, all involving &lsquo;<samp>-Wextra</samp>&rsquo;.
*************** parallel by having the shell perform the
*** 235,248 ****
  do the parallel runs.  Instead of using &lsquo;<samp>--target_board</samp>&rsquo;, use a
  special makefile target:
  </p>
! <div class="smallexample">
! <pre class="smallexample">make -j<var>N</var> check-<var>testsuite</var>//<var>test-target</var>/<var>option1</var>/<var>option2</var>/&hellip;
  </pre></div>
  
  <p>For example,
  </p>
! <div class="smallexample">
! <pre class="smallexample">make -j3 check-gcc//sh-hms-sim/{-m1,-m2,-m3,-m3e,-m4}/{,-nofpu}
  </pre></div>
  
  <p>will run three concurrent &ldquo;make-gcc&rdquo; testsuites, eventually testing all
--- 230,243 ----
  do the parallel runs.  Instead of using &lsquo;<samp>--target_board</samp>&rsquo;, use a
  special makefile target:
  </p>
! <div class="example">
! <pre class="example">make -j<var>N</var> check-<var>testsuite</var>//<var>test-target</var>/<var>option1</var>/<var>option2</var>/&hellip;
  </pre></div>
  
  <p>For example,
  </p>
! <div class="example">
! <pre class="example">make -j3 check-gcc//sh-hms-sim/{-m1,-m2,-m3,-m3e,-m4}/{,-nofpu}
  </pre></div>
  
  <p>will run three concurrent &ldquo;make-gcc&rdquo; testsuites, eventually testing all
*************** supported in the <samp>gcc</samp> subdir
*** 251,257 ****
  typing <code>echo</code> before the example given here.)
  </p>
  
! <a name="How-to-interpret-test-results"></a>
  <h3 class="section">How to interpret test results</h3>
  
  <p>The result of running the testsuite are various <samp>*.sum</samp> and <samp>*.log</samp>
--- 246,253 ----
  typing <code>echo</code> before the example given here.)
  </p>
  
! </div>
! <div class="section" id="How-to-interpret-test-results">
  <h3 class="section">How to interpret test results</h3>
  
  <p>The result of running the testsuite are various <samp>*.sum</samp> and <samp>*.log</samp>
*************** over whether or not a test is expected t
*** 276,289 ****
  be fixed in future releases.
  </p>
  
! <a name="Submitting-test-results"></a>
  <h3 class="section">Submitting test results</h3>
  
  <p>If you want to report the results to the GCC project, use the
  <samp>contrib/test_summary</samp> shell script.  Start it in the <var>objdir</var> with
  </p>
! <div class="smallexample">
! <pre class="smallexample"><var>srcdir</var>/contrib/test_summary -p your_commentary.txt \
      -m gcc-testresults@gcc.gnu.org |sh
  </pre></div>
  
--- 272,286 ----
  be fixed in future releases.
  </p>
  
! </div>
! <div class="section" id="Submitting-test-results">
  <h3 class="section">Submitting test results</h3>
  
  <p>If you want to report the results to the GCC project, use the
  <samp>contrib/test_summary</samp> shell script.  Start it in the <var>objdir</var> with
  </p>
! <div class="example">
! <pre class="example"><var>srcdir</var>/contrib/test_summary -p your_commentary.txt \
      -m gcc-testresults@gcc.gnu.org |sh
  </pre></div>
  
*************** messages may be automatically processed.
*** 303,309 ****
  
  
  
! <hr>
  
  
  
--- 300,306 ----
  
  
  
! <hr></div>
  
  
  
diff -Nrcpad gcc-12.3.0/LAST_UPDATED gcc-12.4.0/LAST_UPDATED
*** gcc-12.3.0/LAST_UPDATED	Mon May  8 12:15:25 2023
--- gcc-12.4.0/LAST_UPDATED	Thu Jun 20 08:10:29 2024
***************
*** 1 ****
! Obtained from git: releases/gcc-12.3.0 revision 8fc1a49c9312b05d925b7d21f1d2145d70818151
--- 1 ----
! Obtained from git: releases/gcc-12.4.0 revision 2bada4bc59bed4be34fab463bdb3c3ebfd2b41bb
diff -Nrcpad gcc-12.3.0/MD5SUMS gcc-12.4.0/MD5SUMS
*** gcc-12.3.0/MD5SUMS	Mon May  8 12:34:02 2023
--- gcc-12.4.0/MD5SUMS	Thu Jun 20 08:36:33 2024
***************
*** 1,5 ****
! # This file contains the MD5 checksums of the files in the 
! # gcc-12.3.0.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
--- 1,5 ----
! # This file contains the MD5 checksums of the files in the
! # gcc-12.4.0.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
*************** c234515d9056662b94af0653f8562888  .dir-l
*** 17,45 ****
  fe60d87048567d4fe8c8a0ed2448bcc8  COPYING.RUNTIME
  d32239bcb673463ab874e80d47fae504  COPYING3
  6a6a8e020838b23406c81b19c1d46df6  COPYING3.LIB
! 8b33c05829cb61ac07bd30368d9bdfb6  ChangeLog
  fd4ecdf5d672efe2b0e409aca9cf9446  ChangeLog.jit
  09538b708302f1735f6fa05b622ecf5e  ChangeLog.tree-ssa
  24ab760126489e69436a43185dc3d202  INSTALL/README
! b0c49ff8001cc228ea2b2c71e6eb5f7b  INSTALL/binaries.html
! 178498b2c7f5269c5914f2bc9e9b7a6b  INSTALL/build.html
! aaa7ee19e5c451962a9923490621fe8c  INSTALL/configure.html
! b61913a05566e86adef9f0d3f7b5aa1e  INSTALL/download.html
! eade632147e6980dce3a575626bfb7d4  INSTALL/finalinstall.html
! 307ece182d7d9c9f217123598f0a64b1  INSTALL/gfdl.html
! fd2841cf7b80cfa2306f84216efc1f00  INSTALL/index.html
! 6b5b779d7eefa9ea45e77a4f3909cf41  INSTALL/prerequisites.html
! 0b655530a682d64e7b648f4cdaabf4a1  INSTALL/specific.html
! 0e9d9f68caad88a4d573cba915fabda6  INSTALL/test.html
! c4281af5e63231e3bfe5dcde4303d5fd  LAST_UPDATED
  e854cb1e639422e089031eba0c689e15  MAINTAINERS
  5b26d0dff99e7a528342ab4d77a284df  Makefile.def
  e2f1751d40a9663c173f048c1179539e  Makefile.in
  382a58bdaf362535403c959d6afd6a00  Makefile.tpl
! 3b711fb903b9871d86b291b6d07aee68  NEWS
  80d26bc3b1ad4f6969a96a24c9181bf5  README
  a657821f65bab77f4fbf3a75cdee6da9  ar-lib
! 94dc4e71e2fca7fb10c958afecc3c0d0  c++tools/ChangeLog
  2c6571dc657d98d1537d54460dab13c7  c++tools/Makefile.in
  edf805e559bf9ecb62db313d2e6edb47  c++tools/config.h.in
  ccd3498e6b247dfe4e65793a88a27296  c++tools/configure
--- 17,45 ----
  fe60d87048567d4fe8c8a0ed2448bcc8  COPYING.RUNTIME
  d32239bcb673463ab874e80d47fae504  COPYING3
  6a6a8e020838b23406c81b19c1d46df6  COPYING3.LIB
! 851355b45b9f05243f32ab33232fe007  ChangeLog
  fd4ecdf5d672efe2b0e409aca9cf9446  ChangeLog.jit
  09538b708302f1735f6fa05b622ecf5e  ChangeLog.tree-ssa
  24ab760126489e69436a43185dc3d202  INSTALL/README
! b93d2ca394302dd94200d70f9ce18e9a  INSTALL/binaries.html
! 4ff343bb22799689df4157f66fd2e02f  INSTALL/build.html
! 5fd84b20eabbc771d129e03d38497f11  INSTALL/configure.html
! 7312f37eca7f87fdaf0109372c9f0fbf  INSTALL/download.html
! 12af9db430df6f5e5921262cbd87cc74  INSTALL/finalinstall.html
! 426a68ec13ea682de13e36e6934581a1  INSTALL/gfdl.html
! eec537a84d35419efce0bd937f6ccc5d  INSTALL/index.html
! 675cc88506b47eb23db9620a26b6be7e  INSTALL/prerequisites.html
! 206aed6ce455c53dbf4771fad7ef04c5  INSTALL/specific.html
! f0298cd4a6e81839709030e3d915984e  INSTALL/test.html
! ac6bd3b0432f120dd441ad3cb29c55d8  LAST_UPDATED
  e854cb1e639422e089031eba0c689e15  MAINTAINERS
  5b26d0dff99e7a528342ab4d77a284df  Makefile.def
  e2f1751d40a9663c173f048c1179539e  Makefile.in
  382a58bdaf362535403c959d6afd6a00  Makefile.tpl
! 82bfc219a55eda78a21962561cdf5317  NEWS
  80d26bc3b1ad4f6969a96a24c9181bf5  README
  a657821f65bab77f4fbf3a75cdee6da9  ar-lib
! 0a9e893aeeadd3c3426b58ee7f0f690a  c++tools/ChangeLog
  2c6571dc657d98d1537d54460dab13c7  c++tools/Makefile.in
  edf805e559bf9ecb62db313d2e6edb47  c++tools/config.h.in
  ccd3498e6b247dfe4e65793a88a27296  c++tools/configure
*************** da3f3927414dbcf7878d2d582a2a8992  c++too
*** 52,58 ****
  c64564b7c7563dae5ebe016f340c9cd9  config.guess
  040359150cf11493f973a46d8a25b06b  config.rpath
  111d54aa3a3019adbab413c8fb435f22  config.sub
! e9a6125f102985b3a2904b74649378b0  config/ChangeLog
  0d9cf183f9cbbe5f59796e35831fe774  config/acinclude.m4
  0b0c1d39d39d11f4b42359daf3516e62  config/acx.m4
  6b030f5cf640bdd401ea739f54a667f8  config/asmcfi.m4
--- 52,58 ----
  c64564b7c7563dae5ebe016f340c9cd9  config.guess
  040359150cf11493f973a46d8a25b06b  config.rpath
  111d54aa3a3019adbab413c8fb435f22  config.sub
! ff6c8595723bc81951689f490c073af3  config/ChangeLog
  0d9cf183f9cbbe5f59796e35831fe774  config/acinclude.m4
  0b0c1d39d39d11f4b42359daf3516e62  config/acx.m4
  6b030f5cf640bdd401ea739f54a667f8  config/asmcfi.m4
*************** e2dc6b4fd62b77bff96b7951ef74f78f  config
*** 153,161 ****
  5cabffc02a90bd9698105b9eef507f11  config/warnings.m4
  7ef51b0adb98e5c5f7aba46d2c7293f1  config/weakref.m4
  0163b672c888aaf1c8ad3e867a0ec9f1  config/zlib.m4
! 856983826b8a23e737488c8702dc8df9  configure
! fe4f5e87d4d87c4612040acc70334eb4  configure.ac
! aff8d25c92654f553ba11f1b15df1944  contrib/ChangeLog
  5fc435c7928f858246df931ea3f3ece7  contrib/ChangeLog.jit
  7af8d2979bf1a7cfa88e30d05fa22be2  contrib/ChangeLog.tree-ssa
  2f6b9814f09a97f9774b07d75d13e405  contrib/analyze_brprob.py
--- 153,161 ----
  5cabffc02a90bd9698105b9eef507f11  config/warnings.m4
  7ef51b0adb98e5c5f7aba46d2c7293f1  config/weakref.m4
  0163b672c888aaf1c8ad3e867a0ec9f1  config/zlib.m4
! 313212028768892323f028d5b3d80313  configure
! 8bac0687372f4ec1d9d8cddd4c3edfb3  configure.ac
! beb027e7a8e9902a2c594bd15de1aa41  contrib/ChangeLog
  5fc435c7928f858246df931ea3f3ece7  contrib/ChangeLog.jit
  7af8d2979bf1a7cfa88e30d05fa22be2  contrib/ChangeLog.tree-ssa
  2f6b9814f09a97f9774b07d75d13e405  contrib/analyze_brprob.py
*************** e9bac7c82bdb5f92b354d9da854d463b  contri
*** 209,215 ****
  e462c83bdf45bf6e9b434d18fa9f66e4  contrib/git-fix-changelog.py
  5d80e88da5ae83c53513280bcff7c0a1  contrib/git-undescr.sh
  59304fc08afa489baa6b920cc76dc625  contrib/gthr_supp_vxw_5x.c
! b01a97714134c85a476602bf9665b71f  contrib/header-tools/ChangeLog
  e3aa4ad384beb34e8a96561bee91c3b6  contrib/header-tools/README
  05ef7fb87e90ba93ee04659be072a357  contrib/header-tools/count-headers
  ba0485a3c721bce9e32407ef996d2a9d  contrib/header-tools/gcc-order-headers
--- 209,215 ----
  e462c83bdf45bf6e9b434d18fa9f66e4  contrib/git-fix-changelog.py
  5d80e88da5ae83c53513280bcff7c0a1  contrib/git-undescr.sh
  59304fc08afa489baa6b920cc76dc625  contrib/gthr_supp_vxw_5x.c
! 36d31758c8209fe9535c03151b083fae  contrib/header-tools/ChangeLog
  e3aa4ad384beb34e8a96561bee91c3b6  contrib/header-tools/README
  05ef7fb87e90ba93ee04659be072a357  contrib/header-tools/count-headers
  ba0485a3c721bce9e32407ef996d2a9d  contrib/header-tools/gcc-order-headers
*************** a34668cfad9dec733354503fbc67fb24  contri
*** 234,240 ****
  87a19b40fbd220938cf6c23c42c255e2  contrib/prepare_patch.sh
  bad2b96e4296c0938aab1c646e9ccf33  contrib/prerequisites.md5
  4a395ab2dd4d15d66cb0183ec7e7bbd0  contrib/prerequisites.sha512
! 2982f91ad4713f276885cfe06ce748b4  contrib/reghunt/ChangeLog
  cf247a580e49d212518de409793db0a8  contrib/reghunt/bin/gcc-build-full
  724e70ea3e80f87f2a201bbe2f1eef37  contrib/reghunt/bin/gcc-build-simple
  3f2318bae7562a4ad1639e686916a545  contrib/reghunt/bin/gcc-cleanup
--- 234,240 ----
  87a19b40fbd220938cf6c23c42c255e2  contrib/prepare_patch.sh
  bad2b96e4296c0938aab1c646e9ccf33  contrib/prerequisites.md5
  4a395ab2dd4d15d66cb0183ec7e7bbd0  contrib/prerequisites.sha512
! 8cccadafab382540b764c7b55003a4dd  contrib/reghunt/ChangeLog
  cf247a580e49d212518de409793db0a8  contrib/reghunt/bin/gcc-build-full
  724e70ea3e80f87f2a201bbe2f1eef37  contrib/reghunt/bin/gcc-build-simple
  3f2318bae7562a4ad1639e686916a545  contrib/reghunt/bin/gcc-cleanup
*************** f251d49dd87647250fcd74dd50b7835f  contri
*** 293,299 ****
  e2829fc4af4f433a6a328a62d5ce8066  contrib/reghunt/examples/reg-watch
  afd863c2ec84c906e20f9b9787b1f0fe  contrib/reghunt/examples/reg-watch.awk
  8955535523d4b5f48006bcb851ba9b4b  contrib/reghunt/examples/testall
! 20e75c35e39699a47962929d6988b482  contrib/regression/ChangeLog
  30553bfced1b2b46bf7ca01ef6ba69d1  contrib/regression/GCC_Regression_Tester.wdgt/Default.png
  ad38ddd771df222eb9d413e3c7f6a751  contrib/regression/GCC_Regression_Tester.wdgt/Icon.png
  777bd286c147cc02861811f66b9a4440  contrib/regression/GCC_Regression_Tester.wdgt/Info.plist
--- 293,299 ----
  e2829fc4af4f433a6a328a62d5ce8066  contrib/reghunt/examples/reg-watch
  afd863c2ec84c906e20f9b9787b1f0fe  contrib/reghunt/examples/reg-watch.awk
  8955535523d4b5f48006bcb851ba9b4b  contrib/reghunt/examples/testall
! 576c5b448f41a83670518a4fc2a2ad11  contrib/regression/ChangeLog
  30553bfced1b2b46bf7ca01ef6ba69d1  contrib/regression/GCC_Regression_Tester.wdgt/Default.png
  ad38ddd771df222eb9d413e3c7f6a751  contrib/regression/GCC_Regression_Tester.wdgt/Icon.png
  777bd286c147cc02861811f66b9a4440  contrib/regression/GCC_Regression_Tester.wdgt/Info.plist
*************** a0d12be401961a2557883b7c09dc71eb  contri
*** 334,340 ****
  0c8236340920a3dd16200808b0bcb38d  contrib/vimrc
  da7aeedeb5a86ee6f5982e559a2d6dcc  contrib/warn_summary
  8b59f0d0a2dcdced14765c514fbad719  depcomp
! 791bef545fda1c0de70ee05229fbea9a  fixincludes/ChangeLog
  6de190723745dc3f75080144dfa2215e  fixincludes/Makefile.in
  b6e3f4950abc6e254b467063381f6473  fixincludes/README
  455903ad4ff71fa5c5340ef7ae41a0e6  fixincludes/README-fixinc
--- 334,340 ----
  0c8236340920a3dd16200808b0bcb38d  contrib/vimrc
  da7aeedeb5a86ee6f5982e559a2d6dcc  contrib/warn_summary
  8b59f0d0a2dcdced14765c514fbad719  depcomp
! a829ae13e78434f712c9e95ea6eda374  fixincludes/ChangeLog
  6de190723745dc3f75080144dfa2215e  fixincludes/Makefile.in
  b6e3f4950abc6e254b467063381f6473  fixincludes/README
  455903ad4ff71fa5c5340ef7ae41a0e6  fixincludes/README-fixinc
*************** b6e3f4950abc6e254b467063381f6473  fixinc
*** 347,359 ****
  77fbad4fc8ec7be3578d045d003446ec  fixincludes/fixinc.in
  8ca216a7024876b7eb9b8abc30a30775  fixincludes/fixincl.c
  adf245e3714f799eafba40af16be8eb5  fixincludes/fixincl.tpl
! dcbeb83e4eff3897508700553f3db3d9  fixincludes/fixincl.x
  545875b4fe1c26bc3e1befc75b34e9f5  fixincludes/fixlib.c
  620c770139fc32c75b975b614d3156e8  fixincludes/fixlib.h
  5b2c1fd3ef9d44fb6beb1a0d45ddd533  fixincludes/fixopts.c
  ed1415e9dbc8f421fd9288bde0d90ad1  fixincludes/fixtests.c
  51e915676df084b64297d3c4fb0d9c18  fixincludes/genfixes
! ecaa9d9c26a381ba58e6e3ff4c141a88  fixincludes/inclhack.def
  dd5ae70d9f725bcaf2a15212782db49a  fixincludes/mkfixinc.sh
  516608ac1550577d47f48809bb512629  fixincludes/mkheaders.in
  3aa0563cd682ee61ecd9eb6eea0b0bce  fixincludes/procopen.c
--- 347,359 ----
  77fbad4fc8ec7be3578d045d003446ec  fixincludes/fixinc.in
  8ca216a7024876b7eb9b8abc30a30775  fixincludes/fixincl.c
  adf245e3714f799eafba40af16be8eb5  fixincludes/fixincl.tpl
! cc72e6efd47d1a095fe7c188b475159e  fixincludes/fixincl.x
  545875b4fe1c26bc3e1befc75b34e9f5  fixincludes/fixlib.c
  620c770139fc32c75b975b614d3156e8  fixincludes/fixlib.h
  5b2c1fd3ef9d44fb6beb1a0d45ddd533  fixincludes/fixopts.c
  ed1415e9dbc8f421fd9288bde0d90ad1  fixincludes/fixtests.c
  51e915676df084b64297d3c4fb0d9c18  fixincludes/genfixes
! f199934516406bffb5a24919d4a15d99  fixincludes/inclhack.def
  dd5ae70d9f725bcaf2a15212782db49a  fixincludes/mkfixinc.sh
  516608ac1550577d47f48809bb512629  fixincludes/mkheaders.in
  3aa0563cd682ee61ecd9eb6eea0b0bce  fixincludes/procopen.c
*************** e1bd28539aceeab13a3028da02f8c4ae  fixinc
*** 403,414 ****
  8ac97a3367b9a99503c5b21430993cd4  fixincludes/tests/base/mach-o/dyld.h
  dbbbc9ead412bbd125f56bc509994066  fixincludes/tests/base/mach-o/swap.h
  c48dea510c587eea0b229def965ef77a  fixincludes/tests/base/malloc.h
! d312017cecca26f45fb733bb2dbdf8db  fixincludes/tests/base/math.h
  d2cbc665e9046f8acb42c1271592be47  fixincludes/tests/base/net/if.h
  98099ff70c675f84c19b58da050f3712  fixincludes/tests/base/net/if_arp.h
  a911f5fbb127353024e77149fcf90596  fixincludes/tests/base/netdnet/dnetdb.h
  f690db296a82aeefa0bfe9ad74a2b71c  fixincludes/tests/base/netinet/in.h
  2649ccca3396541aeb5e612d4b4a3141  fixincludes/tests/base/netinet/ip.h
  f4a72388e98f34c098a3467dce9aa4e1  fixincludes/tests/base/obstack.h
  c213736f179d8de08a09a9278e048d91  fixincludes/tests/base/os/availability.h
  c3da2b1720112f2adb1c2bbf65563364  fixincludes/tests/base/os/base.h
--- 403,415 ----
  8ac97a3367b9a99503c5b21430993cd4  fixincludes/tests/base/mach-o/dyld.h
  dbbbc9ead412bbd125f56bc509994066  fixincludes/tests/base/mach-o/swap.h
  c48dea510c587eea0b229def965ef77a  fixincludes/tests/base/malloc.h
! 8caa56e587a1d6f487453f3250c80db8  fixincludes/tests/base/math.h
  d2cbc665e9046f8acb42c1271592be47  fixincludes/tests/base/net/if.h
  98099ff70c675f84c19b58da050f3712  fixincludes/tests/base/net/if_arp.h
  a911f5fbb127353024e77149fcf90596  fixincludes/tests/base/netdnet/dnetdb.h
  f690db296a82aeefa0bfe9ad74a2b71c  fixincludes/tests/base/netinet/in.h
  2649ccca3396541aeb5e612d4b4a3141  fixincludes/tests/base/netinet/ip.h
+ 209cd203eddb99971d08755fd4912558  fixincludes/tests/base/objc/runtime.h
  f4a72388e98f34c098a3467dce9aa4e1  fixincludes/tests/base/obstack.h
  c213736f179d8de08a09a9278e048d91  fixincludes/tests/base/os/availability.h
  c3da2b1720112f2adb1c2bbf65563364  fixincludes/tests/base/os/base.h
*************** d2f1ddef1ca3edae298e37f7bc892941  fixinc
*** 441,447 ****
  563eddf934e21ec7f85628e18fb1c641  fixincludes/tests/base/stdint-hpux11.h
  cc3783f241fa992a305aced8e1195ee9  fixincludes/tests/base/stdint-newlib.h
  1ee4e2b61ae5781d35271f3181927037  fixincludes/tests/base/stdint.h
! d47412644cdea4f030ba2744eca6d8ad  fixincludes/tests/base/stdio.h
  1887d8bc1711dae9922852cda6027877  fixincludes/tests/base/stdio_tag.h
  63b7afc35517454fd4753b811e9b6e2e  fixincludes/tests/base/stdlib.h
  42a7de17fb8f2ac74bc30c7029199637  fixincludes/tests/base/string.h
--- 442,448 ----
  563eddf934e21ec7f85628e18fb1c641  fixincludes/tests/base/stdint-hpux11.h
  cc3783f241fa992a305aced8e1195ee9  fixincludes/tests/base/stdint-newlib.h
  1ee4e2b61ae5781d35271f3181927037  fixincludes/tests/base/stdint.h
! df6201177ee6354a4bb61b84de3f16b6  fixincludes/tests/base/stdio.h
  1887d8bc1711dae9922852cda6027877  fixincludes/tests/base/stdio_tag.h
  63b7afc35517454fd4753b811e9b6e2e  fixincludes/tests/base/stdlib.h
  42a7de17fb8f2ac74bc30c7029199637  fixincludes/tests/base/string.h
*************** a22e70b3f29292d0e628450f4bb11e62  fixinc
*** 476,487 ****
  8baab8698bb83c6b90ef4091c00ddc1e  fixincludes/tests/base/unistd.h
  75d75572793b62bdd8ff4d1504e0cb4c  fixincludes/tests/base/yvals.h
  76f58c169c1a57cb2dd035a5136b56dd  gcc/ABOUT-GCC-NLS
! ed2dc8b0c758f8b99786d0a8b7756d3e  gcc/BASE-VER
  59530bdf33659b29e73d4adb9f9f6552  gcc/COPYING
  a916467b91076e631dd8edb7424769c7  gcc/COPYING.LIB
  d32239bcb673463ab874e80d47fae504  gcc/COPYING3
  6a6a8e020838b23406c81b19c1d46df6  gcc/COPYING3.LIB
! 13b61c3fc482a0a279e81e4289409feb  gcc/ChangeLog
  a3b63c675afa7a655cc2bfa8a907af79  gcc/ChangeLog-1997
  d9a88529352a010253c2e8fb1ed6023b  gcc/ChangeLog-1998
  240f08f81cb4699e8b49347db38233db  gcc/ChangeLog-1999
--- 477,488 ----
  8baab8698bb83c6b90ef4091c00ddc1e  fixincludes/tests/base/unistd.h
  75d75572793b62bdd8ff4d1504e0cb4c  fixincludes/tests/base/yvals.h
  76f58c169c1a57cb2dd035a5136b56dd  gcc/ABOUT-GCC-NLS
! 600ff201f0a5614d91d36ef58cbdc432  gcc/BASE-VER
  59530bdf33659b29e73d4adb9f9f6552  gcc/COPYING
  a916467b91076e631dd8edb7424769c7  gcc/COPYING.LIB
  d32239bcb673463ab874e80d47fae504  gcc/COPYING3
  6a6a8e020838b23406c81b19c1d46df6  gcc/COPYING3.LIB
! 1d327b63c68f498384139709162c6a48  gcc/ChangeLog
  a3b63c675afa7a655cc2bfa8a907af79  gcc/ChangeLog-1997
  d9a88529352a010253c2e8fb1ed6023b  gcc/ChangeLog-1998
  240f08f81cb4699e8b49347db38233db  gcc/ChangeLog-1999
*************** fb3fadb88e1d2b3b640cfaaa5ff11780  gcc/Ch
*** 515,521 ****
  3eb07e0b2e542409bf73d359f7f65609  gcc/ChangeLog.ptr
  e13638e26743ba41e6011b76cc00d9a9  gcc/ChangeLog.tree-ssa
  739ab47f6425bcea1d05e4fc0542de54  gcc/ChangeLog.tuples
! 9b1002a157dc0ebfc7b16b6d254c42e0  gcc/DATESTAMP
  d41d8cd98f00b204e9800998ecf8427e  gcc/DEV-PHASE
  eb92e1ff5e982ca07e173e0eb286d243  gcc/FSFChangeLog
  30e1e33411566388b3164558482dc5e6  gcc/FSFChangeLog.10
--- 516,522 ----
  3eb07e0b2e542409bf73d359f7f65609  gcc/ChangeLog.ptr
  e13638e26743ba41e6011b76cc00d9a9  gcc/ChangeLog.tree-ssa
  739ab47f6425bcea1d05e4fc0542de54  gcc/ChangeLog.tuples
! d80b9edbabe4db241df7a207e52a1153  gcc/DATESTAMP
  d41d8cd98f00b204e9800998ecf8427e  gcc/DEV-PHASE
  eb92e1ff5e982ca07e173e0eb286d243  gcc/FSFChangeLog
  30e1e33411566388b3164558482dc5e6  gcc/FSFChangeLog.10
*************** ec6799501b2eb2923d5de6a66169dbd2  gcc/ON
*** 527,533 ****
  40d826b642dccc9eb94a099ef3cefa86  gcc/acinclude.m4
  6526979dd900a0b58b7691b478a91fec  gcc/aclocal.m4
  16a499934b71eb6cf7c0d6899cd6006a  gcc/ada/.gitignore
! de099f3619f1d689b7e95584c68f982b  gcc/ada/ChangeLog
  683be0b07dc4f64f118fd5e8ae9cb30d  gcc/ada/ChangeLog-2001
  7aff25efb203be4136b8776cdc812956  gcc/ada/ChangeLog-2002
  cd2379152000f40157d349018fb9364d  gcc/ada/ChangeLog-2003
--- 528,534 ----
  40d826b642dccc9eb94a099ef3cefa86  gcc/acinclude.m4
  6526979dd900a0b58b7691b478a91fec  gcc/aclocal.m4
  16a499934b71eb6cf7c0d6899cd6006a  gcc/ada/.gitignore
! 3ae363fad0203d324b47b3fb20e1260e  gcc/ada/ChangeLog
  683be0b07dc4f64f118fd5e8ae9cb30d  gcc/ada/ChangeLog-2001
  7aff25efb203be4136b8776cdc812956  gcc/ada/ChangeLog-2002
  cd2379152000f40157d349018fb9364d  gcc/ada/ChangeLog-2003
*************** be56f221d42251fd1dae73968881b1fa  gcc/ad
*** 712,724 ****
  c8d75e8e54eccbcf942dc059b85a3bb5  gcc/ada/exp_ch2.ads
  fd4cf5651067e0b1554c80d51507bcb6  gcc/ada/exp_ch3.adb
  0a54d172f10092ff3ff2c2d2d095ba55  gcc/ada/exp_ch3.ads
! aa9d2e89f4c039691e7312000c600df8  gcc/ada/exp_ch4.adb
  1c15cbd77887db9d3bd25c6972b592c8  gcc/ada/exp_ch4.ads
  9a235cf11293bc86d8c0cb1600c55088  gcc/ada/exp_ch5.adb
  979227d95a6dac9baddbe04b8c3493c8  gcc/ada/exp_ch5.ads
! 038fc84fbbe4efe323e805b580979589  gcc/ada/exp_ch6.adb
  8d66ec9e862ba21f160a8170f1e49325  gcc/ada/exp_ch6.ads
! c8113af9b067f0ae46ac677bd654998c  gcc/ada/exp_ch7.adb
  1fb7263aebbb4f05b0d18af30966f286  gcc/ada/exp_ch7.ads
  c878c67c93d75a156d7addd650439dfc  gcc/ada/exp_ch8.adb
  e113b356ea2318ef4ca18e3488bce0ee  gcc/ada/exp_ch8.ads
--- 713,725 ----
  c8d75e8e54eccbcf942dc059b85a3bb5  gcc/ada/exp_ch2.ads
  fd4cf5651067e0b1554c80d51507bcb6  gcc/ada/exp_ch3.adb
  0a54d172f10092ff3ff2c2d2d095ba55  gcc/ada/exp_ch3.ads
! 2338c24652fd69a01b10d1628ac3dea4  gcc/ada/exp_ch4.adb
  1c15cbd77887db9d3bd25c6972b592c8  gcc/ada/exp_ch4.ads
  9a235cf11293bc86d8c0cb1600c55088  gcc/ada/exp_ch5.adb
  979227d95a6dac9baddbe04b8c3493c8  gcc/ada/exp_ch5.ads
! 20b603f84c662a5d7e79fedae466cce8  gcc/ada/exp_ch6.adb
  8d66ec9e862ba21f160a8170f1e49325  gcc/ada/exp_ch6.ads
! 2e0186d0e4b4884f0c50d0a59e35d89e  gcc/ada/exp_ch7.adb
  1fb7263aebbb4f05b0d18af30966f286  gcc/ada/exp_ch7.ads
  c878c67c93d75a156d7addd650439dfc  gcc/ada/exp_ch8.adb
  e113b356ea2318ef4ca18e3488bce0ee  gcc/ada/exp_ch8.ads
*************** ee1066e7c5413819b03e6001a9cfae3a  gcc/ad
*** 756,762 ****
  f278fc9fa8e840c2b94e28c3d094650a  gcc/ada/exp_tss.ads
  0e337130cf6c6c0372f0952e49f7d985  gcc/ada/exp_unst.adb
  d5908f51ae172d7ceff89f100340126b  gcc/ada/exp_unst.ads
! 41a87f3f2511529ac9316c9d9458b905  gcc/ada/exp_util.adb
  7ffa7e0ec39d43af001a15aaac9ba78c  gcc/ada/exp_util.ads
  a9edaee743b4d940a7706a0e09b30fb2  gcc/ada/expander.adb
  9af78763a2ab23ffd55521e61c23ae50  gcc/ada/expander.ads
--- 757,763 ----
  f278fc9fa8e840c2b94e28c3d094650a  gcc/ada/exp_tss.ads
  0e337130cf6c6c0372f0952e49f7d985  gcc/ada/exp_unst.adb
  d5908f51ae172d7ceff89f100340126b  gcc/ada/exp_unst.ads
! 0fdfe32c63ead16d2b8f5cb182281d5d  gcc/ada/exp_util.adb
  7ffa7e0ec39d43af001a15aaac9ba78c  gcc/ada/exp_util.ads
  a9edaee743b4d940a7706a0e09b30fb2  gcc/ada/expander.adb
  9af78763a2ab23ffd55521e61c23ae50  gcc/ada/expander.ads
*************** f7677c298cb2f4c70ecf284c7e18cb80  gcc/ad
*** 784,790 ****
  c624ca95ac9cafe80b36002e2082ba32  gcc/ada/gcc-interface/ada.h
  94e0754690ae0c8dc74fe08f0a50999e  gcc/ada/gcc-interface/config-lang.in
  5b910ac4d9e39a40ea0683b0648e49d2  gcc/ada/gcc-interface/cuintp.cc
! 9bdb6a78832ac52be4a2af482e2a4572  gcc/ada/gcc-interface/decl.cc
  86b3aa73d9a4f83e3574afdb2cba3bd1  gcc/ada/gcc-interface/gadaint.h
  685316e06bf82a1d265c8a8240afc33b  gcc/ada/gcc-interface/gigi.h
  61f788f464d3715bb66330ecca2ade58  gcc/ada/gcc-interface/lang-specs.h
--- 785,791 ----
  c624ca95ac9cafe80b36002e2082ba32  gcc/ada/gcc-interface/ada.h
  94e0754690ae0c8dc74fe08f0a50999e  gcc/ada/gcc-interface/config-lang.in
  5b910ac4d9e39a40ea0683b0648e49d2  gcc/ada/gcc-interface/cuintp.cc
! d9a3eccb1b939061cf1d49615d9e3ad9  gcc/ada/gcc-interface/decl.cc
  86b3aa73d9a4f83e3574afdb2cba3bd1  gcc/ada/gcc-interface/gadaint.h
  685316e06bf82a1d265c8a8240afc33b  gcc/ada/gcc-interface/gigi.h
  61f788f464d3715bb66330ecca2ade58  gcc/ada/gcc-interface/lang-specs.h
*************** c103505e4c64967f875c7a4238798e4e  gcc/ad
*** 819,825 ****
  0927017a26f803816c66013199c6381a  gcc/ada/gnat_cuda.ads
  b82878927be65ce37185c6f06e771bf7  gcc/ada/gnat_rm.texi
  36ea8fcfb3fcb7f870a0bb158f1fbb12  gcc/ada/gnat_ugn.texi
! ce40b6396b0acdb9483ee8aab9dc817f  gcc/ada/gnatbind.adb
  c9569f7a1940b7eba403a6fe5e05e812  gcc/ada/gnatbind.ads
  25b3f7a90a2fa5686e2a38a76f1c635a  gcc/ada/gnatchop.adb
  3264871b4e4ffb3ae1b66299835ee03a  gcc/ada/gnatclean.adb
--- 820,826 ----
  0927017a26f803816c66013199c6381a  gcc/ada/gnat_cuda.ads
  b82878927be65ce37185c6f06e771bf7  gcc/ada/gnat_rm.texi
  36ea8fcfb3fcb7f870a0bb158f1fbb12  gcc/ada/gnat_ugn.texi
! 65e29c7201f34db7244c4437800101b4  gcc/ada/gnatbind.adb
  c9569f7a1940b7eba403a6fe5e05e812  gcc/ada/gnatbind.ads
  25b3f7a90a2fa5686e2a38a76f1c635a  gcc/ada/gnatchop.adb
  3264871b4e4ffb3ae1b66299835ee03a  gcc/ada/gnatclean.adb
*************** e018d23294adfd1c6c7d66ab4c8ca60e  gcc/ad
*** 2503,2509 ****
  063236347c4cbac2e9e9f96fe272ecd7  gcc/ada/libgnat/s-resfil.ads
  4ca022646101be37c3b4518668ff571a  gcc/ada/libgnat/s-restri.adb
  419d296ce1e249ee278cb447d95aff82  gcc/ada/libgnat/s-restri.ads
! b42363410d88844d85cb7439c9a1bc89  gcc/ada/libgnat/s-rident.ads
  1ea08a534d4893a07aacd1efe61c71cc  gcc/ada/libgnat/s-rpc.adb
  82957b03e92c451bdec8261467a51713  gcc/ada/libgnat/s-rpc.ads
  6973f21b8684cecf0b123afd0af26f2a  gcc/ada/libgnat/s-scaval.adb
--- 2504,2510 ----
  063236347c4cbac2e9e9f96fe272ecd7  gcc/ada/libgnat/s-resfil.ads
  4ca022646101be37c3b4518668ff571a  gcc/ada/libgnat/s-restri.adb
  419d296ce1e249ee278cb447d95aff82  gcc/ada/libgnat/s-restri.ads
! b2f7a047e59c50a8a61586be96f736d7  gcc/ada/libgnat/s-rident.ads
  1ea08a534d4893a07aacd1efe61c71cc  gcc/ada/libgnat/s-rpc.adb
  82957b03e92c451bdec8261467a51713  gcc/ada/libgnat/s-rpc.ads
  6973f21b8684cecf0b123afd0af26f2a  gcc/ada/libgnat/s-scaval.adb
*************** e49bfc0e2ca91f3619403816c4680d13  gcc/ad
*** 2795,2801 ****
  00348a758e14bc06d7f93fb3c60acdca  gcc/ada/repinfo.adb
  0f4db0fd7abce5c16b94c38bda02e179  gcc/ada/repinfo.ads
  5771e11c4a36c3e12ae085cb0f637758  gcc/ada/repinfo.h
! 866f4553620f6724d5391f963bfc2417  gcc/ada/restrict.adb
  986b5c865a1fd59615a0ae661d2b57cb  gcc/ada/restrict.ads
  8ed555d9793e4f615b976cc7b9acf72c  gcc/ada/rident.ads
  7ce1c090d8a578ba07733a0c95eff670  gcc/ada/rtfinal.c
--- 2796,2802 ----
  00348a758e14bc06d7f93fb3c60acdca  gcc/ada/repinfo.adb
  0f4db0fd7abce5c16b94c38bda02e179  gcc/ada/repinfo.ads
  5771e11c4a36c3e12ae085cb0f637758  gcc/ada/repinfo.h
! 1a0fefc3e4a70b1e4af4be1316c7e370  gcc/ada/restrict.adb
  986b5c865a1fd59615a0ae661d2b57cb  gcc/ada/restrict.ads
  8ed555d9793e4f615b976cc7b9acf72c  gcc/ada/rident.ads
  7ce1c090d8a578ba07733a0c95eff670  gcc/ada/rtfinal.c
*************** a9f6ccfb3b3d25af8699d16d5eb39a61  gcc/ad
*** 2871,2879 ****
  70332de027e0adf40cb45b491f3b4db3  gcc/ada/sem_intr.ads
  829b02b037f39a816bd2e5f37a48dd9e  gcc/ada/sem_mech.adb
  ced6f4c926b27df96eabe9cc72246849  gcc/ada/sem_mech.ads
! b7cb1944ad2e4d61e7a6499657b6b2e5  gcc/ada/sem_prag.adb
  c6e6052728dc8f38b8706c60a66f87ce  gcc/ada/sem_prag.ads
! 7ce3735415ba26c26e07da64fa468dd3  gcc/ada/sem_res.adb
  8aafa0bbe0659305fca1075cf9a63c76  gcc/ada/sem_res.ads
  30540a00a0ce832eed79b6ff5b0cc1c5  gcc/ada/sem_scil.adb
  59032b02529742b631ce33ade9468c5a  gcc/ada/sem_scil.ads
--- 2872,2880 ----
  70332de027e0adf40cb45b491f3b4db3  gcc/ada/sem_intr.ads
  829b02b037f39a816bd2e5f37a48dd9e  gcc/ada/sem_mech.adb
  ced6f4c926b27df96eabe9cc72246849  gcc/ada/sem_mech.ads
! 5e3a726517c8f1a4fcfa6b3073094c1b  gcc/ada/sem_prag.adb
  c6e6052728dc8f38b8706c60a66f87ce  gcc/ada/sem_prag.ads
! 80e49f1efa4308862b93520d911ec796  gcc/ada/sem_res.adb
  8aafa0bbe0659305fca1075cf9a63c76  gcc/ada/sem_res.ads
  30540a00a0ce832eed79b6ff5b0cc1c5  gcc/ada/sem_scil.adb
  59032b02529742b631ce33ade9468c5a  gcc/ada/sem_scil.ads
*************** a90368159c1f4354778fdfba479b896d  gcc/ad
*** 3005,3011 ****
  2cc2cdd05c8be53c1cb016bba012fd9b  gcc/align.h
  b2ce75825ccf75e072ab6c8975c38232  gcc/alloc-pool.cc
  b7c04162e76f23d56fa00205e789f7dc  gcc/alloc-pool.h
! f95a5943c6c92f450c8e55b94d3a5964  gcc/analyzer/ChangeLog
  3acec58f414ce82e99f2983591f45b43  gcc/analyzer/analysis-plan.cc
  8ce96491e4c46bedd4a35adc52251a3a  gcc/analyzer/analysis-plan.h
  3cadfbc2a96c42c26013f8530330f752  gcc/analyzer/analyzer-logging.cc
--- 3006,3012 ----
  2cc2cdd05c8be53c1cb016bba012fd9b  gcc/align.h
  b2ce75825ccf75e072ab6c8975c38232  gcc/alloc-pool.cc
  b7c04162e76f23d56fa00205e789f7dc  gcc/alloc-pool.h
! d82d62ab562dd12cefa672bc2bdf85e4  gcc/analyzer/ChangeLog
  3acec58f414ce82e99f2983591f45b43  gcc/analyzer/analysis-plan.cc
  8ce96491e4c46bedd4a35adc52251a3a  gcc/analyzer/analysis-plan.h
  3cadfbc2a96c42c26013f8530330f752  gcc/analyzer/analyzer-logging.cc
*************** d1ece647573091c4b6a0434986d022b9  gcc/an
*** 3073,3122 ****
  d88189bdcecfa56e5ffaab39a03396f5  gcc/analyzer/trimmed-graph.cc
  4bafa74d2a8c0d933f1620cbe9887fc2  gcc/analyzer/trimmed-graph.h
  0b95095c8e8df661977864b73fa53bcc  gcc/array-traits.h
! b2201566fe8736e33f20ceb357d7dd31  gcc/asan.cc
  9d182c46a0fa9d235966ac5a88ef883f  gcc/asan.h
  2787dfa04681d7b87cf7a65b5fd3f2e8  gcc/attr-fnspec.h
! 94bff5727492a16c140450adc5bec8f2  gcc/attribs.cc
  f35983fbc75e85ec6bb625c1e3d93060  gcc/attribs.h
  f2a5b546c85c4efb7d2f0103653a5728  gcc/auto-inc-dec.cc
  98a3904d4727900960256e4afbf77de7  gcc/auto-profile.cc
  96b0d496f959bdb607cc3d80d8f0e62e  gcc/auto-profile.h
  e8ddb5768af138adb4c7dc9ceeef18fc  gcc/backend.h
  789f9c53260b2e6310c6d9cce6573842  gcc/basic-block.h
! 760ffe7808513ba154746d41f72a9cd0  gcc/bb-reorder.cc
  6617828b52b378fcd102261c0a5e92b5  gcc/bb-reorder.h
! 86e6d04ba8d6db17822d7e77f111b625  gcc/bitmap.cc
  463d4f90c70a2ee34e18e4e1cdac3017  gcc/bitmap.h
  effc7bf1ccdcbbcde7f3785aa54561c2  gcc/btfout.cc
  054e5fb089c16e62b46b994b919a245d  gcc/builtin-attrs.def
  9397c619ec5582634dc3e244ff03f6c9  gcc/builtin-types.def
! 709a8f13eddee30cf0e409e2a48b6cb8  gcc/builtins.cc
  a72c74534e856f4d387a76fa2204ea5b  gcc/builtins.def
  48b30dc7e25f5905415a1dac460e9750  gcc/builtins.h
! 06dfdb053b4b831351d84c75f42a2258  gcc/c-family/ChangeLog
  ea3fa1f4d7390a105fa3caab4f79aaf7  gcc/c-family/ChangeLog.gimple-classes
  a7afd263f1b3f5cb5c733ee443f9dfe1  gcc/c-family/c-ada-spec.cc
  77ea826f6e5f43400d6095c1026cb640  gcc/c-family/c-ada-spec.h
! 1ac3eb502ce4873ac4d8cea0f46f5931  gcc/c-family/c-attribs.cc
! a935e0179c32e14ea65371d3cea022f5  gcc/c-family/c-common.cc
  8a7421b92ec542eccb81b8a4069ba2ad  gcc/c-family/c-common.def
  bd4a6637b69d074cb9b9ce8f5ffbd9a1  gcc/c-family/c-common.h
! 8991a62ab96fa1fad9d89d551283bdd5  gcc/c-family/c-cppbuiltin.cc
  ace6960d00063212ee9ff914f19af263  gcc/c-family/c-dump.cc
  80d00f99e45ecd540ec701c130df1919  gcc/c-family/c-format.cc
  074df03d16455b2d5d97400267b29292  gcc/c-family/c-format.h
  e4fa35a4a437e8cc853743c2416405d5  gcc/c-family/c-gimplify.cc
  78c1df4a556b61f6fbcf775b1b06ef03  gcc/c-family/c-indentation.cc
  366be7ff35d4473fe925e98f64d0fa83  gcc/c-family/c-indentation.h
! 6443c345952222040741cbd8a1d6e1b9  gcc/c-family/c-lex.cc
  f53bf811224874c8cf6803a9d4766c7c  gcc/c-family/c-objc.h
  af9a0fa4e63145b3c994f3cfd9d608a1  gcc/c-family/c-omp.cc
  ba4e6aa580bcb97695f1e88ac963111e  gcc/c-family/c-opts.cc
! 00ed0919fbaac7675375ccdfaab6a8bf  gcc/c-family/c-pch.cc
  12e90bdd8eac8ef2f8fb0bd3d4520db0  gcc/c-family/c-ppoutput.cc
  2c66f0f1cfcfe4ee885f16bd33a6d2db  gcc/c-family/c-pragma.cc
  84bfd9edb36a8013d6108c26781c39dc  gcc/c-family/c-pragma.h
! 7711d04d7e1ba677219ecac31ee22781  gcc/c-family/c-pretty-print.cc
  0c6371d3a654141a9cd26a12aaad0911  gcc/c-family/c-pretty-print.h
  d88141dbe6ee4cdf0241ecea034a6ebd  gcc/c-family/c-semantics.cc
  eb037f948fa34a189765877123cb18b4  gcc/c-family/c-spellcheck.cc
--- 3074,3123 ----
  d88189bdcecfa56e5ffaab39a03396f5  gcc/analyzer/trimmed-graph.cc
  4bafa74d2a8c0d933f1620cbe9887fc2  gcc/analyzer/trimmed-graph.h
  0b95095c8e8df661977864b73fa53bcc  gcc/array-traits.h
! c4e83b9f0c73f00f8809c61dcc9ecc3b  gcc/asan.cc
  9d182c46a0fa9d235966ac5a88ef883f  gcc/asan.h
  2787dfa04681d7b87cf7a65b5fd3f2e8  gcc/attr-fnspec.h
! 7d35e1c3a62d4663c96e9110e4ef797b  gcc/attribs.cc
  f35983fbc75e85ec6bb625c1e3d93060  gcc/attribs.h
  f2a5b546c85c4efb7d2f0103653a5728  gcc/auto-inc-dec.cc
  98a3904d4727900960256e4afbf77de7  gcc/auto-profile.cc
  96b0d496f959bdb607cc3d80d8f0e62e  gcc/auto-profile.h
  e8ddb5768af138adb4c7dc9ceeef18fc  gcc/backend.h
  789f9c53260b2e6310c6d9cce6573842  gcc/basic-block.h
! 9ab1b5e3cbb034a5bf30d67469c7e1db  gcc/bb-reorder.cc
  6617828b52b378fcd102261c0a5e92b5  gcc/bb-reorder.h
! 02d5f1c29d6ce6c6e72ecde42d1ee13d  gcc/bitmap.cc
  463d4f90c70a2ee34e18e4e1cdac3017  gcc/bitmap.h
  effc7bf1ccdcbbcde7f3785aa54561c2  gcc/btfout.cc
  054e5fb089c16e62b46b994b919a245d  gcc/builtin-attrs.def
  9397c619ec5582634dc3e244ff03f6c9  gcc/builtin-types.def
! cb0ebb96c500ae3babe07c47b90dc82a  gcc/builtins.cc
  a72c74534e856f4d387a76fa2204ea5b  gcc/builtins.def
  48b30dc7e25f5905415a1dac460e9750  gcc/builtins.h
! 352544f35e8e1ef116ef08051f376415  gcc/c-family/ChangeLog
  ea3fa1f4d7390a105fa3caab4f79aaf7  gcc/c-family/ChangeLog.gimple-classes
  a7afd263f1b3f5cb5c733ee443f9dfe1  gcc/c-family/c-ada-spec.cc
  77ea826f6e5f43400d6095c1026cb640  gcc/c-family/c-ada-spec.h
! f7c3a2eff4387977c7c4e40122d5fe31  gcc/c-family/c-attribs.cc
! 67aa846540cd3d9fe2c7636d03eb4716  gcc/c-family/c-common.cc
  8a7421b92ec542eccb81b8a4069ba2ad  gcc/c-family/c-common.def
  bd4a6637b69d074cb9b9ce8f5ffbd9a1  gcc/c-family/c-common.h
! 1d3feccdb648bc027a269369f47b3c83  gcc/c-family/c-cppbuiltin.cc
  ace6960d00063212ee9ff914f19af263  gcc/c-family/c-dump.cc
  80d00f99e45ecd540ec701c130df1919  gcc/c-family/c-format.cc
  074df03d16455b2d5d97400267b29292  gcc/c-family/c-format.h
  e4fa35a4a437e8cc853743c2416405d5  gcc/c-family/c-gimplify.cc
  78c1df4a556b61f6fbcf775b1b06ef03  gcc/c-family/c-indentation.cc
  366be7ff35d4473fe925e98f64d0fa83  gcc/c-family/c-indentation.h
! 2c396d1e72b524df0d9d0d7247daf43c  gcc/c-family/c-lex.cc
  f53bf811224874c8cf6803a9d4766c7c  gcc/c-family/c-objc.h
  af9a0fa4e63145b3c994f3cfd9d608a1  gcc/c-family/c-omp.cc
  ba4e6aa580bcb97695f1e88ac963111e  gcc/c-family/c-opts.cc
! 067be2e53f5781ca0079ea5b106a24f3  gcc/c-family/c-pch.cc
  12e90bdd8eac8ef2f8fb0bd3d4520db0  gcc/c-family/c-ppoutput.cc
  2c66f0f1cfcfe4ee885f16bd33a6d2db  gcc/c-family/c-pragma.cc
  84bfd9edb36a8013d6108c26781c39dc  gcc/c-family/c-pragma.h
! 2467a3554dc90b8962b5af38d440666f  gcc/c-family/c-pretty-print.cc
  0c6371d3a654141a9cd26a12aaad0911  gcc/c-family/c-pretty-print.h
  d88141dbe6ee4cdf0241ecea034a6ebd  gcc/c-family/c-semantics.cc
  eb037f948fa34a189765877123cb18b4  gcc/c-family/c-spellcheck.cc
*************** eb037f948fa34a189765877123cb18b4  gcc/c-
*** 3126,3143 ****
  d377f983a2b7608542fc0d1034ab9e5a  gcc/c-family/c-target.h
  014a9d801945dfd171d22b65b225162c  gcc/c-family/c-ubsan.cc
  644fa2dfeaf0cfe53b8bca3d6ad5bb1c  gcc/c-family/c-ubsan.h
! f6e63f74a71e82c7a924fea861d4f086  gcc/c-family/c-warn.cc
  9ba31ec21d4ddd5e65ec4f2a9510fb5f  gcc/c-family/c.opt
  dcb2cef5a26e1633b9899946a2ea78cb  gcc/c-family/cppspec.cc
  20446c529e92951bf598907c958af026  gcc/c-family/known-headers.cc
  a68d869def2a6738d328ed7689f87190  gcc/c-family/known-headers.h
  55d4227fdfb9e5cd81ffac2fadcf85c9  gcc/c-family/name-hint.h
  d5e5e6221af65ab5bf8c100105a7e635  gcc/c-family/stub-objc.cc
! 4371a497d0b842d3f103513f3f557331  gcc/c/ChangeLog
  c34f18ab50963bd48783733e4cc912d5  gcc/c/Make-lang.in
  bca8b48089af255e3dc7cdc6705005fa  gcc/c/c-aux-info.cc
  a670199451d3424bfef5a97af7e81f86  gcc/c/c-convert.cc
! c120f0f2d55e5218dfa5c85f6c424349  gcc/c/c-decl.cc
  76e38393aeab52ee4fd15f1b7bcfe5c0  gcc/c/c-errors.cc
  e2d3c0a7888d2d1089c7b84ca5cf8adb  gcc/c/c-fold.cc
  36585bbdc134fac93bf37ce4a266a742  gcc/c/c-lang.cc
--- 3127,3144 ----
  d377f983a2b7608542fc0d1034ab9e5a  gcc/c-family/c-target.h
  014a9d801945dfd171d22b65b225162c  gcc/c-family/c-ubsan.cc
  644fa2dfeaf0cfe53b8bca3d6ad5bb1c  gcc/c-family/c-ubsan.h
! a8af3dce61b3e9a821c7119465d43e09  gcc/c-family/c-warn.cc
  9ba31ec21d4ddd5e65ec4f2a9510fb5f  gcc/c-family/c.opt
  dcb2cef5a26e1633b9899946a2ea78cb  gcc/c-family/cppspec.cc
  20446c529e92951bf598907c958af026  gcc/c-family/known-headers.cc
  a68d869def2a6738d328ed7689f87190  gcc/c-family/known-headers.h
  55d4227fdfb9e5cd81ffac2fadcf85c9  gcc/c-family/name-hint.h
  d5e5e6221af65ab5bf8c100105a7e635  gcc/c-family/stub-objc.cc
! f3a00163305dd2c4f3c75f8a0b4d4e5b  gcc/c/ChangeLog
  c34f18ab50963bd48783733e4cc912d5  gcc/c/Make-lang.in
  bca8b48089af255e3dc7cdc6705005fa  gcc/c/c-aux-info.cc
  a670199451d3424bfef5a97af7e81f86  gcc/c/c-convert.cc
! 15c199f781f722360206a458111f697d  gcc/c/c-decl.cc
  76e38393aeab52ee4fd15f1b7bcfe5c0  gcc/c/c-errors.cc
  e2d3c0a7888d2d1089c7b84ca5cf8adb  gcc/c/c-fold.cc
  36585bbdc134fac93bf37ce4a266a742  gcc/c/c-lang.cc
*************** d28ee28e1915a34068f3acb03f4a49bb  gcc/cf
*** 3166,3172 ****
  b12c021dcabda408f8a77b1262578938  gcc/cfgbuild.h
  a4a247f647880ceaa0b9d18d5312a4b7  gcc/cfgcleanup.cc
  26d6ce4714a68321ba5ee3ca8d8d5042  gcc/cfgcleanup.h
! 64996b46dbdf1a3189ee696a6c167dce  gcc/cfgexpand.cc
  2081ed1f982aff326fd96314f500b487  gcc/cfgexpand.h
  9425b52a9b66d59c96ac2ccb5f5fb020  gcc/cfghooks.cc
  c07ae507570a86e164131d0adbb19c7a  gcc/cfghooks.h
--- 3167,3173 ----
  b12c021dcabda408f8a77b1262578938  gcc/cfgbuild.h
  a4a247f647880ceaa0b9d18d5312a4b7  gcc/cfgcleanup.cc
  26d6ce4714a68321ba5ee3ca8d8d5042  gcc/cfgcleanup.h
! 7d8e9abcbf726ac326e731f09fd14e4a  gcc/cfgexpand.cc
  2081ed1f982aff326fd96314f500b487  gcc/cfgexpand.h
  9425b52a9b66d59c96ac2ccb5f5fb020  gcc/cfghooks.cc
  c07ae507570a86e164131d0adbb19c7a  gcc/cfghooks.h
*************** c07ae507570a86e164131d0adbb19c7a  gcc/cf
*** 3175,3187 ****
  5b7a334e2dcaeb9a33896540bd01f7bb  gcc/cfgloopanal.cc
  50b7fc6231c733144dc1c33d48b8b739  gcc/cfgloopmanip.cc
  4455a96e3179beb08bf7d4c4275ea90a  gcc/cfgloopmanip.h
! fb3b9724fb78e61df55fbe34b04db160  gcc/cfgrtl.cc
! f7f172c645d893709e8151eeaad80a16  gcc/cfgrtl.h
! f75b117e72cae9acf9d68fd5ca110a4d  gcc/cgraph.cc
! 23cfeab3816df5e46f5c13733a2fd35b  gcc/cgraph.h
  5757ec66e81724328cf4c78ce0354445  gcc/cgraphbuild.cc
  af0efaf9e2173f391a376b4f8f61037f  gcc/cgraphclones.cc
! 524197c503f7ce0df60038720cbe9e06  gcc/cgraphunit.cc
  c4a638b8438c85490d58aa4c8a364b19  gcc/cif-code.def
  51b9093b582e7ab838747e098a7aeedd  gcc/collect-utils.cc
  553d6ef88e3bbc59f1562d2aa4b14ada  gcc/collect-utils.h
--- 3176,3188 ----
  5b7a334e2dcaeb9a33896540bd01f7bb  gcc/cfgloopanal.cc
  50b7fc6231c733144dc1c33d48b8b739  gcc/cfgloopmanip.cc
  4455a96e3179beb08bf7d4c4275ea90a  gcc/cfgloopmanip.h
! 06df51e753cd5e404ce6c631e9f53a74  gcc/cfgrtl.cc
! 3040600eba8d49493411fbff497fd94b  gcc/cfgrtl.h
! a9e07719fdcc54085a77ed0d2cfa2ba1  gcc/cgraph.cc
! 36f2d894754990a4d109b7c95700ab75  gcc/cgraph.h
  5757ec66e81724328cf4c78ce0354445  gcc/cgraphbuild.cc
  af0efaf9e2173f391a376b4f8f61037f  gcc/cgraphclones.cc
! 9c6124b49afaf89d9a379249260d75f5  gcc/cgraphunit.cc
  c4a638b8438c85490d58aa4c8a364b19  gcc/cif-code.def
  51b9093b582e7ab838747e098a7aeedd  gcc/collect-utils.cc
  553d6ef88e3bbc59f1562d2aa4b14ada  gcc/collect-utils.h
*************** edbea9c45bd94aaebcdc56d9cf836f77  gcc/co
*** 3191,3197 ****
  2ec72d0e57c1f7b840013ba711e852c7  gcc/collect2.h
  a11d1e0986f7e4980609556464f7402b  gcc/color-macros.h
  8944f9bf83d393ae5343dc8323fbe27c  gcc/combine-stack-adj.cc
! 3f3fdbe6897fed5eacdbf6771f715875  gcc/combine.cc
  95a28c5bec13efb49456ad7b0b35c5e8  gcc/common.md
  e204bf4b5990ec9536bc7ebd5fbed741  gcc/common.opt
  1dfb24e07014e2857e3871b986f7cda8  gcc/common/common-target-def.h
--- 3192,3198 ----
  2ec72d0e57c1f7b840013ba711e852c7  gcc/collect2.h
  a11d1e0986f7e4980609556464f7402b  gcc/color-macros.h
  8944f9bf83d393ae5343dc8323fbe27c  gcc/combine-stack-adj.cc
! 4128cbee668e7335703ba833dccbd4c4  gcc/combine.cc
  95a28c5bec13efb49456ad7b0b35c5e8  gcc/common.md
  e204bf4b5990ec9536bc7ebd5fbed741  gcc/common.opt
  1dfb24e07014e2857e3871b986f7cda8  gcc/common/common-target-def.h
*************** cd40090c6b0ff392d059a73dafb6c8e7  gcc/co
*** 3216,3222 ****
  20e390668a44860c3145733d9c796800  gcc/common/config/frv/frv-common.cc
  be9b9d41f6660137eeec7dfdf8a7f359  gcc/common/config/gcn/gcn-common.cc
  165032b6a1a6571ace982867c4ff2039  gcc/common/config/h8300/h8300-common.cc
! 53d2f0046d1231777b92ad3c4d63c19b  gcc/common/config/i386/cpuinfo.h
  3737d93d5e1cf0e50e1596dbfcfc3452  gcc/common/config/i386/i386-common.cc
  09f083db704de0dbd05d89d9a77468d5  gcc/common/config/i386/i386-cpuinfo.h
  3f143be99f8781c66861c65ae2a601a3  gcc/common/config/i386/i386-isas.h
--- 3217,3223 ----
  20e390668a44860c3145733d9c796800  gcc/common/config/frv/frv-common.cc
  be9b9d41f6660137eeec7dfdf8a7f359  gcc/common/config/gcn/gcn-common.cc
  165032b6a1a6571ace982867c4ff2039  gcc/common/config/h8300/h8300-common.cc
! 15b82148b3920dba211649a5ab23b40e  gcc/common/config/i386/cpuinfo.h
  3737d93d5e1cf0e50e1596dbfcfc3452  gcc/common/config/i386/i386-common.cc
  09f083db704de0dbd05d89d9a77468d5  gcc/common/config/i386/i386-cpuinfo.h
  3f143be99f8781c66861c65ae2a601a3  gcc/common/config/i386/i386-isas.h
*************** e0c84d669ee99cd7622e8c33152058ed  gcc/co
*** 3257,3270 ****
  6a09dc5d69c18159e48b650b80038ce6  gcc/config.build
  43bf829407a766488ab296a7c420d149  gcc/config.gcc
  f9e9c6799c33fd97ecef8d0371a5960e  gcc/config.host
! 05aae2b3f68c309d65e695856db883b9  gcc/config.in
  8e697813dc96ca90f5d0f4c196efe2cc  gcc/config/README
  f1de29e1b542d2f98786a8a5bed74596  gcc/config/aarch64/aarch64-arches.def
  fe42934bb2be20fce3a65bddc5f20adf  gcc/config/aarch64/aarch64-bti-insert.cc
! 4bf71100f6ef7e427a5bee7200179edd  gcc/config/aarch64/aarch64-builtins.cc
  3a596e16575b27f2763dd0c1aa74b9a6  gcc/config/aarch64/aarch64-c.cc
  228a5b455d8db6951f07072ca3e905a0  gcc/config/aarch64/aarch64-cc-fusion.cc
! ef2807d6f9beab4f4e9e55743531f261  gcc/config/aarch64/aarch64-cores.def
  1bef2bc91d6c2282d3b5a48cdccc9a9b  gcc/config/aarch64/aarch64-cost-tables.h
  bfcad118f4e1d0faf33cd0f4724802c5  gcc/config/aarch64/aarch64-d.cc
  a7af803a36f47f80fa9cab4d71a67940  gcc/config/aarch64/aarch64-d.h
--- 3258,3271 ----
  6a09dc5d69c18159e48b650b80038ce6  gcc/config.build
  43bf829407a766488ab296a7c420d149  gcc/config.gcc
  f9e9c6799c33fd97ecef8d0371a5960e  gcc/config.host
! d2539a7b151ea00b14ee8995c3be8c0e  gcc/config.in
  8e697813dc96ca90f5d0f4c196efe2cc  gcc/config/README
  f1de29e1b542d2f98786a8a5bed74596  gcc/config/aarch64/aarch64-arches.def
  fe42934bb2be20fce3a65bddc5f20adf  gcc/config/aarch64/aarch64-bti-insert.cc
! 8db85981761ae473436b6df5503400e5  gcc/config/aarch64/aarch64-builtins.cc
  3a596e16575b27f2763dd0c1aa74b9a6  gcc/config/aarch64/aarch64-c.cc
  228a5b455d8db6951f07072ca3e905a0  gcc/config/aarch64/aarch64-cc-fusion.cc
! 7a31061721060f1b5fece4c161bd8841  gcc/config/aarch64/aarch64-cores.def
  1bef2bc91d6c2282d3b5a48cdccc9a9b  gcc/config/aarch64/aarch64-cost-tables.h
  bfcad118f4e1d0faf33cd0f4724802c5  gcc/config/aarch64/aarch64-d.cc
  a7af803a36f47f80fa9cab4d71a67940  gcc/config/aarch64/aarch64-d.h
*************** bbf7795c7deae4a1b994b366a3ee10c7  gcc/co
*** 3280,3286 ****
  81f259af6086b92d472c64bb1a57e9ef  gcc/config/aarch64/aarch64-option-extensions.def
  4e47319bbf2818a04226e243058e04c9  gcc/config/aarch64/aarch64-opts.h
  bc2702391f7a1d6ceedc1a05d62a8dca  gcc/config/aarch64/aarch64-passes.def
! 5b5a7d72e3260c8d8cf8e195e1bc15c1  gcc/config/aarch64/aarch64-protos.h
  be2d39d69b16e211235b01445aa8434d  gcc/config/aarch64/aarch64-simd-builtin-types.def
  605913e6bba64efb989549a141209408  gcc/config/aarch64/aarch64-simd-builtins.def
  eb4ee2e7be03c43ecbad8d44393fc9d6  gcc/config/aarch64/aarch64-simd.md
--- 3281,3287 ----
  81f259af6086b92d472c64bb1a57e9ef  gcc/config/aarch64/aarch64-option-extensions.def
  4e47319bbf2818a04226e243058e04c9  gcc/config/aarch64/aarch64-opts.h
  bc2702391f7a1d6ceedc1a05d62a8dca  gcc/config/aarch64/aarch64-passes.def
! 8523383da1b7fb30b8d84cc9d5015cce  gcc/config/aarch64/aarch64-protos.h
  be2d39d69b16e211235b01445aa8434d  gcc/config/aarch64/aarch64-simd-builtin-types.def
  605913e6bba64efb989549a141209408  gcc/config/aarch64/aarch64-simd-builtins.def
  eb4ee2e7be03c43ecbad8d44393fc9d6  gcc/config/aarch64/aarch64-simd.md
*************** d53d0fbc6526d523bedefd90ee66c697  gcc/co
*** 3299,3312 ****
  85b90f18099c71fc34e444232db3299e  gcc/config/aarch64/aarch64-sve-builtins.h
  97d187db01e9e11ef088f9a15fc481e6  gcc/config/aarch64/aarch64-sve.md
  4a8e12ce42731642b5f6346e6f2509b5  gcc/config/aarch64/aarch64-sve2.md
! ed0d06662837fe999d081a8b761b0fe6  gcc/config/aarch64/aarch64-tune.md
  6c7986c4d9051e8d2c655a393c08965a  gcc/config/aarch64/aarch64-tuning-flags.def
  4f60050851035039851c9bded03b452d  gcc/config/aarch64/aarch64-vxworks.h
! acca9c995b2f47a7b66c962ec8b26631  gcc/config/aarch64/aarch64.cc
! 5da28da5ad4a24ccbc0a0ecaa6300eb2  gcc/config/aarch64/aarch64.h
! 0a76c9789c08e714567ba9f8211400a4  gcc/config/aarch64/aarch64.md
  3d8b1c6373873351739af54d209f8abe  gcc/config/aarch64/aarch64.opt
! 273bc0578a1b2e9d9df47bfb5160118c  gcc/config/aarch64/arm_acle.h
  8c46e4dc6d25951568fbb758738a675e  gcc/config/aarch64/arm_bf16.h
  b041e1c91c2a57f1b07188bd82b07c88  gcc/config/aarch64/arm_fp16.h
  14cc63c6b8c265d0279b0dd2a525ad94  gcc/config/aarch64/arm_neon.h
--- 3300,3313 ----
  85b90f18099c71fc34e444232db3299e  gcc/config/aarch64/aarch64-sve-builtins.h
  97d187db01e9e11ef088f9a15fc481e6  gcc/config/aarch64/aarch64-sve.md
  4a8e12ce42731642b5f6346e6f2509b5  gcc/config/aarch64/aarch64-sve2.md
! 6205ae3ac0346139e0b7de98e127e761  gcc/config/aarch64/aarch64-tune.md
  6c7986c4d9051e8d2c655a393c08965a  gcc/config/aarch64/aarch64-tuning-flags.def
  4f60050851035039851c9bded03b452d  gcc/config/aarch64/aarch64-vxworks.h
! b3b16035524292a1bb4eb281dd94e356  gcc/config/aarch64/aarch64.cc
! c91f3bcf184147536b8712f1f259177a  gcc/config/aarch64/aarch64.h
! 1883f5e6689b3fafcc7c6ef49a64eb11  gcc/config/aarch64/aarch64.md
  3d8b1c6373873351739af54d209f8abe  gcc/config/aarch64/aarch64.opt
! bec9f610ee73c38f986c017ad5b57b7f  gcc/config/aarch64/arm_acle.h
  8c46e4dc6d25951568fbb758738a675e  gcc/config/aarch64/arm_bf16.h
  b041e1c91c2a57f1b07188bd82b07c88  gcc/config/aarch64/arm_fp16.h
  14cc63c6b8c265d0279b0dd2a525ad94  gcc/config/aarch64/arm_neon.h
*************** ebdfd65d4a873052d228398d5331af7e  gcc/co
*** 3324,3330 ****
  9aa9cbf52d3975e3e11ff0152e1430ee  gcc/config/aarch64/geniterators.sh
  c5b65803ffe39ccd4b441618ce74971c  gcc/config/aarch64/gentune.sh
  86eaf33edeb885c2c9ae2a9825879e59  gcc/config/aarch64/host-aarch64-darwin.cc
! 48dc1df1c26e295abbbe5114614e4e46  gcc/config/aarch64/iterators.md
  962d936dedd891ed2d66240d3afad507  gcc/config/aarch64/predicates.md
  7973f7652f6c3d5b279e949d43cf87ae  gcc/config/aarch64/rtems.h
  539a63ae970b4d407ca6785b9ea15eff  gcc/config/aarch64/saphira.md
--- 3325,3331 ----
  9aa9cbf52d3975e3e11ff0152e1430ee  gcc/config/aarch64/geniterators.sh
  c5b65803ffe39ccd4b441618ce74971c  gcc/config/aarch64/gentune.sh
  86eaf33edeb885c2c9ae2a9825879e59  gcc/config/aarch64/host-aarch64-darwin.cc
! 6d13669c566cdcd5d5ff0f23def122d8  gcc/config/aarch64/iterators.md
  962d936dedd891ed2d66240d3afad507  gcc/config/aarch64/predicates.md
  7973f7652f6c3d5b279e949d43cf87ae  gcc/config/aarch64/rtems.h
  539a63ae970b4d407ca6785b9ea15eff  gcc/config/aarch64/saphira.md
*************** a07ee362a4961e9d41cb0ab83553de74  gcc/co
*** 3342,3352 ****
  9857ce0f95eda3ad2548d3c99d7db2b0  gcc/config/alpha/alpha-modes.def
  85c03ec553f163234803a92cef295052  gcc/config/alpha/alpha-passes.def
  e89eb587493c56bdc128738eea0198b4  gcc/config/alpha/alpha-protos.h
! fb4cce1b1d927aa57e388f517ca5d8d9  gcc/config/alpha/alpha.cc
  05c0209aea53a4b5fe54f1962ba99c45  gcc/config/alpha/alpha.h
! 9db29f7c69d016b0a51cd6e4de9dff8c  gcc/config/alpha/alpha.md
  bf0393dd31f6ef36bef17dc70498bb0d  gcc/config/alpha/alpha.opt
! 7181a3078a97bc9cabc46f9e25dcaef5  gcc/config/alpha/constraints.md
  201f3f214a1b283e6a27afe845fad351  gcc/config/alpha/driver-alpha.cc
  7b2f7b1ec2d2b742979f48f3a8c0a63e  gcc/config/alpha/elf.h
  10364c8bfc3e1be17c4006b0afcdf86a  gcc/config/alpha/elf.opt
--- 3343,3353 ----
  9857ce0f95eda3ad2548d3c99d7db2b0  gcc/config/alpha/alpha-modes.def
  85c03ec553f163234803a92cef295052  gcc/config/alpha/alpha-passes.def
  e89eb587493c56bdc128738eea0198b4  gcc/config/alpha/alpha-protos.h
! e9c377b9e5c7dee01b1c710b5b118fc0  gcc/config/alpha/alpha.cc
  05c0209aea53a4b5fe54f1962ba99c45  gcc/config/alpha/alpha.h
! 58efd6f77af8bbdb19e3b179619f5079  gcc/config/alpha/alpha.md
  bf0393dd31f6ef36bef17dc70498bb0d  gcc/config/alpha/alpha.opt
! 423542683a8c90ccc4156f5701fddbec  gcc/config/alpha/constraints.md
  201f3f214a1b283e6a27afe845fad351  gcc/config/alpha/driver-alpha.cc
  7b2f7b1ec2d2b742979f48f3a8c0a63e  gcc/config/alpha/elf.h
  10364c8bfc3e1be17c4006b0afcdf86a  gcc/config/alpha/elf.opt
*************** afc3b989a3b35a84eedcdbaffcbf7597  gcc/co
*** 3406,3412 ****
  86ad934fe071d60aa0944c4e5629ee45  gcc/config/arm/aarch-common.cc
  561912196221bf550ecb2d25ad60cf91  gcc/config/arm/aarch-cost-tables.h
  fad8b46a6005f06698eb532c1291d5d1  gcc/config/arm/aout.h
! 6126555e47e65862b1299f227e550eff  gcc/config/arm/arm-builtins.cc
  cf18f061428a5d02bf8f40090add93ff  gcc/config/arm/arm-builtins.h
  c71241cda48d4ff0a62a3790ba45c5fc  gcc/config/arm/arm-c.cc
  492769dadd3b1200d72feb224819263f  gcc/config/arm/arm-cpus.in
--- 3407,3413 ----
  86ad934fe071d60aa0944c4e5629ee45  gcc/config/arm/aarch-common.cc
  561912196221bf550ecb2d25ad60cf91  gcc/config/arm/aarch-cost-tables.h
  fad8b46a6005f06698eb532c1291d5d1  gcc/config/arm/aout.h
! ca6ebc7e891c4459b5e39d502e738460  gcc/config/arm/arm-builtins.cc
  cf18f061428a5d02bf8f40090add93ff  gcc/config/arm/arm-builtins.h
  c71241cda48d4ff0a62a3790ba45c5fc  gcc/config/arm/arm-c.cc
  492769dadd3b1200d72feb224819263f  gcc/config/arm/arm-cpus.in
*************** c2d0c814a2ee25dbbb1edfceeb6f5683  gcc/co
*** 3425,3433 ****
  e6d8d15841677273be28f2c17f0334d0  gcc/config/arm/arm-simd-builtin-types.def
  5760ab040aa998c3ead41b255c932c2e  gcc/config/arm/arm-tables.opt
  92cd8a4833cea94a90965e7682f7a34c  gcc/config/arm/arm-tune.md
! 1592702aad304162eb264380cfe6c183  gcc/config/arm/arm.cc
  7fc9da8a136669bc443455b6424ccc9b  gcc/config/arm/arm.h
! 3eba8a70b188a11cea7c47566c17ba74  gcc/config/arm/arm.md
  ad6a9cfbbef5a63b153aea7b4ddcea81  gcc/config/arm/arm.opt
  2eea8eb5a626c35bdb3b9bcaa1f235cb  gcc/config/arm/arm1020e.md
  52e6ca4bd01cf86b7cb20e854aec637a  gcc/config/arm/arm1026ejs.md
--- 3426,3434 ----
  e6d8d15841677273be28f2c17f0334d0  gcc/config/arm/arm-simd-builtin-types.def
  5760ab040aa998c3ead41b255c932c2e  gcc/config/arm/arm-tables.opt
  92cd8a4833cea94a90965e7682f7a34c  gcc/config/arm/arm-tune.md
! f690165fb40e5eb0944c4a7c6d5b8958  gcc/config/arm/arm.cc
  7fc9da8a136669bc443455b6424ccc9b  gcc/config/arm/arm.h
! baa138251371e569c79b7ed7b5315efc  gcc/config/arm/arm.md
  ad6a9cfbbef5a63b153aea7b4ddcea81  gcc/config/arm/arm.opt
  2eea8eb5a626c35bdb3b9bcaa1f235cb  gcc/config/arm/arm1020e.md
  52e6ca4bd01cf86b7cb20e854aec637a  gcc/config/arm/arm1026ejs.md
*************** f82fe1ddbe3db8a800ef98ecafa6bd46  gcc/co
*** 3440,3446 ****
  fc5cc271a5697d0016cd6c64a67c71db  gcc/config/arm/arm_cde_builtins.def
  2d8f46acb748e5350c359a70c09571a8  gcc/config/arm/arm_cmse.h
  c4cb23cd7b0bb7e50703761c71c47806  gcc/config/arm/arm_fp16.h
! 190b68b5fcda4c346a4ca41f853b38ea  gcc/config/arm/arm_mve.h
  4d52cc595e40683c2116c1c9505f3c21  gcc/config/arm/arm_mve_builtins.def
  675c2bc4d01144ddb0d3ca1324746a54  gcc/config/arm/arm_mve_types.h
  46cdfe229792555c51a5405c7d7daaf3  gcc/config/arm/arm_neon.h
--- 3441,3447 ----
  fc5cc271a5697d0016cd6c64a67c71db  gcc/config/arm/arm_cde_builtins.def
  2d8f46acb748e5350c359a70c09571a8  gcc/config/arm/arm_cmse.h
  c4cb23cd7b0bb7e50703761c71c47806  gcc/config/arm/arm_fp16.h
! c0efc85f8545791b68603e4c54d8c26f  gcc/config/arm/arm_mve.h
  4d52cc595e40683c2116c1c9505f3c21  gcc/config/arm/arm_mve_builtins.def
  675c2bc4d01144ddb0d3ca1324746a54  gcc/config/arm/arm_mve_types.h
  46cdfe229792555c51a5405c7d7daaf3  gcc/config/arm/arm_neon.h
*************** c4cb23cd7b0bb7e50703761c71c47806  gcc/co
*** 3448,3454 ****
  b713bc09f037a0f4cd254202dd76a14b  gcc/config/arm/arm_vfp_builtins.def
  9e78fb9227c3d2b30c14089309f6d8af  gcc/config/arm/bpabi.h
  82ebffe80579478445adfec7e1cfab29  gcc/config/arm/common.md
! 7a26454ff7bf257773cc87fcb21d9743  gcc/config/arm/constraints.md
  6586aa5e34ca29411e927c3fc6560313  gcc/config/arm/cortex-a15-neon.md
  a16eee7162f182645beb92f387325e33  gcc/config/arm/cortex-a15.md
  6dc9c5189db0cf6db32e63018f40b702  gcc/config/arm/cortex-a17-neon.md
--- 3449,3455 ----
  b713bc09f037a0f4cd254202dd76a14b  gcc/config/arm/arm_vfp_builtins.def
  9e78fb9227c3d2b30c14089309f6d8af  gcc/config/arm/bpabi.h
  82ebffe80579478445adfec7e1cfab29  gcc/config/arm/common.md
! f3dbb520afcfa4760670512fa790ec1e  gcc/config/arm/constraints.md
  6586aa5e34ca29411e927c3fc6560313  gcc/config/arm/cortex-a15-neon.md
  a16eee7162f182645beb92f387325e33  gcc/config/arm/cortex-a15.md
  6dc9c5189db0cf6db32e63018f40b702  gcc/config/arm/cortex-a17-neon.md
*************** b50c07130eb3ca41d10c14b178702537  gcc/co
*** 3489,3500 ****
  412a503ee16d05e1867a26c7d731c031  gcc/config/arm/marvell-f-iwmmxt.md
  eca77d0ebe850d280b635d61d19d0052  gcc/config/arm/marvell-pj4.md
  37e6b29bad3412ebd9262122316c26f8  gcc/config/arm/mmintrin.h
! 4a57a00c51502dcd250f20b8ef6971db  gcc/config/arm/mve.md
! cea37ecbae4aec8ae25bcd0171dfd308  gcc/config/arm/neon.md
  9d7507b760b746eedf6516e465f78934  gcc/config/arm/netbsd-eabi.h
  2acba2050567d91862751ac4509442fc  gcc/config/arm/netbsd-elf.h
  778cf6a75ff4abe8d012c19053effcd5  gcc/config/arm/parsecpu.awk
! 7a09a1c149d6eeff95eb959d2964cab7  gcc/config/arm/predicates.md
  567d8a0fb6e1fd78d4e4653f0021a9a0  gcc/config/arm/rtems.h
  196b5a000d1c792979e929fcf7f24a84  gcc/config/arm/semi.h
  83f6bb89bd00ca7c4381bd036c0ca6ba  gcc/config/arm/symbian.h
--- 3490,3501 ----
  412a503ee16d05e1867a26c7d731c031  gcc/config/arm/marvell-f-iwmmxt.md
  eca77d0ebe850d280b635d61d19d0052  gcc/config/arm/marvell-pj4.md
  37e6b29bad3412ebd9262122316c26f8  gcc/config/arm/mmintrin.h
! d8e9c12f73f488a2247e7fdda0567ca3  gcc/config/arm/mve.md
! b263140b79efc075c33734e48b7008b9  gcc/config/arm/neon.md
  9d7507b760b746eedf6516e465f78934  gcc/config/arm/netbsd-eabi.h
  2acba2050567d91862751ac4509442fc  gcc/config/arm/netbsd-elf.h
  778cf6a75ff4abe8d012c19053effcd5  gcc/config/arm/parsecpu.awk
! a419acfb586ad61f0cfc38cf645e2807  gcc/config/arm/predicates.md
  567d8a0fb6e1fd78d4e4653f0021a9a0  gcc/config/arm/rtems.h
  196b5a000d1c792979e929fcf7f24a84  gcc/config/arm/semi.h
  83f6bb89bd00ca7c4381bd036c0ca6ba  gcc/config/arm/symbian.h
*************** df9b3fed001223cd70a167527c8bf05c  gcc/co
*** 3521,3556 ****
  80a116f15f21f7abef8ef372d4eeb59d  gcc/config/arm/unknown-elf.h
  53a7b4e744d2fffe93ab9bf627338c3d  gcc/config/arm/unspecs.md
  41031118cca2e75ff725bb3ffd2f5751  gcc/config/arm/vec-common.md
! 7de39f682715329a3b33858ebba386c9  gcc/config/arm/vfp.md
  95def474af7af4de37dc84d6fc296632  gcc/config/arm/vfp11.md
  df81f23fd0210a50276836db87675296  gcc/config/arm/vxworks.h
  267f32e117cb09202d6198b83964ee77  gcc/config/arm/vxworks.opt
  8bb1a840fb87b138c620682ccad6aee4  gcc/config/arm/x-arm
  2d1f84525fa04ec8662e53f9e39d1134  gcc/config/arm/xgene1.md
! 36f89cb38dc871cf3cdcd051075d114f  gcc/config/avr/avr-arch.h
  2f32979b314fdfa213d04509e193eea9  gcc/config/avr/avr-c.cc
! 480668763d17f2b5167991c067befc49  gcc/config/avr/avr-devices.cc
! a8e967b831bb88067a50ebe1aaa9000e  gcc/config/avr/avr-dimode.md
  f8da9c6ca3a4de8f25b05bad4aab4103  gcc/config/avr/avr-fixed.md
  0a144448d4f6070a4b9fcace87d0201f  gcc/config/avr/avr-log.cc
! 58b191ddfbc4f4f3b2eef149e125eb82  gcc/config/avr/avr-mcus.def
  480a983b45cb16a07fb0c86c70ec186f  gcc/config/avr/avr-modes.def
! b2592117f31aced3aafa07535e6a04f0  gcc/config/avr/avr-passes.def
! 37ff17dbaf245f390ea36c7f29a7a0bf  gcc/config/avr/avr-protos.h
  164ff6dd3b6f3a910fed5a48242842d5  gcc/config/avr/avr-stdint.h
! 3a0e450cacf4210bd66c3cb58b3937b2  gcc/config/avr/avr.cc
! 647d1e4da991324cf2eaa9b93c7586b3  gcc/config/avr/avr.h
! 863c53d8ecc4e08370b4bdaab6e94edb  gcc/config/avr/avr.md
! 13a7e96bc1d8ac7544d5f185ff8e8e8a  gcc/config/avr/avr.opt
  eaed73ea14d92bf236ad5c9187507c16  gcc/config/avr/avrlibc.h
  9f9294792b117b0797422b0f0fd8db86  gcc/config/avr/builtins.def
! cf2f538d0f7523461b7a22551657d622  gcc/config/avr/constraints.md
! 519d174e61a3b68e3bd0433b39d3da66  gcc/config/avr/driver-avr.cc
  bec6d9236523353c7e7397b804a6437a  gcc/config/avr/elf.h
  994f8b1234a164d23683bad0667c5f61  gcc/config/avr/gen-avr-mmcu-specs.cc
  e24c8d6e0f93587aab14772ff2f948c0  gcc/config/avr/gen-avr-mmcu-texi.cc
  9aacb3efacdfbea2504d9362807594fd  gcc/config/avr/genmultilib.awk
! bdd0de08d8ef9281ea68799bf0dc4666  gcc/config/avr/predicates.md
  cac8c94973c07d9bc0bdb4c2508bd82b  gcc/config/avr/specs.h
  0c00177746f6857c43084485cb9756eb  gcc/config/avr/stdfix.h
  0d13497f8f07c60ebbb52a5beaecfede  gcc/config/avr/t-avr
--- 3522,3557 ----
  80a116f15f21f7abef8ef372d4eeb59d  gcc/config/arm/unknown-elf.h
  53a7b4e744d2fffe93ab9bf627338c3d  gcc/config/arm/unspecs.md
  41031118cca2e75ff725bb3ffd2f5751  gcc/config/arm/vec-common.md
! 86a3916c0adadda256ac1ab2dba91eee  gcc/config/arm/vfp.md
  95def474af7af4de37dc84d6fc296632  gcc/config/arm/vfp11.md
  df81f23fd0210a50276836db87675296  gcc/config/arm/vxworks.h
  267f32e117cb09202d6198b83964ee77  gcc/config/arm/vxworks.opt
  8bb1a840fb87b138c620682ccad6aee4  gcc/config/arm/x-arm
  2d1f84525fa04ec8662e53f9e39d1134  gcc/config/arm/xgene1.md
! d483c5d70f26ba46db3fd243f30229fc  gcc/config/avr/avr-arch.h
  2f32979b314fdfa213d04509e193eea9  gcc/config/avr/avr-c.cc
! 952ae95453da752980ef4fbee9df9c44  gcc/config/avr/avr-devices.cc
! d64e43aad4ad9bbf3d299acd55495ac0  gcc/config/avr/avr-dimode.md
  f8da9c6ca3a4de8f25b05bad4aab4103  gcc/config/avr/avr-fixed.md
  0a144448d4f6070a4b9fcace87d0201f  gcc/config/avr/avr-log.cc
! 09ce676bb7cf71f13790ea4501506101  gcc/config/avr/avr-mcus.def
  480a983b45cb16a07fb0c86c70ec186f  gcc/config/avr/avr-modes.def
! a0fc31d8a59f7d686e973180e1669f56  gcc/config/avr/avr-passes.def
! 8f3858c21eacb8bac31962b42074a3d0  gcc/config/avr/avr-protos.h
  164ff6dd3b6f3a910fed5a48242842d5  gcc/config/avr/avr-stdint.h
! 7b5ca8cf22bead3a6e27ed383769be3d  gcc/config/avr/avr.cc
! ed39df13044ebe7bc1b2f5ff146ac579  gcc/config/avr/avr.h
! 149e0a205cf14ccd500e344eed283927  gcc/config/avr/avr.md
! 6edbfde303cb883ffe1050b8e0085fd4  gcc/config/avr/avr.opt
  eaed73ea14d92bf236ad5c9187507c16  gcc/config/avr/avrlibc.h
  9f9294792b117b0797422b0f0fd8db86  gcc/config/avr/builtins.def
! 22896009455f0da9f8cb63a5585bb39c  gcc/config/avr/constraints.md
! 74b6b298d3840b5f3a5ee140a30472d7  gcc/config/avr/driver-avr.cc
  bec6d9236523353c7e7397b804a6437a  gcc/config/avr/elf.h
  994f8b1234a164d23683bad0667c5f61  gcc/config/avr/gen-avr-mmcu-specs.cc
  e24c8d6e0f93587aab14772ff2f948c0  gcc/config/avr/gen-avr-mmcu-texi.cc
  9aacb3efacdfbea2504d9362807594fd  gcc/config/avr/genmultilib.awk
! 6d57740dc648f1c493b7c1f165b88320  gcc/config/avr/predicates.md
  cac8c94973c07d9bc0bdb4c2508bd82b  gcc/config/avr/specs.h
  0c00177746f6857c43084485cb9756eb  gcc/config/avr/stdfix.h
  0d13497f8f07c60ebbb52a5beaecfede  gcc/config/avr/t-avr
*************** c63f12e83019ec59f0315579c612ec6c  gcc/co
*** 3665,3675 ****
  34d6df0b3c2c505374efb226d0308119  gcc/config/darwin-driver.cc
  f45abe10e3aa93ce43dc8cdba5640b58  gcc/config/darwin-f.cc
  2f008666ac55a1275ad46737705557fc  gcc/config/darwin-ppc-ldouble-patch.def
! dd284730639b90f8e1b9409230c9dfc9  gcc/config/darwin-protos.h
! cb5bf7a5e59178a24f11676df7bd36ec  gcc/config/darwin-sections.def
! 6afc2ac3df5167a08a2ab5ff1e94577d  gcc/config/darwin.cc
! 282ab6a00ab99cccdc98025815b8e3b7  gcc/config/darwin.h
! 73a379c0bcbe698b48e59ff3d032707e  gcc/config/darwin.opt
  3565bbd41b50b8b5d5ee9ea2a2f7418a  gcc/config/dbxcoff.h
  6d89a3bd0a87690df3f4303c420c070f  gcc/config/dbxelf.h
  362acdec0f55c89a1402846a3c6a8f6f  gcc/config/default-c.cc
--- 3666,3676 ----
  34d6df0b3c2c505374efb226d0308119  gcc/config/darwin-driver.cc
  f45abe10e3aa93ce43dc8cdba5640b58  gcc/config/darwin-f.cc
  2f008666ac55a1275ad46737705557fc  gcc/config/darwin-ppc-ldouble-patch.def
! 6d32e8a940bb7132ce6928ce2767a4e5  gcc/config/darwin-protos.h
! 6db41de9eb5ca0404e49baaa94feddc1  gcc/config/darwin-sections.def
! 82212d8fc6ccddcaac88d0eeb35d2bf1  gcc/config/darwin.cc
! 2b57f631a28d110f81bca230156aee14  gcc/config/darwin.h
! 03ee4661b994ef3daddfe9a40d567124  gcc/config/darwin.opt
  3565bbd41b50b8b5d5ee9ea2a2f7418a  gcc/config/dbxcoff.h
  6d89a3bd0a87690df3f4303c420c070f  gcc/config/dbxelf.h
  362acdec0f55c89a1402846a3c6a8f6f  gcc/config/default-c.cc
*************** cf1bbcc054268a6a185f17503b37010d  gcc/co
*** 3797,3803 ****
  7140c08161ca9219fd720c34f93a602b  gcc/config/i386/ammintrin.h
  d4a6c7a692c80f0ed51ec3d6099f15dd  gcc/config/i386/amxbf16intrin.h
  d6abc2d151311152cb0693652c7b05cf  gcc/config/i386/amxint8intrin.h
! d99629e77d325de0ab19c2d2c883f7b9  gcc/config/i386/amxtileintrin.h
  d6b432ae98731354d73e97ad3d785397  gcc/config/i386/athlon.md
  d146e533457f0a84f8ed2dfcc599c0c5  gcc/config/i386/atom.md
  d3b4f4cbfc84b2f53ce3827afe4b7945  gcc/config/i386/att.h
--- 3798,3804 ----
  7140c08161ca9219fd720c34f93a602b  gcc/config/i386/ammintrin.h
  d4a6c7a692c80f0ed51ec3d6099f15dd  gcc/config/i386/amxbf16intrin.h
  d6abc2d151311152cb0693652c7b05cf  gcc/config/i386/amxint8intrin.h
! 30478dace2808786ce2f123ea241e825  gcc/config/i386/amxtileintrin.h
  d6b432ae98731354d73e97ad3d785397  gcc/config/i386/athlon.md
  d146e533457f0a84f8ed2dfcc599c0c5  gcc/config/i386/atom.md
  d3b4f4cbfc84b2f53ce3827afe4b7945  gcc/config/i386/att.h
*************** c458e148668e78e4e02a6f3565ab7e07  gcc/co
*** 3857,3865 ****
  881a6a791a72addc382da31af0ffbf7e  gcc/config/i386/cygming.opt
  68301008ce277633b6bcf0040cbfb53f  gcc/config/i386/cygwin-stdint.h
  73065376169b922762be869e9e462310  gcc/config/i386/cygwin-w64.h
! 9530f33d46cf20b7412ae03da7784ffe  gcc/config/i386/cygwin.h
  b60e062357a44078a917798542979921  gcc/config/i386/cygwin.opt
! e3830e39ae8b0d14fb1335be03c09c32  gcc/config/i386/darwin.h
  9babe6eff270583b672cdffa01aca413  gcc/config/i386/darwin32-biarch.h
  a22fb0f4889ea875908c2fdd7aea518b  gcc/config/i386/darwin64-biarch.h
  681f8c7a400d3008ee990b4357496d22  gcc/config/i386/djgpp-stdint.h
--- 3858,3866 ----
  881a6a791a72addc382da31af0ffbf7e  gcc/config/i386/cygming.opt
  68301008ce277633b6bcf0040cbfb53f  gcc/config/i386/cygwin-stdint.h
  73065376169b922762be869e9e462310  gcc/config/i386/cygwin-w64.h
! abd358f4fcfccaf6a002bcce8c4b54a9  gcc/config/i386/cygwin.h
  b60e062357a44078a917798542979921  gcc/config/i386/cygwin.opt
! c9b5c21399b224c44fc196d940202e8a  gcc/config/i386/darwin.h
  9babe6eff270583b672cdffa01aca413  gcc/config/i386/darwin32-biarch.h
  a22fb0f4889ea875908c2fdd7aea518b  gcc/config/i386/darwin64-biarch.h
  681f8c7a400d3008ee990b4357496d22  gcc/config/i386/djgpp-stdint.h
*************** b8f390f29e7cbe3b57bc812ec1f6aaab  gcc/co
*** 3884,3890 ****
  ab3fa41803950084ee3cd9958e6a1393  gcc/config/i386/glm.md
  61a7d42e02dbdb9257d8b64555e94d1f  gcc/config/i386/gmm_malloc.h
  2a4d03ea9a09acb2e27c79bc3055ab84  gcc/config/i386/gnu-property.cc
! 3acfb57e99e43adb2e845e037899cf1c  gcc/config/i386/gnu-user-common.h
  059d140455c7939d025adab7aa395a84  gcc/config/i386/gnu-user.h
  9ef90e64bcac5c359183947852d99edd  gcc/config/i386/gnu-user64.h
  44386b4d54a6ab2c5d2b8ce484bab564  gcc/config/i386/gnu.h
--- 3885,3891 ----
  ab3fa41803950084ee3cd9958e6a1393  gcc/config/i386/glm.md
  61a7d42e02dbdb9257d8b64555e94d1f  gcc/config/i386/gmm_malloc.h
  2a4d03ea9a09acb2e27c79bc3055ab84  gcc/config/i386/gnu-property.cc
! 580fe8134cbcbf3d3ef9ccd0d35d51e9  gcc/config/i386/gnu-user-common.h
  059d140455c7939d025adab7aa395a84  gcc/config/i386/gnu-user.h
  9ef90e64bcac5c359183947852d99edd  gcc/config/i386/gnu-user64.h
  44386b4d54a6ab2c5d2b8ce484bab564  gcc/config/i386/gnu.h
*************** dac1d55fce23c07f7334ab60107d2740  gcc/co
*** 3895,3921 ****
  f49f27ecc3f73457a104e71798f69e31  gcc/config/i386/hresetintrin.h
  59f4f2b14da54e4579a407bec8feacf2  gcc/config/i386/i386-builtin-types.awk
  e5f608519e1f03ddbe8c845378fdadc8  gcc/config/i386/i386-builtin-types.def
! 9d2d976ea2a22cefdce6662b9b745c1a  gcc/config/i386/i386-builtin.def
! 495e81c2a755f1c683cc2866edf7b9f3  gcc/config/i386/i386-builtins.cc
  1386ed6c665b92fb05c52b30d7fab44f  gcc/config/i386/i386-builtins.h
  7fb11c6fb9a30a343631cdbe654af3c0  gcc/config/i386/i386-c.cc
  e9dba11a6030bb896e56316e87976b8d  gcc/config/i386/i386-d.cc
  18d8aca3d6be4c0f13a294b167f38f45  gcc/config/i386/i386-d.h
! c90d4b86f631ff39ebbb7e7c026f08cf  gcc/config/i386/i386-expand.cc
  3c709d191abaf095a50b0ccc29328991  gcc/config/i386/i386-expand.h
! 754bff776651063ff06b2bcb50252ee7  gcc/config/i386/i386-features.cc
! ffd76bdf4194098464fbcf9c1dc4c463  gcc/config/i386/i386-features.h
  6937d1c6ece95c74b1c7ca2eb0265674  gcc/config/i386/i386-isa.def
  0093d40a44064ad74492537c26a7eac7  gcc/config/i386/i386-modes.def
! 3db38fdc5b8da86ec2dcb9b97320bb8e  gcc/config/i386/i386-options.cc
  7be51e744d8f9807ab03a83afaf685ca  gcc/config/i386/i386-options.h
  af85d0ff6d4cd15b14460985c816bbb3  gcc/config/i386/i386-opts.h
  bc068488ad4d00d93e15004aec10c28f  gcc/config/i386/i386-passes.def
  ec6047eefecd3fcbd1f5f5e73eedfe2f  gcc/config/i386/i386-protos.h
! ffd3785e7248340204441c5955650662  gcc/config/i386/i386.cc
! 545323e70a64499bc5ea1e5969289967  gcc/config/i386/i386.h
! f6611391db2e40d02deea172b2e6e9f6  gcc/config/i386/i386.md
! 65820a1c90a672e37a51eb5bd670dc73  gcc/config/i386/i386.opt
  916e372af07c88992a4dde741f963eac  gcc/config/i386/i386elf.h
  14e1802bbf5e0d6233d80d8f9fc83ed0  gcc/config/i386/ia32intrin.h
  b72f097222302e248e86a1bd8e98ca9b  gcc/config/i386/iamcu.h
--- 3896,3922 ----
  f49f27ecc3f73457a104e71798f69e31  gcc/config/i386/hresetintrin.h
  59f4f2b14da54e4579a407bec8feacf2  gcc/config/i386/i386-builtin-types.awk
  e5f608519e1f03ddbe8c845378fdadc8  gcc/config/i386/i386-builtin-types.def
! fd940784d70365a012747bd266742f09  gcc/config/i386/i386-builtin.def
! 120f6b3cdd9d2f1ae9b44ba63e6dbbec  gcc/config/i386/i386-builtins.cc
  1386ed6c665b92fb05c52b30d7fab44f  gcc/config/i386/i386-builtins.h
  7fb11c6fb9a30a343631cdbe654af3c0  gcc/config/i386/i386-c.cc
  e9dba11a6030bb896e56316e87976b8d  gcc/config/i386/i386-d.cc
  18d8aca3d6be4c0f13a294b167f38f45  gcc/config/i386/i386-d.h
! e90e18d477373b2c879ec7688343be85  gcc/config/i386/i386-expand.cc
  3c709d191abaf095a50b0ccc29328991  gcc/config/i386/i386-expand.h
! 0b4580838b2788a24d7a70eca267bf73  gcc/config/i386/i386-features.cc
! d3b148611be020715f6ff78424760245  gcc/config/i386/i386-features.h
  6937d1c6ece95c74b1c7ca2eb0265674  gcc/config/i386/i386-isa.def
  0093d40a44064ad74492537c26a7eac7  gcc/config/i386/i386-modes.def
! cb41e6bfb20d6a1bc16b3028ffc8e991  gcc/config/i386/i386-options.cc
  7be51e744d8f9807ab03a83afaf685ca  gcc/config/i386/i386-options.h
  af85d0ff6d4cd15b14460985c816bbb3  gcc/config/i386/i386-opts.h
  bc068488ad4d00d93e15004aec10c28f  gcc/config/i386/i386-passes.def
  ec6047eefecd3fcbd1f5f5e73eedfe2f  gcc/config/i386/i386-protos.h
! 65aef74fb267532a74e992960237e606  gcc/config/i386/i386.cc
! e5d843a5a920b7d7680734c13c8929bd  gcc/config/i386/i386.h
! f2909eec244ba6b2236b7775f2fd1852  gcc/config/i386/i386.md
! 7abb49886360a7038bbe29d74fa68b6f  gcc/config/i386/i386.opt
  916e372af07c88992a4dde741f963eac  gcc/config/i386/i386elf.h
  14e1802bbf5e0d6233d80d8f9fc83ed0  gcc/config/i386/ia32intrin.h
  b72f097222302e248e86a1bd8e98ca9b  gcc/config/i386/iamcu.h
*************** deb7d09bcda1f23f297841aa569db37a  gcc/co
*** 3938,3947 ****
  6f2e20eb5413e72135658acb3c265d88  gcc/config/i386/mingw-w64.h
  7825d17d84303a77ad8b6bc6dd673906  gcc/config/i386/mingw-w64.opt
  bbcda60db12697e323b00933ee40ded8  gcc/config/i386/mingw.opt
! b6cb7e0a3811006748966469cf8cc56b  gcc/config/i386/mingw32.h
  ea23ad893a55f744d2c1b92bb1fa58b7  gcc/config/i386/mm3dnow.h
  6c1c7c663150e74b9ab2511d744352d3  gcc/config/i386/mmintrin.h
! f8c70420148e0e93e459f18f491381d6  gcc/config/i386/mmx.md
  31346a482647fdb2ff94eca6e48e57ec  gcc/config/i386/movdirintrin.h
  70ad1e0e1a2bcedfd68558e53106cced  gcc/config/i386/msformat-c.cc
  2b0e639ce8a95cf149bf779faa505657  gcc/config/i386/mwaitintrin.h
--- 3939,3948 ----
  6f2e20eb5413e72135658acb3c265d88  gcc/config/i386/mingw-w64.h
  7825d17d84303a77ad8b6bc6dd673906  gcc/config/i386/mingw-w64.opt
  bbcda60db12697e323b00933ee40ded8  gcc/config/i386/mingw.opt
! 79fa880aa1d5038d9a3510d994295b78  gcc/config/i386/mingw32.h
  ea23ad893a55f744d2c1b92bb1fa58b7  gcc/config/i386/mm3dnow.h
  6c1c7c663150e74b9ab2511d744352d3  gcc/config/i386/mmintrin.h
! a5159c4e17ee152354410e6679834263  gcc/config/i386/mmx.md
  31346a482647fdb2ff94eca6e48e57ec  gcc/config/i386/movdirintrin.h
  70ad1e0e1a2bcedfd68558e53106cced  gcc/config/i386/msformat-c.cc
  2b0e639ce8a95cf149bf779faa505657  gcc/config/i386/mwaitintrin.h
*************** d6906912055f25ce87b3f315021dd99b  gcc/co
*** 3972,3978 ****
  5dc568f106b96e0944f39b6c8f27c51d  gcc/config/i386/slm.md
  2729a11650973e195375af7bccb55ce7  gcc/config/i386/smmintrin.h
  daccd4e3cdd63f0dbda7ded81a1478e8  gcc/config/i386/sol2.h
! 89ec7826d46ada5f91f0e3d071d83cc6  gcc/config/i386/sse.md
  10b2b2efc6fdb5368eb608587f67539d  gcc/config/i386/ssemath.h
  6bdc7b51876de6e87681dd2c97093efb  gcc/config/i386/stringop.def
  63673be1e52dad91e6e09ab3fd23682e  gcc/config/i386/subst.md
--- 3973,3979 ----
  5dc568f106b96e0944f39b6c8f27c51d  gcc/config/i386/slm.md
  2729a11650973e195375af7bccb55ce7  gcc/config/i386/smmintrin.h
  daccd4e3cdd63f0dbda7ded81a1478e8  gcc/config/i386/sol2.h
! 9a5c7dc008a1431011dd8f2d24c1453a  gcc/config/i386/sse.md
  10b2b2efc6fdb5368eb608587f67539d  gcc/config/i386/ssemath.h
  6bdc7b51876de6e87681dd2c97093efb  gcc/config/i386/stringop.def
  63673be1e52dad91e6e09ab3fd23682e  gcc/config/i386/subst.md
*************** f73f78a01e075bc90fe68c6a1b71ac1b  gcc/co
*** 4026,4032 ****
  389139c200520120fb9419c1c8e1b828  gcc/config/i386/x86-tune-sched-bd.cc
  40bf2fd6e01b2d322f54a763a3b55a06  gcc/config/i386/x86-tune-sched-core.cc
  862c36dc0312bd87cf63a2119be99160  gcc/config/i386/x86-tune-sched.cc
! d206b125d8ff15659d7b9168a70a63ac  gcc/config/i386/x86-tune.def
  ce22b05cc535a89dbb219457d178cacf  gcc/config/i386/x86gprintrin.h
  e44c986b85092282aced3b766506ebb6  gcc/config/i386/x86intrin.h
  111ac823774e8831ad95ac74302324da  gcc/config/i386/xm-cygwin.h
--- 4027,4033 ----
  389139c200520120fb9419c1c8e1b828  gcc/config/i386/x86-tune-sched-bd.cc
  40bf2fd6e01b2d322f54a763a3b55a06  gcc/config/i386/x86-tune-sched-core.cc
  862c36dc0312bd87cf63a2119be99160  gcc/config/i386/x86-tune-sched.cc
! 766b6a2e3fe2c2189e0630dc70ca24c9  gcc/config/i386/x86-tune.def
  ce22b05cc535a89dbb219457d178cacf  gcc/config/i386/x86gprintrin.h
  e44c986b85092282aced3b766506ebb6  gcc/config/i386/x86intrin.h
  111ac823774e8831ad95ac74302324da  gcc/config/i386/xm-cygwin.h
*************** d7c9029984fb692c48b03c7edec3da62  gcc/co
*** 4101,4108 ****
  187927a38ef291c9b146c6e31ce8bde9  gcc/config/loongarch/generic.md
  93bbe6d503e459bec56c7dd59ad562e4  gcc/config/loongarch/genopts/genstr.sh
  2c9c3f2661b6a86014d3af7826513e10  gcc/config/loongarch/genopts/loongarch-strings
! af5583deee0ea7e02967cb03a6c85dfb  gcc/config/loongarch/genopts/loongarch.opt.in
! 85adbedddbea6f7a3893f22710de0e28  gcc/config/loongarch/gnu-user.h
  b0b53e3aa4b2caf4c8fc56270f53b8ba  gcc/config/loongarch/la464.md
  d131557e8500011af1d08a79d6541c67  gcc/config/loongarch/larchintrin.h
  c561ec008b9da44240632a2e8738cd84  gcc/config/loongarch/linux.h
--- 4102,4109 ----
  187927a38ef291c9b146c6e31ce8bde9  gcc/config/loongarch/generic.md
  93bbe6d503e459bec56c7dd59ad562e4  gcc/config/loongarch/genopts/genstr.sh
  2c9c3f2661b6a86014d3af7826513e10  gcc/config/loongarch/genopts/loongarch-strings
! ac8b28535269ec773ef0ce6af5ff2225  gcc/config/loongarch/genopts/loongarch.opt.in
! 1b3de56f6a17b76b916901126bd6f3f5  gcc/config/loongarch/gnu-user.h
  b0b53e3aa4b2caf4c8fc56270f53b8ba  gcc/config/loongarch/la464.md
  d131557e8500011af1d08a79d6541c67  gcc/config/loongarch/larchintrin.h
  c561ec008b9da44240632a2e8738cd84  gcc/config/loongarch/linux.h
*************** cae26252c54a28513d91f790be149a4c  gcc/co
*** 4116,4134 ****
  1953cc130563d0ebe2e054c9e39b1bf5  gcc/config/loongarch/loongarch-driver.h
  5cc9d4c848862dcad636760ca3b54297  gcc/config/loongarch/loongarch-ftypes.def
  15082170b1e96d1d677239d8373f4ce4  gcc/config/loongarch/loongarch-modes.def
! 9d590a79ec519fc8a1563b9ef017498c  gcc/config/loongarch/loongarch-opts.cc
! 6f8d5bdd9db684a6838b5c6c56a120ac  gcc/config/loongarch/loongarch-opts.h
! ce786b3bbe89341012dadc4b50812bea  gcc/config/loongarch/loongarch-protos.h
  7dac179891b7f5030f246b3dc5063a34  gcc/config/loongarch/loongarch-str.h
  e87e1fc114ac64d998e217fc70bb284d  gcc/config/loongarch/loongarch-tune.h
! 905e46d5dc3e6b272a885ff93e09338a  gcc/config/loongarch/loongarch.cc
! 9e83ea13dcd9f00c5b817fd6d23484bb  gcc/config/loongarch/loongarch.h
! cd6048ef7b1b30c1dcd5b21a9b3309ab  gcc/config/loongarch/loongarch.md
! 6ce82e6fac38842ebeab30d9fa9c86ee  gcc/config/loongarch/loongarch.opt
  341adb054a917216830fd2decd29e84b  gcc/config/loongarch/predicates.md
! 3d246a3b6f221b39efda2e99543a59fd  gcc/config/loongarch/sync.md
  b5b7ae25005eaf777c6c7f8113d73fff  gcc/config/loongarch/t-linux
! fc7d079b5f56ba7e8ce7b4ab0cb064dd  gcc/config/loongarch/t-loongarch
  0694afecae00bd387716b1c1aa91f58f  gcc/config/lynx.h
  54c0ca65e031c269266318a6793975f2  gcc/config/lynx.opt
  620af35e67d564c03797d0efed05ee3c  gcc/config/m32c/addsub.md
--- 4117,4135 ----
  1953cc130563d0ebe2e054c9e39b1bf5  gcc/config/loongarch/loongarch-driver.h
  5cc9d4c848862dcad636760ca3b54297  gcc/config/loongarch/loongarch-ftypes.def
  15082170b1e96d1d677239d8373f4ce4  gcc/config/loongarch/loongarch-modes.def
! 81193ce934d79e3ad1ab992e8f796ebf  gcc/config/loongarch/loongarch-opts.cc
! 1a372c4fcbc6d8c402018e05a35c78a6  gcc/config/loongarch/loongarch-opts.h
! 80fa8abbce86711703a5a129b2f123e3  gcc/config/loongarch/loongarch-protos.h
  7dac179891b7f5030f246b3dc5063a34  gcc/config/loongarch/loongarch-str.h
  e87e1fc114ac64d998e217fc70bb284d  gcc/config/loongarch/loongarch-tune.h
! aa1008fce750f885f450e3f61b307928  gcc/config/loongarch/loongarch.cc
! d2e27e36aeaecfbd9b05b89c5186c7a6  gcc/config/loongarch/loongarch.h
! d3ba13b38bf5ecd09b8c9898243eddf0  gcc/config/loongarch/loongarch.md
! 2b399db875b4060d0a638e2eaa897bb9  gcc/config/loongarch/loongarch.opt
  341adb054a917216830fd2decd29e84b  gcc/config/loongarch/predicates.md
! b6357a7332ad6182d8356115f790af88  gcc/config/loongarch/sync.md
  b5b7ae25005eaf777c6c7f8113d73fff  gcc/config/loongarch/t-linux
! 9de60fce88ab6dd1d094fea04faf23dd  gcc/config/loongarch/t-loongarch
  0694afecae00bd387716b1c1aa91f58f  gcc/config/lynx.h
  54c0ca65e031c269266318a6793975f2  gcc/config/lynx.opt
  620af35e67d564c03797d0efed05ee3c  gcc/config/m32c/addsub.md
*************** c3ef461a61245d5d932cb01ed4d833e8  gcc/co
*** 4271,4282 ****
  88e78340f91191e86961da7cb0f6d396  gcc/config/mips/mips-fixed.md
  d8c324596c91841b46a3f6309447a40d  gcc/config/mips/mips-ftypes.def
  435edb7c2c6c1b16de8e29d60737747c  gcc/config/mips/mips-modes.def
! 3348d4620bd6195017ce782801822395  gcc/config/mips/mips-msa.md
  ea23feec32f144d135b5d5f32396a8ad  gcc/config/mips/mips-opts.h
  6156cdde6da23b9c368bc68f6f9d82bb  gcc/config/mips/mips-protos.h
  0e10771a2b2d29acfcc816bac79ef440  gcc/config/mips/mips-ps-3d.md
  234d90729fafb2d011d97c39dd26e283  gcc/config/mips/mips-tables.opt
! e4b5aaf56a0b2c5dbfec8047f2704ec8  gcc/config/mips/mips.cc
  47fe4503d2340225cb4a85c953c89008  gcc/config/mips/mips.h
  225a53521100ee70d70387865e0c1fb6  gcc/config/mips/mips.md
  0d82471eaffa9f4749a237e08b80ad37  gcc/config/mips/mips.opt
--- 4272,4283 ----
  88e78340f91191e86961da7cb0f6d396  gcc/config/mips/mips-fixed.md
  d8c324596c91841b46a3f6309447a40d  gcc/config/mips/mips-ftypes.def
  435edb7c2c6c1b16de8e29d60737747c  gcc/config/mips/mips-modes.def
! d01e1c80026e1907ee578506a5edd33f  gcc/config/mips/mips-msa.md
  ea23feec32f144d135b5d5f32396a8ad  gcc/config/mips/mips-opts.h
  6156cdde6da23b9c368bc68f6f9d82bb  gcc/config/mips/mips-protos.h
  0e10771a2b2d29acfcc816bac79ef440  gcc/config/mips/mips-ps-3d.md
  234d90729fafb2d011d97c39dd26e283  gcc/config/mips/mips-tables.opt
! 29340b1a0e2aab3c59f5118016db8003  gcc/config/mips/mips.cc
  47fe4503d2340225cb4a85c953c89008  gcc/config/mips/mips.h
  225a53521100ee70d70387865e0c1fb6  gcc/config/mips/mips.md
  0d82471eaffa9f4749a237e08b80ad37  gcc/config/mips/mips.opt
*************** e47d71d86ebb0d0f8afddf6d199f5364  gcc/co
*** 4500,4508 ****
  2eda1205dffee59771ece16cfd9f0d8b  gcc/config/pa/pa-openbsd.h
  7a10250d76ade2d934709e9b7bb5ed6a  gcc/config/pa/pa-opts.h
  81f28e8af0f5bc5ba27387764d23963b  gcc/config/pa/pa-protos.h
! 4d2299e4d6d733de7ec1c7685ddcdd9d  gcc/config/pa/pa.cc
  98df2e15f09cff2f151120ceee9f12df  gcc/config/pa/pa.h
! 5185fd9b7b5c9ba5d5bc227ae8b27775  gcc/config/pa/pa.md
  64cec30c3507a2146fe6ab58b03330af  gcc/config/pa/pa.opt
  891f23207e8d80f19e1df8c9e5118ab1  gcc/config/pa/pa32-linux.h
  b721e31e8ac5cfd5c02dda7a9fbca7c3  gcc/config/pa/pa32-netbsd.h
--- 4501,4509 ----
  2eda1205dffee59771ece16cfd9f0d8b  gcc/config/pa/pa-openbsd.h
  7a10250d76ade2d934709e9b7bb5ed6a  gcc/config/pa/pa-opts.h
  81f28e8af0f5bc5ba27387764d23963b  gcc/config/pa/pa-protos.h
! 5b34dd1d849b62c46f8d67394383d9da  gcc/config/pa/pa.cc
  98df2e15f09cff2f151120ceee9f12df  gcc/config/pa/pa.h
! cfa25b49f1d3f48a07efd8522187432f  gcc/config/pa/pa.md
  64cec30c3507a2146fe6ab58b03330af  gcc/config/pa/pa.opt
  891f23207e8d80f19e1df8c9e5118ab1  gcc/config/pa/pa32-linux.h
  b721e31e8ac5cfd5c02dda7a9fbca7c3  gcc/config/pa/pa32-netbsd.h
*************** b797d004525a009864b893ae4fd37c7a  gcc/co
*** 4565,4577 ****
  88c2c78891ab447d2675d0968c6626d9  gcc/config/riscv/riscv-shorten-memrefs.cc
  f60d94e10e9a0c6a4ddae1f3aae0bbc4  gcc/config/riscv/riscv-sr.cc
  d21366ce6d880e1560089312a963636e  gcc/config/riscv/riscv-subset.h
! b59643cff7ea0a2a6f614032a16139e8  gcc/config/riscv/riscv.cc
  f9b5d1210e6b0940277f77fd8ab0c9bb  gcc/config/riscv/riscv.h
  5ab629d6f9eb839b59c2fba1c700eb8b  gcc/config/riscv/riscv.md
  5d262ceccd11d7637234635169e18019  gcc/config/riscv/riscv.opt
  1f8d9fb5328ab69d6ee6aea7cbc52af8  gcc/config/riscv/rtems.h
  462630614e6e7a6209f8f18b6dff0eef  gcc/config/riscv/sifive-7.md
! 68ce7572bf65c61a8e3297e7e05368fd  gcc/config/riscv/sync.md
  1c27821991689abdaa7a908a0cc8dfa4  gcc/config/riscv/t-elf-multilib
  d8ae7bee35ef1ecd77143535da9aae78  gcc/config/riscv/t-linux
  1ed181a166b1d0e206c4a4e0024cce2a  gcc/config/riscv/t-linux-multilib
--- 4566,4578 ----
  88c2c78891ab447d2675d0968c6626d9  gcc/config/riscv/riscv-shorten-memrefs.cc
  f60d94e10e9a0c6a4ddae1f3aae0bbc4  gcc/config/riscv/riscv-sr.cc
  d21366ce6d880e1560089312a963636e  gcc/config/riscv/riscv-subset.h
! 127dc558ab84144bfc75c59af6e27a94  gcc/config/riscv/riscv.cc
  f9b5d1210e6b0940277f77fd8ab0c9bb  gcc/config/riscv/riscv.h
  5ab629d6f9eb839b59c2fba1c700eb8b  gcc/config/riscv/riscv.md
  5d262ceccd11d7637234635169e18019  gcc/config/riscv/riscv.opt
  1f8d9fb5328ab69d6ee6aea7cbc52af8  gcc/config/riscv/rtems.h
  462630614e6e7a6209f8f18b6dff0eef  gcc/config/riscv/sifive-7.md
! 7d2b60cc0f0c63811e5fb40daa67c3a6  gcc/config/riscv/sync.md
  1c27821991689abdaa7a908a0cc8dfa4  gcc/config/riscv/t-elf-multilib
  d8ae7bee35ef1ecd77143535da9aae78  gcc/config/riscv/t-linux
  1ed181a166b1d0e206c4a4e0024cce2a  gcc/config/riscv/t-linux-multilib
*************** ff4a6b203fb6d5089653a8497f00f395  gcc/co
*** 4612,4618 ****
  ba9a44e430912aebbb6a1b81be97cd3a  gcc/config/rs6000/aix72.h
  896ac66876b04d2b76989e6eee0b90ce  gcc/config/rs6000/aix73.h
  ef2ced8f2fb6ce8c5c1245ce6cee66f6  gcc/config/rs6000/altivec.h
! 9c0711847a18b3bda8e1aa02c327e9a6  gcc/config/rs6000/altivec.md
  cc49b81ab7c9ca29772c01a9a7535cca  gcc/config/rs6000/amo.h
  02da5ce24a764b70228b18b91f3c71b7  gcc/config/rs6000/biarch64.h
  1085f75a8407fb26f3c9146067f6f20b  gcc/config/rs6000/bmi2intrin.h
--- 4613,4619 ----
  ba9a44e430912aebbb6a1b81be97cd3a  gcc/config/rs6000/aix72.h
  896ac66876b04d2b76989e6eee0b90ce  gcc/config/rs6000/aix73.h
  ef2ced8f2fb6ce8c5c1245ce6cee66f6  gcc/config/rs6000/altivec.h
! 278886351e264c850ab923bdc10b063e  gcc/config/rs6000/altivec.md
  cc49b81ab7c9ca29772c01a9a7535cca  gcc/config/rs6000/amo.h
  02da5ce24a764b70228b18b91f3c71b7  gcc/config/rs6000/biarch64.h
  1085f75a8407fb26f3c9146067f6f20b  gcc/config/rs6000/bmi2intrin.h
*************** cc49b81ab7c9ca29772c01a9a7535cca  gcc/co
*** 4620,4626 ****
  54ec91ad1765f5503425295580f47013  gcc/config/rs6000/cell.md
  48092c856b89587cf747f397635a814e  gcc/config/rs6000/constraints.md
  441921d402e9838d42e073dbdae44779  gcc/config/rs6000/crypto.md
! 77c27779e033c8aebcea737036e485a2  gcc/config/rs6000/darwin.h
  503185b2f1b7ecba15c3130eeb6de309  gcc/config/rs6000/darwin.md
  6262a630a0319b874ebf7bb603354dff  gcc/config/rs6000/darwin.opt
  4d1427642846be99ef5df72c1c464cbd  gcc/config/rs6000/darwin32-biarch.h
--- 4621,4627 ----
  54ec91ad1765f5503425295580f47013  gcc/config/rs6000/cell.md
  48092c856b89587cf747f397635a814e  gcc/config/rs6000/constraints.md
  441921d402e9838d42e073dbdae44779  gcc/config/rs6000/crypto.md
! 58e049e372382f27f13a2f3c3ee65a3d  gcc/config/rs6000/darwin.h
  503185b2f1b7ecba15c3130eeb6de309  gcc/config/rs6000/darwin.md
  6262a630a0319b874ebf7bb603354dff  gcc/config/rs6000/darwin.opt
  4d1427642846be99ef5df72c1c464cbd  gcc/config/rs6000/darwin32-biarch.h
*************** ca44783c9c7d3e980434a37fd5ebd2bd  gcc/co
*** 4640,4647 ****
  177812c3c73950afb57861e8b44764a8  gcc/config/rs6000/emmintrin.h
  e2f33e3ad8c58ae7c4d37c57668d5d6d  gcc/config/rs6000/freebsd.h
  1b9d73432959c122188bd5c2819c226d  gcc/config/rs6000/freebsd64.h
! 294d38ad800a36068f5e357f6120ffe6  gcc/config/rs6000/fusion.md
! 510d12e161addcd3e90133d8016734f0  gcc/config/rs6000/genfusion.pl
  77483e03f3638fc04120ec5e72cc81c6  gcc/config/rs6000/genopt.sh
  e424c8451aa2fa5e941011dedc3f3d08  gcc/config/rs6000/host-darwin.cc
  e6df280cc5a65d387c7826ba6a8d5c36  gcc/config/rs6000/host-ppc64-darwin.cc
--- 4641,4648 ----
  177812c3c73950afb57861e8b44764a8  gcc/config/rs6000/emmintrin.h
  e2f33e3ad8c58ae7c4d37c57668d5d6d  gcc/config/rs6000/freebsd.h
  1b9d73432959c122188bd5c2819c226d  gcc/config/rs6000/freebsd64.h
! 42c2335311a88a309560a92ba5ce4c98  gcc/config/rs6000/fusion.md
! f3a5521e95d97a4bad6cd579f2534251  gcc/config/rs6000/genfusion.pl
  77483e03f3638fc04120ec5e72cc81c6  gcc/config/rs6000/genopt.sh
  e424c8451aa2fa5e941011dedc3f3d08  gcc/config/rs6000/host-darwin.cc
  e6df280cc5a65d387c7826ba6a8d5c36  gcc/config/rs6000/host-ppc64-darwin.cc
*************** db8e0cbf1cbd090070ea33edd5629e0b  gcc/co
*** 4656,4662 ****
  527bc8f53c10064aed61f852b917df1f  gcc/config/rs6000/lynx.h
  0cc3c5f9101501b8253ce3176c3ffce4  gcc/config/rs6000/milli.exp
  c483353b3be8e4608e9f79096169e69a  gcc/config/rs6000/mm_malloc.h
! 67fbc0ac86da83e1b861a2d77a288ad2  gcc/config/rs6000/mma.md
  6eadcc7d4dcedd8624a1fb7b41da66f6  gcc/config/rs6000/mmintrin.h
  61c28e3586fb2b03805991a64b45cb8c  gcc/config/rs6000/mpc.md
  95952f5d67af6326d2a04de86ee33226  gcc/config/rs6000/netbsd.h
--- 4657,4663 ----
  527bc8f53c10064aed61f852b917df1f  gcc/config/rs6000/lynx.h
  0cc3c5f9101501b8253ce3176c3ffce4  gcc/config/rs6000/milli.exp
  c483353b3be8e4608e9f79096169e69a  gcc/config/rs6000/mm_malloc.h
! 333a18dfab09df6dc320f98898945441  gcc/config/rs6000/mma.md
  6eadcc7d4dcedd8624a1fb7b41da66f6  gcc/config/rs6000/mmintrin.h
  61c28e3586fb2b03805991a64b45cb8c  gcc/config/rs6000/mpc.md
  95952f5d67af6326d2a04de86ee33226  gcc/config/rs6000/netbsd.h
*************** ee5eec4bab981773b4e3f805b4675170  gcc/co
*** 4674,4690 ****
  dd882bb8b346fd5c71c3edc3523c9837  gcc/config/rs6000/ppc-asm.h
  6d1c5a9feee6656b996e2ca020d567d5  gcc/config/rs6000/ppc-auxv.h
  1bd0038bfa018ab27c48f63a4e6515e1  gcc/config/rs6000/ppu_intrinsics.h
! 5cf2585a27776874e85afbf8f7d3c75e  gcc/config/rs6000/predicates.md
  8c1455ab31e44fd0dfaba2988aeac309  gcc/config/rs6000/rbtree.cc
  a8d5a7b4dde5aabdefe618616c9a0f75  gcc/config/rs6000/rbtree.h
! 4f6516b27edf03476faee4c43da43658  gcc/config/rs6000/rs6000-builtin.cc
! a19a889741326a0b3539d146e7c90e0f  gcc/config/rs6000/rs6000-builtins.def
! 194b4cf23e7ae4847e8b82d6217281df  gcc/config/rs6000/rs6000-c.cc
  d69516edfcccc824ece23ac1abebc808  gcc/config/rs6000/rs6000-call.cc
! 788bbb7b212d3eb79c98533414d76742  gcc/config/rs6000/rs6000-cpus.def
  c29c5d14236f95e023e900bf3d0da626  gcc/config/rs6000/rs6000-d.cc
  c338280d6b54073cccb52687d0ecc47a  gcc/config/rs6000/rs6000-d.h
! 73fdd592a835c4516b858963e5bdccd1  gcc/config/rs6000/rs6000-gen-builtins.cc
  a490bd1734755760e696287f317cb9db  gcc/config/rs6000/rs6000-internal.h
  a9fd9182753b1742f0240fb46af52781  gcc/config/rs6000/rs6000-linux.cc
  a4066af94f9fef208343046356f48fdc  gcc/config/rs6000/rs6000-logue.cc
--- 4675,4691 ----
  dd882bb8b346fd5c71c3edc3523c9837  gcc/config/rs6000/ppc-asm.h
  6d1c5a9feee6656b996e2ca020d567d5  gcc/config/rs6000/ppc-auxv.h
  1bd0038bfa018ab27c48f63a4e6515e1  gcc/config/rs6000/ppu_intrinsics.h
! f9988f8ee768613f827ca390bf213e67  gcc/config/rs6000/predicates.md
  8c1455ab31e44fd0dfaba2988aeac309  gcc/config/rs6000/rbtree.cc
  a8d5a7b4dde5aabdefe618616c9a0f75  gcc/config/rs6000/rbtree.h
! e0f4c016a8d3df118d1708c557d018e4  gcc/config/rs6000/rs6000-builtin.cc
! 36e5061a4c56bd75de1ff83419264a74  gcc/config/rs6000/rs6000-builtins.def
! a1cb6b8388293cf391d13f28b0b92a24  gcc/config/rs6000/rs6000-c.cc
  d69516edfcccc824ece23ac1abebc808  gcc/config/rs6000/rs6000-call.cc
! e38bd123eaaee0c150c6ec09d8eb707f  gcc/config/rs6000/rs6000-cpus.def
  c29c5d14236f95e023e900bf3d0da626  gcc/config/rs6000/rs6000-d.cc
  c338280d6b54073cccb52687d0ecc47a  gcc/config/rs6000/rs6000-d.h
! b90cf26dc9bd4b4b16ba5b0cf51ac967  gcc/config/rs6000/rs6000-gen-builtins.cc
  a490bd1734755760e696287f317cb9db  gcc/config/rs6000/rs6000-internal.h
  a9fd9182753b1742f0240fb46af52781  gcc/config/rs6000/rs6000-linux.cc
  a4066af94f9fef208343046356f48fdc  gcc/config/rs6000/rs6000-logue.cc
*************** b0ebc5652bf92a4f2c752b74777afe46  gcc/co
*** 4696,4707 ****
  67835799ee87533e04f2fbed2bd60702  gcc/config/rs6000/rs6000-passes.def
  ffda8f63c8242e1c9b8ca7d891c3106a  gcc/config/rs6000/rs6000-pcrel-opt.cc
  91fffda8ae46844deb7a9db32b7d07ba  gcc/config/rs6000/rs6000-protos.h
! ef3e25381794d8ed8d7aca2e005897ea  gcc/config/rs6000/rs6000-string.cc
  e63a23cfbabbc08ab82c8dba906a13b9  gcc/config/rs6000/rs6000-tables.opt
! 9a74932bcc32ba19d0e63159098e5fd4  gcc/config/rs6000/rs6000.cc
! df3197dc1718e3eb7b4e88a81a6ab939  gcc/config/rs6000/rs6000.h
! 11d514c207099391d51a59928983cc35  gcc/config/rs6000/rs6000.md
! bb01fd05fe116c89bb06cc20336b7160  gcc/config/rs6000/rs6000.opt
  6ae739401a438fbbd4f5625c7f040ce2  gcc/config/rs6000/rs64.md
  4d688d01298aeea9600a8af44172f891  gcc/config/rs6000/rtems.h
  bff178b842621aa040def2dfb8f23961  gcc/config/rs6000/secureplt.h
--- 4697,4708 ----
  67835799ee87533e04f2fbed2bd60702  gcc/config/rs6000/rs6000-passes.def
  ffda8f63c8242e1c9b8ca7d891c3106a  gcc/config/rs6000/rs6000-pcrel-opt.cc
  91fffda8ae46844deb7a9db32b7d07ba  gcc/config/rs6000/rs6000-protos.h
! 5f7d4f8db6bc1a1c6c4d685afb0436cf  gcc/config/rs6000/rs6000-string.cc
  e63a23cfbabbc08ab82c8dba906a13b9  gcc/config/rs6000/rs6000-tables.opt
! 4e63e5675fc8f8c9eb57693d81e8da0d  gcc/config/rs6000/rs6000.cc
! 1d02c47bea7435e1d2b6dd88bd87ee2d  gcc/config/rs6000/rs6000.h
! f9b93ce818416fda5a78cf21cf72cce2  gcc/config/rs6000/rs6000.md
! 8700751be0214a4ca8ae23c73529d19f  gcc/config/rs6000/rs6000.opt
  6ae739401a438fbbd4f5625c7f040ce2  gcc/config/rs6000/rs64.md
  4d688d01298aeea9600a8af44172f891  gcc/config/rs6000/rtems.h
  bff178b842621aa040def2dfb8f23961  gcc/config/rs6000/secureplt.h
*************** afddd2a7589607f0c4fbe9ac61a90663  gcc/co
*** 4738,4744 ****
  be77ffba248fa7ebb90e840df8bdae02  gcc/config/rs6000/tmmintrin.h
  79d33dfc94147d876ca015f4a25d8cac  gcc/config/rs6000/vec_types.h
  3ad3eb71ffcf8b730887d1083c86969b  gcc/config/rs6000/vector.md
! 2c5391c2e900bbdddc153dd802dea4f0  gcc/config/rs6000/vsx.md
  07be543763620625532c4855fd2bbd8b  gcc/config/rs6000/vxworks.h
  410becd5ec1d44b12ad8abac150d8386  gcc/config/rs6000/vxworksae.h
  c81225cedf76fb8af245069ce63f1856  gcc/config/rs6000/vxworksmils.h
--- 4739,4745 ----
  be77ffba248fa7ebb90e840df8bdae02  gcc/config/rs6000/tmmintrin.h
  79d33dfc94147d876ca015f4a25d8cac  gcc/config/rs6000/vec_types.h
  3ad3eb71ffcf8b730887d1083c86969b  gcc/config/rs6000/vector.md
! e72d9c433c122a98aa6c87ca01c0b8d1  gcc/config/rs6000/vsx.md
  07be543763620625532c4855fd2bbd8b  gcc/config/rs6000/vxworks.h
  410becd5ec1d44b12ad8abac150d8386  gcc/config/rs6000/vxworksae.h
  c81225cedf76fb8af245069ce63f1856  gcc/config/rs6000/vxworksmils.h
*************** df711d3c4209dc2078403fede05b0c9f  gcc/co
*** 4826,4841 ****
  f6221f8d3397d492618e56579e467e42  gcc/config/sh/sh-mem.cc
  d22ca9f61b3c805404561dcfc87d2298  gcc/config/sh/sh-modes.def
  2df8afb4e4a2466319288500b8b1cafa  gcc/config/sh/sh-protos.h
! 73fe24015420e63988aaa42e507c0c33  gcc/config/sh/sh.cc
  d7a6129121131f3e3e065eca8b30ecaf  gcc/config/sh/sh.h
! 209a3bc0c73d88acbc59af0353d39fbf  gcc/config/sh/sh.md
  139aee6f03e0b710a7924323803aae81  gcc/config/sh/sh.opt
  084246870c25f111b506b273305de323  gcc/config/sh/sh1.md
  62872f49ccc9aaaa5931032f18cb33ee  gcc/config/sh/sh4-300.md
  de1ffc7485829b4c1829022e8c18cfa3  gcc/config/sh/sh4.md
  b513326c77a24af4716e52c2187ce2a9  gcc/config/sh/sh4a.md
  23ce1444bb9d11f50a1348cfca3bcb64  gcc/config/sh/sh_optimize_sett_clrt.cc
! e6463102cdb7fa30f8a08d8896586422  gcc/config/sh/sh_treg_combine.cc
  85b3b9260ba16b29271cdc22d46df733  gcc/config/sh/superh.h
  06158b0f1e33501120db330d7734228d  gcc/config/sh/superh.opt
  7ef467da960017f1cab28ea3b64842af  gcc/config/sh/sync.md
--- 4827,4842 ----
  f6221f8d3397d492618e56579e467e42  gcc/config/sh/sh-mem.cc
  d22ca9f61b3c805404561dcfc87d2298  gcc/config/sh/sh-modes.def
  2df8afb4e4a2466319288500b8b1cafa  gcc/config/sh/sh-protos.h
! 687f75dfd1d216956fe6284997d6cab8  gcc/config/sh/sh.cc
  d7a6129121131f3e3e065eca8b30ecaf  gcc/config/sh/sh.h
! 39d122a7a70bd88e5e0438b959f43d36  gcc/config/sh/sh.md
  139aee6f03e0b710a7924323803aae81  gcc/config/sh/sh.opt
  084246870c25f111b506b273305de323  gcc/config/sh/sh1.md
  62872f49ccc9aaaa5931032f18cb33ee  gcc/config/sh/sh4-300.md
  de1ffc7485829b4c1829022e8c18cfa3  gcc/config/sh/sh4.md
  b513326c77a24af4716e52c2187ce2a9  gcc/config/sh/sh4a.md
  23ce1444bb9d11f50a1348cfca3bcb64  gcc/config/sh/sh_optimize_sett_clrt.cc
! d47342003db28a07a85d8899ccd7a7b2  gcc/config/sh/sh_treg_combine.cc
  85b3b9260ba16b29271cdc22d46df733  gcc/config/sh/superh.h
  06158b0f1e33501120db330d7734228d  gcc/config/sh/superh.opt
  7ef467da960017f1cab28ea3b64842af  gcc/config/sh/sync.md
*************** edf42a730fa0e206acb4c36eb4fa36fe  gcc/co
*** 4999,5005 ****
  fc45ffa911b2561f64220620c3d3a7d3  gcc/config/vax/predicates.md
  8bafffc4214815e9fd184580c1e1f0d8  gcc/config/vax/vax-modes.def
  88dfdb263a18d045e0249cea9e3cc56b  gcc/config/vax/vax-protos.h
! a6103824529000c4a1f5896987881fbf  gcc/config/vax/vax.cc
  af2d177a52d10d2e653044329a046dc3  gcc/config/vax/vax.h
  6a22e9e199a573b6ff7872cc7945723c  gcc/config/vax/vax.md
  f094875de5c978bed96156c015cce2b8  gcc/config/vax/vax.opt
--- 5000,5006 ----
  fc45ffa911b2561f64220620c3d3a7d3  gcc/config/vax/predicates.md
  8bafffc4214815e9fd184580c1e1f0d8  gcc/config/vax/vax-modes.def
  88dfdb263a18d045e0249cea9e3cc56b  gcc/config/vax/vax-protos.h
! 32d066b57cbbbb8778c24ca7ec51efe8  gcc/config/vax/vax.cc
  af2d177a52d10d2e653044329a046dc3  gcc/config/vax/vax.h
  6a22e9e199a573b6ff7872cc7945723c  gcc/config/vax/vax.md
  f094875de5c978bed96156c015cce2b8  gcc/config/vax/vax.opt
*************** db7e9d820bb832167ac7f105d093fdda  gcc/co
*** 5070,5077 ****
  414aed735962abfc0a242138b2833d30  gcc/config/xtensa/xtensa.h
  f8577ed90789aeb2b1d1e68701b2a18b  gcc/config/xtensa/xtensa.md
  49b91f52a0ff696a3067d3288badf84f  gcc/config/xtensa/xtensa.opt
! e7902d705aff8b5cd66c0b40f2ca97be  gcc/configure
! 56da926d2f6f92c69c88d1eeeaedf228  gcc/configure.ac
  2c3b5239194c0b4a2e4fb1effa7de1fe  gcc/context.cc
  f0af356bf719524dae46597a2b9376be  gcc/context.h
  9f79427f6fb6308f148ac1b824d74c87  gcc/convert.cc
--- 5071,5078 ----
  414aed735962abfc0a242138b2833d30  gcc/config/xtensa/xtensa.h
  f8577ed90789aeb2b1d1e68701b2a18b  gcc/config/xtensa/xtensa.md
  49b91f52a0ff696a3067d3288badf84f  gcc/config/xtensa/xtensa.opt
! f5dd44687a7725be30a01fa6fb661cb1  gcc/configure
! a9f1550dec52e693637c60ed8f546854  gcc/configure.ac
  2c3b5239194c0b4a2e4fb1effa7de1fe  gcc/context.cc
  f0af356bf719524dae46597a2b9376be  gcc/context.h
  9f79427f6fb6308f148ac1b824d74c87  gcc/convert.cc
*************** b81f031d36161f2b75151b5503458623  gcc/co
*** 5081,5087 ****
  5f947cfa4f11adffe84f558e88a17922  gcc/coroutine-passes.cc
  0fa89640cf054df390ce1a7cc7f2a797  gcc/coverage.cc
  b0252895005c33390b86f406799d9e70  gcc/coverage.h
! d33d778717a49d7d1e19945586457a3e  gcc/cp/ChangeLog
  d271e3663538ba1f3281cab3838e92cd  gcc/cp/ChangeLog-1993
  f5a44adbc05521162350ca409d1d95ce  gcc/cp/ChangeLog-1994
  ac55db48d964cb5469ff03c1cd3ee04d  gcc/cp/ChangeLog-1995
--- 5082,5088 ----
  5f947cfa4f11adffe84f558e88a17922  gcc/coroutine-passes.cc
  0fa89640cf054df390ce1a7cc7f2a797  gcc/coverage.cc
  b0252895005c33390b86f406799d9e70  gcc/coverage.h
! af049c41b25440eb2d60ecf6b8e44908  gcc/cp/ChangeLog
  d271e3663538ba1f3281cab3838e92cd  gcc/cp/ChangeLog-1993
  f5a44adbc05521162350ca409d1d95ce  gcc/cp/ChangeLog-1994
  ac55db48d964cb5469ff03c1cd3ee04d  gcc/cp/ChangeLog-1995
*************** bb663add91c7d9a78c9ac229a8930cef  gcc/cp
*** 5114,5148 ****
  c1c7801b9b0f379e702a4f6cb83972e7  gcc/cp/ChangeLog.ptr
  9aa3cd9f75c785de9f51446e3f295515  gcc/cp/ChangeLog.tree-ssa
  7e7b121cfc8ec5e3f50fc4115df96fec  gcc/cp/Make-lang.in
! e97662475593c0547d1608fb06460f68  gcc/cp/call.cc
  61492df7414a94076d2ea1be4ad1bdd5  gcc/cp/cfns.gperf
  4af50d4f82b93440a2801cf7837dce2e  gcc/cp/cfns.h
  0d6cd9a708e60767c26f8266b56114ff  gcc/cp/class.cc
  19c35c5421d2b8d512ffa110701df758  gcc/cp/config-lang.in
! 377b9a931759b8a51beb3600097fe48b  gcc/cp/constexpr.cc
  77a979d32de8cb8e46d54a3ebe92ea42  gcc/cp/constraint.cc
  27cb7d2ba6312acadcfc0dfc15dbcd2b  gcc/cp/coroutines.cc
! 234f0ca7156fdb33c852a06e00358015  gcc/cp/cp-gimplify.cc
  59c2096cf662e2d5bf81f477c55c9d2d  gcc/cp/cp-lang.cc
  6b0b8ba87ad071a0acceb6567386ef78  gcc/cp/cp-name-hint.h
  aa35fbdbada58c8b3f4d5e0910b3df37  gcc/cp/cp-objcp-common.cc
  af9e79c65b8109b071bfab436f53fd06  gcc/cp/cp-objcp-common.h
  1503b8e00198c339d86d7125d96a92e0  gcc/cp/cp-tree.def
! 89674d68018ee44f23b8a44473d71a5a  gcc/cp/cp-tree.h
  93d92e57a74a5fd9ee45f47650516d4f  gcc/cp/cp-ubsan.cc
  cf937b536f89656bbd216fda359c5f56  gcc/cp/cvt.cc
  2b73a9fc46b5816431c794ab7d308871  gcc/cp/cxx-pretty-print.cc
  fb305bef28206d87862d28cb7233a56b  gcc/cp/cxx-pretty-print.h
! ecfacf6b08d14bcaf3ee4ed89b749e67  gcc/cp/decl.cc
  cffc01a2fb968bde8c15a0cf880e57f3  gcc/cp/decl.h
  a85051d5a44d327240b1f0b44cdee94d  gcc/cp/decl2.cc
  a5dba9831bf8a38a28a4b412c76ceef5  gcc/cp/dump.cc
  b05e7f9587bf188168b525f48c7479f4  gcc/cp/error.cc
! 9d0b278707364af28a921f5daa9827e5  gcc/cp/except.cc
  8cebaad85dc0c01a9c1ceb500919c45c  gcc/cp/expr.cc
  1a3ebbf7c0f22d963d7ba4a245ff205c  gcc/cp/friend.cc
! bc3bb34c8c708bd0a0f8320a9bf32d07  gcc/cp/g++spec.cc
! 00eca5f97d5229db0adb72721432979a  gcc/cp/init.cc
  070afdcd7a31bfd27df0dbdd7a063376  gcc/cp/lambda.cc
  2d025243c67abcccf63845127a051ce4  gcc/cp/lang-specs.h
  7fae35cf7f4dae942a3e4ba08e3fc077  gcc/cp/lex.cc
--- 5115,5149 ----
  c1c7801b9b0f379e702a4f6cb83972e7  gcc/cp/ChangeLog.ptr
  9aa3cd9f75c785de9f51446e3f295515  gcc/cp/ChangeLog.tree-ssa
  7e7b121cfc8ec5e3f50fc4115df96fec  gcc/cp/Make-lang.in
! 7a0f7e8dc851e16ec5fad9c98ee67d2f  gcc/cp/call.cc
  61492df7414a94076d2ea1be4ad1bdd5  gcc/cp/cfns.gperf
  4af50d4f82b93440a2801cf7837dce2e  gcc/cp/cfns.h
  0d6cd9a708e60767c26f8266b56114ff  gcc/cp/class.cc
  19c35c5421d2b8d512ffa110701df758  gcc/cp/config-lang.in
! c4feeea05c30ce9511d7f88e10c5830d  gcc/cp/constexpr.cc
  77a979d32de8cb8e46d54a3ebe92ea42  gcc/cp/constraint.cc
  27cb7d2ba6312acadcfc0dfc15dbcd2b  gcc/cp/coroutines.cc
! 7501a8946b544f82ced7912c0f8f957f  gcc/cp/cp-gimplify.cc
  59c2096cf662e2d5bf81f477c55c9d2d  gcc/cp/cp-lang.cc
  6b0b8ba87ad071a0acceb6567386ef78  gcc/cp/cp-name-hint.h
  aa35fbdbada58c8b3f4d5e0910b3df37  gcc/cp/cp-objcp-common.cc
  af9e79c65b8109b071bfab436f53fd06  gcc/cp/cp-objcp-common.h
  1503b8e00198c339d86d7125d96a92e0  gcc/cp/cp-tree.def
! 0ec61314e3693d259fbe0b0983df68dc  gcc/cp/cp-tree.h
  93d92e57a74a5fd9ee45f47650516d4f  gcc/cp/cp-ubsan.cc
  cf937b536f89656bbd216fda359c5f56  gcc/cp/cvt.cc
  2b73a9fc46b5816431c794ab7d308871  gcc/cp/cxx-pretty-print.cc
  fb305bef28206d87862d28cb7233a56b  gcc/cp/cxx-pretty-print.h
! e960a8e842a0bf98a49e42ea7d47e8f3  gcc/cp/decl.cc
  cffc01a2fb968bde8c15a0cf880e57f3  gcc/cp/decl.h
  a85051d5a44d327240b1f0b44cdee94d  gcc/cp/decl2.cc
  a5dba9831bf8a38a28a4b412c76ceef5  gcc/cp/dump.cc
  b05e7f9587bf188168b525f48c7479f4  gcc/cp/error.cc
! 9882b133987e0ef98e9551a9762234f3  gcc/cp/except.cc
  8cebaad85dc0c01a9c1ceb500919c45c  gcc/cp/expr.cc
  1a3ebbf7c0f22d963d7ba4a245ff205c  gcc/cp/friend.cc
! 0f6900a5092d59c380273a15cc1e6995  gcc/cp/g++spec.cc
! 180f96c767a8be30b0159ffb3308d628  gcc/cp/init.cc
  070afdcd7a31bfd27df0dbdd7a063376  gcc/cp/lambda.cc
  2d025243c67abcccf63845127a051ce4  gcc/cp/lang-specs.h
  7fae35cf7f4dae942a3e4ba08e3fc077  gcc/cp/lex.cc
*************** bc3bb34c8c708bd0a0f8320a9bf32d07  gcc/cp
*** 5151,5179 ****
  5324dfd367e7c8ebba7e3c511388ba71  gcc/cp/mapper-client.cc
  c08ce26e97ca92d6e36c71453aac5baf  gcc/cp/mapper-client.h
  5afaaf13a0191802d9adaa6cd1ff7b4b  gcc/cp/mapper-resolver.cc
! 475b454a38b3292062e999c0725ce2d3  gcc/cp/method.cc
  9b4fa8523bf6057cee15600a65221bb9  gcc/cp/module.cc
! f1648ab601f381500db0cad97ef1be62  gcc/cp/name-lookup.cc
! 9a3b7d6aa1623145cbb45cf2be753fe9  gcc/cp/name-lookup.h
  a8c0211ed0a1501bf948aff39864fd1b  gcc/cp/operators.def
  a175d4e76fa35476b1f2d1cef21b9d1e  gcc/cp/optimize.cc
! a0c47d7f9ff2568760e7859ce6355ebe  gcc/cp/parser.cc
  dee781c4e5da6a9ed8a8ed1119c12dbb  gcc/cp/parser.h
! 65b4f1c79137b4729fe4ad8ad2375900  gcc/cp/pt.cc
  39ea1e495d971ae62d15c580b9b26531  gcc/cp/ptree.cc
  a69253bf5f41f60f5be44abcb3134ee0  gcc/cp/rtti.cc
  763aed8f1a637266774e6466b1b98345  gcc/cp/search.cc
! 99bdd5b4325538685e960964677e975c  gcc/cp/semantics.cc
! 3948cac45784ecc6767b6d549df6eeb4  gcc/cp/tree.cc
  3ffb7b1546d92ce86c89a0d8324fa763  gcc/cp/type-utils.h
! d27294fc553c57a26a1188088d756904  gcc/cp/typeck.cc
  5833643279133cc5dbf13a9631077ce4  gcc/cp/typeck2.cc
  04b0f0bf0cbb8a2ebc3665e2acdd1be9  gcc/cp/vtable-class-hierarchy.cc
  2ed020c144695714d83ff76c8dc8551c  gcc/cppbuiltin.cc
  5e7300b7656f214ebad548e0d02d2d89  gcc/cppbuiltin.h
  22407913ee8063f2b6226b5860f0ea95  gcc/cppdefault.cc
  6ec17d982c4a82bb37cb668fada8a325  gcc/cppdefault.h
! 0c588d460d7ce7b601066501489f0ab3  gcc/cprop.cc
  920a4d7947132423a7d010e42c59d61a  gcc/cse.cc
  3693d7a5568e545df024d55501f2c82b  gcc/cselib.cc
  b6d6c874c2b61fc5ea973ad62359a416  gcc/cselib.h
--- 5152,5180 ----
  5324dfd367e7c8ebba7e3c511388ba71  gcc/cp/mapper-client.cc
  c08ce26e97ca92d6e36c71453aac5baf  gcc/cp/mapper-client.h
  5afaaf13a0191802d9adaa6cd1ff7b4b  gcc/cp/mapper-resolver.cc
! 0daac91a7d76dece74349caf1c32143a  gcc/cp/method.cc
  9b4fa8523bf6057cee15600a65221bb9  gcc/cp/module.cc
! 1e2da2f220c242ff666dacd4d7252e97  gcc/cp/name-lookup.cc
! eb7607457e31c0a54edf0539675b5b2e  gcc/cp/name-lookup.h
  a8c0211ed0a1501bf948aff39864fd1b  gcc/cp/operators.def
  a175d4e76fa35476b1f2d1cef21b9d1e  gcc/cp/optimize.cc
! 01bf4863b0be9b5cc2c0ce928457af40  gcc/cp/parser.cc
  dee781c4e5da6a9ed8a8ed1119c12dbb  gcc/cp/parser.h
! bb948a64bada4c750e3cab95dd84d6aa  gcc/cp/pt.cc
  39ea1e495d971ae62d15c580b9b26531  gcc/cp/ptree.cc
  a69253bf5f41f60f5be44abcb3134ee0  gcc/cp/rtti.cc
  763aed8f1a637266774e6466b1b98345  gcc/cp/search.cc
! dd0c13e5e9eeead8942a845760f28344  gcc/cp/semantics.cc
! 96228ad6b38f3037301535261b3c6026  gcc/cp/tree.cc
  3ffb7b1546d92ce86c89a0d8324fa763  gcc/cp/type-utils.h
! 1b4ba2b4d067c335f7feb6d0787f71f9  gcc/cp/typeck.cc
  5833643279133cc5dbf13a9631077ce4  gcc/cp/typeck2.cc
  04b0f0bf0cbb8a2ebc3665e2acdd1be9  gcc/cp/vtable-class-hierarchy.cc
  2ed020c144695714d83ff76c8dc8551c  gcc/cppbuiltin.cc
  5e7300b7656f214ebad548e0d02d2d89  gcc/cppbuiltin.h
  22407913ee8063f2b6226b5860f0ea95  gcc/cppdefault.cc
  6ec17d982c4a82bb37cb668fada8a325  gcc/cppdefault.h
! 3fd65bb756f17a28aaa8aaf215865361  gcc/cprop.cc
  920a4d7947132423a7d010e42c59d61a  gcc/cse.cc
  3693d7a5568e545df024d55501f2c82b  gcc/cselib.cc
  b6d6c874c2b61fc5ea973ad62359a416  gcc/cselib.h
*************** b6d6c874c2b61fc5ea973ad62359a416  gcc/cs
*** 5181,5187 ****
  d5ed22370e5dd622b0b12c32b21f04cd  gcc/ctfc.cc
  0a1449a42c84460895e02a7a3ee5eb09  gcc/ctfc.h
  c86420385a29dc1b103e1a4cca601af9  gcc/ctfout.cc
! 1b4bc6be7d02acfd98e8f1340c534f5a  gcc/d/ChangeLog
  86f687c485111eedca2eb048294f957e  gcc/d/ChangeLog-2006
  70ed1c47fd9b3f5dd95055642ed79265  gcc/d/ChangeLog-2007
  a7090ab2dd83aa4f44823c17566b83ef  gcc/d/ChangeLog-2008
--- 5182,5188 ----
  d5ed22370e5dd622b0b12c32b21f04cd  gcc/ctfc.cc
  0a1449a42c84460895e02a7a3ee5eb09  gcc/ctfc.h
  c86420385a29dc1b103e1a4cca601af9  gcc/ctfout.cc
! e69672de58a628bae0976a20defee3aa  gcc/d/ChangeLog
  86f687c485111eedca2eb048294f957e  gcc/d/ChangeLog-2006
  70ed1c47fd9b3f5dd95055642ed79265  gcc/d/ChangeLog-2007
  a7090ab2dd83aa4f44823c17566b83ef  gcc/d/ChangeLog-2008
*************** e432bfc5c605ae0b1beedf0492ad40d1  gcc/d/
*** 5202,5211 ****
  426254b45d40584d0597c63f3fd1f889  gcc/d/README.gcc
  8bf5d890e781b56206924e00d9e49939  gcc/d/config-lang.in
  d08c623f247be5cfa5170417f26d5480  gcc/d/d-attribs.cc
! 69376a17d40f468c514561874ccaf99a  gcc/d/d-builtins.cc
! 03ff26d700e4c0c548b26525553b8237  gcc/d/d-codegen.cc
  d392fda0a2aca5434b3f337c80f8f864  gcc/d/d-compiler.cc
! a56e87d314027fcf6714ff9f18aa20bc  gcc/d/d-convert.cc
  8d7ac5eca73cc075b175513a7fc713e3  gcc/d/d-ctfloat.cc
  a45dc5a01e8d32b42d3e48a112e065b4  gcc/d/d-diagnostic.cc
  1e4c2f76e9781d5cadf99f2a0b628299  gcc/d/d-frontend.cc
--- 5203,5212 ----
  426254b45d40584d0597c63f3fd1f889  gcc/d/README.gcc
  8bf5d890e781b56206924e00d9e49939  gcc/d/config-lang.in
  d08c623f247be5cfa5170417f26d5480  gcc/d/d-attribs.cc
! 688fb2314b162760f8950ea9705af7ab  gcc/d/d-builtins.cc
! cb8d3dc5d6edece8d62b15cc87441f55  gcc/d/d-codegen.cc
  d392fda0a2aca5434b3f337c80f8f864  gcc/d/d-compiler.cc
! 7afde298a7a53e5dee640eeaa93a1feb  gcc/d/d-convert.cc
  8d7ac5eca73cc075b175513a7fc713e3  gcc/d/d-ctfloat.cc
  a45dc5a01e8d32b42d3e48a112e065b4  gcc/d/d-diagnostic.cc
  1e4c2f76e9781d5cadf99f2a0b628299  gcc/d/d-frontend.cc
*************** d187ab42ee24bae8e09e49fbd31d3752  gcc/d/
*** 5218,5232 ****
  7fd2410570d6cc275d2f4bd82620eb39  gcc/d/d-spec.cc
  5e7a162f22439e5912f58fe3facdc6ee  gcc/d/d-system.h
  6f744f77de810e88c4285983c844098c  gcc/d/d-target-def.h
! fd5863030187662b0a21a5e1ec8e8916  gcc/d/d-target.cc
  021df40040406e7afee01d7e08802798  gcc/d/d-target.def
  af194d51ac76779c9790fddaa8ca34ec  gcc/d/d-target.h
  e67401e2b9e7e3fd1c7867f4a1dd0db2  gcc/d/d-tree.def
! b6aab59305ff125e6a2e6f31eb721ced  gcc/d/d-tree.h
! 9834c92ae2fb96d9f867a2a7c1b08bfe  gcc/d/decl.cc
! b12d0d5df7729754f61d54abeb56b5fd  gcc/d/dmd/MERGE
  c65e8ed7b55dcb02725394bcde7c2da6  gcc/d/dmd/README.md
! d2d0546119ea4af834d32702c3a3eafc  gcc/d/dmd/VERSION
  fee1124c67987d66a0df1db139185575  gcc/d/dmd/access.d
  a168589ac70f62a374e6ab64288c6d01  gcc/d/dmd/aggregate.d
  37c6b3eaa80ad090aed4f88a25159f4a  gcc/d/dmd/aggregate.h
--- 5219,5233 ----
  7fd2410570d6cc275d2f4bd82620eb39  gcc/d/d-spec.cc
  5e7a162f22439e5912f58fe3facdc6ee  gcc/d/d-system.h
  6f744f77de810e88c4285983c844098c  gcc/d/d-target-def.h
! 450ea2ab19a4944ffda76bc103bde4b2  gcc/d/d-target.cc
  021df40040406e7afee01d7e08802798  gcc/d/d-target.def
  af194d51ac76779c9790fddaa8ca34ec  gcc/d/d-target.h
  e67401e2b9e7e3fd1c7867f4a1dd0db2  gcc/d/d-tree.def
! 695b1e7c5849dfe615e0b4f1706520c0  gcc/d/d-tree.h
! ac8b41005cbf2a7b5de89495104d9561  gcc/d/decl.cc
! 4a330cb9c9f0c38ccced280946873aa1  gcc/d/dmd/MERGE
  c65e8ed7b55dcb02725394bcde7c2da6  gcc/d/dmd/README.md
! d626781f165e41221200fce4c11b7ac8  gcc/d/dmd/VERSION
  fee1124c67987d66a0df1db139185575  gcc/d/dmd/access.d
  a168589ac70f62a374e6ab64288c6d01  gcc/d/dmd/aggregate.d
  37c6b3eaa80ad090aed4f88a25159f4a  gcc/d/dmd/aggregate.h
*************** afa67342ce21d3c5637b5c4c6a1c1ab5  gcc/d/
*** 5245,5251 ****
  e10a6d4cc21552d9c975f8152deae1d2  gcc/d/dmd/blockexit.d
  e4224ccaecb14d942c71d31bef20d78c  gcc/d/dmd/boostlicense.txt
  5857f43e9496e3122eaccea53e3cfbf4  gcc/d/dmd/builtin.d
! e805aaabad2ad8a5f29adf99ecdfc4fe  gcc/d/dmd/canthrow.d
  4ff85f3c50760b861a15844b465f0b64  gcc/d/dmd/chkformat.d
  f636875c767fb15992fd5e9b4112fb5c  gcc/d/dmd/clone.d
  45b88c639fb2c94835612227c0b7e6ee  gcc/d/dmd/common/README.md
--- 5246,5252 ----
  e10a6d4cc21552d9c975f8152deae1d2  gcc/d/dmd/blockexit.d
  e4224ccaecb14d942c71d31bef20d78c  gcc/d/dmd/boostlicense.txt
  5857f43e9496e3122eaccea53e3cfbf4  gcc/d/dmd/builtin.d
! 5c5b757212e7cfe644f756ea1811f2f1  gcc/d/dmd/canthrow.d
  4ff85f3c50760b861a15844b465f0b64  gcc/d/dmd/chkformat.d
  f636875c767fb15992fd5e9b4112fb5c  gcc/d/dmd/clone.d
  45b88c639fb2c94835612227c0b7e6ee  gcc/d/dmd/common/README.md
*************** f1e0c409377a80c2f093702c1a7b4196  gcc/d/
*** 5266,5277 ****
  14575700db973a2c2789dc9e19787fcb  gcc/d/dmd/ctorflow.d
  646d80b679dd70066b703c75926a2abc  gcc/d/dmd/dcast.d
  81f26a303e667916bd1626e604afcfad  gcc/d/dmd/dclass.d
! 7ff8b69d58592fc1ebbac97d3d09ffa3  gcc/d/dmd/declaration.d
  eb3208fff93f08cdeb37ff1e2b1a2812  gcc/d/dmd/declaration.h
  58d03f21c060c81890aaea88286b3aa0  gcc/d/dmd/delegatize.d
  d1554b47cf996a8a108a6b3451e052b2  gcc/d/dmd/denum.d
  5b4303a98042d0bc691c7227703d20d2  gcc/d/dmd/dimport.d
! 4aa21407b1725eccd282d1e08142e7b2  gcc/d/dmd/dinterpret.d
  59c569b838ce8dd176921d0caf7d219a  gcc/d/dmd/dmacro.d
  1892053eaeadfb7ce018a66c9f26dba3  gcc/d/dmd/dmangle.d
  0765c6c523b4dc8f1816676970466626  gcc/d/dmd/dmodule.d
--- 5267,5278 ----
  14575700db973a2c2789dc9e19787fcb  gcc/d/dmd/ctorflow.d
  646d80b679dd70066b703c75926a2abc  gcc/d/dmd/dcast.d
  81f26a303e667916bd1626e604afcfad  gcc/d/dmd/dclass.d
! 3b39ff578b554bf881cb963a29b35e87  gcc/d/dmd/declaration.d
  eb3208fff93f08cdeb37ff1e2b1a2812  gcc/d/dmd/declaration.h
  58d03f21c060c81890aaea88286b3aa0  gcc/d/dmd/delegatize.d
  d1554b47cf996a8a108a6b3451e052b2  gcc/d/dmd/denum.d
  5b4303a98042d0bc691c7227703d20d2  gcc/d/dmd/dimport.d
! 711d7b2cd203e62e7fb22720be832d0a  gcc/d/dmd/dinterpret.d
  59c569b838ce8dd176921d0caf7d219a  gcc/d/dmd/dmacro.d
  1892053eaeadfb7ce018a66c9f26dba3  gcc/d/dmd/dmangle.d
  0765c6c523b4dc8f1816676970466626  gcc/d/dmd/dmodule.d
*************** f2d33c239db71d4caa28de9031d1e93a  gcc/d/
*** 5281,5300 ****
  d9b0b9593df66b6f6004fe171df0a3b1  gcc/d/dmd/dstruct.d
  7f7e0bf02588f8e67112aca7940cbd93  gcc/d/dmd/dsymbol.d
  bdcd9fae9c9729e6d486bdcb77f7c156  gcc/d/dmd/dsymbol.h
! 0a7aa9ac0ed76c3e61ba91c2fb4cfdf8  gcc/d/dmd/dsymbolsem.d
  8a90f34c1247850bc1c9ec4d90e903a7  gcc/d/dmd/dtemplate.d
! 1e8160589bb012608ed581a010809c72  gcc/d/dmd/dtoh.d
  0ee0d7b932860ac1bec982ffa05479a5  gcc/d/dmd/dversion.d
  ecc4eb65f17c436f7acd52c25ffc3dc9  gcc/d/dmd/entity.d
  3b65e001bd0b54436775fc65eb906cf0  gcc/d/dmd/enum.h
  4590fc95a8da11567a3591472896a008  gcc/d/dmd/errors.d
  1447ec42d748faaec4c9dadc3321b31d  gcc/d/dmd/errors.h
! e1a7feabb436c350b7f8306e34c01940  gcc/d/dmd/escape.d
! f62c3acd764eaa2ae5acc91ad782d373  gcc/d/dmd/expression.d
  48cf81586f4dde3773ab84a856f3c6ca  gcc/d/dmd/expression.h
  ce78b01d572b78dd2d6e2732b8f6b270  gcc/d/dmd/expressionsem.d
  9f90ce55efd03f86135c7c3719d61d35  gcc/d/dmd/file_manager.d
! 5cb2f2865af80f962854e4ef9849ce03  gcc/d/dmd/foreachvar.d
  5be195d4bfa343996a770f0b1fa92918  gcc/d/dmd/func.d
  12614d5ffda1fa315ba0e7acc9c39307  gcc/d/dmd/globals.d
  b3e2894e834f08ad6cb7e8fa387c352b  gcc/d/dmd/globals.h
--- 5282,5301 ----
  d9b0b9593df66b6f6004fe171df0a3b1  gcc/d/dmd/dstruct.d
  7f7e0bf02588f8e67112aca7940cbd93  gcc/d/dmd/dsymbol.d
  bdcd9fae9c9729e6d486bdcb77f7c156  gcc/d/dmd/dsymbol.h
! 572861496553c793e53016cefcf6371c  gcc/d/dmd/dsymbolsem.d
  8a90f34c1247850bc1c9ec4d90e903a7  gcc/d/dmd/dtemplate.d
! 32b41d545845dc5518f1ab9da08b322e  gcc/d/dmd/dtoh.d
  0ee0d7b932860ac1bec982ffa05479a5  gcc/d/dmd/dversion.d
  ecc4eb65f17c436f7acd52c25ffc3dc9  gcc/d/dmd/entity.d
  3b65e001bd0b54436775fc65eb906cf0  gcc/d/dmd/enum.h
  4590fc95a8da11567a3591472896a008  gcc/d/dmd/errors.d
  1447ec42d748faaec4c9dadc3321b31d  gcc/d/dmd/errors.h
! 77b03726872d92f3c1a34ca4efda1c25  gcc/d/dmd/escape.d
! b906c0246e58ab332ec592e3dcb9acdd  gcc/d/dmd/expression.d
  48cf81586f4dde3773ab84a856f3c6ca  gcc/d/dmd/expression.h
  ce78b01d572b78dd2d6e2732b8f6b270  gcc/d/dmd/expressionsem.d
  9f90ce55efd03f86135c7c3719d61d35  gcc/d/dmd/file_manager.d
! 4ec90cfee44c20f89df2bb84fdfaa882  gcc/d/dmd/foreachvar.d
  5be195d4bfa343996a770f0b1fa92918  gcc/d/dmd/func.d
  12614d5ffda1fa315ba0e7acc9c39307  gcc/d/dmd/globals.d
  b3e2894e834f08ad6cb7e8fa387c352b  gcc/d/dmd/globals.h
*************** daf8c67ba126913faedb4942624557e1  gcc/d/
*** 5328,5334 ****
  0190cb41cd56a1d6b47b372a3300d4fa  gcc/d/dmd/nogc.d
  157597331e63d28616f902c9dd385d87  gcc/d/dmd/nspace.d
  a49dd74783ddad8520c6b0a54aab22d5  gcc/d/dmd/nspace.h
! ba8d8daad7b9e2ba7619e03cd03c83df  gcc/d/dmd/ob.d
  fc51651bb7603133b16545f0185022fe  gcc/d/dmd/objc.d
  a51ce6c75048c2a0524e08f79897480e  gcc/d/dmd/objc.h
  678b1b973c726e0fc52c81a86e2d5d1e  gcc/d/dmd/opover.d
--- 5329,5335 ----
  0190cb41cd56a1d6b47b372a3300d4fa  gcc/d/dmd/nogc.d
  157597331e63d28616f902c9dd385d87  gcc/d/dmd/nspace.d
  a49dd74783ddad8520c6b0a54aab22d5  gcc/d/dmd/nspace.h
! 37f95cdc7bbd2569001544d408175e26  gcc/d/dmd/ob.d
  fc51651bb7603133b16545f0185022fe  gcc/d/dmd/objc.d
  a51ce6c75048c2a0524e08f79897480e  gcc/d/dmd/objc.h
  678b1b973c726e0fc52c81a86e2d5d1e  gcc/d/dmd/opover.d
*************** bafd6f5434ca029e7f466818e8560bca  gcc/d/
*** 5371,5377 ****
  920d26625a87b03e320e957a2d32fb02  gcc/d/dmd/safe.d
  cca2ef3c5fa1e2a3e2c2c2e7c6c96887  gcc/d/dmd/sapply.d
  34a1d2b91ca0f8b2ff88915c36634f13  gcc/d/dmd/scope.h
! 6892ede044939ea73a39b7fff0157d8e  gcc/d/dmd/semantic2.d
  fe2d441e804cdf9df37423f32ca487cf  gcc/d/dmd/semantic3.d
  502044c590d3a887430453ad77720c17  gcc/d/dmd/sideeffect.d
  b548fae0283104002ad0a61611dcf0c4  gcc/d/dmd/statement.d
--- 5372,5378 ----
  920d26625a87b03e320e957a2d32fb02  gcc/d/dmd/safe.d
  cca2ef3c5fa1e2a3e2c2c2e7c6c96887  gcc/d/dmd/sapply.d
  34a1d2b91ca0f8b2ff88915c36634f13  gcc/d/dmd/scope.h
! df0800a814a14e69e3526f911e084dc5  gcc/d/dmd/semantic2.d
  fe2d441e804cdf9df37423f32ca487cf  gcc/d/dmd/semantic3.d
  502044c590d3a887430453ad77720c17  gcc/d/dmd/sideeffect.d
  b548fae0283104002ad0a61611dcf0c4  gcc/d/dmd/statement.d
*************** d5204f87064447609d6339627fdff5d1  gcc/d/
*** 5396,5415 ****
  484e2455ce6e8669895e099600f824a6  gcc/d/dmd/version.h
  ddc228ae57e81b4b8d64d30be36696ec  gcc/d/dmd/visitor.d
  64beecc207e7f501df4ed2c6baf7a398  gcc/d/dmd/visitor.h
! 2fec22071b3243a505600630fd41ad5f  gcc/d/expr.cc
  12f00f3f5da3f7bca99022b121c5668d  gcc/d/gdc.texi
! 584249eca0a3d7af3bca5c475d380236  gcc/d/imports.cc
! a64c38b4bc97f8d81f862fa9e5685e52  gcc/d/intrinsics.cc
  64c73cd509877a6967d709b72d528b40  gcc/d/intrinsics.def
  5f46cece4cf39b1190b559bd7a38e482  gcc/d/lang-specs.h
  47b0991b66e20e7fb6deb3b0c5d726d7  gcc/d/lang.opt
  2223a0b14c657c8628dde685ca2a7e21  gcc/d/longdouble.h
! a5df962eb5554bbd932b3da0dfb1059c  gcc/d/modules.cc
  ef51af63f3d28d970fa354b57e27e1c9  gcc/d/runtime.cc
  34cc9679fc05c8c104e0d7d566c0006c  gcc/d/runtime.def
  43727159ad9828140f390722e0b084d4  gcc/d/toir.cc
  7b7a6e2d7b41558f8d7be6e0028d1a48  gcc/d/typeinfo.cc
! ab7927f0c95ab476ff180d8f10ae0823  gcc/d/types.cc
  7190a15f37d4f7ff57e61d95811688ee  gcc/data-streamer-in.cc
  ed3faa827a6dda47ad1f234f5e7e0be5  gcc/data-streamer-out.cc
  a2b2afc07edacc88155bd02fbddc74a4  gcc/data-streamer.cc
--- 5397,5416 ----
  484e2455ce6e8669895e099600f824a6  gcc/d/dmd/version.h
  ddc228ae57e81b4b8d64d30be36696ec  gcc/d/dmd/visitor.d
  64beecc207e7f501df4ed2c6baf7a398  gcc/d/dmd/visitor.h
! 2f79baf188b752c8e89f529cb5a25be7  gcc/d/expr.cc
  12f00f3f5da3f7bca99022b121c5668d  gcc/d/gdc.texi
! 0b922a119416d9822c173c0d2497f62a  gcc/d/imports.cc
! 5a94ef82a61da2924e9bccb76de28992  gcc/d/intrinsics.cc
  64c73cd509877a6967d709b72d528b40  gcc/d/intrinsics.def
  5f46cece4cf39b1190b559bd7a38e482  gcc/d/lang-specs.h
  47b0991b66e20e7fb6deb3b0c5d726d7  gcc/d/lang.opt
  2223a0b14c657c8628dde685ca2a7e21  gcc/d/longdouble.h
! a735a5b49db5af4faa623bd327087b60  gcc/d/modules.cc
  ef51af63f3d28d970fa354b57e27e1c9  gcc/d/runtime.cc
  34cc9679fc05c8c104e0d7d566c0006c  gcc/d/runtime.def
  43727159ad9828140f390722e0b084d4  gcc/d/toir.cc
  7b7a6e2d7b41558f8d7be6e0028d1a48  gcc/d/typeinfo.cc
! 950e279f5dde292b4879685dd8c0f804  gcc/d/types.cc
  7190a15f37d4f7ff57e61d95811688ee  gcc/data-streamer-in.cc
  ed3faa827a6dda47ad1f234f5e7e0be5  gcc/data-streamer-out.cc
  a2b2afc07edacc88155bd02fbddc74a4  gcc/data-streamer.cc
*************** a3ceb8a0362a43c2fcd99cb29e1dfc64  gcc/di
*** 5449,5455 ****
  4abcebccda704b5459132b50c1a41479  gcc/digraph.cc
  9c15b06626075c48695b2978a224667a  gcc/digraph.h
  e7b417ac1005fe2d9d34413336db9ac0  gcc/doc/analyzer.texi
! aa1622a854139a4e3a9cff7d135929ba  gcc/doc/avr-mmcu.texi
  07ad7c31bc22a55f1cc8f82cdfbb2cb6  gcc/doc/bugreport.texi
  2e6791fec8df18e66c12b1a2078e8176  gcc/doc/cfg.texi
  a32d4b37e98def59fecbefe9651f80e2  gcc/doc/collect2.texi
--- 5450,5456 ----
  4abcebccda704b5459132b50c1a41479  gcc/digraph.cc
  9c15b06626075c48695b2978a224667a  gcc/digraph.h
  e7b417ac1005fe2d9d34413336db9ac0  gcc/doc/analyzer.texi
! 774e3d962e2e077d470c220972d4e649  gcc/doc/avr-mmcu.texi
  07ad7c31bc22a55f1cc8f82cdfbb2cb6  gcc/doc/bugreport.texi
  2e6791fec8df18e66c12b1a2078e8176  gcc/doc/cfg.texi
  a32d4b37e98def59fecbefe9651f80e2  gcc/doc/collect2.texi
*************** aa3b7596dd5b6f06217a90d7090a99b9  gcc/do
*** 5458,5495 ****
  fbce9ef3057c5f46171c7f3214e3bd9b  gcc/doc/configterms.texi
  eb2a47d945ad5f919fce2e58dff16598  gcc/doc/contrib.texi
  ebe9d4f914f26d51d300bb1949a5014b  gcc/doc/contribute.texi
! 43682477ed8978897d0f9154d30cc629  gcc/doc/cpp.1
! 04556560ddc748fd03471280199d1ae2  gcc/doc/cpp.info
  42df7076a2292d64e19b48fc9937d922  gcc/doc/cpp.texi
  f06003c25ea278478f8d118f1aa63c83  gcc/doc/cppdiropts.texi
  6b35517a77153b269c71dd54e78e7cf2  gcc/doc/cppenv.texi
! 9735497c8956be8c361e7d90a6fe40e6  gcc/doc/cppinternals.info
  fb4b91ad27bb3454d9988d80aa141644  gcc/doc/cppinternals.texi
  e800c0bc2befa6987b1fc171b3fa6bc7  gcc/doc/cppopts.texi
  a6ec6f6984012460fa04c405c52a8edc  gcc/doc/cppwarnopts.texi
! b65e0f7e84d64bb8073b2afa11bef96b  gcc/doc/extend.texi
  f78fa1359032f84915fdfb60653ea30e  gcc/doc/fragments.texi
  e3001342aaa637f17a507b55b36479bd  gcc/doc/frontends.texi
! 7ed99e8b2affb5557eb29824424c5ac0  gcc/doc/fsf-funding.7
! 14f88d6e558919153f7d3702f8571c86  gcc/doc/g++.1
! 14f88d6e558919153f7d3702f8571c86  gcc/doc/gcc.1
! 3a5650b321968f0112696a9072a8396e  gcc/doc/gcc.info
  c6b0b2d1fe3f28a04931a2a794048df7  gcc/doc/gcc.texi
! 1c80ea13677b0fe402b77db0435c0cbf  gcc/doc/gccinstall.info
! 70e6f5e8a41194b617023dc62432358d  gcc/doc/gccint.info
  83afe7721012ae63b2ecff4e1ebbd1a9  gcc/doc/gccint.texi
! f51b31bd27708ef5963d83bf8ff0d3e5  gcc/doc/gcov-dump.1
  16145e16ee9428009371a59cc1659d32  gcc/doc/gcov-dump.texi
! 0a9fb707a9723167e8615dd38f173f3e  gcc/doc/gcov-tool.1
  f234ef2a5d2f8fe46b7356d02c709f19  gcc/doc/gcov-tool.texi
! 6127afd39f4b1aec72ebfe2e316dff4f  gcc/doc/gcov.1
  6bd61a8c28ffcb5521e74ade47e2ef45  gcc/doc/gcov.texi
! 2f43892b39a9311e39e46a722e46d0b3  gcc/doc/generic.texi
! 9e4e36548bef0ca1b4ec51fa6d9640f4  gcc/doc/gfdl.7
! 66658780bbd2a685b2153b263d31b244  gcc/doc/gfortran.1
  ca8fb1fb499d550701f96d68b817cb3d  gcc/doc/gimple.texi
  dc4ccd9843d88bc01c909438dabfd6ab  gcc/doc/gnu.texi
! 2db20b4db26a22ed62bf35e88ab27c08  gcc/doc/gpl.7
  8330c58afc651426d5be3104dc1ae1c1  gcc/doc/gty.texi
  1840b0e622f12b4964da9c34e9416d46  gcc/doc/headerdirs.texi
  db2126fd791cbb35d3fcb1c79364c6d7  gcc/doc/hostconfig.texi
--- 5459,5496 ----
  fbce9ef3057c5f46171c7f3214e3bd9b  gcc/doc/configterms.texi
  eb2a47d945ad5f919fce2e58dff16598  gcc/doc/contrib.texi
  ebe9d4f914f26d51d300bb1949a5014b  gcc/doc/contribute.texi
! 5a4f06c04510cdc9d55cc2ea358bcc92  gcc/doc/cpp.1
! 485193e3958418cda66dc78323d7e6de  gcc/doc/cpp.info
  42df7076a2292d64e19b48fc9937d922  gcc/doc/cpp.texi
  f06003c25ea278478f8d118f1aa63c83  gcc/doc/cppdiropts.texi
  6b35517a77153b269c71dd54e78e7cf2  gcc/doc/cppenv.texi
! 45fbf6c3e44aace9c2cc3ce98a28f777  gcc/doc/cppinternals.info
  fb4b91ad27bb3454d9988d80aa141644  gcc/doc/cppinternals.texi
  e800c0bc2befa6987b1fc171b3fa6bc7  gcc/doc/cppopts.texi
  a6ec6f6984012460fa04c405c52a8edc  gcc/doc/cppwarnopts.texi
! 3d2d35467ad153920b396dc5819a8072  gcc/doc/extend.texi
  f78fa1359032f84915fdfb60653ea30e  gcc/doc/fragments.texi
  e3001342aaa637f17a507b55b36479bd  gcc/doc/frontends.texi
! 1c44baacde492afcf9d4c311a52231c3  gcc/doc/fsf-funding.7
! aed1e3233b11642b0ba23943b6127c44  gcc/doc/g++.1
! aed1e3233b11642b0ba23943b6127c44  gcc/doc/gcc.1
! 9bd2c6ea0bbede3ca08558f6c197b493  gcc/doc/gcc.info
  c6b0b2d1fe3f28a04931a2a794048df7  gcc/doc/gcc.texi
! 55eb152a74d7baed6582f489debfc619  gcc/doc/gccinstall.info
! f6e2c8b7eb32862b4ae6e488f3949b15  gcc/doc/gccint.info
  83afe7721012ae63b2ecff4e1ebbd1a9  gcc/doc/gccint.texi
! 5ed7be33815f87287233781e8cc768e0  gcc/doc/gcov-dump.1
  16145e16ee9428009371a59cc1659d32  gcc/doc/gcov-dump.texi
! 1a2b860074ddc4673cc861d11b1c1ded  gcc/doc/gcov-tool.1
  f234ef2a5d2f8fe46b7356d02c709f19  gcc/doc/gcov-tool.texi
! a738a63b92a1cc2a53284e1ff11acfd6  gcc/doc/gcov.1
  6bd61a8c28ffcb5521e74ade47e2ef45  gcc/doc/gcov.texi
! 322c30453c6bcdafc13e52f81b71ed22  gcc/doc/generic.texi
! 17462a35f794768a5686210117e1d0c1  gcc/doc/gfdl.7
! 5af033489085939a7ef6e3ed039e293a  gcc/doc/gfortran.1
  ca8fb1fb499d550701f96d68b817cb3d  gcc/doc/gimple.texi
  dc4ccd9843d88bc01c909438dabfd6ab  gcc/doc/gnu.texi
! d03cb1fa4c3ca8dac3ec47f917681944  gcc/doc/gpl.7
  8330c58afc651426d5be3104dc1ae1c1  gcc/doc/gty.texi
  1840b0e622f12b4964da9c34e9416d46  gcc/doc/headerdirs.texi
  db2126fd791cbb35d3fcb1c79364c6d7  gcc/doc/hostconfig.texi
*************** a2fcc43c6167952462815a241fa20c2d  gcc/do
*** 5500,5513 ****
  746a9c5cd326194812af286fabb48964  gcc/doc/include/gcc-common.texi
  6d27572837b7c19e0d1c4121d3c0ae94  gcc/doc/include/gpl_v3.texi
  73819b3930a3d4be5d6234070d02386a  gcc/doc/include/texinfo.tex
! 9c4cba6059ce44ad457b95cbe91742ac  gcc/doc/install.texi
  83bdbd3efd0ffdf2178c97f60413b453  gcc/doc/install.texi2html
  8e0aeb138252c5b0cc976f5c554be2d0  gcc/doc/interface.texi
! 7157b180aa0a88c98c6a5a1bf7295c80  gcc/doc/invoke.texi
  93a82af201aef19ff405acd00915277e  gcc/doc/languages.texi
  0f02293e0eb313d57f6242dda564ff0d  gcc/doc/libgcc.texi
  de63c5bbc556a96d33ce1ee36e44532b  gcc/doc/loop.texi
! c35ecf95e8ef0dbea4c40d1e04b55ff8  gcc/doc/lto-dump.1
  701872dd40d1ad8a34b97404ea51aba7  gcc/doc/lto-dump.texi
  408827455143000e36d847cc841a3315  gcc/doc/lto.texi
  56814e4949686c0010ab623d14f28323  gcc/doc/makefile.texi
--- 5501,5514 ----
  746a9c5cd326194812af286fabb48964  gcc/doc/include/gcc-common.texi
  6d27572837b7c19e0d1c4121d3c0ae94  gcc/doc/include/gpl_v3.texi
  73819b3930a3d4be5d6234070d02386a  gcc/doc/include/texinfo.tex
! 607216c84fb912edd028f62a1869d856  gcc/doc/install.texi
  83bdbd3efd0ffdf2178c97f60413b453  gcc/doc/install.texi2html
  8e0aeb138252c5b0cc976f5c554be2d0  gcc/doc/interface.texi
! 15a9c856f5fc65ffd46a3fd545a5eaf2  gcc/doc/invoke.texi
  93a82af201aef19ff405acd00915277e  gcc/doc/languages.texi
  0f02293e0eb313d57f6242dda564ff0d  gcc/doc/libgcc.texi
  de63c5bbc556a96d33ce1ee36e44532b  gcc/doc/loop.texi
! 970f68096b2dec1bb11dd6d9cac9e57d  gcc/doc/lto-dump.1
  701872dd40d1ad8a34b97404ea51aba7  gcc/doc/lto-dump.texi
  408827455143000e36d847cc841a3315  gcc/doc/lto.texi
  56814e4949686c0010ab623d14f28323  gcc/doc/makefile.texi
*************** d0f4114e702026befeabc3127bc54323  gcc/do
*** 5520,5526 ****
  92f6af6911752ddb5a776e6893c9a041  gcc/doc/plugins.texi
  0603ab3940871fa2a55ddbd7c2719eb7  gcc/doc/poly-int.texi
  609761190ed46487404ad82b8a4f4d06  gcc/doc/portability.texi
! 0ead564edff5d6f37e02427bff13626a  gcc/doc/rtl.texi
  7e984008e99ff7653a2765f54d15a23a  gcc/doc/service.texi
  8b5295795a2c7b4849df7e8631f2b909  gcc/doc/sourcebuild.texi
  80d831a61658f6babc86aaf34fc124ed  gcc/doc/standards.texi
--- 5521,5527 ----
  92f6af6911752ddb5a776e6893c9a041  gcc/doc/plugins.texi
  0603ab3940871fa2a55ddbd7c2719eb7  gcc/doc/poly-int.texi
  609761190ed46487404ad82b8a4f4d06  gcc/doc/portability.texi
! ffbfb5dea9c09db5339603672c1e6931  gcc/doc/rtl.texi
  7e984008e99ff7653a2765f54d15a23a  gcc/doc/service.texi
  8b5295795a2c7b4849df7e8631f2b909  gcc/doc/sourcebuild.texi
  80d831a61658f6babc86aaf34fc124ed  gcc/doc/standards.texi
*************** f632a58265e8b78f0813590dda2827e9  gcc/du
*** 5546,5552 ****
  a71b91c784b6166c1b4be181bda6caac  gcc/dwarf2cfi.cc
  71ac2d69ff39fb99294791dec0cc85ae  gcc/dwarf2ctf.cc
  eeae724f08b54913ece6df74e3a19d36  gcc/dwarf2ctf.h
! 12dc66168b5385eb9213cdb9e27a11bc  gcc/dwarf2out.cc
  3e42c05ab78134fd04c1dc8c269ed921  gcc/dwarf2out.h
  37794f2c604b388af0205c21ac9c1490  gcc/early-remat.cc
  4a6f1c497ad523e05aa422bf8fad5d1d  gcc/edit-context.cc
--- 5547,5553 ----
  a71b91c784b6166c1b4be181bda6caac  gcc/dwarf2cfi.cc
  71ac2d69ff39fb99294791dec0cc85ae  gcc/dwarf2ctf.cc
  eeae724f08b54913ece6df74e3a19d36  gcc/dwarf2ctf.h
! b5aac8e1f03292b2e016a749b2d96523  gcc/dwarf2out.cc
  3e42c05ab78134fd04c1dc8c269ed921  gcc/dwarf2out.h
  37794f2c604b388af0205c21ac9c1490  gcc/early-remat.cc
  4a6f1c497ad523e05aa422bf8fad5d1d  gcc/edit-context.cc
*************** ba26be1a33461d149c9e3304d436ea94  gcc/fl
*** 5580,5588 ****
  59b3ec4c17038e4fff61e05b2bfd220f  gcc/flags.h
  acba3643fd3d7dbe62ff3b7f99130cb8  gcc/fold-const-call.cc
  f1700f1cc85dfe93bddd7114e6202635  gcc/fold-const-call.h
! cdb24226cccfe1c065a75225512bfa5e  gcc/fold-const.cc
  63f13230cb3584d77e9b8a26c6ac5fd8  gcc/fold-const.h
! 0185f4d3a34ab8ee3f1c7b30ad97e4db  gcc/fortran/ChangeLog
  3330102ad3a0217cba963be6b5eefd58  gcc/fortran/ChangeLog-2002
  d000ab985b1eeb1ad5749f98b8fef99f  gcc/fortran/ChangeLog-2003
  bf42f94f0c51dcc7d8051cc7fda1efdc  gcc/fortran/ChangeLog-2004
--- 5581,5589 ----
  59b3ec4c17038e4fff61e05b2bfd220f  gcc/flags.h
  acba3643fd3d7dbe62ff3b7f99130cb8  gcc/fold-const-call.cc
  f1700f1cc85dfe93bddd7114e6202635  gcc/fold-const-call.h
! 447d1af3c7f6ed1e4aaac6eb037d5b79  gcc/fold-const.cc
  63f13230cb3584d77e9b8a26c6ac5fd8  gcc/fold-const.h
! 8d62c604091fb49fbb352c9e8d632754  gcc/fortran/ChangeLog
  3330102ad3a0217cba963be6b5eefd58  gcc/fortran/ChangeLog-2002
  d000ab985b1eeb1ad5749f98b8fef99f  gcc/fortran/ChangeLog-2003
  bf42f94f0c51dcc7d8051cc7fda1efdc  gcc/fortran/ChangeLog-2004
*************** d1595b2ed8fb2a33f6ce0dc595f4f33c  gcc/fo
*** 5605,5611 ****
  6c371391409a36c72d51955cc875301c  gcc/fortran/ChangeLog-2021
  9e0636f92243fb9b3480e27cefc96749  gcc/fortran/ChangeLog.ptr
  c93756bb4ee576f99f47f43be795e510  gcc/fortran/Make-lang.in
! 47ca7ced5a8f971cae40bde1b052335a  gcc/fortran/arith.cc
  a6b3571c6f914f0f4fd835ef362e3224  gcc/fortran/arith.h
  2142e815ae204e1e213510d63dc0f773  gcc/fortran/array.cc
  9c32e870aec1383306e74eb7c6c8540b  gcc/fortran/bbt.cc
--- 5606,5612 ----
  6c371391409a36c72d51955cc875301c  gcc/fortran/ChangeLog-2021
  9e0636f92243fb9b3480e27cefc96749  gcc/fortran/ChangeLog.ptr
  c93756bb4ee576f99f47f43be795e510  gcc/fortran/Make-lang.in
! ad0f2d7b4d0f5633527e6fba2f97256c  gcc/fortran/arith.cc
  a6b3571c6f914f0f4fd835ef362e3224  gcc/fortran/arith.h
  2142e815ae204e1e213510d63dc0f773  gcc/fortran/array.cc
  9c32e870aec1383306e74eb7c6c8540b  gcc/fortran/bbt.cc
*************** f2515ce2d4eea4ae49c7f087b70eeb2a  gcc/fo
*** 5619,5639 ****
  e56cff2ad51a1b28676176eb3400bc07  gcc/fortran/cpp.h
  0da9a435768cc177cbc0d04823ce91bc  gcc/fortran/data.cc
  89e31dec4e882508d7059aab12320a40  gcc/fortran/data.h
! 7bb5633cecd0681b4c87e44bd865bb7d  gcc/fortran/decl.cc
  023c4b8af2411ad18f677acf07e91c79  gcc/fortran/dependency.cc
  250e4847bac7531e425b6d1630dbc690  gcc/fortran/dependency.h
  5ac8d3ba62499628c08beaf09d5e95f3  gcc/fortran/dump-parse-tree.cc
  a148fdc43cbb2bba84d76259bebc9f8f  gcc/fortran/error.cc
! 3a99edf3145cb45e082e67648bdeb9e5  gcc/fortran/expr.cc
  3d121034b4eb8c2552c4828a6ffe2a66  gcc/fortran/f95-lang.cc
! 91906f34da01b8f98358ab7964500d4e  gcc/fortran/frontend-passes.cc
  3842572731984dc9a83b47e901428f04  gcc/fortran/gfc-diagnostic.def
  d7b4e8b2f31d751e0a42d341c615dc7f  gcc/fortran/gfc-internals.texi
! e30d5ebe7a924a96667b64684e834883  gcc/fortran/gfortran.h
! 98deac524ca057f39e3bc28cc03b3299  gcc/fortran/gfortran.info
  5c2caffc27a96f9251901dd1c9cfd20a  gcc/fortran/gfortran.texi
  b4bb48ba890803cc506acdcb573cfeae  gcc/fortran/gfortranspec.cc
! ab935d00def52a9ccdac79f9287104ea  gcc/fortran/interface.cc
  a03fe27b3b22ea5f5c81e309e2dfa904  gcc/fortran/intrinsic.cc
  d09791007ba9b64b832806a486152ed3  gcc/fortran/intrinsic.h
  9c3f90c89e00cbc99c598333c76cd336  gcc/fortran/intrinsic.texi
--- 5620,5640 ----
  e56cff2ad51a1b28676176eb3400bc07  gcc/fortran/cpp.h
  0da9a435768cc177cbc0d04823ce91bc  gcc/fortran/data.cc
  89e31dec4e882508d7059aab12320a40  gcc/fortran/data.h
! a18ab7f2b5f5fb7305cf7500ed485cc1  gcc/fortran/decl.cc
  023c4b8af2411ad18f677acf07e91c79  gcc/fortran/dependency.cc
  250e4847bac7531e425b6d1630dbc690  gcc/fortran/dependency.h
  5ac8d3ba62499628c08beaf09d5e95f3  gcc/fortran/dump-parse-tree.cc
  a148fdc43cbb2bba84d76259bebc9f8f  gcc/fortran/error.cc
! 89c688e28c51d87cc42db483fee647cf  gcc/fortran/expr.cc
  3d121034b4eb8c2552c4828a6ffe2a66  gcc/fortran/f95-lang.cc
! ba80f8acb7bf77204b60d0e749d2fba8  gcc/fortran/frontend-passes.cc
  3842572731984dc9a83b47e901428f04  gcc/fortran/gfc-diagnostic.def
  d7b4e8b2f31d751e0a42d341c615dc7f  gcc/fortran/gfc-internals.texi
! dd92182774122379d86159764729446e  gcc/fortran/gfortran.h
! 9a929fd3a7e3799babcd4a6bf4061145  gcc/fortran/gfortran.info
  5c2caffc27a96f9251901dd1c9cfd20a  gcc/fortran/gfortran.texi
  b4bb48ba890803cc506acdcb573cfeae  gcc/fortran/gfortranspec.cc
! f112449f0ba199d8e8a7c7e4ffd725b9  gcc/fortran/interface.cc
  a03fe27b3b22ea5f5c81e309e2dfa904  gcc/fortran/intrinsic.cc
  d09791007ba9b64b832806a486152ed3  gcc/fortran/intrinsic.h
  9c3f90c89e00cbc99c598333c76cd336  gcc/fortran/intrinsic.texi
*************** bd0ab91f17def7a653d5ff09c58bb9f4  gcc/fo
*** 5651,5678 ****
  10fbc914f1a899407778deafa7f5875f  gcc/fortran/matchexp.cc
  fb7c80f6f5f88ba80c7723f53eb05efe  gcc/fortran/mathbuiltins.def
  7d2e2d3ee5b1e4e1964aaf46366e0f08  gcc/fortran/misc.cc
! 6904178505bd48ed077b64999749decd  gcc/fortran/module.cc
  0a8f29852dcfd9ead3e4006f4dac8c0c  gcc/fortran/openmp.cc
  b48cbfda0304562a0eaac72d7b9a6d90  gcc/fortran/options.cc
! 3814aceecf99f8ef258f3468bbe6b583  gcc/fortran/parse.cc
  0a48590b2bb36243e9f4a9d98183afa0  gcc/fortran/parse.h
! f24dc9e528b848c1508b6517fa1e6589  gcc/fortran/primary.cc
! 30443eff12885629467bbfb5febd49c8  gcc/fortran/resolve.cc
  0573ab635ad3ccc4839e1f4636811d27  gcc/fortran/scanner.cc
  caa38bdbcffb68e954b6424c1c3c340c  gcc/fortran/scanner.h
! 476a64d32df2ce6f095562c185ecff39  gcc/fortran/simplify.cc
  4a7855d2420481b81f4ff31d48066f24  gcc/fortran/st.cc
! 481b40c1fdc6d9d300860fea9471b326  gcc/fortran/symbol.cc
  c6d5b41165a24519b1877dafd17780c7  gcc/fortran/target-memory.cc
  d58dc979add87c7e22ecf3fe8ea7d636  gcc/fortran/target-memory.h
! 356584e64d4491c9019c4ec0fe2e9d2c  gcc/fortran/trans-array.cc
  699968d0496851dd2f7c7cc5566f73f2  gcc/fortran/trans-array.h
  451f5b83f594fdd9a854e00dbc66fd9b  gcc/fortran/trans-common.cc
  60dfb80d5ab4bb8f574d40380456a8ef  gcc/fortran/trans-const.cc
  7468f5a70b780bf92036ea75d5312bd4  gcc/fortran/trans-const.h
  ce37a7099768c06117e736b50fbc8005  gcc/fortran/trans-decl.cc
! a5767bc496f00d6b374b073c0702a05e  gcc/fortran/trans-expr.cc
! 58c6ccc853c6b942b312af12af52a8d4  gcc/fortran/trans-intrinsic.cc
  85141448817f23e9ee692c3b7b763c75  gcc/fortran/trans-io.cc
  59236c5b820b6ffc26470283bc0e6db6  gcc/fortran/trans-openmp.cc
  ee76646a8bbb271f793e1e8867f57d71  gcc/fortran/trans-stmt.cc
--- 5652,5679 ----
  10fbc914f1a899407778deafa7f5875f  gcc/fortran/matchexp.cc
  fb7c80f6f5f88ba80c7723f53eb05efe  gcc/fortran/mathbuiltins.def
  7d2e2d3ee5b1e4e1964aaf46366e0f08  gcc/fortran/misc.cc
! 81d9e373475d0d2a0e0bee717efdf1a1  gcc/fortran/module.cc
  0a8f29852dcfd9ead3e4006f4dac8c0c  gcc/fortran/openmp.cc
  b48cbfda0304562a0eaac72d7b9a6d90  gcc/fortran/options.cc
! 73e90223d49b4963392fec92a45d6f62  gcc/fortran/parse.cc
  0a48590b2bb36243e9f4a9d98183afa0  gcc/fortran/parse.h
! 7935e989682da90c4fee6b579e54f874  gcc/fortran/primary.cc
! f58b4486ad33e421af5b4e0b5b23d04b  gcc/fortran/resolve.cc
  0573ab635ad3ccc4839e1f4636811d27  gcc/fortran/scanner.cc
  caa38bdbcffb68e954b6424c1c3c340c  gcc/fortran/scanner.h
! fe71c67ee010a6eb5ea9a08226be4f30  gcc/fortran/simplify.cc
  4a7855d2420481b81f4ff31d48066f24  gcc/fortran/st.cc
! 78f4d0d8c194b7b730dee61dc940ff25  gcc/fortran/symbol.cc
  c6d5b41165a24519b1877dafd17780c7  gcc/fortran/target-memory.cc
  d58dc979add87c7e22ecf3fe8ea7d636  gcc/fortran/target-memory.h
! 1304a933c0072eda346bf1ebef5dc9b6  gcc/fortran/trans-array.cc
  699968d0496851dd2f7c7cc5566f73f2  gcc/fortran/trans-array.h
  451f5b83f594fdd9a854e00dbc66fd9b  gcc/fortran/trans-common.cc
  60dfb80d5ab4bb8f574d40380456a8ef  gcc/fortran/trans-const.cc
  7468f5a70b780bf92036ea75d5312bd4  gcc/fortran/trans-const.h
  ce37a7099768c06117e736b50fbc8005  gcc/fortran/trans-decl.cc
! 62d392ee7355339ae3ad756dbcea4882  gcc/fortran/trans-expr.cc
! 408605a1145b1a8bb8b94b3ba47e9a54  gcc/fortran/trans-intrinsic.cc
  85141448817f23e9ee692c3b7b763c75  gcc/fortran/trans-io.cc
  59236c5b820b6ffc26470283bc0e6db6  gcc/fortran/trans-openmp.cc
  ee76646a8bbb271f793e1e8867f57d71  gcc/fortran/trans-stmt.cc
*************** e407ce5e464ee5640a9730448c53532b  gcc/fo
*** 5689,5695 ****
  4e2f34bb1401e871b7cca9babb99ec3e  gcc/function-tests.cc
  2a4309239adfb0f59d7062cddae8a372  gcc/function.cc
  691a265913d36a47e60accc3677bb50c  gcc/function.h
! 4cc6ef071dbb01f6c1e057a1f76f44f0  gcc/fwprop.cc
  254a48c75187b7e47b94abf826e16c94  gcc/gcc-ar.cc
  c21ee37cecaf1b25e3bd8de9fb19e968  gcc/gcc-main.cc
  43e771c4505a7e453452149b727fb8e8  gcc/gcc-plugin.h
--- 5690,5696 ----
  4e2f34bb1401e871b7cca9babb99ec3e  gcc/function-tests.cc
  2a4309239adfb0f59d7062cddae8a372  gcc/function.cc
  691a265913d36a47e60accc3677bb50c  gcc/function.h
! 191568f8ff996f25b093ee138a7a5590  gcc/fwprop.cc
  254a48c75187b7e47b94abf826e16c94  gcc/gcc-ar.cc
  c21ee37cecaf1b25e3bd8de9fb19e968  gcc/gcc-main.cc
  43e771c4505a7e453452149b727fb8e8  gcc/gcc-plugin.h
*************** a9a669f4d283200c8f2bc4d9f5d3e071  gcc/ge
*** 5725,5743 ****
  92d112d338c65b76ab1fee6469ef43d0  gcc/genconstants.cc
  908326f62403d92576d19a6d60a5c16c  gcc/genemit.cc
  805dc8119200b4c7094d9cf17cce3b93  gcc/genenums.cc
! 5e524560c542ee66355126a3b50ce674  gcc/generic-match-head.cc
  b061e1a9c4a98dd20f874b7c8b25e7d6  gcc/generic-match.h
  f750f2d25d09cf621bc33d71e2d4257a  gcc/genextract.cc
  1afb6dee14dd76199f347ef290ebb806  gcc/genflags.cc
  e57a4ee7a3efa6f9879d9401732ce8e9  gcc/gengenrtl.cc
! 3a80f2fffb9914a02b5cf504740ae28a  gcc/gengtype-lex.cc
  dccb6b651cc3b08a9d91dc473d2c5c56  gcc/gengtype-lex.l
  eb4d9740e017bdc5f85328a53d2d1727  gcc/gengtype-parse.cc
  50a65f1126e7a18b74cea77bdd779e98  gcc/gengtype-state.cc
  f478a818c2202fa1a9c5eeeb9e716b7b  gcc/gengtype.cc
  0ba34863951c3fb241ac4a955bddc0a5  gcc/gengtype.h
  f24c75731c311961c21c8e8305435b00  gcc/genhooks.cc
! c19fcebae36d8ebfbff472b352747435  gcc/genmatch.cc
  2cf04cf8cf3ed9bfee20f1dec10e924f  gcc/genmddeps.cc
  7a9894fd2f41e06b7a03e40b67376964  gcc/genmddump.cc
  c4a535228e71fdb6c6526d7cdc6e93be  gcc/genmodes.cc
--- 5726,5744 ----
  92d112d338c65b76ab1fee6469ef43d0  gcc/genconstants.cc
  908326f62403d92576d19a6d60a5c16c  gcc/genemit.cc
  805dc8119200b4c7094d9cf17cce3b93  gcc/genenums.cc
! df3c2a4905a6e7da9d5630f27c31ba54  gcc/generic-match-head.cc
  b061e1a9c4a98dd20f874b7c8b25e7d6  gcc/generic-match.h
  f750f2d25d09cf621bc33d71e2d4257a  gcc/genextract.cc
  1afb6dee14dd76199f347ef290ebb806  gcc/genflags.cc
  e57a4ee7a3efa6f9879d9401732ce8e9  gcc/gengenrtl.cc
! ee15c27c589e29ab4bc2c1e441a22453  gcc/gengtype-lex.cc
  dccb6b651cc3b08a9d91dc473d2c5c56  gcc/gengtype-lex.l
  eb4d9740e017bdc5f85328a53d2d1727  gcc/gengtype-parse.cc
  50a65f1126e7a18b74cea77bdd779e98  gcc/gengtype-state.cc
  f478a818c2202fa1a9c5eeeb9e716b7b  gcc/gengtype.cc
  0ba34863951c3fb241ac4a955bddc0a5  gcc/gengtype.h
  f24c75731c311961c21c8e8305435b00  gcc/genhooks.cc
! ed95812909e6f029f32c749809855674  gcc/genmatch.cc
  2cf04cf8cf3ed9bfee20f1dec10e924f  gcc/genmddeps.cc
  7a9894fd2f41e06b7a03e40b67376964  gcc/genmddump.cc
  c4a535228e71fdb6c6526d7cdc6e93be  gcc/genmodes.cc
*************** b2a4b31d65ce0513e1b55b3cc0fb9562  gcc/ge
*** 5751,5757 ****
  e85779601c137dcdd709c761e1f9f81c  gcc/gensupport.h
  746501b7bdfad06b392960c121e24b85  gcc/gentarget-def.cc
  8225a557753a2ad91f93ca46a0650179  gcc/genversion.cc
! 9fe719a18729c28d50a65a218b84be60  gcc/ggc-common.cc
  2554173627e7abbcf9b350008d28ed3d  gcc/ggc-internal.h
  92993def7552bd1f56210bccd8199b5e  gcc/ggc-none.cc
  ae5ff28b8e5857f2e89a7a499c0cb706  gcc/ggc-page.cc
--- 5752,5758 ----
  e85779601c137dcdd709c761e1f9f81c  gcc/gensupport.h
  746501b7bdfad06b392960c121e24b85  gcc/gentarget-def.cc
  8225a557753a2ad91f93ca46a0650179  gcc/genversion.cc
! 6287d2885fac3431e9876823da470631  gcc/ggc-common.cc
  2554173627e7abbcf9b350008d28ed3d  gcc/ggc-internal.h
  92993def7552bd1f56210bccd8199b5e  gcc/ggc-none.cc
  ae5ff28b8e5857f2e89a7a499c0cb706  gcc/ggc-page.cc
*************** c09c9c82904f715ce24dbb5f5e7ae143  gcc/gi
*** 5763,5769 ****
  71288f9828f96bb6d528314ca5d455fd  gcc/gimple-builder.h
  f50e26d784233d2ffe55ee17bc3ac46a  gcc/gimple-expr.cc
  d1de4fb8ce13938f7c3dd22dd3afe622  gcc/gimple-expr.h
! 59c242c3a7847e41cb5aca4bb0cacfe2  gcc/gimple-fold.cc
  759408e1e968762ac2845df7ae6efa73  gcc/gimple-fold.h
  8350312718333859d5f584a2792e3c00  gcc/gimple-harden-conditionals.cc
  5397f4236c244ea6e396da577b07cb75  gcc/gimple-if-to-switch.cc
--- 5764,5770 ----
  71288f9828f96bb6d528314ca5d455fd  gcc/gimple-builder.h
  f50e26d784233d2ffe55ee17bc3ac46a  gcc/gimple-expr.cc
  d1de4fb8ce13938f7c3dd22dd3afe622  gcc/gimple-expr.h
! 24e48b82778727622ebae55cb3ebae09  gcc/gimple-fold.cc
  759408e1e968762ac2845df7ae6efa73  gcc/gimple-fold.h
  8350312718333859d5f584a2792e3c00  gcc/gimple-harden-conditionals.cc
  5397f4236c244ea6e396da577b07cb75  gcc/gimple-if-to-switch.cc
*************** ea6739e1baae6fef631091cd341aeb7a  gcc/gi
*** 5776,5795 ****
  f5fb978108285be3c589c1080dbbad96  gcc/gimple-loop-versioning.cc
  14024b204b227ade2750e2161a5c3082  gcc/gimple-low.cc
  e5fb54e1c9ffbbb7c5e6cff5991f2104  gcc/gimple-low.h
! 1607a52f6c468949efc067de9ae1f173  gcc/gimple-match-head.cc
  72fb6758017af5de87e230d25359555b  gcc/gimple-match.h
  8d43733f6347e3670a9aef1e2d7419ee  gcc/gimple-predicate-analysis.cc
  7eb33d03e7b1e6b6327f7cb427da050e  gcc/gimple-predicate-analysis.h
  4cb1a344328d9b4fc0c4735add3da4a4  gcc/gimple-predict.h
  3c38ca4d1ec0bfb067a868c99d216cd0  gcc/gimple-pretty-print.cc
  3efe916bb7c15be5080b13dbaee9c3b0  gcc/gimple-pretty-print.h
! 60e7e4a38c58fb84ea4cf7e8322c294f  gcc/gimple-range-cache.cc
  34423785bbebf48c5894527a2d85dfa3  gcc/gimple-range-cache.h
  de819abc38e5513404e31ba8147f6719  gcc/gimple-range-edge.cc
  ff7214e2064e1c914da68bbc5c59ac6d  gcc/gimple-range-edge.h
  4b6d81555c2fd93dce4352b2756cacec  gcc/gimple-range-fold.cc
  a25f3a6963c602d111eb631ee4444cf9  gcc/gimple-range-fold.h
! 907091739ab8a7df723e8daa1e7a22b3  gcc/gimple-range-gori.cc
  5fe5f05a236de0492006918bee486f98  gcc/gimple-range-gori.h
  c07084f0a48eb3917f54d93973b563a6  gcc/gimple-range-path.cc
  5f9c5bca0ea21cd23f44f6fbea308f4d  gcc/gimple-range-path.h
--- 5777,5796 ----
  f5fb978108285be3c589c1080dbbad96  gcc/gimple-loop-versioning.cc
  14024b204b227ade2750e2161a5c3082  gcc/gimple-low.cc
  e5fb54e1c9ffbbb7c5e6cff5991f2104  gcc/gimple-low.h
! 66e4c9653e0abbc7db3b65422a8738b4  gcc/gimple-match-head.cc
  72fb6758017af5de87e230d25359555b  gcc/gimple-match.h
  8d43733f6347e3670a9aef1e2d7419ee  gcc/gimple-predicate-analysis.cc
  7eb33d03e7b1e6b6327f7cb427da050e  gcc/gimple-predicate-analysis.h
  4cb1a344328d9b4fc0c4735add3da4a4  gcc/gimple-predict.h
  3c38ca4d1ec0bfb067a868c99d216cd0  gcc/gimple-pretty-print.cc
  3efe916bb7c15be5080b13dbaee9c3b0  gcc/gimple-pretty-print.h
! 9c9dc21d5e0a5467580381c4f3e88246  gcc/gimple-range-cache.cc
  34423785bbebf48c5894527a2d85dfa3  gcc/gimple-range-cache.h
  de819abc38e5513404e31ba8147f6719  gcc/gimple-range-edge.cc
  ff7214e2064e1c914da68bbc5c59ac6d  gcc/gimple-range-edge.h
  4b6d81555c2fd93dce4352b2756cacec  gcc/gimple-range-fold.cc
  a25f3a6963c602d111eb631ee4444cf9  gcc/gimple-range-fold.h
! 8b6022b06c538f079a01524fc7ba745a  gcc/gimple-range-gori.cc
  5fe5f05a236de0492006918bee486f98  gcc/gimple-range-gori.h
  c07084f0a48eb3917f54d93973b563a6  gcc/gimple-range-path.cc
  5f9c5bca0ea21cd23f44f6fbea308f4d  gcc/gimple-range-path.h
*************** f0756e5b5cf48a95b7e157d22e9faeda  gcc/gi
*** 5798,5814 ****
  ae1d2577cae83e6acea7dc5239c033f3  gcc/gimple-range-trace.h
  59b9f2f75e5de30ecfda93bde785915a  gcc/gimple-range.cc
  79c8ed03d56c9a2f09f77ece8c2838bc  gcc/gimple-range.h
! f4eef9979afe1a62a26aab899f31fd5e  gcc/gimple-ssa-backprop.cc
  3a9acfb81d934871fc78a536f2df929c  gcc/gimple-ssa-evrp-analyze.cc
  a2e47746135af17dac3a1f31d5ec570b  gcc/gimple-ssa-evrp-analyze.h
  7b4c1e8f532bae009a7eee5a9914f4e0  gcc/gimple-ssa-evrp.cc
  1b1d4df650a10ddd70ed93d3ff96663c  gcc/gimple-ssa-isolate-paths.cc
  6881154cb788d83ed5d3a6faa40e8491  gcc/gimple-ssa-nonnull-compare.cc
  8e1e93b40c3c71852038f4e15cc0ea0e  gcc/gimple-ssa-split-paths.cc
! 5d75a7da22682142863c4cbee7017838  gcc/gimple-ssa-sprintf.cc
! 676176f6f9694eca12e6351f1988c5db  gcc/gimple-ssa-store-merging.cc
  ca63b943de7942e5678ba99a1ddd3285  gcc/gimple-ssa-strength-reduction.cc
! 3b78e30f73dfc0ca11b0bbdf4ccf987e  gcc/gimple-ssa-warn-access.cc
  7064ea947fe572efdcb48307a73cc457  gcc/gimple-ssa-warn-access.h
  760b69c7948cbd7e7ee6a848c204e287  gcc/gimple-ssa-warn-alloca.cc
  1bc2d755960e18e2591f149a5eb08cfc  gcc/gimple-ssa-warn-restrict.cc
--- 5799,5815 ----
  ae1d2577cae83e6acea7dc5239c033f3  gcc/gimple-range-trace.h
  59b9f2f75e5de30ecfda93bde785915a  gcc/gimple-range.cc
  79c8ed03d56c9a2f09f77ece8c2838bc  gcc/gimple-range.h
! 224993fb57f0387f4a6a3eb261687a41  gcc/gimple-ssa-backprop.cc
  3a9acfb81d934871fc78a536f2df929c  gcc/gimple-ssa-evrp-analyze.cc
  a2e47746135af17dac3a1f31d5ec570b  gcc/gimple-ssa-evrp-analyze.h
  7b4c1e8f532bae009a7eee5a9914f4e0  gcc/gimple-ssa-evrp.cc
  1b1d4df650a10ddd70ed93d3ff96663c  gcc/gimple-ssa-isolate-paths.cc
  6881154cb788d83ed5d3a6faa40e8491  gcc/gimple-ssa-nonnull-compare.cc
  8e1e93b40c3c71852038f4e15cc0ea0e  gcc/gimple-ssa-split-paths.cc
! 4f7e23705d457e93b29edca5a1da0961  gcc/gimple-ssa-sprintf.cc
! 62346616dd003a655894e57f5b102985  gcc/gimple-ssa-store-merging.cc
  ca63b943de7942e5678ba99a1ddd3285  gcc/gimple-ssa-strength-reduction.cc
! 4c37768065cd62ce8453e3c4678efa08  gcc/gimple-ssa-warn-access.cc
  7064ea947fe572efdcb48307a73cc457  gcc/gimple-ssa-warn-access.h
  760b69c7948cbd7e7ee6a848c204e287  gcc/gimple-ssa-warn-alloca.cc
  1bc2d755960e18e2591f149a5eb08cfc  gcc/gimple-ssa-warn-restrict.cc
*************** cedfeeeb6a89b08187da0a55778ff05c  gcc/gi
*** 5825,5831 ****
  b1f2597055332f7a009df2374360eee2  gcc/gimple.h
  1a79444af2bcf0c019b20c37cb346635  gcc/gimplify-me.cc
  489260dcd67a90caca7adf7b361f9078  gcc/gimplify-me.h
! 72f1b9b98a93f98c03df6f0f3b1c2299  gcc/gimplify.cc
  acbd4cf19da012507fa6f90cc988cc15  gcc/gimplify.h
  4b707ba8acc84c0c2c69cd7d11b0b878  gcc/ginclude/float.h
  5e92ed0886d68a4cce339044cf03cd57  gcc/ginclude/iso646.h
--- 5826,5832 ----
  b1f2597055332f7a009df2374360eee2  gcc/gimple.h
  1a79444af2bcf0c019b20c37cb346635  gcc/gimplify-me.cc
  489260dcd67a90caca7adf7b361f9078  gcc/gimplify-me.h
! 98f389d1036f8f326636c7afcfe3b5b4  gcc/gimplify.cc
  acbd4cf19da012507fa6f90cc988cc15  gcc/gimplify.h
  4b707ba8acc84c0c2c69cd7d11b0b878  gcc/ginclude/float.h
  5e92ed0886d68a4cce339044cf03cd57  gcc/ginclude/iso646.h
*************** d6e38b1f29ed7cbf094498b65058bc0c  gcc/gi
*** 5842,5858 ****
  35c8e63b0bb041362d4e62e0722a0f12  gcc/ginclude/unwind-arm-common.h
  8d9ecf0d6ef93c79623ce1d27a32a2cb  gcc/ginclude/varargs.h
  90ab079b9764cd0047ebb8e51e5950d5  gcc/glimits.h
! be385b49e3421fb12a485309787257c4  gcc/go/ChangeLog
  1e8d98252d6f5b7d8428ae93446ae0c1  gcc/go/Make-lang.in
  60ea054548c83c7f66170073f9f3e74c  gcc/go/README.gcc
  d9ae6df7a9c50076ec6b5e564516ca11  gcc/go/config-lang.in
  6de103fbcaf3ede09e154b4507410fad  gcc/go/gccgo.texi
! abb8870216b1dcb46678a28424efe8e5  gcc/go/go-backend.cc
  d5f87e40815add17cf3d7b44e1f1e16c  gcc/go/go-c.h
  c8ae93841aa60c948162af93a875a63b  gcc/go/go-gcc-diagnostics.cc
  03db2c35a39e03c8ab1f72e866ecd76c  gcc/go/go-gcc.cc
  3331ac40c70c2495e29194d7a6ce2149  gcc/go/go-gcc.h
! c218daa2fbe96a9f0c4b05d8fbb89a77  gcc/go/go-lang.cc
  c5d6aaa7e913ef205113a2bba2e5206f  gcc/go/go-linemap.cc
  91c7a6773e207cc086ae0888826cc3c4  gcc/go/go-location.h
  e7ac1a933b9be9177f17122bbdaf7f15  gcc/go/go-sha1.cc
--- 5843,5859 ----
  35c8e63b0bb041362d4e62e0722a0f12  gcc/ginclude/unwind-arm-common.h
  8d9ecf0d6ef93c79623ce1d27a32a2cb  gcc/ginclude/varargs.h
  90ab079b9764cd0047ebb8e51e5950d5  gcc/glimits.h
! d3bc06b5f718cf0981b6490487d5b14d  gcc/go/ChangeLog
  1e8d98252d6f5b7d8428ae93446ae0c1  gcc/go/Make-lang.in
  60ea054548c83c7f66170073f9f3e74c  gcc/go/README.gcc
  d9ae6df7a9c50076ec6b5e564516ca11  gcc/go/config-lang.in
  6de103fbcaf3ede09e154b4507410fad  gcc/go/gccgo.texi
! cb9d9f43ce55d21e9dc7362fc69e0ed3  gcc/go/go-backend.cc
  d5f87e40815add17cf3d7b44e1f1e16c  gcc/go/go-c.h
  c8ae93841aa60c948162af93a875a63b  gcc/go/go-gcc-diagnostics.cc
  03db2c35a39e03c8ab1f72e866ecd76c  gcc/go/go-gcc.cc
  3331ac40c70c2495e29194d7a6ce2149  gcc/go/go-gcc.h
! 9751850b73cf46daf9b3a75e84f7cbfd  gcc/go/go-lang.cc
  c5d6aaa7e913ef205113a2bba2e5206f  gcc/go/go-linemap.cc
  91c7a6773e207cc086ae0888826cc3c4  gcc/go/go-location.h
  e7ac1a933b9be9177f17122bbdaf7f15  gcc/go/go-sha1.cc
*************** f4698d5111935f1c789b7efd8ed91a74  gcc/go
*** 5869,5875 ****
  ee8753eb1d8ca2fa168f6a71d3991455  gcc/go/gofrontend/escape.h
  dccb73c4ca0b41d94f8c32f09722e264  gcc/go/gofrontend/export.cc
  c10142760925e22c72c7072c9c214bf8  gcc/go/gofrontend/export.h
! d21670515fe23df2b0c0f939571e07a3  gcc/go/gofrontend/expressions.cc
  c5b86a2accffe77a96df85021bd57878  gcc/go/gofrontend/expressions.h
  bf7f8a519eadaa90804fe15cfa37ba6f  gcc/go/gofrontend/go-diagnostics.cc
  accfd5ea41ee789e6adbaec31a228cfe  gcc/go/gofrontend/go-diagnostics.h
--- 5870,5876 ----
  ee8753eb1d8ca2fa168f6a71d3991455  gcc/go/gofrontend/escape.h
  dccb73c4ca0b41d94f8c32f09722e264  gcc/go/gofrontend/export.cc
  c10142760925e22c72c7072c9c214bf8  gcc/go/gofrontend/export.h
! ea7c5482d2703c7ac9ed297bca5a31c4  gcc/go/gofrontend/expressions.cc
  c5b86a2accffe77a96df85021bd57878  gcc/go/gofrontend/expressions.h
  bf7f8a519eadaa90804fe15cfa37ba6f  gcc/go/gofrontend/go-diagnostics.cc
  accfd5ea41ee789e6adbaec31a228cfe  gcc/go/gofrontend/go-diagnostics.h
*************** c08c0bc386a3e50faacf99daf94c080f  gcc/go
*** 5882,5888 ****
  ead5ac25b7b99d361225e0fd940e286a  gcc/go/gofrontend/go-optimize.h
  5b59619fab7e543c5bb28dd8a6d62793  gcc/go/gofrontend/go-sha1.h
  8d64d49cf01e7d7605f32b644d82c7e1  gcc/go/gofrontend/go.cc
! d0c206bbee40862a4251351a8a3194ea  gcc/go/gofrontend/gogo.cc
  7225312726c1a007ca4244c66fe8157d  gcc/go/gofrontend/gogo.h
  f9015ccccf7764d4c6eeae1bd5e01c7f  gcc/go/gofrontend/import-archive.cc
  69248b78bc1185657dbc63be6016ac45  gcc/go/gofrontend/import.cc
--- 5883,5889 ----
  ead5ac25b7b99d361225e0fd940e286a  gcc/go/gofrontend/go-optimize.h
  5b59619fab7e543c5bb28dd8a6d62793  gcc/go/gofrontend/go-sha1.h
  8d64d49cf01e7d7605f32b644d82c7e1  gcc/go/gofrontend/go.cc
! 603fec8e98ed276a532a40cf1fbde5c7  gcc/go/gofrontend/gogo.cc
  7225312726c1a007ca4244c66fe8157d  gcc/go/gofrontend/gogo.h
  f9015ccccf7764d4c6eeae1bd5e01c7f  gcc/go/gofrontend/import-archive.cc
  69248b78bc1185657dbc63be6016ac45  gcc/go/gofrontend/import.cc
*************** acf3629698886d7731465289650fbbae  gcc/in
*** 5958,5977 ****
  4c297622fd65667c55ca02af467839b5  gcc/insn-addr.h
  5709259b06b655ea8191ac2302e2d9b7  gcc/insn-notes.def
  2e02df0276f8a31361cab997f6a982d5  gcc/int-vector-builder.h
! d8b816ce0804ccf49972f9737caa47c8  gcc/internal-fn.cc
  d7430b67aefa3403a2207e43265581a4  gcc/internal-fn.def
  1c74a8a85d4a17c3325c17130dd7db5b  gcc/internal-fn.h
  b443a7d193ebaabda76bd4c23fe54323  gcc/intl.cc
  fdcce39ba434215ff2ed425e037af50e  gcc/intl.h
  af937d6371bfc6dae1126fa3b845a40d  gcc/ipa-comdats.cc
! b48887a0fbd129d74e78a91b4117d61e  gcc/ipa-cp.cc
  c902d1e07ec7e9d3fc10e9ad37aa9a67  gcc/ipa-devirt.cc
  b8faf7652ab73348eb8dfd2b188a5d56  gcc/ipa-fnsummary.cc
  634795391b1718599123e8f6f5dd1068  gcc/ipa-fnsummary.h
  b34559e01a3cf2fa5b4a65c745283e25  gcc/ipa-free-lang-data.cc
! 8549067301085950d4377b2f3edf87a0  gcc/ipa-icf-gimple.cc
  ac03bc194f37ee5eb93086c446e09d46  gcc/ipa-icf-gimple.h
! ee2caeb2b5a661cb2b3320d1ed0f0ffc  gcc/ipa-icf.cc
  160f6907201241c29aa0aba8c773fb7d  gcc/ipa-icf.h
  565b1ea811f3e7314cb48b887d1bd0a3  gcc/ipa-inline-analysis.cc
  3691be748be0839f168ca434883e3578  gcc/ipa-inline-transform.cc
--- 5959,5978 ----
  4c297622fd65667c55ca02af467839b5  gcc/insn-addr.h
  5709259b06b655ea8191ac2302e2d9b7  gcc/insn-notes.def
  2e02df0276f8a31361cab997f6a982d5  gcc/int-vector-builder.h
! be2bc42ea7c35f22638ea77f739cf2c2  gcc/internal-fn.cc
  d7430b67aefa3403a2207e43265581a4  gcc/internal-fn.def
  1c74a8a85d4a17c3325c17130dd7db5b  gcc/internal-fn.h
  b443a7d193ebaabda76bd4c23fe54323  gcc/intl.cc
  fdcce39ba434215ff2ed425e037af50e  gcc/intl.h
  af937d6371bfc6dae1126fa3b845a40d  gcc/ipa-comdats.cc
! 1fe4e2c00fb6b7385df67480e33d0fc6  gcc/ipa-cp.cc
  c902d1e07ec7e9d3fc10e9ad37aa9a67  gcc/ipa-devirt.cc
  b8faf7652ab73348eb8dfd2b188a5d56  gcc/ipa-fnsummary.cc
  634795391b1718599123e8f6f5dd1068  gcc/ipa-fnsummary.h
  b34559e01a3cf2fa5b4a65c745283e25  gcc/ipa-free-lang-data.cc
! 1461ba766c8866ca428487c7aa48d5cd  gcc/ipa-icf-gimple.cc
  ac03bc194f37ee5eb93086c446e09d46  gcc/ipa-icf-gimple.h
! 0ce567e80b74cab5db05bbd7c890c3b8  gcc/ipa-icf.cc
  160f6907201241c29aa0aba8c773fb7d  gcc/ipa-icf.h
  565b1ea811f3e7314cb48b887d1bd0a3  gcc/ipa-inline-analysis.cc
  3691be748be0839f168ca434883e3578  gcc/ipa-inline-transform.cc
*************** df25330f62b3dfe116e3d208d97382c0  gcc/ip
*** 5981,5994 ****
  e232a9fa53a9e55ca7d904fd6d08cfd3  gcc/ipa-modref-tree.h
  626c06f88fb95c500f85a961b35a2586  gcc/ipa-modref.cc
  a1998332fb371fefb1d136e55f251318  gcc/ipa-modref.h
! d31cf24ad65cb55bd058bbf61fcb7bfc  gcc/ipa-param-manipulation.cc
! e01722139c46d541a8e92df69558f7b8  gcc/ipa-param-manipulation.h
  1a2032e460d88a8d7a36ee255cd5def4  gcc/ipa-polymorphic-call.cc
  8e4ffa832ff8be986741e4db4fb7a14d  gcc/ipa-predicate.cc
  8ea80a7dfb62d31f755b1bab47536cfb  gcc/ipa-predicate.h
  186ed06995655200325c448906fd4688  gcc/ipa-profile.cc
! 12c5ee2cf23cb6ad3f281ea2da0d236a  gcc/ipa-prop.cc
! 1fb858c281241d36ef6f35f0d86dff28  gcc/ipa-prop.h
  e4663294020d7a5d918996dbcaacdb0d  gcc/ipa-pure-const.cc
  57bca18eaf2476064d1e04fcdcff555b  gcc/ipa-ref.cc
  2704b79d11adc7a154b9c72ea85288ec  gcc/ipa-ref.h
--- 5982,5995 ----
  e232a9fa53a9e55ca7d904fd6d08cfd3  gcc/ipa-modref-tree.h
  626c06f88fb95c500f85a961b35a2586  gcc/ipa-modref.cc
  a1998332fb371fefb1d136e55f251318  gcc/ipa-modref.h
! a3ac337da07de091ab3c184819c1c37e  gcc/ipa-param-manipulation.cc
! 1642ce52f56ac97998826713b05f7f8e  gcc/ipa-param-manipulation.h
  1a2032e460d88a8d7a36ee255cd5def4  gcc/ipa-polymorphic-call.cc
  8e4ffa832ff8be986741e4db4fb7a14d  gcc/ipa-predicate.cc
  8ea80a7dfb62d31f755b1bab47536cfb  gcc/ipa-predicate.h
  186ed06995655200325c448906fd4688  gcc/ipa-profile.cc
! 91026c5b205f54cc0d1bf952ef64a75c  gcc/ipa-prop.cc
! 13a31f6e6202f187029df90f9cb2412d  gcc/ipa-prop.h
  e4663294020d7a5d918996dbcaacdb0d  gcc/ipa-pure-const.cc
  57bca18eaf2476064d1e04fcdcff555b  gcc/ipa-ref.cc
  2704b79d11adc7a154b9c72ea85288ec  gcc/ipa-ref.h
*************** dd51496e4c7b4c7a7fab6af86cc145d1  gcc/ir
*** 6011,6019 ****
  16270966db2614c9182968e8d3013de9  gcc/ira.h
  6823bfd00e26375bea4870c4262d82b0  gcc/is-a.h
  f0e382f9c69d3559571d2a5c7142f12d  gcc/iterator-utils.h
! bc3ec6237965d6c61f4353800637fa15  gcc/jit/ChangeLog
  6071bdf04fb356c5ac99a99ec00c9a12  gcc/jit/ChangeLog.jit
! e62751adf42d37bc9f1df41eb7d60bec  gcc/jit/Make-lang.in
  fd0d76b6467c987f813d430a35d4760a  gcc/jit/TODO.rst
  402c4c7ebd371c4d044b0d12519fdad5  gcc/jit/config-lang.in
  df53fb6b84c435b56ac2cb2727b62b27  gcc/jit/docs/Makefile
--- 6012,6020 ----
  16270966db2614c9182968e8d3013de9  gcc/ira.h
  6823bfd00e26375bea4870c4262d82b0  gcc/is-a.h
  f0e382f9c69d3559571d2a5c7142f12d  gcc/iterator-utils.h
! 52a1123b376040445504ce4a1d7363f9  gcc/jit/ChangeLog
  6071bdf04fb356c5ac99a99ec00c9a12  gcc/jit/ChangeLog.jit
! da361807505988e3a50f7eaa51e74678  gcc/jit/Make-lang.in
  fd0d76b6467c987f813d430a35d4760a  gcc/jit/TODO.rst
  402c4c7ebd371c4d044b0d12519fdad5  gcc/jit/config-lang.in
  df53fb6b84c435b56ac2cb2727b62b27  gcc/jit/docs/Makefile
*************** cc545497c12300f9ef4ef17d957c4ffe  gcc/ji
*** 6095,6100 ****
--- 6096,6102 ----
  0c697219d096ce33fc4569e9619f5db0  gcc/jit/jit-w32.h
  553ad6dd1cc7854ba6dd020e2ac39e5c  gcc/jit/libgccjit++.h
  f5f87943c8e9f34e6183bff500a25c2d  gcc/jit/libgccjit.cc
+ 9a8deb23c12ab4353352d9b7f758f518  gcc/jit/libgccjit.exports
  9b0fe04cfa3ad4ba5fbd14a407f11b94  gcc/jit/libgccjit.h
  516a7625ba55338e13cd7bfe3d60c53f  gcc/jit/libgccjit.map
  a683bef6f6721b574c76acc1efb5050c  gcc/jit/notes.txt
*************** e5932fb927bbb4bfb85cb5d33ffd6417  gcc/lo
*** 6121,6133 ****
  d5ac5a89e073a7e5b33668071523cef0  gcc/lower-subreg.h
  d5e19107ed41503bb67b0d933a4d56a3  gcc/lra-assigns.cc
  7c4d1173e371deee7b43743215497a0b  gcc/lra-coalesce.cc
! 5c9e4539deefe9a5b8c5a1f4bd61935d  gcc/lra-constraints.cc
! 27b30505478beaf07d23cdc19a5c2d06  gcc/lra-eliminations.cc
  e9afb9364b5e117827c3db67a1717c17  gcc/lra-int.h
  cfd5ab112698229bbb833f8a805d27ef  gcc/lra-lives.cc
  b1a7f9f7a4796f7d3f6a6c60ac9d2bd2  gcc/lra-remat.cc
  a12ca899bd59ccbeec416fc43977c608  gcc/lra-spills.cc
! 3651205587b5293818168470115ab539  gcc/lra.cc
  f490aaab2d136c3ac960b8a2268bbeae  gcc/lra.h
  e1627fa0450d2bf925dc226db5eea40f  gcc/lto-cgraph.cc
  5f9713f5327a766eda14c98080a2f793  gcc/lto-compress.cc
--- 6123,6135 ----
  d5ac5a89e073a7e5b33668071523cef0  gcc/lower-subreg.h
  d5e19107ed41503bb67b0d933a4d56a3  gcc/lra-assigns.cc
  7c4d1173e371deee7b43743215497a0b  gcc/lra-coalesce.cc
! 116a4a175acab65280d056469a605df9  gcc/lra-constraints.cc
! 38a6b3fbfbeebe88bec281b43a09213a  gcc/lra-eliminations.cc
  e9afb9364b5e117827c3db67a1717c17  gcc/lra-int.h
  cfd5ab112698229bbb833f8a805d27ef  gcc/lra-lives.cc
  b1a7f9f7a4796f7d3f6a6c60ac9d2bd2  gcc/lra-remat.cc
  a12ca899bd59ccbeec416fc43977c608  gcc/lra-spills.cc
! 8af016f653ef309d269a40b20c238258  gcc/lra.cc
  f490aaab2d136c3ac960b8a2268bbeae  gcc/lra.h
  e1627fa0450d2bf925dc226db5eea40f  gcc/lto-cgraph.cc
  5f9713f5327a766eda14c98080a2f793  gcc/lto-compress.cc
*************** daebc1236d16034267b252a3005afafe  gcc/lt
*** 6140,6147 ****
  45cf33f2a79f186280384b15b18641e0  gcc/lto-streamer-out.cc
  f8113169f67aa54af90435250435dd6c  gcc/lto-streamer.cc
  2936f9135f911160faf0cb4b721086ea  gcc/lto-streamer.h
! 36f760b9f986637329c180090b7f11a8  gcc/lto-wrapper.cc
! 7a6bfb500235850012a795905f6a4b12  gcc/lto/ChangeLog
  3abc3928a490a07a555d38d6e8879173  gcc/lto/Make-lang.in
  26c76b7cd7c3c43bd918e8cf35d2e1c8  gcc/lto/common.cc
  f4c6748bc258cf396c8c26902b79122c  gcc/lto/common.h
--- 6142,6149 ----
  45cf33f2a79f186280384b15b18641e0  gcc/lto-streamer-out.cc
  f8113169f67aa54af90435250435dd6c  gcc/lto-streamer.cc
  2936f9135f911160faf0cb4b721086ea  gcc/lto-streamer.h
! c6b404aebb74d7a1c0ea56a649ed875f  gcc/lto-wrapper.cc
! 1552594aca4c68b158c4e26253ed94a5  gcc/lto/ChangeLog
  3abc3928a490a07a555d38d6e8879173  gcc/lto/Make-lang.in
  26c76b7cd7c3c43bd918e8cf35d2e1c8  gcc/lto/common.cc
  f4c6748bc258cf396c8c26902b79122c  gcc/lto/common.h
*************** dff2331e5edc5d66c07f2ba05c20a9c5  gcc/lt
*** 6163,6169 ****
  704dbc3758376f5f1a822ef60e3ab455  gcc/machmode.def
  ae630ad63e4030b0c8fb86461bc683c9  gcc/machmode.h
  002d4a917af4cc0bb0f4dc295bbc4b17  gcc/main.cc
! 7c921a5376b9de0eace11b382fa29075  gcc/match.pd
  d9414a0dc03cec270c998d720054b9fa  gcc/mcf.cc
  efc7ef9dc4204c76b419e2a76287ef0b  gcc/mem-stats-traits.h
  a31c8fb12b7bbe32c163b580c91affad  gcc/mem-stats.h
--- 6165,6171 ----
  704dbc3758376f5f1a822ef60e3ab455  gcc/machmode.def
  ae630ad63e4030b0c8fb86461bc683c9  gcc/machmode.h
  002d4a917af4cc0bb0f4dc295bbc4b17  gcc/main.cc
! 2c6b2210ec6773c7af2f4660c1d13625  gcc/match.pd
  d9414a0dc03cec270c998d720054b9fa  gcc/mcf.cc
  efc7ef9dc4204c76b419e2a76287ef0b  gcc/mem-stats-traits.h
  a31c8fb12b7bbe32c163b580c91affad  gcc/mem-stats.h
*************** b95605bc52a4f8d760769e6d26d195e4  gcc/mk
*** 6176,6186 ****
  6b3daff0bb8e0990085d41fecb74b358  gcc/modulo-sched.cc
  041841a4d2557cb845ce87946a35041d  gcc/multiple_target.cc
  b220a9ffc3d8617670a7ca765ef6303d  gcc/mux-utils.h
! e2a9306bf38a36b0e6eea1c4ff33a749  gcc/objc/ChangeLog
  80b0c093eda57fcbb8e9eddd18bedd4f  gcc/objc/Make-lang.in
  42537e8757f2e49f7a380397d2307abf  gcc/objc/config-lang.in
  a9d5df1830f72db7d881701c1880a27e  gcc/objc/lang-specs.h
! 18a697734ecb13a1a12c866eca740486  gcc/objc/objc-act.cc
  1289a7740d247d5b27c9c968e8cd35a3  gcc/objc/objc-act.h
  1b8a6511f7b276a98264e2efaa13d10c  gcc/objc/objc-encoding.cc
  af186e2684d2aff9faa352ea1cff213e  gcc/objc/objc-encoding.h
--- 6178,6188 ----
  6b3daff0bb8e0990085d41fecb74b358  gcc/modulo-sched.cc
  041841a4d2557cb845ce87946a35041d  gcc/multiple_target.cc
  b220a9ffc3d8617670a7ca765ef6303d  gcc/mux-utils.h
! 793202c78ef64c3ec54cf795f6e841dd  gcc/objc/ChangeLog
  80b0c093eda57fcbb8e9eddd18bedd4f  gcc/objc/Make-lang.in
  42537e8757f2e49f7a380397d2307abf  gcc/objc/config-lang.in
  a9d5df1830f72db7d881701c1880a27e  gcc/objc/lang-specs.h
! b762d0df487f402a87db56e53a46d9c9  gcc/objc/objc-act.cc
  1289a7740d247d5b27c9c968e8cd35a3  gcc/objc/objc-act.h
  1b8a6511f7b276a98264e2efaa13d10c  gcc/objc/objc-encoding.cc
  af186e2684d2aff9faa352ea1cff213e  gcc/objc/objc-encoding.h
*************** b22836839e7030071d74a1f688b18c03  gcc/ob
*** 6190,6201 ****
  05d231e9dffe3bce371b3e635e1b5921  gcc/objc/objc-map.h
  a0f7e1b164f83858a9fb8f0c96ef5e43  gcc/objc/objc-next-metadata-tags.h
  f00dfd533135d24682bb29c07f6659e2  gcc/objc/objc-next-runtime-abi-01.cc
! 0b1d7e857ce9a5805b4ead292b2f2e49  gcc/objc/objc-next-runtime-abi-02.cc
  0ee886e63684089ef6b339e3cabd690f  gcc/objc/objc-runtime-hooks.h
! d5208088eb44cde2354166919108e041  gcc/objc/objc-runtime-shared-support.cc
  d0dff9b6758f610e9a1fd8c2351656a8  gcc/objc/objc-runtime-shared-support.h
  9789f1f3d85fb6f3104485905ec9459f  gcc/objc/objc-tree.def
! ce59d5aee228b2b06d511069f0d007bb  gcc/objcp/ChangeLog
  00d4fe33b04eb68f4fc29d3af98290a2  gcc/objcp/Make-lang.in
  c7147535d919b13c29b364931facc65e  gcc/objcp/config-lang.in
  53dd8ccdff91b6a4a408dc313b0705d2  gcc/objcp/lang-specs.h
--- 6192,6203 ----
  05d231e9dffe3bce371b3e635e1b5921  gcc/objc/objc-map.h
  a0f7e1b164f83858a9fb8f0c96ef5e43  gcc/objc/objc-next-metadata-tags.h
  f00dfd533135d24682bb29c07f6659e2  gcc/objc/objc-next-runtime-abi-01.cc
! c65941ba78e6c8d97e439f0a5925e890  gcc/objc/objc-next-runtime-abi-02.cc
  0ee886e63684089ef6b339e3cabd690f  gcc/objc/objc-runtime-hooks.h
! a6c59fc462145bd7473f0dd7bd905b86  gcc/objc/objc-runtime-shared-support.cc
  d0dff9b6758f610e9a1fd8c2351656a8  gcc/objc/objc-runtime-shared-support.h
  9789f1f3d85fb6f3104485905ec9459f  gcc/objc/objc-tree.def
! 409dd24dbdb349813475767c30ce2d3f  gcc/objcp/ChangeLog
  00d4fe33b04eb68f4fc29d3af98290a2  gcc/objcp/Make-lang.in
  c7147535d919b13c29b364931facc65e  gcc/objcp/config-lang.in
  53dd8ccdff91b6a4a408dc313b0705d2  gcc/objcp/lang-specs.h
*************** d2c6fc9e746263d862668f94a7312032  gcc/ob
*** 6204,6210 ****
  1d57186920863b45e407890ff8e0a2bc  gcc/objcp/objcp-lang.cc
  2e26690a7f9c9cfff17ce7bc5741300f  gcc/obstack-utils.h
  7380d54b0ecce1b4b85b7730c23d962f  gcc/omp-builtins.def
! 5ab951d3abb6c7512dd2f5407f3b902e  gcc/omp-expand.cc
  d2882be1e5e0c8bcb94e40249892eda8  gcc/omp-expand.h
  e15f4aee3401c6c0f37a5a75e94b0c2c  gcc/omp-general.cc
  e09a162f54780baf753d31877328939a  gcc/omp-general.h
--- 6206,6212 ----
  1d57186920863b45e407890ff8e0a2bc  gcc/objcp/objcp-lang.cc
  2e26690a7f9c9cfff17ce7bc5741300f  gcc/obstack-utils.h
  7380d54b0ecce1b4b85b7730c23d962f  gcc/omp-builtins.def
! 9653022d4fd1e6e80dd6dfa641969c51  gcc/omp-expand.cc
  d2882be1e5e0c8bcb94e40249892eda8  gcc/omp-expand.h
  e15f4aee3401c6c0f37a5a75e94b0c2c  gcc/omp-general.cc
  e09a162f54780baf753d31877328939a  gcc/omp-general.h
*************** ca27fff752bb2bf3547470865f677089  gcc/pa
*** 6256,6262 ****
  22890b5c1619eacc2afbe4c483eba3b3  gcc/plugin.cc
  12395edd2893f064e235e9c7ef33f67c  gcc/plugin.def
  6a447e1b290c005312a2ddf9a4095bc6  gcc/plugin.h
! 54547e71f939841d615f33e61761654c  gcc/po/ChangeLog
  23c6b9cdf5b89eab23474e0d050bc452  gcc/po/EXCLUDES
  f2e76d86dce1f72d4adc901bce318410  gcc/po/be.gmo
  1025639d02efccdc7693502b922c1904  gcc/po/be.po
--- 6258,6264 ----
  22890b5c1619eacc2afbe4c483eba3b3  gcc/plugin.cc
  12395edd2893f064e235e9c7ef33f67c  gcc/plugin.def
  6a447e1b290c005312a2ddf9a4095bc6  gcc/plugin.h
! c52d179345f74dcb7c185f3ba952141c  gcc/po/ChangeLog
  23c6b9cdf5b89eab23474e0d050bc452  gcc/po/EXCLUDES
  f2e76d86dce1f72d4adc901bce318410  gcc/po/be.gmo
  1025639d02efccdc7693502b922c1904  gcc/po/be.po
*************** de01fe47e5757d0b334b5a7bec2027fb  gcc/pr
*** 6320,6326 ****
  83154797f3fac26334db4b6dabdaa09d  gcc/profile-count.h
  f7d16ae960668e88e50c9dd089999b22  gcc/profile.cc
  5639abf0de0b6df84638ef972c1a686c  gcc/profile.h
! 6a6de3084233f9c16981592ac727271d  gcc/range-op.cc
  2a90c23a731511a2351b9f6a7ec6fde0  gcc/range-op.h
  477608b7c12d6ef282bb06b52ec8bf5d  gcc/range.cc
  2c94ae18620c7b0a4f08fd11a254cb24  gcc/range.h
--- 6322,6328 ----
  83154797f3fac26334db4b6dabdaa09d  gcc/profile-count.h
  f7d16ae960668e88e50c9dd089999b22  gcc/profile.cc
  5639abf0de0b6df84638ef972c1a686c  gcc/profile.h
! 57ef277bb7cb17582695dc5860ead0a7  gcc/range-op.cc
  2a90c23a731511a2351b9f6a7ec6fde0  gcc/range-op.h
  477608b7c12d6ef282bb06b52ec8bf5d  gcc/range.cc
  2c94ae18620c7b0a4f08fd11a254cb24  gcc/range.h
*************** c88b1a148e33f6b40896031ef906b6c5  gcc/rt
*** 6359,6365 ****
  8610a93cea6304dc2788aa6f01b3ec6f  gcc/rtl-ssa/access-utils.h
  0bfcef488dd02a3787c2611fae03bd08  gcc/rtl-ssa/accesses.cc
  3eb5db75af53d23d684d33354c25204d  gcc/rtl-ssa/accesses.h
! 170884c1fe55938892eadc9c779200a4  gcc/rtl-ssa/blocks.cc
  912b1f1f358db9dc275de8d3b04c173f  gcc/rtl-ssa/blocks.h
  97ecca51a81b7af9d4163706bb786a25  gcc/rtl-ssa/change-utils.h
  a9b0466a8fcaf8dcc0656ccfdcd9326e  gcc/rtl-ssa/changes.cc
--- 6361,6367 ----
  8610a93cea6304dc2788aa6f01b3ec6f  gcc/rtl-ssa/access-utils.h
  0bfcef488dd02a3787c2611fae03bd08  gcc/rtl-ssa/accesses.cc
  3eb5db75af53d23d684d33354c25204d  gcc/rtl-ssa/accesses.h
! 48bf4a14a316821ce3013fe22e4e692d  gcc/rtl-ssa/blocks.cc
  912b1f1f358db9dc275de8d3b04c173f  gcc/rtl-ssa/blocks.h
  97ecca51a81b7af9d4163706bb786a25  gcc/rtl-ssa/change-utils.h
  a9b0466a8fcaf8dcc0656ccfdcd9326e  gcc/rtl-ssa/changes.cc
*************** aba021400841b2455680b33c4ae146d7  gcc/rt
*** 6378,6385 ****
  28d849e47de1a855134d525a0ba82f9b  gcc/rtl.cc
  95f3049d5b4203fcc3f5ae088a5135f0  gcc/rtl.def
  97f14f16cb2979c7ebe82f23c5437364  gcc/rtl.h
! 7a854d48bacd0a212dcda634a01d20fa  gcc/rtlanal.cc
! 754a233fb9fe65a4d647a068203de262  gcc/rtlanal.h
  24872c67a33407066d1e2a68985d66ee  gcc/rtlhash.cc
  98bdbda9c84d693847fc9d684a5f4062  gcc/rtlhash.h
  f340d2b3d9ec996a2778aa96e5d82e65  gcc/rtlhooks-def.h
--- 6380,6387 ----
  28d849e47de1a855134d525a0ba82f9b  gcc/rtl.cc
  95f3049d5b4203fcc3f5ae088a5135f0  gcc/rtl.def
  97f14f16cb2979c7ebe82f23c5437364  gcc/rtl.h
! 9ff4744c45ced27ea30aafce250c6b45  gcc/rtlanal.cc
! 0ca3d8d148fb266e991c5b2dd2ae7a32  gcc/rtlanal.h
  24872c67a33407066d1e2a68985d66ee  gcc/rtlhash.cc
  98bdbda9c84d693847fc9d684a5f4062  gcc/rtlhash.h
  f340d2b3d9ec996a2778aa96e5d82e65  gcc/rtlhooks-def.h
*************** d52426f1c62c0c37089feeaada3b4d81  gcc/sy
*** 6451,6459 ****
  c7126fa37eaa25a33e2b35604b5232f5  gcc/symtab-clones.h
  f43d0bfaf43737b32022d2a4ed73a4e5  gcc/symtab-thunks.cc
  20b6451c425095eeefa43b022116651f  gcc/symtab-thunks.h
! 63f7e4e59efbb29dd341c1518635159e  gcc/symtab.cc
  6625bcc0a02138697a70425ce07e60b8  gcc/sync-builtins.def
! b13c43fe299a0a3c8488f97e63159389  gcc/system.h
  2f02f0cf084fed693b3eef7675fa2958  gcc/target-def.h
  84c7e8f0d12964716f9bc0f4ccf2a050  gcc/target-globals.cc
  311cc5bdc01848ade2860f8dc148f0e5  gcc/target-globals.h
--- 6453,6461 ----
  c7126fa37eaa25a33e2b35604b5232f5  gcc/symtab-clones.h
  f43d0bfaf43737b32022d2a4ed73a4e5  gcc/symtab-thunks.cc
  20b6451c425095eeefa43b022116651f  gcc/symtab-thunks.h
! 088e8a78532253698cd68f6fe00ad1da  gcc/symtab.cc
  6625bcc0a02138697a70425ce07e60b8  gcc/sync-builtins.def
! 1b78530e945e3314dac3af78c2e1ce4a  gcc/system.h
  2f02f0cf084fed693b3eef7675fa2958  gcc/target-def.h
  84c7e8f0d12964716f9bc0f4ccf2a050  gcc/target-globals.cc
  311cc5bdc01848ade2860f8dc148f0e5  gcc/target-globals.h
*************** bdb7861240a719686c5923e70bd8347a  gcc/ta
*** 6464,6470 ****
  6149228cab283a1f92d51b26eb37646e  gcc/targhooks.cc
  008304bca4d8ea66f0c9bc8749e23bb5  gcc/targhooks.h
  f39fcaa8197187283ccfed40107b426d  gcc/testsuite/.gitattributes
! 9099e658d3e364006b2e6a98cf259c7a  gcc/testsuite/ChangeLog
  862f04afbd87da2cc6bc432c3f28430f  gcc/testsuite/ChangeLog-1993-2007
  029a5d8dacd25eb5d4711452ac448e5b  gcc/testsuite/ChangeLog-2008
  13ac28c41d51b66b4ec40dba6bd50f39  gcc/testsuite/ChangeLog-2009
--- 6466,6472 ----
  6149228cab283a1f92d51b26eb37646e  gcc/targhooks.cc
  008304bca4d8ea66f0c9bc8749e23bb5  gcc/targhooks.h
  f39fcaa8197187283ccfed40107b426d  gcc/testsuite/.gitattributes
! 24bab2a1a6bee9ab645d2cc95e36e99c  gcc/testsuite/ChangeLog
  862f04afbd87da2cc6bc432c3f28430f  gcc/testsuite/ChangeLog-1993-2007
  029a5d8dacd25eb5d4711452ac448e5b  gcc/testsuite/ChangeLog-2008
  13ac28c41d51b66b4ec40dba6bd50f39  gcc/testsuite/ChangeLog-2009
*************** ad210b6699449d7c2f1c95f9c363d606  gcc/te
*** 9114,9119 ****
--- 9116,9122 ----
  1465c746ce0da634140bd11994689fb1  gcc/testsuite/c-c++-common/Warray-compare-1.c
  86563e27b22c96809703786cd874a440  gcc/testsuite/c-c++-common/Warray-compare-2.c
  fe25f03fdb469ad245f6cae14480ddad  gcc/testsuite/c-c++-common/Wattributes-2.c
+ 17bdcdb759c07d09c2d4d9895b89253d  gcc/testsuite/c-c++-common/Wattributes-3.c
  e07fdc272a434aa05e75700c13b249b0  gcc/testsuite/c-c++-common/Wattributes.c
  66c5aeebcf29f51b19641fb8b159ab7b  gcc/testsuite/c-c++-common/Wbidi-chars-1.c
  2a90a24dbbfbbcbbfba3080caeecb033  gcc/testsuite/c-c++-common/Wbidi-chars-10.c
*************** d38712ca0af7a9dc1180236b496d6f9f  gcc/te
*** 10714,10720 ****
  b75f32090613560551fe2b3a16a6bddf  gcc/testsuite/c-c++-common/restrict-4.c
  a1c15ef5229215f0209411736f5ccdfd  gcc/testsuite/c-c++-common/rotate-1.c
  5b438ca153be076de6ede90b95050821  gcc/testsuite/c-c++-common/rotate-10.c
! af8d53f0ae71fa4edd54ac045b8b1055  gcc/testsuite/c-c++-common/rotate-11.c
  b47149b1c26c8061062a2b6e5392dc4c  gcc/testsuite/c-c++-common/rotate-1a.c
  530ad828644bc1ac5931dccc4963f6ca  gcc/testsuite/c-c++-common/rotate-2.c
  f13d0dfdffd866dd9c1de156b3de40ae  gcc/testsuite/c-c++-common/rotate-2a.c
--- 10717,10723 ----
  b75f32090613560551fe2b3a16a6bddf  gcc/testsuite/c-c++-common/restrict-4.c
  a1c15ef5229215f0209411736f5ccdfd  gcc/testsuite/c-c++-common/rotate-1.c
  5b438ca153be076de6ede90b95050821  gcc/testsuite/c-c++-common/rotate-10.c
! 275429c8b53a6c88e54475ee7165985a  gcc/testsuite/c-c++-common/rotate-11.c
  b47149b1c26c8061062a2b6e5392dc4c  gcc/testsuite/c-c++-common/rotate-1a.c
  530ad828644bc1ac5931dccc4963f6ca  gcc/testsuite/c-c++-common/rotate-2.c
  f13d0dfdffd866dd9c1de156b3de40ae  gcc/testsuite/c-c++-common/rotate-2a.c
*************** e35caecbc64e5306c5790ce0f003eff6  gcc/te
*** 10926,10931 ****
--- 10929,10935 ----
  1048d0e6a3ca80d3b4720a445847e7cb  gcc/testsuite/c-c++-common/tsan/tsan_barrier.h
  257bcb6e3df922acaf85096287053435  gcc/testsuite/c-c++-common/tsan/volatile.c
  3e2de6169eb53b32bfe7a21d0500e2f7  gcc/testsuite/c-c++-common/tsan/write_in_reader_lock.c
+ 84c5c6a7c74f75d3dfd312144070c911  gcc/testsuite/c-c++-common/ubsan/Wno-attributes-1.c
  8d737655fe783ab4170cda3a8b41a7f2  gcc/testsuite/c-c++-common/ubsan/align-1.c
  f77090a8c54bd7c9695bd1baea42b2ad  gcc/testsuite/c-c++-common/ubsan/align-10.c
  33e222185e271580e5b1227936c867ca  gcc/testsuite/c-c++-common/ubsan/align-2.c
*************** f5c3f8c802beee48f514efd82c71f586  gcc/te
*** 11048,11053 ****
--- 11052,11058 ----
  a419ef4838cde6817792405820466636  gcc/testsuite/c-c++-common/ubsan/overflow-vec-1.c
  2ca43a119b7a576e216390fb43e1dd13  gcc/testsuite/c-c++-common/ubsan/overflow-vec-2.c
  4283d2f43a803be7759bd958b4845122  gcc/testsuite/c-c++-common/ubsan/pr108880.c
+ 24b18a5fd301d7a3be70c2c44bb2a354  gcc/testsuite/c-c++-common/ubsan/pr112727.c
  52e44aba0bf4e0682451881391dfc23a  gcc/testsuite/c-c++-common/ubsan/pr56917.c
  277b1083be8186921fac899c35d1f83a  gcc/testsuite/c-c++-common/ubsan/pr56956.c
  e229f42e8220b3ff0c068855f57a5b9b  gcc/testsuite/c-c++-common/ubsan/pr58443-1.c
*************** ca578f19b2d380be0549cc9c2f904f2e  gcc/te
*** 12046,12051 ****
--- 12051,12058 ----
  d8a86369c88b1e698b51da5f95da9c9b  gcc/testsuite/g++.dg/conversion/qual3.C
  eb243a0f27cded7003b7b6eecd96f5d2  gcc/testsuite/g++.dg/conversion/real-to-int1.C
  53724dc0cd699d864fc77299b7051204  gcc/testsuite/g++.dg/conversion/ref1.C
+ 73fa4811a4b520eb8c9a90e81946664f  gcc/testsuite/g++.dg/conversion/ref10.C
+ 8814956216a4da6e964e3d3f16ed2170  gcc/testsuite/g++.dg/conversion/ref11.C
  af773a52f134a886314eae7065bee26e  gcc/testsuite/g++.dg/conversion/ref2.C
  b80ab713758c51e69280fe2ae2dee7c9  gcc/testsuite/g++.dg/conversion/ref3.C
  407bbe8b3c959a948fc7df986c991e76  gcc/testsuite/g++.dg/conversion/ref4.C
*************** acdc66e4d80b02a42a452d3b516a42b6  gcc/te
*** 13573,13578 ****
--- 13580,13587 ----
  475744598503ee0aec7ac236f92296d5  gcc/testsuite/g++.dg/cpp0x/initlist-array16.C
  b7c080a9956d13517e0da64ac3f03102  gcc/testsuite/g++.dg/cpp0x/initlist-array17.C
  09f09079c354ad93c3844a14549e0854  gcc/testsuite/g++.dg/cpp0x/initlist-array2.C
+ d3992440eed37bacf3c1b2c2075afeca  gcc/testsuite/g++.dg/cpp0x/initlist-array21.C
+ 25f21baa02838e20e7b1cb692e279e2f  gcc/testsuite/g++.dg/cpp0x/initlist-array22.C
  8c888f7ab5cc44480801a14718225380  gcc/testsuite/g++.dg/cpp0x/initlist-array3.C
  6c1907913d332611dd16d03002d759f9  gcc/testsuite/g++.dg/cpp0x/initlist-array4.C
  8758d8464674d29f4276f8d3ebc899c3  gcc/testsuite/g++.dg/cpp0x/initlist-array5.C
*************** eb8899f6095da627d668fbc099e59316  gcc/te
*** 13611,13616 ****
--- 13620,13626 ----
  bcbe398391cda8139c8462f46935b7e2  gcc/testsuite/g++.dg/cpp0x/initlist-opt.C
  e572423dbc63856346f68c0f83dab54a  gcc/testsuite/g++.dg/cpp0x/initlist-overload1.C
  a054a7d4e96233b7a3a6591843a8d33f  gcc/testsuite/g++.dg/cpp0x/initlist-pmf1.C
+ dbae3b7057bbb77c75bce2ef15965ac1  gcc/testsuite/g++.dg/cpp0x/initlist-pmf2.C
  e3ec7ab89d20e6ccf50aa92954896f07  gcc/testsuite/g++.dg/cpp0x/initlist-postfix-open-square.C
  1b5c7e432be89c3edcbfaad424a2e353  gcc/testsuite/g++.dg/cpp0x/initlist-protected.C
  fd02e573e3be3d0a146192cd840840a1  gcc/testsuite/g++.dg/cpp0x/initlist-pure.C
*************** cd0880983dc32cb469f470728ae8b22b  gcc/te
*** 13809,13814 ****
--- 13819,13825 ----
  1d85414b94d2d104004fc7341b90a896  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const.C
  26a3a7d7fa8662de4df1454d0f3eea85  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const10.C
  692c149205d32e7263c8778ba131c9dc  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const11.C
+ 99ebbe9d836593c488474457d9b14620  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const11a.C
  64bc761abc3783521fdfb26f930f3410  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const2.C
  e513b4dcc45e6063745c03c7c99151fa  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const3.C
  1ced7b3231f38cc9948cc247893ffec1  gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const4.C
*************** dd169c18a4c3d9571a259e67ef8648ef  gcc/te
*** 14140,14145 ****
--- 14151,14158 ----
  1f3e552c43d920f75b1dde7450f0be06  gcc/testsuite/g++.dg/cpp0x/noexcept74a.C
  e2b18220e252af35e7715d6c7d99895e  gcc/testsuite/g++.dg/cpp0x/noexcept75.C
  b86be1b4c25b3063ddc7e4cb746b89ad  gcc/testsuite/g++.dg/cpp0x/noexcept76.C
+ 640bcc6d84918140414a88703d7920cb  gcc/testsuite/g++.dg/cpp0x/noexcept78.C
+ 787befec69c43fcbbbfc00b982170915  gcc/testsuite/g++.dg/cpp0x/noexcept79.C
  3bf83ccb654cedbb57a45851fb14aa9d  gcc/testsuite/g++.dg/cpp0x/nolinkage1.C
  6b7c91b931bbdacbbffbf9b90a79bc6a  gcc/testsuite/g++.dg/cpp0x/nolinkage1.h
  c92e0eda44dd6b3d74960b249fa5204f  gcc/testsuite/g++.dg/cpp0x/nolinkage1a.cc
*************** cb5b10af278fbafac78a6d53829b3d37  gcc/te
*** 14159,14164 ****
--- 14172,14178 ----
  e950526c0d7127f5718072cb9366641e  gcc/testsuite/g++.dg/cpp0x/nsdmi-aggr1.C
  94c644ef2cfc0af0de150c6699b774ed  gcc/testsuite/g++.dg/cpp0x/nsdmi-anon-struct1.C
  5c1de897b64b39fb775a2664a3561676  gcc/testsuite/g++.dg/cpp0x/nsdmi-array1.C
+ f570e39b0271d39d9cdde0565b1fe390  gcc/testsuite/g++.dg/cpp0x/nsdmi-array2.C
  333540e9a24be2138a5f0577b985d91d  gcc/testsuite/g++.dg/cpp0x/nsdmi-const1.C
  8d47330d250732b4512c767f7e3de3c4  gcc/testsuite/g++.dg/cpp0x/nsdmi-defer1.C
  4e737e4950688a6f722d97a47d7cf157  gcc/testsuite/g++.dg/cpp0x/nsdmi-defer2.C
*************** f900a961724b234dbae2b1dd5e2b9ae6  gcc/te
*** 14197,14202 ****
--- 14211,14217 ----
  dc4bd68cb1e4dc039dc569a75085b940  gcc/testsuite/g++.dg/cpp0x/nsdmi-template22.C
  0701f9d0d2b24244ead57a63737e416c  gcc/testsuite/g++.dg/cpp0x/nsdmi-template23.C
  c01b8ba444d39018237ee544669ac45e  gcc/testsuite/g++.dg/cpp0x/nsdmi-template24.C
+ 65478d57f79f449d69bf39745b25b93f  gcc/testsuite/g++.dg/cpp0x/nsdmi-template25.C
  a4838f227c782d1dc8cc894a19deb0d1  gcc/testsuite/g++.dg/cpp0x/nsdmi-template3.C
  ecc55c2acf604366d5eab66ebf6a29dd  gcc/testsuite/g++.dg/cpp0x/nsdmi-template4.C
  2df81a05f5de27f3cb083ad4a290512a  gcc/testsuite/g++.dg/cpp0x/nsdmi-template5.C
*************** fd449c2760b279bd0767e28da8a563bf  gcc/te
*** 15522,15527 ****
--- 15537,15543 ----
  8efe65d95bbc02645dd6c2656587135e  gcc/testsuite/g++.dg/cpp1y/lambda-generic-ice8.C
  cbe44bb553e043d66e5399d7f388dabf  gcc/testsuite/g++.dg/cpp1y/lambda-generic-ice9.C
  65815d2456686230a8b4da8685461cb9  gcc/testsuite/g++.dg/cpp1y/lambda-generic-local-class1.C
+ 47599e7b4eb02a3273b3c5423173b19e  gcc/testsuite/g++.dg/cpp1y/lambda-generic-local-class2.C
  81a4729d1c94303fbb34bf57ad79ac29  gcc/testsuite/g++.dg/cpp1y/lambda-generic-local-fn1.C
  a5e1f08b66165b58419bbab37da9a962  gcc/testsuite/g++.dg/cpp1y/lambda-generic-mixed.C
  230ab773acec47b7efe832181c6c4972  gcc/testsuite/g++.dg/cpp1y/lambda-generic-nested1.C
*************** ca10f046e47ea09ba5b87084372f1ce2  gcc/te
*** 15856,15861 ****
--- 15872,15878 ----
  c5e8ac858eac19a1f1f10709e9b49389  gcc/testsuite/g++.dg/cpp1z/aligned-new7.C
  1c005f415746635350d5fd1bf3068b93  gcc/testsuite/g++.dg/cpp1z/aligned-new8.C
  91a3b7a59ec3f2f070c0cc2e24a851b2  gcc/testsuite/g++.dg/cpp1z/aligned-new9.C
+ dea62fa85e86450c80389ea639cb2473  gcc/testsuite/g++.dg/cpp1z/array-prvalue2.C
  15f78f24e2133987caada47dbd4501b6  gcc/testsuite/g++.dg/cpp1z/attr-lambda1.C
  34121807f233280bd4b9ceb565c64cf6  gcc/testsuite/g++.dg/cpp1z/attributes-enum-1.C
  a6e3099890bf75adfc276a625b3b0e3f  gcc/testsuite/g++.dg/cpp1z/attributes-enum-1a.C
*************** e6baed7e5941603d690b9c2c737ea663  gcc/te
*** 16139,16145 ****
  63be3b6d75aa3c2c8088552683d5245e  gcc/testsuite/g++.dg/cpp1z/eval-order10.C
  3abc6084e572264410718d38beb290bb  gcc/testsuite/g++.dg/cpp1z/eval-order11.C
  bb194d9ce590c9e5e69935ebac0f25e4  gcc/testsuite/g++.dg/cpp1z/eval-order2.C
! 89fdd37f4580457e23eeb34adcf4d4e0  gcc/testsuite/g++.dg/cpp1z/eval-order3.C
  6d8d378fedaf65b4cb89952060799280  gcc/testsuite/g++.dg/cpp1z/eval-order4.C
  56af6596678e014cdf3ef38d1427358f  gcc/testsuite/g++.dg/cpp1z/eval-order5.C
  f6da488c72cf7236fa560fcdd857f03e  gcc/testsuite/g++.dg/cpp1z/eval-order6.C
--- 16156,16162 ----
  63be3b6d75aa3c2c8088552683d5245e  gcc/testsuite/g++.dg/cpp1z/eval-order10.C
  3abc6084e572264410718d38beb290bb  gcc/testsuite/g++.dg/cpp1z/eval-order11.C
  bb194d9ce590c9e5e69935ebac0f25e4  gcc/testsuite/g++.dg/cpp1z/eval-order2.C
! 8b89dee7164b6f4d992706e5b85433f4  gcc/testsuite/g++.dg/cpp1z/eval-order3.C
  6d8d378fedaf65b4cb89952060799280  gcc/testsuite/g++.dg/cpp1z/eval-order4.C
  56af6596678e014cdf3ef38d1427358f  gcc/testsuite/g++.dg/cpp1z/eval-order5.C
  f6da488c72cf7236fa560fcdd857f03e  gcc/testsuite/g++.dg/cpp1z/eval-order6.C
*************** c3433159b2bd23aac24ee2591dc866c3  gcc/te
*** 16386,16392 ****
  6bfd7e3fb2dd8f7e8d9c698e12bcb12d  gcc/testsuite/g++.dg/cpp23/constexpr-nonlit6.C
  e8f7bd0576728e974495935283ad4f39  gcc/testsuite/g++.dg/cpp23/constexpr-nonlit7.C
  94d923eb6e3e9a6e1a82b6aa88915ed5  gcc/testsuite/g++.dg/cpp23/cplusplus.C
! 92d47ef004cad05d17725e67099961ba  gcc/testsuite/g++.dg/cpp23/feat-cxx2b.C
  b2919427c96be25ae3a72933323c8de1  gcc/testsuite/g++.dg/cpp23/init-stmt1.C
  368308646b02bb36cf22014a0d5bbbdb  gcc/testsuite/g++.dg/cpp23/init-stmt2.C
  794e5eb1bd211982315d61651af3bbaa  gcc/testsuite/g++.dg/cpp23/lambda-attr1.C
--- 16403,16409 ----
  6bfd7e3fb2dd8f7e8d9c698e12bcb12d  gcc/testsuite/g++.dg/cpp23/constexpr-nonlit6.C
  e8f7bd0576728e974495935283ad4f39  gcc/testsuite/g++.dg/cpp23/constexpr-nonlit7.C
  94d923eb6e3e9a6e1a82b6aa88915ed5  gcc/testsuite/g++.dg/cpp23/cplusplus.C
! f15cf4056fd44fef3bab4c0e3d8ed9ea  gcc/testsuite/g++.dg/cpp23/feat-cxx2b.C
  b2919427c96be25ae3a72933323c8de1  gcc/testsuite/g++.dg/cpp23/init-stmt1.C
  368308646b02bb36cf22014a0d5bbbdb  gcc/testsuite/g++.dg/cpp23/init-stmt2.C
  794e5eb1bd211982315d61651af3bbaa  gcc/testsuite/g++.dg/cpp23/lambda-attr1.C
*************** a3d09682b891e46d2909fa15e90968be  gcc/te
*** 16447,16452 ****
--- 16464,16470 ----
  6ef777b34934fa2f70b3248e0ca3f4c0  gcc/testsuite/g++.dg/cpp2a/bit-cast13.C
  b3285f9f18a8d9542bc46f53e0efd28e  gcc/testsuite/g++.dg/cpp2a/bit-cast14.C
  fc2669bf6c2d9f293b18029e7572dc94  gcc/testsuite/g++.dg/cpp2a/bit-cast15.C
+ b21ee39782e659d8a55e03a67e8f3d2a  gcc/testsuite/g++.dg/cpp2a/bit-cast16.C
  1a2fa5e09ce4afea93f8549367941793  gcc/testsuite/g++.dg/cpp2a/bit-cast2.C
  4cd9a6c75b7b9c06d500d33a4b70e045  gcc/testsuite/g++.dg/cpp2a/bit-cast3.C
  43041147b254e878b1962b35b230ff79  gcc/testsuite/g++.dg/cpp2a/bit-cast4.C
*************** a6a50b6488710734804c5c75b79b903a  gcc/te
*** 16551,16556 ****
--- 16569,16575 ----
  24a9eaf01cde49642308b85f4d4dcc5e  gcc/testsuite/g++.dg/cpp2a/concepts-fn5.C
  0f1a6b3b582e8d9538428d983f021ba9  gcc/testsuite/g++.dg/cpp2a/concepts-fn6.C
  361e29e28ac51bd246a126bf9582d546  gcc/testsuite/g++.dg/cpp2a/concepts-fn7.C
+ d75bf2669acc8817d2d366ec5854068e  gcc/testsuite/g++.dg/cpp2a/concepts-fn8.C
  54600170a553fbe02a4c3cc4c16271ab  gcc/testsuite/g++.dg/cpp2a/concepts-fnparm1.C
  ddf7b3c6cc5b3127a1fb9f8ada7bd1d3  gcc/testsuite/g++.dg/cpp2a/concepts-friend1.C
  9b464178270ccc7b2da3483ef6eb72e3  gcc/testsuite/g++.dg/cpp2a/concepts-friend12.C
*************** f43d24631924e6835f35ad16f9b77ac9  gcc/te
*** 16635,16640 ****
--- 16654,16660 ----
  b48de652a269ba0411d9c971e6b06869  gcc/testsuite/g++.dg/cpp2a/concepts-partial-spec8.C
  66e23ad7cf5207487bf51a95b73faeae  gcc/testsuite/g++.dg/cpp2a/concepts-partial-spec9.C
  29ec7a379f70ee79ba0310d8fc45703b  gcc/testsuite/g++.dg/cpp2a/concepts-placeholder1.C
+ f57d40e8c8a062ab42228a604dc8b336  gcc/testsuite/g++.dg/cpp2a/concepts-placeholder12.C
  9a1776b1d9b3c080e847b78507e8c1c6  gcc/testsuite/g++.dg/cpp2a/concepts-placeholder2.C
  d4ce4a5306e35eff2b78390b50d6c95b  gcc/testsuite/g++.dg/cpp2a/concepts-placeholder3.C
  e428d578c8a0c5a61ab85eddccb24071  gcc/testsuite/g++.dg/cpp2a/concepts-placeholder4.C
*************** c66c957a03459efed336ab628ac7a020  gcc/te
*** 16791,16796 ****
--- 16811,16817 ----
  9ff1f88974ac56dba726f1074288f8e9  gcc/testsuite/g++.dg/cpp2a/concepts-template-parm8.C
  ec9215388b111eac1916dca163b2b4dd  gcc/testsuite/g++.dg/cpp2a/concepts-template-parm9.C
  ee36c7ebc03385f37bcba1c49e06c808  gcc/testsuite/g++.dg/cpp2a/concepts-this1.C
+ 8fe2b0550580edd7f36bb9d150fad6c4  gcc/testsuite/g++.dg/cpp2a/concepts-throw1.C
  39c15f1dc604f714304d144250164089  gcc/testsuite/g++.dg/cpp2a/concepts-traits1.C
  c9a6ab7bc0f1947e843b9c7150ccb98c  gcc/testsuite/g++.dg/cpp2a/concepts-traits2.C
  da802903e656a602947ee543e58f625e  gcc/testsuite/g++.dg/cpp2a/concepts-traits3.C
*************** ac4c42a0f2fd071297e154c82dd3e5cc  gcc/te
*** 16804,16809 ****
--- 16825,16832 ----
  e9afe83f998c36b2fb7c1f09347d0bde  gcc/testsuite/g++.dg/cpp2a/concepts-ttp2.C
  61d4933dc5691f3ec1773e39ad6449b4  gcc/testsuite/g++.dg/cpp2a/concepts-ttp3.C
  9fd760dc32683991c1046ee2a7769a0f  gcc/testsuite/g++.dg/cpp2a/concepts-ttp4.C
+ 88c3dc6cebb92ccd4e70aff54871edad  gcc/testsuite/g++.dg/cpp2a/concepts-ttp5.C
+ 14dc8338f97cc1b6792145fdfa5edade  gcc/testsuite/g++.dg/cpp2a/concepts-ttp6.C
  12bfd0f0b99ab93e9f3c3ea3610ad8db  gcc/testsuite/g++.dg/cpp2a/concepts-uneval1.C
  728cf90d57c99021cb85c6b8dd9ffa5e  gcc/testsuite/g++.dg/cpp2a/concepts-uneval2.C
  8ededbbf50406070bfd15b600f7ea746  gcc/testsuite/g++.dg/cpp2a/concepts-uneval3.C
*************** f2ad91569581aa3fa670ae32821491f9  gcc/te
*** 17096,17101 ****
--- 17119,17125 ----
  90589ce06ced8c136aaf37770e1ec488  gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated11.C
  d61cc66863701219edff4cd7fe87ebb9  gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated12.C
  c158bbb4df76b9867cf177e079c2ce23  gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated13.C
+ 13b8a2f12e5511e8657e1c29bb0f8073  gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated15.C
  4617b7d86ad3299b351c033f194bee8a  gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated2.C
  73b56ba004639bd18c7c3c95c3bfd080  gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated3.C
  5c37b5cacdb70688ac2e90c563d9613c  gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated4.C
*************** c7c933568cc5b17f6d8dadb7cec8101f  gcc/te
*** 17329,17334 ****
--- 17353,17360 ----
  279eb9b925ca084c1b6d0115a14ecb82  gcc/testsuite/g++.dg/cpp2a/spaceship-eq12.C
  ae3ef3d8cbf3145fa938c567ccc11530  gcc/testsuite/g++.dg/cpp2a/spaceship-eq13.C
  38fdc580773803f5236af81425b44d75  gcc/testsuite/g++.dg/cpp2a/spaceship-eq14.C
+ 4f286359dd97839020e6c19de0f2dd05  gcc/testsuite/g++.dg/cpp2a/spaceship-eq16.C
+ 466e9895fc63c3cc51f38790018adba9  gcc/testsuite/g++.dg/cpp2a/spaceship-eq17.C
  35b5b00dc11e88e35813caed81c920fc  gcc/testsuite/g++.dg/cpp2a/spaceship-eq1a.C
  da366bbf37859e5c77c24a8138c72180  gcc/testsuite/g++.dg/cpp2a/spaceship-eq2.C
  695134b1125f480b4d381c7ab5398d05  gcc/testsuite/g++.dg/cpp2a/spaceship-eq3.C
*************** f63b5565ab0bb6d2125aa5a844f18e62  gcc/te
*** 17363,17369 ****
  44f85774d50950da2270385ce1798644  gcc/testsuite/g++.dg/cpp2a/spaceship-sfinae2.C
  a1b5541b791ba1834869a1ceeb340ddc  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg1.C
  e6037687c8367081183d5ad6f709b4a7  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg2.C
! 48cc4340eb8546a39438777b57d87c47  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg3.C
  15bc319256750cf3a9caf5d852b30aa1  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg4.C
  853bb4d901c7e141b3533566d35db6c5  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg5.C
  11ce883df5bfcdc17848d1a182086ec8  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg6.C
--- 17389,17395 ----
  44f85774d50950da2270385ce1798644  gcc/testsuite/g++.dg/cpp2a/spaceship-sfinae2.C
  a1b5541b791ba1834869a1ceeb340ddc  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg1.C
  e6037687c8367081183d5ad6f709b4a7  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg2.C
! f33ebefab5f5462103b17cd15e835bc0  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg3.C
  15bc319256750cf3a9caf5d852b30aa1  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg4.C
  853bb4d901c7e141b3533566d35db6c5  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg5.C
  11ce883df5bfcdc17848d1a182086ec8  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg6.C
*************** c97b36f101808a4d1b88e966d08df228  gcc/te
*** 17573,17579 ****
  2c571572a5d9948808d5c737071aa994  gcc/testsuite/g++.dg/debug/dwarf2/pr80234-1.C
  faf5c36abd2cfa3ad2cff3321cf391cf  gcc/testsuite/g++.dg/debug/dwarf2/pr80234-2.C
  4ee1bfe8771af7455053744f7fbfacc8  gcc/testsuite/g++.dg/debug/dwarf2/pr85302.C
! 5de08163e6802415b19e2d6aeb632428  gcc/testsuite/g++.dg/debug/dwarf2/pr85550.C
  2ccdefbe0960011d93e7b256421df22a  gcc/testsuite/g++.dg/debug/dwarf2/pr86456.C
  d7ed5be36e8ab58d3d73c325b6ec84ab  gcc/testsuite/g++.dg/debug/dwarf2/pr86900.C
  6bacb72669961d72ae42d4e8ef6f3235  gcc/testsuite/g++.dg/debug/dwarf2/pr87295.C
--- 17599,17605 ----
  2c571572a5d9948808d5c737071aa994  gcc/testsuite/g++.dg/debug/dwarf2/pr80234-1.C
  faf5c36abd2cfa3ad2cff3321cf391cf  gcc/testsuite/g++.dg/debug/dwarf2/pr80234-2.C
  4ee1bfe8771af7455053744f7fbfacc8  gcc/testsuite/g++.dg/debug/dwarf2/pr85302.C
! 55c05ba87fa91d96f3105fd4979a0d4d  gcc/testsuite/g++.dg/debug/dwarf2/pr85550.C
  2ccdefbe0960011d93e7b256421df22a  gcc/testsuite/g++.dg/debug/dwarf2/pr86456.C
  d7ed5be36e8ab58d3d73c325b6ec84ab  gcc/testsuite/g++.dg/debug/dwarf2/pr86900.C
  6bacb72669961d72ae42d4e8ef6f3235  gcc/testsuite/g++.dg/debug/dwarf2/pr87295.C
*************** a0ac13a0885ee162c972f58ffbd934e7  gcc/te
*** 17643,17648 ****
--- 17669,17675 ----
  c805656a195d9a98cc7141e7db52d9ef  gcc/testsuite/g++.dg/debug/nullptr01.C
  57e21034689a45ffd010ec86b2596de5  gcc/testsuite/g++.dg/debug/pr106261.C
  19de4ef7373a891f957af0121c166d89  gcc/testsuite/g++.dg/debug/pr108967.C
+ 553e3d84e73e0efbd2c26b6ea6df2a6c  gcc/testsuite/g++.dg/debug/pr110295.C
  fcdc9d29f34ff56d1b7de0d55a1eaed7  gcc/testsuite/g++.dg/debug/pr15736.cc
  d25b84553c2083b28615202497b8f94a  gcc/testsuite/g++.dg/debug/pr16792.C
  91880dfb66fda0db4ddabf486346b755  gcc/testsuite/g++.dg/debug/pr22514.C
*************** f9722392abd0d8da545dd7e9182420ee  gcc/te
*** 17748,17753 ****
--- 17775,17781 ----
  bdbe25cf432b7755bcf34617531e70c9  gcc/testsuite/g++.dg/diagnostic/conflicting-specifiers-1.C
  f7373a71dd891357231338f7279d20ca  gcc/testsuite/g++.dg/diagnostic/constexpr1.C
  13461b7c9b3b8e9d46f44892e6c9d868  gcc/testsuite/g++.dg/diagnostic/constexpr2.C
+ 5f5c4576dd5f9feb1898ccabe6a8ee2b  gcc/testsuite/g++.dg/diagnostic/constexpr4.C
  e824a88234abd039ffea31d13a8e9e42  gcc/testsuite/g++.dg/diagnostic/delete1.C
  4a4ed8a805a81f8726e0ba889c68ff19  gcc/testsuite/g++.dg/diagnostic/disable.C
  526efa2a8771e0409f39701dd3fc5953  gcc/testsuite/g++.dg/diagnostic/duplicate1.C
*************** d38795dc5765c85251d1b51d2837fa65  gcc/te
*** 17953,17959 ****
  9623b61344d258574a3ed60670199161  gcc/testsuite/g++.dg/eh/ref-temp1.C
  edd7f2bf186873e0f253e337b7c0baa7  gcc/testsuite/g++.dg/eh/ref-temp2.C
  a9ed8d0335c982c533cb9ab886ed3a49  gcc/testsuite/g++.dg/eh/registers1.C
! b17a8e37ca2c7024b8fdc3747635ee79  gcc/testsuite/g++.dg/eh/return1.C
  10cee1522872b7a635448041c93abb77  gcc/testsuite/g++.dg/eh/scope1.C
  be5af3c4aa82f74a07dbbdc316e9c02c  gcc/testsuite/g++.dg/eh/seh-xmm-unwind.C
  25142fe6cff6b7d981b3267f13c2b8ab  gcc/testsuite/g++.dg/eh/shadow1.C
--- 17981,17989 ----
  9623b61344d258574a3ed60670199161  gcc/testsuite/g++.dg/eh/ref-temp1.C
  edd7f2bf186873e0f253e337b7c0baa7  gcc/testsuite/g++.dg/eh/ref-temp2.C
  a9ed8d0335c982c533cb9ab886ed3a49  gcc/testsuite/g++.dg/eh/registers1.C
! efe051fbc8c815684c69526732bddef0  gcc/testsuite/g++.dg/eh/return1.C
! 195393f174c1cbb9a64af2efb4ac325f  gcc/testsuite/g++.dg/eh/return2.C
! dc439ae1040bcf10935e1aa092b15f49  gcc/testsuite/g++.dg/eh/return3.C
  10cee1522872b7a635448041c93abb77  gcc/testsuite/g++.dg/eh/scope1.C
  be5af3c4aa82f74a07dbbdc316e9c02c  gcc/testsuite/g++.dg/eh/seh-xmm-unwind.C
  25142fe6cff6b7d981b3267f13c2b8ab  gcc/testsuite/g++.dg/eh/shadow1.C
*************** fd9d6b2aeb10f429dd19c2675cd7ac03  gcc/te
*** 17985,17990 ****
--- 18015,18021 ----
  7549d75346531f9c6ff9ee0763a142b5  gcc/testsuite/g++.dg/eh/throw1.C
  7f4aab5cdb2954060fab6ebdbf157a33  gcc/testsuite/g++.dg/eh/throw2.C
  45cea983dcee48d4c249758ac270c782  gcc/testsuite/g++.dg/eh/throw3.C
+ 2d0c14860f41acf7377cc2d392a448aa  gcc/testsuite/g++.dg/eh/throw4.C
  d949616391e9201fe80327c74d26daf0  gcc/testsuite/g++.dg/eh/uncaught1.C
  0a4a6e449503f9ebd41b838472d08e86  gcc/testsuite/g++.dg/eh/uncaught2.C
  99e4a259aad973b217052ad01fc8c886  gcc/testsuite/g++.dg/eh/uncaught4.C
*************** df4711200e4e7cd7c5366aa4bdd29d74  gcc/te
*** 18314,18319 ****
--- 18345,18351 ----
  5254a238524950c95810e43d56192c6d  gcc/testsuite/g++.dg/ext/attrib62.C
  27519d8ffae247f3603111ebadacea31  gcc/testsuite/g++.dg/ext/attrib63.C
  c992ba90cd524ff973d2e06226c41bfa  gcc/testsuite/g++.dg/ext/attrib64.C
+ 1d6aa4b155d2e2ee76db642f389b5463  gcc/testsuite/g++.dg/ext/attrib68.C
  7af1e9265de26187b4a3a3880f99ac11  gcc/testsuite/g++.dg/ext/attrib7.C
  23c4a640241391acec5a1fd2c3fa5f25  gcc/testsuite/g++.dg/ext/attrib8.C
  db629587302d47a98b453a1702e900c9  gcc/testsuite/g++.dg/ext/attrib9.C
*************** a06d181d1f37ed4bbf17112c988f9608  gcc/te
*** 18550,18555 ****
--- 18582,18588 ----
  9e62aa095a73cd8f1f5e3c31669594cd  gcc/testsuite/g++.dg/ext/fnname3.C
  7201a84abcaa3ac89c91328b3625f57d  gcc/testsuite/g++.dg/ext/fnname4.C
  60898b718df5cec3ef7222e3b1257e0f  gcc/testsuite/g++.dg/ext/fpreg1.C
+ 698921918c46997aacc89312130201d9  gcc/testsuite/g++.dg/ext/frounding-math1.C
  653367c82c3f5a9a42dfc8ce52f23ec3  gcc/testsuite/g++.dg/ext/gnu-inline-anon-namespace.C
  3b39aa1a4010d4127a39b9443b421c4c  gcc/testsuite/g++.dg/ext/gnu-inline-class-static.C
  3e9228fd78fc3a72b584e4e2eaab7d3f  gcc/testsuite/g++.dg/ext/gnu-inline-class.C
*************** f2cf0baaaf489aa15f22210e07d052d1  gcc/te
*** 18596,18601 ****
--- 18629,18636 ----
  3b33306d69b3ca18d4baf8c0846a03a3  gcc/testsuite/g++.dg/ext/int128-4.C
  754d9cd2dfd66632200e26d330e6b4a6  gcc/testsuite/g++.dg/ext/int128-5.C
  77dfa593ec9ad567eab91cd02d57603f  gcc/testsuite/g++.dg/ext/int128-6.C
+ 302484e7798b2a4053ee4acf24bcfa8e  gcc/testsuite/g++.dg/ext/int128-7.C
+ 8a3239fa82cd3fe31a3157e5a8f33832  gcc/testsuite/g++.dg/ext/int128-8.C
  83602db2bd9d77a181d488d81e2441e1  gcc/testsuite/g++.dg/ext/integer-pack1.C
  4443382c2ba1abef21e5ac6b05161a19  gcc/testsuite/g++.dg/ext/integer-pack2.C
  c82a623a667acc283be2af5673150fd6  gcc/testsuite/g++.dg/ext/integer-pack3.C
*************** b579998c84a7b6c9374dbdc81f28e45a  gcc/te
*** 18631,18636 ****
--- 18666,18672 ----
  ed04365b57dec8b58125996aefe86234  gcc/testsuite/g++.dg/ext/is_constructible4.C
  dc3385dfd74c1bf2c03d4da78571f637  gcc/testsuite/g++.dg/ext/is_constructible5.C
  9553e2b6c2e80320fe1dbc53bb218083  gcc/testsuite/g++.dg/ext/is_constructible6.C
+ 0fdc603161df17318d861d136ade90c2  gcc/testsuite/g++.dg/ext/is_constructible8.C
  deb5d60ce9955a69d116b30edd2cf933  gcc/testsuite/g++.dg/ext/is_empty.C
  51590a59aaf8715b9fe4a7ae06414cb8  gcc/testsuite/g++.dg/ext/is_empty2.C
  03f82ac5f5b864878fa0ffa4383fa338  gcc/testsuite/g++.dg/ext/is_enum.C
*************** bcf9b6873e48870b8f6014b5da708cd3  gcc/te
*** 18702,18707 ****
--- 18738,18744 ----
  2e29b33d9b093b6a30a0e49d1b42c6c8  gcc/testsuite/g++.dg/ext/packed7.C
  065cff376c58bb925a16845eb3c01ced  gcc/testsuite/g++.dg/ext/packed8.C
  0932ad5ce3e0455a61e5bd35e5ed587a  gcc/testsuite/g++.dg/ext/packed9.C
+ 219625d5165b1dc19f7c5e8fccd607a5  gcc/testsuite/g++.dg/ext/pr114691.C
  210171cdbd9571de1bfd894e6c809efa  gcc/testsuite/g++.dg/ext/pr17577.C
  d017f3273bbed79c882146d070c763a4  gcc/testsuite/g++.dg/ext/pr17577.h
  eb1830f7b92ca604956f6b57b3a6d3f4  gcc/testsuite/g++.dg/ext/pr27019.C
*************** e3920251c1881f799695cd65335b3cac  gcc/te
*** 18823,18829 ****
--- 18860,18870 ----
  265da9fd5c8f508dc7188b306541554d  gcc/testsuite/g++.dg/ext/unroll-1.C
  a7fce0dd60f863364affd6e56b7f245e  gcc/testsuite/g++.dg/ext/unroll-2.C
  285baa853f6386189859dff27a9a3327  gcc/testsuite/g++.dg/ext/unroll-3.C
+ ab2216d6624316a506938e2c237dbb08  gcc/testsuite/g++.dg/ext/unroll-4.C
+ d9dee27db71952e589ab6eb7dd4553b7  gcc/testsuite/g++.dg/ext/unroll-5.C
  cdf5946e18d62c848aa41c2fbcdc39da  gcc/testsuite/g++.dg/ext/unsigned-typedef1.C
+ 8e3e51531ba90a4fa918eb6f412fea72  gcc/testsuite/g++.dg/ext/unsigned-typedef2.C
+ 225949987017db14946d9308eb334cc7  gcc/testsuite/g++.dg/ext/unsigned-typedef3.C
  28679c5e259c2a169fa3381ab32688b9  gcc/testsuite/g++.dg/ext/uow-1.C
  56fb8e2b89ccd1554be150dc21820262  gcc/testsuite/g++.dg/ext/uow-2.C
  4a9bbd8b307258097b08718cb2af1df3  gcc/testsuite/g++.dg/ext/uow-3.C
*************** a7c093e32d8e0cc08e02c3253748979c  gcc/te
*** 19035,19042 ****
  0db2a2956de58970834889c74f43082d  gcc/testsuite/g++.dg/gcov/gcov-6.C
  6f3a3736784c0de448d6416b0d8f64d8  gcc/testsuite/g++.dg/gcov/gcov-7.C
  35c5d8591ad30e9b50844567554d9973  gcc/testsuite/g++.dg/gcov/gcov-8.C
! 1daf1c411209223b51591e3ac9090bfb  gcc/testsuite/g++.dg/gcov/gcov-dump-1.C
! 7def4ed5b129018a31fbca4ad8fd6300  gcc/testsuite/g++.dg/gcov/gcov-dump-2.C
  10bbabd8392ab7ee5799bc6a14018686  gcc/testsuite/g++.dg/gcov/gcov-threads-1.C
  534f2451d78aee913c70b855701cd584  gcc/testsuite/g++.dg/gcov/gcov.exp
  6a2ed5ca795d47c333efae7c155c43b1  gcc/testsuite/g++.dg/gcov/gcov.py
--- 19076,19083 ----
  0db2a2956de58970834889c74f43082d  gcc/testsuite/g++.dg/gcov/gcov-6.C
  6f3a3736784c0de448d6416b0d8f64d8  gcc/testsuite/g++.dg/gcov/gcov-7.C
  35c5d8591ad30e9b50844567554d9973  gcc/testsuite/g++.dg/gcov/gcov-8.C
! e60d3e80695d06d312beddeaaaa4af1d  gcc/testsuite/g++.dg/gcov/gcov-dump-1.C
! 8d7f3725599edc040c38551cce2d1dfb  gcc/testsuite/g++.dg/gcov/gcov-dump-2.C
  10bbabd8392ab7ee5799bc6a14018686  gcc/testsuite/g++.dg/gcov/gcov-threads-1.C
  534f2451d78aee913c70b855701cd584  gcc/testsuite/g++.dg/gcov/gcov.exp
  6a2ed5ca795d47c333efae7c155c43b1  gcc/testsuite/g++.dg/gcov/gcov.py
*************** ef95eb29955e54a2310be36a0828b0cb  gcc/te
*** 19804,19809 ****
--- 19845,19851 ----
  49c02c7ea8ff817fb850567f5e9bb9d8  gcc/testsuite/g++.dg/init/pm2.C
  b8f980c062ec4b3f73dffbda8276ec70  gcc/testsuite/g++.dg/init/pm3.C
  19c721af2055386319b10ee94a3d6a81  gcc/testsuite/g++.dg/init/pmf1.C
+ 91d369cb8fa2537b5ee2460137be8748  gcc/testsuite/g++.dg/init/pr109868.C
  aa579892dca36d8b110a8b13f1664a4a  gcc/testsuite/g++.dg/init/pr20039.C
  769411a1c7958778a3d38ee85b470169  gcc/testsuite/g++.dg/init/pr25811-3.C
  677f7b38b3959f7edf25e66789e0a86a  gcc/testsuite/g++.dg/init/pr25811-4.C
*************** d0415e5d5ed79c73a04e7df5551e4b95  gcc/te
*** 20012,20017 ****
--- 20054,20060 ----
  ecfa94e705bc436ad699767b1e4c929e  gcc/testsuite/g++.dg/ipa/polymorphic-call-1.C
  55ee7bff7cc115f42266bd1d62dda46b  gcc/testsuite/g++.dg/ipa/pr100413.C
  901698e6dabf29dd6ced031811fcf59e  gcc/testsuite/g++.dg/ipa/pr103099.C
+ e66c84f48f938ed2bb548ce51957afce  gcc/testsuite/g++.dg/ipa/pr113757.C
  02f3704c0511b2d171c55dbf09c64325  gcc/testsuite/g++.dg/ipa/pr43695.C
  5345293723ad062b59b168c319738e1e  gcc/testsuite/g++.dg/ipa/pr43812.C
  b001cbe3dfdeb7d2a1061f024aa08ea4  gcc/testsuite/g++.dg/ipa/pr44372.C
*************** b5ea3678b95f88606bb0d37ee1f58a68  gcc/te
*** 21963,21968 ****
--- 22006,22012 ----
  360692bdb55de35cb68717ceb6c51fd7  gcc/testsuite/g++.dg/opt/nrv2.C
  b95995f2a1b93421818fb349cdf03d17  gcc/testsuite/g++.dg/opt/nrv20.C
  815c4f8d7b5dba8a23289fdf4b87b3c5  gcc/testsuite/g++.dg/opt/nrv21.C
+ 936df169dd4333b7cef52b2f3f90736e  gcc/testsuite/g++.dg/opt/nrv22.C
  42adcc800d5d2029a2b831e1453e8f32  gcc/testsuite/g++.dg/opt/nrv3.C
  b2773b15109a2fc43572a97edf29b236  gcc/testsuite/g++.dg/opt/nrv4.C
  13481653ab41a707cb4c4eed2199c57f  gcc/testsuite/g++.dg/opt/nrv5.C
*************** bad9496f071793031ea4ab93b911a483  gcc/te
*** 21996,22001 ****
--- 22040,22046 ----
  0fd8014a8bf41063904c9006c6d3f334  gcc/testsuite/g++.dg/opt/pr108365.C
  2613159e61afceaa9e7ace58beef53f4  gcc/testsuite/g++.dg/opt/pr108854.C
  fc956d5d39ddca9870d1a2fca7df287d  gcc/testsuite/g++.dg/opt/pr109434.C
+ b8fef9a1bd09e90415f3e35f5466c85c  gcc/testsuite/g++.dg/opt/pr110515.C
  2896f5b1a96dd9fabb1dbb65cb4c5921  gcc/testsuite/g++.dg/opt/pr13066-1.C
  4f87f86b9f018cae74888e97468b2fe0  gcc/testsuite/g++.dg/opt/pr14029.C
  8fb7e68e9e9b5eb02628e03f5333e645  gcc/testsuite/g++.dg/opt/pr14888.C
*************** d9064b328bf2156a9e67df26156ec572  gcc/te
*** 23352,23357 ****
--- 23397,23407 ----
  d41d8cd98f00b204e9800998ecf8427e  gcc/testsuite/g++.dg/pch/empty.Hs
  0fe6f1480902d6dccb349304faa9020c  gcc/testsuite/g++.dg/pch/externc-1.C
  51038396a6c08ae383fd050b30653dab  gcc/testsuite/g++.dg/pch/externc-1.Hs
+ 5be7746567e234436e429f155b44a81c  gcc/testsuite/g++.dg/pch/line-map-1.C
+ 29dd06c9a93f1d28d7d1b11b164a7efe  gcc/testsuite/g++.dg/pch/line-map-1.Hs
+ 2c0817d088bccb3d2e72fe1a30899a59  gcc/testsuite/g++.dg/pch/line-map-2.C
+ 29dd06c9a93f1d28d7d1b11b164a7efe  gcc/testsuite/g++.dg/pch/line-map-2.Hs
+ 29dd06c9a93f1d28d7d1b11b164a7efe  gcc/testsuite/g++.dg/pch/line-map-3.Hs
  3456d98b10198c0bf9091088ba05d0f0  gcc/testsuite/g++.dg/pch/local-1.C
  1b5d28bf11bae4996001396e1ffe083b  gcc/testsuite/g++.dg/pch/local-1.Hs
  f9271dce9d7980fa8b426246ec2b9126  gcc/testsuite/g++.dg/pch/operator-1.C
*************** f8b96612d216a7b190f337247c8e8315  gcc/te
*** 24393,24398 ****
--- 24443,24449 ----
  e99bfe98523cadafac68ba8e9e8c8f35  gcc/testsuite/g++.dg/template/friend72a.C
  76ebd5e11a16898d1bdf51f8b1f76449  gcc/testsuite/g++.dg/template/friend73.C
  08aeef7e95f0f822e6e8b78c88d9bbb7  gcc/testsuite/g++.dg/template/friend74.C
+ 5ded44dad812054a2b06422df4b95665  gcc/testsuite/g++.dg/template/friend78.C
  ceb858e95982ac0af2e9168f31aea229  gcc/testsuite/g++.dg/template/friend8.C
  59b5bf61b7f6210d3cf3b9b45692794a  gcc/testsuite/g++.dg/template/friend9.C
  d5d24fc94d133229a10c5b13f44c253b  gcc/testsuite/g++.dg/template/func1.C
*************** e93f073f61a42e3c7ad372625dbf5491  gcc/te
*** 25050,25055 ****
--- 25101,25107 ----
  8fa3e6c96fba6376bb082c7c80573236  gcc/testsuite/g++.dg/template/template-keyword1.C
  ce80dbc40069cd081d8488c206d6b2a6  gcc/testsuite/g++.dg/template/template-keyword2.C
  7a5cfa5591c26dfb9185c5152c9bc9b0  gcc/testsuite/g++.dg/template/template-keyword3.C
+ 36a70397cd191de4eab2d5c0cd223bb2  gcc/testsuite/g++.dg/template/template-keyword4.C
  2633475e196e36c058cf618a862c925f  gcc/testsuite/g++.dg/template/this-targ1.C
  f9dface1543c62e1ed5a293679ac47da  gcc/testsuite/g++.dg/template/ttp-derived1.C
  d295175d2a75128bac0554e17b63735a  gcc/testsuite/g++.dg/template/ttp-derived2.C
*************** e0f2cfb1a1f922a19280efa88e1e5f1c  gcc/te
*** 25440,25448 ****
  55421b614773ff9e900b6ad17ffe7df3  gcc/testsuite/g++.dg/torture/pr105189.C
  2f5be7c92fa23dea959ab17d5b766c87  gcc/testsuite/g++.dg/torture/pr105577.C
  42b175a7c38d6a15012b0e11d9e7457d  gcc/testsuite/g++.dg/torture/pr106131.C
! fc3fe3397beb9b946ff024ad76a8ccbc  gcc/testsuite/g++.dg/torture/pr106922.C
  fa23934e49741783f674026ff5030aff  gcc/testsuite/g++.dg/torture/pr108166.C
  695916482bd1d276cc3c727b90232254  gcc/testsuite/g++.dg/torture/pr109724.C
  161154ed9f6193a2a7da119e068c3f3f  gcc/testsuite/g++.dg/torture/pr27218.C
  a84e9fff95df4801f8e582fbc33303b8  gcc/testsuite/g++.dg/torture/pr30252.C
  e980bf95890544d46879b89f7aa98df6  gcc/testsuite/g++.dg/torture/pr30567.C
--- 25492,25502 ----
  55421b614773ff9e900b6ad17ffe7df3  gcc/testsuite/g++.dg/torture/pr105189.C
  2f5be7c92fa23dea959ab17d5b766c87  gcc/testsuite/g++.dg/torture/pr105577.C
  42b175a7c38d6a15012b0e11d9e7457d  gcc/testsuite/g++.dg/torture/pr106131.C
! 1228ad580702a357697ae9eabad4f2be  gcc/testsuite/g++.dg/torture/pr106922.C
  fa23934e49741783f674026ff5030aff  gcc/testsuite/g++.dg/torture/pr108166.C
  695916482bd1d276cc3c727b90232254  gcc/testsuite/g++.dg/torture/pr109724.C
+ 4b7c75dc51b97d5dc81c7e936ff3b460  gcc/testsuite/g++.dg/torture/pr111019.C
+ f5cb8caa482838045861d5ee18445814  gcc/testsuite/g++.dg/torture/pr113896.C
  161154ed9f6193a2a7da119e068c3f3f  gcc/testsuite/g++.dg/torture/pr27218.C
  a84e9fff95df4801f8e582fbc33303b8  gcc/testsuite/g++.dg/torture/pr30252.C
  e980bf95890544d46879b89f7aa98df6  gcc/testsuite/g++.dg/torture/pr30567.C
*************** d53f4a36bfd00298b6b687881aad6861  gcc/te
*** 25898,25903 ****
--- 25952,25959 ----
  5afe578074ff640a77903318faea8e72  gcc/testsuite/g++.dg/torture/str_empty.C
  42e128b3145495bd2df35c3cdcc684ac  gcc/testsuite/g++.dg/torture/tail-padding1.C
  0b01f7feb325a8c1dfd3c796eab53860  gcc/testsuite/g++.dg/torture/type-generic-1.C
+ ed87f64357e7fd49760145e5c345491d  gcc/testsuite/g++.dg/torture/vector-struct-1.C
+ 451c0082f351cdec594741735d086495  gcc/testsuite/g++.dg/torture/vector-subaccess-1.C
  164b3eb60b0c717428d0673a23922dfc  gcc/testsuite/g++.dg/torture/vshuf-16.inc
  8fd97d6fa085ab3269af65b200d61e8e  gcc/testsuite/g++.dg/torture/vshuf-2.inc
  b2babbab3621a6f7af5eb2dde02e14e8  gcc/testsuite/g++.dg/torture/vshuf-4.inc
*************** bb3b906322f73b1bfddaab3658a0314e  gcc/te
*** 26334,26339 ****
--- 26390,26396 ----
  6a3f27d6cc59523d994a5f1a6e68286a  gcc/testsuite/g++.dg/vect/pr106841.cc
  68c0b9dd93bac5121c5b637904764ca8  gcc/testsuite/g++.dg/vect/pr107766.cc
  c378ba928bee729112b705d875e7738f  gcc/testsuite/g++.dg/vect/pr109573.cc
+ a774f9ba94df372c6d30a93f182668b8  gcc/testsuite/g++.dg/vect/pr112793.cc
  02ab0e7dea4c30ddeaecb971c0b8241e  gcc/testsuite/g++.dg/vect/pr19951.cc
  e7c5a636a280962b70166d1494223f9c  gcc/testsuite/g++.dg/vect/pr21218.cc
  9a0a6f56bdb2cc697abc78c901418a19  gcc/testsuite/g++.dg/vect/pr21734_1.cc
*************** da3dbc8526151b41f4a741a5d5e51eae  gcc/te
*** 26618,26623 ****
--- 26675,26681 ----
  f53b1f90733acd430c8cdf6142c6d0ae  gcc/testsuite/g++.dg/warn/Wmismatched-new-delete-5.C
  8afe47a7579150c18e697be841db6df5  gcc/testsuite/g++.dg/warn/Wmismatched-new-delete-6.C
  c6df77cbbce60aad70c6bc987ecd4bd2  gcc/testsuite/g++.dg/warn/Wmismatched-new-delete-7.C
+ 42429ebb9efa51a442c7b9c8a566923a  gcc/testsuite/g++.dg/warn/Wmismatched-new-delete-8.C
  3089b7e4a074a4993652acd742390397  gcc/testsuite/g++.dg/warn/Wmismatched-new-delete.C
  7729ea0086a47fb6cab7bd9640283fcd  gcc/testsuite/g++.dg/warn/Wmismatched-tags-10.C
  67285d97432f227bc5e4c7e66666868f  gcc/testsuite/g++.dg/warn/Wmismatched-tags-11.C
*************** d53cb2073c8f36697f63dfe19779eb13  gcc/te
*** 30517,30522 ****
--- 30575,30583 ----
  0c1003d602150141b4f4705044d2624f  gcc/testsuite/g++.old-deja/g++.warn/virt1.C
  ffa93750b4f76bf897309b5d9b1f635e  gcc/testsuite/g++.old-deja/old-deja.exp
  fc2548fe3f5c4917ea6f09e32422f740  gcc/testsuite/g++.target/aarch64/aarch64.exp
+ 28dd3cee57c2dbcd3af80dd5c01286d8  gcc/testsuite/g++.target/aarch64/acle/acle.exp
+ 0c47cb2c5527e312fc7aa61cb990aca3  gcc/testsuite/g++.target/aarch64/acle/ls64.C
+ 74ed4871401ccfa96602343217748d58  gcc/testsuite/g++.target/aarch64/acle/ls64_lto.C
  2daf84a2bbcebee0fcf0559817712401  gcc/testsuite/g++.target/aarch64/advsimd-intrinsics/advsimd-intrinsics.exp
  992600153061bcf9c4f34a765c2c8f7e  gcc/testsuite/g++.target/aarch64/advsimd-intrinsics/pr98852.C
  ebce94697839c9a076df3569eade77eb  gcc/testsuite/g++.target/aarch64/bfloat_cpp_typecheck.C
*************** c11e5f97e7a5971cc5c5017024f54496  gcc/te
*** 30531,30537 ****
  4d5fd415b9746bcd53f093e8282fb37d  gcc/testsuite/g++.target/aarch64/no_unique_address_1.C
  20b857cf626aad749264f74e19d94347  gcc/testsuite/g++.target/aarch64/no_unique_address_2.C
  ff91378a7ee794cf81b35b9b219bd4b2  gcc/testsuite/g++.target/aarch64/pr103147-1.C
! b15b5a75c4e74aa074353168cf929941  gcc/testsuite/g++.target/aarch64/pr103147-10.C
  51603f65ccab9c1ede5d7110a43c75a1  gcc/testsuite/g++.target/aarch64/pr103147-2.C
  846f32ec61a2c44d9395459e726dc310  gcc/testsuite/g++.target/aarch64/pr103147-3.C
  b45179fb4c2cb954cc481e0a385817d5  gcc/testsuite/g++.target/aarch64/pr103147-4.C
--- 30592,30598 ----
  4d5fd415b9746bcd53f093e8282fb37d  gcc/testsuite/g++.target/aarch64/no_unique_address_1.C
  20b857cf626aad749264f74e19d94347  gcc/testsuite/g++.target/aarch64/no_unique_address_2.C
  ff91378a7ee794cf81b35b9b219bd4b2  gcc/testsuite/g++.target/aarch64/pr103147-1.C
! 54fdce2e7bb47f6289f5740bd0eadf0c  gcc/testsuite/g++.target/aarch64/pr103147-10.C
  51603f65ccab9c1ede5d7110a43c75a1  gcc/testsuite/g++.target/aarch64/pr103147-2.C
  846f32ec61a2c44d9395459e726dc310  gcc/testsuite/g++.target/aarch64/pr103147-3.C
  b45179fb4c2cb954cc481e0a385817d5  gcc/testsuite/g++.target/aarch64/pr103147-4.C
*************** b745a307c6018d88262928962e2684e9  gcc/te
*** 30828,30833 ****
--- 30889,30897 ----
  e10a0652aff7df3b5d31aabc5b83fc4e  gcc/testsuite/g++.target/i386/pr106875.C
  591a879661c63273581e832f22c0f96e  gcc/testsuite/g++.target/i386/pr107404.C
  198bde5a37731f00084d791cde389e8b  gcc/testsuite/g++.target/i386/pr108934.C
+ 7086db1987eae6c4b80f5ef0dbadd48f  gcc/testsuite/g++.target/i386/pr111497.C
+ 51556317586878910157bab09d18703d  gcc/testsuite/g++.target/i386/pr111822.C
+ f0bd5d5c6a67d4e72ffa0abde025c525  gcc/testsuite/g++.target/i386/pr112443.C
  55fb67abf6517f92b1a0240d2c06b5c5  gcc/testsuite/g++.target/i386/pr35513-1.C
  14dde546e4eefec7aa6d1ac41261cb16  gcc/testsuite/g++.target/i386/pr35513-2.C
  1c706f97b6d93c0124dc4a203c98f6d2  gcc/testsuite/g++.target/i386/pr57362.C
*************** a621b799eff193996043d9d5462e5c27  gcc/te
*** 30872,30877 ****
--- 30936,30942 ----
  821d1f6cc7812ffc5220fc45c484c00f  gcc/testsuite/g++.target/i386/sse4_1-pr54700-1.C
  05e47f652ea4bc7c8df9bae20aaaa2b4  gcc/testsuite/g++.target/i386/sse4_1-pr54700-2.C
  6d0d9132ecd5c558bd1ec20dcee32d5d  gcc/testsuite/g++.target/i386/vec-tmpl1.C
+ 8df5f1183de744dc2a3a0c11278caec6  gcc/testsuite/g++.target/loongarch/atomic-cas-int.C
  83617f6ce4e2c1f57ea571b083200a12  gcc/testsuite/g++.target/loongarch/loongarch.exp
  3e379ce66f2b5fd83481c50aad661033  gcc/testsuite/g++.target/loongarch/pr106096.C
  0326a0afb833c5dbd49b5d623c8dd93b  gcc/testsuite/g++.target/mips/cxx17_empty_base.C
*************** bd1c35be302338df14b1aa330813797d  gcc/te
*** 30914,30920 ****
--- 30979,30991 ----
  bafc15005abdfe9131f6074efde175eb  gcc/testsuite/g++.target/powerpc/ppc64-sighandle-cr.C
  a873678a5188427c7ceb88e3a408ce84  gcc/testsuite/g++.target/powerpc/pr101322.C
  bac7601eaf931ebd7c595a2dc9672d64  gcc/testsuite/g++.target/powerpc/pr102024.C
+ 52ec25547d922533a11b2b87bda1ef47  gcc/testsuite/g++.target/powerpc/pr105325.C
  a786ad78bd3d3301483d3f57c15f4634  gcc/testsuite/g++.target/powerpc/pr105485.C
+ ea50428d09d0e781698b21023398bfee  gcc/testsuite/g++.target/powerpc/pr110741.C
+ 8ca0dcb511ad4423506f8f334a6092e7  gcc/testsuite/g++.target/powerpc/pr111366.C
+ 92cbd869a66e265db57a505d568038a0  gcc/testsuite/g++.target/powerpc/pr111367.C
+ d2c732bc509e2385a06f111c954c2700  gcc/testsuite/g++.target/powerpc/pr111828-1.C
+ d573b767c2de9d8c280bc5d867cf8c50  gcc/testsuite/g++.target/powerpc/pr111828-2.C
  63b698681e4a076eb88feccb3e6373df  gcc/testsuite/g++.target/powerpc/pr94707-1.C
  75c93ba90b3ca18a6d5c5264e2816651  gcc/testsuite/g++.target/powerpc/pr94707-2.C
  a63f2ade84bc38838f3986dfc4bc9d85  gcc/testsuite/g++.target/powerpc/pr94707-3.C
*************** cbe67a4212b7d85b023f62848033fa31  gcc/te
*** 31742,31747 ****
--- 31813,31819 ----
  1dc09506975eee8e6b4451c77c2ca0f5  gcc/testsuite/gcc.c-torture/compile/asmgoto-3.c
  44775d2c2c8031eaffd51797729f6b78  gcc/testsuite/gcc.c-torture/compile/asmgoto-4.c
  22f5be5aa586df70b0fd5248cd64def3  gcc/testsuite/gcc.c-torture/compile/asmgoto-5.c
+ 5d46a165536b8d97de34952d9345173a  gcc/testsuite/gcc.c-torture/compile/asmgoto-6.c
  d8d6d3a3bdc75e33ad9224aa3ca20839  gcc/testsuite/gcc.c-torture/compile/attr-complex-method-2.c
  6cceb06a530ca6cf611287cae72b0437  gcc/testsuite/gcc.c-torture/compile/attr-complex-method.c
  518904c535699cbcecc96482c0284cbe  gcc/testsuite/gcc.c-torture/compile/attr-retain-1.c
*************** e12df015117953bcc79bb2bd0912de65  gcc/te
*** 31998,32003 ****
--- 32070,32082 ----
  e1a987965f844354ef93e18f546749c9  gcc/testsuite/gcc.c-torture/compile/pr108237.c
  9c6d8cdc69d8f80df1390e153dd3fffc  gcc/testsuite/gcc.c-torture/compile/pr108596.c
  531e04fb4e7100e6b28bab7727b5ce6b  gcc/testsuite/gcc.c-torture/compile/pr108688-1.c
+ bbe3ff8274dae6d3f21cbdb4fa780c91  gcc/testsuite/gcc.c-torture/compile/pr110386-1.c
+ aac64916588db7f60e87baab1268b8e2  gcc/testsuite/gcc.c-torture/compile/pr110386-2.c
+ ca66c7f74573d2e86d4d649aa258e0e5  gcc/testsuite/gcc.c-torture/compile/pr111699-1.c
+ 597d2b1dda1b08561fbe83f15c76f510  gcc/testsuite/gcc.c-torture/compile/pr113603.c
+ cddb5f327c3c1dc3f843d95d86f7f6a9  gcc/testsuite/gcc.c-torture/compile/pr115143-1.c
+ ece87744c4e664bf39922d9937465df1  gcc/testsuite/gcc.c-torture/compile/pr115143-2.c
+ 14405634ff4726e79f727af592887eec  gcc/testsuite/gcc.c-torture/compile/pr115143-3.c
  33c7141fcf5b1add3ddd2be0100f1f0d  gcc/testsuite/gcc.c-torture/compile/pr12517.c
  ec16b12ab11c499bf321be18ea59da33  gcc/testsuite/gcc.c-torture/compile/pr12578.c
  86f3d5cf87d24e97aa663b79f2d0ac5d  gcc/testsuite/gcc.c-torture/compile/pr12899.c
*************** ecbbfd4b186a0dd8448d96f39a543fb4  gcc/te
*** 33341,33346 ****
--- 33420,33429 ----
  8476af17c3a5d7a639fdbdcad1641482  gcc/testsuite/gcc.c-torture/execute/20190901-1.c
  2e368329bfad3d99e406eade7d55032d  gcc/testsuite/gcc.c-torture/execute/20191023-1.c
  b4ae081235a5dc1e90b1adea7befe6cf  gcc/testsuite/gcc.c-torture/execute/20210505-1.c
+ c152b22273bc18a4c77712056ad155b2  gcc/testsuite/gcc.c-torture/execute/20230630-1.c
+ 7b2e318b0268b72be90a65cf76db847a  gcc/testsuite/gcc.c-torture/execute/20230630-2.c
+ 4a01ae6027e3e54850f1b7a4cfd9e943  gcc/testsuite/gcc.c-torture/execute/20230630-3.c
+ 88c62fc9ed04e0f727eb572abcccb0d2  gcc/testsuite/gcc.c-torture/execute/20230630-4.c
  65f01ac7346bd4d47ed9c1ca94ab74ff  gcc/testsuite/gcc.c-torture/execute/900409-1.c
  5aefab4daab0bd29ecf2a389f3c44f40  gcc/testsuite/gcc.c-torture/execute/920202-1.c
  74e2b57e4fb280900b2f9b169dd75b1c  gcc/testsuite/gcc.c-torture/execute/920302-1.c
*************** eda9698796bef969bb50e5712208e61b  gcc/te
*** 34053,34058 ****
--- 34136,34150 ----
  648140ac374da564be1d5bcfdb9f6512  gcc/testsuite/gcc.c-torture/execute/pr106523.c
  154a19663c66fcea6a49b6718c685882  gcc/testsuite/gcc.c-torture/execute/pr108498-1.c
  ee35df6bcc12c95f226b88f0d72b377d  gcc/testsuite/gcc.c-torture/execute/pr108498-2.c
+ 51a0035891ee3cb8a4d201e8c3d3f1ed  gcc/testsuite/gcc.c-torture/execute/pr108789.c
+ 23cbbe0d93f89048f8d1ce1883e61ac2  gcc/testsuite/gcc.c-torture/execute/pr109778.c
+ 656d590b25f1c491ea39b7de2cc2a90c  gcc/testsuite/gcc.c-torture/execute/pr110115.c
+ 914ecbceb55b6e48b491757423749cee  gcc/testsuite/gcc.c-torture/execute/pr110914.c
+ 99085a983bbf5c20a4f1986daa3cad4e  gcc/testsuite/gcc.c-torture/execute/pr111331-1.c
+ db337c00bedfc272ed5edbb6acffed7c  gcc/testsuite/gcc.c-torture/execute/pr111331-2.c
+ e7bc1f52654c430d9ceb1acb868fbc20  gcc/testsuite/gcc.c-torture/execute/pr111331-3.c
+ eefdaed8e6e57c688553667e395d78d3  gcc/testsuite/gcc.c-torture/execute/pr111408.c
+ 9db3e649786fc47229bef9b14997489f  gcc/testsuite/gcc.c-torture/execute/pr111422.c
  7758cb727d75f4fc1c0e483d503de146  gcc/testsuite/gcc.c-torture/execute/pr15262-1.c
  58dc249612dbc918d7fc4010e94deb8d  gcc/testsuite/gcc.c-torture/execute/pr15262-2.c
  d9c36fc850771445c5e4b6ce6dae1a12  gcc/testsuite/gcc.c-torture/execute/pr15262.c
*************** fe9cbf88b57bdd9a5bf9c526284225f4  gcc/te
*** 34552,34557 ****
--- 34644,34650 ----
  4165667509c1985c02a5caebd101614d  gcc/testsuite/gcc.c-torture/execute/pr89826.c
  53efe1f200d3bec24ed00c280584deca  gcc/testsuite/gcc.c-torture/execute/pr90025.c
  d26cfc42f19ac5e3ce4db452fd94f09a  gcc/testsuite/gcc.c-torture/execute/pr90311.c
+ c711c1278b03225361adbb5c537e298a  gcc/testsuite/gcc.c-torture/execute/pr90348.c
  5235b3e2d6dd776b53d6a44ba5933a8a  gcc/testsuite/gcc.c-torture/execute/pr90949.c
  7f239d011b9e98943acdc8e3437ed19c  gcc/testsuite/gcc.c-torture/execute/pr91137.c
  3d5a788c848a67ade7bd18ab62494a1a  gcc/testsuite/gcc.c-torture/execute/pr91450-1.c
*************** e273443a6f4eccf5890b6c4d46998324  gcc/te
*** 35217,35222 ****
--- 35310,35316 ----
  1f871dc63d9bfee79601f4586343f709  gcc/testsuite/gcc.dg/Wfree-nonheap-object-4.c
  469e7b8c90d9b200ae40cccf77711ce5  gcc/testsuite/gcc.dg/Wfree-nonheap-object-5.c
  c19a454bcf29265915e365069507e42a  gcc/testsuite/gcc.dg/Wfree-nonheap-object-6.c
+ 21ef9c0c9671240c9210998eee95b1d8  gcc/testsuite/gcc.dg/Wfree-nonheap-object-7.c
  0e3385327ea6f047857fb850694856e1  gcc/testsuite/gcc.dg/Wfree-nonheap-object.c
  cb738b6ee3ce33cfd417ae097ee81f56  gcc/testsuite/gcc.dg/Wimplicit-fallthrough-1.c
  ae92a1d93725fe1a5989579c55f7c873  gcc/testsuite/gcc.dg/Wimplicit-function-declaration-c89-default.c
*************** f77fcc9ffd92ab717a2d6107303723f5  gcc/te
*** 35637,35643 ****
  6f13c48d287fe59d52b17e51ccd6fca9  gcc/testsuite/gcc.dg/analyzer/analyzer-verbosity-2a.c
  91071d4bdc9f508d03823383cfe8302a  gcc/testsuite/gcc.dg/analyzer/analyzer-verbosity-3.c
  ddd318f0d7ec18cf56dba10884be8c19  gcc/testsuite/gcc.dg/analyzer/analyzer-verbosity-3a.c
! f0abf39d853f4de954184bd7ca42952a  gcc/testsuite/gcc.dg/analyzer/analyzer.exp
  fc965261104eb781f63faa0fe5a3d7b1  gcc/testsuite/gcc.dg/analyzer/asm-x86-1.c
  7145b6f3637a739ae894c4e1ebe7ee08  gcc/testsuite/gcc.dg/analyzer/asm-x86-dyndbg-1.c
  2d9b7a44f7c158100d74ae0014a15577  gcc/testsuite/gcc.dg/analyzer/asm-x86-dyndbg-2.c
--- 35731,35737 ----
  6f13c48d287fe59d52b17e51ccd6fca9  gcc/testsuite/gcc.dg/analyzer/analyzer-verbosity-2a.c
  91071d4bdc9f508d03823383cfe8302a  gcc/testsuite/gcc.dg/analyzer/analyzer-verbosity-3.c
  ddd318f0d7ec18cf56dba10884be8c19  gcc/testsuite/gcc.dg/analyzer/analyzer-verbosity-3a.c
! 0a3e7924113107d952fa875582ced99b  gcc/testsuite/gcc.dg/analyzer/analyzer.exp
  fc965261104eb781f63faa0fe5a3d7b1  gcc/testsuite/gcc.dg/analyzer/asm-x86-1.c
  7145b6f3637a739ae894c4e1ebe7ee08  gcc/testsuite/gcc.dg/analyzer/asm-x86-dyndbg-1.c
  2d9b7a44f7c158100d74ae0014a15577  gcc/testsuite/gcc.dg/analyzer/asm-x86-dyndbg-2.c
*************** b8a049317908d7e0078316ad82437346  gcc/te
*** 36217,36222 ****
--- 36311,36319 ----
  fa23f58fca5e1980d38cd26b6e3e332a  gcc/testsuite/gcc.dg/asan/pr105714.c
  1a25dd9cb28d8417a3ce246587233c84  gcc/testsuite/gcc.dg/asan/pr106190.c
  c3b533151735c602f99cd3d2cb415cf8  gcc/testsuite/gcc.dg/asan/pr107317.c
+ ea1638a3bd1b7f87abc2eda6d730213e  gcc/testsuite/gcc.dg/asan/pr110027.c
+ 335e527788f5fd39d280e244ac17b3ef  gcc/testsuite/gcc.dg/asan/pr114956.c
+ 7945c329a8682648ec766560d0d91934  gcc/testsuite/gcc.dg/asan/pr115172.c
  a5e988481cd66b8acf6c610b847cb713  gcc/testsuite/gcc.dg/asan/pr56417.c
  0c13e4008bb665f05b030eb42e43183f  gcc/testsuite/gcc.dg/asan/pr63845.c
  9a45b4bebab3901180dbe2a44efcd070  gcc/testsuite/gcc.dg/asan/pr64170.c
*************** d8fec2fce7b0346ffeb1fbb2bd55d7e5  gcc/te
*** 36914,36919 ****
--- 37011,37017 ----
  3dbfc6cb7eab32d45526a6c027b7c7a2  gcc/testsuite/gcc.dg/c17-version-2.c
  aeb16ae2682d8d01a1d6120c9de5edfd  gcc/testsuite/gcc.dg/c18-version-1.c
  cd00c6feebac836c0ec488202c21d6a7  gcc/testsuite/gcc.dg/c18-version-2.c
+ 1f0cc4ddd44ec4024c75890aef2076e2  gcc/testsuite/gcc.dg/c23-attr-syntax-8.c
  1a6078af67236639a20541935b9c1759  gcc/testsuite/gcc.dg/c2x-attr-deprecated-1.c
  a94bb301958b9a62e50e21c069442512  gcc/testsuite/gcc.dg/c2x-attr-deprecated-2.c
  ec4ce1d7cd47b2d554a69b72933ba06b  gcc/testsuite/gcc.dg/c2x-attr-deprecated-3.c
*************** c4152191bf290926b6b747aa4397e015  gcc/te
*** 38146,38152 ****
  4b9fbc9c27c43751e8b7c93a99afaabc  gcc/testsuite/gcc.dg/darwin-comm-1.c
  7e6cf48347ff53c1f9c509b921aceb22  gcc/testsuite/gcc.dg/darwin-comm.c
  b477cca030ba86435b074a334ee9bfd0  gcc/testsuite/gcc.dg/darwin-ld-1.c
! 4ac76811f1a6c80f6dc5191396c37748  gcc/testsuite/gcc.dg/darwin-ld-2.c
  9fa876cce008f5a8d26340933a0e3295  gcc/testsuite/gcc.dg/darwin-ld-20040809-1.c
  e62d76045ed903e34f34747bee80da98  gcc/testsuite/gcc.dg/darwin-ld-20040809-2.c
  37137f00ef98856229916ab1efa4960c  gcc/testsuite/gcc.dg/darwin-ld-20040828-1.c
--- 38244,38250 ----
  4b9fbc9c27c43751e8b7c93a99afaabc  gcc/testsuite/gcc.dg/darwin-comm-1.c
  7e6cf48347ff53c1f9c509b921aceb22  gcc/testsuite/gcc.dg/darwin-comm.c
  b477cca030ba86435b074a334ee9bfd0  gcc/testsuite/gcc.dg/darwin-ld-1.c
! 2bf757e63fd40f62dbd7f7ae31ebbf00  gcc/testsuite/gcc.dg/darwin-ld-2.c
  9fa876cce008f5a8d26340933a0e3295  gcc/testsuite/gcc.dg/darwin-ld-20040809-1.c
  e62d76045ed903e34f34747bee80da98  gcc/testsuite/gcc.dg/darwin-ld-20040809-2.c
  37137f00ef98856229916ab1efa4960c  gcc/testsuite/gcc.dg/darwin-ld-20040828-1.c
*************** ee94511375797117140ca777fd1695b1  gcc/te
*** 38167,38175 ****
  704c9a2dca0a451cca6e5855f7f2347f  gcc/testsuite/gcc.dg/darwin-minversion-7.c
  5a8b775f8ce1e0cafb8782fbc39b58e4  gcc/testsuite/gcc.dg/darwin-minversion-8.c
  aa9dfa39c42ef65a88c0a708412fb842  gcc/testsuite/gcc.dg/darwin-minversion-9.c
! 9dbaa15e2b1a56ec7afc29c9929eedab  gcc/testsuite/gcc.dg/darwin-minversion-link.c
  b66bb093837bda7692b73c8aa9711e00  gcc/testsuite/gcc.dg/darwin-sections.c
! 3cfa6daebed9a12884613012f50433e4  gcc/testsuite/gcc.dg/darwin-segaddr.c
  e3d2d2840d7d23dee7e2cd94e097a114  gcc/testsuite/gcc.dg/darwin-version-1.c
  9145b589b54240035dacb7540309d62e  gcc/testsuite/gcc.dg/darwin-weakimport-1.c
  bda7de2e2fd6472aa3ffe7873407e58d  gcc/testsuite/gcc.dg/darwin-weakimport-2.c
--- 38265,38273 ----
  704c9a2dca0a451cca6e5855f7f2347f  gcc/testsuite/gcc.dg/darwin-minversion-7.c
  5a8b775f8ce1e0cafb8782fbc39b58e4  gcc/testsuite/gcc.dg/darwin-minversion-8.c
  aa9dfa39c42ef65a88c0a708412fb842  gcc/testsuite/gcc.dg/darwin-minversion-9.c
! 956d9c5ca31de05aa49da3cb99f3d4ef  gcc/testsuite/gcc.dg/darwin-minversion-link.c
  b66bb093837bda7692b73c8aa9711e00  gcc/testsuite/gcc.dg/darwin-sections.c
! f7857b3d082c7452ee5a60411d5f02bc  gcc/testsuite/gcc.dg/darwin-segaddr.c
  e3d2d2840d7d23dee7e2cd94e097a114  gcc/testsuite/gcc.dg/darwin-version-1.c
  9145b589b54240035dacb7540309d62e  gcc/testsuite/gcc.dg/darwin-weakimport-1.c
  bda7de2e2fd6472aa3ffe7873407e58d  gcc/testsuite/gcc.dg/darwin-weakimport-2.c
*************** f30a377973368d1a41bc4f8e2a0e33e9  gcc/te
*** 38347,38353 ****
  f9ab56344241c22521f8d9245e677c22  gcc/testsuite/gcc.dg/debug/dwarf2/inline1.c
  47291ca2a7f639676f2662f2d578253f  gcc/testsuite/gcc.dg/debug/dwarf2/inline2.c
  8580bd27cd825c8d49e674c9f31c683c  gcc/testsuite/gcc.dg/debug/dwarf2/inline3.c
! 586e0e8fb83eb0dc0f5b5a3a5b6236bf  gcc/testsuite/gcc.dg/debug/dwarf2/inline4.c
  cc07cedbdc7f7b69237511da330b487b  gcc/testsuite/gcc.dg/debug/dwarf2/inline5.c
  40c9e189b7b61e8f4d69ce3f98f98206  gcc/testsuite/gcc.dg/debug/dwarf2/inline6.c
  e7c46c2fc25b3773b6adcbd27af4b924  gcc/testsuite/gcc.dg/debug/dwarf2/ipa-cp1.c
--- 38445,38451 ----
  f9ab56344241c22521f8d9245e677c22  gcc/testsuite/gcc.dg/debug/dwarf2/inline1.c
  47291ca2a7f639676f2662f2d578253f  gcc/testsuite/gcc.dg/debug/dwarf2/inline2.c
  8580bd27cd825c8d49e674c9f31c683c  gcc/testsuite/gcc.dg/debug/dwarf2/inline3.c
! 975fb826cc6035cfef2a1cad545f8110  gcc/testsuite/gcc.dg/debug/dwarf2/inline4.c
  cc07cedbdc7f7b69237511da330b487b  gcc/testsuite/gcc.dg/debug/dwarf2/inline5.c
  40c9e189b7b61e8f4d69ce3f98f98206  gcc/testsuite/gcc.dg/debug/dwarf2/inline6.c
  e7c46c2fc25b3773b6adcbd27af4b924  gcc/testsuite/gcc.dg/debug/dwarf2/ipa-cp1.c
*************** cbcc356a35e8a8665137c7ae64ec5914  gcc/te
*** 38361,38366 ****
--- 38459,38465 ----
  937e8a07b611d24efb44f969833a3cb8  gcc/testsuite/gcc.dg/debug/dwarf2/omp-fesdr.c
  65c779aa27fde2981a8fd2eb1b54c195  gcc/testsuite/gcc.dg/debug/dwarf2/pr100515.c
  54b366032eed667161eee7783123c310  gcc/testsuite/gcc.dg/debug/dwarf2/pr103874.c
+ 5ed4e6ef67f556cf4874685cde9a33d6  gcc/testsuite/gcc.dg/debug/dwarf2/pr111080.c
  250736f38c859fc89fb993ad3155eb20  gcc/testsuite/gcc.dg/debug/dwarf2/pr29609-1.c
  8f522ee214d1db3d04f240eb20eb4474  gcc/testsuite/gcc.dg/debug/dwarf2/pr29609-2.c
  43696edd12f5c0c32058d1ad1012e1e8  gcc/testsuite/gcc.dg/debug/dwarf2/pr31230.c
*************** b3f045b532c693bbfb8cfed8c0609564  gcc/te
*** 38414,38419 ****
--- 38513,38519 ----
  69e64f492a931622722ac6c811569e62  gcc/testsuite/gcc.dg/debug/dwarf2/var2.c
  d11dcc4e37738beb9e8be03ce7630c35  gcc/testsuite/gcc.dg/debug/enum-1.c
  3c2a32917edee1c37607a11e5414fbdf  gcc/testsuite/gcc.dg/debug/pr104337.c
+ 30ce98ab2ad9e598ef0db6491350f738  gcc/testsuite/gcc.dg/debug/pr112718.c
  bdf39999a5a7a4c7b1459600dff4ff14  gcc/testsuite/gcc.dg/debug/pr16676.c
  6f8e864ca7f9c38a79c3578b2c75101b  gcc/testsuite/gcc.dg/debug/pr26881.c
  feb6dc1d570a59982f88a912985ff2fa  gcc/testsuite/gcc.dg/debug/pr29558.c
*************** a4596c7975a946fa49341b476cdddf3a  gcc/te
*** 38792,38797 ****
--- 38892,38898 ----
  079305f70244f8ded32a0debe8d58694  gcc/testsuite/gcc.dg/float64-typeof.c
  8bb9c44d00a4462a62e271afe65395d9  gcc/testsuite/gcc.dg/float64x-align.c
  43395d2f36b719cad53a2b34ee0c2822  gcc/testsuite/gcc.dg/float64x-typeof.c
+ e50dce809881cd3fe916639e85f3e895  gcc/testsuite/gcc.dg/float_opposite_arm-1.c
  dce4fd47d3f8088f0fcde8e4c014985f  gcc/testsuite/gcc.dg/floatn-align.h
  a7a463105294b90172c7dacacf6dfaab  gcc/testsuite/gcc.dg/floatn-arithconv.c
  bfaa6b3a6e5de108258c8a51ca88aff8  gcc/testsuite/gcc.dg/floatn-errs.c
*************** cfde414df06a7d559244461a11116f3a  gcc/te
*** 39133,39139 ****
  8f37924ff2caad55a30fc496f91e6433  gcc/testsuite/gcc.dg/fpermitted-flt-eval-methods_2.c
  346d72de410a41c1e4c11801d862b639  gcc/testsuite/gcc.dg/fpermitted-flt-eval-methods_3.c
  dfe38eb512efba921d1fc5abef411b1a  gcc/testsuite/gcc.dg/fpermitted-flt-eval-methods_4.c
! efdf83d01ddd79162b4664860b902b22  gcc/testsuite/gcc.dg/framework-1.c
  ab168371521010cab0fb40567190798a  gcc/testsuite/gcc.dg/framework-2.c
  72cddfd9b852c1976438d75d9facbec7  gcc/testsuite/gcc.dg/free-1.c
  b545fd5015b04774ac8c95c87722bfc2  gcc/testsuite/gcc.dg/free-2.c
--- 39234,39240 ----
  8f37924ff2caad55a30fc496f91e6433  gcc/testsuite/gcc.dg/fpermitted-flt-eval-methods_2.c
  346d72de410a41c1e4c11801d862b639  gcc/testsuite/gcc.dg/fpermitted-flt-eval-methods_3.c
  dfe38eb512efba921d1fc5abef411b1a  gcc/testsuite/gcc.dg/fpermitted-flt-eval-methods_4.c
! f986ed8a378006f958f6b3f89b0dd9f5  gcc/testsuite/gcc.dg/framework-1.c
  ab168371521010cab0fb40567190798a  gcc/testsuite/gcc.dg/framework-2.c
  72cddfd9b852c1976438d75d9facbec7  gcc/testsuite/gcc.dg/free-1.c
  b545fd5015b04774ac8c95c87722bfc2  gcc/testsuite/gcc.dg/free-2.c
*************** d06f7c5820eb923c44d73fa73e63ee5d  gcc/te
*** 40187,40193 ****
  3f06e49cd636df9de21331230b0e59e0  gcc/testsuite/gcc.dg/ipa/ipa-icf-35.c
  4630bb4962c62c86ea5589ff20308a9a  gcc/testsuite/gcc.dg/ipa/ipa-icf-36.c
  ef947bf14a3a516703fe551dea457061  gcc/testsuite/gcc.dg/ipa/ipa-icf-37.c
! 682c8d620b16f64d33f18d73e453a4ae  gcc/testsuite/gcc.dg/ipa/ipa-icf-38.c
  8d25872a618a0cf64f0d344afe44543a  gcc/testsuite/gcc.dg/ipa/ipa-icf-38a.c
  554bb9677c9084721bcca9a42daa5b9a  gcc/testsuite/gcc.dg/ipa/ipa-icf-39.c
  639814886ab7278c2142d218eef816de  gcc/testsuite/gcc.dg/ipa/ipa-icf-4.c
--- 40288,40294 ----
  3f06e49cd636df9de21331230b0e59e0  gcc/testsuite/gcc.dg/ipa/ipa-icf-35.c
  4630bb4962c62c86ea5589ff20308a9a  gcc/testsuite/gcc.dg/ipa/ipa-icf-36.c
  ef947bf14a3a516703fe551dea457061  gcc/testsuite/gcc.dg/ipa/ipa-icf-37.c
! 0848ba2e6621707fb7f0e1ef4099f9cb  gcc/testsuite/gcc.dg/ipa/ipa-icf-38.c
  8d25872a618a0cf64f0d344afe44543a  gcc/testsuite/gcc.dg/ipa/ipa-icf-38a.c
  554bb9677c9084721bcca9a42daa5b9a  gcc/testsuite/gcc.dg/ipa/ipa-icf-39.c
  639814886ab7278c2142d218eef816de  gcc/testsuite/gcc.dg/ipa/ipa-icf-4.c
*************** e9a270cc0fe29965bd5d3f98375ad921  gcc/te
*** 40290,40296 ****
--- 40391,40400 ----
  99587579302ee66a706ecb63eca8d73f  gcc/testsuite/gcc.dg/ipa/pr105160.c
  e261240fcc7035cd8398f9cbecd10a00  gcc/testsuite/gcc.dg/ipa/pr105639.c
  d6d366e61e9493a8fc9ad14a2e6f9ba4  gcc/testsuite/gcc.dg/ipa/pr105739.c
+ 95030383fded4b7071d378fb24eccc10  gcc/testsuite/gcc.dg/ipa/pr108007.c
  cf4edb1ce9b073657fc6da0e1310515b  gcc/testsuite/gcc.dg/ipa/pr109318.c
+ 6cadebd8b42bda8557c5814d0103a2fa  gcc/testsuite/gcc.dg/ipa/pr112616.c
+ b7a69609ea582386c302afd514d8e233  gcc/testsuite/gcc.dg/ipa/pr114247.c
  40bd41302666d56c4edf7330db97920e  gcc/testsuite/gcc.dg/ipa/pr42706.c
  e4887053c792f4f78b03804c148839ce  gcc/testsuite/gcc.dg/ipa/pr45644.c
  6e1b4f2c5d0c0d768778da8e3b7df828  gcc/testsuite/gcc.dg/ipa/pr48195.c
*************** fe0705b8881cddd35d729ad7e893213e  gcc/te
*** 40647,40652 ****
--- 40751,40761 ----
  2aa0e1e2d80203f72d32aa9f9b4cc175  gcc/testsuite/gcc.dg/lto/pr103171_1.c
  cdecd03c005af5a99a42aa5b9c5d802f  gcc/testsuite/gcc.dg/lto/pr105459_0.c
  fe020ff7b4d35a4d3f13e426cbacc4da  gcc/testsuite/gcc.dg/lto/pr107769_0.c
+ ef0b90ba09e6e56d1d655afdcb63cdd4  gcc/testsuite/gcc.dg/lto/pr109778_0.c
+ c3ad752a64c11978f9f2cce0520bf58c  gcc/testsuite/gcc.dg/lto/pr109778_1.c
+ 19509c8f1bdf98e2ab64c3f9e2c3f584  gcc/testsuite/gcc.dg/lto/pr113907_0.c
+ 9f07bf819862bc85bb8767d97947d837  gcc/testsuite/gcc.dg/lto/pr113907_1.c
+ 4d872eeace42ef5001147db36f0eb548  gcc/testsuite/gcc.dg/lto/pr113907_2.c
  5192817b2492ca93ffadce3b4a5e4794  gcc/testsuite/gcc.dg/lto/pr27898_0.c
  c5f48897247dfaec60df4e32beffcd8e  gcc/testsuite/gcc.dg/lto/pr27898_1.c
  2ad724786bc4b555a7f31e8b3bf164b6  gcc/testsuite/gcc.dg/lto/pr28706_0.c
*************** d9a197240d51bf4b3e98a49de304172c  gcc/te
*** 41172,41183 ****
  762b005a07126544845976067b15ca4d  gcc/testsuite/gcc.dg/pic-4.c
  1310eec5a596f6f3f1034c18543936a3  gcc/testsuite/gcc.dg/pic-macro-define.c
  de302da8d7737a4e96d474e241080339  gcc/testsuite/gcc.dg/pie-1.c
! e85ed22735e235dc5a9457487286d6f0  gcc/testsuite/gcc.dg/pie-2.c
  a1104a3ff24cf683d1a597e325c9f573  gcc/testsuite/gcc.dg/pie-3.c
  d9f2439f176b4f73afa0c30baa468855  gcc/testsuite/gcc.dg/pie-4.c
  17f4008aaadc7db4f869e804d77d753a  gcc/testsuite/gcc.dg/pie-5.c
  0debd1544970fb56a2a4a7828bb92d07  gcc/testsuite/gcc.dg/pie-6.c
! df1fb04645820cce9159c1b05e520fc7  gcc/testsuite/gcc.dg/pie-7.c
  72712f41dcc921ba1827000fc0809a9c  gcc/testsuite/gcc.dg/pie-link.c
  000d3a6c8dca7e54f5be771190d10f29  gcc/testsuite/gcc.dg/pie-static-1.c
  be052bceddbf752586b645bc9e048e9c  gcc/testsuite/gcc.dg/pie-static-2.c
--- 41281,41292 ----
  762b005a07126544845976067b15ca4d  gcc/testsuite/gcc.dg/pic-4.c
  1310eec5a596f6f3f1034c18543936a3  gcc/testsuite/gcc.dg/pic-macro-define.c
  de302da8d7737a4e96d474e241080339  gcc/testsuite/gcc.dg/pie-1.c
! d3b785ef540cb4e67cd67fada4080a39  gcc/testsuite/gcc.dg/pie-2.c
  a1104a3ff24cf683d1a597e325c9f573  gcc/testsuite/gcc.dg/pie-3.c
  d9f2439f176b4f73afa0c30baa468855  gcc/testsuite/gcc.dg/pie-4.c
  17f4008aaadc7db4f869e804d77d753a  gcc/testsuite/gcc.dg/pie-5.c
  0debd1544970fb56a2a4a7828bb92d07  gcc/testsuite/gcc.dg/pie-6.c
! 2db756126636737e343b6e63f0f96fcb  gcc/testsuite/gcc.dg/pie-7.c
  72712f41dcc921ba1827000fc0809a9c  gcc/testsuite/gcc.dg/pie-link.c
  000d3a6c8dca7e54f5be771190d10f29  gcc/testsuite/gcc.dg/pie-static-1.c
  be052bceddbf752586b645bc9e048e9c  gcc/testsuite/gcc.dg/pie-static-2.c
*************** cfa158c5ec1ec68947ea7cf84ebac9f7  gcc/te
*** 41448,41455 ****
--- 41557,41567 ----
  6c079381fc5bea8ba966068e353963c8  gcc/testsuite/gcc.dg/pr105455.c
  70752dbf95282e3e1682d161dec96c60  gcc/testsuite/gcc.dg/pr105458.c
  8f69648258c8f27361e18186db792348  gcc/testsuite/gcc.dg/pr105461.c
+ bfec3f2610558e315de99d8027586521  gcc/testsuite/gcc.dg/pr105522.c
  bd694253207b0e4d0a25d5c16b288b5c  gcc/testsuite/gcc.dg/pr105528.c
  96d62d7595a54c11e88844900871d456  gcc/testsuite/gcc.dg/pr105635.c
+ 7cfe0252fb06e6e2b62656ef015985b6  gcc/testsuite/gcc.dg/pr105660-1.c
+ 0ceb4dedc7a251ff1d9fc92f7d657369  gcc/testsuite/gcc.dg/pr105660-2.c
  7a17ba9a0aa919417290b69137a34761  gcc/testsuite/gcc.dg/pr105676.c
  5450efb71a4677ee6bce61dee16ec4eb  gcc/testsuite/gcc.dg/pr105969.c
  fe172baae6e5e7cbaa701cf25aed6296  gcc/testsuite/gcc.dg/pr105972.c
*************** c748e71e8ac256d9575c8ae2120aab9f  gcc/te
*** 41461,41466 ****
--- 41573,41579 ----
  c475e08b8000c7ada2ebc07c02d67b0d  gcc/testsuite/gcc.dg/pr106719.c
  d39b4203470156b99b330266683a9790  gcc/testsuite/gcc.dg/pr107107.c
  8dd35121cb6e8e3f018e6f4551ce80b1  gcc/testsuite/gcc.dg/pr107127.c
+ 82f2765c862f6e67c3558ee7cde994d8  gcc/testsuite/gcc.dg/pr107385.c
  d64d53420ac059d0a4813bb6b0e625bd  gcc/testsuite/gcc.dg/pr107554.c
  bfe683bab17f972c72cffcb817291d2e  gcc/testsuite/gcc.dg/pr107686.c
  4b0c665c9ac4f4701760e4205e109f61  gcc/testsuite/gcc.dg/pr108095.c
*************** e0baf0198b26b94a0e92182918c52449  gcc/te
*** 41474,41481 ****
--- 41587,41616 ----
  70cc568eeb5214c97b9d32241c816bf9  gcc/testsuite/gcc.dg/pr108819.c
  45f9003776530da05643fd2fcd9640b8  gcc/testsuite/gcc.dg/pr109392.c
  8c5ddd68de1ed874eb52f91b7136909e  gcc/testsuite/gcc.dg/pr109410.c
+ f71ef2b2bdb0cce06fa1243f4928e871  gcc/testsuite/gcc.dg/pr110079.c
+ c63f42682a97d6307d214dda47bb00f9  gcc/testsuite/gcc.dg/pr110731.c
+ 7aeeff98686427c2e25aa1b7bb60b7f6  gcc/testsuite/gcc.dg/pr111009.c
+ 5328040ceef0db656025d09af496f06a  gcc/testsuite/gcc.dg/pr111015.c
+ 475fe022000816b6e696beebf8f5bc37  gcc/testsuite/gcc.dg/pr111039.c
+ f09a78bba4729691ffb28aad69085816  gcc/testsuite/gcc.dg/pr111070.c
+ 8a45dfbe070c48845446dc22aab1602b  gcc/testsuite/gcc.dg/pr111407.c
+ f97f1cf6ac420452092fc3fba4203574  gcc/testsuite/gcc.dg/pr112733.c
+ e5517dc2a2e07c9b2472bb545cd5a722  gcc/testsuite/gcc.dg/pr112837.c
+ 6b73a8d375ddff23d86f9f1c9377f381  gcc/testsuite/gcc.dg/pr112845.c
+ 68812a8a18bdcb8c9b56b83823f8a853  gcc/testsuite/gcc.dg/pr113013.c
+ da36c4c045a6839485d1209b636f2fa6  gcc/testsuite/gcc.dg/pr113262.c
+ e68a7c7f2d1db31e0e0e0a23960975a7  gcc/testsuite/gcc.dg/pr113907-1.c
+ 12ecf3bc0aab66a39903f50c4a6dfc66  gcc/testsuite/gcc.dg/pr114115.c
+ 7cd5609790e8cb3ba4ad54ccf122a48a  gcc/testsuite/gcc.dg/pr114310.c
+ e99866ca9e56b885a0004e2f573a6158  gcc/testsuite/gcc.dg/pr114493-1.c
+ 94931dbb7cf13d8363b141dd2b96ebdf  gcc/testsuite/gcc.dg/pr114493-2.c
  860f163dcd0b252ea3f85323bc959a7d  gcc/testsuite/gcc.dg/pr11459-1.c
+ 18db873e30d811e6904623797ead2825  gcc/testsuite/gcc.dg/pr114753.c
+ 278b6ea6998e142ef9ecea8b30a97701  gcc/testsuite/gcc.dg/pr114768.c
+ 86c7b688b3835d3cdb63a61f64b1ae73  gcc/testsuite/gcc.dg/pr114876.c
+ 4f24f3d12a3963918c32e40afe158f0a  gcc/testsuite/gcc.dg/pr114902.c
  e164a736918661d669864e3645da290c  gcc/testsuite/gcc.dg/pr11492.c
+ e76a4663621c8d450d2c9d229d63e033  gcc/testsuite/gcc.dg/pr115092.c
  3b83403729a3686d25552352bf0c4577  gcc/testsuite/gcc.dg/pr11864-1.c
  bc5ddfbbc46f4e0cce1629d1b58d3090  gcc/testsuite/gcc.dg/pr12603.c
  72a2fca76cb69617ae36bab93c7ec0d7  gcc/testsuite/gcc.dg/pr12625-1.c
*************** b09000e6104e19c4d2e2e0550272c280  gcc/te
*** 42977,42983 ****
  8785ee78f0ecce2b7ef647d29d90cf54  gcc/testsuite/gcc.dg/pr83373.c
  64ee6bfa410f7c1d30c3d7f63402433b  gcc/testsuite/gcc.dg/pr83393.c
  a6e9e544df8c1540a5957852a45004e8  gcc/testsuite/gcc.dg/pr83396.c
! 4f297789c555b06acff0f263a2de4380  gcc/testsuite/gcc.dg/pr83415.c
  ff149ef447478fe287d21948bf94820b  gcc/testsuite/gcc.dg/pr83419.c
  d1d24788f9c8caf0192fc3807eb41608  gcc/testsuite/gcc.dg/pr83422.c
  4cfcf9fb49e0c6531f60ce19ff899760  gcc/testsuite/gcc.dg/pr83424.c
--- 43112,43118 ----
  8785ee78f0ecce2b7ef647d29d90cf54  gcc/testsuite/gcc.dg/pr83373.c
  64ee6bfa410f7c1d30c3d7f63402433b  gcc/testsuite/gcc.dg/pr83393.c
  a6e9e544df8c1540a5957852a45004e8  gcc/testsuite/gcc.dg/pr83396.c
! bed17f1377941c87cc77ed606717aeaa  gcc/testsuite/gcc.dg/pr83415.c
  ff149ef447478fe287d21948bf94820b  gcc/testsuite/gcc.dg/pr83419.c
  d1d24788f9c8caf0192fc3807eb41608  gcc/testsuite/gcc.dg/pr83422.c
  4cfcf9fb49e0c6531f60ce19ff899760  gcc/testsuite/gcc.dg/pr83424.c
*************** e7055b12b2da73125c471ef6e21aec3d  gcc/te
*** 43599,43604 ****
--- 43734,43740 ----
  b401e32d0fdcef56538c60685124c8d6  gcc/testsuite/gcc.dg/rtl/aarch64/big-endian-cse-1.c
  a1925ccc0f69537c243f239b703bd7e1  gcc/testsuite/gcc.dg/rtl/aarch64/missed-pass-error.c
  c101dc190e024f7cd8e13d412510c399  gcc/testsuite/gcc.dg/rtl/aarch64/multi-subreg-1.c
+ 1ba71d3525a92b2cd35acab9a03c063e  gcc/testsuite/gcc.dg/rtl/aarch64/pr111411.c
  82921214d686f1804813b91947084109  gcc/testsuite/gcc.dg/rtl/aarch64/pr71779.c
  043d0b0c264990e6e6ac1f2827823f1b  gcc/testsuite/gcc.dg/rtl/aarch64/rtl-handle-column-numbers.c
  770cae6014d989d238db251906e1d55c  gcc/testsuite/gcc.dg/rtl/aarch64/subs_adds_sp.c
*************** fc94c5cf1382c5cc791f1e082f1bc93b  gcc/te
*** 43872,43878 ****
  4bb868e2d5ae5ad0f471895fe036ce9d  gcc/testsuite/gcc.dg/sso/u5.c
  6a94b217dd2dc52bd804b559734d7d6d  gcc/testsuite/gcc.dg/sso/u6.c
  aadb80509f82b46b30f6e6764a2e2dd1  gcc/testsuite/gcc.dg/ssp-1.c
! 298fe2c4a920a1453489cedaeaa98ff3  gcc/testsuite/gcc.dg/ssp-2.c
  b764f892e6c6f673878a4e8da208c16b  gcc/testsuite/gcc.dg/ssp-3.c
  5843aab6624989ad947aa1f77c816bce  gcc/testsuite/gcc.dg/ssp-4.c
  70e6f2a4c4d5735002d0b1f7dd18ddd2  gcc/testsuite/gcc.dg/stack-check-10.c
--- 44008,44014 ----
  4bb868e2d5ae5ad0f471895fe036ce9d  gcc/testsuite/gcc.dg/sso/u5.c
  6a94b217dd2dc52bd804b559734d7d6d  gcc/testsuite/gcc.dg/sso/u6.c
  aadb80509f82b46b30f6e6764a2e2dd1  gcc/testsuite/gcc.dg/ssp-1.c
! 07c428d62b7171c3d051c3770f57156c  gcc/testsuite/gcc.dg/ssp-2.c
  b764f892e6c6f673878a4e8da208c16b  gcc/testsuite/gcc.dg/ssp-3.c
  5843aab6624989ad947aa1f77c816bce  gcc/testsuite/gcc.dg/ssp-4.c
  70e6f2a4c4d5735002d0b1f7dd18ddd2  gcc/testsuite/gcc.dg/stack-check-10.c
*************** a831de49f2d41703b35fb1187a5eaacf  gcc/te
*** 44150,44156 ****
  3fb5ccff70fc82da2e2aac8594fb9457  gcc/testsuite/gcc.dg/tls/pr47715-5.c
  7193b5d66103274fe5171afd9347d3b2  gcc/testsuite/gcc.dg/tls/pr58595.c
  f12db64d724ba7ee8005f9b84bbac338  gcc/testsuite/gcc.dg/tls/pr66470.c
! f16cbb04b7ab390512b206edfaad586e  gcc/testsuite/gcc.dg/tls/pr78796.c
  8422497541cdde65944aa49f5f92c3a8  gcc/testsuite/gcc.dg/tls/pr82095.c
  237b9cf194db36ab11f01771186e6a0a  gcc/testsuite/gcc.dg/tls/pr83945.c
  a25e6d22e39772bf36ad7e281b7e57e8  gcc/testsuite/gcc.dg/tls/pr99466-1.c
--- 44286,44292 ----
  3fb5ccff70fc82da2e2aac8594fb9457  gcc/testsuite/gcc.dg/tls/pr47715-5.c
  7193b5d66103274fe5171afd9347d3b2  gcc/testsuite/gcc.dg/tls/pr58595.c
  f12db64d724ba7ee8005f9b84bbac338  gcc/testsuite/gcc.dg/tls/pr66470.c
! 54f648f5034f84731458a48f03ece972  gcc/testsuite/gcc.dg/tls/pr78796.c
  8422497541cdde65944aa49f5f92c3a8  gcc/testsuite/gcc.dg/tls/pr82095.c
  237b9cf194db36ab11f01771186e6a0a  gcc/testsuite/gcc.dg/tls/pr83945.c
  a25e6d22e39772bf36ad7e281b7e57e8  gcc/testsuite/gcc.dg/tls/pr99466-1.c
*************** f260468383f94ce8cae2ce5b2ef65427  gcc/te
*** 44582,44587 ****
--- 44718,44737 ----
  20080fb33b5b17277c72133229475af4  gcc/testsuite/gcc.dg/torture/pr109469.c
  72f322a0e5d8096eb7fa42e2d8fabe7d  gcc/testsuite/gcc.dg/torture/pr109585.c
  f5aad1409cbbb9e3039cb7da55080bc6  gcc/testsuite/gcc.dg/torture/pr109609.c
+ c68e0fca588779377278aa9e84380d07  gcc/testsuite/gcc.dg/torture/pr110176.c
+ 2c65ac9bb8c6b6218eb71392ab387879  gcc/testsuite/gcc.dg/torture/pr110298.c
+ eeafa444e951227833c10234733ef66d  gcc/testsuite/gcc.dg/torture/pr110422.c
+ 7df804d5efde0457098ad2b86b9a7447  gcc/testsuite/gcc.dg/torture/pr110556.c
+ 39a13c5ef6e1f4f1fb97ea3cdca7f2f7  gcc/testsuite/gcc.dg/torture/pr110702.c
+ a5aabe56aa9f2db146fb1185eabbfacb  gcc/testsuite/gcc.dg/torture/pr111137.c
+ 880ef8f569f8ceaf9a94d105c12a8f97  gcc/testsuite/gcc.dg/torture/pr111445.c
+ 9ac3aab221fd38c4d0dda7ec4429c95d  gcc/testsuite/gcc.dg/torture/pr111614.c
+ 404440fd3b4aac03198b518a7e9c5268  gcc/testsuite/gcc.dg/torture/pr111815.c
+ e289e3514153e0ffe8b5b086904f40c4  gcc/testsuite/gcc.dg/torture/pr111818.c
+ 5a3dd17b41272920e3804d1b42cba87e  gcc/testsuite/gcc.dg/torture/pr111917.c
+ 1e5a5be4efef1ee222e142fcbc25978e  gcc/testsuite/gcc.dg/torture/pr112281-1.c
+ 3acf5c04c64ba9b942f88c4d8bde666c  gcc/testsuite/gcc.dg/torture/pr112281-2.c
+ 8ebd93b45204d340baa4a9798f5bcd62  gcc/testsuite/gcc.dg/torture/pr114672.c
  ded4330fd1cd52783bd9b1761db038ef  gcc/testsuite/gcc.dg/torture/pr16104-1.c
  fc265ee05da2f29f0e92804661cd1f28  gcc/testsuite/gcc.dg/torture/pr17526.c
  01c583edb41b632b835aa892b9c1cb14  gcc/testsuite/gcc.dg/torture/pr17933-1.c
*************** fc343ac4dddc2387803c4581508bd355  gcc/te
*** 46044,46050 ****
  25a22ef7e096aa5c4a5ec323a10eb1ee  gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-7.c
  3f1747c36bfe6b3fd2235e695edcaa02  gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-8.c
  1d89c967b03259c101cc6401b07d1648  gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-9.c
! d2a6a7bf2644a7942988c7239b51410f  gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-warn-1.c
  d0e4c342e2ad48131871ec279be2f9c3  gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-warn-10.c
  75bb54d18f7c1eeb0e52d94f6f0e0a2d  gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-warn-11.c
  c7f97a6e2a77945ebe161e237b31e840  gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-warn-12.c
--- 46194,46200 ----
  25a22ef7e096aa5c4a5ec323a10eb1ee  gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-7.c
  3f1747c36bfe6b3fd2235e695edcaa02  gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-8.c
  1d89c967b03259c101cc6401b07d1648  gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-9.c
! 5489a7071de3715549debe15cc684b48  gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-warn-1.c
  d0e4c342e2ad48131871ec279be2f9c3  gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-warn-10.c
  75bb54d18f7c1eeb0e52d94f6f0e0a2d  gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-warn-11.c
  c7f97a6e2a77945ebe161e237b31e840  gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-warn-12.c
*************** c502141393b8f053f7454ee254898a9a  gcc/te
*** 46567,46572 ****
--- 46717,46723 ----
  0b2312ef2558ac9fd9aad91d8afc7009  gcc/testsuite/gcc.dg/tree-ssa/pr107323.c
  ba0f756770b2c8c27b5698876e3038d6  gcc/testsuite/gcc.dg/tree-ssa/pr108137.c
  486e83eb732ae374266e81bf0ad91d4c  gcc/testsuite/gcc.dg/tree-ssa/pr108684-1.c
+ 30191e7f04d08f0b42092e36965a3c63  gcc/testsuite/gcc.dg/tree-ssa/pr111967.c
  78e6c5fe63f7305009c8a79840fe20dc  gcc/testsuite/gcc.dg/tree-ssa/pr13146.c
  eab19e0c04884cd782c9879cbe292109  gcc/testsuite/gcc.dg/tree-ssa/pr14341.c
  9945ed7002a5f7d4918e8ff5eb4cb647  gcc/testsuite/gcc.dg/tree-ssa/pr14490-1.c
*************** bb62f82a973334db1c0ebf75b17bcdf8  gcc/te
*** 47843,47848 ****
--- 47994,48000 ----
  016029e7b08dbc8fe1d266551df2fdd3  gcc/testsuite/gcc.dg/tree-ssa/writeonly.c
  22eb0b8eeae794a6956326b2c9383fb2  gcc/testsuite/gcc.dg/trunc-1.c
  0986037c6e0724a89f8308100f3f920f  gcc/testsuite/gcc.dg/tsan/atomic-fence.c
+ 93c01dbb8a77851bfbe99fc7c806d056  gcc/testsuite/gcc.dg/tsan/pr111736.c
  66723ae098123069493e416708ef5146  gcc/testsuite/gcc.dg/tsan/pr88017.c
  dcc8ff133faffd3fe561dfe431569a07  gcc/testsuite/gcc.dg/tsan/pr88030.c
  de40a1e950c75128048b75517e728603  gcc/testsuite/gcc.dg/tsan/pr90208-1.c
*************** b6636fcf606d4b2a9b3c129b082bc808  gcc/te
*** 47889,47894 ****
--- 48041,48047 ----
  20138e45bcf86067b02f18ee36d2a451  gcc/testsuite/gcc.dg/ubsan/object-size-9.c
  bd23f40ca964648dca24107dcc929765  gcc/testsuite/gcc.dg/ubsan/pr103456.c
  cefdc2a9eb13f2095c81dff3665fcbe2  gcc/testsuite/gcc.dg/ubsan/pr107183.c
+ 3d891ede9caa6aed55954898e1974cef  gcc/testsuite/gcc.dg/ubsan/pr111736.c
  8b53119c2975ba4eb7e0a8a3f21049bc  gcc/testsuite/gcc.dg/ubsan/pr63690.c
  7a3b89a11b570c0d6817707c745a9fba  gcc/testsuite/gcc.dg/ubsan/pr67279.c
  c9a455b03d901e306e1836d50e9e37d6  gcc/testsuite/gcc.dg/ubsan/pr67662.c
*************** bb6370e51fdfc71eb406f2d9d7e1f004  gcc/te
*** 48027,48032 ****
--- 48180,48186 ----
  0ba39e72d317abfcfd3703541b7f8a41  gcc/testsuite/gcc.dg/uninit-pr19430.c
  91c544bce46e7d686c64631ec6c9422e  gcc/testsuite/gcc.dg/uninit-pr20644-O0.c
  bd8e8e7214f9f23684fcce6542ba21a2  gcc/testsuite/gcc.dg/uninit-pr20644.c
+ 6dcf6d29de8f848cdc6ca21e0b33995d  gcc/testsuite/gcc.dg/uninit-pr40635.c
  fb7fb911814f67c58846323d51173f98  gcc/testsuite/gcc.dg/uninit-pr40943.c
  cc87ba9b6c639bd8ff150bf229696aaf  gcc/testsuite/gcc.dg/uninit-pr44547.c
  0d268bf46ec35f0bd1c568a5916d76e1  gcc/testsuite/gcc.dg/uninit-pr50476.c
*************** a8f46ae0bf8ccd4ca742a85a90e2d052  gcc/te
*** 48565,48573 ****
  f1c2ca8659ed33069fed7de6e429bc7e  gcc/testsuite/gcc.dg/vect/pr107212-1.c
  4d42750e9517b302a0544999b3f7fcc1  gcc/testsuite/gcc.dg/vect/pr107212-2.c
  e131976da53307331b69c03e9c64cc4a  gcc/testsuite/gcc.dg/vect/pr108608.c
! bdc9d900f60b3777cfec5cd1a41102d7  gcc/testsuite/gcc.dg/vect/pr108950.c
  bce13fdf2ea61a0bc1886470eed1bf60  gcc/testsuite/gcc.dg/vect/pr109473.c
  aa0a603e6aee5b8a3fd3463354c9bf10  gcc/testsuite/gcc.dg/vect/pr109502.c
  42d48d2ecd5682545b12ac42f879a831  gcc/testsuite/gcc.dg/vect/pr16105.c
  231c99dba9475fe09525bbf6f4374124  gcc/testsuite/gcc.dg/vect/pr18308.c
  3aed50f38aa86c4915d6e4b3cef91287  gcc/testsuite/gcc.dg/vect/pr18400.c
--- 48719,48738 ----
  f1c2ca8659ed33069fed7de6e429bc7e  gcc/testsuite/gcc.dg/vect/pr107212-1.c
  4d42750e9517b302a0544999b3f7fcc1  gcc/testsuite/gcc.dg/vect/pr107212-2.c
  e131976da53307331b69c03e9c64cc4a  gcc/testsuite/gcc.dg/vect/pr108608.c
! 42e71f76f5fec72cddb8f569851aa595  gcc/testsuite/gcc.dg/vect/pr108950.c
  bce13fdf2ea61a0bc1886470eed1bf60  gcc/testsuite/gcc.dg/vect/pr109473.c
  aa0a603e6aee5b8a3fd3463354c9bf10  gcc/testsuite/gcc.dg/vect/pr109502.c
+ baaa98ae2916da0747250082d79ae452  gcc/testsuite/gcc.dg/vect/pr110381.c
+ 6fe7a9f8a10f6b62e25fc4c1fa96deff  gcc/testsuite/gcc.dg/vect/pr111764.c
+ 769cf4bfcb97c43ac962799ae8d222c5  gcc/testsuite/gcc.dg/vect/pr112505.c
+ c26acbf1612dc4698a8344d64f963df0  gcc/testsuite/gcc.dg/vect/pr113281-1.c
+ 21722bf37953d9796f5d5fd71e243c2b  gcc/testsuite/gcc.dg/vect/pr113281-2.c
+ 31ad99fbdbecf9925f5f4504adc83b13  gcc/testsuite/gcc.dg/vect/pr113281-3.c
+ e7f3d45d3b7be1d3f34c03fe14a64322  gcc/testsuite/gcc.dg/vect/pr113281-4.c
+ 8f0bbff86de57f60a2a350c847f4db18  gcc/testsuite/gcc.dg/vect/pr113281-5.c
+ f2ad143cd940fa42deda153f442d29b2  gcc/testsuite/gcc.dg/vect/pr114027.c
+ ae8b389a68778f9cfdd3436253d31b14  gcc/testsuite/gcc.dg/vect/pr114231.c
+ a652091690348408aec894da3d82b15d  gcc/testsuite/gcc.dg/vect/pr115192.c
  42d48d2ecd5682545b12ac42f879a831  gcc/testsuite/gcc.dg/vect/pr16105.c
  231c99dba9475fe09525bbf6f4374124  gcc/testsuite/gcc.dg/vect/pr18308.c
  3aed50f38aa86c4915d6e4b3cef91287  gcc/testsuite/gcc.dg/vect/pr18400.c
*************** b551cf977314c7406b99b8d04c143b19  gcc/te
*** 48927,48933 ****
  6895e7a56bdc4993b94c03e6d5dc587d  gcc/testsuite/gcc.dg/vect/pr97173.c
  28db70b2a4bdf2faf03ba619381af631  gcc/testsuite/gcc.dg/vect/pr97236.c
  20e8d4d146127438ffe685c492c8ad86  gcc/testsuite/gcc.dg/vect/pr97241.c
! ee5e6bcfcc4a28b128f0ae60e312ef1e  gcc/testsuite/gcc.dg/vect/pr97428.c
  8d732449a24564fd2cd4ff8dca6c2f37  gcc/testsuite/gcc.dg/vect/pr97457.c
  4e7901b46d8ff6dfbd12f354b54c6743  gcc/testsuite/gcc.dg/vect/pr97558-2.c
  a0e548875f044f3b51270f1185a1fee3  gcc/testsuite/gcc.dg/vect/pr97558.c
--- 49092,49098 ----
  6895e7a56bdc4993b94c03e6d5dc587d  gcc/testsuite/gcc.dg/vect/pr97173.c
  28db70b2a4bdf2faf03ba619381af631  gcc/testsuite/gcc.dg/vect/pr97236.c
  20e8d4d146127438ffe685c492c8ad86  gcc/testsuite/gcc.dg/vect/pr97241.c
! 383951c1cc307ec21b173cbb393b3a33  gcc/testsuite/gcc.dg/vect/pr97428.c
  8d732449a24564fd2cd4ff8dca6c2f37  gcc/testsuite/gcc.dg/vect/pr97457.c
  4e7901b46d8ff6dfbd12f354b54c6743  gcc/testsuite/gcc.dg/vect/pr97558-2.c
  a0e548875f044f3b51270f1185a1fee3  gcc/testsuite/gcc.dg/vect/pr97558.c
*************** c38511a26575a66a65ddd31d3bc229da  gcc/te
*** 49661,49666 ****
--- 49826,49832 ----
  0a0e7b7396e78408cb66cc38d9e15cd1  gcc/testsuite/gcc.dg/vect/vect-peel-4-epilogue.c
  dce179d9539fcb48637e8e9c102da26c  gcc/testsuite/gcc.dg/vect/vect-peel-4-src.c
  39723945c19c26c57adf66d889eabb98  gcc/testsuite/gcc.dg/vect/vect-peel-4.c
+ 94bda84899e2683692deba382167aa8e  gcc/testsuite/gcc.dg/vect/vect-pr114375.c
  4d57df9e3b3522c9f1a6707c05f1da45  gcc/testsuite/gcc.dg/vect/vect-pr69848.c
  3a3a316ff2f2496494ecb0bd77d61aad  gcc/testsuite/gcc.dg/vect/vect-pre-interact.c
  bcf8d4d938304b75cfe5af73ef6b191b  gcc/testsuite/gcc.dg/vect/vect-profile-1.c
*************** c400cc0e03e4317110d582fdba04ace0  gcc/te
*** 50187,50199 ****
  0c8ac613f2d2a35706fd7c8b7b16a1a9  gcc/testsuite/gcc.misc-tests/gcov-11.c
  eee8f00567cf54ebbed65a4f71c7d314  gcc/testsuite/gcc.misc-tests/gcov-12.c
  1aac355a176cb811b951b73ea58ef6c7  gcc/testsuite/gcc.misc-tests/gcov-13.c
! 91c5005b1b38df67c1f35c1fa5ed34b7  gcc/testsuite/gcc.misc-tests/gcov-14.c
  a7fcf55fbb07ad31be551305d543313e  gcc/testsuite/gcc.misc-tests/gcov-15.c
  a19cb340410a6420dbacef02fec4bcd8  gcc/testsuite/gcc.misc-tests/gcov-16.c
  90ae2485842728f278e979faa45ad805  gcc/testsuite/gcc.misc-tests/gcov-17.c
  70c6f6b4d1974332d8e93bc9a3457028  gcc/testsuite/gcc.misc-tests/gcov-18.c
  26d3ee0bab7bc8a86b5239d64728101d  gcc/testsuite/gcc.misc-tests/gcov-1a.c
  7a8ab4c1f62f1462575863cae613404b  gcc/testsuite/gcc.misc-tests/gcov-2.c
  c71219d95b56b360f999cbe8dd8b9109  gcc/testsuite/gcc.misc-tests/gcov-3.c
  7ee7fdf2863e181255489c48059d04a0  gcc/testsuite/gcc.misc-tests/gcov-4.c
  7d9bedbf8aa7d7ba724d6149406ba528  gcc/testsuite/gcc.misc-tests/gcov-4b.c
--- 50353,50366 ----
  0c8ac613f2d2a35706fd7c8b7b16a1a9  gcc/testsuite/gcc.misc-tests/gcov-11.c
  eee8f00567cf54ebbed65a4f71c7d314  gcc/testsuite/gcc.misc-tests/gcov-12.c
  1aac355a176cb811b951b73ea58ef6c7  gcc/testsuite/gcc.misc-tests/gcov-13.c
! a95cd74daf7751d37ad0e80b754f3ef8  gcc/testsuite/gcc.misc-tests/gcov-14.c
  a7fcf55fbb07ad31be551305d543313e  gcc/testsuite/gcc.misc-tests/gcov-15.c
  a19cb340410a6420dbacef02fec4bcd8  gcc/testsuite/gcc.misc-tests/gcov-16.c
  90ae2485842728f278e979faa45ad805  gcc/testsuite/gcc.misc-tests/gcov-17.c
  70c6f6b4d1974332d8e93bc9a3457028  gcc/testsuite/gcc.misc-tests/gcov-18.c
  26d3ee0bab7bc8a86b5239d64728101d  gcc/testsuite/gcc.misc-tests/gcov-1a.c
  7a8ab4c1f62f1462575863cae613404b  gcc/testsuite/gcc.misc-tests/gcov-2.c
+ 632a8cbb04146bcb82659d2a9419f3cd  gcc/testsuite/gcc.misc-tests/gcov-24.c
  c71219d95b56b360f999cbe8dd8b9109  gcc/testsuite/gcc.misc-tests/gcov-3.c
  7ee7fdf2863e181255489c48059d04a0  gcc/testsuite/gcc.misc-tests/gcov-4.c
  7d9bedbf8aa7d7ba724d6149406ba528  gcc/testsuite/gcc.misc-tests/gcov-4b.c
*************** db99ea9df53af2aa9156fb039f1d5e57  gcc/te
*** 50247,50253 ****
  512f8592397ac26799ee85d9c29339ec  gcc/testsuite/gcc.target/aarch64/_Float16_1.c
  6bead3d18e15a037cfb743e33e7712a5  gcc/testsuite/gcc.target/aarch64/_Float16_2.c
  d365d8bf0f5478b04e6451262cf0b804  gcc/testsuite/gcc.target/aarch64/_Float16_3.c
! 8947768a6a02f91b8b1431a92aa7f811  gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp
  fbb13bb7b4d389c258ef20d9aae07cf6  gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-2.h
  c708255687954aa3e3174b83b89e4e66  gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-common.h
  ab893b67ef591ba6b84bda6885255075  gcc/testsuite/gcc.target/aarch64/aapcs64/abitest.S
--- 50414,50420 ----
  512f8592397ac26799ee85d9c29339ec  gcc/testsuite/gcc.target/aarch64/_Float16_1.c
  6bead3d18e15a037cfb743e33e7712a5  gcc/testsuite/gcc.target/aarch64/_Float16_2.c
  d365d8bf0f5478b04e6451262cf0b804  gcc/testsuite/gcc.target/aarch64/_Float16_3.c
! d3c5e283c3c58f3a43335a802d668d19  gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp
  fbb13bb7b4d389c258ef20d9aae07cf6  gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-2.h
  c708255687954aa3e3174b83b89e4e66  gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-common.h
  ab893b67ef591ba6b84bda6885255075  gcc/testsuite/gcc.target/aarch64/aapcs64/abitest.S
*************** ccf5175907998c0c871634fd51ca889f  gcc/te
*** 50354,50359 ****
--- 50521,50527 ----
  1c5b2165b1d114daea4683d247a75998  gcc/testsuite/gcc.target/aarch64/acle/ls64_ld64b-3.c
  fa1ccdd20a958a2e7bc98028d2b2a9f0  gcc/testsuite/gcc.target/aarch64/acle/ls64_ld64b.c
  1ffa16c70b659d0b3a7b52c3c3f51adb  gcc/testsuite/gcc.target/aarch64/acle/ls64_ld_st_o0.c
+ b266fdbac7924755e5e70677609f129c  gcc/testsuite/gcc.target/aarch64/acle/ls64_lto.c
  16fffb65ffb6236dc8280f6dbd45b120  gcc/testsuite/gcc.target/aarch64/acle/ls64_st64b-2.c
  97d4553a6c2fe6ee3d781f1d446bcd13  gcc/testsuite/gcc.target/aarch64/acle/ls64_st64b.c
  75d2799589f92d6d9e81a786b103d9b9  gcc/testsuite/gcc.target/aarch64/acle/ls64_st64bv-2.c
*************** ff3a09d9afde293ac1598cb7530ead9d  gcc/te
*** 50366,50371 ****
--- 50534,50541 ----
  722af47b92a99bf8f052eb56ae7c0c5e  gcc/testsuite/gcc.target/aarch64/acle/memtag_2.c
  e2be4748443bb6caa176b86d28972388  gcc/testsuite/gcc.target/aarch64/acle/memtag_3.c
  7891d663249f27cbe3e8c65142207451  gcc/testsuite/gcc.target/aarch64/acle/pr108140.c
+ e15fb874d0ae7c74f74b2eb5bd8f8bf3  gcc/testsuite/gcc.target/aarch64/acle/pr110100.c
+ 9effc18b2bce4cad72da3e28af5e9e4f  gcc/testsuite/gcc.target/aarch64/acle/pr110132.c
  59a572a57e0172b2d647b53aaa71b73b  gcc/testsuite/gcc.target/aarch64/acle/rintnzx_1.c
  0d5ba16c2924cc1abd60d5f6e84bb892  gcc/testsuite/gcc.target/aarch64/acle/rng_1.c
  cb84d7d74821259d1a47775dd18c13c8  gcc/testsuite/gcc.target/aarch64/acle/rng_2.c
*************** e3003ad7bf9014830c6f9c58e85b082a  gcc/te
*** 51023,51029 ****
  e2630d4e02d27500ef42c075fea9596a  gcc/testsuite/gcc.target/aarch64/auto-init-4.c
  957708ea83978ca85b51a492c2777540  gcc/testsuite/gcc.target/aarch64/auto-init-5.c
  46b2038d6a8de54fe8ef127b8d150cc2  gcc/testsuite/gcc.target/aarch64/auto-init-6.c
! 28a7211f85135d0e2e4ec718a410924a  gcc/testsuite/gcc.target/aarch64/auto-init-7.c
  82a86967361fb139ed59816cd69721e4  gcc/testsuite/gcc.target/aarch64/auto-init-8.c
  630c742bc2781439914d777f777f39fb  gcc/testsuite/gcc.target/aarch64/auto-init-padding-1.c
  6152eb7bd8e8fb962404c859fd655d9d  gcc/testsuite/gcc.target/aarch64/auto-init-padding-10.c
--- 51193,51199 ----
  e2630d4e02d27500ef42c075fea9596a  gcc/testsuite/gcc.target/aarch64/auto-init-4.c
  957708ea83978ca85b51a492c2777540  gcc/testsuite/gcc.target/aarch64/auto-init-5.c
  46b2038d6a8de54fe8ef127b8d150cc2  gcc/testsuite/gcc.target/aarch64/auto-init-6.c
! bf9558c21c69b0ace0ae8237582b7a3c  gcc/testsuite/gcc.target/aarch64/auto-init-7.c
  82a86967361fb139ed59816cd69721e4  gcc/testsuite/gcc.target/aarch64/auto-init-8.c
  630c742bc2781439914d777f777f39fb  gcc/testsuite/gcc.target/aarch64/auto-init-padding-1.c
  6152eb7bd8e8fb962404c859fd655d9d  gcc/testsuite/gcc.target/aarch64/auto-init-padding-10.c
*************** c4aa8a1f0ad2e74a9d73da81126c1f7e  gcc/te
*** 51260,51266 ****
  22ce675229a62ee836f1fbec03e0a9f1  gcc/testsuite/gcc.target/aarch64/frint_double.c
  e415b924a99a0696f070ee6cf8357d54  gcc/testsuite/gcc.target/aarch64/frint_float.c
  7f8140bc0d65dde3896572f2fe084146  gcc/testsuite/gcc.target/aarch64/fuse-caller-save.c
! 6ed33457f293332f03ce167c620b35b0  gcc/testsuite/gcc.target/aarch64/fuse_adrp_add_1.c
  814f2a8701d47a79b645e43e6fe31b57  gcc/testsuite/gcc.target/aarch64/get_fpcr64_1.c
  dcfff550a1456524fd7870f0bec66e6f  gcc/testsuite/gcc.target/aarch64/get_fpsr64_1.c
  77410b35f9bf6bc7cf2a51fbc9461727  gcc/testsuite/gcc.target/aarch64/get_lane_f16_1.c
--- 51430,51436 ----
  22ce675229a62ee836f1fbec03e0a9f1  gcc/testsuite/gcc.target/aarch64/frint_double.c
  e415b924a99a0696f070ee6cf8357d54  gcc/testsuite/gcc.target/aarch64/frint_float.c
  7f8140bc0d65dde3896572f2fe084146  gcc/testsuite/gcc.target/aarch64/fuse-caller-save.c
! 4b8ae6f45383d71443f074a2d98751fe  gcc/testsuite/gcc.target/aarch64/fuse_adrp_add_1.c
  814f2a8701d47a79b645e43e6fe31b57  gcc/testsuite/gcc.target/aarch64/get_fpcr64_1.c
  dcfff550a1456524fd7870f0bec66e6f  gcc/testsuite/gcc.target/aarch64/get_fpsr64_1.c
  77410b35f9bf6bc7cf2a51fbc9461727  gcc/testsuite/gcc.target/aarch64/get_lane_f16_1.c
*************** cb35ae597b395ee5d00d96a082dfbd6a  gcc/te
*** 51358,51364 ****
  838782f1efd4baefc000469e9fa89394  gcc/testsuite/gcc.target/aarch64/mops_1.c
  1a56fe0cba4f9ce878a71c556244fa39  gcc/testsuite/gcc.target/aarch64/mops_2.c
  9e207cc04909dc52e63cc6c37858b5e4  gcc/testsuite/gcc.target/aarch64/mops_3.c
! 50151365e68fe7717c740c37be863cc2  gcc/testsuite/gcc.target/aarch64/mops_4.c
  fd48ccb944d2f2990e98c181bd06ec24  gcc/testsuite/gcc.target/aarch64/mops_5.c
  6b6269dcfa6bceb701b7943ad5703be6  gcc/testsuite/gcc.target/aarch64/mops_6.c
  a3777fac4759dcd3290aa64c1d8c180e  gcc/testsuite/gcc.target/aarch64/mops_7.c
--- 51528,51534 ----
  838782f1efd4baefc000469e9fa89394  gcc/testsuite/gcc.target/aarch64/mops_1.c
  1a56fe0cba4f9ce878a71c556244fa39  gcc/testsuite/gcc.target/aarch64/mops_2.c
  9e207cc04909dc52e63cc6c37858b5e4  gcc/testsuite/gcc.target/aarch64/mops_3.c
! 4f70f13ba5254fb500f72a9e35ec9b20  gcc/testsuite/gcc.target/aarch64/mops_4.c
  fd48ccb944d2f2990e98c181bd06ec24  gcc/testsuite/gcc.target/aarch64/mops_5.c
  6b6269dcfa6bceb701b7943ad5703be6  gcc/testsuite/gcc.target/aarch64/mops_6.c
  a3777fac4759dcd3290aa64c1d8c180e  gcc/testsuite/gcc.target/aarch64/mops_7.c
*************** face3a8c6631236fedad3dce5526b762  gcc/te
*** 51389,51394 ****
--- 51559,51565 ----
  fb19dd57034e67da13f2a5b22815fcc5  gcc/testsuite/gcc.target/aarch64/no-inline-lrint_1.c
  56f1cae94d74d605f3127ff54df58e5e  gcc/testsuite/gcc.target/aarch64/no-inline-lrint_2.c
  9567b5cb1744b0c5a301604d3a25bbc2  gcc/testsuite/gcc.target/aarch64/no-inline-lrint_3.c
+ b716a0213aba89c759289668d57ef9cd  gcc/testsuite/gcc.target/aarch64/no_merge_trunc_signed_zero.c
  13a63494139cde5273b13f2e4eb58493  gcc/testsuite/gcc.target/aarch64/nofp_1.c
  31192c5ad4b7d30f5e3a3f25a5e74741  gcc/testsuite/gcc.target/aarch64/noplt_1.c
  390e3deb9378ba437cf8138949f7153b  gcc/testsuite/gcc.target/aarch64/noplt_2.c
*************** e2136e7e4121b5b98591560242d1826f  gcc/te
*** 51441,51447 ****
  60149cce51c7ce96f2f40008aac502a2  gcc/testsuite/gcc.target/aarch64/pr103085.c
  46d6ff3fd00506e5bdc9c04d3d444c4e  gcc/testsuite/gcc.target/aarch64/pr103094.c
  6ab646c64e54d73bfe7fecdb44f824c3  gcc/testsuite/gcc.target/aarch64/pr103147-1.c
! 36448e4422f5aa59373ea811ae6684e4  gcc/testsuite/gcc.target/aarch64/pr103147-10.c
  b4780965b308ea64a30faae3dd03ff0b  gcc/testsuite/gcc.target/aarch64/pr103147-2.c
  331a1f2804cb2d624b662808784a18cf  gcc/testsuite/gcc.target/aarch64/pr103147-3.c
  1863cdd074e5a1878fd0fa3625c0bec4  gcc/testsuite/gcc.target/aarch64/pr103147-4.c
--- 51612,51618 ----
  60149cce51c7ce96f2f40008aac502a2  gcc/testsuite/gcc.target/aarch64/pr103085.c
  46d6ff3fd00506e5bdc9c04d3d444c4e  gcc/testsuite/gcc.target/aarch64/pr103094.c
  6ab646c64e54d73bfe7fecdb44f824c3  gcc/testsuite/gcc.target/aarch64/pr103147-1.c
! 7a6bdaa071cc871595b1c5e9dee1f8f6  gcc/testsuite/gcc.target/aarch64/pr103147-10.c
  b4780965b308ea64a30faae3dd03ff0b  gcc/testsuite/gcc.target/aarch64/pr103147-2.c
  331a1f2804cb2d624b662808784a18cf  gcc/testsuite/gcc.target/aarch64/pr103147-3.c
  1863cdd074e5a1878fd0fa3625c0bec4  gcc/testsuite/gcc.target/aarch64/pr103147-4.c
*************** e047cf533ea7d668ad1746232b7c35f6  gcc/te
*** 51456,51462 ****
  7ac80b7a4c25415aa8f17143e3348308  gcc/testsuite/gcc.target/aarch64/pr103350-2.c
  d476917b01e1a6ee9c389abac401fcf6  gcc/testsuite/gcc.target/aarch64/pr103523.c
  60105fd77c472b6a7d016a05f7c5918f  gcc/testsuite/gcc.target/aarch64/pr103741.c
! 78b36e30c5827cd7feaca767b2bfe584  gcc/testsuite/gcc.target/aarch64/pr104005.c
  d31b19093bf5b52a4ab71663355a6864  gcc/testsuite/gcc.target/aarch64/pr104921-1.c
  de49e9125d6237709299bcc3a1dfd315  gcc/testsuite/gcc.target/aarch64/pr104921-2.c
  80bfa364bfe20370e6bd035b978c10f8  gcc/testsuite/gcc.target/aarch64/pr104921.x
--- 51627,51633 ----
  7ac80b7a4c25415aa8f17143e3348308  gcc/testsuite/gcc.target/aarch64/pr103350-2.c
  d476917b01e1a6ee9c389abac401fcf6  gcc/testsuite/gcc.target/aarch64/pr103523.c
  60105fd77c472b6a7d016a05f7c5918f  gcc/testsuite/gcc.target/aarch64/pr103741.c
! a09415299ccad356d1c753effda41e1f  gcc/testsuite/gcc.target/aarch64/pr104005.c
  d31b19093bf5b52a4ab71663355a6864  gcc/testsuite/gcc.target/aarch64/pr104921-1.c
  de49e9125d6237709299bcc3a1dfd315  gcc/testsuite/gcc.target/aarch64/pr104921-2.c
  80bfa364bfe20370e6bd035b978c10f8  gcc/testsuite/gcc.target/aarch64/pr104921.x
*************** a7d8042acc2272e21686f52da76e42f1  gcc/te
*** 51465,51470 ****
--- 51636,51643 ----
  8caf1b331d1a984045c0427f609a988b  gcc/testsuite/gcc.target/aarch64/pr108681.c
  c06d3b2030bc06f25071cbc162980592  gcc/testsuite/gcc.target/aarch64/pr109072_1.c
  96db4199e6f01de5b5bc5f1e5545c2e2  gcc/testsuite/gcc.target/aarch64/pr109072_2.c
+ 7506b184bf1ad4df113825935c38bf26  gcc/testsuite/gcc.target/aarch64/pr112787.c
+ 5c93b32021bd32ca40c9fb5ec6a30f04  gcc/testsuite/gcc.target/aarch64/pr113552.c
  9adb42733d9f5e2b1f2dbb364b62100d  gcc/testsuite/gcc.target/aarch64/pr37780_1.c
  e668fb9e0d32efadd671247467dc90db  gcc/testsuite/gcc.target/aarch64/pr58460.c
  9023f817c07ddec673c5b546525fc184  gcc/testsuite/gcc.target/aarch64/pr60034.c
*************** d8cfefc063686118062e9fc3b774907b  gcc/te
*** 51475,51481 ****
  617b125a3275c9ce440e1e542a8bbc79  gcc/testsuite/gcc.target/aarch64/pr62178.c
  da1fc7d53b5f8b6e99f57a2a7b7ac849  gcc/testsuite/gcc.target/aarch64/pr62262.c
  5b090e5d951a21826fd629be991b5411  gcc/testsuite/gcc.target/aarch64/pr62308.c
! c5c29359ead6b589bff98ed4b2ac962a  gcc/testsuite/gcc.target/aarch64/pr63304_1.c
  5195785cc7216a9662357829a66aa2c7  gcc/testsuite/gcc.target/aarch64/pr63424.c
  baf71778326c44f90d27479f00af7a63  gcc/testsuite/gcc.target/aarch64/pr63874.c
  193743022291a9918f493ad3090965ec  gcc/testsuite/gcc.target/aarch64/pr64263_1.c
--- 51648,51654 ----
  617b125a3275c9ce440e1e542a8bbc79  gcc/testsuite/gcc.target/aarch64/pr62178.c
  da1fc7d53b5f8b6e99f57a2a7b7ac849  gcc/testsuite/gcc.target/aarch64/pr62262.c
  5b090e5d951a21826fd629be991b5411  gcc/testsuite/gcc.target/aarch64/pr62308.c
! b39607ed8246d1c1e4730c6984888a15  gcc/testsuite/gcc.target/aarch64/pr63304_1.c
  5195785cc7216a9662357829a66aa2c7  gcc/testsuite/gcc.target/aarch64/pr63424.c
  baf71778326c44f90d27479f00af7a63  gcc/testsuite/gcc.target/aarch64/pr63874.c
  193743022291a9918f493ad3090965ec  gcc/testsuite/gcc.target/aarch64/pr64263_1.c
*************** b28ad75ae030029f6a891f12b81c0ebf  gcc/te
*** 51495,51501 ****
  065e6ab62eb109b24a2126e76d2447a1  gcc/testsuite/gcc.target/aarch64/pr69245_2.c
  029e51f05456a28a597add4730ec77aa  gcc/testsuite/gcc.target/aarch64/pr70044.c
  9357327a0e7073dde1ca415f103c86f2  gcc/testsuite/gcc.target/aarch64/pr70120-1.c
! 6d806c50c21bbbe2e388dd9e1819fb28  gcc/testsuite/gcc.target/aarch64/pr70120-2.c
  61ea50a51a3ed94b38acd7cd026cd077  gcc/testsuite/gcc.target/aarch64/pr70120-3.c
  a5a030e82205f8d9b2799618b27cc294  gcc/testsuite/gcc.target/aarch64/pr70398.c
  e7efe396ef16dbc7526785247ead6d84  gcc/testsuite/gcc.target/aarch64/pr70809_1.c
--- 51668,51674 ----
  065e6ab62eb109b24a2126e76d2447a1  gcc/testsuite/gcc.target/aarch64/pr69245_2.c
  029e51f05456a28a597add4730ec77aa  gcc/testsuite/gcc.target/aarch64/pr70044.c
  9357327a0e7073dde1ca415f103c86f2  gcc/testsuite/gcc.target/aarch64/pr70120-1.c
! bb6ce7a591647d506bc7a6dc956d2160  gcc/testsuite/gcc.target/aarch64/pr70120-2.c
  61ea50a51a3ed94b38acd7cd026cd077  gcc/testsuite/gcc.target/aarch64/pr70120-3.c
  a5a030e82205f8d9b2799618b27cc294  gcc/testsuite/gcc.target/aarch64/pr70398.c
  e7efe396ef16dbc7526785247ead6d84  gcc/testsuite/gcc.target/aarch64/pr70809_1.c
*************** c8c052e3ffb361fbe4b0043b1414c58b  gcc/te
*** 51506,51513 ****
  ed6579d962ab6988afc3e526e6c51275  gcc/testsuite/gcc.target/aarch64/pr78255.c
  f9f37ccfc032535c8079deb6b916aca7  gcc/testsuite/gcc.target/aarch64/pr78382.c
  15de7f015106f4b337262f146247f86f  gcc/testsuite/gcc.target/aarch64/pr78561.c
! 393c885b78542f7884ffe55dcb0653ef  gcc/testsuite/gcc.target/aarch64/pr78733.c
! 393c885b78542f7884ffe55dcb0653ef  gcc/testsuite/gcc.target/aarch64/pr79041-2.c
  1074b04062fdbdecea7da7cc9a58423f  gcc/testsuite/gcc.target/aarch64/pr79794.c
  aa2dfd18bc6784e0bc7ee00c3ef8561a  gcc/testsuite/gcc.target/aarch64/pr80295.c
  105bb65b036f134453135d5817cd946c  gcc/testsuite/gcc.target/aarch64/pr81356.c
--- 51679,51686 ----
  ed6579d962ab6988afc3e526e6c51275  gcc/testsuite/gcc.target/aarch64/pr78255.c
  f9f37ccfc032535c8079deb6b916aca7  gcc/testsuite/gcc.target/aarch64/pr78382.c
  15de7f015106f4b337262f146247f86f  gcc/testsuite/gcc.target/aarch64/pr78561.c
! 39f4224dd0c729f3e2990c7cc441e6a0  gcc/testsuite/gcc.target/aarch64/pr78733.c
! 39f4224dd0c729f3e2990c7cc441e6a0  gcc/testsuite/gcc.target/aarch64/pr79041-2.c
  1074b04062fdbdecea7da7cc9a58423f  gcc/testsuite/gcc.target/aarch64/pr79794.c
  aa2dfd18bc6784e0bc7ee00c3ef8561a  gcc/testsuite/gcc.target/aarch64/pr80295.c
  105bb65b036f134453135d5817cd946c  gcc/testsuite/gcc.target/aarch64/pr81356.c
*************** a9e3fa9bf042d9c1c357a23c16f6b387  gcc/te
*** 51539,51546 ****
  9cfb3b160866ec3ddc9bc343efa6b2e8  gcc/testsuite/gcc.target/aarch64/pr94398.c
  d89f585a7ccbac10cff70c726d0dea2b  gcc/testsuite/gcc.target/aarch64/pr94435.c
  8d8f9b6336f8a3c7534960e50ea4d681  gcc/testsuite/gcc.target/aarch64/pr94514.c
! c62d6dacdfaa7c29b7d597102a1c90c7  gcc/testsuite/gcc.target/aarch64/pr94530.c
! adbd85a2c55f47f70a05be84ab927f7a  gcc/testsuite/gcc.target/aarch64/pr94577.c
  1366814bb1b0d8bfd71ff640bd30b0df  gcc/testsuite/gcc.target/aarch64/pr94697.c
  c6eebf3e7952e61593d0c0e9db4a9363  gcc/testsuite/gcc.target/aarch64/pr94748.c
  7f56460afccd09f9dac35acbb8186c34  gcc/testsuite/gcc.target/aarch64/pr95254.c
--- 51712,51719 ----
  9cfb3b160866ec3ddc9bc343efa6b2e8  gcc/testsuite/gcc.target/aarch64/pr94398.c
  d89f585a7ccbac10cff70c726d0dea2b  gcc/testsuite/gcc.target/aarch64/pr94435.c
  8d8f9b6336f8a3c7534960e50ea4d681  gcc/testsuite/gcc.target/aarch64/pr94514.c
! 2e591f3efe065a02e03185695c88bfc3  gcc/testsuite/gcc.target/aarch64/pr94530.c
! c0ad70b450d97246f6f5c07954d99cb8  gcc/testsuite/gcc.target/aarch64/pr94577.c
  1366814bb1b0d8bfd71ff640bd30b0df  gcc/testsuite/gcc.target/aarch64/pr94697.c
  c6eebf3e7952e61593d0c0e9db4a9363  gcc/testsuite/gcc.target/aarch64/pr94748.c
  7f56460afccd09f9dac35acbb8186c34  gcc/testsuite/gcc.target/aarch64/pr95254.c
*************** c45bc47433163208f0aec414ada73705  gcc/te
*** 51564,51570 ****
  18c52a2faa4e83538abeef107e3b4d8a  gcc/testsuite/gcc.target/aarch64/pr99873_3.c
  5e9a238ae88bfc957497e635ed104144  gcc/testsuite/gcc.target/aarch64/pr99988.c
  7647e74954bed1df0b5452c86dc7806b  gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_1.c
! dc70336a2a022f10ec27787e628c5113  gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_2.c
  1802b716a6dff570eaf8df2688efe1dd  gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_3.c
  1f95766b4ed5bfb5f2cf1f168a607a8d  gcc/testsuite/gcc.target/aarch64/predefine_large.c
  d38e476730748c653068e7cb2d8d6ca6  gcc/testsuite/gcc.target/aarch64/predefine_small.c
--- 51737,51743 ----
  18c52a2faa4e83538abeef107e3b4d8a  gcc/testsuite/gcc.target/aarch64/pr99873_3.c
  5e9a238ae88bfc957497e635ed104144  gcc/testsuite/gcc.target/aarch64/pr99988.c
  7647e74954bed1df0b5452c86dc7806b  gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_1.c
! be30d927e2df67d4fe2786d0d026bbaa  gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_2.c
  1802b716a6dff570eaf8df2688efe1dd  gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_3.c
  1f95766b4ed5bfb5f2cf1f168a607a8d  gcc/testsuite/gcc.target/aarch64/predefine_large.c
  d38e476730748c653068e7cb2d8d6ca6  gcc/testsuite/gcc.target/aarch64/predefine_small.c
*************** d0bcbc3d9ff4ecc6817a33d0d9f3aed3  gcc/te
*** 51575,51581 ****
  74688db113854841ef6e7ea639b44f4c  gcc/testsuite/gcc.target/aarch64/reg-alloc-2.c
  d6af8901d4df3dbbd85fb4a872ad6e99  gcc/testsuite/gcc.target/aarch64/reg-alloc-3.c
  ae41f7b64717901920ce9a6a8098b825  gcc/testsuite/gcc.target/aarch64/reg-alloc-4.c
! 19e3d2fe2f3d2da546f57e32e1f53f39  gcc/testsuite/gcc.target/aarch64/reload-valid-spoff.c
  bed515c59d85f8fa531ff7c57e701c41  gcc/testsuite/gcc.target/aarch64/return_address_sign_1.c
  4b0e7c8dc1ccf80140eee97a9b37aeef  gcc/testsuite/gcc.target/aarch64/return_address_sign_2.c
  b9524ac9c94a04e98f82c9c679c0b715  gcc/testsuite/gcc.target/aarch64/return_address_sign_3.c
--- 51748,51754 ----
  74688db113854841ef6e7ea639b44f4c  gcc/testsuite/gcc.target/aarch64/reg-alloc-2.c
  d6af8901d4df3dbbd85fb4a872ad6e99  gcc/testsuite/gcc.target/aarch64/reg-alloc-3.c
  ae41f7b64717901920ce9a6a8098b825  gcc/testsuite/gcc.target/aarch64/reg-alloc-4.c
! c27a4c6f9c9e7aee309e6f023d713539  gcc/testsuite/gcc.target/aarch64/reload-valid-spoff.c
  bed515c59d85f8fa531ff7c57e701c41  gcc/testsuite/gcc.target/aarch64/return_address_sign_1.c
  4b0e7c8dc1ccf80140eee97a9b37aeef  gcc/testsuite/gcc.target/aarch64/return_address_sign_2.c
  b9524ac9c94a04e98f82c9c679c0b715  gcc/testsuite/gcc.target/aarch64/return_address_sign_3.c
*************** a02965d358c103b08e6c3e285f93010b  gcc/te
*** 51618,51624 ****
  e7df497b1060ec35ed3d6baa86e0f202  gcc/testsuite/gcc.target/aarch64/shl-combine-3.c
  fa3bb689f3a7d8d27c8e462d58be9685  gcc/testsuite/gcc.target/aarch64/shl-combine-4.c
  0e556388c6b9dad6fb3e0dd799249152  gcc/testsuite/gcc.target/aarch64/shl-combine-5.c
! 0d48e6d77924a54eb077969bf5f8aafb  gcc/testsuite/gcc.target/aarch64/shrink_wrap_1.c
  1581fca9833dd741d7b8f91b93455158  gcc/testsuite/gcc.target/aarch64/shrink_wrap_symbol_ref_1.c
  ad2d0fc3dcc2c60a25cb46fbf29750a9  gcc/testsuite/gcc.target/aarch64/shrn-combine-1.c
  20b0b487166b045e09d95e98512cb56f  gcc/testsuite/gcc.target/aarch64/shrn-combine-10.c
--- 51791,51797 ----
  e7df497b1060ec35ed3d6baa86e0f202  gcc/testsuite/gcc.target/aarch64/shl-combine-3.c
  fa3bb689f3a7d8d27c8e462d58be9685  gcc/testsuite/gcc.target/aarch64/shl-combine-4.c
  0e556388c6b9dad6fb3e0dd799249152  gcc/testsuite/gcc.target/aarch64/shl-combine-5.c
! f5edeaf58dfbc94a5477b36d0f156ee3  gcc/testsuite/gcc.target/aarch64/shrink_wrap_1.c
  1581fca9833dd741d7b8f91b93455158  gcc/testsuite/gcc.target/aarch64/shrink_wrap_symbol_ref_1.c
  ad2d0fc3dcc2c60a25cb46fbf29750a9  gcc/testsuite/gcc.target/aarch64/shrn-combine-1.c
  20b0b487166b045e09d95e98512cb56f  gcc/testsuite/gcc.target/aarch64/shrn-combine-10.c
*************** d8cba6fbd72082d21194a1854f6c2dfc  gcc/te
*** 52072,52078 ****
  eb612e50dff956594dedc023c01c005d  gcc/testsuite/gcc.target/aarch64/simd/vzipu8.x
  91d02599c3437c09a7b9841ceadb46bf  gcc/testsuite/gcc.target/aarch64/simd/vzipu8_1.c
  9ed21057ed9603af458520370acef207  gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-2.c
! a1bb40eab16d5f5dfc6b73cc362bd351  gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c
  e24e752cdfaae08d96c7ec56c0ef75fd  gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute.c
  96b414deb2ef664ef0e319c9d099a140  gcc/testsuite/gcc.target/aarch64/singleton_intrinsics_1.c
  1720e6906e4df69467a464d77453cbb9  gcc/testsuite/gcc.target/aarch64/sisd-shft-neg_1.c
--- 52245,52251 ----
  eb612e50dff956594dedc023c01c005d  gcc/testsuite/gcc.target/aarch64/simd/vzipu8.x
  91d02599c3437c09a7b9841ceadb46bf  gcc/testsuite/gcc.target/aarch64/simd/vzipu8_1.c
  9ed21057ed9603af458520370acef207  gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-2.c
! d1a781848976d72dd29ad2008392d1ea  gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c
  e24e752cdfaae08d96c7ec56c0ef75fd  gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute.c
  96b414deb2ef664ef0e319c9d099a140  gcc/testsuite/gcc.target/aarch64/singleton_intrinsics_1.c
  1720e6906e4df69467a464d77453cbb9  gcc/testsuite/gcc.target/aarch64/sisd-shft-neg_1.c
*************** a39fffcb877f065fdd23dfa57eee91ff  gcc/te
*** 52111,52118 ****
  863c1d4981653714d2c83be7c8ca2380  gcc/testsuite/gcc.target/aarch64/stack-check-alloca-8.c
  45b4c2bf6fb81a430d8f6727b9f34006  gcc/testsuite/gcc.target/aarch64/stack-check-alloca-9.c
  45d0507f692b31ce9bcb7889745dd889  gcc/testsuite/gcc.target/aarch64/stack-check-alloca.h
! 01eadd42b5120f04e2082246dd262f95  gcc/testsuite/gcc.target/aarch64/stack-check-cfa-1.c
! a2b26ce3b98bf832bec591ff538bca93  gcc/testsuite/gcc.target/aarch64/stack-check-cfa-2.c
  c2a30320545955ae7a4bcbbb006591c0  gcc/testsuite/gcc.target/aarch64/stack-check-cfa-3.c
  65bc395ce81a82844cf56c9c527ed62e  gcc/testsuite/gcc.target/aarch64/stack-check-prologue-1.c
  e1809e82f25f94c4d0945a9220fc235e  gcc/testsuite/gcc.target/aarch64/stack-check-prologue-10.c
--- 52284,52291 ----
  863c1d4981653714d2c83be7c8ca2380  gcc/testsuite/gcc.target/aarch64/stack-check-alloca-8.c
  45b4c2bf6fb81a430d8f6727b9f34006  gcc/testsuite/gcc.target/aarch64/stack-check-alloca-9.c
  45d0507f692b31ce9bcb7889745dd889  gcc/testsuite/gcc.target/aarch64/stack-check-alloca.h
! 223977e4450d22425c3f32311d353183  gcc/testsuite/gcc.target/aarch64/stack-check-cfa-1.c
! 98bf4582988e92904b41701cbd198690  gcc/testsuite/gcc.target/aarch64/stack-check-cfa-2.c
  c2a30320545955ae7a4bcbbb006591c0  gcc/testsuite/gcc.target/aarch64/stack-check-cfa-3.c
  65bc395ce81a82844cf56c9c527ed62e  gcc/testsuite/gcc.target/aarch64/stack-check-prologue-1.c
  e1809e82f25f94c4d0945a9220fc235e  gcc/testsuite/gcc.target/aarch64/stack-check-prologue-10.c
*************** b6d24cc44c0ae841eedac19bb3b71ae7  gcc/te
*** 52122,52128 ****
--- 52295,52305 ----
  8ae74d3437f7d43d17cfac17632d942f  gcc/testsuite/gcc.target/aarch64/stack-check-prologue-14.c
  ed8a92c22bb4c356e72a00b75da4bccd  gcc/testsuite/gcc.target/aarch64/stack-check-prologue-15.c
  f60705b79c18983e5449cb2640888da9  gcc/testsuite/gcc.target/aarch64/stack-check-prologue-16.c
+ 61734bec5d3ca6a21a55fdda5a176be9  gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c
+ 1eb4d5e67c09fd735a5d4f3a3c1f22a5  gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c
+ 2400e53b75ece6b62952431ac7bf064b  gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c
  7df002241fabdd43166a078456b9af79  gcc/testsuite/gcc.target/aarch64/stack-check-prologue-2.c
+ 3615b928f50ecd37b55bccdd18e7b615  gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c
  4d593b97a712f1c1b227372e57c2b116  gcc/testsuite/gcc.target/aarch64/stack-check-prologue-3.c
  dbd54994dcdef6b44b1f3378ddd01e83  gcc/testsuite/gcc.target/aarch64/stack-check-prologue-4.c
  4f9b39e7a10dd2ede8a5c7b35f2e98ff  gcc/testsuite/gcc.target/aarch64/stack-check-prologue-5.c
*************** e13154393d19a49196906480b6d2d4bc  gcc/te
*** 52139,52144 ****
--- 52316,52323 ----
  3367dd14de391b1bd4bcf779e76b539d  gcc/testsuite/gcc.target/aarch64/stack-protector-5.c
  e01a1f1b04b18c2fe9d9ae7868f0e844  gcc/testsuite/gcc.target/aarch64/stack-protector-6.c
  a27709d027d6c6481721a51a678b65ed  gcc/testsuite/gcc.target/aarch64/stack-protector-7.c
+ ecbce9b7301b6ddc08bd87f89762b3cd  gcc/testsuite/gcc.target/aarch64/stack-protector-8.c
+ bd965202297cac63c28f20a2183eb2e2  gcc/testsuite/gcc.target/aarch64/stack-protector-9.c
  e60080b5e2fe845d07811566ce955b35  gcc/testsuite/gcc.target/aarch64/store-pair-1.c
  fc9240608ee0f16e1f1c3b227052460b  gcc/testsuite/gcc.target/aarch64/store_lane0_str_1.c
  187e9a28ba40c7239e3291680f4edd90  gcc/testsuite/gcc.target/aarch64/store_lane_spill_1.c
*************** bd0ea7412913a5ce083ddea4613bd169  gcc/te
*** 54546,54552 ****
  fa06e7238dbd52dd10fcbc8218d6f455  gcc/testsuite/gcc.target/aarch64/sve/pack_float_1.c
  f73856c9978f65aed41f7a5c062f010a  gcc/testsuite/gcc.target/aarch64/sve/pack_float_1_run.c
  3767d9f5b48765e1ea663d93605a0b14  gcc/testsuite/gcc.target/aarch64/sve/part_vect_single_iter_epilog.c
! 81af0068658edca0dc2303ec5848ce9a  gcc/testsuite/gcc.target/aarch64/sve/pcs/aarch64-sve-pcs.exp
  32297ab4eebb8c660c35d34c167b3298  gcc/testsuite/gcc.target/aarch64/sve/pcs/annotate_1.c
  248fda9300aa4a9871796c24beae3e58  gcc/testsuite/gcc.target/aarch64/sve/pcs/annotate_2.c
  eb3818ec16fadffb1ecf19d7a7d01030  gcc/testsuite/gcc.target/aarch64/sve/pcs/annotate_3.c
--- 54725,54731 ----
  fa06e7238dbd52dd10fcbc8218d6f455  gcc/testsuite/gcc.target/aarch64/sve/pack_float_1.c
  f73856c9978f65aed41f7a5c062f010a  gcc/testsuite/gcc.target/aarch64/sve/pack_float_1_run.c
  3767d9f5b48765e1ea663d93605a0b14  gcc/testsuite/gcc.target/aarch64/sve/part_vect_single_iter_epilog.c
! 6ca017532628ddc4a9c5d7c94464c826  gcc/testsuite/gcc.target/aarch64/sve/pcs/aarch64-sve-pcs.exp
  32297ab4eebb8c660c35d34c167b3298  gcc/testsuite/gcc.target/aarch64/sve/pcs/annotate_1.c
  248fda9300aa4a9871796c24beae3e58  gcc/testsuite/gcc.target/aarch64/sve/pcs/annotate_2.c
  eb3818ec16fadffb1ecf19d7a7d01030  gcc/testsuite/gcc.target/aarch64/sve/pcs/annotate_3.c
*************** e79a454266487377a5fe47ecfa638d07  gcc/te
*** 54681,54687 ****
  f3fc0d43f234493b5b9ce5a5503f8808  gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_2_2048.c
  e9b154bc8367ff38eb536d7d7192db9a  gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_2_256.c
  e24fbdf33e77d28819c9e81e53b35801  gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_2_512.c
! 51ecf8b206f222d4d7bcad650be74d53  gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c
  f2456a359f3821da1bc28f9a5f7e556e  gcc/testsuite/gcc.target/aarch64/sve/pcs/struct.h
  3bdedaf042ffb29eabe08512390ff3b9  gcc/testsuite/gcc.target/aarch64/sve/pcs/struct_1_1024.c
  80cff442b432ccbde3e763ee004ba5cb  gcc/testsuite/gcc.target/aarch64/sve/pcs/struct_1_128.c
--- 54860,54866 ----
  f3fc0d43f234493b5b9ce5a5503f8808  gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_2_2048.c
  e9b154bc8367ff38eb536d7d7192db9a  gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_2_256.c
  e24fbdf33e77d28819c9e81e53b35801  gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_2_512.c
! 467df00c49d5cdd5a0904a0d794a6d10  gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c
  f2456a359f3821da1bc28f9a5f7e556e  gcc/testsuite/gcc.target/aarch64/sve/pcs/struct.h
  3bdedaf042ffb29eabe08512390ff3b9  gcc/testsuite/gcc.target/aarch64/sve/pcs/struct_1_1024.c
  80cff442b432ccbde3e763ee004ba5cb  gcc/testsuite/gcc.target/aarch64/sve/pcs/struct_1_128.c
*************** a1eb5ddb5902496d5253fa3260ba71e1  gcc/te
*** 54737,54742 ****
--- 54916,54922 ----
  48482e1fc72765b58f7e50fe16705068  gcc/testsuite/gcc.target/aarch64/sve/pr108603.c
  e63ee9a8151c9691caadc8fcc81bbf26  gcc/testsuite/gcc.target/aarch64/sve/pr108608-1.c
  fca208aba0269c8218d4736a10ac6a83  gcc/testsuite/gcc.target/aarch64/sve/pr109176.c
+ bc4cb512648e75cde04a28680b1c4a89  gcc/testsuite/gcc.target/aarch64/sve/pr109505.c
  7e2aaf0806edd37415079b5c2e48b66c  gcc/testsuite/gcc.target/aarch64/sve/pr81003.c
  00b752a6e175de8b1a300df08f275461  gcc/testsuite/gcc.target/aarch64/sve/pr87563.c
  c56eeba71ad463673a1bdb30e7a94863  gcc/testsuite/gcc.target/aarch64/sve/pr87815.c
*************** b1c8f3af47e9cea755b055cce544806c  gcc/te
*** 54760,54765 ****
--- 54940,54946 ----
  a21cb5077461cbf23ca054f7c89a9bd8  gcc/testsuite/gcc.target/aarch64/sve/pr97092.c
  0bd0c11c70979d74de80fd698161a3be  gcc/testsuite/gcc.target/aarch64/sve/pr97141.c
  551b93da908927fd5461395f52ee36cf  gcc/testsuite/gcc.target/aarch64/sve/pr97144.c
+ 52c6ecc9bb5839481a0b9229b539e8f3  gcc/testsuite/gcc.target/aarch64/sve/pr97696.c
  feaaf48c5bd3e12bf1024ebc5d6dfdfa  gcc/testsuite/gcc.target/aarch64/sve/pr98119.c
  6c0e94c363caf9e62df35ea98b4918ed  gcc/testsuite/gcc.target/aarch64/sve/pr98177-1.c
  e64000c150bb204c31dca884ee33dd4f  gcc/testsuite/gcc.target/aarch64/sve/pr98177-2.c
*************** c59c91f159013d73cdf4d699b8f4ae48  gcc/te
*** 56022,56028 ****
  a5e6b722f4144697d90e30cfabaee788  gcc/testsuite/gcc.target/aarch64/test_frame_14.c
  9880f8a846f56405c1be761252ad78b7  gcc/testsuite/gcc.target/aarch64/test_frame_15.c
  6c5bce43d2093b676bcbc3084394efb0  gcc/testsuite/gcc.target/aarch64/test_frame_16.c
! 4eb4fd9252581638e9f65decbfbf4b9e  gcc/testsuite/gcc.target/aarch64/test_frame_17.c
  d559354500ea93464e9f09bbad4b19a9  gcc/testsuite/gcc.target/aarch64/test_frame_2.c
  3b6dc13fe4d40fc07c0288cb31d3cfc5  gcc/testsuite/gcc.target/aarch64/test_frame_3.c
  49c58d65bf066f19f7a62fd4998f8a83  gcc/testsuite/gcc.target/aarch64/test_frame_4.c
--- 56203,56209 ----
  a5e6b722f4144697d90e30cfabaee788  gcc/testsuite/gcc.target/aarch64/test_frame_14.c
  9880f8a846f56405c1be761252ad78b7  gcc/testsuite/gcc.target/aarch64/test_frame_15.c
  6c5bce43d2093b676bcbc3084394efb0  gcc/testsuite/gcc.target/aarch64/test_frame_16.c
! 1558cee3b358a4686101166d3efa7561  gcc/testsuite/gcc.target/aarch64/test_frame_17.c
  d559354500ea93464e9f09bbad4b19a9  gcc/testsuite/gcc.target/aarch64/test_frame_2.c
  3b6dc13fe4d40fc07c0288cb31d3cfc5  gcc/testsuite/gcc.target/aarch64/test_frame_3.c
  49c58d65bf066f19f7a62fd4998f8a83  gcc/testsuite/gcc.target/aarch64/test_frame_4.c
*************** a2ccf9bfd1d0bb840b23c25e1bdec31c  gcc/te
*** 56044,56049 ****
--- 56225,56231 ----
  d7ac99c012df73ffbde36998316bf1ef  gcc/testsuite/gcc.target/aarch64/tlsle_sizeadj_small_1.c
  fc2eb8ac52faed5fba0a017b858d4ae4  gcc/testsuite/gcc.target/aarch64/tlsle_sizeadj_tiny_1.c
  22ac2528ed143d2373bc7e340f2a5215  gcc/testsuite/gcc.target/aarch64/torture/aarch64-torture.exp
+ 4036d83a59b4adcf9e8a4cf5a291d22e  gcc/testsuite/gcc.target/aarch64/torture/pr111677.c
  5266ac107a73e3ee1d1f44e1cda7d9f2  gcc/testsuite/gcc.target/aarch64/torture/simd-abi-1.c
  9c3416db2fc04c3f91b03ecae15e943e  gcc/testsuite/gcc.target/aarch64/torture/simd-abi-10.c
  df55bfe2c1ce46074b19b4566cedeef4  gcc/testsuite/gcc.target/aarch64/torture/simd-abi-11.c
*************** a9f54382c872d8300abd0751aaf2baa7  gcc/te
*** 56274,56279 ****
--- 56456,56463 ----
  c4eec60b3306ebc857f91dd9f92ff8fe  gcc/testsuite/gcc.target/alpha/max-1.c
  868d557785ef579297eaa8d96b97b3fc  gcc/testsuite/gcc.target/alpha/max-2.c
  cda436a64900819743f9c85f6ef0caae  gcc/testsuite/gcc.target/alpha/pr105209.c
+ 29ae801d98cc199cb5dde311a9649e2c  gcc/testsuite/gcc.target/alpha/pr106966.c
+ d2f13118de8962e07bca23bc88ac4d1b  gcc/testsuite/gcc.target/alpha/pr115297.c
  dc5943b1dd495250e6dc8076b32c902c  gcc/testsuite/gcc.target/alpha/pr19518.c
  f8467590e67b2b5f4718d571a9ba60c0  gcc/testsuite/gcc.target/alpha/pr22093.c
  b36471f8edbf2a11ce23359823ecc10b  gcc/testsuite/gcc.target/alpha/pr24178.c
*************** e5b7374e291244b801b4c292504d3f80  gcc/te
*** 56522,56528 ****
  5ae0b75d3edc7d5441f595fec368443c  gcc/testsuite/gcc.target/arm/acle/cde-mve-error-1.c
  3ef89af25e41c2840ae4eb47d8fe80fe  gcc/testsuite/gcc.target/arm/acle/cde-mve-error-2.c
  94bcf4eb76f1c5723627b1baedcdc159  gcc/testsuite/gcc.target/arm/acle/cde-mve-error-3.c
! 75b2f5f65508805b6809f9df652deb28  gcc/testsuite/gcc.target/arm/acle/cde-mve-full-assembly.c
  c7f80609570e0d905fcd9cff2e6350ed  gcc/testsuite/gcc.target/arm/acle/cde-mve-tests.c
  717b6b8eab0fad73225367b08781c73c  gcc/testsuite/gcc.target/arm/acle/cde.c
  9fc59b91aee2a52356be7a0ba683ae10  gcc/testsuite/gcc.target/arm/acle/cde_v_1.c
--- 56706,56712 ----
  5ae0b75d3edc7d5441f595fec368443c  gcc/testsuite/gcc.target/arm/acle/cde-mve-error-1.c
  3ef89af25e41c2840ae4eb47d8fe80fe  gcc/testsuite/gcc.target/arm/acle/cde-mve-error-2.c
  94bcf4eb76f1c5723627b1baedcdc159  gcc/testsuite/gcc.target/arm/acle/cde-mve-error-3.c
! 9edc65f11a25b2a11fea36f198714e1b  gcc/testsuite/gcc.target/arm/acle/cde-mve-full-assembly.c
  c7f80609570e0d905fcd9cff2e6350ed  gcc/testsuite/gcc.target/arm/acle/cde-mve-tests.c
  717b6b8eab0fad73225367b08781c73c  gcc/testsuite/gcc.target/arm/acle/cde.c
  9fc59b91aee2a52356be7a0ba683ae10  gcc/testsuite/gcc.target/arm/acle/cde_v_1.c
*************** ce1fe2059d8e263b0f3d889cb1392892  gcc/te
*** 56745,56750 ****
--- 56929,56936 ----
  a29c7dfe0255ba24ca52aa9293640971  gcc/testsuite/gcc.target/arm/cmse/cmse-8.x
  ce946170746cf737bca71ec699014fef  gcc/testsuite/gcc.target/arm/cmse/cmse-9.c
  4cff09e964949ce40d8295aef9e8721c  gcc/testsuite/gcc.target/arm/cmse/cmse.exp
+ 2ca1bc1b7709560cb23249102afd2dd8  gcc/testsuite/gcc.target/arm/cmse/extend-param.c
+ e37af808fb07f04f12fd1323772cfb18  gcc/testsuite/gcc.target/arm/cmse/extend-return.c
  6e9c9a777c4a333e2bdba95bdaf23364  gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c
  c540adef0c0a8fc3e8e03fee5f712683  gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c
  727ae9b55594654191b60afa67ad5094  gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c
*************** c6b1f31177a60b170040e0eddc1787ba  gcc/te
*** 57022,57037 ****
  56a0fbce4d79d10043dc3f64ce0aa364  gcc/testsuite/gcc.target/arm/mve/general-c/type_redef_1.c
  f7aa4c937541029a5bd3fe618bef6974  gcc/testsuite/gcc.target/arm/mve/general/double_pragmas_1.c
  e787e32385a63c5e015b59725e3d0250  gcc/testsuite/gcc.target/arm/mve/general/nomve_1.c
! 0cb82b3c13272daae33b86a0b70c3ab4  gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c
! f6c2f6c35390e01c453145baae48aa6b  gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c
  8742cb74c36fe44acebeaf852842a44d  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve-vldstr16-no-writeback.c
  f846a99fa37aa6932ef3fa1100fa2e84  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c
  a23662cdce162388aafacd6bd5ae8401  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c
- 4b3d64afb38db51bd5eac30322143dd4  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c
  132717e92c239271ccfc4f567a61fd56  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu1.c
  7831959c4528e6a37429d37461c09bd6  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu2.c
  9b8afb9ef88ec69d20f93267dfc70f09  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu3.c
  9e92f2f97d3d1ab5f56f69c957ed79d2  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_immediates_1_n.c
  5d5bd4c946d0704e8f9c836b2e2a0f59  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall1.c
  5c78178c71e076f2f1c218053a2f991b  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall2.c
  a55cf229f5fac9dc5cf365b9fd80f3cf  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_load_from_array.c
--- 57208,57225 ----
  56a0fbce4d79d10043dc3f64ce0aa364  gcc/testsuite/gcc.target/arm/mve/general-c/type_redef_1.c
  f7aa4c937541029a5bd3fe618bef6974  gcc/testsuite/gcc.target/arm/mve/general/double_pragmas_1.c
  e787e32385a63c5e015b59725e3d0250  gcc/testsuite/gcc.target/arm/mve/general/nomve_1.c
! 398e4816db99fac1f05cd83d7d9911ec  gcc/testsuite/gcc.target/arm/mve/general/preserve_user_namespace_1.c
! 2884159c19b60a0ae3743c8a1b9c6729  gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c
! c52dd6cedef3761b071c005d8eda4014  gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c
  8742cb74c36fe44acebeaf852842a44d  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve-vldstr16-no-writeback.c
  f846a99fa37aa6932ef3fa1100fa2e84  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c
  a23662cdce162388aafacd6bd5ae8401  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c
  132717e92c239271ccfc4f567a61fd56  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu1.c
  7831959c4528e6a37429d37461c09bd6  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu2.c
  9b8afb9ef88ec69d20f93267dfc70f09  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu3.c
  9e92f2f97d3d1ab5f56f69c957ed79d2  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_immediates_1_n.c
+ c0dfb3031a71bf38c74108e68896dda2  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c
+ b6d45c751e3ce658dc416f5956467273  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c
  5d5bd4c946d0704e8f9c836b2e2a0f59  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall1.c
  5c78178c71e076f2f1c218053a2f991b  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall2.c
  a55cf229f5fac9dc5cf365b9fd80f3cf  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_load_from_array.c
*************** eca0b9cdc77f8bcef8a2dc068fb71496  gcc/te
*** 57040,57059 ****
  e26202d4edf71145c7492beb44747a0f  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_scalar_shifts2.c
  15a58a4158f594cbc69086ecf6b64466  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_scalar_shifts3.c
  1b4ce2e92abf2730c7abea79e8bccdd2  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_scalar_shifts4.c
- d05b003ee6273110a9a0a60e23bd9e51  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_m.c
- 8ddb5914a97d60a0bc689177c6c43202  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_n.c
- a1ffb5a33502274076e8725ca488460b  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u16.c
- eeced768f90773336a8e655dd3e6d745  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u32.c
- 7b80060d84239248f0825fe307e58cee  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u8.c
- ef1da1680a813c7626173fb91b03a005  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u16.c
- 589b2925839004e83eda1fc9439c84db  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u32.c
- 0032e9c677f523e5f916e90609c0bbcc  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u8.c
- c73a0151640cafd579ef2cebc2748a9c  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u16.c
- 42d3d806d02bfe8bb17fb75f16c3ebde  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u32.c
- 30bc9ae77c0bfa8217701e4763069ae0  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u8.c
- 19508acf6ed2e48bf7447e12ba17257c  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u16.c
- db40c3bf601f9b12691129c0e8e70dae  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u32.c
- 4c11df1f4c50ea547d741dd91c0fa2dd  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u8.c
  43356f1e9c172de416a76a5e3cb7bd41  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vec_duplicate.c
  ed089be1753df1b68f1691f9880adaaf  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vec_extracts_from_memory.c
  6390245b323f08a5431e32f023949d47  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_float.c
--- 57228,57233 ----
*************** ed089be1753df1b68f1691f9880adaaf  gcc/te
*** 57065,57910 ****
  069c08fd0fcab509146f627d08e18c0a  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint.c
  77d83324236c668a785ce5ede9121bf0  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint1.c
  93021582c80b4770ce7f4bad688c5517  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint2.c
- 87775cfe2daefb41beab415692b24339  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u16.c
- 2681dd7629582cca6315bf7f1ff28ba5  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u32.c
- 8709512956f087c96d79a9f4e7bfddd2  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u8.c
- 2f72089ebb5a8cf3bd846fd134e28de0  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u16.c
- b946ab39cf354abf1d925cda444d32eb  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u32.c
- d3855ffc72e83d811baa497b80d8afae  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u8.c
- bd7b53b643a24ab94441135df450cf48  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u16.c
- 7a00fc55b24f67ba255e62f1cc7cb667  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u32.c
- 3e359d787b20587509852dc1214a2c7c  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u8.c
- 6d723f3ed57bbf59958eeeaaa8d7f804  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u16.c
- aad5c23b3b136581e26cb0b4bfe7f686  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u32.c
- 760cdce1e28601fef6f8a0460331c343  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u8.c
  63da76cd2f472ca8300c724a88ec9360  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldr.c
  f291ad2973c42aaafa8eee3d90823aa3  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldr_z.c
- 694c29401e50679c1061ace977f8181c  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_s64.c
- fd7f00c7b409567c045377bb049bccc3  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_u64.c
- 67d015469c99da938f4caafb9be0847f  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_s64.c
- 06d0027bac13b91c88cb81f214962d34  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_u64.c
- 4609a7bcf59c2ee45dc64bb516346fea  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_s64.c
- 5a48d7eda87b4180f60ba9b6b5e6dd12  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_u64.c
- 4f13951416abc9c430667a699cd407cf  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_s64.c
- adbed7e50b8a63ca1120b63e259d59ed  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_u64.c
- 5a2e9376cfea20a8da117de94fcaf039  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_f16.c
- fd5fe924bc82fae91add92ab6b89fc2f  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s16.c
- bdc4cb01afb0e7dbab9ac6901f884e75  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s32.c
- ebeb424c97d065d702d1579297c5f0c1  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u16.c
- bc2011be6fa4e4b0dc61add5d72612ca  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u32.c
- 6fd5705b39575be1a76ae8c898868227  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_f16.c
- 3feaaeb7cf1cd8716b174004fe72a105  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s16.c
- 55a3992d44ce0a07a9f7a6b94406fca9  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s32.c
- 683d489adf3114e3b91d1eb1592a45fa  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u16.c
- de731542891be754acebd4429477b23c  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u32.c
- 633019f69ab9972043de611074092f2d  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_f16.c
- fa74fcd0f61de0f0434c72e79ce34428  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s16.c
- 50a5d7ae56d16d763f504b4fd03bb5d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s32.c
- 7ed9a306ef30505c69ac98042396d76d  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u16.c
- bb02456c40bcb21ee9a416421c2e59bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u32.c
- e45b89cbec60fbd4ecd02c37fae89c89  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_f16.c
- 86034027b30a2ad2ed88769c369ca7c5  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s16.c
- 2e8c65f42022e3d5fd1ef78b4416b25a  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s32.c
- a22cd4357605f17eccea3fc87b194c35  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u16.c
- db61c22fd3759a3f57b4dbf66b2f7bd5  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u32.c
- 2b142d10b10b9234746f4222ddbf4f85  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_f32.c
- aa4fd0d54f30de9e9f85837bc761b68f  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_s32.c
- cd9a3e018cc1858becdb10cd0b7440a6  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_u32.c
- d7353e7d66c38cb2ff25fcc7cb925656  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_f32.c
- 52c03b09800b78720643e0237e2b6adb  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_s32.c
- 4b57804ded90799b5a38bdd989934277  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_u32.c
- 2c58c5e92b69128fb037f38acac47c6a  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_f32.c
- 8460ed66017322daea37d829801629b1  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_s32.c
- 8d6c3b397fe67b68509e7b3a61a77bc4  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_u32.c
- bfc9157332eb986a5dd5bad012321474  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_f32.c
- 71f9cde7e4d90f780abc8583449f2c34  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_s32.c
- e0b91459754372b8e6cb9a553b7a8f43  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_u32.c
  8a5ff8e591c706f8d608efd24384ee87  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_base.c
  d334d5432e0169d9c5e776bbd2d96f81  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_base_p.c
  ab72cfcef8400549b3b4d4d318e4955e  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_offset.c
  6812d15c5d1d195247aecef70c46e968  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_offset_p.c
- c879488b4e9c56c955efe3d925ec2ca5  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset.c
- 4b0efd440cdb0d7b7cd6b447ef77e2eb  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset_p.c
  08cf164f5014eeb82272fbef22e3878f  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstr.c
  4211e73819bb661ddd18271cf8dab0e5  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstr_p.c
  cfb4125c4550d5cf153bac3dcd2886ad  gcc/testsuite/gcc.target/arm/mve/intrinsics/pr101016.c
  a8d3fa3695fbd309660950fb5598ecaf  gcc/testsuite/gcc.target/arm/mve/intrinsics/pr97327.c
! 32beda1d8b877842f131d22f6fedf40a  gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c
! a4d907ca6afd778aa767f352e05785f5  gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c
  e49e7d0224d2de2b6eb25c3a244cd391  gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat64.c
! 00176b9ad4686e996470aecd439446d6  gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c
! dbad131fe0199d3f76c14d3aaeff803a  gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c
! 7a7b399f8a88fb15df816ee3ab9ed006  gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c
! b0d7d210370411c70fd0652ffaf3b2c3  gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c
! 2f1a424a10ce8de0c26a8246b214675a  gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c
! a3434a9d7a616cb9fee20a723c458593  gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c
  e368cc732c7e899ba1b61e691ec9cf54  gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat64.c
! df219bf2f772cd3fc958be5fe4e0fa17  gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c
! eb44348f498f11e5fe4fed9516dedd3a  gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c
! f0053fe2799d5893d084185820fe655b  gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c
! bee152e91177477fc44602122786a6b8  gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c
! 00f1b1875c4a86d85bb09047caa4fd61  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s16.c
! e87bfe4d3d8cd3a54e0626ce2d2ade42  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s32.c
! 9453bec6bc28e0815b6ff5b80b737b62  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s8.c
! 6b9d1c1c98bd8df85ec880d0d7ba6f33  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u16.c
! 70f689454b74d0bee4652d1835cdfd37  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u32.c
! 698c4772503537e127b5919ea227ba9f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u8.c
! 4f7175e4cce74c0f093ca2e3fb5f4935  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s16.c
! 8dd1af66daca71b88b57cd7e4f873516  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s32.c
! 866663de683d7d24b3c7d70a6d9f40fc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s8.c
! 98c902c7e76d45f82eb2c2e76f92b8df  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u16.c
! 0adcb111d52201ed421cbdebeec346a8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u32.c
! 5023045576ce79adf90c0cf4dffcf292  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u8.c
! ac55498e54132bfb485eb241a77f38af  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f16.c
! 2d0033ba6523b002f7599b3f9e31d296  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f32.c
! 3ca537d5f80c59d47d8149534a6f454f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f16.c
! ee4254f95799bed77863ff93b8ed92ec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f32.c
! 5b3d07b95052edaaa44e9da69f7728db  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s16.c
! e52550a208f8153864ca08ad546e8478  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s32.c
! 29aae19f780d5f6635f17efbc84979c4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s8.c
! aa85822fc9fd50334d146560d73a895a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u16.c
! c0c3146dc4843f570209e5547565bb96  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u32.c
! 7224b0bf553f65f70701dd1968f08ac1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u8.c
! 95ee127252413f3d3dc44153994f78df  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s16.c
! af46bb4564212f687aa8f3edc34f85a9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s32.c
! ad3ea6bcfbe7606c3affad1d8d65d498  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s8.c
! 538b70807bcd1b079eb25dfde3a45a44  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u16.c
! 23adcdec0bb07fd7b16ea36569e060bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u32.c
! 6e0def62545b047b729f307e47f129ba  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u8.c
! faf62d20a876caa7de128ed116d3ab06  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f16.c
! 4438abd9df779036670aaad5773e8c8a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f32.c
! 9c5da15534e898616ca5878f6c9af0bc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s16.c
! 6c1019acff34cba9e879bacbfee3dd46  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s32.c
! 9a8eca33848e25aaa1570ef75720604e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s8.c
! 9a2a0d240efd474434d2f4ebd8fdc5be  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u16.c
! 58fa5687c893cb4ed12c0e11733227b7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u32.c
! c4e64183e154ad88581d7d5c272c2ab2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u8.c
! 3b184fb35827e4976a94ac6022ed4f10  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c
! 151f9d1bd2203c2148862d9f9b55a9d3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c
! 5fb422c7fe1da6ee4b55d8b5583d4205  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c
! f28c1f560f538c8756df88428fe94bb4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c
! e8b1ccd9614894d6469ac04d6ea8038f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c
! 8f6da3f5eb920659117410742c70e8ef  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c
! 2b81d12739d9532400270deb078f07ef  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c
! 3849185d7aac571d06c52cefc2d75091  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c
! c8839a478bfc87fbfd4dc612aa5e693f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c
! 5d769b091b0e22cb6226f820eaf26392  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c
! 45b7d1a30d1010b288f43c2775b5beb6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c
! 032fd8b290c3b06e9c83183dfb9a8ac5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c
! 258df1eaf1997d465aa2f56eaa188ab2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c
! 619af39cffc151ec5a060d286887ca38  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c
! 3f3705d1dcc21febd482bdd38438efb1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c
! 45df11d019e1c415de804c92e6f0607d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c
! a4721aff489d8876cd68728618b26bff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c
! cbb1be2c4f6881560829cdf5557fb482  gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c
! 7dba1d016a137bfbdea4442072264c88  gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c
! 480213b8fe68098dd2a726e3bca656f9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c
! 36ab78b0866877402ff5ae68a95c40a8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c
! 071587739f43bec02d918e5876bb5ff6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c
! 5aa04eeb4e1c916325eddb7ff9ecfcaa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c
! 715fe4624b6aa89221dac6fcff9e7851  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c
! 153dc5f3dc0065e5b6237fbe52602c0e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c
! a45f027483a76d43e8424b36a4bf11ab  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c
! 444be46e12387f7d136cbec55ef1d9e3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c
! 9c2d5d86a1aff359deb1daeeb8bb14f4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c
! b67d1a185f930021fff8a060f996c4ec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c
! b19c484dfc31b74049beba2bdd01b4be  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c
! 9ee04dc08a4b656057bc86fdccb0bc09  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c
! 234bfb159bbe242764df36998231a319  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c
! 8ce3cd1a0c2bf515cc47ab34a03b59f3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c
! a2a8f4f71523ec9fa826e17222c630ed  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c
! ddf2b84dcea090c2db30c0eb7befe8e9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c
! e2189168ec86365d6e24562665a3a236  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c
! 51dac737dc760236b1b81fbd29d0aad2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c
! f03346639a8f9a612687c160b2f2ccb0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c
! d58bda7d1774178a904ae23f99cf08dc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c
! 6a2f46e2978e72ab4df470a4db1da154  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c
! 2cc8df00f4d2315aa1e38c835b563119  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c
! c254b08ab6cce660d466809ceb4b62c3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c
! f80b8d433fb874db151013695727b8e3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c
! 11df3bfb9568e28c93558cfbeb9a2be5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c
! 5e9abafe29cc80d07a8f3345f96b2dd0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c
! 9c4c00e4b1fc86ff70ca0069abeec2da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c
! 983fce255b6f693a73c398765d7e7e79  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c
! 26629fe1dd64bb7a2daa20f400ea5aff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c
! dd7d18fc5151072b2720cd4a6c4977a4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c
! bddacaf1c827dd056775e514c3551c10  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c
! 96413d8c515b20945c01b760870c550e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c
! 9055bbc6fe82c4f6c5f54cb953d1a964  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c
! f46dba49bf4f9a715d45f127e84c19f0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c
! 9a0d3e3580bbddd53e712f791e17e9d3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c
! f43e212c75fcca5329394340b473ca88  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c
! 9f2b4028e8bb750c1a6c566df5f9c861  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c
! 1fc0bd9a30eb3e0ab3a8a5654d9b69ed  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c
! 6895a1276395ec5b8b1adc80d509c1e6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c
! bc51cfea52734e391b9ff75bf386eb11  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c
! 8aacb1f559de838b143e6d78199a6e46  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c
! a2f05e11a93302b5bc9ae2dc25354eec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c
! 2b9c5fb15d596abf13aa6f525a348eb4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c
! b39c913a4ee491bd18014c705491352c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c
! 5db4ef41239079fffa33cfc2ed380703  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c
! 0513cc3c7094568358d88b9d00183d28  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c
! b99634c5e2c09ade2cc6fd4c9c60eb15  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c
! 27e690e9221805df6fa4f1cacb1a8055  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c
! 9537e3e324f3848c865129789700716d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c
! bc9822920c9660ad8dbca423bcf355d6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c
! 88782a692febf452b8aa48e3f6c91458  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c
! f4945166cbe936b263e35bec2b028f1f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c
! d6bda434b499464d450df0c15181c333  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c
! ab10b01c5e0a9bf748d872602714d7c7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c
! e1891a9790993814da69e376dc997071  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c
! a113799d0b941d778155ec1553aff824  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c
! e7b85e38905bb8b5604d40ced034406b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c
! 91007c710f4fca4977033c5630d0228b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c
! 2a71dbae11fe613922eed5a4f240e4c4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c
! 2a87d7aac1246753bea7c47c038d9b55  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c
! 66e4bfdb5cddc46e8b106ee84c708735  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c
! e6d8ac29e5b786aebdb6efa73e911221  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c
! 7a8133bca1178bf1faabea53575ed972  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c
! aae4f543dd94e9247f9c24db6589c0e5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c
! faeeb830bf7c33518c70f04f96feb99f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c
! 7a526f6aa950bd8c7b16a39d50824ac9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c
! 47ca53fd5148630236d3559bfd235585  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c
! 01529e243fdfa14027c7852e2a3c1159  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c
! e298cdea744ff6e471a3816033eb2620  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c
! 985eb3dbef130486a5e9e69fd641b020  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c
! 28dfbc3f5047b5584ec2a72e1ae29e65  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c
! 708fccd1411473d3820daff6e7c0d5ba  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c
! 26463d3da76b34b281ed8bb1a36173eb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c
! 90daa6c199c4128a49b03e90ef26443a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c
! 2ee93b419ba3401477df1057bd772ddf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c
! 2bac5509a3b14ad34460044578c642a7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c
! a7f6a13d5d5393306d3d23af4ca295a6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c
! 177f8fc99b165d89244db7fc892ea090  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c
! 6ac1f7f4090f98933bf1a32fa943e74d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c
! fbddbf93a7d7df364ec1ba00e64b17bd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c
! a7b76316bac571de2145e4b0108ab51c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c
! 6d55f0f4292e7019b81e6dee5da56e7d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c
! ccff58930aa5b3d2dc16ef47f60ac839  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c
! 5ee97df93b49f7e02c6a2c6ef0e66151  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c
! 61f0a8e95b571b82acece5595f5ef6cf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c
! 30da4004c5e70a357aaf4b9e15ca5269  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c
! f0ed1a6ead4b4d59f59339049b418ba8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c
! 493f64e8a4aeacf8b1be21a78c5a02c3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c
! dd263a0da78b69ac3967bd2c6a212939  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c
! 864f6f91515bb623e648184a9fb61df1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c
! 06206a423234cf7e860e176ec908702c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c
! 8559ee1a7887ff127494625c9edbfeb1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c
! d679417befe719a3507ed9bd0a4c6342  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c
! 55d4ca996e9d1d0a613e481fcfe73968  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c
! c8d0748c06c28bb87fb843165cdb0b9b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c
! a4e0b2639ce7d3a2d95f8700ff1dafbc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c
! 36dbbc8caae15708521a227c1b4dc75d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c
! 54334eff3c419cfff6e5341c87f0e9e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c
! 4757b148440e164154d3fe01094db95e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c
! 453998ebab97d9c383394e7e1ed6a6a0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c
! 72207358edaca0e52cd8cdd0149b1427  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c
! 2d277d21d6965ade2e53acd92cd406f7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c
! 7d0dfe1b636cd7a25cab4257072281a9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c
! 3e1b14216cf375c8611686dc29df2597  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c
! e15d61aed1418bd99732d464e5a69aa7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c
! 8efc39ebf00a71c16c427bf848726123  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c
! 7876295769e6494379dbf1c77cb971fa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c
! 8eb7248b0d2bd24f4479129a1fab845e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c
! f1e786ff8d3ea24008f98b44e3626c9d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c
! f3c7bec6445e1f37875a63c5b4d0adad  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c
! de16ebdc061a33ca749a517021208817  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c
! fa74dfec139822389fe8f77cb67a9739  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c
! a0fa35d49e60fdf10fddbf7b9eb65078  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c
! 2c8c6dbf9ffac092efc55094444d48fa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c
! 9e4d96d3dfa72ed08e951db3d81859d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c
! a987822271c59d0cdf7a6ccd3c1311a4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c
! df8af4a77bfc7ac21625271d64530b1b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c
! 11dcac7664919b64d9e5771e65221b36  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c
! 8ac0aa11c0c56215fac4aa7d47c9f5bc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c
! 3181266452ef8e127f66ec12e01edc91  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c
! ed65c75940a674ac8d844a085a9610fd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c
! 5f7ae0273f220c5d167d95c726f6ab5c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c
! 58826b6f6a0717becbfed7808ccb1f50  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c
! 5849552915daaf01438960ff8018de72  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u16.c
! c1f8e410162cdc609125b18602bdaee2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u32.c
! 64558a0d7e601f341ffc78b7e18fe095  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u8.c
! 4ea455e5be27e71256b5577c85bcf8e9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c
! 867c42633cc98dca441e5ba26a901dee  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c
! 3c8e4765746266bb1848720d5c62ce75  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c
! b570736b3e0ca58fed8460c65ad2173f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c
! 082da8f212452887203971a8cb68231e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c
! e52ca5b837de98d3ab66105837b36393  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c
! b3369a91eee326640ab0db084a6c91e2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c
! a0078f2998fdb1c298bb2a73edf4becb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c
! 7a2cd12d28922f47fa9a9dbdad32c8de  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c
! 42b8f7fb0bb73b1d7d76ef4e0e333728  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c
! 4ed32590b5d17a2a3a487ebd95fc8285  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f16.c
! 16764faf4134c458b5c8bea8e5cbfb7e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f32.c
! cc2b4c805b20aa36f6673adf577aa142  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s16.c
! 52b486ed33fa26c7656f25589f1a8bca  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s32.c
! a8ab89508ac6dc80030c66745e281828  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s8.c
! 14ca2f9ddb4835d0250aa7da331fbc04  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u16.c
! 2635d3353709b399a219210f9d41fc2d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u32.c
! b159c516c8c9b5729ece410504023fb6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u8.c
! e9bb48a5e2506175560e9e567fada830  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c
! 14b4d67272d8918e02f7f43824870c78  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c
! b92f9b9b38a84373855be2d8d83a9fc2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c
! f299aa3345f4ac6694e0bc3aae948e02  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c
! 780bed8a00eba5cff40720088ec96f6c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c
! cc9c95e7448bd0ccddd50cb737182d56  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c
! d6f22137487ac8de4de3cf78b19fad97  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c
! e7c12cb649ccf2f24c3a1f22fc8407de  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c
! cef44fc9331f5aebee4da1ff275f6946  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c
! aa8ca31504535c05c725ea3b9d47e778  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c
! e05530375fdca186a24de4af877c01e3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c
! 34d9c3329866d529ef2836b9247b4499  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c
! b7d06a9b9ee288984b6e0b4f1605eff4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c
! 9bacdd4a23b19dc45909a994485b4595  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c
! 6ec28286476f975bb0a96fdfd28c7f4f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c
! 83281ea6017cbd409d588bc4af874c15  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c
! 6b127c0d2a33ad79abeaf4b92e319180  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c
! ce5be4cbf440e0a2ff85b08ed6c1d6a1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c
! 3b1a63a013e71306bc0ae325a28d5bc3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c
! c34225407e82441510ee62e36ed28bf1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c
! d1006e9771da810b05faaed97704caf5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c
! 06b19bee2309cf8aef602d176877594d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c
! ad641ad69fd40905b75efc98ed0ffd85  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c
! ffd86e684e7fef863a6a1fa52fc3bcc6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c
! c18df38c835af7ca09ac10ffa2e249be  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c
! fa80178c80fda376917da2900567de6e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c
! f00cff849f24309ac9908c19a799efbb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c
! b3dd396b43d828540664243003e29996  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c
! cbd59c625b3e19703cc264c6f38c43a8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c
! f3830db15069923eadd5818494e669b8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c
! cf1edb8b07d6b961a5018bd5d5e956d7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c
! 45bf8b6bc9fcc05817dd8c71729037e3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c
! e4a8099da3c8470ae5fb338feaf18454  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c
! 37bec311a7d61e3c637fc4d4be7454fb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c
! 0fefcfda8f22800d3ffb01960ce64732  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c
! c1e6cbe8203629691932d264d43889a1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c
! b62a55658449e9a3b709c14f7e711a66  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c
! b136ffe0f0c0976c51e5a389c62593bf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c
! eb557361971960e9606cbf1cf07244bd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c
! 6a2fa7009235eebf74917713518bd233  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c
! d1dd7473d6172f660c57ee57b2b95149  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c
! 59b7a48b669cadd4fd78c0662923afa2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c
! f80c7251cad58ac3c655bbb33b086fd2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c
! 6dab236a4e65b38383aadf2b313b38ef  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c
! d2ba4ddce877fa81ad6702d1ef62a713  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c
! cc2f5f9e606f56728a7d6e350fc35660  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c
! f2b9583dd39285f5cc3b2bfcabb1d767  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c
! 73c1b83edc716e562ab24219a20e7971  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c
! 392976d3553405103c58ba242c96ce37  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c
! 302647053b07694273d1df6efbf6e704  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c
! 5e7d48aef68283a4bca588f169107082  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c
! 0cdd9e5bc0e784ba82bc92e987f32082  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c
! 7c6ee4a70d60a71a20a279cada721563  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c
! 728d6da6a45e9f209ddb933868f50212  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c
! 9b52a1fbbf45bb17043cb0e909c4d1f4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c
! 5160d4d9e802111ea192a8616de36e63  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c
! 76ebc526891bd2e092d7b36b8ef1508d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c
! 7d04a54da4a2feea98560248211be0fa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c
! 86557ca1dc6a62dfca6868033f1b6367  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c
! 2d4f11bf577ee0b2c6498e515d3e47ae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c
! fb33b745bd7906e44946b061c6a99261  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c
! 30dd3870b6a84c0baa09a78d5661d9b8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c
! 1e401ca949bf3b0ac1eddb991921e617  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c
! 3d6b925ae0cd04b129f87705597e324e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c
! 2ece657f007b044d91c4d1423682ed44  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c
! 1dc74c6f2f4d4509bcf0e62ef3c01b19  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c
! aca2ec867411b2a0cad15e0991d4a432  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c
! 89deea12bbbaa3ecd2dcf18cf2c3bda1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c
! 78a3af1ecb0c2654ca5722dd2bcdb1e0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c
! 0618ea450d286111d1633beeaf506198  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c
! 45ffef3e248cb8863215c0df431cb56a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c
! a641748319ec1a05d43bf3d18565c2c5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c
! 7ec1cf3c02b78bf31f4d683dd7b6d9b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c
! b86b34c153abf859889adefd26d7f873  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c
! 894461e820cadf8f20fea21943cf555f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c
! ef525a30055fe04e9197bebc6361073c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c
! c964f433b2a92f7ca2a3bcd8fef17a38  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c
! d79276519307987388130f183cfa024a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c
! 487c45df12c917684d9665614b2b2a0d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c
! 51b5ac8c3859dcf3810a9fd9e420c83f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c
! 7d3a0102dcf9bc0f3d75c54dacb38c70  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c
! e08f5b97de17bb3ef423dcd8ecda8d7a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c
! a75e96e7898e7f5f49dce8e5ab1404b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c
! 42bff25a4304672c29db805665340fa0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c
! 7d95bd653ab4acfd8440a8fb14283bbd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c
! 8800da4ec47e6e3febb3ddaf50b41ec3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c
! 64bfa6be7a9c22f698b993cbb1214354  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c
! 85ea53ca3abbc296bde9928b6ca41abd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c
! 9b9d2faa7388914f70d471c6cc50b7e1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c
! f29fbe66bd082c655f3da7db03b5fc11  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c
! 84adea76071db238ddbe6e4f4a6bc03b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c
! be148f67970d91da4abf5c7c48c4c41e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c
! 5d69b86696e81df8fa5090b4c00be72f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c
! 4c30fb880dbcd7c3faf308cb658a87a6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c
! 943d51b14b7d28c222bed01caff6e081  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c
! 4f0e209ebfcdadd01e9372faa277a9be  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c
! e6cdb76114fe00674ce3baac9fd4aa96  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c
! 64923d2058d2a30aa69e97e4946a0c8d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c
! 0abae747b1dda6c123a17a87d062874c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c
! 4269bcaa0d87b7c5b4988d2dece4cb7a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c
! 049b349f1e68d74f845d19053445775f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c
! 2d16f383aa94e91815ba5d7405f4c607  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c
! 01d2d7bb69f52a77414b982b437f284c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c
! a10568417171db71dea81f0d95b280ba  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c
! bcd0c52eac573ceaa36daa2c3346b58e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c
! 7b6ef4902dd539bdc06ed961291179b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c
! 52f3c56d03e7d111deb5ab97938dfba8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c
! 487690db146d3e458d69b627093d7968  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c
! 8b81d3115556aeb617208394ba6a900d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c
! 8518d7fbe54c979fa04b6b1ede4e79a1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c
! fbdd3037353e2d4ea41e8fc8b0d11159  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c
! 8fbc143e3c9a1cb2d764bc5857e8a0dc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c
! 22fc2a52e10e40f5ab7db0227a22ee2d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c
! 09e336cc5b9ee4974f4533f0a38d759a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c
! b3b607109f86809901de798220b4b573  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c
! 80867b04527ff18b34bb3b9539ba4fb4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c
! 162e8a3473421ab61ef633c185bee42a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c
! 054cdda21795bda63b7977ebd52c5fb0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c
! cec65a12c0c20b9691420c1b2823e18e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c
! c1e5f2a63ee8348816b66faa101f768e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c
! 5f0e3b5f1375e4e69542b6622b396a26  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c
! 8f9a9fe793cce5717f25fa192f2ea90b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c
! 0e831c12545ac886350469acbaf9e9f9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c
! 1daeeaa840e32720b33a4491d566da30  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c
! a545f33b0ca92479b36f51ed34866507  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c
! cda26ea5eb688daa79e6c760cc0bd018  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c
! 3c40fb6f18cb971293599fc73682f189  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c
! 9f431a9ce9048d038cde3e5d006d49a8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c
! a65c07e69ba1cffe23c97a995f467dea  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c
! d0c9e71776d51e11bbeebd48ff879be1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c
! 6109a303e1c5c1ee8f76139644dae6ad  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c
! b645efed5040a8147ab3cbe10a7439e6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c
! caf4b531a5440b29296a30598e933280  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c
! 5481db2a7bdf7fdf4bb0fffa8a3703a2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c
! eb2b0102e2349fd7876b891a85769230  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c
! 636ff9fd1f4a87d476281683b1bd37e3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c
! bcaac43ccf6073c848d7b094c1f54025  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c
! 58f11fdd5a858086998b1f4f84867b34  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c
! 7e7eccaec12ab0f068e1b3dc7c76f229  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c
! 47df0a72159cbad28fe4ba33b1f612cd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c
! fef38da315a7cf9923b502b76ca987fc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c
! faa3984734990f68290a3125f58c5081  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c
! 34592c03632fb4b7e11e913d3e3fa7cf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c
! 05bb2de318f03578a21b0755f1b1bbe2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c
! d8d4af984ae38df256cf64e0acfd3f9d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c
! 18b56721484059e198d9f397a86d5bce  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c
! 1218b32ab84c4a87ab60fc6ea328c079  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c
! 64ebcee365f72d2b4617f30a874d1200  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c
! 2459d10fa92c11de96d1c77592e6420e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c
! 200ab1f4410b9e618de0dbe77408781e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c
! 8ba68d2303d792d96fec5cb31cb8db80  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c
! e98cafe24c1dfb90970ed7cfac4215ec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c
! 47434a5a898f5c6af8802cf542ddad7a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c
! 0dfa6833b02a452ba9228772ffe40ed7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c
! 61829b23cedf346d3da410758735ce57  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c
! 649510cb72a747e44ef15ea6c4fe07ff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c
! 30252ae7d5c88cc0a5f76914e275e158  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c
! 5979c9ea7e766c27ade85cdc3500f4ba  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c
! 2cb55fdacc8082df22160ff17c4e7a04  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c
! b2bdb73a7270fa036ef08f7bb7a27d45  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c
! 7ad05db9ed1ad76b58740d71f102259f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c
! 3b3c314d0dcb87dbd1205c0743e82245  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c
! e887327a7fdbc202f9f888879413cc8a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c
! 2fde40199e9b4c71cf7b40a04d7722d6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c
! 1b7104711e3e89b3cb5eb01ba67e2819  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c
! ae5ec11c296ecc29ea42c52bb41520c8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c
! a55937710182642a011010534d884689  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c
! 5ec5df57e830abc5794149ae054d2053  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c
! 86f45218ab88c9497b150a3fc3fda43e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c
! 50da8bd1ae31dd83a46dfa4db86aa6aa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c
! ea6f3d835ad126b5b6392b8b044c58e9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c
! 1b45b14c3a8ce0e49413828cb930d93f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c
! f98682b9eda3ccada9988238ca77f787  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c
! 6baa946b5cad4696fe62aa8861f0005e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c
! fa9c9b238dc41118e7b80e054aeb00ad  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c
! 3752e350be4289dd9e7de803f9db8d38  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c
! 305e4cd7d4ab5563aa09f51fa8f5472e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c
! 1faa84b7aadaa19a8b49b0397a49a340  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c
! 69ff6060e176567b9d2ed579eaa7f7fc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c
! 9226dce650e2cc62554bb4f38da0e3ae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c
! bb5564ad0dcb5b847b44f9695ba9f0b8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c
! c08edbeea5f4a3bf7eb4e6310a10255e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c
! 9f8dd55542db5edd5661a0be2e52250f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c
! 3bf6131ff423b064102c843aa19bf72a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c
! 31ecd36de8185339dc4f6afb5ddf6c88  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c
! a946e789d488206b36cbd4cf3a98320e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c
! 41706fb4123147e43c4d655aeb5c5420  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c
! 180e7e263654ccca02e86312f2502981  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c
! f049ad1ed11afcdc847955f25dc5eaaf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c
! 6d360824d84cab96cc28d1b62046263b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c
! 1cd78a11dffb2b4bfb13a1dcbf147aed  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c
! 722591faa1232b4bc455b235e2bd854f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c
! 393c91ec5740d5d2069cdc14394d75b1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c
! ed6ff8954243c6f1947ac88a8fd52e1a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c
! 52c43a6047a0e8a0f7eabc27fb7478d9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c
! 9bd810b61c99f42e5a3719628bbafb58  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c
! 9dc0a66d521d266ae598d4d1780c51b8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c
! e7c61ef4eac85bd5d02e39952297b9b7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c
! 165c31d94e634025b9cdf1910cc74d30  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c
! c4ed43dd85ce6bf796690b75eb4c2202  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c
! 13b0fe9983b7f59966e33555aee70fab  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c
! f2e4902be60b05edc4037d46bb6c5be8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c
! aa6798affa74757820668edfda7867e0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c
! a22f94bf5995abd783c0519816ce4ce4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c
! 6aedc725a5e7dd7458da86affa234f10  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c
! c497573814b3148fd4fca57f2690e426  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c
! 88737f7848cfbafa4b1fa1b5c1ce6fa1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c
! 8d3186beabb510c5f13b58a4ef628bd2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c
! 6f697c914482340cd9ce61989955563e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c
! 7179bb81acc2d747e35f413572f1ffd1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c
! f5e61885d5e13c9aac6d66b847e97a90  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c
! 957fd89c475cad8eaccbc60bd27636c7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c
! 3b1a3e24cc6cd54f2fade0731f43bc76  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c
! 79500037d25aea6e3debe135db174001  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c
! 3945ce062b2086bd6328b0215bff015c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c
! 5e38486eb8660c35c107ab2abc3cf51a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c
! 1fe7d422b4f3deda53ce53c36f7e8cd3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c
! af8572a3a0e045f891da42306ce19f0b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c
! a4954cc61a26e3628dc67beb2ba14d5b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c
! 44760e1b6211ec2349e03eb730b5af1f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c
! 9d16bf092e5588c9cf0f4884636bc855  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c
! 8f8746c98d8a458fa601450e7a639c8f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c
! aa0aece41a97fbaf4723e02ab0956233  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c
! 89a6f0ef9a389d6db0941a39ebfcb92c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c
! d0283d06b31ebb61b1d033f685dc1d33  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c
! 9d10288fa2c49845492b6d068a6584dd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c
! bdfdd55e6996299cf5e81b149f06ea01  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c
! fb590235d03662fcc3caeaed2af1a224  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c
! 4ba22b08a8ba1117e8cdfb8890644191  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c
! 9578f1500a9d7e90b39b781846243e4d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c
! 7c7b2e807f86fee5cbb57bebd79de6dc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c
! 8d6361b4df7a697e8d1c483c7ca80e62  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c
! eccb9b6dea7694ef40b6cf9b8bf236c9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c
! 1ea28b0520e9c0b9402cf8ae047a52db  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c
! a542fcd8d0057c6335403ef7d1b2ed98  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c
! 0574d9ca940c8ec9848253e51348d710  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c
! 1867e54ecce37f04dce881fb66386d3a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c
! fbc254bf0987cb3969ca8fad96a24898  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c
! b0fb6b95e73bc96b54e39d5a6a5da4df  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c
! 6c8227752b96607ad6581e7f48cdad99  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c
! 3bd3af6a5d618f3a47e356084e93baec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c
! 7000b64c01b98253599d84a8efd1c663  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c
! e95fcc402f057b9142b47d18e5327ed0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c
! 96f0c2cad0b501edac62b2f1b4bf5a7b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c
! 9154057dee9c360543ade6bdf9451abc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c
! c6a4b38ca97018b4d0edc72dbf2cadb2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c
! d632e5004abf6482fab4f9bb42dbda3b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c
! d5b301be7af911f56e11a92b1f548157  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c
! 99ec252257fec7187afdd970489965ce  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c
! bfbfa182816a8471a05edc7c09944c57  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c
! 07ba8c69a2751a1eab7a4c40e26f4e84  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c
! d3d023250a43908857f51b4bdcbeb5e7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c
! 1be473507259c2029685212ba1d46662  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c
! 0e4f57b9c2da6ce6da8844a4bbc54486  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c
! 3467eba4ed024a339fd131d95e0e7c74  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c
! ef4e949782143b3066430decbc2ddcda  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c
! b5eb7c748ed81ec3924dc82369fd360c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c
! 69566670f8076adea212885edc4db988  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c
! 95422727a5f2e4c9d4e1de344702ad45  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c
! 1432936f82fec81db29cc2797c2ed260  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c
! 33f7c1e53d9fd45c597e18bb2d676189  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c
! 208cb6b79d545aed44277aa7e7867c87  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c
! 7c384b87d72d6beba53e0a4ec9cb537f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c
! 992f3e9e9f759ca52e5fe064a26950b8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c
! 2f7d88f3de976cb0d02fb2396b4d1b53  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c
! 42fd42bd4f3fd99f8e71fef019884c00  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c
! 64530059753ebcd1d7c2e2b0ca52aa22  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c
! 9085e8b1c8c0a69777ee340ca147a308  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c
! 2d8ee98a54c2003ea8d5d7480bf27720  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c
! c92070cb33fcda8b05d5108527c4cb70  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c
! f1244d3c6df6ab0c8df8032b6ed59ece  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c
! 309df76136f982ff446348a6510a2de2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c
! 2d50f1ca933203fbae9cdc4f9a47867e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c
! 5476b591755ddee365920c101af8b307  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c
! 44b70cc57dc4a906f0740b5ca516fd99  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c
! 6a96cc5ea25dd7e8bf31a05fa440540e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c
! 6d76921c58bd152d908492975ce35d7a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c
! 315bfbc856c147fcd171206cddc07cd5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c
! 563f23673401799a4655a8edc0c60153  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c
! e7661d4b5e4672bf19bcb38c99346828  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c
! b629f1cdffd5743321e121d79344bb97  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c
! 4a2a1696290631400067df5a140c0a4f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c
! a66810750d2d9cf7e704e4bbc0d3e293  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c
! 75e6311b5002d8181d0fbecd0a4130a7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c
! 4282ec4ff2cb552c0192b70c0d7b8952  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c
! 4ee2a59f08c277dbd69960ba35b225d3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c
! 66eab3d246370ed1bcaf14b17ee9f9d7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c
! db3ba592c090627150baa4c1ad545495  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c
! 5a9d1001787a98d551418b85f1d9a80a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c
! ef2e2b89f2099060fb3660efc24e94a8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c
! 55b6cb94bc227f2d668e16e03a1572b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c
! c87e45dd2b50fb4e3ae022e63270cf1d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c
! 28736a4f294a8511ef350ccc1dc33959  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c
! 6337dcb25f5a4632f0ca08e910c78a94  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c
! 34aa3a325a000dc80dbf6883a5fce319  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c
! e62c2ef07055ba67e29d60ec6af76e69  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c
! eb43657d2aaf4703c515263f3124a749  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c
! 0dd93784e0813ac0fd96ff6b9db98b7c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c
! e74ccdeea81e85f08e286d3786d0e4de  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c
! bdb008ced723cf854ec8de03b97fdcf6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c
! 0b32f69843ab29a4ca64974972de86d6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c
! f42939ecf81ff692d933ef9fdf609839  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c
! bf667d23be073e9c4d8f80d43e9b1b38  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c
! 96fb1de5a940c107d9595c6eeec0ac2f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c
! 1cfeb0fe06d5b1675a5e7faa03aebaf5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c
! f6e80c616e514a64e04a5d2e302400c2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c
! 3eab23c9cf03e37cebd0c1b58b5be69a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c
! c330befd224d546a05444a01ae4ac722  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c
! d2d6dadddbe9e294a9ed486348c098c6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c
! 15954c8846fc953bf3cd0d00eb5f8fd6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c
! b18fbba08be09d864f1b73e90bd3df5d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c
! 8518df3f78adda2a3be0a29c5f20d83c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c
! 9e82cdd9444f7e3289d608eb53d5df98  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c
! 50a61212cf634a2ecd1e87dfc0d7f2ab  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c
! 56a73c2596ebf59138e79d4ef9ed3fe1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c
! ca9687de39fa00ae2b785d3187c47946  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c
! 6ba12538c2fd8a07bb201d4c31e536cd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c
! 3d6832cecf149789eb913cd64b50bb94  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c
! 3bd3c9ebac1cef69c823b3226e2cdedc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c
! d32f93a21706a21db4790dfe04dee141  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c
! d56d34d4c880add51eaa387f9aa35943  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c
! a82df5545a65e99b95d7031ac6bf2a67  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c
! 739f5fcdfc3f8348012c61206fd4c7ff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c
! 1c3e930827d4000b2358f2a3e205ff66  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c
! 20ccf5a4a466dfe05a038337de4e607c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c
! 3d2a2ae4038436b4d3259c3dae853ac4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c
! 14e0145561def42d2f88f44ae03f3cf5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c
! 53480228ba4b3481a8fde9265873f13e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c
! c670c83e4b95b09d163cccb702bf2cd5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c
! bbae01eb27cf63884c3ebfc56794245d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c
! 05fa4ec2649f2da9f167321331f66869  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c
! abdd6d418e4a0815e58ac0dd0b969652  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
! 68147fe44dd83ab5962687240c79efd8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
! b871f95875cb1ef73f9bbf9a9b83912a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
! 2a0d833ddf8de3c34c45a3a75bedcc64  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c
! b0817c35b563a7bdb91b06b75fd6191d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c
! c4918b0fd6233fe827a6f57d40048c88  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c
! a1373bbe3010c67fbd13ba2348ab2893  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c
! 325251392c9080f39fcf7e649d0ce806  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c
! dbc16b23cdd9e41875ac609d202d39c7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c
! e9fb69ed7150100a858c4cbdff46db61  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c
! 3a585fa7eb7e80f9a3ecf7fec8142e54  gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q.c
! 57ad4c19250ff0eaf821f296f4aede43  gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q_m.c
! d16066e6e0f403efe047a6ec08327ce1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q.c
! 2f145d01f0f0537988b5ab6c77069959  gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q_m.c
! 4ed0d4966be568565c409ea661b91172  gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q.c
! d489517bc68a11d709f63e77dfcb4d0d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q_m.c
! c7307ec22907eb92332537138b6b41d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q.c
! 605812424075ff1f53f653b1e2660db6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q_m.c
! 6adf302bc3273f02666276c064ab2c2c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c
! ddbd849326988e035e714e892effd698  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c
! 00095b92d8172e89e9dd3c1bd502a799  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c
! e22c12efe3612447e5115e4fd6c07a42  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c
! eaac658e9152da1d25101c80a69fb915  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c
! 71f98966e4d24217ddeacca8e46a80a1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c
! de15e2081a902f7d309639bd1d108c1b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c
! 0e0cb971f44ea4880c3209577477bfcd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c
! 9a7da421f59172dfce260d9efcf1b9a1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c
! 96a317fe01547c986fa2846cf82cc67e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c
! ecc71f26628f81af23c60e4abac26b6a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c
! 98ba92b56afd41ce6c8ff353959121d6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c
! a1313690fff478e0d80a3fd5f2ec130a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c
! 97a523667c497a141d6f69f004deb929  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c
! ac4b1307871f84cc4b7548997f7a76a1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c
! 6531c88adf7c94cb3c46bafcdb2e3882  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c
! 391f0955d5a5078943c1eef9e44e5471  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c
! ddff31f92bc81ac69b48240314610530  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c
! 3c2cef9c9b68edb4b17baf5b65176e50  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c
! 0151c0dbbbe93fc66f384689315ff815  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c
! 42d9caac7beb961efc85d22f7988a8f8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c
! 9d4d4e3c0aa2a1319b1b8e82dd2de4dc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c
! 5473bcf99d64f44743b1547f10fdfd47  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c
! 013ba931e5aa8c2a29ccd53db5532440  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c
! 5f6c8abef1c538b0b1972ce98e979059  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c
! 685a6231dd2bc8465ae758d375d4e373  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c
! 3d269ab4cf348f0bcc2c3c357590b34e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c
! 0f60b2b179b84e925b464d3e45707481  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c
! dbedb42815a851d6a9290d7295f0273f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c
! 5482566b192f8b55bff570eff5904b3e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c
! cf453ce875a4e12fa5f9be31750f53af  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c
! 8c47471f6796dd517b7daacb14369bc8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c
! ffac47e5f57edb06ae292e5068970898  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c
! 41abbd78747d758e9f1f03c4ba11cd01  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c
! 8629df606969af76c0c2f46b53d657ac  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c
! fb1c9b204c8d3a8b9aa84b1932da19a2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c
! db1977f4f44585cad29442158d59c0fc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c
! 663f296f872393f589e848ad53448267  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c
! 04b1db03b4ea1de5278e3bd8c21c5234  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c
! 0542648f146b87f146a710630062a85c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c
! 653e3c2b037528dc985515887888b43f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c
! d7075d773033568dbb51d9efaf5d4491  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c
! 49dad2e046b193ba576c881fee5e7c23  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c
! f5c2e5446984cf15260fc8a292414c65  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c
! 96d0fc7ebff70051538892a56cc5b9fb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c
! e29cdd14fe46f516f20c2133ba65e2d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c
! aea166fe1e123ac8eb46a828275301a7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c
! d53339fabea6fe2ddeb2c6062fb67b17  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c
! fc619c8fb6e03ab7d3961e3bef051102  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c
! 1f24f4a4d85967c67b554f70270cb2da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c
! 2e43850152b320c080bc749363c3d76b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c
! dd5b14939edee11ffff162e92fc38b1c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c
! e9f1e857c144d6f0ff64a1b31a3b8770  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c
! 53626878f66be83821c6cebed0f9e9ca  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c
! ea6432629e8bae3f40c962fcea2a1f84  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c
! 151bc20f4f8cce17668c67891922fed9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c
! 0387be4dbfad76166b79c627b44d4f6c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c
! 592f1720fd7c32218ae621894ae35875  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c
! bac8abd3cd7a4a64e60002fba1b13e12  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c
! 1c8cab67c14d58a5b24d01c3bfc2e0fc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c
! b51df4904ac9013c9b22ed76da2fb459  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c
! b30718f49f7ea9d65bbebfb8ea78e569  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c
! 7e9e6fbc4ceaccffdfc0c97b8f11ce39  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c
! ebbf9392e2eed6f8ebb0dc7da7b14322  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c
! f70281d99c6e99965e51e07cb5de8634  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c
! 9e0eee0d399fb8b5294d4593537e4d6e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c
! d6d6555edecc823a6a0abd56771007d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c
! b343ed97843d8239d523802fcc440ad7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c
! b6f1dc7d20ebbae824037d8ac2666f11  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c
! 4283e412256c333cd8a3b78958fcf92a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c
! 68375ee4a5b95fed010651e68381081f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c
! 7664f14029e64ef603029571e717e7df  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c
! dc809188ee47217710d69a76d391ea37  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c
! db5f664b6431411a60b2b28aa75eb657  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c
! 9380be5f50441673c3a93fc3dd0cfcf0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c
! 1a9d01a9cf8052de550cb1b8e1a785c8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c
! 29ff5969f9b5a17f4dde3c56a3cbe162  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c
! 8c54e1e578479a192ca3a8b51c57c9e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c
! 1b513d5ef228dffd675e3336f0069c18  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c
! b8ece1a9068a1f83d69eb04cb20d8122  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c
! 0b650add794a5579c8e9a29a0e6912f8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c
! 1741df63977a962bf78238daa1edd24f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c
! 6b7264facb77cddb45349fc532de98ae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c
! b256e03b3676e53455cc3ba3ce28eea7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c
! a034c2fe777cf80c17d5afeb96e14690  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c
! 68c699dcf2e98fe5ee59289a0c45b215  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c
! 8ca7ef66c59e4aad79a3b41639904a86  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c
! 42aa5227133de6e67dac3f2123306854  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c
! 896d89f1ac35898cf551ef189c4ae1a5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c
! 4d4f60d93ff46ab58fc2553f8664ca82  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c
! 08e7078c763cf1aedf0916de2a6622e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c
! 28eb8d3a055f89fb8d141c9f9986f4c0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c
! d52278508cadf0ad5079370fc3063d85  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c
! fab1cc3a38a675727bcdcadc4bf541ce  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c
! b530703ac0d4cf906e72e5cca6f51eba  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c
! b79508c60c63fec3d22c78fb4bcb9976  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c
! 2144c025eb78243d93f462b798406c8e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c
! eff06f3e285852dd202fd34715f407ff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c
! d129142d6d097fc92c4922d5d7cf7339  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c
! 62de2d2eb0cfc8069c3d8157535f4468  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c
! f1354ec0b3958cf3fa28d25aa1a83d0a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c
! f67b0964a793a77e7970dd4cd5409133  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c
! 65fea68509075277e401f9d7fc07eed2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c
! fa2270aa9a531d5c646e8b125711478f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c
! 4330f1050c112aa80bb61d76feb4a7f0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c
! 2d2d9bc2ac8ae02457ed966ec99fe4e8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c
! d5b556939a95eb83bcb56fbb54bd4cf1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c
! 0d7a4ed61be478ad94ebf0506ae6b9ed  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c
! c7c65491b3b21b5a44a074bcc28b09d4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c
! 6d581917bb61b39c4d76a175ff41b3d2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c
! 6ce7a19d23db35c88ff329b784708528  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c
! 2e0eb1c09ec37bf92e84f595b72c1620  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c
! d070e26be667e68be489535020a4381e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c
! f5dc08ead31592b3b7fe2cad98530530  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c
! 4c36e7ef86f516fa9d4818c1d47444aa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c
! 040cb4d20b39d2f5ae9956b81e2fa242  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c
! 79a0d0afc3c1525e28b41eb38b56066a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c
! 20bf472cf4ac9026e847bd6d34f74478  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c
! a085bd850f480c24a5db771a1bd63de1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c
! 045fa111ae28c0d8e478e72c069ee006  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c
! 834ea74812ff8af30ff5e300aa9c65d9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c
! 89bbb447c6e68e00142ee4292b3c9ca7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c
! 7c2200e94d3df279e09fb444da5fd110  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c
! 43c526b59804f9c955bba6ba1740e415  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c
! 8a10c09d398f2c17f2614657cb97202e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c
! 6120f40b172c4eb7e9b88953e4f26865  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c
! ebd611fe5ac246dcf792ce29a47c7145  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c
! e1e177cb280e092d73c47ac9b3ae9c7a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c
! 1fd04fe401a165bc42090a15bca9ba0b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c
! 99aefaa763134f841d0d074760084a98  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c
! 3544d4b3b520d7b57206c1a14f370335  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c
! efb85489ba73088c107245705285e0f8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c
! c9c539b72b5b2f25128830db34acd858  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c
! 851f0dadb246c64322d67fc53c50b712  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c
! 11f1aed4ce3c81b86a6cd471420f8b96  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c
! e77f557a62cfed6c4d266cc73d663683  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c
! 3b4712df65a384e7d570fe24b40ac3cd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c
! 188a502f3caadd2c86c4af432a6ba4ee  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c
! 02d442af04b68bf14e5bf497aeaa5782  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c
! 4459c3d89753812c7d4c6eca3155a237  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c
! 40e639780023c9767d0ac3ace6152ce2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c
! a391849634a496b037918b31859ac484  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c
! 941f467bced34e7706444d4e5f45e197  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c
! 739bb9488e2f9ee3b4cb2a330b8d0d9a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c
! 3a81307ee9093c2d72759751980d7d29  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c
! a5482d735a85b0c76b544f61d9e9debd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c
! c58a9741f4df6d5d42e8a56f8a9bcbda  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c
! df92f4c586294a62dafb63ba0773ff8e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c
! bde3e189bbd2de63095f2773305be956  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c
! d4021fc67d3e03200427d1dff17a21b2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c
! 44a1614d2ead4ff470a2a65cdb2b735f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c
! 85850bbafe6afce2e366c8aa808bfbc2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c
! 23cc974a48b79d38fa4e6038ee8513d2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c
! bdd5a57062effbe2b9f12a3686a4c452  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c
! 4881da07b760ecd526327a39ac0ac6a5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c
! 9fd8f7d98e13f6d30918bb5237c3dfa2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c
! f1c365c1ed8de5a4cf664802c73f12f2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c
! 4f1368735830d9bc6c82ea5558895649  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c
! 5c0f5bccafdc42c09fa53972d1334b62  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c
! 47a22e29629d9e1a4701603d5bbaca0b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c
! a5663f6a817b9008b550eac096a6e4e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c
! 7df22d657b30f3e2450b7357eabc808d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c
! 7521a60122d2ac3e1bcb8d5ad68ea550  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c
! eb9e5f7ed560df163905d503e49a13b8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c
! 899605e895da655b7072b501b85f62f7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c
! 0cd98e78ec632e39314b862eb50dfb95  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c
! 1e7aebe66fdd3c8e80609571151bcc3b  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f16.c
! 4450e04d18db11a2ca23aee228ef9516  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f32.c
! 0fa06abc9ed007721409294c8411400d  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f16.c
! 821098517cf643e1201f06e8e5ae58c7  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f32.c
! f6e797ffff4a146479c0f7f218b3268c  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s16.c
! 6ba4ca6c013e23449e509760499df595  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s32.c
! cefac9f84ad0c31f52d4fdc22db66a1f  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s8.c
! cbb58af19f33ebe225c295fbcf072b2c  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u16.c
! 6dece69e1b8f650a258ba41192f15ac0  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u32.c
! d33a8f388a5f7b456ad4e212cf67c1fb  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u8.c
! 05f6074ba7fb86c81316f0d9948f627b  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s16.c
! 417bb9b888ae61c4d56411078f7d5889  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s32.c
! 8af0df85f45a5df891f971a956c9dac3  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s8.c
! bd1ff0d077d9a0d8f7cf52643eb15c4a  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u16.c
! 0d2af008264db39a3629290f46dfd90c  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u32.c
! b9d44c1ccaae2b3937c8742ef0b99516  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u8.c
! 508c11781a0e91d0a51b3f01e5b13dd4  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f16.c
! 019d08ff21e6bcca9035f89949488f60  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f32.c
! 5f27be6b75d1300a550ac5f663ea78e5  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s16.c
! c6b4dbf8f2a7e01d0ba7704f43746194  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s32.c
! 8f76ef08661b83a13b53acdeea6715ae  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s8.c
! b6fe2476b8cabf7aa553916acc85ad4d  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u16.c
! ed33354cf389ea316a7b01b8d119e215  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u32.c
! 13836d1a977ff184f2c221085c3449dd  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u8.c
! b0b41058a577b5dda352b9c06616e4f4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f16.c
! 7f3c5cdd545185eecffd4b9aadeca4dd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f32.c
! ced1319fcd0331f4dd80371aed98af8f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c
! 65429467221c80e0c0a99f1cb5bb9f8d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c
! 9e47f6be2e633a25c619ab30caad8151  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c
! 4ea6d2b551216027ef119b06c9a01800  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c
! e4d4c3dce86f09cde3064e85a4c03396  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c
! ecaa7ee0003a6362e2dcf3efddb70cd4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c
! 93d9de4d724333ef4c415b79225837ad  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c
! 2725d33072b269a937e0468aeed82be1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c
! b270290ddc9cd20bad6b9f1ecdfa1946  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c
! 5fed7229bb583f2d04cb23ba05885305  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c
! 7a86cf3b6f4d283745469015f4eacf98  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c
! 22fa68d064c5902809ee064c075712a4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c
! 39eceb1db90deeea31f7ffc808101d67  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c
! dd02f00742ef7d2fec2ae051fa2c7f7f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c
! 429eeb5518343cea1ce9323b941a3a4d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c
! c30556896f378b62bf2cfebde81c053e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c
! ce70a937593f2667cb28f01c0e5435ea  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c
! 6eb938cb5b99de2e7793ab06d16d9a90  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c
! 5c7b4faf5d0048b0d8da2de920f27d5a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f16.c
! 8886b3c5d54ac7850b443ce5b6377cc9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f32.c
! 1d691d53c313b2f9f7604fc9f88b96ca  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c
! a3ea29dedcd39d4818bb10833b122c5f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c
  a7885a4fa2e376a4d4dfb0fc044917d3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_f16.c
  fb1a495fd4d60ccc8dd701b99908f8ff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_f32.c
  53b72f9961c6673f642721664ef92661  gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s16.c
--- 57239,57994 ----
  069c08fd0fcab509146f627d08e18c0a  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint.c
  77d83324236c668a785ce5ede9121bf0  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint1.c
  93021582c80b4770ce7f4bad688c5517  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint2.c
  63da76cd2f472ca8300c724a88ec9360  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldr.c
  f291ad2973c42aaafa8eee3d90823aa3  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldr_z.c
  8a5ff8e591c706f8d608efd24384ee87  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_base.c
  d334d5432e0169d9c5e776bbd2d96f81  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_base_p.c
  ab72cfcef8400549b3b4d4d318e4955e  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_offset.c
  6812d15c5d1d195247aecef70c46e968  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_offset_p.c
  08cf164f5014eeb82272fbef22e3878f  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstr.c
  4211e73819bb661ddd18271cf8dab0e5  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstr_p.c
  cfb4125c4550d5cf153bac3dcd2886ad  gcc/testsuite/gcc.target/arm/mve/intrinsics/pr101016.c
  a8d3fa3695fbd309660950fb5598ecaf  gcc/testsuite/gcc.target/arm/mve/intrinsics/pr97327.c
! f1860ef4320f7f2a6a4791bdb0c063ba  gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c
! 5d7653e2d5007d0c5a0f2368f9b07c02  gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c
  e49e7d0224d2de2b6eb25c3a244cd391  gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat64.c
! d3f751fb7834048caebc57c00a0b0669  gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c
! c0cd3e4f7024a2d04161bf43e25946bd  gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c
! c592daa4ef9e858226a39a15cbcce7f6  gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c
! 32506ffcab61d385978e678775ecdfc4  gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c
! 63e8f801047717a4c67ec4b431ad5b83  gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c
! c2c0bfc897d413e333c946737ac284e5  gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c
  e368cc732c7e899ba1b61e691ec9cf54  gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat64.c
! a2ff13f6a420e0605a2d5aa88a89f4cd  gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c
! b4430c11f798899421400d043a89abdc  gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c
! 1e7b52567c15d2613d2cde7ed108ea4f  gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c
! d52c4cdf2fa9730d39064e0328ae17a0  gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c
! bafc5915396c36dd0b92a94db86a8b26  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s16.c
! 13b7a0be8d75d3a39dfabddd0d2929a1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s32.c
! 210b43751f72df75b561694983081d5c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s8.c
! 84dbf7cd344d01387f33019508a464d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u16.c
! ba9c7780f5c487e209ce00bba981ac7d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u32.c
! fcb79818ccbd774cbac6578116512b95  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u8.c
! 33bcf7bebcf46b52548ee4fd8a59dc12  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s16.c
! fa3c9ea6080e7614284c037ca2662306  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s32.c
! 0e85723dd557b8524ef8a9f6311b7f86  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s8.c
! a18e63a3e71935108bb5d2554b223494  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u16.c
! 406fd2c9d3bb4184100bda3145a5a11e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u32.c
! fbdc6c3cf4b3c5292473c028324f1824  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u8.c
! 3f07043d42c6d55d80eba0ac2cbc5c3c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f16.c
! cbd969f6d93ff1c028d38c477c5559cc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f32.c
! 971b896e0131e1fd745dfecfe9282851  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f16.c
! 3f3934ab22c25eaea6f771b499b92bfd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f32.c
! f21442f9082ce88850438647521ebe26  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s16.c
! 65d99dec9a46deb6c67675e29835981e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s32.c
! a16c76b6597fed70783c2accaf3a1ef1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s8.c
! eb9ef1d39f7f7579aa79709dd1c1e1cb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u16.c
! e0e224c2b6f3bd4849f7a9ae7a7abb68  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u32.c
! 04298e138b8dc9bc80c12270eecd02ee  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u8.c
! aca4a2a260550e997f0d897ffb87d5dd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s16.c
! 690f175d1a296da0643adc5fa383fcc1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s32.c
! 3f7f7720db090c8356f88e2a1c0fe9c6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s8.c
! f2aa5e93039dad027003c0fc64dc9703  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u16.c
! 0496d94c19b1a6784582762e155c3fc8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u32.c
! 4af6e11bc812ce7cd1aa33ede5a1d43f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u8.c
! fdf95825447ca1aca2f302ae9dfba5eb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f16.c
! 7194d84ec9909887df33e61f9121bd4e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f32.c
! 75fc421e5e7e4d19e496a00b6b9227d8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s16.c
! 9a5609ac3636730614ca9866889894dc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s32.c
! 07d9325a472575c44c46b740d036de07  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s8.c
! 2b12244fa31fccda4cd506dd12eaa904  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u16.c
! 15b751868f9b34102fd42f4a67af895b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u32.c
! edf5eff575667da961b02eee884030c9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u8.c
! 3478cbf3cf6397304fa2cd9e23843661  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c
! 9dfe071f0fd202175f3b92d59da22100  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c
! b4a302b69bf1e6a72da8e7479a5a0511  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c
! de281d1be813dc94b51cb0a24d32f4c6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c
! 023cb049a1481432324b8d4437c03794  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c
! 1e308a9b2d8a9bbc9654aae9f607e13b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c
! 9dbccd059e4b9a4b8ec38edaaed11769  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c
! 1be8109cef10506e0af3bcfb03500830  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c
! d7ee28ad42e6c1e570f5c5f58863259a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c
! 5481183ab573ab9a12eefba9108910ce  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c
! a5806aa09d314a8b147277bf02de9d20  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c
! 3f599ac07cd57ce6af9406df79f37b79  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c
! 1480ed3fc8857c05fa934ce2ffb39a5c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c
! bb637e11c784052529f6933459d58183  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c
! 2529e0f47ff47dd3fa3e7f4fd74eb2fd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c
! f800954ed63838e287ff6e1a23290ce0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c
! 42477f6df1dda97231658c67dd1c33b3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c
! ec6423961de9ca5f2cb66d89043d66e8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c
! 87dfc338f1af58cdf73c1f2e3a644405  gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c
! 75969060eb939305589755005f5c7ac5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c
! 208a5269727defdc8206c0b4238cd0fa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c
! 63b76cff7c4106a5dc1c26ba2e478c0c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c
! 89f14c4649b17e62ac5195a0aa565822  gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c
! 30849dd964b0e504a851831adfe15591  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c
! fb88408d501261d256b7964e09fa4d93  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c
! d0d228142c9d1a15a07f36a41582afde  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c
! 3da64b1f6bd04fb66a32ce901e550790  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c
! f76ead262b983c13b782286b6e083f4a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c
! 5c7e8b4ba248dcb6994ad701cfdc5fd6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c
! 09e976770fc6c96da1b4eff5089488fa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c
! 818bb0fdb98850c8a8afc4d5615d4571  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c
! ff2c76c08c67f9bbc6915e2515d90773  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c
! d841eb61868c6fab9ebd55cc59acd715  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c
! 7bd3eb745b8e3e133d39a85ba3e692a7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c
! bf2f2bb355f8f6c1b71085880cd5d2f2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c
! 5f7814256bd38afa9116b3010b9ca4fa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c
! 26fdbc8079667905a6c01dde03c220e5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c
! eef4efbbfe04884b7b27af7f2a0a5af3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c
! e486854a852679bc82c8b9aab09b036e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c
! 692d2ee1c99817f20ca2351405209833  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c
! 68602d0dd9d65ba1d77d71814ee3243f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c
! 226ba3594188dd34779a8cc68172be02  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c
! 303b6d3e65788e0346000a070dc57178  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c
! b6009339a69cf32bfa95bbd7fe0e8ae8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c
! c79a80b6cd51be692d899c73315a2311  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c
! 0d961646c438ac6633ac1b9c576ca38c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c
! 71722267871200c983b82ad9bcbbd98c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c
! 4ee144b8f5fad4fd5bc0bc615accc1fd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c
! f8e065bfaa35d7caeecb0dac3c3b8fd3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c
! b714f0003ab921e7f2833e7a7df8ac2e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c
! 65c599a0a51abb5f299adaae96cb0fe3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c
! b0799d2477fab2d8d021816c48af53f4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c
! 3f7de8ca760bf082a85556c8f0efa243  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c
! a4f02af3e24b950c93fad1e48542b8fd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c
! c554f5a5e99262cf94177bddd54dfae1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c
! b580ef1ebe1d5ba7c3d53f0a9e344bdc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c
! fc4f2ec972d9eaf13a5db384dd9bc65d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c
! 91b0654227d1d4e30f3a7a628a27de59  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c
! 60d941a9bea3bd3b5f7ba52ac9e3cfa6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c
! 1649fec7c647f2ac903e96fcf23cde03  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c
! bc6ea2d09a559b958c2cc8f039a5ac78  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c
! 7f574ee875693e00d4886fefd1d699cc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c
! 11af79e835b7633fbb3941429305065d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c
! 7170fd955d132bb3b41c7811a91bb422  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c
! 4c379523b6acab85eec940335b0f2a26  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c
! ed95ca7c5ccc6f8af907093b4b6906a2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c
! 5cd5cd9f36ebca359642e41d63d3086f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c
! 13538a148059fa538809f72533a7a3da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c
! 3bc3ca6263691091659bab641185a67b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c
! b0a1953b42917f930786fcea57bf3c1a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c
! 5b4684044f80965f4072b460e8b52134  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c
! 6b2d9a45b6e436802fee03cb415d4160  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c
! 12ddfa3ba5799a382967aa85254613a6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c
! a5a4079265a478d316e1709c74686b06  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c
! 4a2f41a5ea260d252756bf7e16f93215  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c
! f406862dc177f34d6854af76d8b3d297  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c
! 4d55ffd74c8e67a6cfd3bf1745d3cceb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c
! d79d714bd3634abe811625109842a489  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c
! a2b005367728076c0f4ddc8c79272241  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c
! c3a6979c7ee3e609b477344146270a41  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c
! 49aabfa10481a82cc33fadf209b4cf75  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c
! d2c8033f3faaff3d7e8305f71e4c871f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c
! ed692ab127c580011a2c344dddcd2be8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c
! 47026b0ac967635702a8b80dbaa2318f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c
! 55aa01f6542a24a54a471162e48f6b2b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c
! 8ac9fc6bcdf3b6bd32eda7cc18ccfa50  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c
! 17273034b0b385c9596c113d876bfbbd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c
! 13c72eefdce209dc2a170745c4cbcc20  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c
! 64120f9f941d7f4e094a493e7868cfab  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c
! 8d6a674ca8d58e984239ea292efa0ccd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c
! d4d819b382ec6df1fe87d3d337be933e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c
! 095b14a3a130e111efd07c5583043fb6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c
! 27888b7f7ef60292706abea8fcdb976c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c
! ce241e1a3a19a4a995912b381eab0640  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c
! e3845f82b1224987479c8477c705e499  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c
! 74ee89e8866ff7822719cc5de3cf4f04  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c
! 16d7ffe887c0c9b6c22a6650ae4ca45e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c
! b47d392eda67e3a2c67f72898da6bd9b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c
! 9d4fc7cdcb6349211e959f6741e19000  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c
! 76b45f5f3e22c45c8eea00cc8ec96dd6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c
! 39ce0c3f060980d77b990d44580dda74  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c
! 140be68237cc2743dcddd9b8861cecbd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c
! a2b9fa247d57df0c3f2b37e9996dc9f3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c
! de9f92cad6c0db0f18eb17ee72f13812  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c
! 249933c608e9e0cbe7c8497d97c65951  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c
! 9015a7b50a132cb80b467103a1a0cc36  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c
! 017d16bdf202ffbe8e37cf0af78d8f53  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c
! 6ae9c04cac0bfe96c68104a7a1054203  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c
! d545730b528fdcb65868da0635b6878f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c
! 84f7bf6f92100bfa030060938e0147b9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c
! f3c787574669928c99608d243cebca84  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c
! f8d2c6c8fff68de310193203bebcbc47  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c
! 0f20e62da6fbb779d68af1faf2bc5d54  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c
! cdd04eb46cc4f8e2e4c290496cf28364  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c
! 02af0aa4b38440df7d8a1d92e10386e3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c
! 654c8eb856514fe095afbce66c60b84a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c
! 6a314219d22fff095d81c29f5c3841c0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c
! 28c35b4be710c7285301b328b832fdf7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c
! 17e070cc4d6dba921f35201d6e7d2f71  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c
! a77863504d1b7a5f165c9a8720fc7746  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c
! 6c0cd94d194be7c9fddacf13296cc164  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c
! 0eb2b43184b5d2445cbd9a4198cb397a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c
! 18f20c66edbc0b5301334bb6cf8e4963  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c
! b16eb4dae838ed49e53f7c7a2d51615f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c
! 4d6ee179feb0697bd9a5b2d2301c4a50  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c
! 758ebd4e34a87fff9a85e3568234fc3c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c
! 8152aadaa75d27f53431bc30c933a1f7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c
! 850600f445797327ae8d8c9e308d19df  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c
! 379305fd24a862f238629854c414dee6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c
! a8bfc54a0b707b20b1e4337a873d1141  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c
! 8b752c095c13aaa5b248cac872529034  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c
! 1c2dc2fc6339f159195d92c2987b135e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c
! 746dd2a1cd67a54ed37d839514563937  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c
! 78d54654b68d817b4f9b11747f9774ab  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c
! 3da9b316f166be2b0b1bef8b36a77698  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c
! b38d694edb554777c912d3d8b351542f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c
! e0f29475bccd8d3c60702fb4a340ce3e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c
! 58e551fb8b946911793c1b11714be7c3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c
! 5b7dec9e9a47f3693c0ad453c5f70d0b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u16.c
! f82dce197d257352e69ae046fe7e17b7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u32.c
! 981cb4a3d8d3c985810e2af50820e729  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u8.c
! b800334fa42fe33f6d447e96a271b86f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c
! 32552c66d34e62a84fa1c34edea165d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c
! bd9f6e74be4e9f7031bf83b1b68d0b67  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c
! 64c8ce72f7403217eca720fdff91052b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c
! 0a34875894b53d7fe0391138f5ef2daf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c
! 0006ca8192ad47c0dc56b383f2736f35  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c
! eeb39d4e1eff4de6212a37698e99f017  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c
! 540928ae2efdba3eae17feee5779bb6c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c
! b6b77f42cfc92d53a3182776b3ab865e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c
! 358def32a43a7fba3b804c23f8f918ec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c
! a047c9d6253426a09b1c383e98119a4a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f16.c
! b26744715e0745fb29fb6f4e3cdf4982  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f32.c
! ea68c119b7f50059df83c1866a4afdc8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s16.c
! f54ffe120930e0dded76ce5d7d9e7f3f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s32.c
! a37576edac20b1362095a605ea73b57b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s8.c
! 5990a63d6e734da3797686b318088ad3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u16.c
! 7ae7fe4c62abc92abb0cebe3e511751f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u32.c
! c4a9d68e019eb1de91c81b88dca5b193  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u8.c
! b49098eddec017b449f0334d69b1022b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c
! d5c9e38793133aebded82518ed0df053  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c
! 11831053a581fe42d642dcf3c45438f2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c
! d84fbb19396c2ee193719912740f4a25  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c
! 57d563ce1909c9e018ffa94eff27aff7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c
! 13858002d23c0ad52ad4961c2ea45f94  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c
! ea1d1f3bca07b4aa39b0c5f418600f16  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c
! 9dc3c286397152fea0a32487f7e809b3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c
! 555359140e30f25b57f2554d8d29374d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c
! da453fc2d637410db0a1a3a6fa861878  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c
! af3826980655f1ab1d26661073e3dbe6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c
! a3e31fc125cbedfecd77e61236e7ff06  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c
! d531371fa02c70f6e4daf0a47a1663ff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c
! 86de6a9bd1241c625ffa154fb59a1f4e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c
! c26e28f8606834c78d862aeaf0697395  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c
! d07ac9a2f7827dbfe60a733e75f7787d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c
! 1374765b90a8c9b902221140f8dd50cd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c
! c80eac11633b4b1dd563ed6cb6a52fca  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c
! be6b27fa3f3fcac37bf3be1671a80e66  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c
! ce70c1ee25e2785710467b24cecf0852  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c
! 7e518f3d9a84353920d2704dab2f779c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c
! 39a8b96a2cc12ba89478a0d8a0479579  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c
! e31b1dcee9795be2c4bd6191866a7956  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c
! 8af2ef0febe5273a2c39d1221554b0d0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c
! a58a443edfedf091ffc03bc0658937b0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c
! bc763d5167755ff49417cf02a44810dc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c
! 7b9e27b1728e7d937c6910d33fd8dfb2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c
! 90bc22c729069b86eef2b145158345e7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c
! 226f60cd7641b100b012f9e0368f100e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c
! 7d8a26bb0ff5a927dc8c17e66b4d5be5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c
! 0b9f93e2c145ea2d82d3b13e8d661789  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c
! f9262a658a13b227128d820bedaf69ae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c
! 003f5c2e10316e0a9d4c48912308394d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c
! 9c067c3bb945250baf0890d2abcc41b3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c
! a0be6ca5b57d151534a7dab095ec131b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c
! bb08d1003229bdceef302488af6c9b16  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c
! bbe140fd4e3fde2de4c778056497a333  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c
! b94b1f776a0807fd8858f36d6e3e8281  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c
! 2f5825fa3a8851f5c5f48d910508cc85  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c
! aa663b7712fa77e2365eb74bef330777  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c
! e908e86f316f3c6664ba0ce36bca4262  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c
! 7724c9a6ccc2a2973cd899048cdffd6c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c
! aed8b42c3b410ed11bbadb316e5df27c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c
! a3d1933e627d216899f5059c78ce7c21  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c
! 3d8dc924848f93acb19e4699595a2551  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c
! 8e17f679168b5bdf79e0c30a766cdd9b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c
! 389d50473be3eea351142507785ca92d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c
! 75ea00d0772fa08d5d9d6007bd711891  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c
! 10ca99d1f7ec330fe34b7704c03fee6b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c
! 91c92dee877ea04f1456e58434a8148e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c
! b69dccd79322b2b12a3f26e4ae24a882  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c
! bb0f4a3b32840120739203d01932286a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c
! a696a42b814a5d5047cd2a2c65f44be2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c
! c7a4614af164c9ba4c9495b1e564b9d3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c
! aadda103f4c555b2fda7ed1c9f400f23  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c
! 2e87e60687de1df18ed3ce3761857fde  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c
! 401dabb7757368b88a79ecae0859b89f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c
! e5aa439650fe0d1d6468829de8d66772  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c
! bcfea0f55b41a3e08f066fab3eab13d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c
! 8f58a7ab1678bcb2a62be88cf4645762  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c
! 18a5b1b7f6c7dc4df8cf3e1e7a016824  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c
! 7176ad1b0d0405eb0bf7fb543a37eb96  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c
! 3650aff395ccb0fe53ee5f0959b60305  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c
! 833f8ad4be955c3626815d856f689d56  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c
! 7fc92e76e325d472447611222efd7317  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c
! cdc595a6f4f4ae5b8d0ba91ad9e6284f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c
! b5784678d7112dc0aeeb92f2b6eb08c3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c
! 7d845a7cdd27c33681733104daa72448  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c
! 5072a8f83894a0b9f608d9edc8737c6e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c
! aac6d456493006a95b0902cd147b8024  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c
! e8b4641f5e68625e763032d6976f79b6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c
! 742b68e3a830b5bc64628ea7bcbc8f76  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c
! 1b328bb5735bccae3421047285891dd3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c
! 37e7a5999fcbc457e682cdb942607a48  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c
! ee119279362861c9fb6ebd30295d0c90  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c
! 7b655302413cac811ffbc596c32e589f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c
! f3d1a8c7a1361cb7f066f62680fc499b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c
! 0d2a10eba33e9df8a26a75bfb7d761c9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c
! e2674a4bbcb8dcfaabf0690495f3b163  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c
! d7599ae172d963f137ce2077f48c2952  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c
! c79cb9d0f04110a55e28a88d3d63df8f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c
! 99c598f1fc5246417d95e582f94fe485  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c
! 823f7f495951fe3a1963e9a6aa6a152b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c
! 86a4323f915205f00322341ddeb52241  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c
! ba1646f718e89e32ab9b586c4f85ef9d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c
! baa931c88905816cd3926dc012488ce8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c
! 8e78b403f1cda9d934c44f6ceeb5b445  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c
! 9bd44a4731ac0e4cba7550cd9b6cc026  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c
! 16ba2b9c178cd6ea271b7b5333866022  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c
! b5e457f01f286c614b7c554031bc3b1d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c
! d8bb3556ed42ed2e292ee3fb883b048e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c
! ae141a345e3797dabbced411a1b78777  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c
! 004848852a7c6b771237ea2f95e41e10  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c
! 0a5e3e971a5d3660c5e779d622a5e78d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c
! f7fc0817dffa95a7b564bb3189d9509d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c
! 98d7b561f755e25f4ab7d0e967a7cb81  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c
! 5b3119714f26c9f52615eca31043617c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c
! df04084e26d324ef65f23c35145b63d4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c
! 8b546323993f3509731be70f25774af6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c
! 572c964866e41aa8d1885e6dd3d6abfb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c
! 1918eadb7d42be226d118582ff714466  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c
! 4374efe81346e362e4b8c859adf809b9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c
! 38e8197bedefede6a8f5b96372ae14a4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c
! d8a1803fa84826186f75856f32714444  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c
! fe8cf9f52b27bd273a396bc6aebea98d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c
! 2f47d757907ee5d08d672ab17d559737  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c
! 24c76e692db32652555ef477d36ac1ac  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c
! 74172e24b5fb1453547f20233bd6f438  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c
! aca78caa162ce1b60cb813d02f43673c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c
! 55f3a2aebdaee734c148fb526867381b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c
! 74f30a4c7b1b86d9690f7fd30f3da836  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c
! 1a68666ab67209f5714927b983bb5991  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c
! cb69f8961e9a03283f9e8e99b8e8de6f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c
! 8c2c38c10ee6454bab0d1a1fdbe8b67d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c
! f3b2eae0670e33c394e29cc73f5533bf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c
! 562d9f27e80c89421173ac64dba44c3e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c
! 52da8da89bf766519ce061588d72d758  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c
! 8d54a05cf9b2e550e38abdd50a2690ed  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c
! da8a42f43047b5576986d68c0ca39c2d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c
! 5f3f962e88f8221536af4303933778f5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c
! 4a0951aaf89687b6fc02b8754990c257  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c
! 611e7cc7d52b6220e692275f9064b50a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c
! bf04880bc407398bf108285b96f0174a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c
! 81345f62af9259bc0ec9e76dcbcaa533  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c
! f46b0fa95884cd1a19e5d83aa46bc42a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c
! 86bc73dd5c56c12d88ce2effa732fb80  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c
! 20c2060ceeb91661de625dbadef204ce  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c
! 04d091f819a9c72e110c81acf9e14ece  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c
! 7e26e937d339c5798f24cc5e3bf14405  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c
! dbbf48ea4c3d0e15632224787152d46c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c
! c3e2536c745c5b3962807f7fc39712df  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c
! 6831f8dd6bb98f4415fe486cc4a3bc98  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c
! 62e42d018d7781ee7499fb5cfdc6338e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c
! 755513df91cd947cbb98db3ce877ae07  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c
! ca566c9f31c7cba2a77c9c39de75129f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c
! f190071078190d894878f4a78b1f4ebe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c
! 13a0da9db0341b0e9b1c117dced2a77d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c
! fd9ef2d4725aea4c673fbde9b84c5ec7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c
! 83a1dff1baabfb00970595a0473c7793  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c
! 419b83ccd44af8161cbe2713787d9a84  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c
! 78de4dfedaaf9572bd14b69449c03eae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c
! 49533d4375dc4f920d9e46d4d262b67f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c
! dd9822317a50df93ffb02f0ba518afbd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c
! a38d7d776a97a72a8ebfe39106058642  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c
! 40bb1f959169a03ae77b759439a2ac35  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c
! f4f4613062473f90061b5429a5a12a63  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c
! 7af1579e380522a00838dd84aa71a0f3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c
! 0df0a1c61a4f06231aac7513d731a8dd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c
! 5504570139574570fedbda5658f17e92  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c
! a9c8da29a97aa6968c3645b3890424e5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c
! 08cc47afa36958d629382ef3b65d8855  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c
! 2e5ab898ca74ce5747ce118a8b02ec96  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c
! 2f376e6e362a402a2f6dce08002d3b6c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c
! 1b8609da7c18a4907dd62b6e40ca7865  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c
! f0923da6dbc67e4cbe15ac20d975b878  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c
! 8cdf6c0d2ea856ea0605ab1d550f1501  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c
! dadb159dae661b21ae418b494322dd9f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c
! ab390c489da33d9c263117eea20fcba2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c
! 42a7c8b9ee1365446b90085092e23aeb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c
! 202f584258f64b79ba00988377ffa219  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c
! 6fe471b45a915f4267a542080f02fa34  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c
! 31fb262f9bf1b28f48945d76cf034668  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c
! 45bb1678656d1eb25a5756a530f617fb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c
! f84fe47eac412bcbb93f4bd43c879ae1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c
! e131f0f90d2ccb1e8eff81ef4b75dbd4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c
! 7622b330fed2ba11fac0a033d13a3c5b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c
! 22720232b742c4ec74f28915fddca6f4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c
! 5ea77cdc995bbde6398efd6ad4bf9903  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c
! 11625030b4a4a378f6a8b75616275571  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c
! ffbfd3c338a76d17f67c42f5f5b90f3d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c
! dad552ad6969cc4f08eab40d2440f4b6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c
! 49be9f212ea85b3fe1697ca1f368c01e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c
! 0ef1fa312e03634980db922b7713c210  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c
! fbe4e1fa3cbcd9441d8750a03c24a2b7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c
! 82249d796ce4aa5effd5dd89ee869f64  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c
! 1b457ec0ecc5792cad05e8bada9d869e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c
! d0175154633929985675d64e3f255f7c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c
! 82fb0531a000e59ae7e0039823502cb5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c
! 52375e34640ea725c7cc55a3f5742210  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c
! cc3243d5a31249c6a83123daeed04898  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c
! 2228f76bc7896d5cccaefc9a3bdb4bd1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c
! cb2ffb871d1d786cdca441eaeef77dab  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c
! 4babf84171077cbb2a76bf45b3e7acfa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c
! bb73831834ace257ebbe4d0122ce856d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c
! 5c77c8f5567d74ec5604a3965879207b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c
! caf291b1574b7c0e124de662faa9ae6f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c
! 5a094325f7f51df7963970524d47c211  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c
! d48603220c1ffe7d000eed5580f08ecc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c
! e26c1fce9a5cfbc4261ae1eb72b60f2a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c
! 497d72083d91192b45f6c7e2257bc168  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c
! 9e0ce133a8cc48accedce9634834ca52  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c
! 96523329007c374dc89fb370d9053d53  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c
! 4bef0a82cac6729fad690bc82236e14d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c
! 3d59ccbd17d243df01e087a600bec0a5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c
! 60ac0f32b7176d593199fd53d71bd703  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c
! 43d631f28fb9700bb560496eb5789457  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c
! 7cdd7ce7f35e1da2fc00f51355a19bf3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c
! f46ddf6255f18187cb3e665dfdf09a40  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c
! 71b6d437c7835da5d6305a7994124475  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c
! b99b946c9304485e1ec8bd86e969cf3f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c
! 41d21888c2185f62ff0dd8afde960c97  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c
! 061e42aaa7a4b3e4635b079c3b4b44cc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c
! aad2873d64aea6cc739c7810c2e4a634  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c
! 1f5bbd2b2c5930407e5ed19c28d9b05c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c
! c89fd9c6fcf2058961efbdd5071e8bd3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c
! b86d2e8f2795c832c8cfe96b69bbddd6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c
! 692cbb82aaecb00587ad47d1b18946a4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c
! fbd848a4853ca5170457e2ce76203e8f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c
! c068d88973ee01ce91272f97c53ed51c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c
! d742b4fcf148ebfc095d8c2f2f3d0f63  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c
! 4438d7600756913c6a3dafbcb87e7b7b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c
! a63f616dfafa6a6d85be90405d8972a9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c
! d908b5f1c918c3621fdc9f3193825afb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c
! fcca8f116fe3c26a47fe37ccdfa28d53  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c
! 20339f8e75e01439d04025e0652d2284  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c
! 8cbbe74e30be0f8f1a4a414a40eccd6d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c
! 34648ba3baa5bd5fa94e74a22aa4d106  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c
! 6f4d1e244d0a011ac57d864111ccfdbb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c
! 87b0482a2121d79cde04a6c60f1c6b82  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c
! 7557238fdd0747369aa9b24c41d675f5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c
! 9399d7a9087e73100637c825c3989772  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c
! 9dfbcb3682f3fa25cfb5242eade0fb04  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c
! 2fdff391555e5ba6408b16846a53e32f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c
! 0eb99e88a4a7cf761701045f549016b8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c
! 1f0271c7d6f5704e759f1346d9ace7f7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c
! 542898313698b508153898b958856ddd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c
! 4fff35de0d1db3c850afd9a4b07e32d8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c
! 5a3e17f85fcb6556b36231cba46da4ca  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c
! 4601180fdba6c88955fd09b7c5affbe8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c
! 2ff3ae7d99fa963ebc860ce1c80d2701  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c
! 3c045a64f729bc8dbfc200e3a6028395  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c
! 18e7314da5a1d2b997db94179bd93992  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c
! 96a46edf58400e958b125a211d08366f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c
! be573f460a5e81540993bfa6edbda121  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c
! 920155695cb9a5d081f9e10db83634bf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c
! 4b5cf55e251b7a70d41cd50017a2ebf1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c
! 8864b55bfa6066cf82c0b10028e7bb44  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c
! 6c436e1729598e8e49019342e0d24519  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c
! c8516648c0f216555fa3ed8ccc8908f1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c
! 74d850d1351a9408022cd122d8a183a4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c
! 4da35f51be62dbca2b78bbed034f24c5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c
! 59c86ba506931a4bff0e80c35a33e19c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c
! 4c0cd490673e474cd2dfb2df7d257cc9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c
! 701e4a6a6b1e8b956b9ac2dee35130c4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c
! 729a8e9a88fffb77226284a5414cfbd1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c
! 6055c1a93d3b035ff494cfb93a1010b2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c
! ac25dc23a3f2a313e7833fdb51586dc5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c
! 73514edae820dfce2ab75600f90fe675  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c
! d8c45c73de5104c44a3f9df0122a20e2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c
! bcc4a901b370513571fb1735bbddebc8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c
! 0d6f54946563299dd0276b90414e5969  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c
! f8fc06f3104ea0d11147f790c5f972f2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c
! 1b9d05081c8856f4ab3e788aab25c66c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c
! 43a05ca63b5724d172a29ab719f87c4d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c
! 2b900947a6f921ec81fb803e039d7d47  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c
! 1e2b1cc70b51ae45b287e8b0062dea06  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c
! 82b56384d686864fff657fd8967f3168  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c
! 65db8c6d6312b33c0e4c4db0392ba765  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c
! 726ec9163b95ad2322e73c41410d63d4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c
! e0fe6ef39958de279e338e6c93ffe363  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c
! 0e4a93340323f3d7535dde230c378d47  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c
! 70055dfa037d58e26681faa721d81414  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c
! d938b4342448a7fed595c5f22c259649  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c
! 20a5d983dd45f4aae7188371a9f69c06  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c
! 67c7c6b2600b339006c963c5edada136  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c
! babb589973fe8ee57f60fbc6fcdec2bc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c
! 771439ce55bfe1421044d5b1520a0949  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c
! b3e22e65609535559cd2532fda9cc66d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c
! d8b224ba70ec7846a4d67cadf06b409b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c
! 873f29f72c557ed69d3c837e1e99ba08  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c
! e34a1cd9f2071091aaf6ab3da571a130  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c
! ed3b43f9d6fa5c42edee640261e53452  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c
! dfcbdfcd6501b64afbb4b766b40de4c9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c
! f89060b1d360be62e7215bffc9b73fb7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c
! 364430f24bf67003f09779114ac9e072  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c
! 31c5fd6901fdf8e1c54f331813941dc3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c
! b965f0e1eceb65ec1627300c40bebe45  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c
! 20def7d1d925c1e06142dfeb45a12518  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c
! 729eac6db9d44ac7c00479640749ac22  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c
! a0dab96fa05a82704030a817f2ac1727  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c
! 5367ec5b29dce201981011d99e959e19  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c
! 9319ab026e1393e704d1abb2953103a8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c
! 1e7044672a5164c0219be74168f1dd4c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c
! 019f2934c4baa6df61575278a4c49f7b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c
! b8a2fe51584c219bef0f4b13c6f8fee3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c
! babdb2d2e15f0ed8d51615489d394774  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c
! b65367515df760237195053b309683f4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c
! e577606bece1177cacf8b7ecd787c738  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c
! 7d090449652a0b3b6bf7d4ff24d6b889  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c
! 2d32177ae7f7adcaee30d6b104044972  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c
! 55074b7fff2f169d90fa74520bd4455d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c
! 139e5b4f8a84e106525274f7d82d11d9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c
! 4ae4123a2c0bd89c5c7bbfef2e72926c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c
! a3d93d67d286c37a8993a3268f02c454  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c
! eef0a6547a686ebb8cff4a1bf7c56378  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c
! a48430e86fbfc3c0342d082227a71560  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c
! 9f7dbf7b1253b0c6554e87d585a4551a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c
! 183d2cfc341affe0a4c9c5079329f815  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c
! 537df86012373ffb4c016537373916c7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c
! 4e297476575edea70cf267d76e12ebf2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c
! e5de9ca952d51367f94741b25f3d6237  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c
! 72a326f6825a86a48946d83788262402  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c
! cf71b22154cba1d18ee8b0507a036a7b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c
! 8e03bacffe0ab4cb5139acbe39fec8aa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c
! cd137b49d662004a2dae2ed2ea238ebf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c
! d19f287591a5193b9c47ed7336b7f81c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c
! 43a6ac724c479ccb862925d909bdcb0b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c
! 397a92c55b4b9898b7cd74b7e0e4143b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
! cce48cc0da459ecad4170bafe8aa7719  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
! a588b027bb590185fad22a0c594a5fa7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
! c14a574f29894a956ec2b7b60aea092c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c
! 8989e6366b9d1d81e0f6579487036e53  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c
! 4466daf73f4af8e7dc8c8c27ae833c7f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c
! 8e1e9b899b47c233dec3457ad6d93b95  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c
! 0656d067d62398dbd6a5f96e01a1db8b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c
! dae908e45799833d40c0ec552e799783  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c
! b881537633b668318e297956ae4606da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c
! 6ee2730086892c4a995f8d986e1a3f23  gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q.c
! 8da27921d3ece8211c546cc70c5c01ac  gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q_m.c
! c7e2e1d4690cf64e1c203dcb2326df99  gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q.c
! 5e79a8da8a6ba356ec73a35c598f932c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q_m.c
! 8079a1cee5b86be9dcd4e32cc187e96e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q.c
! fd6084c43f27627fe0508058fd955d2c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q_m.c
! 3e8885f73e09b6a228444da26344dcc0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q.c
! 123d47ba8e7c1451bae4e76c2ac25d47  gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q_m.c
! f4e93c25030298b7d23df680f7903fba  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c
! ed0a3bbb41c82d0a3730998a703e6f6c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c
! 3d937bc2a9c10e214c76e625f7625498  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c
! 0057e059687de5a5f80b6d908d049648  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c
! d0abf9d6c79c14443e3ce91de156d7c6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c
! f863a03e52736b077d6ac4085a61bc09  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c
! 4eb23d884726bc0244dd4fa2f8265d3d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c
! b90ee97deb7dbb055fc5535253f388aa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c
! 693e3eb9ee55f50a768159702fe9ba67  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c
! 5e888780398cb0c4c1ae6e3aa11687a5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c
! 71866227f41cef3b0263d63b32cd48a2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c
! 9ace362d9537f23adb2f1d7806c7743b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c
! 2bc08fdb1f179d7e0bd00e69bbd23164  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c
! 50bb9a93b804f56710acb481f5fe4807  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c
! 6cc6a9ef0b38189a79ce2597cec2b216  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c
! fe1e9bdae2afc95175a475420b84f258  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c
! 2241ad22cf3b32440b2a639cd37f83e1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c
! bc2ce757ecfe960555b14e6c5295b5c0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c
! c7b63003a260237fcfdf644e7cfb2907  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c
! bfeeee0a157eb85ea1c8be9fc53b9424  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c
! 148a43d79fce8b18d1c4254a48526ea6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c
! 267313f1c4152a5881f4d1bb0bfa307d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c
! 78806c813fb6216cb70011df17569073  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c
! e254ee8d9ef2e7f293f204f0dffdbd29  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c
! ba4ef629e7fcd05daf928e083debb1e2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c
! 4cd6443053578f542d84ef408915611d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c
! 9122e3f61fd1c8afa09592bd070939e9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c
! bf6041e3929a0fe9e3e97cf97eb46c55  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c
! 9d1079e59da30729bca974020bd73111  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c
! a55af4f25435637b0ac3cb72ae362b22  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c
! e118e0e47deb4886360d41061bbf4fd5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c
! e1b69278e10e78e508cb7aa86223d3ef  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c
! de7850148fff9ad58817187913dfb266  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c
! b64b51d56fc6b71b3307303a761fe9bc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c
! ab153345b862ea03d7ff3c752b6b225b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c
! 5dd01e5bab073213ac2d52231eb8c535  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c
! a738aba064955965fe4a78cdff3b398a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c
! 79ccec41ed7c539aee395c426effd9c0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c
! 3030512c2f117d261409cca41e17f959  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c
! fe92708b953f4b8233d6aa9ba6c736bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c
! 9ef943baac8003be79fc46de77d940bc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c
! 08dfa392b330c9e7d14b99a41a335199  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c
! 55c4ef699e1557c178476e9818678e2b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c
! 2967773ad472f4432a7ed9f7e0469194  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c
! c634003e4d9353561fbd8aac542d1095  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c
! aef456d8e815d1a6d2b69712bceda904  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c
! 7688cea42a8f4f776cc90b9afa184094  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c
! 8accd898f2a7d2cfca7c44e6ce5e0d58  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c
! 4514a627c8830850fba62a11e1d61608  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c
! a1731898ea87186ec7ed96c195bd5a2d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c
! 24adf5e50b54b8ceecc8a8e4bfbdde62  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c
! 07e5c99c9ce5b965d254252165e0dfda  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c
! e4a813e70ca4736dea62315ce0f1cbbf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c
! e3b57138230337ba611042ab692677d3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c
! bdcda9907393211f177fcd9f140374c7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c
! 8cea3a7ba5167736c71a137265fe80dd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c
! ea25d0a95e89dd03201d2e2970d8e5aa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c
! dcc1de98e6c796adc86079d4e04e3436  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c
! bb6a08a3f651db0996de8d448c87e6da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c
! 3308413f235647df2e8313248f6a2726  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c
! 435d48abe4a091cd8eafa383d06c6e68  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c
! e86ddc36b60767df2a3ce20527148cb3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c
! 9f41ad5076f4ecfd00e4d92200cffe47  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c
! 2671c741fd935d2b652bd0f270d97517  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c
! b16fa3f4df8e1ea5ee08669ce63b42aa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c
! 0a02d73900dd618462f24fae1e5c4cab  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c
! 71788aeda483955efc7fc02d8b0d0ea5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c
! f09852e1c6478fd355ab29fa26df50a1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c
! 7abfb941f1df7e76d1ab64e2992d11ae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c
! 13842062885f560e487a00ab0e43ff4e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c
! 1d48ebcd9b715b474cc735ee6fbcd95e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c
! b1ffcee2ff2231a30ed19bb7b8cbc945  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c
! 563a5d65afc703892ab6af3243a937b4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c
! 62ee4a1cc3ffa662ca71625600f98030  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c
! 8a174d7197dbb9fba01026eaf254a698  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c
! ea70ecf19a97bbd698884f9f199cf507  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c
! 6b62d5aa5da7410a0cb098cba9c99ee1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c
! 1c498ee2b55079ae2cd7d06aa85f6f6c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c
! d4e48d0588f26e7619ecf32cd4dd8c32  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c
! cd97c331f749022270ba7cdada05ac79  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c
! 9ae38dc763e38bb61451143ff4e1765f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c
! 22a3831600ac511dbb1448ee5945d1ad  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c
! 07f4e27ff307a7b76b863fad3b3fdb08  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c
! db317fe5533e9b81ac5f55e42d89ad9c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c
! 7ca850aec8704068d93af982dcd29206  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c
! 42fb4bae0325d056a56b97798133d94d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c
! 0741b70a885a4312bb7f4a2ea4453753  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c
! 3db69cf654f87e8472de736f8d88fe09  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c
! b6fe776a4205722442214b9bc62ec61a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c
! c7199d7f3908c4fdd0a73e592919136b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c
! e276c224eb7c95aa669b74e6dc3a9eb2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c
! d8e4e9bcde3a9c3a4ffc78a38876cc6b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c
! ac7304be90862add74d098999eca3d81  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c
! 6a22705a33cf206ca3b32a97a3c66550  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c
! 668c28b5cb4eb5a04ece00c3171740bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c
! 06d2be60d78fd375d5871d47e19320b8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c
! 2297c67450cd0590d18b077287c7a0a5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c
! 396409a1d14c36f0335c7771b7cc21e5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c
! ec51cb7b06a421582b7f11f3ac4038a3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c
! 45115d4f1921287b44c3d0cde4cce4a1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c
! bfb643b14852624002c288620e0d8a7a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c
! dcb8c309731f70b9e2cd5b0cd4a8d78c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c
! 303f791065677890c8a602e9cb3353b9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c
! 18a583b0be93930c0c9068f1e2f27d1e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c
! 0258c09ba07796a8202a3ac9b68fc4a2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c
! 73db4b8bae91bceb1b7d6b0194d379be  gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c
! bf995273adc1e67fe997e6f71f06ac82  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c
! f68fce78f1c3675368ea38e50049f2aa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c
! 73db69dc369e64c8f8fca972614cc860  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c
! 24d6c8490d94020a725a67717044b759  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c
! 7135a2487330927b77a087be35c4d8e1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c
! b6ca6abd2975e7c80dac0ac7d9d9a667  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c
! d9b212087e03421f8314e5e725be4609  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c
! a1381436b3916edcd1548f5dbf182d40  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c
! c9e89185116dca6a773850e30ef3aa68  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c
! 743fe17e04bfaf4bbc983d9dec99016d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c
! 62ff76e21df8b958f3cd98f121dd880f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c
! 02658544d19305d0f1b3906c569422a6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c
! a2a6462f7dad95340c898fc32890d4cc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c
! d67effa94efb6df338f9257428e8e398  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c
! 147c69113cf2dd038754b5e73be7de2d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c
! 584cb108080769a93b9bbbdec85a8700  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c
! 902a6a4ea6f0a883ab3da9419bdb27b0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c
! 2a0e8edca43e5b584c9f4b3876a1ceac  gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c
! eee1f0db49f2fc0a7e9ba421e216433f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c
! e793bf622ca0edf7347b76f5ab8a7b95  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c
! 89e394b063d5316d83567cd28f65e182  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c
! 193576ba817e78f2869e063668bc1e65  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c
! 32c11f7184cc28bce42dfe363c133b7a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c
! dc3bbe82f0ada40b2478603578aa8315  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c
! 697a31f795106526b183dc7c8cd59d31  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c
! e123ffb87aa6243074119f950a80a899  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c
! 3348cde416cb2e050ca3e7dabc1a3a47  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c
! 5edbb8db84654f2ea6cbcb94c484b411  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c
! 583e0cd6271be5bf6c2dba724be5f0ec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c
! d0e773ac795d470d4097b264e9ee7499  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c
! e243e3f93d1da2652e43be28693b1fb4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c
! 22f608145f9a0014b9ab4e0b8c5db361  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c
! 728b7c19e99a060efccbe577378191e7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c
! 30efd51cc1c768f1d7d53a2b6aad8b8f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c
! 9fdcb845b11f89c868101d5a6ee7d721  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c
! 1c447195f3aeae143ec7d3eabe774979  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c
! d4f456ca928c904422cb98eab0522272  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c
! 3d37397993364e8328cb78f7565c0756  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c
! 074f4041845ae60e037a91d2f2d664e7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c
! b69ae74e9837313d281bca2f9e61513c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c
! e3f60e81da7b88bc2f02934cbc2fa837  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c
! 1db93bc353932f7f224fa81f56c75f74  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c
! 4c23f55d6612277e6b2dfb173cc662ac  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c
! 8c6c2d59e4cc6e27f5ef6cd22558e480  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c
! e69fd60528b58f1ff784453a5ce25357  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c
! 9ed97369a2792eb3195bb2744c341e78  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c
! 55c1eba397837f8577001d9dc5057dcc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c
! 6a3e64b27f1151080fc66728027fac9b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c
! d9afebb0a62a83db7cf5580d217f3368  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c
! 72b1a20173f517dc1500a3fd9875ac24  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c
! bf615847479b081df22eedf27bf22b22  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c
! ca5d85eaf4c9f949f07c8f8190b61edb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c
! 4250f15a8444f8a88508d0cfd59722c5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c
! 368bd45d53ecb990817a516e74c4a7b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c
! 9ecf68ce8f1e166c13201dbb644d36c2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c
! f324d05ec647f8d9b4ba206d2f743842  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c
! 9b36f33560b26a2cd4a1960bd890a7cb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c
! 16bacde022c174ffc4e25a52a5d1d7e5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c
! 61fd65371cf0b638bc259e02da130522  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c
! 08c892cc318655498614e6d30a283725  gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c
! a2ad73d2ac11098eae3ff3ca547ace54  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f16.c
! 27dd9e221735900d4f4a84087a280ebb  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f32.c
! 075b37df91b0d345c450911aae567b91  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f16.c
! fd7f036e7307b475062b47b4759040bc  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f32.c
! a8733db13f9701f55dff6a5c114b1bed  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s16.c
! 91d0c82567bd0d8427edb2e57f0fae8c  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s32.c
! 721a18f7aa45206a057de32dc5a51b45  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s8.c
! 1bae005c7ec97e92e156af0bc6ece660  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u16.c
! 3a66de98388a5696313b8f15b67766d0  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u32.c
! e8cf268071d23987ca4a62af568de5f6  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u8.c
! 487b683f69969e14d14f6d7bed834fc7  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s16.c
! be6125921edee84fd3e9eeb61541e76b  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s32.c
! b7e54701ce39c5a1eecf47f74175441b  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s8.c
! 367ee8478a8ba6d1a06ef59da38aeebc  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u16.c
! e7ae0daf7cd6610ee23398813f876fa2  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u32.c
! b73dd8618fbdf4697898c3552a877fa4  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u8.c
! 688e715e02bda15bf66ee1bc97c0c0f9  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f16.c
! da042973a1c7aac3c588f4e8d8080627  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f32.c
! 31926002a73a51636f12275ab693951e  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s16.c
! 47d5dc00e18245d2efee638e339016d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s32.c
! ac3d11de073d2b43638d2b22e0d18ae7  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s8.c
! e8ea3d44a554993d55ef1e68a489fa46  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u16.c
! 3fbd28d8b445fc59a51a0b324a197881  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u32.c
! 698898a3cbfd06f95fe85e6c7dcce4b8  gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u8.c
! fce55615c5142528ffb44000865a395e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f16.c
! 64189fe943a940fd5d470848d925e72a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f32.c
! 91e7490da1cae24adcefc4d010e067fa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c
! eab83d5036d398f40794b8991cf69c57  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c
! b6fdd6baaf7a7d6ae5f24584dcafb8f4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c
! 93aec46f0d2f5a34beaf06b5917f6e35  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c
! 96cf529c1c2bb1e628495386e4a45394  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c
! 9727fdfd1fe3644633fd0bbdcd1b774e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c
! b010c3bd0bfa1ce177e0f3de18b1e9cb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c
! b7c83084a55eea0ca594b9d7415446b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c
! 591846da36822a89c5f56dd6b9cad233  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c
! 225cc45264b36b86c203cfc231d24659  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c
! fb0ced273ef16306ca42c89de5e05c4c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f16.c
! bd107c34bdf08a12683facdbe50fc31a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f32.c
! 33fd50313bb612ca3d11f34913c71905  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c
! dff25999b2db1e26ece4cb6a143094ae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c
  a7885a4fa2e376a4d4dfb0fc044917d3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_f16.c
  fb1a495fd4d60ccc8dd701b99908f8ff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_f32.c
  53b72f9961c6673f642721664ef92661  gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s16.c
*************** ca8fc175292b81b70decf89029745e9b  gcc/te
*** 57915,59021 ****
  ead51aa932f54ce080e763a9d560716f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u32.c
  a3b7d26a1d14371254a3c36462110c35  gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u64.c
  555de40671413a541c288777ba86e237  gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u8.c
! d87efbead358ad1516f1f5c100835423  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c
! 871c875f259858673bbbc355f3d35ba4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c
! 9e444f673f0946492598b20ef850ea5c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c
! ede3a86c08b3a3a48aee85a8daf80185  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c
! 807e0d0e428be513f0f28b241a7b28da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c
! 08e42e7800338b181de4d9c931beaf6a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c
! 9caef6cf67d57c3f58efc9375f574df0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c
! d554f626b1e9d31dda74a18fff1aca0d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c
! 763bc4b6b70be423425cdcc2c57ed3a0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c
! aab40c3f32e90625af26349c081b9aed  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c
! dec8d8beda1bb95728ab9ea87d315c07  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c
! 1330cf88c40cbec655722447d5fff357  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c
! 449590376d031ac77d88c2ea8fd300d3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c
! d02d15377d04bc57867595f9656091f6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c
! 6325bf9ae532f87802ad35082a817a06  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c
! b2359f2a0236b646bb70e934eb7d0b00  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c
! 8223c4d41fe95c24d30a025f80261245  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c
! 2ad364c8722f49c4a56451c5b39bfad8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c
! a8ea570ae51961183482ef53690a6884  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c
! fc1a3c18d0bbce5ab5cc5e29465d7889  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c
! b8f992a15cb5d9eda966bf08bd40eb4c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c
! b179163d0896c82184336f3d1b306426  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c
! 1123ae820f069904a8581acabec608ac  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c
! 1c5afdd194915c31b1b275a3de8c09e0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c
! 3b8f102cb99ada450028a456f2c2053b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c
! f41f90bda697ae72693ffcc25e637253  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c
! aa55b614a240b9c497189704616588f3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c
! bc141d142846078ee5520819ecc485c9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c
! cc9cb61565b019e5d06b32d74d9d2721  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c
! e36c6e1fb2fde9475b8fd596f2f5310f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c
! 223161d58c7cceabffe11475a9d73a7b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c
! 14e97fd389dd3f21752873571152e44b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c
! c0a94d74e0c1da50a4c50489aec81178  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c
! 41e960a334e815d65db91e690c1c53e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c
! 11600ce765843e87691d49c6c697e779  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c
! f8e89e3c2304d5fba5c76b9c2428fcf6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c
! b1bd258648aabf6f95eb6f8a08ad34da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c
! fc07f78d2fb7017df79dc0fa139f2f57  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c
! ab9c2a6532edd9f86217e6bd15db21b4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c
! 80a13bbb6592767a69cb3199d51c2102  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c
! d852ba2d8c9e21d665546f876ed11f3e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c
! 96f7edef66845193d600611ad2c16b14  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c
! 49f7ceb5f714276b6721f80c51a98322  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c
! ec659a2884f921957a4f99b47905aa2d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c
! 4c49fa87428392c2095091f817354579  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c
! 38f29aa36aea6f0d121344bb3f0ea878  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c
! 99ca2b7ad2c07b25c4b4d782d48f2f6c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c
! a242eeb22a7e8c3c3e35eec84db26ede  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c
! 92af44c8eb7c81ff8d326205aeecd4c1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c
! 12d0e7c1a04460ebc29c23c02d25be6f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c
! 24165959da89713517916d90ef39d724  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c
! 3e7a7d591bb84d1444af6653e7018ab5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c
! 1c1f57b700b64ff218dfaae59d8a6f9f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c
! 90fe89f0f69dee4a1b694f91ff894dea  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c
! 75b1f1d07c350f52049a7b7213d5316d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c
! 069c71ee30c40ce9637494653d682681  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c
! 22001dee5f894096ec6cc694bf6a438f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c
! 8dfb5d387da4e1e7846cf1fc5576ddf3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c
! ee721d001c27cb56ec8824707bd70687  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c
! 9f12c48cbb19ada6a82d53b5c10653d4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c
! e6e3c0e053abacfe4677b93fb7a81284  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c
! b95fdc381537af986a1d50a60b122db6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c
! 0955e1ab06ab71392fcce9c4d8aff6d9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c
! a24a0fd5039e57bdc79ebe5d3a1b7d94  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c
! a55d8910cbe63c6dd7643355a941466b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c
! cd354c277dadc77fd0703c155c5c5db4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c
! 966bbfd644dc3864221baa39bcc21eee  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c
! e3245419825718f9e119b737eb7d27c6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c
! 95cab0eb96564e5db051867af2623ad4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c
! cb524ef416719dbc2124bdbe2f343fb1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c
! b3264e5cbf33e2b6ca161d02bb8869df  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c
! fb8f30c5a1474e1d276a6572c7ab8760  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c
! 67461fa522296571d0f681b938a8b467  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c
! 0dbc3cfdc073a60e92c295d6004e4446  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c
! 5a433622afd8b809f2f100ecd23a23fe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c
! 72875095aee6429b69342f02941f40eb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c
! 3595ec030e4d093f0484f59350e22b76  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c
! 5bbe5ee6856329089b07d7db4bc79715  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c
! d6d325c0f662c10643eaa9967f7e235d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c
! 90cd4ea3f1750e02154695fe73368a6a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c
! 8d241d7825ddabc13fafbb9bbcbe04aa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c
! 6e5ff848a0e5aeeed3321573bd336cd4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c
! d55955af69e5fa2b05a1229fa1175dff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c
! 8413ea3fab329ab960b192f400a45956  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c
! 0efc61fc4201735faba6074b31cf9ae9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c
! ab3e827304ae35d8ec55cfa11b7e254f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c
! fe144e199e449fda0e045243641e150c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c
! f720828e1197309f989ea3a8f9efab20  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c
! a65aa41d0e693e2495fdadceed3957f2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c
! 63a8eef833339998342bc73513088bf3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c
! a8f69b94d057de8d2456d22b07419855  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c
! c82eb00e357c28852b41ad017190ef87  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c
! 87ecd6ccda5ef389016cab970e0ae86b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c
! e9cab2df491f42afd2ee91f716706810  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c
! 32a0e0431ec5f6b7ce6007188ab5f909  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c
! 4be06948aa85ab82189e4b3bb4b82875  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c
! 2d0a5abc60e246341ebf88fb0b681a76  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c
! 69136f1f76658f93f9fa9d5c52d9fbfc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c
! e7a3347693dd3c814f5cf64059b39ae1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c
! 84c224f10e051cf2a68916036621755c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c
! d0bf9c96c634db762b890fe58ee8c806  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c
! ae76faf7a1bbf3666a2988fa4aee27cb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c
! 8156c0d157623e278d2254ed36a1d55a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c
! eeb19f48e9a43fec2b6f9e74ab435413  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c
! 1a5a818ff638964a841721e15ad95580  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c
! e506aa6dbb15147b765704621db10213  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c
! 8087a6ad503dfb3aaa3d9e7ead2379a5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c
! ca270fd4084f8a899f97c7ffc88b966d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c
! 9affd753432269a83c7bb9c8b1bf7382  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c
! daf827e8fe750b3d1570d3316383c0b6  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c
! 682796d2be841fbc936dc59a3395987d  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c
! 413f8141c8241479d41e781a032d50e6  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c
! 1c16d0887dfdfbdcbd1db818cadb6c41  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c
! 6ce86ac38b23fa1cba6f3ae38c03a435  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c
! 1d7cf459c1ecb83df35c04c9e940705e  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c
! d98b6a994d94c42b7b0b67211c567c38  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c
! d7b34e30e8149cfd223cdc61c7e5a88d  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c
! 53870afdb41e6ffd4247b7cde002540e  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c
! 32d011996408fa3dce0ae92242f35588  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c
! 3fd4ef56d1c4b4eeb8a60d6b8130cbb5  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c
! cf32e8e4fc90af853ebc4cd895e0286b  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c
! ca6f4afbe39629271740386b825440f0  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c
! dce4d25100be07ab57a2c607d1b839d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c
! 6681a93e27919282af3ceb45177ecabd  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c
! 10ddebe4873f39e9965d0934b601bbbb  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c
! eb80c87ff6563796c6ca1db8b86cf358  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c
! e09e10b44af8cdfb7910ae8a99a80b12  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f16.c
! f62747ccac97e326d67f64153144192d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f32.c
! b9fce508162a7e6e86df41672b5d53b3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s16.c
! 5e474961ea4e41c97a3679b5a3f9b071  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s32.c
! 8714cacce55beafff3b5a0861922b4b0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s8.c
! ca8b7b8719c65d3ce7db0cb5e202820e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u16.c
! ab0fb1949e6b7e1fca49f2a3339dc2e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u32.c
! 36efd21004782131be02943f6253fb92  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u8.c
! f1fb11041841d3a424e1c6f14faf4f68  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f16.c
! 98712246c0192d146dace3ccc0e17ff7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f32.c
! 82836c9e53cde838887bf175f3bd6a9a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s16.c
! 5b2bbfb164d036a009b67e2c3d9fcfb8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s32.c
! e08c55e46db76183310c30da7627fed1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s8.c
! 0d0400ac0c7763d4497ce8e855981945  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u16.c
! ac47da27ef08555edf6808d2eec76caa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u32.c
! 79d29a6ca815b0ab8b7aa24e8f7e1ddf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u8.c
! 3846a3ee99d7f3a85c4e9ce0e06d0b8d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c
! 8ff6ee661647110eba0ee902705f2ace  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c
! da8bbd7c8ce52691b9d26f898c5eaa07  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c
! 0945923cc24bcc6affc4a19f91c9f613  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c
! f3ad7983bd0cf1cb4a7be3a90bf8ffe8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c
! ac6cd6ef7e1c0d629b2a4ed5571cd224  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c
! 33f50c4e9f3041accc73ff24e8da2aaf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c
! 22c41b18024ccc245df25282bc7d8841  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c
! 135e462a7790a7a81a28f71d7281ca12  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f16.c
! fc6f4c3be2f06bf5fbe18466ab8b1c98  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f32.c
! 85ad59120f99c7a5454394855dec01f3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s16.c
! 8319b27b6817e1ca579bcc426ff79187  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s32.c
! 40aad0c8aafde91830d81ddc046f04f9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s8.c
! fde14ecac1774367afeb60759060b871  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u16.c
! 898c123119fb94688f2ec02d20afba8b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u32.c
! 7f55ee8db1bdec54667020f8fc30a2cb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u8.c
! 81e6b201ac4c0dbf1ba53639105e6a23  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c
! 05685dd53e0152c93b2984d71e03af2b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c
! 335b9cb275cb96bbd6a109f75491e753  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c
! f31390a1503d563903b25a8ca28205da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c
! 1876eb451e29d483cdf3006e33ec1be5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c
! 061e5c1204767521eeaa311a8c9a3422  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c
! 43c0762b00997eaa07647f33be56ce96  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c
! 74a63f20d4ec2ce34744093b396a9dad  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c
! 9eca3bb3521b0fff5acc40308da0469f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c
! bbcb3ea3274e97f6f708a06265c59253  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c
! c48c17fa57af1349fd5f19fcdb858bcb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c
! b8b0cae8a96532faf46950446681f338  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c
! 5e102299c9dc6de1100d7639500b62f2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s16.c
! 17f3089d5fde1616da21c475f92b914b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s32.c
! abfc0e4654ba29e6b2339686efba6fb4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s8.c
! 8dc384e90fdcd0a71f7d04f67f7108dd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u16.c
! 45b1827b5bdec7259eb71d25f816604e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u32.c
! f7f5fdd1b66731a228a7fc133210c1df  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u8.c
! 760126a222489795ffdeb745bde25d7b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c
! d0e32bbe79c058b67f14f389ed00c026  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c
! 9af51a295133046c1871f7e26b71c8d9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c
! 5131185b861ac35414764421a41d376a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c
! b64036d0e4652c89049f943a11bc896d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c
! 06fd44259c15a9ecf1df5b8265ae45b7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c
! 49102b3b7196fa2c571c40fe8791ae8f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c
! 3deda27797695493a9e567062c139857  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c
! 78fe9b6d29835717f2993e76bf4de6be  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c
! 874577ef1aa8bc6ca4a416c531dcb322  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c
! d40af626a080e6b45941068f503a11a0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c
! b19e1e2343857eb82e04cae9cc29b25e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c
! b4cf7f2a1489458e36dfd4518713560f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c
! eec0c5413aaf58c513f78c16695ba8f8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c
! 0770112509a3a62968093ae926528aef  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c
! fc08408f65929bbf1123c8c8a9577867  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c
! c93dc803cd7f8a573f033096c608dba3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c
! 8293f20b1109f375e9b06240f3498a7a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c
! 915adf23465dbb539bc8c88973242f36  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c
! cadb86272f293acc72a4eff2fbe6fa9a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c
! f640962350a6dae2e4fc8dfd59264cae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c
! 6a71d242ce147e9a1ca72f0d73cf6325  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c
! 59b7d0d6392afa71053879447fcb16fd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_f16.c
! 0d369703e21c046037dc838bc1fafb04  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c
! fddd41cdd0cc8cb34940c01b673a7da4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c
! d5f5d6524bfa126023bff933a756011d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c
! df8ee4ead67a1adeafe7bbc76507b024  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c
! 3489b687a044802f3176229a6769990e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c
! 2b8ac2695192344c815bad3e02b84b6e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c
! 67d3214336dcaea37feb66c69c3312f0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c
! 296a83f75a509dc927750c3737a8d520  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c
! f82c0b5d6dfd5c2a9cdc0dc30728207a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c
! 4e597fa63d0a6e63381af5b012c9ec8a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c
! 1fdcb5219e389eb08bfb9eddada47393  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c
! ffd7ee04b4b55d6b3d826d16e3efd475  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c
! e8ef4676d77cede799d6d402ed588faf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c
! 4c6e26e41c3146be010f7936d2d4692c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c
! c791029a7f63f51d3f063f9e88b99c07  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c
! de2f245b75a952972bfce7bb982f3540  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c
! d850b0daab2de1b4b3a1daa13ae0bf04  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c
! d9c5b40f3af32f58db55ceed1ce116e1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c
! 4d462a45e917c14cf4bf1b6884683472  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c
! 09dd91514885997df4382d270cf2f1ab  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c
! 279448c1056ca111283b371bd272a48c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s16.c
! 3a7f298db23a1de961fcc0efb57038c4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s32.c
! d246ff3a6cf7751ddc9e5bbd792e5085  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u16.c
! c125cc946f6572574ad9d6178907d0ac  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u32.c
! 03ee8313155c957df69b53390a07b39a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c
! 5c7651f30c7a4c31a8fbd5e2446192a0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c
! 6ec8720b3adba4aed441138942e707ca  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c
! 2d730d5d7de6e9d5bc00e8af70563bbb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c
! 4965f7ce1f97b3b599a26f75d95ae42c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c
! 97ebc1c5736fc7f3ba7006a9baa2892e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_f32.c
! 09ffdfcdf88ea2beb4f986113249db11  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c
! a1eaac4134d0d15cb534ec4919d34c1f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c
! 5f4e01c70dcd9658e4f39653ebc8fadf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c
! 853c1fd913d18719ecc086a2d5f633cc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c
! 5d5ef25021a8113a5fb480841314fd3a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c
! a3790ebd5d675fa6ff483959b29ef823  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c
! c5df5ed6f724e6c6be59fa202b46c69d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c
! bcfea1585fb8836176f92b023ed891d8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c
! 7ec657731d5808019c6519f4085791cd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c
! d333d3194dbf929474c8c6016c699679  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c
! 7fea2e7d6a072b0cbfe0a5e16e4697fc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c
! e9a9b5d959c8260abaedc4be1cf324ca  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c
! 041d6f4aad87127e597849c5630ecad0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c
! 4f6688b983f2894067926acdc1c69767  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c
! 8aee8b6788e9523ace3c0b0e418a9d82  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c
! 23d8d6de37a619142751ed7fc31b8c4e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c
! db5c089d4f6c3c8bdbed578cc7d729d8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c
! a281533c419fe9b2a11a0aee8962c85b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c
! a658ceef6ea8ad148a7972b05d576b08  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c
! 4c49ea124f47efb974a75b21d23e67d8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c
! e6716d9b325b90bc7aa62a56615503c0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c
! c41d03fd2be1eae911f39252caa40c73  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c
! 66535ca35261a9b6f777aafddee2217e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c
! 01e85e86bf1e512454173b86058a2076  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c
! 53fa12974b0acccdff9bd12fa8323cdd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_s32.c
! 6e6db9451acdfa563a8cdb9c57c4eacd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_u32.c
! 58cb73d621b713ebe5634431509c7854  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c
! fc232654d74a8f153c430f830464193d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c
! 5b256b4d531fa066fb2d4b1429db5841  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c
  c74c5973fcfef73146c302e43aae1d84  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldst24q_reg_offset.c
! 4596f8a6680597f5526864379597c690  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c
! 9bc88de909354740e2801b0cefb06212  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c
! b4ffdc567fee6bf0d9219f602465b6ff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c
! ca0515bfe0f3bdadcbe85aabb3e6b8cd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c
! 3159aab876060418d43294ca1450808c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c
! 4cdbc7f8a437d4cae26970b63cdb292f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c
! 874e0d6b5c383df226239ab581ad0860  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c
! b8ca2edcffd54727785ac773bbd3902f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c
! 35afd53686f007403109332a5fdb4ea0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c
! 16c1bebb3dc3da8513ee1cdb4b7e2ef1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c
! 9a6c251f847412e43e5494cf966114d0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c
! dec6430b84704c3d68e0f0d2e966943d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c
! f6c598f58fbc7caa2a09b9b46070ab0e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c
! 656752b3e7ae627046a7ab5a1b704b8c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c
! 082ca6e93476a686a6b2f5179be3fafc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c
! 458772411a018731122cd0b3a945aa13  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c
! 884cdcae054ad5898f4b4c4d9837a118  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16-1.c
! 4df2f37490498b42180ea7b97209a0a7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c
! 7e6adb7a40553d5501ead4e4f105851a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32-1.c
! b6b0bb23f2b062338458ce9e7e9feb0a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c
! 51d3ef6c52791fecec4e2ba80ac38a73  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16-1.c
! 9bba4a9f6c16c931b1ed1247164c62da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c
! d217e5e037090519192a7701a47c38be  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32-1.c
! 0935eb24719bf73bc47f855ad1081db8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c
! 26d712377c900756d2fe8eb088fef396  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c
! 3c7a54dd7e9743b1d6424f80c1b6a829  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c
! 92c98f3b74dff854d81832e9727def7f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c
! 209f92c05637a267d570878acd055329  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c
! a5c145f93cffd39080a98c13fbb0429b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c
! 75279a90452daab2115e98f3e7c8716c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c
! 3e59645c6c893e8eb80f7aac6fc4e8bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c
! 3c00a1171264756c3e573559debd8816  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c
! 2387d728d98725468692acd223d23133  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c
! 728fcdc775448ed1ffb8c707c4a4e5b0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c
! 19a4b57d187e4a0b2e2eaa376e0ba799  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16-1.c
! 959cad8d69514f04fca6cd17f4c03237  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c
! 2f888fec0412321b9cd257608740fe59  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32-1.c
! 6c72a8485de34992533235b9ea138e3c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c
! 9c9288b3fdbf2e63eba7bda0582abb1f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c
! 701c5f5f22b93ed23a4df46a2d897ecd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c
! 5dcf0e5525c3e7c762eeb66167b08553  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c
! ec2790d3e8364d9d6ba808990db54989  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c
! 8965384bfea24f9830d1908d6b7a20bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c
! 86254890a08ea9f6486e40694b57b8fd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c
! 16aac1853b3345a8a96a4f41d82c9f42  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c
! e7a5185f3efc93b2915d65a02ccd9a4c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c
! f4147329c741d7d0cd9f7e73cd049f24  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c
! 11a0f140efaa6d3a9f243c63202cee0f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c
! cb83cde53906583fdc9c93c155b82234  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c
! ae5b3aa6ed8783cdfa6f5497c4330d76  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c
! 8139768328841868224a43c9dacbfc68  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c
! c59a0d13364bf587568bf7451dc40e00  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c
! 5d2edc744e6d638e38b5a76bf318daad  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c
! cbec71e72bde8ed62f96a5fa668e2a59  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c
! 0a8102737c298320000a07e54e1f9bf4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c
! 6b9b355a0cc2cffbd63261c8bc1ecc17  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c
! 25dca9d227fb912ff3f55adabe0d8b1c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c
! 66ba3bf6699d36e29fd20123fd7e95a8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c
! e8c3d66cc23382b670da52405d9ea84c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c
! 9e095b70d7425daf4cfffb1d8a3e1dbe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c
! 14675994483024b996ee665829b7838b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c
! f5474ed0c722b8c00e9fae7dc3888bdb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c
! a3c8a7e2930174c27e694c39a1e1bee0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c
! dd0206c044a58630b043439108264338  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c
! fa7cef10b4b5af14f0e3abc6f7fd941e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c
! 8bb5b3651b9e3268ffacbe99ec653c44  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c
! 9c4313775558b2ff144462ca842df391  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c
! bb8bc380d0b03016b8322a41bd778175  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c
! dea55b5938395147e57178fbe34faab2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c
! 4f1fdb3ecfcf322f2f9cb07b57a9cd0e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c
! 95d72210ec90ea383c7e0cd0a17e57d8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c
! 0e687d1b735d367a0b1e43deb7001876  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c
! 0d2d559f3b7bad9492de9c6792fa9a36  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c
! 91b4e20aa8723b732bd92e11142d2f1e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c
! ddf8353591c231f403e0ea139834e8d9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c
! f924a3e8d7c7abd0ddefbd4787e708ad  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c
! f02008ba8651f14603f3dc77075daf2c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c
! c0fff210557fbd8441f4e1d625f6c85b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c
! 35d70b56a6f9cc653f941e56f6e0e0b2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c
! 054f2f8c2f499cbec7be6728db6f911d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c
! 9fb5326a76c205149e0f5f0637444e5c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c
! 282d6b0499e3efc87ea61bb1d9521c2b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c
! b41b2b193699b9003342a61ad64dc3ad  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c
! 790c933f7cf5110a61c15962f2fba98b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c
! c9b82873e4873c90d254eec714ec4936  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16-1.c
! 66a6c13073bd0cae309a6a94f7319e2c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c
! 90f38d8ca6703507084d0d5df8a54763  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32-1.c
! 4418ecceceb87beab2c9a5e8f2f0f5fa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c
! 0ed6cef5484566d609960d8e5f923413  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16-1.c
! 593ff28fe1a4cea3dd25037993c87798  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c
! 939e32f355e74e2c1eaf01dc0db612a7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c
! 191a27957ba46699e6cc37506568ef13  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c
! be894468e8fbdc34fd239cb4a338f4af  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c
! 1e5658386d1543a8fcc8fea54ac686af  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c
! b91f24d146e2543812a08944d3d7643e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c
! b32b5527a747248aaebbde1653431c42  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c
! b8a53289449c42d870a7c983c33933ec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c
! 736c0ace129e5bbb5cb98fff06bd9870  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c
! 9193a08e42eb8030510236e040d92b1d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c
! 43f437d35f9ef1b41d08a98c7b5e00aa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c
! 76a74cc77bc95a78769980ae99740a38  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c
! 484e2b890dfdf853dee7c6d6dfe299f5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c
! b9e053e2f2f132ce8f3644b7dd2500f2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c
! db54cc6f11588ef62dd2aa65682ece16  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c
! 6b49b02fe8f7d10e853a3392b4a7ec5a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c
! 6a9abdd33538108ac7894960f2bba0e0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c
! 3a23fd5083abfbbe184ff324dac68d18  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c
! 9c8b839247c19c62a640d7a67b004273  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c
! 9a38b7a0092ac944e8a60a786b423570  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c
! cbcd09d0f161db3f15795eafa91a85f7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c
! 9b3efea5488c86152fc3d1aff8b71e4b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c
! 7994b885c6d8fbddfaee222c02d89c71  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c
! 75ede7b945f8e23a32177889505ebda8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c
! f9ef9a3ec55ac8b01e0e923bb615d000  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c
! 309afdff54a7b54e2db046c24c7e466e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c
! e2572127e21f61ebbb4e5abdf3269daa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c
! c9d104d420a5310b122c5758a5be5188  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c
! ddff6c028a6d2cb1911e8e45f9e27850  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c
! 2e30e0a4df99decd913f1e4297e2fab1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c
! 324bcd3840f318fee994aafd7a43b268  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c
! 9600d6759fb6e5b6e450b99fa4abfa7f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c
! 989e03883122f4fe4915f9af9d342d98  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c
! f43ca3dee611a5d0ff137928dc9484da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c
! 18e6bf252f27f49cd4f4975d9ecb50bd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c
! ede4ac02f16e03ebb275ca501bb142e8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c
! 633c86f9fe5d20ab502dc98b9bc6d744  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c
! 03c3cc8b9cb613f7c16e002d933b4b21  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c
! 64c3e9c8e7339c938941a97a2b1675e2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c
! 2235f6a28fce854294e6f4fb80964026  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c
! d5445ce2a001793ca75bb6423f0e8777  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c
! 72e27dbb76f102943c8969b208aaeb41  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c
! b000adf4b0a2512b3cf4a86b53dfc88e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c
! 68edfb683e9e4efbdc68fd762be9665b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c
! 0cd4f47d8b3ce8e8b59fe0598a6cb9b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c
! 81924a326694cbb609829bdd437b3d89  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c
! 44d8b8177daa9fa8636700523932535e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c
! e2af8cc747291fd9e9d3fe6aa6d7d2d6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c
! 13af4f2e43f1af3bfe7016fd97cc4cb5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c
! af783b65330fe1e5431ca15f438cadbc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c
! af575112973078e25b32c2720ce87849  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c
! 695bb164c7455a143c9d1ea810856ab7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c
! 97ea0181b8a19de0dd265596c9565cdb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c
! f612057fc278ba116f2bc22d45f35049  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s16.c
! 89179ce787b9f650318603a902efb385  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s32.c
! ad981bc4ba0475e22a06f3f5a7101d1c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c
! 036ede4d2c7124a13862790877547a3d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u16.c
! 9dab762933a3d353f5dfea59cd89a109  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u32.c
! 978c28b006fd2de03a1e3162621c9fd1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u8.c
! 1f5be18003fc06811c86f92ab6a1bc64  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c
! 6a8ac77632aafd27faf2e19847491281  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c
! cabb7b5cc06d98e3f6026f9a2c8620a4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c
! 937effad50e411f189d924b190acb9b6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c
! f87a71b5a9a4e618aedaf22e6d18c0ad  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c
! 21b2cd858e6995df0219bc56d01cf9dc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c
! 80cfbdd83a9c118ab03faa139057205d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c
! 95b2896b5828aa934262dd0242b0fd52  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c
! 8a7883dfd75e63a6473a8eebd96f63b1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c
! afb04a3ee41591ee30e71d627c0556c2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c
! f0be84653f23452f44bcfcf124788bff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c
! 36a593c6270e70aba6482587dab13574  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c
! 814c3f5946dd75fe3db0cd2f56a70d7c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s16.c
! f45b6c3d3f93edad4dae5243a422aa78  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s32.c
! 5fab7da1fbace47a608b4d0961f5ba7c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s8.c
! 44d8cc5815c210953c6b690d0fcb8219  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u16.c
! 70f5124ce822bc3857294a26bb543f13  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u32.c
! 144a95f4191ed0c5945502bf132776fc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u8.c
! 0f5b3856fcadd9a8ef36f65e50807611  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c
! bd81254ab17c0fa4dff5a5cdd809c38a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c
! 22e6267a5253b37904c92638885397e8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c
! cd5634c0b96862d39e9444021d39b1b9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s16.c
! 679d44c7c099f4ce9371bc6dd4bdef3d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s32.c
! 1a83211dbd8ce509b6f2d46f5577ff7b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s8.c
! 926cfdfddfa854e0d945b8cca5efd01b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c
! bcc422b36a62f74f6090502ccebd4ddb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c
! 1ba9bd39a79a9438913eb4622d0a52b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c
! 2ddb1caa18c3dc2e0895fed8764ff095  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c
! 7e1576fc212dfc8b77277b242be0f180  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c
! 995e900e827e48a37a40ae5f1fb13037  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c
! 559dc8f0e74007bfcefa3226c1ec9dac  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c
! dfafc1504188d918af0c4576c94fbbc7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c
! 1fb60fccd0248495ea4b4c97413201ac  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c
! 10b11571f2be4d2236deb2da727ae7d6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c
! 9c737b6c8fcda3e82a1365956ab3a30a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c
! e98c149fb02279c17fd68b12edf70f19  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c
! 661a7d0add4661c6b1d8e80dba7a2323  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c
! a22ad420ded3325d9074a0a6ae41e305  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c
! 598b1e8a35cd4a9ffe726958498f3959  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c
! 05177d0e36523beae9ee152178a26e72  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c
! 024bc9ad0c76f225118a136c98c8c594  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c
! fd55dafa0136c328400ba598afef8c23  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c
! fa7c12dd75a41e215e60f0cb9035d5fc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c
! 91a216a4ba8c16169a0277a7db3018f3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c
! 3df599c5cab1165c75324e0d25330f4d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c
! 7316f9d930f72213ea39aee745df2040  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c
! 01e2d5918a97b102c9f0f45a74c4f792  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c
! abd2097ce53ee2b3999274d673ff09bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c
! 04a947f082c84919bff298dbf049603f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c
! c63a6c18d3b88652164066498cdb98c7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c
! 71dcae908ebe2c659b3513f2712810f8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c
! c0e8256bfe594d4927771107c5afcdae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c
! b45a70f539228ff0eadb4e2ec4428cbf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c
! b71fc3ac657a8b28136416f05a38314c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c
! 704f518fcc5641886bb12f23f9cb4211  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c
! 556b5a3f7677f6b7cb0d9a7e39610be8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c
! c274fbc729098f0ff6c716f2a5ae6cef  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c
! 98eb8407b9499015d73a8fc8f7dbf83b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c
! 972b712fae38e0f913132c095d74492b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c
! f8eab11a56a8ba00ab534783b3c7c389  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c
! f469f2403f6376c2f3cdf766ba271d1a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c
! b57102267d242266cf01565717df6423  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c
! 8444fbfa1b1dcbefb56f2e9e1633eb00  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c
! 92356486457c7b71a221f63fe7dca010  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c
! c8f02f7281d5ab217a4404ad61530638  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c
! 1235f65e0f08e141db2a3d288a9a295e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c
! 5e7887d764fe355bb4f38060052c9796  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c
! a70d3e6a2871cd94e3c514817c868bfb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c
! 1f0dc367c9c18bcf473bec3b4d790bf2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c
! baff65d012bba4e86900cbab1060b4a1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c
! 8335e7c658fa6c330825076b8b2dd9b9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c
! 012b267119586b9a78303e50a277b420  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c
! e6de0c804336d63319d08eadf31fc926  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c
! 3c0872cc2bfa593e8f881019ddff3fbc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c
! c621e23bc50db9851b8de893f59ad858  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c
! a4750c8324293c2ab5236f20f1e0807f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c
! a1899fa0477730fe156fb0328b266d23  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c
! 2b95e936f3c55bad34951a1861163b58  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c
! 931dfa9444508dc9eb94f05715d01e87  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c
! da6cd07793343a62df24c8e0123a13ec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c
! a8041da21dc42822b3e0173e2d15ff54  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c
! 3ed164689f8831c026e9708f55760885  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c
! 116b4d4ef38ccb685630d8e7d35fc3d3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c
! b09a12660dbad16d75fe7bf09e6b3248  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c
! d576d9d4bb33d1aed2f76c2551f9f67d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c
! 1c5dad89201b729a4e0000628387bf9e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c
! 3bc65c0c6d2bb785946bc0abadd25deb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c
! 5c5055ab333ac11e6dfe595f6e24b7fa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c
! f6d3831a20dd105fad25c9d493e8d2f9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c
! b930ddb58b614ac8b38639f0d9b5d556  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c
! c00503e9a99304d29038ad4fd36c781e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c
! 4f4a564b1c5e482576f3a121f6e0772a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c
! 05f44d81fb56990f44f29f3bd837e4d9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c
! a4c8bd12d8e041883353bfc180cdd3f3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c
! 5af67eef4beb2402907fc389e26ae2ac  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c
! 10831a408812a743af2a5f76da9a8d82  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c
! 12cef9f835c9494f0e4c038df2eafec9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c
! e724244264b4855ae994cf7f805aa3bf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c
! 094ae4aa5ab7c1801a9a756838605801  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c
! 765cc510dc3334bda8036e1261e715be  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c
! c3505a266be3a251f0b897f79c7b16e8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c
! 66e352f243fbcce82c416ac0d928d376  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c
! df4405707e0521879d014fcd5fe7e401  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c
! d9b425348e63cdd7b4dfc1b62e2cebb1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c
! bc99486b2a5febbd645388880c208600  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c
! 83b066907b63249e6a4e3793f13c8ee0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c
! 5c695729f19940b49b0d500fd459e3a9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c
! 0132accec84b3eceeefcaae947899853  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c
! 50c63f163f7b745f8aa7697802f06783  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c
! 551c99f40097365dd31b410e21f8357b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c
! 9f9294ffa766409988b1763fee7853d3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c
! 906250053abdf71d445ae0cbd6d84d10  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c
! 016460dd58b80ceb62af21789899c8a9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c
! 5b951bfd09bbc33e3bf6f72de75fcf17  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c
! 55993e870d267cd8e06878059dbfc868  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c
! 356900814d2a4a4be175d7388bc45017  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c
! 41157c9d4854013d4f1b4c9b4466768e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s16.c
! 20182b116a2eb7788f6e81f2ed700371  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s8.c
! fb52a5e83c62cf17cc7eb54f61e59b5b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u16.c
! 130a782fbe6eced16f3e1f30e2c97c9a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u8.c
! 80bdfd4b5e2d4ff508d4814075bdbe3b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c
! 46fd24dd68893568504de11171bf604f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c
! 6b3e25caf9625976db0fec5d34362ff1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c
! 43144289b4c22e11df0a16fb74689185  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c
! 7c5aa0e585944fd1f6c339668bbd664b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c
! 7cc8bc2e5564a4eabeccf55e88522cf1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c
! 6854703fe3f228c23b28e3f7e8760404  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c
! 3fbd35e32596bd521ede4aa90ee881ea  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c
! 4bb626f8da399d9c5057e1566fb6f8d4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s16.c
! c0ff7d24b9d043875a3939881e847bdd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s8.c
! c32acf93c951178b94697c455608a336  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u16.c
! 623864838e48aa1cb51cb1eb89bb5578  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u8.c
! 215c3977bf1ef4a828aa717358ded65e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c
! a913bc996966732722b2805128b7dcc0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c
! efebb599581977dacdb34a3486ece0c9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c
! b90c6afb5f6dc297f97358ba32fea406  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c
! 5800adb3d96f1440a55025424a1612ee  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c
! f2294c98579bf8c1e43bc09dffd499f6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c
! 59dd992bdbbcb4a8e6ff442460471b39  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c
! a76738c51c2722ce1015a153d7f6a3c0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c
! 630b1c49fa9e1daf290eb6ddd1474537  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s16.c
! 3c31114c1456cebf6305e86049e2b29f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s32.c
! 3b3a2f906a8acaca188148624ac0878c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u16.c
! bd2abb57fe3dfe8ed091828763522feb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u32.c
! ac40eced9d474e4200781e9fa8e31e63  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c
! a2ebf55f532c8adf6195fc686c1f6d3c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c
! 71e3855bedc7295069446e56e7f4ec64  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c
! 02f1ff8735811826a7d2430108c6bb21  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c
! 86a149b6bf5c7f7e125b3e3caa34a875  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s16.c
! 435cc349f39741b732ae08e5ae62047c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s32.c
! 501442b0934e883ca96f55b07018d675  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u16.c
! ef852e3af0a02199518364ceb253f2ae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u32.c
! c8c24ab941ca3be9f1087ca81d897bfe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c
! fbff8f13b8ccb62c103f6944f6adab78  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c
! 2286aa160b652035aca4dac295009200  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c
! 659002488db3e8632c12bfa50f947140  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c
! 23b86cf113eb73b2d9f98daa5f3ff865  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c
! ab92ee1bb7d9c6ae499ea54f2a161f01  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c
! 921ee39d834042ad2a12ba98f0aa7574  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c
! 831a0685804be5b4e8b4b1efc306f215  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c
! 41c4e0c56b07e2fa8766265515d44219  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c
! 7cc30e85a786791174f3c22d72c42faa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c
! 23c40a91a6c037cbc67b227c98f5c1c2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c
! 0a673a3341ae98ca5fb857ee30c396ce  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c
! bcbf09a8f49054533d7579ebb4c26e1f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c
! 523941b7b5ed4652e35d9292f80fb2ab  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c
! 748a49c3c02f34e35cd0844303518386  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c
! 94face5adb4d96d68ec8c782e8de680b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c
! 15a0a46258164bde7c52e0d035720832  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c
! 419c3ee3cfac902bb20c8d46dc687a93  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c
! 8898ab9595f0da187e307bf343486660  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c
! 9c8f0bc76a114dfd1011cd9c9c1ee51b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c
! eeddaaac9cd72a96a14869e600263447  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c
! 0783bc2a4842125e9e4f2a37f4c731ff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c
! f47458dd5839c886c2a5dd616a73f8ec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c
! c57a6ca399d599f89ba82dee4d4e47d2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c
! f8b49f7229617396e0f34021e099e2d4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c
! 158aee53b04f45659e75804c0c0e7ac5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c
! 6e22f3f2e8aad053d752adb4d757a969  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c
! 8077dc11ad49d11344f3a292bbcd5d7e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c
! becc7456205778ef9d9511ef6292f6e1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c
! 9da2c69da44a28c10d42fcfeb5eceb2f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c
! 595ed1d970f9487af1b1fbda5b3592b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c
! 00da188191730fa829126515d8af3d3c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c
! 91638b34d9973610f3d7e97dbe782d15  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c
! b0fbc0e9e273ee1a68ffa3e9825c575e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c
! 496ad1eb26fa76531ca2074118793131  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c
! a9d3c7431329def6a79e0ceb211f155d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c
! caa592131a59108789cc9c3a3ca975a6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c
! 6643a3f61311733714787eb94ad8973a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c
! b8c221f6c6cd394e28dce62f4d832194  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c
! cdc8f1dd9239bc3e585f8af26e0d1ce6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c
! c25dd1356707c084c78eb26268993317  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c
! 691dfc6c3d1611c995d3245cac573c3d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c
! 8cb482318d0240633147ce925cad4b08  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c
! 20a6c9df4ce4c869c1255ea048b26a30  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c
! e7b470f46761f5151fd72f5ce37f1ce9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c
! 851db6473887c3e9370c37cec75f1ee4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c
! 483070e1b9f823c2add33fdeacd5ef6f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c
! f57f8c90349726fe85866138bbd26ba9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c
! 9661645f80e3fb58f5fab075612a54ff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c
! 2e2ba1559c3981c68269226f08842e43  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c
! 4e3243966c37d427a3b9112d96bb4af2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c
! 6ed69a4013afea54468a3f25f8eebb41  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c
! 1bad8f2a86c33e304bb681756dbdafab  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c
! 97f7bd6239d4fc0deaffb2062c52416e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c
! 87292b01b8b3575e8ce30b68524c6988  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c
! cf838175caa9ffad49c885457b2cf927  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c
! 7b50f9cbce602df82486ba7d6ed231ec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c
! 3da43df50a8766ccbea1b1c440aeebcc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c
! ea738e11376bfe8c657b4dd00aa1872d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c
! 9e012b534473536bbd4ff42fa723086e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c
! d8d1eb843e17812f0bce79c622cfcea1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c
! 08d0ec7f990db9cf9f0a134b856b70ec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c
! 1a109f97b9b4acea8366da99508ebe77  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c
! 8cada7c7957dee532f8ba32221a3861b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c
! 2df8263c593f71dff6b931dd22208a26  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c
! 337800f5234de4421672620c469a080e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c
! 959d1ac2da4cc8956a00404425b914a8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c
! 7035266d7911e3c66b94956157705bcd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c
! 9c1ef6033c0e58a6edbbc8ff55ef6eb2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c
! 3d5db4cafe14cc9a0d8b9702f8eaaa79  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c
! aaea531e9c3de4bdd46fdaed408b14a9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c
! 518863f610be718f4cbdf28356f92f20  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c
! d259cb258406f29f8c6afa4f94df49c3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c
! 0e8213a239e4b46641707560e2e09255  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c
! 0e26304979b85f3ffe661a04428090c8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c
! c4ea6263c18ad27b9a0d5fed7e027405  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c
! 1b384395661c1e0d3c2e7c581f2bd26b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c
! 570d8c41f0553f392125deb01a9ebbed  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c
! 24da91637eba519e1c7b8d76bfe0043c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c
! d78d9c102e89bf77469fc6520b6efd2e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c
! 0f139e40c34e732b04d4456221661274  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c
! 91a062f5431f9ce8b04fd9fe6b5bf334  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c
! 3d9eb0e6c655e2cd19fe1eca402f744b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c
! 4605d13f0eea6efbad40d92239cb3dd5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c
! 8debd61e048d91c8bc582d3336c2dfd8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c
! 88ff44a2d6639155da75c68d4f26d5f5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c
! 5f705b44a993f0b6de2945f98dae8f71  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c
! b8946f7b8f08d441ca1f1628523e9574  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c
! 53a08d4e473fb076c27b37f255073777  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c
! fba13bff73c1385a4a7942985baaaf7c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c
! f7343c5d729108e8a4f44854c7456382  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c
! a22774a9025e8cbcb26991cb2cd1943a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c
! 4c7b45387e6bc34ad93239cdf9593708  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c
! d2fac588a94634e18ca8f4752320fc72  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c
! 610b02a519783235ff41c5a4d2c289d7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c
! e219d23128fbe86b24ade7cea1def46a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c
! ac4a23371698407c9f007d28acc090c9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c
! 405067f1e0818ea1d7a8e1ecb52806ec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c
! 78ded989333c83e99177ef7220cb52d7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c
! 800725a61dd1ee1f91472897c0528296  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c
! f04e4695c544d3497be3ac576589b14f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c
! a1b3663805dcceb4a92aee7c1b139c05  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c
! eeac86b1314c4af13bdcb59ee0266ad5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c
! b934f2865f685511f882c8ae0bfc9e53  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c
! 6004db00746f4669b31ccac771057851  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c
! 45f59398386cff192828cf33e335a768  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c
! 2335e561bfb15455ffd3f710f41d023f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c
! 139bc8bbefa48a5c1d2e4c0ceb435bd6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c
! ae710741bdbfe93b9eb4bb866d05a044  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c
! aa2ad809a980c64a182220e748c0010e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c
! 34efc122594a909a6f76734d0406088a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c
! 260e316c6776441da918ead0133594dc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c
! 20c5a475cef61652952cbbc639350e1d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c
! 49354ddb2a4c676e399cbf09d4a3aaae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c
! fcc2d94b663886ce15e7a740fbb0ced1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c
! e333febb69eec3974217f437ba646af4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c
! d9bfa0a37b95045709817230b3910572  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c
! 8d481558e4ea61ecf57156d32f99ff85  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c
! 1a9f3731a92c40c684d2e33d9f1f6de3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c
! 53bb75afff319ac070e22733345cbf46  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c
! 2dbce946b67e38561c8df9ff6da46969  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c
! ae7c5f268de2c73d12a437493c3e7ada  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c
! b770578bb44b2ed666ed871f729ed055  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c
! ecca41e8b0225d6bf77eb588b53eb56c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c
! 0e8a18b66b593f68328d41893d159dbf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c
! 0504141c8242105d0e195e11c7cbaeb7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c
! 946c93dd2398beb4ea2ef9c677e8225c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c
! ce13cce0f60d23074a7ac98e4d1215e6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c
! aa6cee6279089f678fbfe0c7d1c85d0b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c
! 85a27f27b4b4309a31e7632439d21b18  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c
! 87d03792a1dcc780801dc551b70645c6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c
! d8525163ae25460c19376e88db6f72d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c
! 570a06531f728e88a2153bdc6a81409c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c
! 14de4ba25759b4eaa4273cab750edff9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c
! 7cdc7db753d4889e635d2376238f7416  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s16.c
! b860a74dd5f3750cff4f02bff2266721  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s32.c
! eb237c95379ea6b9b4326e179381bbd0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s8.c
! 2bb5744b5f7905e4ceb270ff55db80a3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u16.c
! 33c91401f16c85bb7faed64d7e33e163  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u32.c
! 5999668fd3d2a493c5c2194ee909a29f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u8.c
! 17b1a85cfaf7e53644f1e882c40285ee  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c
! c9f94f152c8a09150e9daa65ef848d1b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c
! aabcc370e6a78e19d2d76a1146d68635  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c
! e84726e87a2b681744b04d50e3388caf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c
! ba8eb44d466a06efb479edbabada352d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c
! 15615cf4ed899b7e2bfac6903ec62b0b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c
! ccc49af6593940ed5ced1085838124d4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c
! 7cbcd746c8f2090b14593137cc4df570  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c
! 3dc5f6805e818b3c1a3f93343d42b9b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c
! 5c5bfd733a0a273feb9cffd702da9e72  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c
! fcd36904464f5b13ff948aee4352b745  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c
! 5f8623b070a9d45613a4242337db4943  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c
! e4a311c216945c6cc2753e4a5422be2b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c
! b5fdb403b6aaeb19d128a84f7b554bf4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c
! ae3d9d5cc1b83b4f3dc762c4c6b1b016  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c
! 592a4d33db3d201b641f2a8c2a0c8542  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c
! fcb60c8122452b02b289dc4e6d0d0d99  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c
! 78c466615171bd821c434249fe8eed7e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c
! 78b6aa63daa5b2cf0a7a82074c11b101  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c
! 28be01cbcea12f5db3bee571161b54c1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c
! 565e0b6d2c064ece01598cae84ac1b19  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c
! fe995c49832fc5574e53fb6c883fe0ec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c
! 0094bf3c19f233e41383367fe994a97b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c
! cc05e569ce50b3bf6ef050ad8ce82810  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c
! d5833cb7f06a24294ec62d5b0e78bd65  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c
! c56b79936b38be311cff25ee794f8efb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f16.c
! 7285dcc610c016ea97a8cc9e33127cd7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f32.c
! 3c54fee49e037ef3793c90a06c672355  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f16.c
! 3279e1802e380f25d51e7d257f312c23  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f32.c
! 0e01a84f8ea5c3bed1437c38bf2ca4aa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s16.c
! 24f70657c1878ef7253e9d4c0625245d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s32.c
! ec88cbffa052346588d5579b96e79e77  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s8.c
! e401c2f732c5726b36fb9fbf94b28de5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u16.c
! 579e5caa23a8516d7f8304a49d025a2d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u32.c
! 9925e00ed3d42f35d4935264b8a8483d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u8.c
! f4fdb5ff9f5fcf55473c18b5df843a8f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s16.c
! 1bf967f8d66d5eceecb627c2d5712858  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s32.c
! e9d5ba966899f1ed055c27a4cd8067ef  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s8.c
! 35f32f7912cca78da770543053cc42c2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u16.c
! 50f7dcebc9d1602dd763d5ad83de2e45  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u32.c
! 3e83049120627ae298ddba732212fa69  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u8.c
! 4937f49c4c3c419b7d5dd1d739d37961  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f16.c
! 7c37f5434146ff9ceaca62253086b7c3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f32.c
! e6c1058282a837a4c566783bc9a5c71c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s16.c
! 76d0688c45388213f8ec379176ff87b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s32.c
! 29e3fe7ca9aaf6b675cc4b52a79881af  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s8.c
! d5fa3d693599070e30603532a17e8e39  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u16.c
! a47493a288bee4d4d539dc243e1aaf42  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u32.c
! 14c86b1e66e85e2be70200c14c2e61fb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u8.c
! 7362117e36657f2d1f15f791a59cdae8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f16.c
! d840369431cca55668241937adfd8d08  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f32.c
! c8c51df6e7e306a2164ab5348a27edc3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f16.c
! 83d049ff0a5bdddc64fc41ecb29168d8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f32.c
! ae528ebde13484ec1feab0cd2eb58b73  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c
! 89c8d7b06c9a43e86260b44c16702d23  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c
! bd967ff213d3df5284bf54b48ff6ddd0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c
! fe441d8aaf0ac801eec68ef54ec4e6df  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c
! e4614073cc4b4b91739ef67fcd80c9dd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s16.c
! d5220c71cbbf5e28536295d69e51d126  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s32.c
! 7121c4c3ebd63e4c715fdaff4b4e18a5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s8.c
! 922c7240546ca34226c066641010d89f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u16.c
! 0c00b41a7bec64513ec80357e517543f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u32.c
! 4505c8576343bf0c007972b8a838eefc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u8.c
! 8a9ad30f53baeb6beee89c295e14d95c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s16.c
! 0f61df8914c2209726ec52389acaae0b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s32.c
! a995769d4a9e3c0746028c19fb78e89a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u16.c
! 6b2a14abc7b9f322350dab4e9276cb72  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u32.c
! 4b1b95a17e714b46f6b6813bde643a4a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s16.c
! 47ed299ac2007284044a705dbb8ceacf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s32.c
! 4fc036c0717ed9adf03138e01f98ab55  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s8.c
! 13829029eec2be2d2e94471ada3abc45  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u16.c
! 7cef1a25ed3d0c872048cd0bf793a550  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u32.c
! e1053f602360b0d8b360e97fffc2ab30  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u8.c
! 00eab911cf720bd2323748426c002cad  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f16.c
! a97366f0a8ac57933f583f0afff3a373  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f32.c
! e7622417a0b594ce0a3134758f2f37f8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s16.c
! 44b3aa74b73d91238a199211748e4d6d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s32.c
! 873efe26894ed99685afe5c4bca2435a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s8.c
! 728f867c95837d38a98a4194249d12c9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u16.c
! ce63babe98b29ee1e549fb3efd777577  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u32.c
! 5967f8c84c7a4c5eda09206a7856251e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u8.c
! 3973c5963b7e70f783692816e7bbc9a4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpnot.c
! e82e9a0698281f5df7ea029e87c11b3e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f16.c
! 1aa3bdf821ae48599ad12cdbdfcac6bd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f32.c
! a9db9c4f19eb63e85e7ad19a65c2551a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s16.c
! 0bc3e07bc6ee1c3d2573d4d384276e92  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s32.c
! 976f707381613d75d302bca1e999d78d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s64.c
! f768fd4e4ff6119d4155423077083788  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s8.c
! de3b4aae7630eda8945738cb562b1966  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u16.c
! 0802f88241104c6cfeee4c0eff01bf35  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u32.c
! 17d3d6f29ccaf9b064ecefe2387efa34  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u64.c
! 83ddff02db9b8b8340bcfe36e476e8b7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u8.c
! f0b24f5f34b8dd136dbb82e8042c9985  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c
! d2126b9f4535cbec629c1a37f353a88e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c
! e08f8ad7f8b419982a6dc28bf2d06e6c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c
! 01a59fb3f6d699691ffe966ce912565b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c
! 52e092145c321298609965fee876b0bd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c
! c703aeafea1b07d5cb6f430d10ed41d5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c
! c90f64775c01b99a4d8c630e9c143db3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c
! 4b5ab57c85998c94a2d228eba06b591c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c
! 21a89522e9a3adfada9fbe77c0c886fa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c
! ac2e0236fb56aedd8312ebab8983cc19  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c
! 70b57046a7fd6b983dc928905bcfd1ec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c
! 02c08e6cbe84600968cd408b8aed75eb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c
! df786d26be4d81f65a73006a42680631  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c
! 2fb8207176facbf5bce42abdfde2db06  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c
! 4b784bd06e42e8a3da3553c72ca6bbf7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c
! 103c6ff3e15a251308fa471dbe974832  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c
! 05ede1582286e9a11d38a63c90a6e7e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c
! ecd43cd613e38e48c6c0bccb9a3b5b87  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c
! d5f8c68b125a0cc36ec460674cc04534  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c
! db1f526423cfa8e95d483e418fede2fe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c
! 6be20bbdd6d6c691db2a312496565a69  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c
! 9a17ba047730d3b79d163833eb409764  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c
! ea83d241b400a016aaae7a8ec85179c3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c
! 47583fa514c87dd3856849dd93496748  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c
! ab93eebdea1c3fe3d65437d1ad3daa08  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c
! 73f357c45318636315d0e6d9251ce0ee  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c
! 8e727b739eb4994cd2502ca19f90968f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c
! b3add0674feba92bdbfa44d54a9ba78f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c
! d99f47b7cac7c0dc255b026bb696d893  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c
! 1585c181e5b7ade847a4d84d459bbd72  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c
! b23ed350b5043f272d4eb2a0e8a125cb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c
! c76b5a21f2e7dee297fadf1063f28e9b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c
! a97b45184d6b0feb3e46a9715564a455  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c
! 26b90b6f8e3ad68b5e0daa91ca8f20fe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c
! 48fa81e2a2bd359884a375e1769bcb03  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c
! 8037651a9936b07258daaee15425797a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c
! e16b420893cb6f61e2ea1443a3f32f2d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c
! b980638c349003fb3d171e3dc0dda78c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c
! 24e856c05a982e5991f9e36a5a43a8a9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c
! 4526a3ac6f7531b8febdd1228677a60e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c
! e3b4db3a425507a8c6af49b21840e2eb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c
! b665b5de88757cf2673c4eef65e2dd29  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c
! b111407030f24c50c0eca38d635f5fe4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c
! d7f14502a92c36aa32eb91d3b08126b0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c
! 76e81dba615e0eaa1533325e75ed7ef8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c
! 690db2bc09d4d59cffe457c0b00e3560  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c
! 47a1419d5d3739b96258877c3210becc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c
! 396239b933dd1fccaf557553735a7d9f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c
! fb2cfacd36935a2339c786c5214f0de5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c
! b843df5dcd51e4d4770f08821224c730  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c
! 3c736baa2470332d0669a59f86bc3fb7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c
! 73a1d6e0ccd67d3683fe4d030baab6d3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c
! 573c0e8f9a73b1b664b7bed5d2f8bae6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c
! 85cc9c19916c7b28f9e091cceac5be3e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c
! c3abe148bad4105126f72a7bce3855b7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c
! 7ccecb95e5a08fcfda0b61a6f6cc4ec3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c
! 76ad3f991d6e240e9ae89c2a51bed842  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c
! 070e6ae580050666439033525ed109e5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c
! 855dd0596f2266a101c859eb974e90e8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c
! f442220e56fd84137bc55981aa149a86  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c
! 3bf413b92f8341fec79756f2cd98ed31  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c
! f7e75980a74e1c51e44ba10e15b037bd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c
! e766a72cca028040056bfa4654e119c6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c
! 9b7cc735bec57b9b01828abc9d0aa451  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c
! de58706bb939f2265786e1f2530d2a24  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c
! f668a7a3b565952614a57af8fc1b0774  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c
! bfca640a69f3c62bd74ad355c0a33711  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c
! a8561c0df3f85e1429d3efce12cfa605  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c
! 78f1f321ee1ccc7660c0c7609bfbd99d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c
! 004e13c49412d0fc5a09afe98fede128  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c
! 49202e5548b65d0f501d329d029fc70e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c
! 2dd23e38beca787732056d1831ffa103  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c
! 7d5c4d538e1ad8a81fc933bcb7013425  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c
! 0ce6ecf62c19721bf9df4140ec43f714  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c
! 91b889f4659d47a142011c0dcd46bc70  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c
! a17f3d837ab31156a1ae01fe3ff4c561  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c
! 8c489200b3c39bf73c82e9d2214c3226  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c
! 3816a8bc5804979a8463f55055d7d985  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c
! a1a9421c964833d86670954eddf163d8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c
! cfe9d9dcfa30b78af98e13dfbab49afa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c
! ef092a53cb8eac5467d767fb3c6cff00  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c
! 73526d5eb41ac9d31c9fa36d739ce412  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c
! 3ffd8c166842f8cccd5fb4073c9e84c1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c
! 6082afe083b1709148b48d2992f7b0f1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c
! 698e7efb739283196d1f0a4a0082424c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c
! 6fa028ee5565623d9d58db4b8119f1bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c
! 7912dadb129a956b232f2c8a9dff918a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c
! a1f272e434a97c0e9768f00374ca92ab  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c
! b24d527170e738f0fc6c68a5d6e8e557  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c
! ca140ab4fbdf0e8e13e7a77cf80529c4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c
! e829a6e95697d18ca052ca07f67b3ad1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c
! fa35fa9b3e275246c864f9652960ff3b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c
! e337be8014e8cacfd22d7fe306e40a23  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c
! fb0f4b9dd990bceeac13e43d5b06cc14  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c
! cd55be4e297b1d02efc597c991dcf2eb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c
! d0ceef8ad5a45160e1117d090c26b39e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c
! e7c212f0cc51f09a76423c6f2d18c62f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c
! f88bbc85320b02cd74ed47a9e547c6e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c
! 5478c9d7dfa1928d374208499b885fa4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c
! 203383e8285b955bc5de19314fb2be14  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c
! 81da2b844513c5126039bad082a566a5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c
! e10e48b033d69dbc9f582d19210f1deb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c
! 1f7eb2fa2bd5b3f02ae6a6f2117fbf8d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c
! 2a0106a755dca35d00ebed666abda00b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c
! 4036a16ca47d8b088de78fa7325145e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c
! 1eb2da946bd28b09b7ab4a6dfba5bf72  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c
! dd15a60a1c295fb444f5cefeac6ae243  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s16.c
! 8addee72caf3c22d6db2e8a72813dbce  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s32.c
! 17d61f01c637449a07b78a41d51eee2c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u16.c
! 4d927959bf1ca0e6edaedfd55d119ed0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u32.c
! 4133c5b34dc72018838723c93cdb52c0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c
! 2f0244b8b2f77b8eb2017b40003d3b7d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c
! 79ff732ec9998502da1926cd3ffe1d28  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c
! 3b918582f9d1f14b5c5ede61547fe801  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c
! a7d65df71709c95f3fd00e2e92e5eb11  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c
! 403e7bb486f4296fd23c64d1ebe68550  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c
! 6bed8eb4f256c4f5f83d00984857ffb8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c
! 64d802ba1035e60d9ca650fad4aabfcc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c
! 7c20753c1e353e52b14eb23d20552b2a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c
! e9471c3659e234dd2a4aa1624e053de0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c
! 4ebb8767cb0cde97cf18781dc6f5217b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c
! da20d3e1a05639a537f89bab6369e56f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c
! 79583f2e7dc40fcaa4d1c3335db8d47d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c
! c56741087da1777496be20ac0a0325af  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c
! db87bab0072ec9a23f264ff60eade79f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c
! f48544e3aba16da60dc121a654c7a003  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c
! 761c1be945add645b50e7724d22945a8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c
! a1af59178b73737ff2489529d85e2c57  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c
! 7aeac2caee9924a6bc998f1c1ccab60c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c
! 3df1458599d1c365694a3e7ea171c22d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c
! 46e07a0428d5455197c9a8ab64827361  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c
! 4485c23d914e50861035dee3f78d96e0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c
! 7b16b02fe8b327dc9589fbf7c9b04ce4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c
! 89ea0b3d3a28f821504828a1bbf84cca  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c
! 35ddc6b3f6f222cf800e10250c06f1fc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c
! 69df369d6e0f93e11c98ff18c72edad0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c
! 9f0d25802c02e73b18e32341cbaa6bd5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c
! c4593274abae0d94b934dafb850f40fe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c
! 53b6f11a9009c28fd19b85fd2d2efac5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c
! ea840ce29acdf6c331d7a3d4faf89a1c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c
! b2c30ede768b29acc766b2196d35097d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c
! 8d7a369292a5740095698471dac74b33  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c
! 59ca7c0ca9a47d903525c583aae22491  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c
! 0a94e3ba6d280fb2c100f65ea5a83028  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c
! 5653afa75cc454f3b3f8d74b89f972d7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c
! b986d5440ba5117c6624bbf314190eaa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c
! e53c6e1eebfa43b8dd4df70fd4546318  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c
! 7b6966376dbf986502feba108b10784a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c
! 5d50dea78c750dee5b1340d8be24c5fb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c
! 564b82530e1ac066008dd4eb51e1bdb8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c
! 7bb3da65944d119e056f91040499bc34  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c
! c9f9b1800a25f50758e323cad9e69261  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c
! abe56d3ba7243dd681f1f29b3ecb9777  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c
! f52d922fd78a5baf5807e5428633dd54  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c
! a8cd18e4fa0f6af9d8f9c67aa4a258b6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c
! 1daa8d6d5c1ed21f02c30c89a700bbe1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c
! ada3310d51aca6bdba1dde07e538192e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c
! 96844c3c16323fb7dd6f204f5ee36522  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c
! 77fc00c91927c2740f2fddadaab010cc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c
! 571baabae97066d948c5252a6491acb8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c
! 767ee5ce73d19cb9d3d4235a1c438bc7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c
! 6932c28dcfba43bd7849bcd01214148c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c
! 8203b4b62882736a5a9cd46778087673  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c
! 2c1412e42b7a25689e33581e4584d9dd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c
! 8cdd2c9241ed0dddad2f53104fcf6138  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c
! e39ea4e45f68a04956e2a4ca299e81b2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c
! 8a45348c1203bdbbd80f5bb868155b92  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c
! b3ce9dbcff38d9507206ddda3c5757b7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c
! 8e5a920c8fef761ff9e2889b6e4638a7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c
! 1537d3c8f4099f3de873e0518baed355  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c
! ef689062e41cf113179bddb786dd2554  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c
! 6c3c00ec2e29aaf3e1d1f9ead554531c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c
! c3bf301c95eacf7e96b6baa04bcfefe9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c
! 4628118ed8381bbf5edd28e493cca21d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c
! 31a6f4768b326fef3caa91f89e6416c3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c
! 403dad5cd19186b578664803c3da6725  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c
! 5590e94edf7e06445bd01903e772482c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c
! 5da4cd585f14afc775173f61ef0d2507  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c
! 0bce92b3d0ec06e205cd7d8c3ac10ab0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c
! c2dea78091a4a54637fa0a683a2f8d02  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c
! d03418f51c986c39bf9a7a9c4bdb87db  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c
! ab8581e62a63a966c1fe5677b4ae4a66  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c
! 56fdf30c108b65206c109a6f2080cd67  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c
! b02470cf9b78cd5692a8c536a5f0b098  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c
! d93fdc897f579e248482d01986b16829  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c
! d29fef90b51f7c0ed787f860ecbb5647  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c
! f4a4265f18f52ea15dc61e7819e7e829  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c
! 19688c2eb78b133d71f276db6e82127c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c
! 91b85efa1d169575e9593b1516fee186  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c
! 57cb3a05e6217c5077b40cebad9f8d9c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c
! 21306981053f670519e259e87d1f681a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s16.c
! 1ac15c5f5fce3057d17e13122c95bef7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s32.c
! 4d65159cc2dc5f34bc99a1873af7c56e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s8.c
! ae19dba32865dc33f23ed2aca6068ca9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u16.c
! 50df6adcafad7435c37bc20fdd148242  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u32.c
! c7ddd2ddacdbdcc75cb137d2345fdba5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u8.c
! 09f8c916aafb21d40a085772b7a7fb04  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c
! 41a831e8b7ae06520dada67596acc5e3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c
! 7339381cad90c6059671aa6cac5b2494  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c
! eac7e0a38df2b9a4fe0951640c94019d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c
! 9df005f217b3d36c1aba27ab20ae158a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c
! ab80ea2c8527199639fb7a4cb0180ab5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c
! 4b76b5654b2ed24a52d5c913e5c2aca6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c
! 3b852891775594a2ead18c3f32a8c0b1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c
! 3a03387908afbe916374c3e30aebb915  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c
! d0635d537c37fd1906870b26e2321d40  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c
! 13f3c7bf6918ff7c6ffd07cb5237d1b6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c
! 2e2ed452c520b37e5bba0cca7ab17e6d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c
! b7252dde8320a848c629d6445ef9ea89  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c
! 2afe4ed248a0b70e5ca51da6025a057c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c
! a61d5e3736ed938d3bef9519add11fec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c
! d705951e39d63ee53280aa4e86eafcfc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c
! b8d8e19fc8525d61e4e0ab82e3e7930b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c
! fd5944d6360293eeb6efa9b183440ded  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c
! 5bbf4e107f2384db592b274391b0394d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c
! 5e797420aac5c437c70547dbb7b7914a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c
! 41adb1e9a2b9e8628bbf4c22176b4bad  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c
! 7bd527abc66fc738d272eeaeb1361b01  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c
! f7d6e7c33e0a1643d6640f13d645e3fe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c
! 70d5472985f0df7eb16ed5ef57e3e5a8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c
! aad60c4080feaf0e327493775f6bb7b6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c
! 3aa9d66e435aabb1381a450d91a4ff0f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c
! 3c908be75337e9ec53e035432da3a31e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c
! c5e22dba533daa8b60c08a0f2cd31b5e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c
! 218023531627e304a11674a9b3aa8723  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c
! 87101ce01716595766c760aae38a5b47  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c
! c0f508ee43359e60aec2d226bdf60efe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c
! cbd5bf376eb4bfdefb00212d70bcc2ae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c
! 99f5c6c9f398964f55f6eadd4794f09f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c
! a24376c685c3e706a158f44d1d3c0bc9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c
! 00ebfc7027f11a6b0916fc2d0dc2c3c8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c
! 1e55f016f1939377f5284ed661f8f18c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c
! fb629462281d6bca6b428fdaeee00527  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c
! fe3d8e3593bcf53dd78eff9b6ebdd134  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c
! 0c0ff8c04859514a73a777e8596af43c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c
! f787483794454d5ce3c136ee1c27f278  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c
! 547bd8e6756302b32e3a07e82b24ee09  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c
! f3b2350ccc8c7b72b6b82b4d70e77149  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c
! 872112160a10109443ed9009bf42a767  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c
! 603ba5f2a52129b615ba838d3af42db6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c
! ce161beabc8fd69848e46667c34f5b08  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c
! b31dcd94bef733934aaa5b099f3ae94d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c
! 9cea59422e16ff1d58e88ff11eb2a414  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c
! ae1facd522054973d9de36213ad0c81d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c
! 9153450401b1ea7c2d6fe824b54d99d8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c
! c2f09d97cee749c50ac6af614e85c3c0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c
! 9c0bed802004055808d76fe8da123449  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c
! 4547d98ce738f7de1d37202ac3e6de21  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c
! 83c86ccd033b6d3612ba8daa8083b8ec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c
! 27b0e065e5d9fb3978e9a39c687193b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c
! 5425c666973eb141f1e374b522887c9b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s16.c
! bb49a5457e2f475bb97c2ba8a67d3e5d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s32.c
! a48cb6ae27118c842beeb4a70d49d35d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s8.c
! d8cee604974e8ad97f92790d39f50e94  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u16.c
! c0e000321ec4a736c71a086a6eac8861  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u32.c
! 27ac609156ce2aea16e5127dca53e7da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u8.c
! a9a4d16386a50ad5e578b089b3c85a3d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c
! e7f2162afaaff58e544a9fe82d3ab6c7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c
! f699186d56a1d7a848e4e5c3046f5f56  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c
! 5d51440f7bf45fad4f141b535c5404d2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c
! 4f309f75fe1cb6a26f243facebf876e9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c
! 7a8448113f0c921db329cdf0fe71b808  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c
! ae681a5e23a2244339ccaac143ebe2e1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c
! 4fe10d4d59270d86447bb83d586374d7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c
! a3459ee6c1662dcb1472c85416397143  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c
! 6f0db4029f45b0a5ccafd6461a713786  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c
! 1b14f58b54a8ee2fd3a75a6caac98b24  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c
! 9cb82b1a236e3209c716ee375c3b62f5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c
! 4a80f198869beaf442b8e1742b70eaeb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c
! 60c8122623f2a07e130bece6c939a2d3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c
! 32be1fe09825c74457f6caa63ffd6e9e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c
! f73b15f09beaf570dbef0628a5185bfd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c
! 889d906675230ec28abfc5e374fc12ce  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c
! 27b8687206fa873cd54bd0a116873ec0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c
! 1b729c6e1200e48464c3afc4adef1b17  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c
! fa1479c8c0a6d36d9dbf27c34b5198d3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c
! b0abd5ab88c9ee16f491931d0cf7f97e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c
! 64aad72a5dccf2cdf4fc9665686502e7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c
! 40d585b03768f0306ddc3217cb9eb043  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c
! eacea0c31419bc9f3baafdc41f2474e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c
! 2e1e88f2fa19245709cc637659c66096  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c
! 7fa62458286da306f3a180f7b40b8826  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c
! dfd2bc7d3d6f7f08c497ccb82f629398  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c
! bda5b19497e3040dcde5e63bf25117e1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c
! a95eb23ae9f7290c7b6cbf7e835170c0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c
! e02d4b5a1531e0ad25cdbd3437d4b0ad  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c
! 28d0111ee1cfa37e2fb8bf32f17236e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c
! 6d28c21f3f05edbf327a420949f5c64a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c
! 95071f098b387e10a661f6971cac3b07  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c
! fda6a09ebaa650a20b4df20a115f74a4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c
! 100cb8af69e644bf24777e744dbae81b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c
! 8f4fdc5e0cb52f580556df5c0a3cd324  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c
! ec793ce45401a14d3078dcb99fdaa8ac  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c
! 51a790ec0377962bda84edd3b601a5c4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c
! 53dba491df8c0bdcd308515d2f9f63af  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c
! 42deb820b4eb1ee0974f07abed6e57e8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c
! 8e6a788d85a3c5c6945a7110f0487277  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c
! ee992775938de9eb5c310f2432ee94c4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c
! 2ccb1f3395f43907498938861414c320  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c
! 4d1a4adb3e0bf08aebf98afb77a8dbdf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c
! 40b23bf78be30dfea0c5fc19683caa23  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c
! 75e5c3652edb85ff5e619e60a002f2de  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c
! 247d8d3f82b64941f3d81e4c524bf5d0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c
! 03da6a53485c40509dd7b3415d16ecc7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c
! 5883bac051452462a378128e05d735b3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c
! 30b4b1adf3e5433c3f2824e3235d9909  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c
! ac9fd46cd935ff27e6ddeb6dd6e1eb72  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c
! d69b18e61cbbcebdf7ffacdb71da0471  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c
! c13632a571fe9b99220cb4398b494b45  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c
! be95d2aeac3eed9ebf603c5b2e32bd80  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c
  b4fcdf3cb05b2bff3bb9a856565b84cf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_f16.c
  9ef945e29fc71ecd898a3aae88ba1da6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_f32.c
  312fb2c034e3b25ce55448c9a1dc1a9d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_s16.c
--- 57999,59083 ----
  ead51aa932f54ce080e763a9d560716f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u32.c
  a3b7d26a1d14371254a3c36462110c35  gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u64.c
  555de40671413a541c288777ba86e237  gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u8.c
! 456367251ea09d02e1b559ac0fda6cd4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c
! 666a634c92812f22f3e579287bf86de2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c
! 90add2bcd9e418fec40810e0db7340d6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c
! d57324637db36c5b4e6bcc454a896f1c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c
! 0de155c33329e483935449cd9d8c25c9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c
! 3644aea2fe2a88824e8708f5f146e910  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c
! 128ca3d7031556f0bd6663aa87c12249  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c
! acb126b23cb871ec42114d932a455e9b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c
! 76cf1a2b744c36189426e20dd2706d8a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c
! 50afb9ff1d61b682d5111fe376ba2a23  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c
! 4a970ce2b8be7e77d8b3e7eeecfb0a00  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c
! b846a0757030e34489132936a076ecbb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c
! 535a2ebecb4fbd44ecc043d531c6ec7e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c
! d5077eb63316eb1050d876da751192fc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c
! 67f42ea4b856374964c43a59cb5ef716  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c
! 8b2df3f81de68e4e416240f94dd6cf31  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c
! 9c444ddd9e0abfcd4a249432a084c8f0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c
! 4ff28f6276971eb247bab35346b550e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c
! 3b45f749cf4818fc9ca9b82ecd7c88bc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c
! 9a015f49c71da40cfbc1a77391608bea  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c
! cbfcf59eac955310d733ea04c7ed6232  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c
! 8e513eb9459d596311c4e73ac2ac7b53  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c
! 5d7ff0efc1e7fc048fdf1488f993fe9f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c
! fbae783a4f5dcbb2dbce0746fc90a628  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c
! 923c98ab40c93b228b24ffe7e1dad59c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c
! 1f5faacc29607510e64a5e4a85f2df93  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c
! a24b4e17732fc72176744a5697ecf92b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c
! 97034ddbd0b2711c5e9ae2729b6a4ff2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c
! bf703227da56db2226152490331744b7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c
! 69ca3be80fe9e9724ee79ff5a21330da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c
! d4161922c3b256f3d4eea1f539c34b3d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c
! bbbfe15716d45dd76174675ae30d9478  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c
! 309a45c2f52ea5531b9956488949dae0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c
! 00ebf3d09cd01185619d68aec726583a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c
! 65f751a9b4bb6abe527e24a121361dd9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c
! 6aa60f9facb6b66431f443564a0f8411  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c
! 9be068f66c7a5718e0bb52941ff5dd05  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c
! b891e3b6001002579356106e11edece2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c
! 16e9ef4e89165e012e260de326e2d6ce  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c
! 03d552fa83b5860c1f7163f62916e27b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c
! e94f2fc1a7b3fc16746beee7dbf0450e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c
! d680f4acb61f9d4f1cba5b078fac1217  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c
! ea91dd89c5a482c422d7bc2a357ec654  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c
! 3041651161b0658c7cb7d72f1d400ed8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c
! 5468697302d7188ebb2ee0dce2cd6fbc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c
! ee2c1462e6fd94d26600395047ce0e21  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c
! db9e9c5c864af87497e13c55b3a59500  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c
! 02001140a8c1038b492967d4236a887a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c
! 8d7c662edb5629f4410fb231282a525a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c
! 7232ccc10f754b2d1975816bb79af55b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c
! 8b23ac347fe68b1a35e615b1c69199cc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c
! 297c7aaab73777fb5509553bc32dc49f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c
! f0ecaed0d49751ddfdaeca875e9cb0e5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c
! 767e78e04f69a63717e370c709549872  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c
! 659f8bf3460391d45407441ecd940668  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c
! 5b76e1a794f6e32ca443fa182869bc26  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c
! 662e4920cb9ca39b7eeaf3e7a3cd62ea  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c
! b3a3b1a28e039e0b113ff22aac1166b9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c
! 13f6178fcba00afd8eef93ee0e5302e0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c
! ebc89b331fc46f84fa4bcfb60494d465  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c
! 332712066b396086f987af4ee2d54ce6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c
! 41440d61c7f785580669ca09723d2921  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c
! 1a47840acb359e0610248da321958d01  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c
! b4e27c2bf251e556f4e8dc61a93e2ecd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c
! 753fb55a034f5e94895a37411ff88900  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c
! b5e9bba11ce92ead915c197dc652e3cc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c
! 464953f2ddc9e0f3f3067da6ac25c2a3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c
! a3ec4fc3a057ba3ff1c2b6d3f33c2c8e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c
! 1128772db6d8b7e59cb9040895f25578  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c
! 38c50f3a3a07ca43520b50ef89dbb573  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c
! 1d70c2fa45d825bbf3405d0ca5e9a4da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c
! 36ec60c1453c0653ccb852c678f6e4e8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c
! 7873e6b639817302f0aa4cac3a90f3c0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c
! 69df957e94a1109e868a5de1aeb6b87d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c
! 02514c44e720c938fdb6d788542f335a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c
! a765bca5bd9d430fbec8b9c2873448e9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c
! b2072989e55aeceec12c99b7faa0aa80  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c
! fab9b15e8eeee6b1d10c34fed6c526a4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c
! cae8e3cadbad295cd70728f7170562ff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c
! e1d31d41c30f14046572e8575dc025cf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c
! 7f87e897f934f662fb1f17ac6b1e936e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c
! bee7c865cbd3902bf327e253dfe6346e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c
! 3a979476d56d8c62e129225a8cd81c82  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c
! 87f9974c2aed7525c87cca73d0addfb1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c
! e8a03a3331f336b3a88012e980fe7ca5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c
! 8c03a4e3f857199fd72677f0392567fd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c
! f13daf195934e76c442245049fe0ddf1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c
! 85f4d6d80d40c94a49d4b3119b15cd98  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c
! bc141e4d1e010a6e831ec18caeeb077c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c
! 83bb69c086a781551c240b20caf8eddf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c
! 526a01507871f88edd6072fdd4822ec3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c
! 454533070618063f624b9a314c1b7acc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c
! 5c4498a1e3af8f8451de2ba6fe0ba9ea  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c
! 717b368ad8cd66b8843199267d5dabf7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c
! b7af210b5ea1c1e5837b030c1d4db887  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c
! 72eb28c9431a867f1d42e7185a783fe0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c
! 916a6baf90898cf4fdf86665ccb6185f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c
! 1779e9b98f0e158ccb19d01f7c8ebdc4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c
! 099d7aaa0bc77d6ea363e3e5ee5d51fb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c
! dc3ed0e3e64bfdc4a62199c97dc9a57f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c
! f107fa1247f0a2dc52a3cc4a3fd74f04  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c
! a47971a41846fac69d076c67e408ec68  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c
! 6650efa310efe8d4f96747c0d444b2ff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c
! eedf4374fdb958b330edb7623645958c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c
! b2edb8160e6ecc767c80f2983e5fdd67  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c
! 48b8ec39fd4c282f05728cfecf143fff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c
! 70e7dd27975bf2cf5e5185338e3fe253  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c
! 6610927a8274d0bbf55a9553fdf840e6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c
! 363bb841f31ef6858d3e4e73651338ff  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c
! dbc8a1162b387d844c58c8e7a3e92261  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c
! 1685c34a08c6db697f9058bf44fa9b69  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c
! 15247ddf54182f246feb53572a7354e1  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c
! 76bc11c9da82dbe5c59edfc0b4798531  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c
! 703847f17780531e50016c01a4155b5e  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c
! 29f1daa3a0526ecce4c399a389db3b6f  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c
! 2e57a650168bfca9258134c775e1ee14  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c
! da334762f1a8386a43138b2c05a5b0b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c
! f9b6521c9a440cf488385b2544c4e2fe  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c
! 67b532d3095330cf9c85813305e30dd5  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c
! 61112b698664449c6f70cbe3afe6840d  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c
! 14598cbd1393a5de42c15e80b6a30256  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c
! b0b55c5bdef888cb3c4760d712b21443  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c
! b5bc3c9dfddac3a9a87a8e8f302fb0c2  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c
! 73fac9d50785026af3de12f4d70fef8d  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c
! ce9125a39efad7aa5c00deace0cfa6ce  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c
! 5c107b52df9868babae2770f5e6790cb  gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c
! 73864c8e66a358dde0ea3ecd547adfde  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f16.c
! 1b5819efdeb3a44fa189f34a6683d65b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f32.c
! 7323da9867a6d921741dfda03d21e9a4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s16.c
! 2a92b41e9990d581ae033f0d193b365c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s32.c
! 53c46a3b4cd0827fec88bde023955d5c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s8.c
! 59e0b755d2632a84ef03ee5c811ca341  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u16.c
! f8629fcc2474a2ed107e6125779bb33c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u32.c
! 97447d84e60059057233b997bc089fee  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u8.c
! 555c9d910e9cf0bd48208ffe6d39188c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f16.c
! 975609c2f9ae196909cb926767f3d903  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f32.c
! 3682a641af145f25c1f78a85fec9ae06  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s16.c
! 2fbe06394884489070de7f266c87c3c4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s32.c
! 2123ed2e8c5637306de0c1cc2147f5bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s8.c
! 0b5c3dcf41ebfe0b674c83c720fee9c0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u16.c
! 4229224d14a6af163af21e21441bcedf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u32.c
! c5201697034acd0588f54713d981abd3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u8.c
! c48b805f30cf1e2201cb18c18355150e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c
! 77e2e294d15aab906be84ebf7f8b34be  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c
! c2eee0f12a283bf3b7cde84d46d0fe4e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c
! 394972546be64206cd9ffe8276db3106  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c
! 96f2579896d2c75722b89d28aaedeabf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c
! e2ad57e6ed5f84592b8576c3a05b1888  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c
! 7971b878935bca9f3507370361575499  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c
! d64b50dcf15b486bd916c9f01ce0a286  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c
! c1cab2e1daf12a2b455f42bd0ebd92c2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f16.c
! 1bb18a304b62ed040bf96e156f743d9c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f32.c
! 666eae45029cf922f3c47cdaa6f20ae9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s16.c
! a1f9bf44936d50d242dcc1199b876c06  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s32.c
! dacfb12325cace9e8f6f0d40a85b6d03  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s8.c
! cc7c52cecaa8067a77c3eef70403289c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u16.c
! 0e8729515cb990a5fe1c77b6550106d5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u32.c
! 43d3b93b9e8b2f8cf2eb18eae65c55e2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u8.c
! 50e7fe41c2ca98836763b12e9d10cd43  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c
! 1140434ba0e0a4619941be161a8d3005  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c
! ac972c7d5f227265ab6c305514293eca  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c
! 1db092c2eb93b06d3e281de2bd0c54e9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c
! 4eb30452e4b0add2f31bebaf0191f7fa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c
! ed8f261a92ba591f695fc2e01b6728bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c
! 2bf6d8a6fafad2c6b984da5d259bce04  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c
! 79ba0e6bdd144282fb4ad055a11009f8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c
! 9d406faadcafa3d6511d1705ea676332  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c
! 23e93c9728aeee9efad2ce2a2fb44466  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c
! 5bbd7a718f7a1a2272f1fcaea190d1f1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c
! 05d5c3e74f2b4ec64f763c391f256012  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c
! 240d64505c2e26f241992f6613e7a07a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s16.c
! ff42ea72bd57f98c180beda4879ead55  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s32.c
! 1323ce6e8ef0652bda31d66be6eb02c9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s8.c
! 47fd48919454c8618ccddf12128237d8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u16.c
! 15ca1abb4887ca5b095e019af93599eb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u32.c
! 5d3b9506df6d90c3cb5a3f66fae43a86  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u8.c
! b7eabcf728e71f29aabd91d245738b42  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c
! f27159811a6123cf17241baab7a5a5ad  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c
! a0d6f7dd519e838c68c3d3fd19dea057  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c
! 36d5f6eef6bee1173fca38558959bbfb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c
! f23f5cce354fdd944fde2c9a54ccab2e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c
! 467ca538761409c2e9948a23465b9df1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c
! d6fde745020119399630059aaa8b2013  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c
! 3b8f3cdcac1f1917aa633900d37f56b2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c
! 1c9ee991964b454eae0b1f9dc6eacde7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c
! c4940fa1c494f77e7b8074a9164d626a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c
! b03cec64ad79fe795baeebb0c4c140c0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c
! 868c80954beff4bbd4fa2f52bc553829  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c
! 443ca2170110b80a5665f3349164ac8a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c
! d4d9d78e014597dbd7b82ea7f105c9f1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c
! 86335152adc7a06a1a04d74a0aec477b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c
! a9f006adcdafa6e88d27f112bcf6edeb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c
! bbe08055a178e135e731afc7b7c25050  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c
! 5a9a816ec85d4fec855c2bf4decfe43d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c
! 74dbb17dbbb9380fd209f7d8979fddef  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c
! e6b5d334ecda3624c5c3755e754c8bfb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c
! 502abbee726594f8258028e804ae6ff3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c
! 4e76b2d64621f7a252664fa5c0b3e085  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c
! 4474cf4451dfba11ecdd82b5e0cb1aaf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_f16.c
! fd1ddd6830819a58fbcf7288e0e5908b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c
! 4f21f7687e88ce6e1c76d100547c8e9f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c
! f18f81feec8b168937a705a5983470b4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c
! b014be8350c3a3fcca601672d05a3640  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c
! e3952b4a48210838fd0ed1be3b7ecc9b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c
! ae87348a214eda41024a377557bb36b0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c
! 0fa021bc414cf5f0554da48bacac5d02  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c
! 609c182d6262c82daaf9d1b2aae40efe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c
! c423fef999c520c852c4c823cec22ede  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c
! f323be8c4618ecd307551c1bca3c645d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c
! ec47479c1b4a22f62d7236eca1412a4b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c
! d667ed5f3cf9f48eac6d33ce96b443d0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c
! 3aa1682db0fdda1efef030c2b84d4d86  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c
! beabbf2a320a04264647e3243b80f71b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c
! 94db26c8c632b12ce2fbb303943a88e0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c
! 5a91f667ce7e0949733122978bab7d33  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c
! caa979a5d5eeba543ab0071af50df3fb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c
! 99f9c287241a0085d4cfb29e5b00269a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c
! f95f8f8f9fbb8c2326779ca94c1f7c26  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c
! 55b17622b07ef796ef4c5c5257724e95  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c
! 6eddf02f0440e733387e6356c302cc33  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s16.c
! 628b1693b80d9f6073c03423cdec29d0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s32.c
! 1acbdaaa0da9feaeb0c8a57c752d9c24  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u16.c
! ff2cc47065a4e172dcbe00bca1e260c5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u32.c
! 043f6f7fd5ed7fd5247b9983d1ac1dc9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c
! d18006e7dd150b1adf61760ac2739793  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c
! 01f981975275ba045660c343a624df76  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c
! 6abeaf739aca9d77ff5c42e202185438  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c
! 219351954a43f89b21d7bf2c05e0a9ff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c
! e144f3856bd7229f40e13a8fa57982c4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_f32.c
! c0819a3875fb904566cabdcf86664f87  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c
! 9efd2a0225e61d294863004151b1d222  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c
! 0d08a4ed31ace05b3c24dd0c818210ba  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c
! 9e6b5ef199baf89764623ff526d729ce  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c
! 7603ecddf7d4fdd4052ce8a70f2307ce  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c
! b4c10de68c6b9c589ceb11f5e26d009d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c
! ae2afc59821181a9ce34dcf2b51e5a30  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c
! 5e44686df06a592871eb9590da1c963b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c
! 6c7cb803ba74bec9a8db49de984a1212  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c
! 1213e44f3c7425c3645a66a88327b09a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c
! 23960b5e4b274726a6cbccaa7f34f3bf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c
! b77b2b116ba02a3fb7cbea79b593cb3a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c
! e12ba8ec7bfa2ffead9209b1d191fea7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c
! bdf7a3f438181340659052872600660c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c
! 8e19ad504670ead4a55d615c82c56c30  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c
! 15e278f01d45b2380a8d49a2ab7c75f2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c
! bcdd93e4d60275eb2a406e71f171e2cc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c
! f8fb1b2710b77129b54ed56a522673e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c
! f2392cf2518c069e666d98657fe7f5fd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c
! d896eb172ceedf8876513463464e08fe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c
! 0d25038f3e2d0b2d1ec7b351afc14c99  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c
! 49d38e2f034c6028a03c9074fa855b09  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c
! 65d32afa65d60f3497261a834a51cd28  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c
! ac7ca10d03001f2be321ed88aed88e6b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c
! 27d1840ad1d1c96f8dc28e2f3fc24100  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_s32.c
! 9238a552c2c93ba9e5a6fe74adba1b0e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_u32.c
! 1132bf439d9c0af028bb3cefac3b4501  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c
! eecc12ec07ae39717444912b6eefb45e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c
! 894e9171dd23eee7caa62f01fd8455ed  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c
  c74c5973fcfef73146c302e43aae1d84  gcc/testsuite/gcc.target/arm/mve/intrinsics/vldst24q_reg_offset.c
! 5de17348dc8ebde15a01a208ffeb433f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c
! c3b864afb5213e329938bb9d3c9760ad  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c
! 3f27300eaf9c475a91c8c8e021492a02  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c
! bcbdad74c1a96f557fb0846bbb27cb21  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c
! 7ac02897a027dcf2b84010b6dc6e5003  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c
! a3201877a50c3abb85a1f9bc801387af  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c
! d6d908ea948a3ce9335c8a2c5db2e367  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c
! 2642f295ea2c44cb7f34f53afaac30c9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c
! 56da0ed102db443ae0c3b9f96eaea978  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c
! 61abb3c09fdf8dadefdae48c713d6250  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c
! ea3b6b92390151d59b0592fbc38d3c6b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c
! 8e5974ca528573aa06fefef76f0bb047  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c
! a60d7664c47a6890c926d3a8760e1c6b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c
! d31b3f83cf760dc817704a8189301031  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c
! bd8c04a62e8bb73de3109d6dfcd791e9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c
! c1f08016e58ac184509cc73e158ded1b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c
! 09b8ff99812923bd5f1d0c9f13a9d36f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c
! b533f93e8a6df9a49f7dec4bf1bac746  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c
! 9ad897d261030d930f1212a21e7b6eb1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c
! 018a7bce41f8d6277b41034a6e58c7b7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c
! 64cadef5d98492e0821ec1fb8b70452f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c
! cc3a50eb2e2a4416b8eefb876ce908bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c
! 3e63a759eafba42b8c8b89f4ba6319d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c
! d60d3ddc62e7295107e086d738fff92e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c
! 5b860c9e23e535b74d0b4836a8529a37  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c
! 30b224c1354cd0816239b347661d3261  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c
! ce47cf387183a4494b0108d07abcb50c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c
! fcab48c487c80dfab3d32ab75ba982bf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c
! d37869a0a4794fa7f1c9e34f1f71e4d5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c
! ad83d9bd701ec3298ad0ddda7209c1fd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c
! 93def1ed2a5d5c7efa50914c0a80f6bc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c
! a7dd288d9646a582d9f0e5ce227044ef  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c
! 7f82521f45ecba7aeb2f26043321ab4c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c
! 649f44c5d647768b2d04d67cc5c3be85  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c
! e7344ec4342cd9b97808cfd6ea96e114  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c
! add74ed2a6418dd02d055d5796b64825  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c
! c0785e65b0f2692994210012dd75ed54  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c
! 5b9967e46f5112784bfee4fc71f74d45  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c
! 8f5b367f0df95f78804c1b2e16d7dec2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c
! 52caaf554a1f37ab40ee9a77f91e48d3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c
! d65ba0dc206c9285dd06bd6510fb42f7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c
! c29ff224bc7bcb38653ca8f26a0c68d0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c
! 34fc9b7bf2e58c053680b3be81b96de7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c
! 7d76628ec0c19c55c9cb442966c0051b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c
! 9c9e4508b5e46c4d7dc593fc33393894  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c
! ae141d77192da5bfaa237d4e008e02f7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c
! d14d199ad7d031fcc270f921fc585793  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c
! 87f155c4157aff4b16897935e4b04c5e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c
! c0ec9d1d07015b47005308554dbaf759  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c
! 696a670803a811ff35097f3bd56fb32d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c
! 8d412a45993dcc1c09271ba8aa05bedf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c
! 5701138564229de5f7b740a666072ad0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c
! 81d38babc8e0bb0455fe14f896dc8f0f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c
! c495298b1b77e2b43ddd386e39eebef8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c
! ba873a7ab2f533151340259f0c577623  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c
! a28f0b6517e2d2cdff006871d03f4a3d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c
! 12f14f0a0cef77bd425f0aa754253431  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c
! 1472f4a1a88a89d0a48c66b4a4d9ae1f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c
! 0c581ed0bab904def1325c7d4f0de557  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c
! 9bd485ad6224c0d3c9b12c7249dc591e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c
! acc815f98e802b3e4fce915df736fbfa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c
! 6031e7f59fb60a629372a83f802e24b1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c
! 9d90f45c19ef2308f13161a95c4370c2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c
! 63d6896bc041bdd6fc2d441a046efa7f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c
! 710148c346ae637925571c95085bf200  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c
! eddcc052251da377b00d78802c52d5a6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c
! 7e4215075829089be11584716030822a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c
! b8e45545c279a5da3bd58a2e78fb7ecf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c
! 31ac3c5786a088b84bfc903a869b8117  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c
! 438afb9ba85050f47a711dacde6f2847  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c
! de85e74598ae0f93c299ba742a100d23  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c
! 641a80756b995607ef37f3cc372a2bc5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c
! fad9eb0de3b968c357fa49f5718f9ce9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c
! 7e109fdfaa0470052445bc035dd48744  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c
! 8229136da2e44bbeca72dc105156f135  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c
! ca9eeb392cdaea0cd9e3c953e3b25f16  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c
! 1ee853efecb639385b48b177b123ab0a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c
! bfd79096f23a464f6280c2faa6d48bc3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c
! 08d46a3fd525dc6adfc8baa6075cdb5b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c
! 5ab3ececf3024315af62abc6fccedcbd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c
! 46ddb54d0a8814fc54ac4658109cf9bd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c
! b91c246ae9380cea1c294dc6bdf7283a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c
! 4bcbd29ef2719b2618c98e48886e0c9e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c
! 92c47d1cebf978c68d0ae6113c38b951  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c
! b7b8972ea96402b888db377ae9acf5e3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c
! bc3129cbb5213298db9cfc80ed8e7f92  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c
! 01af6189ae684a12feca4ccf760e5d39  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c
! 517c28cf90d9a9eee52e1457c929b778  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c
! 83d10982c89c302b55aa90529cdd4d62  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c
! 0271e0a12d45285b943270b3b8efbb8c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c
! bdc607bef624e288d689826e626433e1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c
! b60eb43a5c1d77e50873510c02e37d7e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c
! 3672902c83679465578ee2053e3c6d66  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c
! ca459f95d19a4bd6452baa8b0afcd04b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c
! dd9baaa530b01d2d1859dc28f3e5aaca  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c
! 03147ca33cc31c17c261e652ad4988bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c
! 0dbdc0eee637eaa20f3662d6a42204a6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c
! 69bef9af378a88ad9a3a65b72949000b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c
! c88203b0435a9c5bded8c8a85d35ad6d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c
! be594f0cf12c2e864fca2bbc82748ea1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c
! 0f398f3f1d49d75ec6497b2126d90e73  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c
! 86d77afdede716a107e31296f1863e3e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c
! c59bed81ef70401a3ab87559213d959f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c
! 083dfa326a946ea50ea1a1fd4c403794  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c
! 9d1418d7e67b07b580ab0dcb367cdf1c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c
! e5d266845f5f54a23812f7778b8e7a50  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c
! 87a6b03d74703e626f2520c3faa77450  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c
! f6f4c392c939783e7b04f1aeaf29b138  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c
! 64053e4695201e19a9b19cd01258d624  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c
! 5566850d88a618ca44b3dc6af6c2fc9f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c
! 19e662cea546406bffa9c5c90c5404b8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c
! 0a3fa9e8300fe1e66e8d8e5f6d85ed13  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c
! 8504fe49451fb3fb9360c4b24c86b992  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c
! d0de56b663f729a3efbf188d0f71163d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c
! 8768dd3900ab5d67ded35c8d2ee35378  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c
! 06593515bb25d37e351b459346f97775  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c
! 9f20d0be6217e87e58784c6540953924  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c
! 930b3e0795b2060eb4f95b20e2de4c36  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c
! d5780384e6f460e52501cafb2de890c2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c
! 47699ca0ca5c990341165e373fab2af2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c
! 338e919211aebec2c1df086dcad31307  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c
! bdc3b51c8b312afb4dd8bee8065c2c8a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c
! 7520adba6d33ea1113b4c2ac1edbe672  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c
! 4f2e6594997b578d43e840b3f38301c2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c
! 29309f4e325865ffd5f770d22e7ea2cc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c
! f8a7d5030ab075e4946258913f8fd8bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c
! 80f288f905890c7cfe0701058473d7d2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s16.c
! 6bf70e31b8e387f3d836a3ea2652ecd3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s32.c
! 9a7dee46f67fea2ac2dfb2005689cba4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c
! ef3f3fd48e7159d4fffd813f83196218  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u16.c
! 50a0b8d5e26daaa9caac36a3f9558287  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u32.c
! 4ef60b052dcae9ddfe45a3548e119093  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u8.c
! 2c954c943e875a440169fc86e1335aca  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c
! 4cbf5763bfbe20ba407dd1a810520915  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c
! 6cd95cfe2463aa0bbdc0619495733dd4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c
! 82132495b6afc34ef6f05a0eff2d5d34  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c
! a5bd3e72bc313f2373a3ebcf4ef62535  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c
! 37549a63cd84130b4fb659f019be32c4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c
! b367ee744486f0a38fd22df3f5766aee  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c
! 426e63e324bfeefcc51088b04f8c5ac2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c
! 68c3931e872174938c012ef8e10bb1e2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c
! d7259abac1a1696d4b68d7fabe4c70f6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c
! 6201e6192caa8d7073299d32608d9586  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c
! 5136b6f98d77241f54199997c670fcb9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c
! f7b8b0d8c93e7c28ce55de3c464c84f5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s16.c
! 616d1f049875d65fe9034442434e5951  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s32.c
! 952703449d2f526980b7cd59b461f592  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s8.c
! 2fd35264e0295f2846b1352738adfaf4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u16.c
! 5966e70f08d3c9940d084f95cafc47d8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u32.c
! b12c08bffc376dea4ea78217baa5b307  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u8.c
! 4c1f7a55660f0b5f73eac8841f2480e7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c
! 3baa5964bcb6437f3dff4408a8e70c8b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c
! 48805137e47834db46fc1d912661d729  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c
! 2127e1338ce91d46bb26f09bd120050a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s16.c
! 54e6f80c0b758a82164ccb79c8abe305  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s32.c
! fe15b3c032b4011a3d560f44acd7c051  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s8.c
! 53a6d922d134b0512eb98aea3913a4cf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c
! 0c8aea5e2b4582ff33ed943e418524a0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c
! 8406c0634648d31675a548caa00659e9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c
! 796114e7206eb8aeae3c2191defadfbf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c
! b473e80b7818eccdb707ec7ca90faf79  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c
! 41acc04fcfcf20357b985413f3241f28  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c
! fb85826a59dc8314189653b595d38108  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c
! 8495073ea90b386b670c7a71e52c23c8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c
! 83c7ccc760bc0f2ae1e295fd2d3d616f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c
! f5d097362fed650ea5f84d36be966208  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c
! fbcf9ea8f9961fbdb0f923327290efad  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c
! ba04bf9e8aff82110b97108e353a088f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c
! fc1988da2536626135a7adaee115d3ff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c
! 8ee3e2808276b0a8d1f4e2d94ad9e9fb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c
! b1b90b030f0d3b851bb7718886a995d5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c
! 3af3db1488fb1f2dd879530f13c5cb0e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c
! a20619153339289c8751753d23ca1fc9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c
! d55db64a83f023b03ec6fddb27df4c1d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c
! 41bf277dfb448fc05ce91e1ae40c99ec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c
! 8024e1687d2a6498d95ddc8dc2e699e0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c
! f89c25ded13af840d30c8e4174a6f54c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c
! 51144028b5731503a37261ec7082c89e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c
! c1e430470384d792b4062276d22b4c27  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c
! cbd0bf28c28fb7a9c4c216c2e37a9956  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c
! 3021e2bec908ceab33fddbf0851f8c0b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c
! 96299085dc8080199ad19701082d6638  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c
! d137d47d4aa070d53ece5c2b30dbaf80  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c
! 258b4c4f523a7cb758deecda81cd105b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c
! 2202ae25e62773543a212e550238952f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c
! d9fe57dd4074d121a8f54386798b37f7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c
! fb1130696a37cb131b18bbca72165d22  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c
! b7dd0c5eb8a47ddb06f4ef31d4136091  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c
! 88cc03a8b2513459a8d491817451f733  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c
! 4c03e397f912f516363f7b6791939454  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c
! 19b2c399c49033d3df1e821a10dd6509  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c
! 0f63fd86be27f6c08f6912b9828ceb24  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c
! e99062772407ed574359cec7016ffe74  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c
! 519ee1035867981cfc6934c32b49f0e8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c
! 2401b8190d98d49fa431dfa9047490d6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c
! 8ead3a1ca8b7795f7aad79e196e6acd3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c
! 67bf164c43d211e3570781d35ddc490d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c
! df71ca85c666be91d43243b42d92de31  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c
! a91f09fa1be75fc9f2de1fae18c1e705  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c
! c00817177f8ca7fca1373a21aea5b457  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c
! 3d28cf27a6151d584f06e12f92363a60  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c
! feb0f6ef1a0d4a966d5937c79491d762  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c
! a073eb0dd0d7532bb7492d1e36292e08  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c
! f0dab183f65f09437dba57847f8d1f55  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c
! c26019402420b5828647e0dff7399d0b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c
! 040e041a75661ec603bf48d0cdde9179  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c
! 11ab368469634a6d070e7f41f65d3943  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c
! 9e4f0e88b782e450f40f0b1c80cf62d8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c
! 57bafefab97bd769c927d9ed47b48a40  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c
! 31b16c4633df08fbe053ff16a0beca4f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c
! 63ab3b7774e7d4e0f6340d2148156618  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c
! 2f876b3f46fbc61644535def4c012f21  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c
! 78648d7ccc6a80d894bb6ea5a31acd2e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c
! e4cf95c8cc55b729c62f7b97233dff3e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c
! 399947cc46b7cd16d247a6f6a51a8e7e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c
! e10c8a0e71f5d763be1a25c0aae96256  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c
! d9ad243d0c8dcebbe1bc6cb5c3d3e3db  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c
! 2db4ec7da226283aeb793ab335ac6a46  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c
! 4754b1b88f28e22ec29ecf2239cb28ff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c
! 792474edd2830fb55b514d1ffd9f4b69  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c
! 2a16ddd3dce262c59644fdc230ad4f1a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c
! b40ddb2644b5bb54f1af5baae8d08c8a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c
! 8903e8d79802ae6654805ddb3f2a28b0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c
! 3208f4a9543e3dc447f522975c7d11db  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c
! a7b7cfabeec7818bce69e8b14ec91ff6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c
! 78cfe14f280304f7a24f1b75ab394e08  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c
! a37714d7a6e76cc98c022d91105e2783  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c
! 75a08061b8b0331758d28f37b76be566  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c
! c62d4b25e4293492f768d2adbe7b4fa3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c
! a17023c7d12ab628c0c2b9be4ca3da78  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c
! ebc48d886634d4b4d1c50f1284ff2270  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c
! 0e9ff99f091f0f27a9adad45517b676f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c
! 927dcd2437883ab026aa5cb6fb3465b1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c
! 41e1d42346bf2db54f1b1c540c337f5b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c
! 629fd91df316697ade4c418a9b7ed7e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c
! ae78f855266dfcc4bcbb0bb10c80566b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c
! a08dfd6ae0a92863056412a3d3e19f18  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c
! c46cd9dc9cca5774cb81524bc149cd0e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c
! cf8510c6c1c132978ad126ed58a4f0a2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c
! aa6a86a46661b3955885027796d3c6ae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c
! 7c09c25d047cc08de354060cbd965345  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c
! 4c0f916799ec3faa5f76dfd42f1f37be  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c
! 59a792b635e47631e37eabe2666dd511  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c
! 117eb6f02d3a05808631c24503408a71  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c
! 0f4c5038e29889fbc48227e72b0b387f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c
! f1aed27759f4cd5c632e8a4228a96df2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c
! 9363d71d15e2158251ed02d24524bdbb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c
! 98d74d527a221d2d1c50abe8db0ea98c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c
! 987d0774c1c4a1b8aa789e4b7b8b7a05  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s16.c
! 2c985631082d3f8c8e0d27da4487aaab  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s8.c
! 034860dfb422f568fe90d308b9049d4e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u16.c
! e8b3a563c1453a38fd1921de39d2c2de  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u8.c
! ac572ef0fbb8e56f2b8f4b555958fc39  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c
! 317521b8082a9fbd8f209ff4d33fced9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c
! 0cdcc5a734ad857bfa8639d275df0eed  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c
! 83711d8d0ec0ad396af430acf1f1f3a7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c
! a31f3af543f6875e22ebde033f1f393b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c
! bf467d8ec0e1366a387bc10d369376bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c
! 713843169767b615664700837e25a1e7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c
! 11ef47e577ca127f4f00fcf11cb267cd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c
! 8ea53c96b0550b4dc1535928a04dc7a6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s16.c
! 787100fe9537896ae7be42ae337b95a0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s8.c
! 6cbe92f770c8ed124aa6e33964dd0361  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u16.c
! 942bdd1131df5d31b77e885c6a964cfb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u8.c
! 59b4e4f75b7fea287cca05e2a3942e9f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c
! 7a6d78aab899cec5995c946acdc5f9b2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c
! 92d06056d2688e62b9df6cb490a3fe37  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c
! 9dcb01514e73a766d741b721e119c118  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c
! 91690a310953a5a28b0e1592c5f56a48  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c
! e1f42e3565126d760aa7a1dd83310825  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c
! 9f105a9ff968affb8458c47a4986190f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c
! c7e663cacef42d2da4fa0a7fc859507c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c
! 9d07ca95f688f7fc42f8ba1cc83770fe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s16.c
! b848cc4a5aeb09c989d7544b5d8c0a2b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s32.c
! 87af1068ea6ce078f36228b3061ce69f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u16.c
! 84de14007dd27c6fb78f7941db40a205  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u32.c
! 1af1e7ceb02fcad32775170c69393dd1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c
! de4525c9a829ac4e9e5c0f83ffa354c0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c
! b1da02f979b3a47f4f46c6dd2bfe39c7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c
! 8a514f5097c04e981326531857984e7d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c
! 13821783fb0ae4c1c3f813289dc2cd5d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s16.c
! cc5b57add0874a5d9a82c705c2d34a45  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s32.c
! 95022b92d0be4162ab4ba3ff01e08dc9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u16.c
! 0096e924f229504aa83c4fe5cbb0a44f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u32.c
! 09274be92712ddcd574128be4360dcc6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c
! ef198fc608f45559513b105cc85cce55  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c
! 8bab40c1a58dcaf8261cd589c33f44b0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c
! 74c3c5d98eeeef9ca5006bd8dff33eb2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c
! 1bc6a1916dfec70c3f34126fff84d2b1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c
! 893595ed388f748fbc3f0dfcbe9e654b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c
! bd0d230798187833a8262f1de5716840  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c
! 7b56c8af80c36094baa76e8be6336637  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c
! 5043baeb1473267322789cacc5b8aa6f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c
! 5ee54f64dc9007516f4d7d973a07d328  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c
! ddaaeb8666f9c58b170fe8b2cc98a8ea  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c
! 770350dc228ba615a82ddf8a2374bf7c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c
! 7882d72f0e997b2bd39d4cbc42c6452c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c
! 662eb86b3fab4e400612d0e8f33b38b0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c
! 840f9e085c7b7610f9667ef876aa0301  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c
! 6de7b86f94bba2897640c35c002714ed  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c
! 4773364cd106df00487c6444e3f4709f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c
! 6ae6d4d3aa95f0b72e803b7f0692ba25  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c
! 45a10c7956901c1aec16ba70b789a961  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c
! 7005d7dc41c21165d83a0a8d3d92ece0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c
! 6e00016a47c1b0572f73780da0870f5e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c
! f2ea448f81d7cce09ea8d83c5a7ddc0d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c
! 1c0611a8e302495098bdacae65e41ad0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c
! a69b4e556199b0310a340a6f94dfa9d2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c
! 1c422e98873335c93d3fd1ca9e514252  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c
! 39d10340139bd4b3a545b7f811a9e869  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c
! 598a353a66cbf22ea8541560dc12ec2e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c
! 12eb9b2cd3276a1bc6f607d606e30c32  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c
! 63a23ce894faf88886fac1d677ed94d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c
! dd6c6f4df688a7e236e165f3a1d5d2b4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c
! 4577ec53466ad29d28ff7c336561e83d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c
! 26c9b9b3e3f9e95ee28fe16f830a6751  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c
! c13526e9f67bf96a5e304e164246a959  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c
! d3962ce056da78b1a993d67f75ec8d00  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c
! b54b34a97541ad41766d8581829a93ab  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c
! 6fbfc572ab49dae33463db07cfdbb0d5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c
! 5cb8ec3f0e027f74c532693f652a56ae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c
! 60cbf776464047233c9fd9b218967133  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c
! 9977f5fcf1473f46652ad62c6fa44c5d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c
! a0a8db6c60665b8eb2104fac131f3dac  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c
! 4f7b431f6e4fbaadb87c43f395c346e5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c
! 2b1c58cfd61adb001e5c1b693bce7be8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c
! ff3b341eb0b3fe906cafb3fe7fd78dc0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c
! 04e1f687447637fccf305965a273260d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c
! ba5c3a4da7ff7ab8170ca407517ac583  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c
! 53c2b01e5a64e6c8e589652f4c4c4154  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c
! 17cd57d429a1c885bab536a27e64b7a5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c
! 4c484693925f6d39495a4b0ba50c603a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c
! 4f318151639c9981c52f7a4ce76d2fed  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c
! 059a5002b2862ac752087b42c48cc861  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c
! e13556254214c6f13775f40f6a9fb281  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c
! 6d38c2ba9eff36c647ee7b09408b8343  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c
! f7e7ffc722568d1a21fee10657830059  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c
! 92bc81e4b39b7e753823d1758412be17  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c
! cde6b3da81df4311747f724e33b6700c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c
! f40476fe26a221e83c92625025c55fb3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c
! 82a9cabc7bff90ab0bc9966b98e60fd1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c
! 2417c5378fd09175caa2eaea84a06562  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c
! ef379d922a8f15ff16a2e3582a92d811  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c
! 2ad892207f5cff3a4c803fa7901bf341  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c
! df57db567758dce3a7a8240289131993  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c
! 89ce6a09ff65985978159300c003a5ed  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c
! dc6ca994d75f7c18b0750c84bf2889d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c
! dd33c0a3e023ab3851633b2b631e31d0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c
! e38c12b447b84e44a267a2fe9bedf8f6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c
! ea193c46e54b47549f7e82f88af096b8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c
! 7bd278b3287da9500290dfa0ae2649c7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c
! fd22151d354c1578d27369d632319320  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c
! 246a2ffe703343b174a99092ba8af8cb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c
! 420898024214e68b292f72849966419d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c
! b359b22fa836d9e7f5838982f8de56b3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c
! c4081693c71496d5396658a666a54e78  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c
! 432e312ac10ce1bef6a7063fa92ac7ba  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c
! 1b8e3603f6052da6fd8e2f5d6a76a7d3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c
! 72379d5e92815ebb412ed6e6f6f4bd1d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c
! 6026c7e2d4f66974d6dd5aafd7b6e217  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c
! 6715699411a72a8d5a70f931042afa94  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c
! e0b1068787c353adc3f0506b7049532a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c
! e0fb41c228071210e416731131093bf8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c
! 8de36315598d491bfb2bbec9c42006f0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c
! 86110293edc4cd2f23cdb99fe5023493  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c
! 3d1878a69d5add0a0b97d06fd0d9706d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c
! 4181c1edf544c53a31b5713d2b319615  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c
! 94eb9fb56b1480eb1fc727a0f19d83fe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c
! 3f973a3033dde3e3562833553a1cb961  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c
! a0f39412b2811a1389e2d10b8bb5897a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c
! 2b3bd373cb4e1c1e44ebb4de9f186ac2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c
! 2e482e828854adfa29f15cc0801cde4d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c
! 97fe8390d456f3525b6e11bb2e41578d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c
! 831d62458adc815897e161c3c6cb3561  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c
! fa0d6d9cff6626e6f555e66fa6cea92d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c
! 60d00b5319600e10168b41fdbb38c12e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c
! c55d3c023121132eae99b39e1cce2cf8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c
! 3fc545da8f8ff1b53cf71d46d20cc768  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c
! cf9bdcb1e20f6056fb55ab826b8e34df  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c
! 4fedf8c482d8d13bcf5bc90d774a8164  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c
! fd1629dd64d2f87d7bba53a04cc92636  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c
! 4ddf0bdd1a00ae1241d40c9217dadadb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c
! afab86c9612797faa8b2c1f2f1ca4ae4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c
! 7febc298eec8d10681c203ef28e8b323  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c
! d65af3c33fd50e22c1af6d33bbda6a49  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c
! 7fe7f31871635e77114dedc0224d9d6b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c
! 63a9ff12ea387429aed3ebbe433eeb20  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c
! 02adf729d1f8917dbfcc965a35b3fb7e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c
! fe701f5c048b303f9bb3ab53c4b1a246  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c
! e51c2bd70232361dc51ff324486396da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c
! 35ed6b03b2d4565fcdb8c314bc104bd2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c
! 45a60ba4e6dc2ba962740ff03b0ebff5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c
! eaca578057885ae943c817131017c789  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c
! 665c7ade84fd151016a68d2cbbe94740  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c
! 611aa964beeea1a1da3a9b01ac520b2c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c
! b9436ee142cf012cba4bc0227caee592  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c
! 54347a155ea714bcb9e212dc3462b701  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c
! c800aa91b52274f68917941cd1190c7e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c
! 17eaebdff48759b34a8e10340656b777  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c
! d4021f40246bd789c67f5fbc021f570d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c
! baf325d27e3cc75fa283ed038be71f09  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c
! e2c3f8d807e6df670b182639697d61d2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c
! f0a632576ce63037f3bf0c52cfdeaab4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c
! be099bfa149c919b97ff87b3ac9e563a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c
! b810569b55c0974c561012a54fdccd5d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c
! aaf1ee37ab90a8743accdac607e5ddbd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c
! 36c55ee3b8a6e46022a1c372de48d144  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c
! 1c0b99695cb6d99decfe778dad796bb1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c
! ded3a05dba6e22eedd7087187a6a0860  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c
! c5fac965cbef4b881d9a1f2d98150781  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c
! c69943ff532db85c43c96ccec2f33c06  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c
! 3984fdd8ff00f38d51ee6d0a12c1d577  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c
! 98f05c45e70804bc87c31ef7bb1496c3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s16.c
! 9fd8ff0080b31d26e95e8154662b8b1d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s32.c
! 1822193b52cace1eca9402f82bf4cc45  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s8.c
! 01a1541f848b77189ff1703e153057f2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u16.c
! 57c84dfaf5a0ecb71406f24f4f636f1e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u32.c
! 5fac6cff0ac97247f74de50048bb21ba  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u8.c
! a0e4fe8dfaeea84686a6c1c2003f745d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c
! 1816737324959d4cf189b1504224ba7d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c
! ef855992672862b7ac27892241bbddaa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c
! 5a07bf783a2ff4e7ffbb9b22e931232d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c
! b0dab0d07df2863f1f1023447370dcb3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c
! 5a8c455825f86d346471e9f54aaa661c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c
! a8d8dbb8f9c135cd5f20f559b7c98865  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c
! c8f9ed3c4bc741b34dd4b3d88e7ae216  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c
! 4d672c57785a49737126337aa8f120b7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c
! 9a4e34a611cbe78e9109d82be6aba335  gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c
! 62694f581fe764466ca4415580a6dbc4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c
! bfbee12f0e4f525f98435bb049bb04f9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c
! 5d9ed21ac81002fcaa38ebc8102a9322  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c
! 9c27e0769b67d75b40dc9466f2f2ce98  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c
! 98a2593a3f377e4ffe4f4ff598904967  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c
! 4b90ab5f620149babe6e25383a14465f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c
! 9cc890fbe4eec978773fbc887d313c13  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c
! 6ffb1bdd238a17590caf829f049dcabf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c
! 3e00ed9032eb810a68da301099f5eaea  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c
! 7ac4058195939038e5651b28a65b0759  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c
! a7eb6385a340274ccf0ad6aa3c64d943  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c
! 9586769190ccc84b75e3b5ea452f92d0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c
! f45f4d69311f3bd407d30e9935a73b7b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c
! f89eae6a939a89945124fa33f4a6fbf5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c
! c038a6aeb1273da61d8e603dab7f6fec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c
! c107c4c43112c9aa7f831d190084037c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f16.c
! e9064c11e7a19aceaa00107f8aedf075  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f32.c
! 1eabd11faf164e32fd6b05db2396b058  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f16.c
! 88ec3a3302b0d0c2426267ed6466d292  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f32.c
! ac84a86626d66539019096337cae17de  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s16.c
! fc10d2f77227e79630728f56f0f17087  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s32.c
! 1c17c2eb002420859a7bc37958cfe33d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s8.c
! 6405053dc3ec1f87b47412a9c93ef9c9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u16.c
! 60a169c71231b5445c1f864c18661cb4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u32.c
! 187c854429426416e8753963230a1abf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u8.c
! 948a242e7e5744e55ff8b7bffb4b7f52  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s16.c
! f638d8f5d2621cb25046aaf3b369f139  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s32.c
! f32438e319dde944012b5a9de06fa71c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s8.c
! d60530a8fd4ba6b2f23a26c717f46bf6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u16.c
! c6e035292a24f741f58a163271ffa899  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u32.c
! fb58b271d6dc4a5733aaf79bdc7c07f7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u8.c
! 26faf8e666adfc8f516a5adcc461029d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f16.c
! 6a1d33f0cfc075d9a4802794cf08a119  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f32.c
! 620dee5cad744cc6ab1469981b9fe23c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s16.c
! 394942a809277af20a7b8772f42dd3e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s32.c
! 43fd83ce7607bd8d9aa2db5d39006e9b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s8.c
! 970c33a699419622af3d84616a2d861e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u16.c
! 51db28fde6ad24ab84304ba06d9bb453  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u32.c
! d6b79c1e1c2d8e751f7c2c105dae3898  gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u8.c
! 7a4f93830995fadc554e9b7a83bf4ac8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f16.c
! cb9e716f57810b5c1ce6abeabe0ab472  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f32.c
! 66867bf3d434113ee927a217680b23cd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f16.c
! 3a172a074a4862a157f14b3801bb1210  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f32.c
! b679f6fa084af2157a4702ed3a8f933a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c
! bc4d6f06ce904236acedd8a196b21d7c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c
! ed3915612cd34365a95b50948d8c57b8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c
! 6967987fe0e53d1d43cf04820504e0fc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c
! 3e4edba2c408373fa1fdf38e3667d5f2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s16.c
! b3ef2c205b2e4d7abe823331a5e5cb82  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s32.c
! ba90459935c5f1da32c14f639fd69799  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s8.c
! 694e181768ab2f46aa267229ea46bae8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u16.c
! 7b254947d9d53ee8601410e8fc9a4cda  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u32.c
! 0d21a013db6a37220f36994890a724b2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u8.c
! cb7920d9b05c231d39b1aee4377b7e85  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s16.c
! 682b50d539082f12948c3a093d482c86  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s32.c
! b3fa31f2ab0bcb4b34769d23a58f0547  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u16.c
! 5c588306a470470d47e69c94f3e20b92  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u32.c
! 430b11d797496fa82cff7776e25e2c97  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s16.c
! 788a771e8e4508f41d3f90fc9f7fb05a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s32.c
! 09a9efaab019c7d5b56c66071e48ff78  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s8.c
! e0e73697c61441ea7ec77cd74731996a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u16.c
! 5903779cddba34ee935de3ccd29a4449  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u32.c
! 9d4557ecbcd1bf3a0811939ef4576f9e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u8.c
! 544b1dc94c421aae396e0f6795eb5e3e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f16.c
! 55e5039bc6749ac67c0d93b5debe8401  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f32.c
! cbb96e923f800b8c16d66800b4b7eda0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s16.c
! 30272afe3b83648060ad54fe1870b10e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s32.c
! 657bb64e3c3a7d43222c33f27106b873  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s8.c
! cbb850595ab9a76d6094881a4879f263  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u16.c
! 3c7f84ab5ba593966e5bf1d03df0d9d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u32.c
! 7ff791932cfbfee7b449c49316f3a516  gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u8.c
! a834c1906756243d9217fb874edd73b4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpnot.c
! 9c50f351683ccdac047b6a551c7e4e44  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f16.c
! aa850a36e3716f67bb41c689a196ae14  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f32.c
! 2e36b76fc944f07e33354d277f3f54db  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s16.c
! fbbe02495a872f5fb592904b64b6bdec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s32.c
! 993ac52ff6b59f768da6c79cbd75797f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s64.c
! c779b064a4e18c160f17807d0c4666de  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s8.c
! 7c22e254f12e69e3ad50d677c49e45ea  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u16.c
! 154fc755011417b41cb404f9d383752b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u32.c
! 35639a9b4f805e1a9a38c3e21853f36d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u64.c
! b0f0d4bee247c22a9fd3e5424d39c83c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u8.c
! ea8b4ee282e9a8a4810c1c4f936a4308  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c
! 30bc19ff59ed7088577a3ec5b8ec143e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c
! 1935866712e0d180e0533de7370234cd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c
! d95bd33ad079df3aed532fe66d44926c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c
! 5010535d47d646434706cda7c5b5d8f4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c
! d5e4bea7847bb1ff7c00f9465f73afd4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c
! 9fb8de41c7c6a6aa2440a7b2ec3041e1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c
! 70f942894800cdbafa455a8dcf31085d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c
! 30d0ae2ec873cc1cf27e594c441f995f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c
! 4e6a72adc9b81fb94b61e00fb255b0f7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c
! e789cb7038cb757d4cc6c1d53c38a103  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c
! e59ec117b21a360f66f4f7f0019de31f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c
! bf26ff5250a5a7cdabd726b27f22c0c1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c
! 16be433b5acfe7ada5df2882a16bcbff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c
! 88f01cd96a57170a8bdacab3637e3050  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c
! 462539364bdbc2c8dd0cce0f8bc1e7e0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c
! 6abec3fae347da4f487500c61758fb88  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c
! 00db825ddaf29e54355e3ac1ee9375da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c
! fcc4ab9d515d7dead97cff9e227a0c74  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c
! 8f66496ee471a3a770c01171cfbba6d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c
! 9dfd504afd3f7c69760a7bb4be305345  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c
! ed6afc9aa005400e4ed02b761bc4b4ef  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c
! 159a3c69ff15c3619ae2d06acbcf67c3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c
! 42be25405bde30a022d6db19f2c1551f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c
! 0d59105fed506dd2cb861ab684cf0ada  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c
! 80c9211191db1d7db43cf41572c6cb0b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c
! 9cd30f30907d1dcb044c214ba6ccbbf6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c
! 5f203b3ed3a1ec26eaf50fb1d4b5ac64  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c
! 610d8150d83bd7d7e02c6e0ee6953be8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c
! 02025ed5b551bd0a5e4c4c17d8a62641  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c
! 663fa703f02759a4dc09820d760e3ddd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c
! c1f3d8eeb9fe1ba98c05834d2e20f727  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c
! d825fead9936fa6529c986eca2288226  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c
! 921ac80b9692e89e67da9f503dadccc7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c
! 782f7c6f317d1df6a3db33e9f0ad904d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c
! 12712b7cd48c1b87c1933de07ef6f8b6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c
! e5d6498ba5c575488b2cfd4d2e75ff45  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c
! b633cffa0cb74056e7eee4ba25f7847c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c
! daf3cccf973b5e2bdb081899791bc35e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c
! 5717fd0d80c9d824438b3435d2377e4c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c
! b1cd48360ffad48427fae0335416afe3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c
! 9b626ab0130c9b4a000ab7d230a49730  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c
! 25db60e24552d7c66a18cc2f1fcc9c09  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c
! 39c0b75d39d91987ca5486f4976b8041  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c
! 9b81d965aad6b44e9860dd974a32a9db  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c
! 129eda90e4237f0d546f11ba154cd7f9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c
! 9666a9749700a4345e38dbc5411c168d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c
! 7ddcac44477dca224e5caa0a43352ad0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c
! 1a5743c6f93351a1f0fd82848008c373  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c
! e74e53c8a0d62ee3d39d40baf5eefb2f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c
! ca868946f28512f5ed95e4b1563bf378  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c
! 4fe46a18fa2778521709445d700109a0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c
! 46e1da0a3cca1f08b693fdcbeedf1404  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c
! e629ce8a8925e431c883588730597556  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c
! 796c0ccc2854f7822c26d55bf7c2b78d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c
! 98dc315da2c3c72f90680b4fedef8218  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c
! 8802d4b8d18a8fc62c6f71376c5a01ae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c
! d28e612083217a13f8d0785e5fd8e869  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c
! 88087ea7f5dd4ba34dfd83a2c8f1640b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c
! 0227e6907873e70e5e2d287f8369ea29  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c
! f1ff0eff884001d38cae102ac0ab50ae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c
! 9061c6c39e107accab682599b46fb473  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c
! 62bf79da3909f8ffc95f2f987d2a2110  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c
! 7a6ce057d10e54ff5c13b782abbedbdc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c
! 09c19150bda18700743adeb4bc8138d3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c
! 810d718da92cb0cb30620184fc75e725  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c
! 43d87cd1ac719b42288afb5da8c876e9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c
! 234befd7b03c58eb18b50a45d8c30a7e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c
! 05fe253ca672e54ddfea310a1b63c41b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c
! 43d9789441056888203f15a0160c0c28  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c
! ff0b11f787e9229ac231a919c8465870  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c
! c8c64104e80276a43574a189081229bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c
! e4e8127f04b593c9b3e1393c307336be  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c
! 5b79fe2db854d75fa75969d443746674  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c
! a2bd0f23508ef816e2db393d40ebc073  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c
! 476b2c07fe4f660c59bc9b51b5035dc0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c
! 119ab59bcf84e4b1acd0144f6329ccf1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c
! 800c8c8b4dc0ca584ae13a99d4340a3c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c
! 9678487c3a1fb7fde39cb9c65ce14ab4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c
! b2b60b7ef4775248fb33d8de5a82fa17  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c
! cc072f6c64eadf0e0c6fe4b3b282c972  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c
! f4eef421d5f924598fb89d2af50dde55  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c
! f671be7608ead313b350b0a8ebd174a3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c
! 1e908e5a4814934d4dcc486c00dfbb79  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c
! b3047b3486d9d1613612c63c11f607b7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c
! 8d0824882465c710086ecde645eeb885  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c
! ad1108418e69c13cad7c1a655db3c6fa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c
! 236cd07bc30e778dc603b733e1888394  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c
! 6b88bb7417c95ccb02d4143618408bdb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c
! f7f8c92c9008c64aa35387ea2aa6b566  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c
! 38d39d280112d1473830523ee3b13a75  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c
! ca6d86f0e9609265159e2b2a7b96dfae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c
! 589c184ff4768848871221c6b7319307  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c
! 532dc00a7a3215cacce260a919d76c01  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c
! 9fb1325bee3517fd41fefe8b24d70d08  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c
! f3eb610c68e18ebcbdd5b04cab928d01  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c
! a68d593a1dcebfe3f4950df0504b67d2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c
! 5233dff1e04fa101161105bf8e274410  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c
! f53dccb82c5cd7c9987b638a4edca27b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c
! ac2aa9dffb9d9a35377a95e88ca0fdf5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c
! 0f85ab3cd9ddc50864a0b435826b5ae9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c
! 5c374a155947ae94563fc0ad91e8633f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c
! 2cba103ecd758bbebce00373cc419491  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c
! b917d1da29a36a582b2f020327fd04e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c
! 315bc29dbb4fbf214a9d006e5e07d1a7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c
! 55eaf5d168eabcb1847720aaf8b97749  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c
! 3cbe579f3291d10ceed04d05e7c433c7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s16.c
! ebcb1e018ede42f9af1dc0cc5084a528  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s32.c
! 8754597f2318ceeee7d3ce64910949bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u16.c
! 2664427ba9d8e5e59ca8fa48f3097883  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u32.c
! ee4ef9dba65ea6002524c809c27ddb67  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c
! c97242d68c28885a8da7ca65422e2436  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c
! 7b57ec2927f2efb5da6f44f8251c103b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c
! ce7d882715c36f2637d610cb304f5942  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c
! 40a5b48b4e56566bdb1a85ccb4bfd5a9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c
! 08b9165a473e5e2f451b3ae50fc763a3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c
! 3b574c52e2f44544001402949d47d03f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c
! 4ea66b7536975db89ab6a0ce289d55f5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c
! 75653bf32de69c08490817c097b014c4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c
! 632d7d3f469e0aed51444ab9465cb347  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c
! 4edd673d0a292dca18cc410b6f34f8e7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c
! 2987f433fcdce2cbd688bb8e192651a3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c
! a9b3ab749dd7f3a408b0d61c534073df  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c
! 66743fa321afd1eca4ade6ee45fbe1bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c
! 061be5b69e4ed769f38dc7b9165b1bf5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c
! deaad0725464dee98647d086b46b133b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c
! 7048f9e2838db576ec01b7d71c74d062  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c
! 505ab2e5b3f83a770eb0fff7b74a66eb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c
! b0bf617aa2795db2f3f22899153efd08  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c
! c9cfa1ca275433d7cf66e5795bac29e6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c
! 881c9fa08e069932e1dc271197b83963  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c
! 95ecfce80e375c320e4ec3585210a0e1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c
! 84407f88cd7c947bc2ec4bf4cfd2a5d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c
! 3662a220d846dd6546fd9d15e7fc735e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c
! b95ba324b75fc6acd04f6c6043506576  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c
! 8b0e65b5eb261797e6a26f6c81e299b6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c
! 19a88a2fa6a5640c7eab4c07cbecbd83  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c
! 738f0ffa3a0c5b2b08250f81bc13b1e2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c
! 2c25094a5ecfbe5bcd30bcc55bad6d47  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c
! 4e6017aa2a7d97a62fa9733165a36998  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c
! ea5dc7f95ca915004c2a534e4c961489  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c
! ca3c46d5b64edd97cb6d53b11f5650aa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c
! f9328545a5d094f525861884b01e7185  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c
! a9da6214a275efec44d70ffc5beb6e1f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c
! 00c853ae0a74b895513e9590f9f5b57c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c
! 33efac9a8a4bb5718619803edebb72b6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c
! 8e63d97b9501743cef5a87d140cda58f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c
! 8cde93b5ebbaabf33e1fb9b8afbbcc4f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c
! 49ab3252f698a20145aa112870fbfdec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c
! 0e110aa91c915122263d4ebfaf52de6d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c
! 53fb8481dc978d896cf1255f15f99823  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c
! 41668f8fb70ee6500a48ebd8d1438e6c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c
! a02384eed724b6755d66782588c502ce  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c
! 29113b6bc10557500365d2d996c49fe9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c
! e5484ac18889df3718fee127a72f6d27  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c
! c279f0254a012df128c4c3c4e3c0479b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c
! 4a9a9275e35a90b6a79f8d7ea9cb4c08  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c
! d9372fa6c3ee047729b45b75e47e4a4e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c
! 94cca37da6eb868ae1c080eed2bcfad5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c
! 832445e445e2199f6c9d1baf5e04e891  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c
! 101bcba45192eba350cd28cff39516b4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c
! 34248b184cc8cdce4193b08386f20985  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c
! 7ff506d1f2ae325f8b999d0da6443802  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c
! dcaaf0bfa2b8a0b2b306f3fddc0b8301  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c
! 05ebf3e974aba38be2148fcdfdb3bea1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c
! 550541b78a073606661a7874b670b7ee  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c
! 854a40fa8a52df52c9af54464b68cd1f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c
! 5aba25d9eab8ff9d4a75f477434579a5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c
! a4d1e0305f3a79ece7ef5a5f855b9a90  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c
! ec377d675b2e7ec98b2346926528e52d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c
! b079fe90061440412b64c81e76780c00  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c
! 17c6b4d60b160539031c61f7eb3341e3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c
! 26779beedabb57c7e3e9e024c1d44b70  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c
! 51513a02b094e8a37f1bcab855b30304  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c
! 7dd2c5d63a230cc4b347342e3e87f53c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c
! 1b4cc0474927fa99332f788f61a85768  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c
! 89678125a8e4f9d1d0a60d6f4981419d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c
! 113f857ff1fa26ebfd75058336b74604  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c
! 9d2e5897399b953d995acc22e9ca6fc2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c
! 9804f153f8bdc8d2736fb394d54b536a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c
! 39c9c30abcbc38a5d837520389af4a05  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c
! 8f8a8a370fdbf3a4569eef357b936424  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c
! 34a855fe6ea58ab6ae2c6428d9ef9072  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c
! 2ed6b592439af33b859add488649db71  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c
! a18b6ad71f186fa8023aa86a3060082b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c
! 9d07698c2d5c004705b0d839501c8339  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c
! 6611292171d2ce6915af25311eb43ed0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c
! 3644e637b4af13aea2bae77a8ee5fc35  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c
! 446a2876502e5272fa7b3ac83c0a076e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c
! 44735184c6d34457dce10daffdf39894  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c
! e4ff121cde4e81f06da2728941c85695  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s16.c
! 9f4463cbb1c5b08cbebe030f8d40e759  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s32.c
! 82baab7dc3d4945dc684018b89345fe2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s8.c
! 91aad36f0533533c332ddac23e132139  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u16.c
! aae4ebd3048cd0e46742038337b61213  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u32.c
! eeed1a9a35e97ab967ded7b9fdb2acc9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u8.c
! ff8877b63063d8ae496e42f13260004e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c
! fc39d89bbad346b09aef288e3b9ba924  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c
! cf0ea21911d7745dcb59bc21bacb139c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c
! 13d27a4c8cd685dd2683be265826c75c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c
! 2272e304a5bcc31a25a194cab78b8d0e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c
! 8f40b76419f782f133830bfc6040955b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c
! fb3e70c18c1be774d4d5b621f25daee8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c
! f1db1f335dfa0b2fb52f30e1cec5c007  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c
! fb2ed13f8b7149a06fef7436526beefe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c
! de92a820cc63919a344b216854c80b4a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c
! bd2dcdc3c50f70a6cae218c11f785366  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c
! c332d203d1ac963970045aa677eb51da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c
! 7e0f21b854e68a604e79d6922309f928  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c
! 2fd53530df97127385af70f5a2a81907  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c
! 800b3019dec34a8c2ff30d67080e7388  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c
! 952ede0f81a08ed35b05f92de8c6c379  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c
! d20dafe4662941f350fd4c3a24f2d32c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c
! 94e47c84bab0766900cf83ffcacf28fd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c
! 4dd1e8ccf52b61a238d870dd4bc2f3aa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c
! cdd086102faf1e830918c089a6243042  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c
! 322be138970906624995c9301b81c4b7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c
! 417932d4e68754f914b9fae63650f1ce  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c
! f21e4af4aee82ce706dd026c2fabeea9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c
! 1e38149bfa8c733c514c10fb20933b09  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c
! f386c5f6d21ab274b196a222457cb793  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c
! 2ae4c0209f1b6e2e0b249b712c8ae919  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c
! ecba1f3b2bdf529f38cef8e4e6c905af  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c
! daf30d809a516fe8e9e8b7cb8889c614  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c
! 8c10a69b25b76481c7cd52d65ab9e137  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c
! ea356de9b9ab9591b83578b6924ffeaf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c
! e695e16b81200b1b2f25661ca6513d02  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c
! e88b6a520861733f6da83ce27351da2d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c
! 308f3d8924a67fc094ebc83dcbd0f5d7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c
! 9e63162e3c0bbc687e34997448399816  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c
! 5cc939698462bcf7e40830214361ae4b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c
! 50a688c68df5bba959710275f1c764e0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c
! 8d4435e5ebc1f5ef042b61966f54ca0e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c
! 1ff613580cbfd86361a9940c97aee4e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c
! 6421760e05aa464836f45daafe88fbfd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c
! 49a52bdd79935ee54bd5b958556e3f47  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c
! 9eeefa2a312b60d34afd9e17c4d8dc80  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c
! 3f088e701044e690876a8b0d903940c4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c
! b28aec3bd22ea1e57905d39447cb0a64  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c
! c9e62047aef44d48b74bba88248a4e46  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c
! d90c77398e7dc6e4da97b6d25ca8a184  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c
! 5f6f33f8941a50a0c40b66f6ce045f30  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c
! 123f0c25fbb8413701411a60855af1ca  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c
! e3b98732a0f4d3f58b6951705ee4bb94  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c
! 6331488d09ff7aff6cbee683003b1257  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c
! b8f917a3f763cd1778b1a26baaa30921  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c
! a46f2ae7fbd76041f03f009bd407ec19  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c
! e3756e2e0adc0c16b58ccc2938c835fe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c
! dfea0c4b420a1070a266c4861bc09810  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c
! 3b78a06a0766a64069bb6510550e7c5b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c
! 3973c5d783e3a40c0ea907ff78cbb94a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s16.c
! 05c78092d317ab9f7874baf38bd44f36  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s32.c
! c177d6161dbc651185d0e3d49fc3ac88  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s8.c
! 29ef81a0d770cf41c2f78b92af7aef38  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u16.c
! f42088d6109d5a2bc5b183238b771d30  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u32.c
! 70a43792881f172a81a680f1c8401393  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u8.c
! 8c4c071726bdc575490d9a24916db3b7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c
! 6e177f6b9a2e1bdae93b4218c4824319  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c
! 42c90070ab42b076cc1e0c97537dcea5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c
! 8fcb84dd01e44918dbb638213b2d2b32  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c
! ae5d3a72864fe22074aad893161860c5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c
! 97bdcc2f2fd3db01b88a56edde732b74  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c
! 761212375a04192cf7c820d483f57d32  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c
! 9a5b28c5556ce6cbab6969c9a0a7f662  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c
! f488a950563ea9cb49d1ecb258e32e6d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c
! 4867c9002db9413de3fa74a7bb8e03f6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c
! ceace86932e6981a8ced529e8f8699bf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c
! edd24fca93e238ca3af231ac7a290b23  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c
! c870cc7e38c3bf363ec607ded3baa639  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c
! ee579022dacd3c564f15b708091b0db6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c
! bcc9232ac290447faed31ced39e0659e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c
! ab71a568dc4d0c72dbe75d38e518d4a0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c
! 6cc1e5d3bf99a4a1f983e6dfa2fab366  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c
! f37d725956e3f31b421a2aad3ac99b71  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c
! 4266fa4b52725908f627480e46cb27bc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c
! 4487f6c361c8f164ab721d4796b53990  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c
! 673dfe299988d93b70b55df58a775355  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c
! bf528ef82960d25cbec1a3ad13a606ef  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c
! 6b4ac216354e6d6e29e140d24e37adef  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c
! 0e5f7e0c4c372824f7cb18473f12deb8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c
! abb0a570135abf8687a3aef6804d23f1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c
! b699a7198148cdcec89ec282749e282d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c
! 3d2c8b0bcce19a9d4ca5b6fc13a0fd9e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c
! 08bb54852925537e7e0998be81fcf76f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c
! 03571f35ea79f408a88c6e25b63d8ab5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c
! 48cc16a8260d639e68095c7bebb70edb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c
! a8f3e2ad7d514b16f92f4552d66dc786  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c
! 20ca0bccbeb1da6158a9efea4f46c4a4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c
! e4c8bf77237f0b162a5b4d614937bd8d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c
! 84ae7126bb4284503aa45217793b7681  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c
! 4046396861bf192b01a8c8a979fdf903  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c
! 9cf2ddf89702c395433404a90d9e0d83  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c
! 0e3babeef7f2031ec4254f6a0b39df8b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c
! 254c2f9d46bc923d085e09ca23e6dc3a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c
! b67b8ab9b96437c8268b78d3c9e90797  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c
! a5fcc12032c7319d9a7da201d29db3c2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c
! c7a95842802ee025e0c83e1b074eb8c4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c
! a66ba1b86ecad1d91614a3954c1f6d18  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c
! 0cad1e5b9bf6053bf25def291eae611c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c
! c58253ebc22a46ef80f5e77f050ba67d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c
! 49f19e55003715c966a0e48a900fdfaa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c
! 901edd0d93d0e52aad5f74bfb85c4041  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c
! 1fabf898ac8a85d627f68cae6c657b5f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c
! 2b6de453b4bfcc621aedbb7d7fec5051  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c
! c0707cda7219dbd17d76e345a88a805d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c
! 035c6775c79a1beafe1db183c2f70ff3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c
! 5f674229aa3a59f943e235740968ec26  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c
! d1be2de275c5e0c2496c52b62b16facb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c
! 4af1e80124699caad6dbac4d473c8f19  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c
! 89c2b0f32a67c9a2faccb431e249557b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c
  b4fcdf3cb05b2bff3bb9a856565b84cf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_f16.c
  9ef945e29fc71ecd898a3aae88ba1da6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_f32.c
  312fb2c034e3b25ce55448c9a1dc1a9d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_s16.c
*************** c4c7d66036ac40ceb8fcc46da005c425  gcc/te
*** 59026,59587 ****
  e6d94886301be09386ca599d57548632  gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u32.c
  9dba395cdb1523cef0790f9058cccdcf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u64.c
  cfb22723ed9dab5245a9330a48ab41b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u8.c
! bb3ff828cb16ce2ae8782c723af4a5a1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c
! 9b0eb74fb11a89d604858ce07aba40c4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c
! c6f16ddd81e549697ae6c072b13a6b91  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_s8.c
! 26644125685569cf65dd827419e54ec3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_u8.c
! 2ef4f94c49333bcfef10f41004bb3b40  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c
! e89f67b9dd4e7416648e7423bb1b3d5c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c
! 714ce11649d7d788ed9a876bc22ec9ef  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c
! 08862304a0a73d1ebcd5b22a71ef1ee1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c
! 6335c03411d452f6749aeb8cb181c8c3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c
! 9656b9a8dec7f57110e4549aebb32868  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c
! 55c311834d1cb154b582b2d7396ed3ba  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c
! 6c7ea954a260f877d71eb229132eb5a1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c
! f46d055232356af3d36c166e052ccdb3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s16.c
! b20e1705ce910e5d46e0facc861398d5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s8.c
! 19e0610c833ae3b8480f8e53e82f4f56  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u16.c
! e159d5a23d5bbff34675e3ad87cde40c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u8.c
! b58bff75c9732591aab987147eb9012b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c
! 2a90b5dddbfc98a4abd0bde1f0ef1900  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c
! 62a964193ab1308076e088c6c108bf83  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c
! 7582d518cfe56fc3acf37b34b6bf0788  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c
! 0dcb74c239b96438952fbac6bcceaa72  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c
! 820740b57b77f3e395269d82c4c971b9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f16.c
! 2e93aff6cfc94100cce717d7e77d11f0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f32.c
! f276db3db14e3fff8d49d3f7611a7a20  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c
! 6e8df10ccb034f48c88bd9c59ecef1f3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c
! fa1e0602b17de2ecbbb8455a83e2f0f7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c
! 78ffc33f17a73e5c814c4f31fada961c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c
! f25b7fff93f650481888bf0167674561  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c
! d4add24b834b94cef9bbd51a064f3f54  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c
! ad28a3f874dfa2470be280d652f93335  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c
! 16b2e7dee8b0c3e5c2973fd4bdddefa2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c
! ed4b931d26f0ab281205247bfcbfa39f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c
! 452da80858601c88a8c7bc3e20031185  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c
! a4e2a0dab79aaa4f276065beca093036  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c
! 0e22cd3c505be8f678d3b15daf713bd1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c
! e9142d882e9f12890e53a03b30d50b97  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c
! 200d09368a8b79f8e2d8e46953ae2e3b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c
! ca162747d3ea8d2d1de7715377ad01f9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c
! 4ece38c99ad3daa7e4f9b75b7cde5880  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c
! e05d80fbcddb623f952869bfe35f558c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c
! 0e5a7e699239bb3a455ac8be7e06fa3d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c
! d80b2caa57b061768030b0d922476940  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c
! 3ef828f3e8af4744e682b50b62cb5a70  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c
! 6aeb34844f6971f9589fe4ec015137a0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c
! 50f2b8a543dd88d156ab2d2bac79eb92  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c
! 0b2f0cb02f42d28d0270969698a7f438  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c
! 8a6c46108d7e7b9c21155e8bfd55a135  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c
! 20f9f8eb6f55519e88d445a40f8f20ee  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c
! a322aeaac2fefd3771d88af1882fd94f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c
! 3cd7fe9c6e249a04d9acefe4ed442c9c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c
! 6d97454e7f5e86179d55cd7e297018ac  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c
! 783b0becaba1548e22ed41d16bc5cb2e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s16.c
! d634f008a92f31054b46795ef247ffc7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s32.c
! fdbb41d957e416c50280f5503563aaf0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s8.c
! 86ab06b0a01f6b1340e7b6e573847f67  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u16.c
! 2ef48cf92a55c86e03d7ad34f8064d3b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u32.c
! 498293b24899a1ac270baae3f32ec2e8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u8.c
! b9d97d55c492f1620112420ec1b54834  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c
! 067376a9af53d55304a0639bddbba645  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c
! 020736e1ab13d2341a79b4c2c244aa3e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c
! f088407d6b2bde6e3c1137eec9627f06  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c
! 174f59684cb4017d20fc7f31b980edd6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c
! ccd2ae4de7d98ed337670548c8686a86  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c
! 83951ea40443494716286afee81cacd6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c
! b1ea654cf2cde60fbbad0c865b2ea21d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c
! 6c18352370b134a3223d550abfbe80ca  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c
! 4bb1c885dfc2cb1b2fbcfd5886deafc2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c
! be7234dc32a3d369a0fd16bd5a7676b2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c
! a085786be4e38ff64524afda05226ac3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c
! b1d8144cac54a2b34249eb33a927a85d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c
! c4d12e199e8c3dbcbee741cba578063b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c
! a735479f806ee2ac6a78be0f7859b36f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c
! 06242df89f93a96232ac551323cb8e87  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c
! 318679a57968b13a378ed06de834c4da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c
! 5b283f0f335267df48325d46a501c99b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c
! 3bc2ae3a2730a5d300728b29fd88488c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c
! f5ccae41d1d69f4ed29d88f750785883  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c
! 0111d5f217ee9fe3202ab1a29bf30c09  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c
! de752a085d5179fe5a704327dee881a3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c
! 467543a653fa1210f1efd6920a398bca  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c
! a2feebbec4324d5938038de365584b3c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c
! a75d8b59a1240f550ab7bca773a2adc3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c
! 4c879ad2d773faaff16c29896b47d7e6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c
! b123c1e30512240d08353bbd360e9ac0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c
! fa3cb7da594f6dced1d9ba5de6d88328  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c
! c3ac23055465dbc8c73f16fa6ce157b3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c
! 35775e7918047ac5c86ad1b71593329a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c
! db18a69fe6069f6bcda7af3de19922df  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c
! 21a193617e4021d1464e6f49e5ca1853  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c
! b049031a63fc8257ba4c9d3c51b442e9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s16.c
! 45eebb5a99288291f226df170708f17f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s32.c
! 4e0c4964aac6cc6017c4a5fd42b80b68  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s8.c
! 0eeaa2839e385a5016392bd6aa0b008c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u16.c
! 463a75ec64b548b888a101c8098c1acb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u32.c
! 373520d84bc2a956c64c1bc532e521b7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u8.c
! 681e811800a300295bc25b52d94cda02  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c
! b741496473c9a2316c532ffea1086498  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c
! ebf30c0dd67267b97cec7dc741c7b6f6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c
! c00fdf6946a735736840746277dbce52  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c
! 85d52573cecf08d531eb0d8fe9e8ff3d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c
! ad99ad946e647a330cee3cfb215f4006  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c
! acaf172fa22ef3d36341a65db317bcc6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f16.c
! b63285d547cf9b1c7eed899f54fec35e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f32.c
! 6ffeb9e15c2660704ad3edaae20873d2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c
! c84363f8c13443d76b038eb2ea0898ca  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c
! 515ae8e396aaf9b085d185bb40904792  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c
! e232b7805ac5abc859663c73dad0e109  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c
! 83a2969cbc6f84e71511764b759dd913  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c
! 8c7b1a03ffbef1b36b35029f00082f31  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c
! 1ac1638426b7f834cc530dd896e8492c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c
! eae943381152bf2f5ba3172e3efd63da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c
! 974c7da9a529054a51a5a8f1ad12df4c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c
! 0a52949967425e647a38883f1fdcf7b1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c
! 5ef52f5266ff0310d5e96fd1f2884d0e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c
! 060e7443d8e226cead2c828a87f10693  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c
! cf6ddf74bbca6827d0250213acdd2737  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c
! 8683cb5144f884e0ab4a312d7afae68b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c
! 2dfffef494253051c62129b97bd36d1b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c
! 8c12175008a9cafd7516dbbdcf2be0a9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c
! 8453a89ddfa8159cc9c8db36f0eaecf6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c
! b92d97bf052a58ad99ef502b92cddd5b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c
! 73a8b3e2fe6b957f7ac6978f43985c28  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c
! bbecfa250a60260997210448e763799d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c
! c1cd3435d704a2d8245b11a5fd992fda  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c
! 06a7d6c58a5b779e23189715ddb37479  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c
! 9f188e8a49b26774ddcf3c932cef1082  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c
! 9db8ab1df53749af90c78cbc746b4e17  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c
! 697e03ca4ff8b96ee5b04068fe480496  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f16.c
! 932a919df0aaebecbaa82616612a67a9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f32.c
! 8c75c42f4e3d6bcd0db121e8564c3432  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f16.c
! 837e2d347c112a89ef5f14ef44254c9b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f32.c
! 4237ab3f8e9976bee64e5c510c249d2a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c
! b001dd7657dc3505ea47c64c9e0c2da7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c
! dcf1d060a83840e8760abefd11ebe21a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c
! 6b258153e02bb64dc1b085a9896bfba2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c
! f586e5ec60fafd359accfd4fccd419e7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c
! 70eb015befac290c751d998ff6c27aff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c
! 67de698d4762f3f5e60903a283c88f18  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c
! f6d8c14612381434640e3c8251a612a6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c
! 163d180af1e309ec2158ce890545f254  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c
! b5ec442fa7859406b2f6038b101de6dd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c
! 169369593a8e91adc78cae480633f367  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c
! 273abfc6f50ee5b5062f4c9289d5ebc4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c
! 064c5ba6020c5ff5d4bccd22db2cf2cf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c
! 9d41dc5de9811b4b5d527aafa445408d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c
! c96ada71724fe241533d992090b28061  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c
! 7c5753941b7830c1b5037f3e3907bfc0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c
! b3c390a2ea7a4f05b7393c4ae2a7c3f3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c
! 6cb4dbf4590b8d6d09b41e612da214aa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c
! 261d8e033d81ea8487d049f222f87cc3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c
! 2129ee5166b44a06f29dbcb65ff322d8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c
! 363ecac89d6b9aba39bf748d7a3847bf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c
! b9ecdb6cb33bb35345529cca45ce7eba  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c
! 39ca2955e2bc38654564a1ff29096b97  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c
! d8fe7a5d217285b77320d131de97c0dc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c
! 21ee11b2734930d7349f44f58751c15f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c
! b97df2d51323abcabfb09a5df5e0309e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c
! 9b578c14833689f73e21757bb31e52ba  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c
! 929c1e7f6adcf752a7ed97430b89ef2a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c
! 1df1d3556375c2bc149893d6ca562e9d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c
! 70e674cc4f320f8cb21f41aa8db647ca  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c
! 569eabf9a3bce29838957335ab2e03ae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c
! 5346b289f78ae14c6f06975c87b8b866  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c
! 04a0a137a92e7d1ae48fa4ea5e51fb6b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c
! e890457e597a3be1cb3682ba19cfd908  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c
! 8ebf3c1763756d2b58a4f2f4f6990af1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c
! f256238e1f0bc370e92b6ebee5a49825  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c
! 9ab7c52ed692331ac17f3a77a359e6a8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c
! 0b11dbaa0f60f8e4ea321f4c55f621b6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c
! 515a1f70293c50ea8503d02aed850da2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c
! b10c97332ce418176b941bd6a74700c8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c
! 6b10a9b2c28078a57f3e617510974e9e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c
! ff0a951c8cbe7acb545f950d5cccdceb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c
! d844787def96f74e18e9747cea63b32f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c
! 1277848d9db569937b431f7d235a9e94  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c
! 30e814794ac438a22f2fa4a446763cea  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c
! a24419a8a641ebd1851a317606e701eb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c
! db06eff900032853cf190448078a4986  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c
! 0a0131fd4fbcbf2c0296b615d130a952  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c
! 45b4c004bfe485ed555218cd1485ea9a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c
! c9e901fe495d1e09a73a64a0a0429cac  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c
! 8bc8b4a2e32e38b5faf6701f4e9f146b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c
! 30946009e4b39d4a6e50bae26958fbec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c
! b56f2b8302d8cc0f00feb4a1fc9abcd2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c
! 053eb89ecc77c13f59d37b6c5e5d1baf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c
! 14f54451dc153a827c4fca6286442dd6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c
! 315a299a43669ac834afa59cb57362d5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c
! a6c107bc251ee67eea4ce1d02863cdab  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c
! de1cb8b4f89ff66f540b03c3db602584  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c
! 99fdd7f57c95c6f32172b07839d52a7e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c
! 1c88505e4b6ccee4d78986d88c4e3138  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c
! 7a21bc9390e0723d667f6c1a640a9d87  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c
! b7f3d3b9790c02ce634f9ad38fc7ed49  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c
! f183cc7175764022268a072991c65eed  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c
! 830620fadbc805ffdfe8c5a9eb223071  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c
! 449f521631a60b56a5b51f89d24b3f22  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c
! daa0f08ebadc759c38e96891a26197bf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c
! 7ea573e0501fe7665a68a4c562141595  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c
! c96b106fd2bc601b2d498d1ad69307dc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c
! d1deed96b04bf9cace69cf6cfde9526e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c
! 70eb5ec8ecaec9ca87ab3cc2843570d4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c
! d5544c8f25bf3985018dcc88235b3403  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c
! 73c066f8b7e5555ee39d04725bf84892  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c
! 8b7a38d46f8a058706a763ee9143f7b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c
! 52bd810c873bdb23b336625b299234ca  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c
! e2a37832d2a2faaf2a26e34f2f625595  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c
! 8bc58960b4f6f592e6b8e023ae1b4dfd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c
! 9f716bfa41d2ea73b51efc144e37c069  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c
! 8b14670727e0420852e05a1ed690b3b3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c
! 9f8f1fdf181b32325dcf53c574e0f3d4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c
! ef8c61e0b01e798514442f95fdea7a49  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c
! 3b9b0765f651afddc1fa59941cf48ae0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c
! b10cfdb237776099c4180833e3c5ba65  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c
! 619b5a8a36d7d063f7ce43cc2eff5560  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c
! 905227377ead65a55eed190a9d85e9a9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c
! 453b61d72ac14797e09e2b64733bb3b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c
! 659833bfb3162e1c1facc6b8a92b4f93  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c
! 8f7269908b469dfc3407b1a8d980f69b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c
! dc5c97486293aabf2938431e5a6a104c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c
! 04feab40a05196b25738dd6dc329d4aa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c
! 236fbb4d62a1a18efa9ec3ac3d4a5791  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c
! a21c5da0c94b3574447973ffbf4a95ea  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c
! 7dfc4b4a31c672e09cfda5ef1cf3aa43  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c
! 1d8a7fa8a125cf4d2a5271f018ecf0b6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c
! d880bf25628ec038db5b89c61a81c2c9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c
! 1b411aa829010fc47068b564f16a4403  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c
! c6fa4ae0445422bda12d9506c8c66130  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c
! d0c5d5ea1ccc5603cd05452db00d32d5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s16.c
! 6a57f59c554f7d1f12e0e0523e652ec9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s32.c
! aa1de162670d4e2e72c7a5a8c2498b4f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s8.c
! 49a23be2543a857152e4ee103680db75  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u16.c
! c47457767845064366b1b69c310f1d71  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u32.c
! 42676c63aaed6f9f3f6bfc682126b3a2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u8.c
! 0c5645db2d8b4fce0fdbafde4b9f3807  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c
! 9987bfb5d7e7b72b50a7cb9047c9b0a2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c
! 8e7d63a6ca48e6b9838c4a347ee75f57  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c
! 61d882869f335722abbdee5458926265  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c
! 90c8e82fa8fe803ac5ba1fef50b85a78  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c
! 24a95adea75dadc953d3e0e46483e14c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c
! b6b4323e56c13ff45f01d327e8505153  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c
! 8f26e28ca59f681f4629ab903687ef08  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c
! 7dcc4976e15f6e685b35852a399bf077  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c
! 392f0c5e089aca5f962287695f6770d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c
! 7bd24b43f713c1e1cc53e763b75839a4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c
! 13473fa384dcc5d8318a94550e9e3876  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c
! a4289e6af40e39f70590253f3a5e702c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c
! 8c11a0fcd6db159acf5d5d14fe8af361  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c
! 8609eded145a680bd0d88732f604a52d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c
! 7bcf424ab1135a55c18145b6df2f45ce  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c
! deeaaeb49f41ba227cf33b1899f91492  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c
! de247a562bb6501f7ce6985646679af6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c
! b7cca0e0be88f7852de4fef1c9fed3b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c
! e5df802fe19838c7db23fbf2c615b6b7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c
! c96c6b16998c2c9823076510291988f9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c
! a2b7c3e3f9dfbb0dde6bd19ed6a3589b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c
! 4c078897870b0fd47f0ed6aba291f7fb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c
! 97b11941df0f902189f9c7c9cb008af4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c
! a76c4db31106832330ddabd4dfe8661b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c
! 18979f3ff385b76b333fc6d595bbb86f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c
! 192f1a7c02b8175b1ab79ede5d2eb39e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c
! 428d7789fdb1f8e7e2643c48141bf186  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c
! e53dc57cb0db1ef4e89ae5a0a0ad7620  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c
! 2b93abe4137759624b6a3968e8a59731  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c
! 7b97bddb690e1887211d5ddb2d29810e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c
! 48ab8f2efdf25a0cb7a09170c1eba7cb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c
! b7f2199068268437b6fec398103d5d39  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c
! b166175826ce4d3b3ab0184342ef6d59  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c
! 539d48d5fa3540abc8415e8735a5f5a4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c
! 0f6d9069deccdcf59f9cbdb0e94cbfa4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c
! c5fcfb0961dbf8e1b5818ba180489937  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s16.c
! 3caadcef04a8a93d34b41b93d1e99a66  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s32.c
! ae71c7c6787a60b783a0edee9aa5083a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s8.c
! 7c79751ee95521c41e081f9339461004  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u16.c
! a53ccadf53b894a76a4f8d8b85bc02d2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u32.c
! e8802275fd76c1376730b740d2e07f8a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u8.c
! afaa787864749ffa95a7f5c64e7bbeee  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s16.c
! e5e17cf6674e1f678dd79128bac37dbd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s32.c
! ad06af66ece90f5f850993478643d541  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s8.c
! 0e6f22fa239743c5ff908b2c03422710  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u16.c
! 3d36d0ff0343a00f42d4e5f21e3ee0bd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u32.c
! aec93404642770180c9da8da575bc675  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u8.c
! fcc650c84290f865fc10171260b40d71  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s16.c
! b43075c2fcdde5bf44a713ab0620726b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s32.c
! 7685adc0e9a38c4d4077daf40f5b2d56  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s8.c
! f248f3f2ae0e6e56318a6500e7a39edb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u16.c
! 99e89933e034fa439440de0977fcf4b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u32.c
! c8397b6c688dd10f292be3fd74f3ce35  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u8.c
! 6e84b88e411390aa07b7869137a0353e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s16.c
! 65163f38eee772298032dc72b57eeb8d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s32.c
! b6bbc55974debeefa69c8d5931355208  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s8.c
! e7f3f86281576cd622414b91d3c74ae5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u16.c
! 4a23c397cd72fccbb3da4a41ad86fcda  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u32.c
! fa2f9a401da2b1f50369469f81f000c1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u8.c
! 3af1236d7ec4d9b79a53e31152bc150c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c
! 4a09a8a8b1d85093e038a3a1b7234436  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c
! 241acf549031c2d120a7d8282afb0382  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c
! 8485b717513606e97e7d6deadd712d23  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c
! 45fd20a57b091d63e22931e2f1ae23d3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c
! fa7acf146ba7c39e50f5df332a53785a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c
! 9c5bef30941c12a164e041213835b636  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s16.c
! 1d740d22a719b672c96eab3c9f23f7c1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s32.c
! 72867de7cea3e0b5701f88077ee0dfd2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s8.c
! 2243e42ab9b835f76190d4f1370f5a17  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u16.c
! 6664899d7a0a3fffee7a1656da4ed90f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u32.c
! bbb9d498b1df24275b5b085c1f18dbec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u8.c
! 60a321117282548381796a49c6ece328  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c
! 7a6078196d154898cba127b43aa33d11  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c
! 09241c4170f6a51807f90520247d0f47  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c
! f2686f50ea6e91f741720864ab5e88b7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c
! 4457b85afdf598b0758653174b063aaf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c
! 78f7c1f6d844e48e5d96bc2974af5057  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c
! c582ae3376b2eb4c254d3a5aa122c9fd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c
! 027822fd3018790ff0102b205eac7a6b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c
! 3adfbaa81bd867c5d9cae25be2730c8b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c
! fe37f80301c18194edcd50a13e6803ce  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c
! a5e299a3e1d7ec7b63528789d9623986  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c
! da552653d2868b9ee099df3c1c084f03  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c
! 78f4c11c4bfdf7c222d18f5723594da3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c
! dfced1054e42720a12da576e630b7d84  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c
! 8287314e33de5e3a47c7bd7abad841d9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c
! dc6b1258ab569bd6eb5131d8304976cc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c
! 4dc736ed0c1191065ecec202fa00a087  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c
! 254dc9138fcb3f823145373b259f6a25  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c
! 17886b3cc684a48a9a780be04a5cd2fd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c
! c897eb07cea59b613a23d87166819945  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c
! 8c2160c8bb5a4caa8047172b1b7f8f23  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c
! 6b0471f5bbaca2ffe847a3f740a1583b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c
! c8954598fe02c9e631bd20e64e486c23  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s16.c
! b183bd54b05d41f8437c9157bb3fd39f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s32.c
! 076a00d52efa4eaa6a5b3cf341aeb9d6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s8.c
! 0202434ad46f530977a6d780e2d567be  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u16.c
! 6b5fe8868af88cb530d881e48beef470  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u32.c
! ac9b84a31b4c098c62497c79d3f853af  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u8.c
! deac7b000a1d1fc0a6671a7e65868bca  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c
! 74f6817d70b4677884877fe4bf037439  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c
! 442ea5d27e97d1a2d816edce4a477021  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c
! 71823e7f2c7b8e44bb84594cb8f1d9a1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c
! 66948e1f92293d50129edca2dfd4d2de  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c
! 97e19376fabd7b5747de3723c407b874  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c
! 7988f2de2ccfc3ce6fbdc91856ce50da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c
! 0cad70efa04a359255e3e531068c28a8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c
! 7bcf8905a6c43f5050b1473406851e5d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c
! 232270feb61ab9a108143bb04cf9c093  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c
! 434d7617baf3208a0323e44324fa3eb3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c
! 1bf2e837e6f0f778dbe9cb5b50028033  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s16.c
! 5c57b183e434d4a0b707c5209c35433f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s32.c
! 25af582005ceea6a290b82a0f2be583f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s8.c
! 4efc189d863bd17ab442825fbe9cc268  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u16.c
! 3ca82531b7278152f855af42dfa0f3b9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u32.c
! e3ab5164fe383397abe7150923fb30de  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u8.c
! 92abf411c4ac386c52f5d83afb922dc6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c
! 86aabcf4498f925713e5f88d917e3aa4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c
! b374c1bbe1268d983b5d9c8b35c692f2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c
! afaf14609262a4f5a9955309c2a513b2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c
! ec1fede6e89032a4f00a083af8e68ab0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c
! 88bce73b950808cbd14a3e5b250dfb75  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c
! 0f6999f4ad3d27b461d07585e6251f61  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s16.c
! 3c302c0c20e5e1e3bf1454ed3246102b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s32.c
! a14569c1265b56d07bddc7d741fd5e73  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s8.c
! 1b0e2166174b7cff78ea61d9b486a242  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u16.c
! 959b45e4f35e1996c4987ca7d483d1ba  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u32.c
! 7f98f9ff95fc1ea03ff1fb7421176b98  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u8.c
! 9a5fbd5b74034010b7178191ab083a8e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f16.c
! 4b2276fc258da1dc8535df6c3e2af1e1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f32.c
! e28d9c83c5846ac1dbfd5031e1b996ea  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f16.c
! e2071cbdf84e83d952b6d24397928869  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f32.c
! 7b3bc8f05494dee1894e4470e450a8b2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s16.c
! 8b64d2fe1700e84b12754f9f8705e163  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s32.c
! 811eb53923a4a2c5de87326bdbac4a17  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s8.c
! 6f2641567c515913693c444a8e8eb482  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u16.c
! 2ee98389abb2330a789cc1593b7e8bc3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u32.c
! 7c637f2cb5d55f818deacf73b5b14a31  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u8.c
! dfa1dfeb9120a2d3a2c6b5d5b6259815  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s16.c
! 452e6031bf2f8375a5ee0a0837669f3b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s32.c
! b97989c0df14fb60303604559a570905  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s8.c
! b2eb7db6b47e6a38cb8045cb63458e05  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u16.c
! 3837650cf776af0f692cd5387846358b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u32.c
! 420966d82c8d3a7bb80562e02e3a8e9b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u8.c
! a9abaa59bf6aa95c5054c89f765cbc40  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f16.c
! 1a7a6e2aceb9ec40f8d9054cb92952dd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f32.c
! 3faad9f167f9d53f46d2fb5deb747b14  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s16.c
! 3202954833bc9ab3b12611e7989ba862  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s32.c
! 05d681278b3cbc4ca7caff7b7f17066e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s8.c
! cad165a5225e5e44c82d506d8011849d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u16.c
! 15e710f0a7361cfe01b8073b428d1064  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u32.c
! abf7993ef71ecfe056785135db195065  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u8.c
! d7bb81ee42ac3f621e947b066a4bc88d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f16.c
! efc1d54df73c03bdfb94a656c545e1c1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f32.c
! 78631680908df5d1be18fe4871869dd5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s16.c
! 267e5d9e8c217e59802769487c6cda1d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s32.c
! f49cbcc89bfe0784d5fb1271e66bc7ae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s8.c
! 592a1baa32e699cdb4cd8191b37e331f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u16.c
! fcf07e05c6c7cc1ff0bb917215121d59  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u32.c
! 289a82e1b01bf0df550a6e7a594fcf70  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u8.c
! 4c88594b6c39df5887d379a34708a6d9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c
! 0f5ff001915ce91dc614ad527a2af378  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c
! f253585d611dad336a3fb96e7917c2a6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c
! b5510a5fd2a8db2f26a0a4deacabbd58  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c
! 54b7fef18a192644b989008e87f17682  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c
! a7440f04d9b29c1ee9649f896718309e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c
! b9d053230589331df301b07011735ff6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s16.c
! 5a3a62d997c519dfa70fe451ebbc2c37  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s32.c
! f6b54030f029bcfb05680b739b2bb836  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s8.c
! e2560c3832a179aca9df24db084c3b9a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c
! 3452d7fd086007812dce255457881c88  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c
! 6fadfe7e5048250222af938e48f6c6b6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c
! efb493ac171f66b7d76f7c254de84168  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c
! 7d6c03096174beb977d863ecfd935590  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c
! da30d8604ad0560130e65b7a33440c65  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c
! 2ec0bc22fb05296c00370b15d9bc7821  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c
! 44034bd1b4e9fc42fa898cef988d15bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c
! 383c93475cbe011d2ca4d148bad8fcb1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c
! 4431323cc7e6da8a21cf9e27e3b7ebd5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c
! 9fddde98478aa95308a4964ffc607168  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c
! 8e619348e3f88e3adfcacff19991d7cc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c
! 4c95638a28189bd90cecf77597092053  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u16.c
! 95d862feeded924eb1d65ceccbfb0e3c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u32.c
! ebb54e007658dc170570140bfa5b9fee  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u8.c
! 2274eb4c20218e85622e70b3e994bed3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c
! 5097f28a65881e89c854097ced394eda  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c
! d681432131915ab4b712770cc5e23a10  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c
! 082a92fcfa954dcf0bb6e8ea5780e849  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c
! 683592ff5798346c7f8a4604a0b15bc1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c
! 9ea225cb52ab1241245737f97acadad3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c
! 126b71a9d6e5e9bb66ed8de20c47a2f8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c
! 51408ecec9de76515f5a3342c25c8f1a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c
! 4dda679f93778aa3980df89fd6cb0aec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c
! 26077e6c72c73439993691ad76c24672  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c
! 13d87128323d651ba2e621c38f675220  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c
! 30101223eee72a1410c5f5a52f979fdc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c
! 33b52d0b4361747832b1027e259e47af  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c
! b8316257060c71a38b1d0953a111ecb7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c
! 840167449a83c8cddd585bfb22fcc6cc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c
! 0eb39f1790010af17b05fca8f2a77546  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c
! 713173d32e84dd0168bc26c7351ad162  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_f16.c
! f0967d98986d4b3a6c5c8177682cf2ac  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c
! 244ba1f5a0a0523a6dbf28fa01e8ff61  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c
! 579aaa9a58d9c868ee08238ee2b00c3f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c
! 39863ffec6279895943d6eb1a51775b0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c
! 07e8b6ba838e53783e62b3c8e43cfcf3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c
! 1b9561563dee067ddcc985d37fa8bc78  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s16.c
! aaf535acac7280989f80a9c5ba487a0e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s32.c
! 8b2c00413511959eb2786c491e884dd2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c
! d0755a14a8957d38bb6bdae17a955ed6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c
! f7d0f74a595bc8b786977a280ffedf35  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c
! 4c61596fa18d2e1c44d897c9527878c8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c
! 07040fc97cb8e6f924a5faeb73d88415  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c
! a5ef26ac1e63c189f1abcf4ed7502eeb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c
! d09b814fe5482e60c0d46e7bf0471526  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c
! 05b6f382925dcc6940f1e23ea88b353d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c
! 6136556dd25b8d6ec8871d55e654220b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c
! f42c18b535a2748d9380db1b4c95cf37  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c
! 1e9f3fe774640ec74e75dfbdc5206306  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c
! 34b21b14daaaf9159eb7aa09e7294a33  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c
! c1fc63142bac762bf668b4ce1c13b988  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c
! 80161f7be68f7396374bfaf8f203c8b6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c
! 069ab5f312e138d10f536195aeefe507  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c
! 0346ab67e32d96ab545bb61fd68ce71b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c
! fff9c777762a482fb616bddb54255d9c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c
! 97ea58ffaf340bbb73648badab0c7000  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c
! 5cffa4ad873f9be3b93edeb5de7656ad  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c
! 006d01ace8d5b9d7e0b5c00585c80762  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c
! c06edb9d6124d63a607ecf7981b588e0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u16.c
! a6a2f481f3ef1168f137b9699ec376f0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u32.c
! 1c448fc43dacaefaff4d2247aa4baf05  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_f32.c
! 8b75259ef55fbc7a4dbceda1b1045ae1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c
! 350d97a3528349f91afe4eaf99913e77  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c
! a3e105316c008f11d6801f57d807ce13  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c
! 33ff11cc1dcc8beb64ff5faaed26721d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_s32.c
! bdb431805164b33452417ba12b32840e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c
! 3bb616076aa7eafef47fd708e599de3f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c
! 579e84c24b89e7669a11e03eed7a7afe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c
! 6c689c07d564a7cbe81c5b18998df46c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c
! 2ac80b15b1f6c309db162245b1ca9c73  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c
! 24af861b7c533d785480ba5cade3360b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c
! b5975653dcac791939c36ec625e7874a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c
! 18afc17a226e4eff52f3818817006b38  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c
! 278ad44b2003a808e54e4c8fd3d310b3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c
! d7dac287217cceaebb1cdf580c2cf833  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c
! 6ddc160135f43f6de8b3040b447c2f37  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c
! 819f6fcb57d29201d48db2b996335492  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c
! fbcaa73cca4fdf445382e25102e77586  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c
! 0c140f435b3d9cdb8aad119291ba99c0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c
! de648d1ac5286bfedf3beecb0c8756f6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c
! 0c617bb9968e16ff7e663f483a14845a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c
! 68d42e142b9995b24149211d17716ccf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c
! 56dbec64553d1e27613cc5e82076c6c4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c
! 6c2136c44abcbdc028e6016b6f89ffa7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c
! d4160812405ddba08f31924ff68d9d03  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c
! 57ebbdfd7398cab05f6536481f23dd86  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c
! abce9fa40a22c2c5dc20a59011f7387e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c
! 69075023cafdee99d0080662970052b3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c
! d80c806917a7f12944ded6b73a851be4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c
! ee88b68d0d38d4a93bda3c89bedea923  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_u32.c
! 9ca5c334211f8a4df22743101ca51865  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f16.c
! b0c5636e9addd36efa9bee57f980d361  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f32.c
! 13fd69cbebeb2d3b51de366ede94c93e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f16.c
! de2d45fe56d675c94c9c7102d0469f37  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f32.c
! 870fa1cfecd057944f70bcbe2dff451e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c
! d22f274a7993cdc1fe8f3cf73ce92488  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c
! 4e932b45f9481cee6dc4771c74e3c7c1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c
! e1aed294cfa9acb60f34c3cbf5612b70  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c
! 0e273aa6076b72d7de642b79b801b75c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c
! 1daf0221453418a0f660c85e68c4eb88  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c
! b85c8a2e96d005a451ffdbacbc96cdb4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c
! ba85d7d880378f24a09d331582cc1184  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c
! ee420fd554fae7bf9152eb2be4630894  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c
! 8dea6f21e5d2da12529f0e0d1bf3a7c1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c
! a0368d94d8bec35cdbacc3625bfd4013  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s16.c
! c963995544b26f957ea897c641f56696  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s32.c
! 9d8e31829b484377c6233a8d8f9f0bb9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s8.c
! fb062ff24bf2736372c8ed58c3e101f8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u16.c
! b05e74746366ffd0b8447c9679d99128  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u32.c
! c7a51089b336b2d6af419c70d085ba9d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u8.c
! 6dff99b745a5088c0da8355aa48e8109  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c
! b02db63853e45a9040afc062d561bc34  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16.c
! eff932b1314a826b3305f16701653f80  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c
! 7be2d6fdb0a7b8b01dde4fdbed0c4dcb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32.c
! 15b8bf1988e87a0e09cf6dc300a6433c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s16.c
! 8592836fd192bfc03baf32b55676935f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s32.c
! d323fa4b38eef426ea70d5bdbd0e8873  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s8.c
! caaf2ee02ede57a30f46e30795f7b03a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u16.c
! c0741fa966ec8cb3607ef2edda292f19  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u32.c
! 35e5b6dd76b55bdd4f8c7a5ac4788eda  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u8.c
! c0a25d38514c7c909586157f72be39be  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s16.c
! ec4a7ef0d1db6eee50c41b55a29eefca  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s32.c
! db0b3a9ff7ce732782046c6875134c99  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s8.c
! 916c8191fa032494907729aa43716a75  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u16.c
! 36267a30dde755c615a9650fffc84b83  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u32.c
! 2295d0cd15facda9627dd4906dd08222  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u8.c
! 9dc41e812674d5ebf435d6ecf6c027a1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f16.c
! 625646e26902f4d7ecbcaf30e41a379b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f32.c
! ecdfae9dab471c7510b30704ac817db4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c
! e26759ef593ff162088f262a5e53e9f0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c
! c5463f57e474e0ee1551b52c786daf15  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c
! 8d0cf6e5b1e72f2364f34e7ebed670e2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c
! ce416b71d30727b2789b47ce92560930  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c
! 2dd613aefb9c1fbc791d55e0f12bf19b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c
! a78581ab7bea7dfa31a8bb37df0bf360  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c
! 5cc12580dba31e989c34bf104cd90c3d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c
! f3eb4b32af3fcdda945d5196906cc31c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c
! e3c29d80edd7131235d02512539e9f64  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c
! 855a79a197addb094b02a708d0f9b52b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s16.c
! 65172d86d1bdd9c1126948d6a5215f65  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s32.c
! 8426502360a32923a48343deb838ca72  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s8.c
! bc23d7c97ce5cd4d925d2584ba26e8d9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u16.c
! 7b89c0d503d807b8c470013ae87ac965  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u32.c
! 4f4647fda4b51e236989d04766be3f50  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u8.c
  23988252db151973cc6a8a718310f805  gcc/testsuite/gcc.target/arm/mve/intrinsics/vuninitializedq_float.c
  1b1caac6115bffedba10607ae46ecb1a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vuninitializedq_float1.c
  dd8187345c556677b24a6d6363dd2cf5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vuninitializedq_int.c
  140114add4d912efe3ae58837e07a2e9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vuninitializedq_int1.c
  f85ec28e0fec0a26395ea93637d74f62  gcc/testsuite/gcc.target/arm/mve/mve.exp
! c182f14c0ce0f393486f83ecb5d4dc84  gcc/testsuite/gcc.target/arm/mve/mve_load_memory_modes.c
! 93fa7d6fd560d991c8d38fc6f4c828b9  gcc/testsuite/gcc.target/arm/mve/mve_store_memory_modes.c
  1898761e9d8b35657c796620a30ff540  gcc/testsuite/gcc.target/arm/mve/pr107987.c
  a27c7480ff5cba860dda5da683bb3b87  gcc/testsuite/gcc.target/arm/naked-1.c
  292c423c2aa66b03398c922259527367  gcc/testsuite/gcc.target/arm/naked-2.c
  2d75e6bd9379b6e090e6104b97434376  gcc/testsuite/gcc.target/arm/negdi-1.c
--- 59088,59674 ----
  e6d94886301be09386ca599d57548632  gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u32.c
  9dba395cdb1523cef0790f9058cccdcf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u64.c
  cfb22723ed9dab5245a9330a48ab41b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u8.c
! ab9235e082c1220767517a978c6557aa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c
! 5c865f6181d47fe153a15672b16795ef  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c
! 4707f15af53ef82e4821bda8ac7491a8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_s8.c
! da46b5c91e2325463f02ab3c87112e21  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_u8.c
! 2a10ebc4236f45d9f054923606cbeae8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c
! 643b9c28010d6851cec743db4ae70170  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c
! 52e046ee550115c43c38cb705c3a56a1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c
! d7c76fe41fc0aba76bee104ee4ae898c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c
! 911a79ba2d27fafc46b911c174099dbe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c
! c6aff55ad2da4ad08e7f896a6455eb68  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c
! ae3e016193ee0af8d6df63111c1875a5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c
! bf68fcc843979630eaa51d17dd300738  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c
! ccca3b96cb905b25768daa2860894e51  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s16.c
! ce5056a145b220f67704612a2feec973  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s8.c
! 3b8b03cb3e84825a89f8818d8c73116c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u16.c
! 689dab0ce11a856c57fd86ba1e0eaa48  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u8.c
! 946d3b80b9c935e3ea5b3d01790b8f32  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c
! 615fba1bd8517d653577cdee646d3daf  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c
! 79d3ca6d93c4924f91f32a1990632c83  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c
! 351522a7697d83f6d1aec94374e12737  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c
! 330929e84fc35a4a60236f15b18ce93e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c
! 8f0fab2f0696c59e4cdd907748d0511e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f16.c
! 29061dab6c5af5c8fd3486d77f633c1e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f32.c
! 720efaadea5dd552dbc6ca21ec02132d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c
! c0a0011e1ec15a8109fefde742c0fd7c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c
! e7032facf022236de268bb70ab482fea  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16-clobber.c
! 29248ee985b34bd66648b2274f1654f2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c
! 57739965ba269894a14e6de31389bcf7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c
! 62e404d1c49a70124d9995725f7e695a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c
! f0f63c93d6e6ec35fd6d136afedd7282  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c
! d9879d4ebd86ff87336680a9dae5a322  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c
! 2bd1251bdab375b603c562d551a95a37  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c
! afdfdd289fdf4acfd2ad31b3e87b521d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c
! e11f05f4f086ba4dafe12357289839c5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c
! 4052b7b75431292c2197f3ff37af7443  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c
! 8f257884c44be7b277c9076f1a09b5ab  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c
! a8b012200c8fafb96a05dddf404cf2f0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c
! 7fc2d483a60db4396bc414c81992f03f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c
! 49bc92ef15940fbb56589bdb2e5a6a3a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c
! 9f2a7c5924f5f469f1ef95c7a9b377d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c
! 8b99cc5ea901c7a970272629ca15a0dc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c
! 80046ed93726bf58852fe99d3bea8baa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c
! 2ac403e706a002b9d4245c600729bd7f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c
! 9c282ff8830ba22d51bfe08e09bec527  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c
! e2b296bb5e0a0964028f2e2df9c654de  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c
! 26a7296bdfda0b015d35ace33ca29a36  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c
! 8c0fd7637ff956fe30b740297c3668fb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c
! a468e98fc3ced2a317769ba1bedb6e65  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c
! 22bf4382b6b48922159af51984fcdec7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c
! 47c64c4af9c1ea39e78fd8ab3f887527  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c
! de7034da2734574e09efbeb0147082b8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c
! 995e06bea7031345d1bf6722f5fac627  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c
! 91e3f996fa8b58e3369fed2bacf413d5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s16.c
! e98f08c6e745e7b6c1281801f4d2d6af  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s32.c
! 19fa3a9ce5471e97e9f9d3e7cd5169cb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s8.c
! a9f77bd623eae274efad5b588fd3ab58  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u16.c
! 83653db960f4224af21508e089bf5494  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u32.c
! f92b61842043d4126043e0eb3db1f95c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u8.c
! 6b01cd5da01e9568d9a19c2742b2e38a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c
! bbe76a495fbeab9b07888d1713fdeafc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c
! d92e7bd55d1e2d162bff0adc33fdd968  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c
! c1de850dd0fa4c875b113bc44c9907e8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c
! 8a822eada93d0a653861cf70ee8e7507  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c
! 39288e6b5a306ee8a8bb8e0aaaeabd57  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c
! 88b471883e65911961a28ec6a329fab5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c
! 6fc85f7c7c67c1f0df26b9ba41310235  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c
! 914441ba2ec01b97cc4d616e79a552ea  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c
! 0b9ab36c0a78653b63f8e5ddab83ef62  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c
! de6910504f2c97b6b4d64ec0265611a7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c
! 9b5c7bdc8dbdd19401117eaf0f533ee1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c
! 48049f1f4c2ab1ca5310b3d929d1af85  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c
! 03f331a3889ead9f4e41a0779f9e489c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c
! 9f8a0a074eeb7e540eb0080bd8635db1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c
! 4b2acc97c6a633f4326c37d2a0fc65c8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c
! a8ac8d9664106a8b1410168853ae4f4d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c
! 5b9cb4f3b1c3a714be3db3daadf27414  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c
! 28e49ca8eb272a7b0a66b422a49a493b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c
! 37d5ca86cd6db315280fbc7e9d48ba73  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c
! ab9621c5c43b9bb6708ecc7c75c2caf9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c
! 14ac8fe054fb1f0b68b65483ba3acc9a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c
! b0ab9eaeffa101b701e01bc76afe3310  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c
! 8a1ceb3b6228fc76d31d55ff4794b26b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c
! 23983711b10355902207d141e8126953  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c
! 4d6f82f6992a85ed7e364a64331f6739  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c
! d7fe5eedc52269a147ac5fb9d57a8a17  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c
! e24faef6c8e2afd63ea0c58eb349a8b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c
! c7d09343d04126ce6ec3fcc468ff9a50  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c
! c3e253af589d3f11740207ec1b833cd0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c
! 7152ba1bb24ffe7b612db861a16b55ce  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c
! b08feda659eae1b7a27adab6dbba7ff1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c
! 635a1fa4cd649862fff916edd1667fde  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s16.c
! cb5e69437f2f2218864e0eb63c1953be  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s32.c
! ce9f652c5446dc7bba3d418d23baeece  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s8.c
! 899484e5e18aa422f5e5dadaefe8a66a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u16.c
! 50d1027185213097c1f1231074de7f61  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u32.c
! da0baa9b9b6ab1644aad0415770eea11  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u8.c
! 837133dadc400502c507a2d8cc6167ab  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c
! 7fe6d7c2ae233ee75ac1a92651bf9b2d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c
! c9825cea84572622973796c3519bfd10  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c
! 76190ebea6353bf9e85d158badbf073c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c
! 27e64c476dbe9e774369adbb22c2c3ec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c
! 604a333d53059fed3eea22a06b75a561  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c
! d708d94fd613aafe3c3b0b7402e74b80  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f16.c
! 4de58249c2f8c2a059dc2379dfa7ff36  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f32.c
! 269fe0941fb8431a47237233f4910c9d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c
! 12f7d9fc5c528f8783d8ecae4b0525fd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c
! 32a61db362e665f108c083c19790da2a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c
! 196e42a5cc1619b31247fa2baabce7f0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c
! 33d5b70c4f54e3e40ff3a8a034844b9d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c
! 3dd3c235160284e251de6349ac4dbe8c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c
! 2f501c8fd1191761785514af0bf424f9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c
! 2b32ad7a6c8e34481e45f0120da0a20a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c
! 6986c209c0f79235120555910d68b6b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c
! 541b206e5ffafe242c781bce383660d7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c
! c66ef4864e7edc3551fcd133273d8395  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c
! 50684ac0df9942b35aec6a21ec25b377  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c
! 3fac24e5d430d2200666bff8f1b51961  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c
! b70a22b4f4deab38c355e0fa8bbcbb73  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c
! ceb4e6b9b6e334fb30024963a5c8b5ee  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c
! 67a1be58b1f43b9ecebca776c57905ce  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c
! 7d58d5560f1d8654957ee2e24537e9bd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c
! 26d36d52a40c5ea037afc5e773e2ce37  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c
! a04bd446ab7763fcf7646dc6fc5e49b0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c
! 14ce52dbf3aae107f744896e019fa1f9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c
! 8467fff2612207f9edc9b2b316b404bc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c
! 56c4db4fced40c66a04fb454654d6897  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c
! 535b52ee9da45a62004060699f136cae  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c
! 4ca3424d51b2fb6a8601cb565ab1c89d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c
! e60e8897f7d67d7032c59589a905fb48  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f16.c
! a3186676b294fab5933b37193040588f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f32.c
! 8ec147fde7cb7abcf5a61d922a815e3a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f16.c
! 374febed8a2a2f750d2aad0493463f39  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f32.c
! 5d497f830df851d324efe2436e74854c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c
! 225fb0205ab895cfd3f41fa2b6c82077  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c
! aaa5c81cac4b9a619e264a0593c467ed  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c
! 39658fb88c665de27449a558c4a1d0bc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c
! bf4c49d2f13fbdd748df1596d3f80b47  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c
! ce639eb2607d92dac4fd1edef94563a8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c
! 90fa8496dbecdd1eafc5a0c9f9403731  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c
! 73852814a308cc5c161fe3cb891cc8eb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c
! 54a2aaf7359e8e95c7e5acbcb5eb74a4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c
! 5e0867209cf1313e0a751f3ae726815a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c
! 1174456586e34b651f631b464109462a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c
! aba9ba9d780cf93fce7a320ba4241c69  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c
! 913e779bfa4f3416a653690d25ed86bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c
! 530feb5b175038443a82c49a1c4f80f1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c
! d47295e0b65f13b7120d4ce1f4501474  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c
! d29eb1d4b30559193ba1e114ff35f014  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c
! eac3c6cd21aea4e6ef3ac30b56c692db  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c
! 060a8c8b4f184eaca455a074ff2702f1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c
! 4d03db10c511fcfbab292b3a79288b40  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c
! e8cd287ea29a83003235f11e9470c0f5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c
! ca6b47e99ca1bcb1a0ecdd45823bc79f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c
! ca6660d4cc3e981b277ed99340b2b968  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c
! 9aa32f19bc669038d70721bcbfc1f70e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c
! a427580dc3a21069a9b88e524a9cd958  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c
! 73be7a58377a53d3b130a292127fd1a3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c
! 0853d1a10e04be61807c6e48831a4e82  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c
! a38e541fe24c87504e025810afdb06bb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c
! a0dbd2d6d35ee250aebc608596d57752  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c
! 747fbd06981bd5e755ae29cb6149e943  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c
! 226867cfd5ac428299e2ff962b6e296b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c
! 24048b619a9a386653f66b77c8c4711b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c
! a975c1fbeaa9693f3ca09a057cd7e008  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c
! 72ca491494ecf6aa061ef5e1fa68a007  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c
! cbfcf18be204f7678a28363a8bc9c3a8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c
! 999b62740cd4995931c90a25ba836848  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c
! 093171f11fb6e0df610738fabb482310  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c
! dec25b9a56cf92334b755346adf00d1a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c
! 570af9a877776c3627811962adf813a7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c
! fa5882c6d43d5c92372dd5394d60bfa2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c
! 89833c227e6439deaec0369a5aca272b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c
! 15ffcccf128498852605551a1b88603f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c
! 09a384d7e598bac62d75905580059af1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c
! 18e751da0115372e1d9342966a7ea980  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c
! a6b98f80c0ee8abead275ce6461d8ed1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c
! 27889c7112bc41543dd7e39b233b3d6d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c
! 4889b69261ccc77a8b805dc096ffde78  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c
! 7cb5bc093ac33142110b20bf9d9a125e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c
! 185ac5cdd29b0d825b80ae7c73c34c73  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c
! a47218a680335e82240426467e54877c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c
! 22a334b61c24e7045aae0c8048d8ce1e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c
! 87e3b9bb6d7d659142e368e7e82fb630  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c
! a4bd7ca8b01ee9e8d389d294d99dbae9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c
! f916730a06eaf339be0e856ef22becfb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c
! 6b824213c294d061e8eb5f1b0380d044  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c
! 634dcdb1492d77bca4611053382a9f8b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c
! 3b7299f77e24e10ae48ab53adb56687d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c
! 55148c912963911b92330530e1dba9fe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c
! deafd73348a80de22aee10ad49534118  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c
! f029da5bbacaa3df122fe5d7442b1c77  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c
! d8edca184161819938931ac19140d2d2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c
! ff59237a577eceb302f52d6241b109c3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c
! 8acde0c9e57103dd359d0ddc60e14056  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c
! 720932db64d5e98a92f4ab9aeb546d8b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c
! dc5e35a39aaf103da597a6db6ef2f1ec  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c
! a9b75a064fbf1c7fc95ede847a5f40e6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c
! 70f13dff2c8f45d562729aedb51095c8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c
! e6127bf0d3fb31f48bed77b02ed8f1f5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c
! 7959a5ad36a5ec8255be8d3f5324c211  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c
! 574710306f0c1fef67987eea72857ac8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c
! 8132e2ca265ce004587e039a141b4974  gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c
! ad0f72f16f1436835769ad26f4554b5b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c
! fe4b54b2c4e751934615b7c2ebfd87cd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c
! f2b889d1844a15b18389534c4050fd3b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c
! ed711f516d90a10c0e04b55f40a058fe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c
! ebdd95c269725f29eca9fc3b97387639  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c
! ca52c00cfc4d381347a72cc0537d242b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c
! 32ac4e99d3a75fd2ba034770da43b82a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c
! bcebf037f5b6ab7823dca5d075ae0207  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c
! af70db4174c1713b590a6d5ba294aa2d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c
! 25befadfa1ca09ed85081c818a46c071  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c
! c9fa67c20fec9ef097315c2e0664eb2f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c
! 0e904d54afafee544aac46db74a0fb78  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c
! def367f33eb6f2d3b377c08209d4e3ba  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c
! 8260100dce01c5f54338df06aed56da3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c
! 3aebb2229ee3c92f32168bc434c06dcc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c
! b6849ec20ab5271453eb6a6910746ff2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c
! 770546f9f98bbba226ff4a00ebb7d508  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c
! ed0f72d390ea11c3168e5e335bdec21d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c
! 43bf3461554f8584a060f10ca2b64b30  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c
! 90cc10b3fc55e08237e3835d79ec63d2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c
! f4a3da6eaaa7a3e3bef7efe2a0c4d05d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c
! 13f4763c243d9ce947d19985b4b2fb2a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c
! 97ad71cce11dd6f6d43c9ca15685a3dc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c
! 5f61820b4367ceedb91389f865be8a25  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c
! 58194f81a18044808e5947961b15fbd4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s16.c
! 354732896fe9d6d200fc0258de99f2f1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s32.c
! 4a4a77d58877de9f2da0a9e55251cccd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s8.c
! f4ea34eb377007af578a1a11bda713df  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u16.c
! 65be7dcbeefaddc6ca97c01d92f5be00  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u32.c
! 31ae648d3ec555f9ee1ad7bd01059f7b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u8.c
! 20ae31f54acb2eb58b348318982912d7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c
! db172337dfa89796d96a0d617e39c5b4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c
! 3ea150e1a6382f955bbdb937af5ef5f6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c
! 5a9c7348513962cdf615ffd985c0238f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c
! a581e7c8a40331a8900634a9122272ed  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c
! 3fc5bb6b9da42903a3cdc0a6bb7502e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c
! 949179f951d76eba724af5652d839178  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c
! 0e1e3673ba09ca24e5fb127cc7f0ebc5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c
! 942f065866028da1dff1666b8cd19518  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c
! f50d362feca87c6eb11a303a4d4063e9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c
! b0f05c3a577cea78b571724b2db56651  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c
! a6c4144fda007ea8c5114de693e90b80  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c
! 1a89c1efe9e1548ca7f3a84eae069d70  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c
! f7d36aa8e45157d3db39e8709ed53a81  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c
! 5526fd989a3e255ce98cef9966a3326e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c
! c5498534046a0dee84f79c67490fac0d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c
! ba8a82065d28160517177b931586143a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c
! 902185894a2ea36444108920b992ad1f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c
! a4c2422409715e2b3b6101f1c930ae93  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c
! 2652da10a24f1543c13ddcd38840c2a7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c
! 6704b1e5f443f0cb9098b11ef90943c3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c
! fa531036729b1b906aafd880d95c92e5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c
! 29eea75587755876f1b45924c8307e79  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c
! 389082b74995d993b4edc61c68a86205  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c
! f5442649d98aab5110b5f75cacb54c92  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c
! e55bc006d3ee114e91e02ca3253177f4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c
! 66395a08e8adff4c6043909ce45f5ba3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c
! 1a434efe8ba381c2ea83fbd3e0f544ee  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c
! d917afe7da76e1beebc2ae571a3616d6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c
! 91accb6205de7063803aaf48e094ebbe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c
! a8d39d9b901bd82cd9293009c1e3644e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c
! cdddceef9c79ec2822d6c24af379b61f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c
! 193e32b2ec9bcb81d9d26a23ee66d7fb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c
! 06a7b0c7027234735be568a263410f2c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c
! 089bcad82c75498001c7027abd4432a0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c
! 3ebc39066d8aacf5cdd299f260a5f1f8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c
! 5e1f3ad6abbff9ef691c3c0702dbcffd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s16.c
! 39e72e654fc87ae02892eecb289baea9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s32.c
! 92823334d9b056cb346a3237ca3ea234  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s8.c
! f53b7ca02f70e3e1657cb9d57cd1054f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u16.c
! 9259b252abbc1cf63371cdcbaf10d608  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u32.c
! ba86a7d4639905f5d537baa5596bf851  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u8.c
! 765821465648f48b07c99add06b945f8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s16.c
! 97dccfd44f194bae4d58a1e785217f7d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s32.c
! 3a1d90e129de5e232eb60d1d6f5a6c71  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s8.c
! f912390cb51f8837f5e05e48ca4ec7b0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u16.c
! 2346c8af74ec266e017f19ea3b8a4b34  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u32.c
! c13de3d414beda58f7a9cc165385c876  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u8.c
! 18f402513cf4c9e0d0645304727e8b21  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s16.c
! d5cd0b6d76b09122b286a9165485e2f2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s32.c
! ef34f80f9523f98d4f529a985db33f28  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s8.c
! 3b1ea0aef9be8070881e75ded8ceae54  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u16.c
! 1418bf92ecf75ad25c9f4588b737b97c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u32.c
! 4417580047e59c95e983d2fa122872f9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u8.c
! 242a3bf1607a86a2acc0ca6305ab42c8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s16.c
! b8bdd0e0c2c4a61a96fea978081ff731  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s32.c
! 0994fde3831e0f4990dc5c4cb7d8dcb8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s8.c
! aa06842c31b7d30b022a4045de981f13  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u16.c
! e71eb8e605f77c8174673a289e47b179  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u32.c
! 5cdc3d05317e1d9601086eb12ae5e31c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u8.c
! 5c80fe0ff294cdb60360b1ab5b99364c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c
! fbdd4f47b18a51b77c8a5f98d341751f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c
! 437331f94c582228ae810fb24d9b2465  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c
! d37f52d7f431d7f1e403afcecfa385de  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c
! b590f46b02e399e5169e0f6c02ad8ae1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c
! 1fb003bb7885b6fb89f66f445bb1ffb0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c
! 1911957d4b38be06e6dabd89cf178f75  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s16.c
! 97ab9c95a5db57abed3d2e444af652db  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s32.c
! 18e2cca70cbc49aac15359cced409d2e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s8.c
! 702eb3dde27f926f4105b1fda91510e0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u16.c
! 1fec07d354995b1bbe3335968a192da8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u32.c
! 524c1dfc2e5ea4e5783b9df523dbea93  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u8.c
! b082f618ddfeb2c3657846feac838049  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c
! 878d1c920009fa0532707b691c4bf081  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c
! f7fbfe806565618a19a241b9bd27c5bc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c
! 2a8d0e1139a41b47fc755358ffb0798b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c
! 0c518bdc0c1ca7da147231208f06378e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c
! a278a968ecb2d44fb335657a1ec7ecbe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c
! 442b4f929737c345c19312e5f1da7db0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c
! 7076689fa033cbdb5242f57d57a9811b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c
! 8cead3f3cb35e322ae8485367bc24679  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c
! 5096752fdc369a2f8ecc0caef5c80876  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c
! 27029075ae670006413bf32bf43eee04  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c
! 2ebc05b770fe72a9e363465bdb1683c7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c
! 7a224af9ffb20317ddae2ded031cddd0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c
! 13fa5cde0b4b11a2593936ba2a5e09d1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c
! d8b2138e00490689bdc41ebb85fa6bb5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c
! 875608e6235d3a60a93acf9b59de4b92  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c
! ec660586a5a834fc36ac0c8bea22d60b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c
! 5f66b0d682581077895df4125f6f5096  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c
! aeec839bd28d86a20b75bed6fa4815c0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c
! 532fa3e11c1b0fc63376aaea219f292c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c
! 8de9ae8ef26a0dd76c224bb3e08a8124  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c
! 35fea098303f54067533bd1d9ac5072a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c
! f68bd35a30466677fc410b20e309361f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s16.c
! 9579463c0420c4038e124cb2981fd8b8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s32.c
! fc4c1218fbb6bcefb368c42ec20cc6c6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s8.c
! 86d6b17ebbeaa53bc13a6df6dc79862f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u16.c
! 94470791f33b1911b98fb2f9df5c2e3f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u32.c
! 610d52f5d3e332fb340bc5bf70c232b2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u8.c
! d4f0bc6244b99397c3d8b4ef7ecdd108  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c
! 0be9acf5a7a25b572962ae36fef6850c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c
! 8b16f14f1c3691ff3358963f262abd5d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c
! 25f6ac56d3da7b5c2390d19c2cc2909b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c
! 47fc6368b4d6fe5cf64bb6b1490a4c81  gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c
! 5a935a0b0899c4bd97ec9fa55a353419  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c
! eb6d7ad2ea3ed632b97b8068395d737e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c
! 4b6dbdaf544925a348453303f96b119b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c
! 5e3851b019babb22d81bf621f65bdd4e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c
! 91124f4e895575563d90adaa814fcf9a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c
! 1072056aa889cda5ca8c7b2d008ead5b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c
! 1247c4e6b2e1f9b16cc60c3c6941d5d3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s16.c
! 457d9bb7c448f807250180118623971c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s32.c
! 9003117b3a6295875e0d16dfad3eb580  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s8.c
! e00b6e3c4b31819bdfa1784a549c7098  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u16.c
! d7da867054905b6a8a33f3733333a624  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u32.c
! a87d1c2ce919708f0318965448fff43b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u8.c
! 00bdbbbd84a597bd7df9c64ebdb342ff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c
! 239f1d245e10bdbb4a5ccb3062a5fe31  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c
! dd42e08253e8296e0ecadd0bcc8a26e8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c
! 629aec1ef3d64bca48dd0d47126e4d41  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c
! 78b3b381ad64a7bbf9347128a1650f7d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c
! 02002dc1cbe707198b46a71d4e436e83  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c
! a784171370ee888e8a7d32d5bb1b2379  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s16.c
! 35bfac1a1cd716611e2c723245030d5d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s32.c
! 6b16dc582762960afa22017a5a923b27  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s8.c
! 8715b8892906cef64d0686fae26d5a7f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u16.c
! 3d126af6c85e0923c87a96cdac83bf77  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u32.c
! e827108f7e891623e4d78420f9cffec4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u8.c
! 5ba39740a461cedfdb4daaf96f9823e3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f16.c
! 18f4b674ba45a97d973654ac6edbbfed  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f32.c
! 0724d6e806dad6a0671e1e1030632af1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f16.c
! 5c93964a36e41d018e4b079091f17f88  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f32.c
! 15331b6bb19d2c8bc7f58e1103b19ef7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s16.c
! 56710724c52d4ccaefe8311e21838e82  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s32.c
! ec79b84bf99c471ebd242745f05d7081  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s8.c
! 02dcff2fbdbaa32c11780a228054a19b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u16.c
! 716955523861c2f2fc924f3c6da4599b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u32.c
! 6191b75197c8189efa5e192e5ea09d57  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u8.c
! 5c38761e7e527220b89b98d52a583c1b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s16.c
! ccf3e9b150afef964784c2c636ea4eb4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s32.c
! 9c553d037e45471aa0a94eeb03ba0241  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s8.c
! 634c38ef2a0a9d6bfd11540aff5a0b6c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u16.c
! 920ecbe1ef74c2fde2616df4ea17706e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u32.c
! 4d80fe3bf218f76fbaaea0f71a706b80  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u8.c
! 9f603e079fab043b8c08a8786bf24e8a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f16.c
! 41daae8e63f53762def00088b3df1d49  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f32.c
! ab8fe598ed86f6cb119a3abc035da277  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s16.c
! 000c50019cffb69fba16d4cb23828438  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s32.c
! 39ae1583a3ff3bc5a606757a8df7ff1a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s8.c
! 9ec8dcfbc6c1ee2dd8732f7366287d38  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u16.c
! 30704c51ee061acbcdc08a921da70646  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u32.c
! c8af6e488934cd8d38e647c50b1b722e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u8.c
! 67b07fc95f73ffe8a53a06192c6d4a77  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f16.c
! d2150ee33ccd5548321bf1ce5585f56c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f32.c
! 253cda0bffab825189e26add3f7f7d0a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s16.c
! e53a4a92fb76a8e8184abe96f1956f72  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s32.c
! 148aec1983dc44d313abdcf46b073789  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s8.c
! 30e1e97a73581fc564eb36355229d209  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u16.c
! 697fff9f51c573800a826c06ee588841  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u32.c
! 8588dde66548b9679f6ce9dde822d6a7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u8.c
! dcd3d2a9fd1d7f61a03bcb14101f005c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c
! 10e0f1d8e63a27cf8d39d6c863ef7644  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c
! a748bc084d3eccfc6b6578ab7254c0e8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c
! 629dcbe5c7ac0ed0e29b62a8eb2ac376  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c
! d0187a66fe25fb9032bc14678f74da4f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c
! 4f1240fdde118314b5b573330b909531  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c
! 86a1134122a8f4288df5181cae382af6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s16.c
! 99df8b4d2ea722f3c4d7deb955c136fb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s32.c
! 24643a8a18ca219e5928816a31ed370f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s8.c
! 5ec0566b8d38ffd15dad48e20b9164d9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c
! b6053063ceec316f242efc7d8b2f46df  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c
! ce5f0e7949a5b711759cc0af3bd99fd4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c
! c8f82c715326cc5f259d70e8d6a4f957  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c
! 255764b44217d3d9687320a2df4b6606  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c
! 0267ac925f0460ea5f8b5de8914b3295  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c
! d758ab4d949ee6dbd1e354efee36ed89  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c
! 17c7ee21a175689b193d951e6f72e282  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c
! 7f7773764451056d042d9d2a50d17115  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c
! 66ee43f2d76f0cfb4926f0b9efcbd791  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c
! 820488bbfee500a3a28d948e7dc1cbdb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c
! b5633a4ba10b1f283fc453a28f481757  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c
! bb5d4fb09722d51a32e1cf47fb1dfbc8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u16.c
! 6d5a2372e6865fa59fb5dedf62dc82fe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u32.c
! b3082b6d93cda945a4ef6d5a4e06f6cb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u8.c
! 32937e0d4baf85baeb781b46028c8360  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c
! 5d00d77b0cfc7178af3a58ecf10ce094  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c
! 400bebd4af9dc6d6e930dc69927559a6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c
! dc9bd9bd2253478851bccb103863c2eb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c
! af7228086b1ccb840d26936205367104  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c
! ed2dad487c90f7a47302ec3eeb9cee1c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c
! 0a833374dbc3be242f6cb6db4a689e0c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c
! 535615dbb45c3e523d045f54cd34e791  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c
! 925beb873b67c184a3f50f47ed94f067  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c
! d75d7a66636c48d3c997e15715f0f461  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c
! ad23759aabb74933239c1304edafc0b5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c
! 9d104e5acd40f8ff3d85ece7d5f6e167  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c
! 0e453ef42e51837489753234731d3d5f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c
! 27d8d7ca9e2cccc4844b25d0683b521b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c
! 4c51a9d9a6b657cb0598505119f71db4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c
! 1553d63329d86530d40a611027767f95  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c
! 1762dfae4788e87a844f3dc033966c02  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_f16.c
! 741973b3b602727b8a74fae8a4c37691  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c
! f575e4de6ee88fb04c09b44b0e6314d5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c
! ea143fe367f84b559511adf2aa2dd905  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c
! cf4964ca92c181cd715b8f3febe325ff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c
! 0bb6fdc1ed4b221626914b5634da01b3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c
! 895d67580708c3a3def8883ee236b3ef  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s16.c
! 8dd236eb85598db7f24b949b2c77c638  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s32.c
! 945fc8ca1b3f39b65abed50c9314d548  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c
! 11788e4a982a2d52d746b5e9ebb6237d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c
! 26b377a7f3cb830dab35560d3c5f180a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c
! f3e7144bd94f046fe97175431d184f84  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c
! 9a834b112222a520a5093b56e834f515  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c
! 2795b193747693cbe9798e8dce7c608a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c
! d47181645a9238eafa3f70a6b1446438  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c
! e254524702795aafd8a59bef983845a7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c
! 1fdee58873b1b5a1fd37e6ce713163e8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c
! ed3d2b5cbbb2d72f60539cba48bb8ec5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c
! 309d5460a6fa94899f7bea118c9e9a65  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c
! dc912b13070ba709b4d886bd0a9880eb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c
! 4ffac81e22ed649191a3b0a98b9e9fe1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c
! 1833c8f8536d0e205c05ba68fb26ec17  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c
! f8f059ad49124413ba1a93297d906f1a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c
! 22180974ea2a86fce1b171314582f29a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c
! 504bb29dd89c62281b2aebd233c37bff  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c
! eca9db52151657585a5ac5185f6ff0fd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c
! 7d989d56885a8accc8a515f6ba236a25  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c
! 38c49b0a88b21ba3ab1be320f6c4860b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c
! e7177e70e520ce41f6a6561762d2e530  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u16.c
! e8cf2cbe760bcd3771b8561c9dc6f5c6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u32.c
! 147a8255930e1be4a7b823e6187f4251  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_f32.c
! d5522736fd59b91b84d81a1b708ca557  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c
! 7b885be548c8e5af7fde094d95a7c8f0  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c
! cf1b197cc92d4808d9a38606d168d3f7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c
! e460637354d06d6bda46507b4718cf84  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_s32.c
! 522e14c9d1a58960c73b8a4bfaea6780  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c
! 233840efca2447b8beaa8ec904e61054  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c
! c3462c7446a439d3a04289e10a894a38  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c
! acfd1cbcb0e753d4402a931dff08cfc3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c
! e0f5f7cae9f727e3c2ff5da6338da179  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c
! ec7ac24d8f7501f2ac2bb6f633220df3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c
! a3ae9fc914ba5cd264542a36e05237e6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c
! 5d647b02b26f84e19a190a3c8b7cac0f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c
! fc4b3547e63083746bfe20c5c7b57e94  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c
! 9759459790b9b4f440eac221bf16759a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c
! 303a0445fcdc3cb5107320597160b0fe  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c
! 6079ebbc3cc7c96212f962c4140c498e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c
! 942935e3d3e39b42c5cdd44e78322b6b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c
! d5f939a756a71bbe4056612098f04246  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c
! e83960df986fb9583a44bc531f5648ed  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c
! 673b0ded1c7ae4cd3d795f1b027d089b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c
! d203151d0fac672ddc69b98f5065fe69  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c
! 94126341b4b0c0cabb6a8b92dfb531af  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c
! bd3a7088dc8add984f2821cae6840298  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c
! 968794400bc9e6c6ad1e281a2a9263a6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c
! b6648e41550cfa8ffa67ff6809603c3c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c
! 340ee6c0dfbd14ef1f00e8579d9e3ebd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c
! 4e60eeea36ab55b3b4347a11d9984f43  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c
! 8bb4176acb6b90a69fafdf1d64ed707b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c
! 3227bc9e0332ccb3fceca03d419e0899  gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_u32.c
! 471a4adf7f7f6c36a9f8dcd63d7c9f92  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f16.c
! ded2a903704f5d207c652909ea0350c9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f32.c
! 7213a728fcca543b05dc9327980fbae4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f16.c
! e39321e0b472a1d0883477f46714b5aa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f32.c
! 6cd682a33a3cb3634657d4d35e5c092c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c
! bf9a09ba7d7a53fcd050240228cd81aa  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c
! fb3d0405f709d2f0cff12e63ebf909fc  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c
! 8b3b3c606ed54a9dcc86656050d113d5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c
! 2aaef508f39d664157faa58be2f3bd0f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c
! adc6c0b6b4f6ddc7a1d7a848f5307f79  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c
! a254b4fffb6f5659777fcbeae8b28c4b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c
! 32bf6e95e53dc6059f7122f491091b74  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c
! a1e90c41e4df6782cd128a6fe60eb2d7  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s16.c
! 07f374800c87c54b1c2a8e29b2426e9a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s32.c
! 2118fd682832feff2d22f6c1e68066b8  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s8.c
! decf453aca47327414fbfd1282d608ed  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u16.c
! 24b8547f6e44b9b2911eb48252b4715d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u32.c
! d93e32efac0770473efbea5f92a0392b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u8.c
! 03cb6e5f824eedb67a4c0ad3051a5ab6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16.c
! fc7ba2f90b23e955ed6ffcd86bd02024  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32.c
! 72a9988251b35edcc450179eab3458f6  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s16.c
! 438826f012e905b3d1b0b927c41c69dd  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s32.c
! 5ce198c7b18e64310e0fe62fe413d47b  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s8.c
! ac6f04beab039970433d54816c3bf7db  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u16.c
! f4b6e217fe00451d68ea62ba330dd2e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u32.c
! c44d4e9f9fbd545079fef0c92755a2a5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u8.c
! f2ec35d42bad4aa445f478ec642596e4  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s16.c
! 9d48f95ab3c512c68d683915d86eba25  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s32.c
! 98283c87773c5204b8691b3ce195656a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s8.c
! 3d1a918e2bc7fa31b200e48ee632f5a5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u16.c
! 903ad637a9d226f2c46d4665f3321ec1  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u32.c
! 8abb1114e8244c7289232845fb2ed40d  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u8.c
! 36a0a968f1828e7f62f2a36809fab06e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f16.c
! ea14dd53b1ffe8e6057e46f654c9cb0c  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f32.c
! 05cbdb9ab15c18642df26eeb98c957d5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c
! b9616c7124d80576d4dfed487fa7c12f  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c
! 66303105114a02d78e01f0015a0e599a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c
! 1d221416840159088891d621950af69e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c
! e90d5bfd2c2c44608fbffaf1d0e8cbc3  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c
! 57ce910c88953ddaea465c82a6376de5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c
! daaddec480b813989fdfc9e180109518  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c
! 4901e8bd828e5d2fc50fa11043ec7027  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c
! 14eb11a144aac1bb3d40319959f0c7cb  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s16.c
! c7072a4a61f117743e2c39a2f956709a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s32.c
! b1adc092a1225c3bb16d4d9e7b94927e  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s8.c
! 55244f358fdaa7b0bcd702b059252b92  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u16.c
! d5068cbd7a08c2cb2252064ce7d7f5b2  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u32.c
! 45314f792a92d8327d850713b7f244da  gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u8.c
  23988252db151973cc6a8a718310f805  gcc/testsuite/gcc.target/arm/mve/intrinsics/vuninitializedq_float.c
  1b1caac6115bffedba10607ae46ecb1a  gcc/testsuite/gcc.target/arm/mve/intrinsics/vuninitializedq_float1.c
  dd8187345c556677b24a6d6363dd2cf5  gcc/testsuite/gcc.target/arm/mve/intrinsics/vuninitializedq_int.c
  140114add4d912efe3ae58837e07a2e9  gcc/testsuite/gcc.target/arm/mve/intrinsics/vuninitializedq_int1.c
  f85ec28e0fec0a26395ea93637d74f62  gcc/testsuite/gcc.target/arm/mve/mve.exp
! 0d8124a63664354decc1577f5a019490  gcc/testsuite/gcc.target/arm/mve/mve_const_shifts.c
! 844c3ba72612fb8dee47abb3578cbd7d  gcc/testsuite/gcc.target/arm/mve/mve_load_memory_modes.c
! c0dde028cd8e5d714e98c74caa23c249  gcc/testsuite/gcc.target/arm/mve/mve_store_memory_modes.c
! 2790f5cb934844b57568e7e66e5a5077  gcc/testsuite/gcc.target/arm/mve/mve_vadcq_vsbcq_fpscr_overwrite.c
  1898761e9d8b35657c796620a30ff540  gcc/testsuite/gcc.target/arm/mve/pr107987.c
+ 8058f9e4ee7ad1cb4b0efe6e1d8aeb7b  gcc/testsuite/gcc.target/arm/mve/pr108177-1-run.c
+ 18b66b86396a77e52292788b53ac5c56  gcc/testsuite/gcc.target/arm/mve/pr108177-1.c
+ d4888bb5470cc8e841906cf352acfaee  gcc/testsuite/gcc.target/arm/mve/pr108177-10-run.c
+ b581ff0935a4a8493a7be8abf80ca6ff  gcc/testsuite/gcc.target/arm/mve/pr108177-10.c
+ 4cebc2938fd99646970ee58873a08cf8  gcc/testsuite/gcc.target/arm/mve/pr108177-11-run.c
+ a3b8d3361bd9a9c167bde9a1072d08e0  gcc/testsuite/gcc.target/arm/mve/pr108177-11.c
+ c97418d1de344e87d2a32d1d548865f5  gcc/testsuite/gcc.target/arm/mve/pr108177-12-run.c
+ 8328ac8783fcc3488df6b0ac74434615  gcc/testsuite/gcc.target/arm/mve/pr108177-12.c
+ 1fb2648c16488120fe3f79c55ecc1049  gcc/testsuite/gcc.target/arm/mve/pr108177-13-run.c
+ 5408542b917a2b1131e5f7a50e15ab19  gcc/testsuite/gcc.target/arm/mve/pr108177-13.c
+ 8c6f4d19c2736cff6c9f4b0d7573cb18  gcc/testsuite/gcc.target/arm/mve/pr108177-14-run.c
+ bbad71a21b8061627d65640773b04692  gcc/testsuite/gcc.target/arm/mve/pr108177-14.c
+ 01e488d66d7c64d44799e15dacff22e8  gcc/testsuite/gcc.target/arm/mve/pr108177-2-run.c
+ fa51ff1a793ae03048179dbe1f20b2ab  gcc/testsuite/gcc.target/arm/mve/pr108177-2.c
+ 4f8fb5095d32450e4cfbde06427400b2  gcc/testsuite/gcc.target/arm/mve/pr108177-3-run.c
+ 42b3f5f4e31d4e3586aea9364aece201  gcc/testsuite/gcc.target/arm/mve/pr108177-3.c
+ a5f1ffb8a251948a8f91991f325e73e1  gcc/testsuite/gcc.target/arm/mve/pr108177-4-run.c
+ 05af284b266755ad46cce79b811c75f5  gcc/testsuite/gcc.target/arm/mve/pr108177-4.c
+ 61ce38cbd541c7c9907992cd627caa47  gcc/testsuite/gcc.target/arm/mve/pr108177-5-run.c
+ bd1430eb5f799a9dcd32747762779768  gcc/testsuite/gcc.target/arm/mve/pr108177-5.c
+ a986dc74593dd8b1b30ec0f6ec21e57f  gcc/testsuite/gcc.target/arm/mve/pr108177-6-run.c
+ 431d007471b4562e791c4f73a978ef74  gcc/testsuite/gcc.target/arm/mve/pr108177-6.c
+ efcdc8f46585b58b3d99208ff8223886  gcc/testsuite/gcc.target/arm/mve/pr108177-7-run.c
+ c31555642b2ce9dc8924dde3dc17e42c  gcc/testsuite/gcc.target/arm/mve/pr108177-7.c
+ a5a909cd9273a228e889803838c59364  gcc/testsuite/gcc.target/arm/mve/pr108177-8-run.c
+ c6504123b346e8b55523fa4c65a8086f  gcc/testsuite/gcc.target/arm/mve/pr108177-8.c
+ bfb42861506a8becbe4e801a6916b724  gcc/testsuite/gcc.target/arm/mve/pr108177-9-run.c
+ be3211364ab68484e27dc759e0f73f8e  gcc/testsuite/gcc.target/arm/mve/pr108177-9.c
+ 3b5b52b7462c96502cbd244f99969b24  gcc/testsuite/gcc.target/arm/mve/pr108177-main.x
+ 18522c58df95c4bb74f07216f5d84eb4  gcc/testsuite/gcc.target/arm/mve/pr108177.x
  a27c7480ff5cba860dda5da683bb3b87  gcc/testsuite/gcc.target/arm/naked-1.c
  292c423c2aa66b03398c922259527367  gcc/testsuite/gcc.target/arm/naked-2.c
  2d75e6bd9379b6e090e6104b97434376  gcc/testsuite/gcc.target/arm/negdi-1.c
*************** bce9be46a9e956c5fcc66bfb68691f0f  gcc/te
*** 59601,59606 ****
--- 59688,59694 ----
  92d7537f3966988f20d05b94977b3beb  gcc/testsuite/gcc.target/arm/neon-modes-3.c
  4e0cca6bc39f2d3cecf9ea72ec4b0d52  gcc/testsuite/gcc.target/arm/neon-nested-apcs.c
  7783093cce901b3a47068de662227a6b  gcc/testsuite/gcc.target/arm/neon-offset-1.c
+ 2f0d808ded25a27c867026ac6296d1b9  gcc/testsuite/gcc.target/arm/neon-recip-div-1.c
  1f48b8fad239c5f29804610f9f08ce99  gcc/testsuite/gcc.target/arm/neon-reload-class.c
  79e2b86f1be68bc1014fb6b480d5322f  gcc/testsuite/gcc.target/arm/neon-thumb2-move.c
  add75049520bb3c0c677317469ccb57e  gcc/testsuite/gcc.target/arm/neon-vadds64.c
*************** ce2ea998f70f030c1e5c5cf0f3536bd7  gcc/te
*** 59692,59697 ****
--- 59780,59786 ----
  ca03d4215dfd4e98fc1d17e6890fcc4a  gcc/testsuite/gcc.target/arm/polytypes.c
  2f719adc3f3e3724629a17daf9bb2e71  gcc/testsuite/gcc.target/arm/pr100775.c
  b78ed4b32814a22ad0cf1f46aee89cc8  gcc/testsuite/gcc.target/arm/pr105312.c
+ d59d090be25d48a18820542cf3abe1eb  gcc/testsuite/gcc.target/arm/pr109939.c
  03b84ccc5b909e6ece59f619e9298211  gcc/testsuite/gcc.target/arm/pr19599.c
  3425143e88f989a8f52f345e6237106a  gcc/testsuite/gcc.target/arm/pr26702.c
  fc0dd660f56108005b4f0b142e94d10d  gcc/testsuite/gcc.target/arm/pr37780_1.c
*************** a13d496741ee33ca9436673eb16995cf  gcc/te
*** 59886,59891 ****
--- 59975,59981 ----
  9d45085f81b933f75aff02b4b174d596  gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m0.c
  be0f627c9760e72ac531303722e2aa4a  gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m23.c
  7b8330d6a4b33ec1ebe3d2b0ac6a7d6a  gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool.c
+ 3190f6ba1fbc57975b5a58d4d43de120  gcc/testsuite/gcc.target/arm/pure-code/pr109800.c
  9ae88bbf3f56f1b4e53964c0b9d80766  gcc/testsuite/gcc.target/arm/pure-code/pr94538-1.c
  73846ca40ff67281debec0e317b1f8d5  gcc/testsuite/gcc.target/arm/pure-code/pr94538-2.c
  4f35b9cdbd7f36b52519b9a78b06c4d6  gcc/testsuite/gcc.target/arm/pure-code/pr96767.c
*************** c85c6e997259bc6ea785859ca3cd0503  gcc/te
*** 59921,59941 ****
  86a910fbea8e786089563912a699727e  gcc/testsuite/gcc.target/arm/simd/fp16fml_lane_high.c
  ce6bfdecafebf5d96e30584ac5bde11f  gcc/testsuite/gcc.target/arm/simd/fp16fml_lane_low.c
  c7ef3b93e6ead3d17a958c3c299e8b73  gcc/testsuite/gcc.target/arm/simd/fp16fml_low.c
! 6c7c4c225924663f715da299cee5e6a5  gcc/testsuite/gcc.target/arm/simd/mve-compare-1.c
  5dcf4e932871aeba4c1b9a49be403bf6  gcc/testsuite/gcc.target/arm/simd/mve-compare-2.c
  79ad4702846317f8676e19282166aa0d  gcc/testsuite/gcc.target/arm/simd/mve-compare-3.c
! 62d1f0ad9e655a68d6ecbfc7124a6aa1  gcc/testsuite/gcc.target/arm/simd/mve-compare-scalar-1.c
! b65f0b51ef899b937b63abf1e3405106  gcc/testsuite/gcc.target/arm/simd/mve-vabs.c
! e5b4125a24ef0a7243f3e53f42b055dd  gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c
! 7deef803acc8b6bc6851bf5caf65c977  gcc/testsuite/gcc.target/arm/simd/mve-vadd-scalar-1.c
  817e504d8a4f3a8fe3668c375dbb1998  gcc/testsuite/gcc.target/arm/simd/mve-vaddv-1.c
  7370991ffab828bb67ea9207e79d17ed  gcc/testsuite/gcc.target/arm/simd/mve-vand.c
  57337e605c24d6ca7890908234fe55fd  gcc/testsuite/gcc.target/arm/simd/mve-vbic.c
! a89ba01a34119210a98694c961ce138e  gcc/testsuite/gcc.target/arm/simd/mve-vclz.c
  d34579bb65d7395a1f822d658596726e  gcc/testsuite/gcc.target/arm/simd/mve-vcmp-f16.c
  ae407b3b95f556a909330ca46587c746  gcc/testsuite/gcc.target/arm/simd/mve-vcmp-f32-2.c
  38d5e1e8de59fae0897546aafa88daf5  gcc/testsuite/gcc.target/arm/simd/mve-vcmp-f32.c
! 1a1b1c8b681587a1e716fe5f81336aea  gcc/testsuite/gcc.target/arm/simd/mve-vcmp.c
  ad91e84e4e236e53bf616bfe551f7eda  gcc/testsuite/gcc.target/arm/simd/mve-veor.c
  0e5d51f0dfb4e6e8bcb85222b141383c  gcc/testsuite/gcc.target/arm/simd/mve-vhadd-1.c
  5d3409e0bc1b329a973218097ef5a063  gcc/testsuite/gcc.target/arm/simd/mve-vhadd-2.c
--- 60011,60031 ----
  86a910fbea8e786089563912a699727e  gcc/testsuite/gcc.target/arm/simd/fp16fml_lane_high.c
  ce6bfdecafebf5d96e30584ac5bde11f  gcc/testsuite/gcc.target/arm/simd/fp16fml_lane_low.c
  c7ef3b93e6ead3d17a958c3c299e8b73  gcc/testsuite/gcc.target/arm/simd/fp16fml_low.c
! d21e638a6c36bfc09953f404b86a485f  gcc/testsuite/gcc.target/arm/simd/mve-compare-1.c
  5dcf4e932871aeba4c1b9a49be403bf6  gcc/testsuite/gcc.target/arm/simd/mve-compare-2.c
  79ad4702846317f8676e19282166aa0d  gcc/testsuite/gcc.target/arm/simd/mve-compare-3.c
! f3b1d2b5756c4d3b3d2e615e514d6c49  gcc/testsuite/gcc.target/arm/simd/mve-compare-scalar-1.c
! 988b7e5a921ffc215868fc0c17512af4  gcc/testsuite/gcc.target/arm/simd/mve-vabs.c
! 0f2be96cafe2bb9a1c2796d9f50adca0  gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c
! 935d1dbc60e1d974bb29b01e2f735e02  gcc/testsuite/gcc.target/arm/simd/mve-vadd-scalar-1.c
  817e504d8a4f3a8fe3668c375dbb1998  gcc/testsuite/gcc.target/arm/simd/mve-vaddv-1.c
  7370991ffab828bb67ea9207e79d17ed  gcc/testsuite/gcc.target/arm/simd/mve-vand.c
  57337e605c24d6ca7890908234fe55fd  gcc/testsuite/gcc.target/arm/simd/mve-vbic.c
! 53293bc28b223e76b3a77822b8d82869  gcc/testsuite/gcc.target/arm/simd/mve-vclz.c
  d34579bb65d7395a1f822d658596726e  gcc/testsuite/gcc.target/arm/simd/mve-vcmp-f16.c
  ae407b3b95f556a909330ca46587c746  gcc/testsuite/gcc.target/arm/simd/mve-vcmp-f32-2.c
  38d5e1e8de59fae0897546aafa88daf5  gcc/testsuite/gcc.target/arm/simd/mve-vcmp-f32.c
! 16959613b263f44ae7eecac4cc973721  gcc/testsuite/gcc.target/arm/simd/mve-vcmp.c
  ad91e84e4e236e53bf616bfe551f7eda  gcc/testsuite/gcc.target/arm/simd/mve-veor.c
  0e5d51f0dfb4e6e8bcb85222b141383c  gcc/testsuite/gcc.target/arm/simd/mve-vhadd-1.c
  5d3409e0bc1b329a973218097ef5a063  gcc/testsuite/gcc.target/arm/simd/mve-vhadd-2.c
*************** c2eea7db2d4567249d33b386cdaf476b  gcc/te
*** 59945,59955 ****
  6db903ede2b03c4e104d446de2d997d9  gcc/testsuite/gcc.target/arm/simd/mve-vmul-scalar-1.c
  36779691f42ae231092570148a42b261  gcc/testsuite/gcc.target/arm/simd/mve-vmul_1.c
  8a858f14e2f8788bc8e6d834c44cb944  gcc/testsuite/gcc.target/arm/simd/mve-vmvn.c
! eec4a2942df9514516f09adb538ca6c1  gcc/testsuite/gcc.target/arm/simd/mve-vneg.c
  454ea9c4b205cc5970ef1f679c56ad7a  gcc/testsuite/gcc.target/arm/simd/mve-vorn.c
  fcce8db5ec7e8bdb594b192422634626  gcc/testsuite/gcc.target/arm/simd/mve-vorr.c
  8c135e895bc223508b6735896b11e21f  gcc/testsuite/gcc.target/arm/simd/mve-vshl.c
! 44d9633172a744d57748b78cd9459397  gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
  93474bc90e5156ad689799d6fb6a4511  gcc/testsuite/gcc.target/arm/simd/mve-vsub-scalar-1.c
  6c75eaaec68dfb8c4f79555ce03a5fc5  gcc/testsuite/gcc.target/arm/simd/mve-vsub_1.c
  1b47bf72d463778fb593a6c8e88de7bf  gcc/testsuite/gcc.target/arm/simd/neon-compare-1.c
--- 60035,60045 ----
  6db903ede2b03c4e104d446de2d997d9  gcc/testsuite/gcc.target/arm/simd/mve-vmul-scalar-1.c
  36779691f42ae231092570148a42b261  gcc/testsuite/gcc.target/arm/simd/mve-vmul_1.c
  8a858f14e2f8788bc8e6d834c44cb944  gcc/testsuite/gcc.target/arm/simd/mve-vmvn.c
! b39d52db8b06b00a7c57fd2d7dd7bc0a  gcc/testsuite/gcc.target/arm/simd/mve-vneg.c
  454ea9c4b205cc5970ef1f679c56ad7a  gcc/testsuite/gcc.target/arm/simd/mve-vorn.c
  fcce8db5ec7e8bdb594b192422634626  gcc/testsuite/gcc.target/arm/simd/mve-vorr.c
  8c135e895bc223508b6735896b11e21f  gcc/testsuite/gcc.target/arm/simd/mve-vshl.c
! 436aabb7e19b94cd90c42d18d9ffd235  gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
  93474bc90e5156ad689799d6fb6a4511  gcc/testsuite/gcc.target/arm/simd/mve-vsub-scalar-1.c
  6c75eaaec68dfb8c4f79555ce03a5fc5  gcc/testsuite/gcc.target/arm/simd/mve-vsub_1.c
  1b47bf72d463778fb593a6c8e88de7bf  gcc/testsuite/gcc.target/arm/simd/neon-compare-1.c
*************** c128da719ddaa71fe006886c68ef9e8b  gcc/te
*** 59970,59976 ****
  ed5726c14960e6946d6059ad2eafda39  gcc/testsuite/gcc.target/arm/simd/pr100757-4.c
  9d1a89861df9439f2260142a68ce64d5  gcc/testsuite/gcc.target/arm/simd/pr100757.c
  697c6e1839ba0f86de4a02316e9dbdfa  gcc/testsuite/gcc.target/arm/simd/pr101325-2.c
! b12640f73eff96966ca77078dd5fb9e4  gcc/testsuite/gcc.target/arm/simd/pr101325.c
  e1603cc96f76b89440e17fe221245eed  gcc/testsuite/gcc.target/arm/simd/pr104882.c
  be3a6e865cff5e83a7ddc3fdeff09efc  gcc/testsuite/gcc.target/arm/simd/pr105374.C
  046001a34adf828e1dc1680bb6554761  gcc/testsuite/gcc.target/arm/simd/pr97906.c
--- 60060,60066 ----
  ed5726c14960e6946d6059ad2eafda39  gcc/testsuite/gcc.target/arm/simd/pr100757-4.c
  9d1a89861df9439f2260142a68ce64d5  gcc/testsuite/gcc.target/arm/simd/pr100757.c
  697c6e1839ba0f86de4a02316e9dbdfa  gcc/testsuite/gcc.target/arm/simd/pr101325-2.c
! ac6c1f0bd9ddea47b998e6d6fe81f3f3  gcc/testsuite/gcc.target/arm/simd/pr101325.c
  e1603cc96f76b89440e17fe221245eed  gcc/testsuite/gcc.target/arm/simd/pr104882.c
  be3a6e865cff5e83a7ddc3fdeff09efc  gcc/testsuite/gcc.target/arm/simd/pr105374.C
  046001a34adf828e1dc1680bb6554761  gcc/testsuite/gcc.target/arm/simd/pr97906.c
*************** c75ed40c88ef10849c23f953624d1ae2  gcc/te
*** 60293,60298 ****
--- 60383,60389 ----
  5c6680598a83083cd8ee0c39ad5821bf  gcc/testsuite/gcc.target/arm/wmul-bitfield-2.c
  a1131491d67160098e775860b91e3021  gcc/testsuite/gcc.target/arm/xor-and.c
  79a594a642e89de4c3a753867b50cf54  gcc/testsuite/gcc.target/arm/xordi3-opt.c
+ c80b20e750ebef437da2bce443dea236  gcc/testsuite/gcc.target/avr/attribute-io.h
  853f53a6e0cf31af3573c0ab91f70f27  gcc/testsuite/gcc.target/avr/avr.exp
  a6701935d18c8ed062555c8a48454bc9  gcc/testsuite/gcc.target/avr/dev-specific-rmw.c
  2028ceccf9f97e5e84e9adf6beb7597e  gcc/testsuite/gcc.target/avr/exit-abort.h
*************** a6701935d18c8ed062555c8a48454bc9  gcc/te
*** 60301,60306 ****
--- 60392,60401 ----
  421d2b9b36fa2496dce05d129d2c352b  gcc/testsuite/gcc.target/avr/mmcu/pr58545.c
  8172209b564aa8049ce5758eac60cc46  gcc/testsuite/gcc.target/avr/mmcu/tiny-caller-save.c
  80cabd0a89ca2c48055ae61bc82b633e  gcc/testsuite/gcc.target/avr/mmcu/tiny-memx.c
+ f8477bcb4f0897df97ce12509813078f  gcc/testsuite/gcc.target/avr/pr112952-0.c
+ 7f4851ba862178ebdd33c37d9afb8e90  gcc/testsuite/gcc.target/avr/pr112952-1.c
+ cbbdbc1f2e5f1be9d84964c49c4e1d8a  gcc/testsuite/gcc.target/avr/pr112952-2.c
+ 4c2e6ef3904adf4a21d13daa991d00c8  gcc/testsuite/gcc.target/avr/pr112952-3.c
  2931177f4aeff49d531d5474224448f6  gcc/testsuite/gcc.target/avr/pr46779-1.c
  572dc228e08385a1db0fcbab66dbaa4e  gcc/testsuite/gcc.target/avr/pr46779-2.c
  d92831f37e30237d1dc568f585e4c2c9  gcc/testsuite/gcc.target/avr/pr50739.c
*************** d5c8fd29fb9b2ff9d36bac3d01f75b13  gcc/te
*** 60327,60332 ****
--- 60422,60428 ----
  2ed1f0bc4da53e9763c2d91642fbe089  gcc/testsuite/gcc.target/avr/pr71676.c
  859b3836a035473a6251a77102bbe16d  gcc/testsuite/gcc.target/avr/pr71678.c
  f91d8c4774a3ac3e49934378e0629b52  gcc/testsuite/gcc.target/avr/pr71873.c
+ 5e90aa3ebe8d6e58597bdaa2ecf4948c  gcc/testsuite/gcc.target/avr/pr82931.c
  675750e3e482b5f5103d79510bfe2e28  gcc/testsuite/gcc.target/avr/pr88253.c
  cbd676b663043514bbc26a8a6c3b7a9d  gcc/testsuite/gcc.target/avr/pr90706.c
  881cb1836ddfc3105e0aacacc481aa09  gcc/testsuite/gcc.target/avr/progmem-error-1.c
*************** c458c2462e23a4c58a7e4d05b6200907  gcc/te
*** 60359,60364 ****
--- 60455,60463 ----
  f07474ce14e61da44f73f5bc38af0fa5  gcc/testsuite/gcc.target/avr/torture/isr-01-simple.c
  fcfc22b5becf29a31bc290457133738d  gcc/testsuite/gcc.target/avr/torture/isr-02-call.c
  9cae7dcbc57747c7d869b4d66a99221f  gcc/testsuite/gcc.target/avr/torture/isr-03-fixed.c
+ da616058fed041fe8be91af9e560a517  gcc/testsuite/gcc.target/avr/torture/pr105753.c
+ 112c41be69fc1500c61b78d58e88cb62  gcc/testsuite/gcc.target/avr/torture/pr109650-1.c
+ 057f8a7fa6d90ee3ba242f26befaec45  gcc/testsuite/gcc.target/avr/torture/pr109650-2.c
  0844a939ea2464d30cc8892c85b4aecc  gcc/testsuite/gcc.target/avr/torture/pr39633.c
  8fb17af722ee890b7fa08b5610cdb80e  gcc/testsuite/gcc.target/avr/torture/pr41885.c
  70b849f57ecf42299230b99b7734dd2d  gcc/testsuite/gcc.target/avr/torture/pr51374-1.c
*************** ab53af0eb6dbfe2791a8ac1bbaf0c11f  gcc/te
*** 60373,60378 ****
--- 60472,60478 ----
  5f3be2dbb82f715c14a1a41fff447a60  gcc/testsuite/gcc.target/avr/torture/pr77326.c
  4fbef28c5655476b160563b7732f35f0  gcc/testsuite/gcc.target/avr/torture/pr83729.c
  3f60045ba7f9c20a87591727f9e0b7f1  gcc/testsuite/gcc.target/avr/torture/pr83801.c
+ 52eb2c2bb002e59b07281c8efa4702fb  gcc/testsuite/gcc.target/avr/torture/pr92606.c
  21a45d34960ba9567b9f2483d22c843f  gcc/testsuite/gcc.target/avr/torture/progmem-1.c
  564c71a894aff68e98d5c4a6db2b47ae  gcc/testsuite/gcc.target/avr/torture/progmem-1.cpp
  126473a2f2a291f65eeb2dca66b500b2  gcc/testsuite/gcc.target/avr/torture/sat-hr-plus-minus.c
*************** d60dbd15c646ed84efd9129d21d39b6d  gcc/te
*** 61115,61120 ****
--- 61215,61221 ----
  3eebd7a67adf970dc6eea82ff3eda30d  gcc/testsuite/gcc.target/i386/amxint8-dpbuud-2.c
  4e7e8638f4652613beb251daa4730463  gcc/testsuite/gcc.target/i386/amxtile-2.c
  a455baf8f9990eb7494164842dce7c91  gcc/testsuite/gcc.target/i386/amxtile-3.c
+ 84fc02cc52ddc8bdd53d77902c0176fb  gcc/testsuite/gcc.target/i386/amxtile-4.c
  8e7fab1b3f5c89155f09aabb59da8382  gcc/testsuite/gcc.target/i386/amxtile-asmatt-1.c
  2629a435840ab211444b4a2af4563d8d  gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c
  c5cfc6b01e748536e4ac5d65b3528952  gcc/testsuite/gcc.target/i386/andor-1.c
*************** cbb0208f2a1bdf8ac8ed52da238b76d2  gcc/te
*** 61720,61726 ****
  c7eb87b3adb4d1f009938acb24e45805  gcc/testsuite/gcc.target/i386/avx-vzeroupper-1.c
  56576f5aeaa789fe5e147bc0a24947ed  gcc/testsuite/gcc.target/i386/avx-vzeroupper-10.c
  4d1ac7f558077b3999165f5dc25784c6  gcc/testsuite/gcc.target/i386/avx-vzeroupper-11.c
! e574c1cd5d253ccd4178534da6c08128  gcc/testsuite/gcc.target/i386/avx-vzeroupper-12.c
  8f4945cde0bafb95376035acb8001955  gcc/testsuite/gcc.target/i386/avx-vzeroupper-13.c
  b842dd5b565fe11176de207b00b4109f  gcc/testsuite/gcc.target/i386/avx-vzeroupper-14.c
  135eb49b0c89f064146bbbaa422289af  gcc/testsuite/gcc.target/i386/avx-vzeroupper-15.c
--- 61821,61827 ----
  c7eb87b3adb4d1f009938acb24e45805  gcc/testsuite/gcc.target/i386/avx-vzeroupper-1.c
  56576f5aeaa789fe5e147bc0a24947ed  gcc/testsuite/gcc.target/i386/avx-vzeroupper-10.c
  4d1ac7f558077b3999165f5dc25784c6  gcc/testsuite/gcc.target/i386/avx-vzeroupper-11.c
! 110ab12ca780d22a3ae82cbf936d4591  gcc/testsuite/gcc.target/i386/avx-vzeroupper-12.c
  8f4945cde0bafb95376035acb8001955  gcc/testsuite/gcc.target/i386/avx-vzeroupper-13.c
  b842dd5b565fe11176de207b00b4109f  gcc/testsuite/gcc.target/i386/avx-vzeroupper-14.c
  135eb49b0c89f064146bbbaa422289af  gcc/testsuite/gcc.target/i386/avx-vzeroupper-15.c
*************** b47b757f8315eacb46b04546750c92a3  gcc/te
*** 61738,61761 ****
  c9c1cc09c516bf54bf50fb514a8f862c  gcc/testsuite/gcc.target/i386/avx-vzeroupper-26.c
  373ca5703182fb7bac2076f26891bd55  gcc/testsuite/gcc.target/i386/avx-vzeroupper-27.c
  c196063785925f2f19d102abe1488774  gcc/testsuite/gcc.target/i386/avx-vzeroupper-28.c
  2676f686c636ba65ddf77da8485ee324  gcc/testsuite/gcc.target/i386/avx-vzeroupper-3.c
  762b6911a6dc394fae9ee24213fb6114  gcc/testsuite/gcc.target/i386/avx-vzeroupper-4.c
  27e3a091b9bfccddb7c44014ae46ed71  gcc/testsuite/gcc.target/i386/avx-vzeroupper-5.c
  e496930891266115a9ceee7c7de0cac4  gcc/testsuite/gcc.target/i386/avx-vzeroupper-6.c
! 196aec2399172c70cc1b6322412ec45d  gcc/testsuite/gcc.target/i386/avx-vzeroupper-7.c
  2dd3d3b02f96ec89ffed6f185b8e940f  gcc/testsuite/gcc.target/i386/avx-vzeroupper-8.c
! 280e2807a80caedf3c9b1fd25684032d  gcc/testsuite/gcc.target/i386/avx-vzeroupper-9.c
  a5901d33285892facee8dbfe287ce0d1  gcc/testsuite/gcc.target/i386/avx2-broadcast-pr87767-1.c
  958690bb20e5ef6d9a38def7eb976f13  gcc/testsuite/gcc.target/i386/avx2-check.h
  7dc98d98981fa7b82c0ae95d09c8128c  gcc/testsuite/gcc.target/i386/avx2-cvt-1.c
  ea08c4d81609e53332974756983fe0c2  gcc/testsuite/gcc.target/i386/avx2-cvt-2.c
  0598c67dc7d57cb536fed4dfd284c353  gcc/testsuite/gcc.target/i386/avx2-dest-false-dep-for-glc.c
  aaabb27f441033ad22d615277a666b93  gcc/testsuite/gcc.target/i386/avx2-gather-1.c
! 193500dbe679e3b0106077cb94dcd659  gcc/testsuite/gcc.target/i386/avx2-gather-2.c
  e6fb48367ac48aab006ff09ee7205b7f  gcc/testsuite/gcc.target/i386/avx2-gather-3.c
  74c386970583ffac555d2320df839c1b  gcc/testsuite/gcc.target/i386/avx2-gather-4.c
  b10dfe874c7de4330090cb5b58ccddda  gcc/testsuite/gcc.target/i386/avx2-gather-5.c
! bab8d3346cd39524a79bf0922698f8dc  gcc/testsuite/gcc.target/i386/avx2-gather-6.c
  5bab3385f59413b4ac1d08b312a04c67  gcc/testsuite/gcc.target/i386/avx2-i32gatherd-1.c
  61279c227c143e8c3c052c2ba1d0e226  gcc/testsuite/gcc.target/i386/avx2-i32gatherd-2.c
  025259b149283dd7aa44783815197ac4  gcc/testsuite/gcc.target/i386/avx2-i32gatherd-3.c
--- 61839,61863 ----
  c9c1cc09c516bf54bf50fb514a8f862c  gcc/testsuite/gcc.target/i386/avx-vzeroupper-26.c
  373ca5703182fb7bac2076f26891bd55  gcc/testsuite/gcc.target/i386/avx-vzeroupper-27.c
  c196063785925f2f19d102abe1488774  gcc/testsuite/gcc.target/i386/avx-vzeroupper-28.c
+ c0bed0be10ece6c15e9aa800b77e5436  gcc/testsuite/gcc.target/i386/avx-vzeroupper-29.c
  2676f686c636ba65ddf77da8485ee324  gcc/testsuite/gcc.target/i386/avx-vzeroupper-3.c
  762b6911a6dc394fae9ee24213fb6114  gcc/testsuite/gcc.target/i386/avx-vzeroupper-4.c
  27e3a091b9bfccddb7c44014ae46ed71  gcc/testsuite/gcc.target/i386/avx-vzeroupper-5.c
  e496930891266115a9ceee7c7de0cac4  gcc/testsuite/gcc.target/i386/avx-vzeroupper-6.c
! c4227998307c3408290373f455089594  gcc/testsuite/gcc.target/i386/avx-vzeroupper-7.c
  2dd3d3b02f96ec89ffed6f185b8e940f  gcc/testsuite/gcc.target/i386/avx-vzeroupper-8.c
! 5933a51943f93cc857080a185b5c5e51  gcc/testsuite/gcc.target/i386/avx-vzeroupper-9.c
  a5901d33285892facee8dbfe287ce0d1  gcc/testsuite/gcc.target/i386/avx2-broadcast-pr87767-1.c
  958690bb20e5ef6d9a38def7eb976f13  gcc/testsuite/gcc.target/i386/avx2-check.h
  7dc98d98981fa7b82c0ae95d09c8128c  gcc/testsuite/gcc.target/i386/avx2-cvt-1.c
  ea08c4d81609e53332974756983fe0c2  gcc/testsuite/gcc.target/i386/avx2-cvt-2.c
  0598c67dc7d57cb536fed4dfd284c353  gcc/testsuite/gcc.target/i386/avx2-dest-false-dep-for-glc.c
  aaabb27f441033ad22d615277a666b93  gcc/testsuite/gcc.target/i386/avx2-gather-1.c
! 9a1f20db8a24cf28261761ea84f4920a  gcc/testsuite/gcc.target/i386/avx2-gather-2.c
  e6fb48367ac48aab006ff09ee7205b7f  gcc/testsuite/gcc.target/i386/avx2-gather-3.c
  74c386970583ffac555d2320df839c1b  gcc/testsuite/gcc.target/i386/avx2-gather-4.c
  b10dfe874c7de4330090cb5b58ccddda  gcc/testsuite/gcc.target/i386/avx2-gather-5.c
! ccba4fe76fbee89c17997a3eca46d604  gcc/testsuite/gcc.target/i386/avx2-gather-6.c
  5bab3385f59413b4ac1d08b312a04c67  gcc/testsuite/gcc.target/i386/avx2-i32gatherd-1.c
  61279c227c143e8c3c052c2ba1d0e226  gcc/testsuite/gcc.target/i386/avx2-i32gatherd-2.c
  025259b149283dd7aa44783815197ac4  gcc/testsuite/gcc.target/i386/avx2-i32gatherd-3.c
*************** dc7877a60c094039a172aa23afb1e37c  gcc/te
*** 62950,62955 ****
--- 63052,63058 ----
  45a98ac2d84ae154c61e3e1ce84c17eb  gcc/testsuite/gcc.target/i386/avx512f-pr101896.c
  ce0cad9f4c5da96b0d07d2029604250c  gcc/testsuite/gcc.target/i386/avx512f-pr103750-1.c
  1d9114b974ef8241068b2ece25e00b2e  gcc/testsuite/gcc.target/i386/avx512f-pr103750-2.c
+ 9a6936f1815277f15801196159007f44  gcc/testsuite/gcc.target/i386/avx512f-pr114566.c
  88877c518076ecdec1dba128743ad627  gcc/testsuite/gcc.target/i386/avx512f-pr57233.c
  0272e0fc54cb34ee03db4b0027dbec3d  gcc/testsuite/gcc.target/i386/avx512f-pr63594-1.c
  381f53de01f1e9893e6903d9fac40b87  gcc/testsuite/gcc.target/i386/avx512f-pr63594-2.c
*************** f5e2d9cb20058374157f0683dddeff73  gcc/te
*** 62971,62981 ****
  33ef0191b116f2207f8cae72da53f074  gcc/testsuite/gcc.target/i386/avx512f-pr85177.c
  44b94a02b283cd9b531e1679a63bb550  gcc/testsuite/gcc.target/i386/avx512f-pr85255.c
  91d1cf3389554e9095c24e2d0922e5ce  gcc/testsuite/gcc.target/i386/avx512f-pr85832.c
! 8755bbd1991d543ed8238049d8c8dd38  gcc/testsuite/gcc.target/i386/avx512f-pr88464-1.c
  bfe1b42fed4f27d06a2686cddbd8c3c0  gcc/testsuite/gcc.target/i386/avx512f-pr88464-2.c
  7438f166ed28ad4498da4b5077b71181  gcc/testsuite/gcc.target/i386/avx512f-pr88464-3.c
  da0186580868c5f1ebd96d179687ae26  gcc/testsuite/gcc.target/i386/avx512f-pr88464-4.c
! 6bc4181653baf587b37d974277810ee5  gcc/testsuite/gcc.target/i386/avx512f-pr88464-5.c
  15e278dd63e5ac145f6c67f833a47cf2  gcc/testsuite/gcc.target/i386/avx512f-pr88464-6.c
  fbb4eb7430260d94966d2091a7204617  gcc/testsuite/gcc.target/i386/avx512f-pr88464-7.c
  a2908de260a59647ee69aa2e1e318a8b  gcc/testsuite/gcc.target/i386/avx512f-pr88464-8.c
--- 63074,63084 ----
  33ef0191b116f2207f8cae72da53f074  gcc/testsuite/gcc.target/i386/avx512f-pr85177.c
  44b94a02b283cd9b531e1679a63bb550  gcc/testsuite/gcc.target/i386/avx512f-pr85255.c
  91d1cf3389554e9095c24e2d0922e5ce  gcc/testsuite/gcc.target/i386/avx512f-pr85832.c
! c1c9be5c000ba09322d1bcaed3d61241  gcc/testsuite/gcc.target/i386/avx512f-pr88464-1.c
  bfe1b42fed4f27d06a2686cddbd8c3c0  gcc/testsuite/gcc.target/i386/avx512f-pr88464-2.c
  7438f166ed28ad4498da4b5077b71181  gcc/testsuite/gcc.target/i386/avx512f-pr88464-3.c
  da0186580868c5f1ebd96d179687ae26  gcc/testsuite/gcc.target/i386/avx512f-pr88464-4.c
! d3d0db87e65534dc95ebeafc29f6eb13  gcc/testsuite/gcc.target/i386/avx512f-pr88464-5.c
  15e278dd63e5ac145f6c67f833a47cf2  gcc/testsuite/gcc.target/i386/avx512f-pr88464-6.c
  fbb4eb7430260d94966d2091a7204617  gcc/testsuite/gcc.target/i386/avx512f-pr88464-7.c
  a2908de260a59647ee69aa2e1e318a8b  gcc/testsuite/gcc.target/i386/avx512f-pr88464-8.c
*************** e3cc31b3308cdb56423451f2cd8c2a00  gcc/te
*** 64260,64281 ****
  0fe6ef0c597e472d3e4d732c54448a91  gcc/testsuite/gcc.target/i386/avx512vl-pr85832.c
  22c31bf03678131c3d0a583fba1ee269  gcc/testsuite/gcc.target/i386/avx512vl-pr87214-1.c
  dd0303ef457dc2b0fdc13d8c6e3f9345  gcc/testsuite/gcc.target/i386/avx512vl-pr87214-2.c
! 2f9574eab62f05e192ea2ec667f3169a  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-1.c
  39601a1f18d6f833823d29236463df8c  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-10.c
! eca8146b34153f093d3ae43d4ffec4ee  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-11.c
  90010aa28415b8ef8b837a85aeaf6256  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-12.c
  47d67b7a934bfd1a79e1141deacdd525  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-13.c
  6811e4896e4da5ef69f652fb2a3e7715  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-14.c
  b21314a51f62c382ba0199f1b8adf2bb  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-15.c
  358b025054514a4ae1275fcceaa36667  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-16.c
  fc0518ef4725b34153f0e37bdcb0a2d3  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-2.c
! da252c14fc71905221513689897c1026  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-3.c
  cc3ed6589d4b7dc894bcddb5723a20be  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-4.c
  73410dddfff0383c686500f838991335  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-5.c
  03455808cfb1c0b507621b77fee871ba  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-6.c
  48216c7fa5105b8c80d52a41661ff0c8  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-7.c
  433b8f377654ed9d9083111df5ded23a  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-8.c
! d83d1465cecd57a6282539266e56f304  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-9.c
  a211ab10a3faac2cd055fdacc95d4e1d  gcc/testsuite/gcc.target/i386/avx512vl-pr88513-1.c
  06cabf563581814176556ba2a1b73501  gcc/testsuite/gcc.target/i386/avx512vl-pr88513-2.c
  3695b4f8bd527469e884b72d9a1b8f41  gcc/testsuite/gcc.target/i386/avx512vl-pr88513-3.c
--- 64363,64384 ----
  0fe6ef0c597e472d3e4d732c54448a91  gcc/testsuite/gcc.target/i386/avx512vl-pr85832.c
  22c31bf03678131c3d0a583fba1ee269  gcc/testsuite/gcc.target/i386/avx512vl-pr87214-1.c
  dd0303ef457dc2b0fdc13d8c6e3f9345  gcc/testsuite/gcc.target/i386/avx512vl-pr87214-2.c
! 30e7e4c7f248a8349d72262db59905b6  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-1.c
  39601a1f18d6f833823d29236463df8c  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-10.c
! d295a2038bd58f73a24b4afff4544e6f  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-11.c
  90010aa28415b8ef8b837a85aeaf6256  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-12.c
  47d67b7a934bfd1a79e1141deacdd525  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-13.c
  6811e4896e4da5ef69f652fb2a3e7715  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-14.c
  b21314a51f62c382ba0199f1b8adf2bb  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-15.c
  358b025054514a4ae1275fcceaa36667  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-16.c
  fc0518ef4725b34153f0e37bdcb0a2d3  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-2.c
! 98caed71eec15644727965520faa59fd  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-3.c
  cc3ed6589d4b7dc894bcddb5723a20be  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-4.c
  73410dddfff0383c686500f838991335  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-5.c
  03455808cfb1c0b507621b77fee871ba  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-6.c
  48216c7fa5105b8c80d52a41661ff0c8  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-7.c
  433b8f377654ed9d9083111df5ded23a  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-8.c
! b7a84ab3dd62d3cbb53acf2c4c116a82  gcc/testsuite/gcc.target/i386/avx512vl-pr88464-9.c
  a211ab10a3faac2cd055fdacc95d4e1d  gcc/testsuite/gcc.target/i386/avx512vl-pr88513-1.c
  06cabf563581814176556ba2a1b73501  gcc/testsuite/gcc.target/i386/avx512vl-pr88513-2.c
  3695b4f8bd527469e884b72d9a1b8f41  gcc/testsuite/gcc.target/i386/avx512vl-pr88513-3.c
*************** b37f306ab147d6fbfd89376226165e2f  gcc/te
*** 65829,65834 ****
--- 65932,65938 ----
  2b02ee46ed233dc14d5b15819cfff28b  gcc/testsuite/gcc.target/i386/mvc14.c
  0dbd1cf7be9a494f5666af53dffb29c8  gcc/testsuite/gcc.target/i386/mvc15.c
  e302a983fa569ca9c52105401b06e054  gcc/testsuite/gcc.target/i386/mvc16.c
+ ef7c58db6b2b11956cdae67dd45533ec  gcc/testsuite/gcc.target/i386/mvc17.c
  564e05556bd7de96a3147d7330c78901  gcc/testsuite/gcc.target/i386/mvc2.c
  81972b6ec7b16a2464f2f27fb8863604  gcc/testsuite/gcc.target/i386/mvc3.c
  b1d4c5cfd15d435b380b98085cd82466  gcc/testsuite/gcc.target/i386/mvc4.c
*************** a2db1599502ab18d8be9008240a5479f  gcc/te
*** 66022,66028 ****
  b4bca83d8c5eb66cc3b76c908b3d3d01  gcc/testsuite/gcc.target/i386/pr100865-9b.c
  0e777948f43f406fb25b7236272ef276  gcc/testsuite/gcc.target/i386/pr100865-9c.c
  92347818baf371677943e85e6acf1cb2  gcc/testsuite/gcc.target/i386/pr100887.c
! 1bc38c498cc637c99a48d91d8c5545b8  gcc/testsuite/gcc.target/i386/pr100936.c
  988b04066631a4c959820d4ced9f5e39  gcc/testsuite/gcc.target/i386/pr100951.c
  0f1a3e79d17305cf67121bb850f8bbee  gcc/testsuite/gcc.target/i386/pr101021-1.c
  d1dc5c84e88280386be51fbb5bbe9542  gcc/testsuite/gcc.target/i386/pr101021-2.c
--- 66126,66132 ----
  b4bca83d8c5eb66cc3b76c908b3d3d01  gcc/testsuite/gcc.target/i386/pr100865-9b.c
  0e777948f43f406fb25b7236272ef276  gcc/testsuite/gcc.target/i386/pr100865-9c.c
  92347818baf371677943e85e6acf1cb2  gcc/testsuite/gcc.target/i386/pr100887.c
! 71d6b9b3a9303f1619b5e004899cb385  gcc/testsuite/gcc.target/i386/pr100936.c
  988b04066631a4c959820d4ced9f5e39  gcc/testsuite/gcc.target/i386/pr100951.c
  0f1a3e79d17305cf67121bb850f8bbee  gcc/testsuite/gcc.target/i386/pr101021-1.c
  d1dc5c84e88280386be51fbb5bbe9542  gcc/testsuite/gcc.target/i386/pr101021-2.c
*************** e3cf12a5755f26431dc36e4c7edc3345  gcc/te
*** 66231,66237 ****
  4ae7c694596b4d8b84d1d2e01c54c21c  gcc/testsuite/gcc.target/i386/pr105253.c
  dfc3f83604e6883a02d821c48a3ad632  gcc/testsuite/gcc.target/i386/pr105338.c
  2a5473f87bb2410849bfe5418a5abeb6  gcc/testsuite/gcc.target/i386/pr105367.c
! db0abcfd3877faa33b33aa19a57352a5  gcc/testsuite/gcc.target/i386/pr105554.c
  eeeee8caa23185d1a21ba6680503f028  gcc/testsuite/gcc.target/i386/pr105711.c
  840fb83f35546d6c20183029a35d1f95  gcc/testsuite/gcc.target/i386/pr105951-1.c
  2ff5f727d612ee865a9f68d980e8cb80  gcc/testsuite/gcc.target/i386/pr105951-2.c
--- 66335,66341 ----
  4ae7c694596b4d8b84d1d2e01c54c21c  gcc/testsuite/gcc.target/i386/pr105253.c
  dfc3f83604e6883a02d821c48a3ad632  gcc/testsuite/gcc.target/i386/pr105338.c
  2a5473f87bb2410849bfe5418a5abeb6  gcc/testsuite/gcc.target/i386/pr105367.c
! 8515bef5344a20c9dafa2d780bab4b57  gcc/testsuite/gcc.target/i386/pr105554.c
  eeeee8caa23185d1a21ba6680503f028  gcc/testsuite/gcc.target/i386/pr105711.c
  840fb83f35546d6c20183029a35d1f95  gcc/testsuite/gcc.target/i386/pr105951-1.c
  2ff5f727d612ee865a9f68d980e8cb80  gcc/testsuite/gcc.target/i386/pr105951-2.c
*************** cbe58ae1efc3b97c1019a430e1fedfcb  gcc/te
*** 66255,66260 ****
--- 66359,66381 ----
  e00380cd123a9ea3429ab36047aa6624  gcc/testsuite/gcc.target/i386/pr11001-strlen-1.c
  f2961b113a187971d8c265513b16a3a5  gcc/testsuite/gcc.target/i386/pr11001-strlen-2.c
  27f57729aea057bdb268886140eaba10  gcc/testsuite/gcc.target/i386/pr11001-strlen-3.c
+ f562385a23a792c182758e4565e2e1a0  gcc/testsuite/gcc.target/i386/pr110108-2.c
+ ae133b6a6857ca5bc2e95a272e01f447  gcc/testsuite/gcc.target/i386/pr110170-3.c
+ 5d3322fc19dcfb45977b7e950b6b7abd  gcc/testsuite/gcc.target/i386/pr110206.c
+ 7f0cde3ec2fdeaca91525ac49787aa22  gcc/testsuite/gcc.target/i386/pr110309.c
+ 9355c41ef1e78b70305475dee4bed5c8  gcc/testsuite/gcc.target/i386/pr111306.c
+ 1459550770245224c9edce111674e4e5  gcc/testsuite/gcc.target/i386/pr111340.c
+ 83c1fd77f5c5b1d08ae6f047d224f609  gcc/testsuite/gcc.target/i386/pr111736.c
+ d639374a10f845f4130a83222b9ee43c  gcc/testsuite/gcc.target/i386/pr112495.c
+ 1601f8939826f2a25f2d128d43833970  gcc/testsuite/gcc.target/i386/pr112672.c
+ cee904627dd8919025dea0c6817c07d5  gcc/testsuite/gcc.target/i386/pr112891-2.c
+ 008137751ea4cc5c732bf09733a5c5d3  gcc/testsuite/gcc.target/i386/pr112891.c
+ 985d15f4237e366d808d224318b78cb2  gcc/testsuite/gcc.target/i386/pr113122-1.c
+ d150e8020454e98754c7dabfd41ad2ea  gcc/testsuite/gcc.target/i386/pr113122-2.c
+ 122f757ff15551df2a5ee4ba2135d85f  gcc/testsuite/gcc.target/i386/pr113122-3.c
+ 2f2dbd2c371a9961cb21196f2ee6f88d  gcc/testsuite/gcc.target/i386/pr113122-4.c
+ 04b5ce89d67e35431c960a773e44688c  gcc/testsuite/gcc.target/i386/pr113921.c
+ f561e51e21b70027e9a545f161c78a39  gcc/testsuite/gcc.target/i386/pr114184.c
  991b7f7f44e28179f98bb458fdb69ea6  gcc/testsuite/gcc.target/i386/pr11877-2.c
  e7f6a568e551d3786797d6f56294b949  gcc/testsuite/gcc.target/i386/pr11877.c
  b03b1d817538a863277c823b5e4cdf75  gcc/testsuite/gcc.target/i386/pr12092-1.c
*************** e3721c52844753536ca549f71e61f954  gcc/te
*** 67589,67596 ****
  40a7ef6fb3bcabb2e6a14793769e9983  gcc/testsuite/gcc.target/i386/pr88470.c
  d09b03236b7aad3cf25c32ccea767d74  gcc/testsuite/gcc.target/i386/pr88521.c
  5dbead610a1dd7e77af25c77972ddac1  gcc/testsuite/gcc.target/i386/pr88531-1a.c
! 555df29348deb23102cde1e8c8e7388a  gcc/testsuite/gcc.target/i386/pr88531-1b.c
! 32a862e24930734825f74ccb5cd04fdc  gcc/testsuite/gcc.target/i386/pr88531-1c.c
  019c39c7d098cf7f5069489447de5cf8  gcc/testsuite/gcc.target/i386/pr88531-2a.c
  e86f2defc250de76fe2280f190250a40  gcc/testsuite/gcc.target/i386/pr88531-2b.c
  197ea43338868f67bcf03c0a230ffe75  gcc/testsuite/gcc.target/i386/pr88531-2c.c
--- 67710,67717 ----
  40a7ef6fb3bcabb2e6a14793769e9983  gcc/testsuite/gcc.target/i386/pr88470.c
  d09b03236b7aad3cf25c32ccea767d74  gcc/testsuite/gcc.target/i386/pr88521.c
  5dbead610a1dd7e77af25c77972ddac1  gcc/testsuite/gcc.target/i386/pr88531-1a.c
! 093e38278aff880d894eac88351c1e71  gcc/testsuite/gcc.target/i386/pr88531-1b.c
! b4ea0253a4a44cae7ea592ca115c81cb  gcc/testsuite/gcc.target/i386/pr88531-1c.c
  019c39c7d098cf7f5069489447de5cf8  gcc/testsuite/gcc.target/i386/pr88531-2a.c
  e86f2defc250de76fe2280f190250a40  gcc/testsuite/gcc.target/i386/pr88531-2b.c
  197ea43338868f67bcf03c0a230ffe75  gcc/testsuite/gcc.target/i386/pr88531-2c.c
*************** b4038cdeb4eee7cf1074de1cead1d1b5  gcc/te
*** 68478,68483 ****
--- 68599,68606 ----
  d1e0ff73b10eb61ca8fa06128a453ef9  gcc/testsuite/gcc.target/i386/sse2-pmullw-1.c
  308fe64b1fe9bf78b6b4ed03b89a6c2f  gcc/testsuite/gcc.target/i386/sse2-pmuludq-1.c
  5a4b1b55ad120b0697aa2b141f831dcc  gcc/testsuite/gcc.target/i386/sse2-por-1.c
+ 42b0a030864c4e7c12b6c80d6c8ae276  gcc/testsuite/gcc.target/i386/sse2-pr112816-2.c
+ f25ef90e2173390dbb01786ae8576e29  gcc/testsuite/gcc.target/i386/sse2-pr112816.c
  749703f860d7a5cb18e2328329fb1c71  gcc/testsuite/gcc.target/i386/sse2-pr39821.c
  bdbcd892d3f88fe1d7a07a2122cb928d  gcc/testsuite/gcc.target/i386/sse2-pr57233.c
  ab93046758268c8e3106f1bed7d4e8a5  gcc/testsuite/gcc.target/i386/sse2-pr63594-1.c
*************** e7cfcf35d3576cc348fad814806318e1  gcc/te
*** 69142,69147 ****
--- 69265,69273 ----
  2191695e83896188ccba1a223f3a204c  gcc/testsuite/gcc.target/ia64/versionid-2.c
  5976d0923571b4543887e7a4b23c0414  gcc/testsuite/gcc.target/ia64/visibility-1.c
  ab4a753420c7cc112326b8711285358c  gcc/testsuite/gcc.target/ia64/visibility-2.c
+ ca8ab2fdd097231be9dd3f7bfdcebb7b  gcc/testsuite/gcc.target/loongarch/builtin_thread_pointer.c
+ 00fd27046cb10694212b8b3aa9811204  gcc/testsuite/gcc.target/loongarch/cas-acquire.c
+ 40042c7bbd496ecf64b96ae4ff1f8fdc  gcc/testsuite/gcc.target/loongarch/eh_return-normal-return.c
  c9d08bb72896d9b4861ce4073ec5e57f  gcc/testsuite/gcc.target/loongarch/flt-abi-isa-1.c
  6d758f852068391aa189ac79c376aa60  gcc/testsuite/gcc.target/loongarch/flt-abi-isa-2.c
  f72ce6aeb8beb0eff27354c07ef71cd1  gcc/testsuite/gcc.target/loongarch/flt-abi-isa-3.c
*************** bceca9004faa6729357ac4757f81b563  gcc/te
*** 70547,70555 ****
  2b0169ca798a1ab2ef548ccc6466fa75  gcc/testsuite/gcc.target/powerpc/cfuged-0.c
  3f04d51f3229d580c7e3475221fac283  gcc/testsuite/gcc.target/powerpc/cfuged-1.c
  4c1e1ec241d7a8a123436d0d1e5ad8e9  gcc/testsuite/gcc.target/powerpc/check-builtin-vec_rlnm-runnable.c
! 88a65f2c70356d30873b9e3fbf14bd02  gcc/testsuite/gcc.target/powerpc/clone1.c
  b8e6c9f8968f2606ab8c45e4bae3d807  gcc/testsuite/gcc.target/powerpc/clone2.c
! 3f03cede40acb0331345348ac7486253  gcc/testsuite/gcc.target/powerpc/clone3.c
  df3bb7789b2e14f68bc9eb0b7af53cea  gcc/testsuite/gcc.target/powerpc/cmpb-1.c
  a31afc98fa8da142eae0a79235d01462  gcc/testsuite/gcc.target/powerpc/cmpb-2.c
  46f5ec685c2730e6e034d52190e348d3  gcc/testsuite/gcc.target/powerpc/cmpb-3.c
--- 70673,70681 ----
  2b0169ca798a1ab2ef548ccc6466fa75  gcc/testsuite/gcc.target/powerpc/cfuged-0.c
  3f04d51f3229d580c7e3475221fac283  gcc/testsuite/gcc.target/powerpc/cfuged-1.c
  4c1e1ec241d7a8a123436d0d1e5ad8e9  gcc/testsuite/gcc.target/powerpc/check-builtin-vec_rlnm-runnable.c
! 689f90f1711f6d467fe0891512aa4482  gcc/testsuite/gcc.target/powerpc/clone1.c
  b8e6c9f8968f2606ab8c45e4bae3d807  gcc/testsuite/gcc.target/powerpc/clone2.c
! 53805374917dfb0695aa66ad55f2cc0a  gcc/testsuite/gcc.target/powerpc/clone3.c
  df3bb7789b2e14f68bc9eb0b7af53cea  gcc/testsuite/gcc.target/powerpc/cmpb-1.c
  a31afc98fa8da142eae0a79235d01462  gcc/testsuite/gcc.target/powerpc/cmpb-2.c
  46f5ec685c2730e6e034d52190e348d3  gcc/testsuite/gcc.target/powerpc/cmpb-3.c
*************** fe23137ae052519c7048642ea9fcef97  gcc/te
*** 70587,70592 ****
--- 70713,70721 ----
  9a0e4836781f28669ddca26eb214c2b2  gcc/testsuite/gcc.target/powerpc/darwin-abi-10.c
  66e5cfd1b7491e37c0ef258d09b6634d  gcc/testsuite/gcc.target/powerpc/darwin-abi-11.c
  53928dd7b0f61581157c4a15b8648deb  gcc/testsuite/gcc.target/powerpc/darwin-abi-12.c
+ 3c62c13d1d2b0222e5414464a8febd98  gcc/testsuite/gcc.target/powerpc/darwin-abi-13-0.c
+ cf00e3be4bf57389b7f606e91c156bd0  gcc/testsuite/gcc.target/powerpc/darwin-abi-13-1.c
+ 60f14ad7099165e20857ae4f288d20be  gcc/testsuite/gcc.target/powerpc/darwin-abi-13-2.c
  f1de6a326b4846750e0ac1ab775db181  gcc/testsuite/gcc.target/powerpc/darwin-abi-2.c
  3fccf2fe47e82ab342fd63f22d397b6d  gcc/testsuite/gcc.target/powerpc/darwin-abi-3.c
  bea305679cc2b27499e1228c23aae9eb  gcc/testsuite/gcc.target/powerpc/darwin-abi-4.c
*************** ebf08f4056fe4c31c90dc291d1dfcaae  gcc/te
*** 70603,70608 ****
--- 70732,70738 ----
  4dbff077cb3e8124197729c3a94647bb  gcc/testsuite/gcc.target/powerpc/darwin-misaligned.c
  7ba33272da50fd8bee6d1536c3e99d26  gcc/testsuite/gcc.target/powerpc/darwin-save-world-1.c
  a034d7a8bf265623a75800f01113e836  gcc/testsuite/gcc.target/powerpc/darwin-split-ld-stret.c
+ c45226a99273c8755ce33ff73f22d3b3  gcc/testsuite/gcc.target/powerpc/darwin-structs-0.h
  548fc585bcbf766f23bef7319f0b0a18  gcc/testsuite/gcc.target/powerpc/darwin64-abi.c
  5df8870892f8ad5f8ea3060c6c5b82b1  gcc/testsuite/gcc.target/powerpc/dfmode_off.c
  030fee52bc4732793404bc93dfb61c48  gcc/testsuite/gcc.target/powerpc/dform-1.c
*************** b681248afe4bdb1d889c6999e517fe7f  gcc/te
*** 71011,71017 ****
  677059b338aae8245e5715c1bf783dd9  gcc/testsuite/gcc.target/powerpc/fp128_conversions.c
  87367128477fa0028f5db348e8727505  gcc/testsuite/gcc.target/powerpc/fusion-p10-2logical.c
  15196f9ab6aa2418751a7940e2c689cd  gcc/testsuite/gcc.target/powerpc/fusion-p10-addadd.c
! f158c23481154ab06c25cbdd745dec8d  gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
  dcbebe071d63c21a542a5715031d4d82  gcc/testsuite/gcc.target/powerpc/fusion-p10-logadd.c
  4bdf54c34acc51427043fafe760993e1  gcc/testsuite/gcc.target/powerpc/fusion-p10-stst.c
  2016e7aba1138d1b75643f27f6d362c9  gcc/testsuite/gcc.target/powerpc/fusion-p10-stst2.c
--- 71141,71147 ----
  677059b338aae8245e5715c1bf783dd9  gcc/testsuite/gcc.target/powerpc/fp128_conversions.c
  87367128477fa0028f5db348e8727505  gcc/testsuite/gcc.target/powerpc/fusion-p10-2logical.c
  15196f9ab6aa2418751a7940e2c689cd  gcc/testsuite/gcc.target/powerpc/fusion-p10-addadd.c
! 7ad30edab6bf65e71b087740ec0a7663  gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
  dcbebe071d63c21a542a5715031d4d82  gcc/testsuite/gcc.target/powerpc/fusion-p10-logadd.c
  4bdf54c34acc51427043fafe760993e1  gcc/testsuite/gcc.target/powerpc/fusion-p10-stst.c
  2016e7aba1138d1b75643f27f6d362c9  gcc/testsuite/gcc.target/powerpc/fusion-p10-stst2.c
*************** a415b80ac7d3605461a355a307f12336  gcc/te
*** 71103,71110 ****
  758a89dcb12764d68855b09f85e3a355  gcc/testsuite/gcc.target/powerpc/mmx-punpcklbw-1.c
  bc09ccd31ca386dda15202c6adf9371a  gcc/testsuite/gcc.target/powerpc/mmx-punpckldq-1.c
  44ea7227a4af1aed1643b840469d076d  gcc/testsuite/gcc.target/powerpc/mmx-punpcklwd-1.c
! 180bf46e92dd9c837dbbc9cb04dd70c9  gcc/testsuite/gcc.target/powerpc/mod-1.c
! f86f87dd7c82f05785a8e530a4718235  gcc/testsuite/gcc.target/powerpc/mod-2.c
  b3bf87376bd60d32d00ef203e1cf7d6e  gcc/testsuite/gcc.target/powerpc/mod-vectorize.c
  2a62a820771528492abcb2b5b082d93d  gcc/testsuite/gcc.target/powerpc/mul-vectorize-1.c
  0756792d071f22b4d0d92c56ab912d25  gcc/testsuite/gcc.target/powerpc/mul-vectorize-2.c
--- 71233,71240 ----
  758a89dcb12764d68855b09f85e3a355  gcc/testsuite/gcc.target/powerpc/mmx-punpcklbw-1.c
  bc09ccd31ca386dda15202c6adf9371a  gcc/testsuite/gcc.target/powerpc/mmx-punpckldq-1.c
  44ea7227a4af1aed1643b840469d076d  gcc/testsuite/gcc.target/powerpc/mmx-punpcklwd-1.c
! 727ad93993ba39773cf01458fedef7c1  gcc/testsuite/gcc.target/powerpc/mod-1.c
! 2832a9d4f2590d3b9c3fdf8c23e24efc  gcc/testsuite/gcc.target/powerpc/mod-2.c
  b3bf87376bd60d32d00ef203e1cf7d6e  gcc/testsuite/gcc.target/powerpc/mod-vectorize.c
  2a62a820771528492abcb2b5b082d93d  gcc/testsuite/gcc.target/powerpc/mul-vectorize-1.c
  0756792d071f22b4d0d92c56ab912d25  gcc/testsuite/gcc.target/powerpc/mul-vectorize-2.c
*************** b96c1a1a69bfb6f4e16a5153a31d50f7  gcc/te
*** 71131,71137 ****
  8146fa4167bbb25230a315064dba5646  gcc/testsuite/gcc.target/powerpc/p10-bifs-vectorize-1.h
  0eb8d7ac53ad9776863e302b1988e792  gcc/testsuite/gcc.target/powerpc/p10-bifs-vectorize-run-1.c
  9c56caddea7ae0680f831cbc5cf18478  gcc/testsuite/gcc.target/powerpc/p10-identify.c
! 01797cdaaa29a1c3b7afa60542008236  gcc/testsuite/gcc.target/powerpc/p10-vdivq-vmodq.c
  7780b667e143b7a27c0d0e2bd81ed8e4  gcc/testsuite/gcc.target/powerpc/p10_vec_xl_sext.c
  6b3fcb3de6af2c0b3ca86ded91487247  gcc/testsuite/gcc.target/powerpc/p8-vec-xl-xst-v2.c
  54ba74546331eea6e76dd0101295232f  gcc/testsuite/gcc.target/powerpc/p8-vec-xl-xst.c
--- 71261,71267 ----
  8146fa4167bbb25230a315064dba5646  gcc/testsuite/gcc.target/powerpc/p10-bifs-vectorize-1.h
  0eb8d7ac53ad9776863e302b1988e792  gcc/testsuite/gcc.target/powerpc/p10-bifs-vectorize-run-1.c
  9c56caddea7ae0680f831cbc5cf18478  gcc/testsuite/gcc.target/powerpc/p10-identify.c
! 05222dfc42774b4f3acc94610419905e  gcc/testsuite/gcc.target/powerpc/p10-vdivq-vmodq.c
  7780b667e143b7a27c0d0e2bd81ed8e4  gcc/testsuite/gcc.target/powerpc/p10_vec_xl_sext.c
  6b3fcb3de6af2c0b3ca86ded91487247  gcc/testsuite/gcc.target/powerpc/p8-vec-xl-xst-v2.c
  54ba74546331eea6e76dd0101295232f  gcc/testsuite/gcc.target/powerpc/p8-vec-xl-xst.c
*************** f50d5d85d2fd6cdb2c24ba2f99c5ed50  gcc/te
*** 71401,71408 ****
--- 71531,71550 ----
  590060f31f74e624d8948e67f5efe8a9  gcc/testsuite/gcc.target/powerpc/pr108348-2.c
  d4695291f14d81c9829000b656211b10  gcc/testsuite/gcc.target/powerpc/pr108396.c
  d1ebac89ce86ba01adcab56447399dd9  gcc/testsuite/gcc.target/powerpc/pr108699.c
+ b3ad6c3610e28e21bfa05827c56b2b94  gcc/testsuite/gcc.target/powerpc/pr109069-1.c
+ d002a5bc24966823d127263f4f26fc6f  gcc/testsuite/gcc.target/powerpc/pr109069-2-run.c
+ 900c52091cc56fa5ba595a6ed758f527  gcc/testsuite/gcc.target/powerpc/pr109069-2.c
+ 1e04986cfbd8001de79d99e8138e518a  gcc/testsuite/gcc.target/powerpc/pr109069-2.h
  5d792150402910e5e2632539f0ba98c0  gcc/testsuite/gcc.target/powerpc/pr109178.c
  be09a09453e3025da575fddc32110640  gcc/testsuite/gcc.target/powerpc/pr109566.c
+ d746d0fb9156720298fa3c2071023bbf  gcc/testsuite/gcc.target/powerpc/pr109932-1.c
+ d746d0fb9156720298fa3c2071023bbf  gcc/testsuite/gcc.target/powerpc/pr109932-2.c
+ 30266f999ed968f6bfdc98dae3651704  gcc/testsuite/gcc.target/powerpc/pr110011.c
+ 0fc82ebefb1ad802aeb7fce96c922091  gcc/testsuite/gcc.target/powerpc/pr110411-1.c
+ 39880b05b13efbac2f1002f1730f701b  gcc/testsuite/gcc.target/powerpc/pr110411-2.c
+ c610c8d7cbb111b72025bba844602bd8  gcc/testsuite/gcc.target/powerpc/pr111380-1.c
+ 68b71977f7a24a5a6b3cb45a7941649a  gcc/testsuite/gcc.target/powerpc/pr111380-2.c
+ b61eff89fa46bd55405a0700c83058dd  gcc/testsuite/gcc.target/powerpc/pr113950.c
  c2f6d6cf82ef4931619d09e10a0a72aa  gcc/testsuite/gcc.target/powerpc/pr16155.c
  396ae287e72ecdda51bb3157818030a9  gcc/testsuite/gcc.target/powerpc/pr16286.c
  198d8a69d2887e8fadcb050d90e21aa6  gcc/testsuite/gcc.target/powerpc/pr16458-1.c
*************** c2bb4c50496aade60596e697b1d8782d  gcc/te
*** 71509,71514 ****
--- 71651,71657 ----
  f04c5add43326054cacbb6544404890d  gcc/testsuite/gcc.target/powerpc/pr70010-4.c
  1de006067bf04677e8e3043c80b99112  gcc/testsuite/gcc.target/powerpc/pr70010.c
  30bf5235bdce0bbd05169c7ec78fb273  gcc/testsuite/gcc.target/powerpc/pr70117.c
+ fa25257d80acb26f0f70a5da209dbad5  gcc/testsuite/gcc.target/powerpc/pr70243.c
  9f0a82f7f84690a18cb82bed87617073  gcc/testsuite/gcc.target/powerpc/pr70640.c
  9f7996dd7c38f201960362b08e509c7d  gcc/testsuite/gcc.target/powerpc/pr70669.c
  bb6ec828efc211131c5a036203ac7c94  gcc/testsuite/gcc.target/powerpc/pr70866.c
*************** a3fcebbcc49f4e8e80184966262e4f7c  gcc/te
*** 71653,71658 ****
--- 71796,71802 ----
  96eb5b3fd3f2812a018f01fd63b67f9b  gcc/testsuite/gcc.target/powerpc/pr88188-2.c
  9489612e4380ce85494a409bef20f69a  gcc/testsuite/gcc.target/powerpc/pr88188.c
  c75be0752698828e9a2843ce4464f296  gcc/testsuite/gcc.target/powerpc/pr88233.c
+ d2a99b9ff1da1e8d8120a3524731b2a5  gcc/testsuite/gcc.target/powerpc/pr88309.c
  21d3c2767889f61719f3852cb79cdc5a  gcc/testsuite/gcc.target/powerpc/pr88457.c
  edfc72e0b8e112e31e108fe03527f11f  gcc/testsuite/gcc.target/powerpc/pr88845.c
  dd95a2250e2db6dba5532882d6c626fd  gcc/testsuite/gcc.target/powerpc/pr88965.c
*************** a07b15408dfcb7108da14ce215101920  gcc/te
*** 71699,71704 ****
--- 71843,71849 ----
  f296eca9a733cf4bb4e198a3539e8cec  gcc/testsuite/gcc.target/powerpc/pr96506-1.c
  4057c480103b8c0cc29c131c3ab7cc50  gcc/testsuite/gcc.target/powerpc/pr96506-2.c
  713c433c1e5c80361a865ab817cd27b1  gcc/testsuite/gcc.target/powerpc/pr96530.c
+ 3af685337838b80c79ee574f658c90cc  gcc/testsuite/gcc.target/powerpc/pr96762.c
  7586cf00c4e30dcc232464c012e42760  gcc/testsuite/gcc.target/powerpc/pr96787-1.c
  6ea7fa7b0623f6ebd9652c5acea96884  gcc/testsuite/gcc.target/powerpc/pr96787-2.c
  54d85fa08f775bccdcae07e834cb4364  gcc/testsuite/gcc.target/powerpc/pr96808.c
*************** e02c101f5cebe3d8dfa298413197b1a7  gcc/te
*** 71728,71733 ****
--- 71873,71884 ----
  9fc46dc795793c68c68bcda62ba3bb06  gcc/testsuite/gcc.target/powerpc/pragma_power7.c
  45affca437d2aa50cc215daff62e39c1  gcc/testsuite/gcc.target/powerpc/pragma_power8.c
  62a405efa072f55c32f9a0806d8b7864  gcc/testsuite/gcc.target/powerpc/pragma_power9.c
+ dd58427154af8c0e48b89c68e7b990b6  gcc/testsuite/gcc.target/powerpc/predefine-p7-novsx.c
+ c99f3d7c3678eb974f17a9b2be94967f  gcc/testsuite/gcc.target/powerpc/predefine-p8-noaltivec-novsx.c
+ 17bbe3e953d2757e7a9bd15587a8e0df  gcc/testsuite/gcc.target/powerpc/predefine-p8-noaltivec.c
+ fb4cb3b55f779a8de1bb7d7d81b8e375  gcc/testsuite/gcc.target/powerpc/predefine-p8-novsx.c
+ 1c332ef8081d846326294ca260db1f44  gcc/testsuite/gcc.target/powerpc/predefine-p8-pragma-vsx.c
+ fd92078433cbb9d31fe530ccf8b4d53d  gcc/testsuite/gcc.target/powerpc/predefine-p9-novsx.c
  3d5b95888852df8700894887dd8bfb69  gcc/testsuite/gcc.target/powerpc/prefix-add.c
  22fb944e0690c3907fb29d60c970351a  gcc/testsuite/gcc.target/powerpc/prefix-di-constant.c
  8db875e0cffec64424eec6fa93ff403b  gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c
*************** c70df77dca2d9d059e9b22e279613d45  gcc/te
*** 72809,72814 ****
--- 72960,72966 ----
  78659ffafd452ac6a43859083b99d8ae  gcc/testsuite/gcc.target/riscv/pr104140.c
  62fc13de2a3248454aa1c822e4421155  gcc/testsuite/gcc.target/riscv/pr105314.c
  384ba4a03f71e10b20842ce4b6db9bfc  gcc/testsuite/gcc.target/riscv/pr105666.c
+ ef588c023f4aba7b77e02fe6afe13376  gcc/testsuite/gcc.target/riscv/pr114130.c
  10400130cc47973d43925669f3c795ed  gcc/testsuite/gcc.target/riscv/pr84660.c
  287e116d84e5eca39a410aca336f89b1  gcc/testsuite/gcc.target/riscv/pr93202.c
  4ec5e1eb12b4c6fb12d89619f49ef627  gcc/testsuite/gcc.target/riscv/pr93304.c
*************** d509ef7215df7a85f46d6cbdc8018e22  gcc/te
*** 74656,74661 ****
--- 74808,74814 ----
  753f5121640aa2d9e67d4f235bed8d2b  gcc/testsuite/gdc.dg/imports/pr108050/mod2.d
  b0fb7628aa04803e7405378e8ff66d8c  gcc/testsuite/gdc.dg/imports/pr108050/package.d
  c1371b9d51218c700b58595265d42b2d  gcc/testsuite/gdc.dg/imports/pr108877a.d
+ 9485d0785daa621b682e2b2f40ada8b1  gcc/testsuite/gdc.dg/imports/pr113125.d
  7ae8eee97923fab094ae5ca5a1eca902  gcc/testsuite/gdc.dg/imports/pr92216.d
  8120e5c267785a8c8b8eb099660e9a14  gcc/testsuite/gdc.dg/intrinsics.d
  2319a395f830492fe9ec7d713b9983a3  gcc/testsuite/gdc.dg/lto/lto.exp
*************** f4b93d30d706ee858eb3d1d73cac63f0  gcc/te
*** 74683,74689 ****
--- 74836,74854 ----
  6ccb68ecf420e903e3af60faf75fe297  gcc/testsuite/gdc.dg/pr106555.d
  9e838ba67909954cf1aa94614647413b  gcc/testsuite/gdc.dg/pr107592.d
  5e07b36b71c4e1c18324a1aa28b644c9  gcc/testsuite/gdc.dg/pr108050.d
+ 5971ddff852dbd035f6c3685d3460950  gcc/testsuite/gdc.dg/pr108842.d
  531ba2cfc6bb317d132b6b86e9221526  gcc/testsuite/gdc.dg/pr108877.d
+ d636f6d2baa8700a534dfd6a53a96d3c  gcc/testsuite/gdc.dg/pr110359.d
+ a9a8e149ae5d411f067a1e0312491f4d  gcc/testsuite/gdc.dg/pr110514a.d
+ f0bb47c02bfbb905cf063586cccf248d  gcc/testsuite/gdc.dg/pr110514b.d
+ 5c59d3e98036f128b405b1247659bb7f  gcc/testsuite/gdc.dg/pr110514c.d
+ 7124a74c780cc3de82649fa56120e037  gcc/testsuite/gdc.dg/pr110514d.d
+ 65d0d00a4d68ddc7476ea00fc7bcf91a  gcc/testsuite/gdc.dg/pr110712.d
+ a5d08c3adb631046916a34188c9fa67d  gcc/testsuite/gdc.dg/pr110959.d
+ 5bf4c18033711e862e1b35b2017684a3  gcc/testsuite/gdc.dg/pr112270.d
+ a2d402e0596a4abb1dc6e25b11e9aa9c  gcc/testsuite/gdc.dg/pr112285.d
+ 83f6a6a53d8587bd4243109d22d0b9f5  gcc/testsuite/gdc.dg/pr112290.d
+ 9b63f428c6cdc3f7abd69df6a3077880  gcc/testsuite/gdc.dg/pr113125.d
  d32aa8ed5ea10931be4ddb5bb9e863d8  gcc/testsuite/gdc.dg/pr89017.d
  53fa8db94d4ca3fc9ba83769733dc0e7  gcc/testsuite/gdc.dg/pr89041.d
  6c316b13f71ea31fcada56b58a41ebd1  gcc/testsuite/gdc.dg/pr89042a.d
*************** eb911ca49c3c33021dd97064b0459923  gcc/te
*** 74718,74724 ****
  5de3a811c709b67f83b605db00752f97  gcc/testsuite/gdc.dg/pr96869.d
  dc97b4112b134cae3d15aab92424d97a  gcc/testsuite/gdc.dg/pr96924.d
  9c4c7df565451e246ae0d226391657f5  gcc/testsuite/gdc.dg/pr97002.d
! 17590cd4f39c6a9b405c2a9fc1d8a2c7  gcc/testsuite/gdc.dg/pr98277.d
  a55903f9c72658c02ea18841f80bff0c  gcc/testsuite/gdc.dg/pr98427.d
  2ff2dd55acd20dffe2b5e58febe66c8b  gcc/testsuite/gdc.dg/pr98457.d
  3b746393a80b865ba51671750bc32bb9  gcc/testsuite/gdc.dg/pr99914.d
--- 74883,74889 ----
  5de3a811c709b67f83b605db00752f97  gcc/testsuite/gdc.dg/pr96869.d
  dc97b4112b134cae3d15aab92424d97a  gcc/testsuite/gdc.dg/pr96924.d
  9c4c7df565451e246ae0d226391657f5  gcc/testsuite/gdc.dg/pr97002.d
! 2c9329eeae2840ec46943ca4a0fe9482  gcc/testsuite/gdc.dg/pr98277.d
  a55903f9c72658c02ea18841f80bff0c  gcc/testsuite/gdc.dg/pr98427.d
  2ff2dd55acd20dffe2b5e58febe66c8b  gcc/testsuite/gdc.dg/pr98457.d
  3b746393a80b865ba51671750bc32bb9  gcc/testsuite/gdc.dg/pr99914.d
*************** a24df8e498053d7ab8325fc58ede1835  gcc/te
*** 74800,74805 ****
--- 74965,74974 ----
  bb3b5b6a4251926ee26d0a04242932f2  gcc/testsuite/gdc.dg/torture/pr108055.d
  41c17e6e62da4333262dbaa7b4e20510  gcc/testsuite/gdc.dg/torture/pr109108.d
  ff744a0a8c5876d35d04359a49ff0f84  gcc/testsuite/gdc.dg/torture/pr109144.d
+ 827ebe506781bb2fabf9411464081efe  gcc/testsuite/gdc.dg/torture/pr110516a.d
+ de9193ce38f7ef3ee1cc3a94fc8a92dc  gcc/testsuite/gdc.dg/torture/pr110516b.d
+ ad67c2aef0ecf01677e58695b0cc5d36  gcc/testsuite/gdc.dg/torture/pr113758.d
+ c3a3fcac804266bf984aad50e1f84157  gcc/testsuite/gdc.dg/torture/pr114171.d
  580aadb24b666799e25f1f02ef3b7bbb  gcc/testsuite/gdc.dg/torture/pr92309.d
  d5626e21f8cdc22799175cb6adfddfd6  gcc/testsuite/gdc.dg/torture/pr94424.d
  ae5b279461655f243d767b80a6d0bc1b  gcc/testsuite/gdc.dg/torture/pr94777b.d
*************** a3c24afe0733ea3b2f5afb6b064e3a71  gcc/te
*** 75424,75430 ****
  97cf4856aa8990a0fe28a6aabadd9a23  gcc/testsuite/gdc.test/compilable/pr9374.d
  7d64317f6d15dac75cff6ccb494e7ef9  gcc/testsuite/gdc.test/compilable/pr9383.d
  c87c15c1a87df8b9292800c22fb9d727  gcc/testsuite/gdc.test/compilable/pr9471.d
! 94597a8ad6d65c7f6a4f6e4b87c1e96d  gcc/testsuite/gdc.test/compilable/previewin.d
  600189166a802a0fdc956497de7efadd  gcc/testsuite/gdc.test/compilable/protattr.d
  20b93d64c0f1a131967d443511e7bb0c  gcc/testsuite/gdc.test/compilable/protection.d
  cb143d7698f10438d8c8cf1f61f40f48  gcc/testsuite/gdc.test/compilable/protection/aggregate/mod14275.d
--- 75593,75599 ----
  97cf4856aa8990a0fe28a6aabadd9a23  gcc/testsuite/gdc.test/compilable/pr9374.d
  7d64317f6d15dac75cff6ccb494e7ef9  gcc/testsuite/gdc.test/compilable/pr9383.d
  c87c15c1a87df8b9292800c22fb9d727  gcc/testsuite/gdc.test/compilable/pr9471.d
! 2026505b4c5299ff0ad966add4ef2d4e  gcc/testsuite/gdc.test/compilable/previewin.d
  600189166a802a0fdc956497de7efadd  gcc/testsuite/gdc.test/compilable/protattr.d
  20b93d64c0f1a131967d443511e7bb0c  gcc/testsuite/gdc.test/compilable/protection.d
  cb143d7698f10438d8c8cf1f61f40f48  gcc/testsuite/gdc.test/compilable/protection/aggregate/mod14275.d
*************** ebf5b789d4a31be2e939321d6490d585  gcc/te
*** 75836,75841 ****
--- 76005,76011 ----
  f8b8b1e13145441d1c69d68cde48b4c4  gcc/testsuite/gdc.test/compilable/test23166.d
  e839f70004c90a7a3783e0b05662a616  gcc/testsuite/gdc.test/compilable/test23172.d
  ce92a5a9e73ad19738962c2dadafec98  gcc/testsuite/gdc.test/compilable/test23258.d
+ fbd9917fb4ab47ea6bf89d5efae012f6  gcc/testsuite/gdc.test/compilable/test23978.d
  330c2acf4539ef672ad9c8cf0faa0c5e  gcc/testsuite/gdc.test/compilable/test25.d
  912661e1615a2dd8fe14dbd20528f7ba  gcc/testsuite/gdc.test/compilable/test2991.d
  b8623f405791e76ef4434794003e2abe  gcc/testsuite/gdc.test/compilable/test3004.d
*************** a4f94c1d976d5924615a341b59c02cff  gcc/te
*** 78112,78117 ****
--- 78282,78288 ----
  466e87133a4466011049e76fb568724a  gcc/testsuite/gdc.test/runnable/test22717.d
  4e7e9eefc89ca412abd98b785f5b0e5a  gcc/testsuite/gdc.test/runnable/test22945.d
  421e41360f8c6fc2814a061416876856  gcc/testsuite/gdc.test/runnable/test23.d
+ a63f3b63c344065bc882c726d79ee3f1  gcc/testsuite/gdc.test/runnable/test23010.d
  b760c0e7d084ffeb0648627187c08bb7  gcc/testsuite/gdc.test/runnable/test23083.d
  138e2256ce1c1f5109950477b38499c7  gcc/testsuite/gdc.test/runnable/test23181.d
  ed4925b273407fe3c1b1f148d9bb1dac  gcc/testsuite/gdc.test/runnable/test23234.d
*************** b85f62a13d3cc36bdf0f22f1d532889f  gcc/te
*** 80278,80288 ****
--- 80449,80461 ----
  433440f2bc7400a428ec319b70a4c7c4  gcc/testsuite/gfortran.dg/data_initialized.f90
  f7e6506db3e2a2cf1acda6f7ed5bb367  gcc/testsuite/gfortran.dg/data_initialized_2.f90
  7c629d12ce2ea9831030b62a2361a453  gcc/testsuite/gfortran.dg/data_initialized_3.f90
+ f2645f1fb686b434b8e069203f77e6d5  gcc/testsuite/gfortran.dg/data_initialized_4.f90
  f46c4682d75c7544431499a708875e0d  gcc/testsuite/gfortran.dg/data_inquiry_ref.f90
  fec356f784a1836f74f3dfdcc2aef50a  gcc/testsuite/gfortran.dg/data_invalid.f90
  75c2602db09095225b6558bf5ee7a00d  gcc/testsuite/gfortran.dg/data_namelist_conflict.f90
  bca7e4fe42af4bdc8c5dce540cb962e5  gcc/testsuite/gfortran.dg/data_pointer_1.f90
  9d3ff2b5b9a7538d379089fe08ecb0b3  gcc/testsuite/gfortran.dg/data_pointer_2.f90
+ a2552f985f60c37bffc14327b45be315  gcc/testsuite/gfortran.dg/data_pointer_3.f90
  20f92cb056c2de7e78393cf1bd92793a  gcc/testsuite/gfortran.dg/data_stmt_pointer.f90
  ea42e7a04380338a9946ffc999ea6767  gcc/testsuite/gfortran.dg/data_substring.f90
  503918b2128c29daa249b849ffe01756  gcc/testsuite/gfortran.dg/data_value_1.f90
*************** c8ca7a67e0b9c502e7883c6187a3b1f3  gcc/te
*** 80467,80472 ****
--- 80640,80646 ----
  78fa09124fe9b69cd259177c36a08282  gcc/testsuite/gfortran.dg/deferred_character_34.f90
  90f06c61f4e28e5c0cd42eea0caba538  gcc/testsuite/gfortran.dg/deferred_character_35.f90
  f69f56fb4872918c466c7554afc79da9  gcc/testsuite/gfortran.dg/deferred_character_36.f90
+ 0c1889dba05d51d0a09b189a6caa16c0  gcc/testsuite/gfortran.dg/deferred_character_37.f90
  5eede6c791f6d272034f9b84850ac6af  gcc/testsuite/gfortran.dg/deferred_character_4.f90
  981b809300de368e8fac65be4b40099c  gcc/testsuite/gfortran.dg/deferred_character_5.f90
  b8df78111bec4d4d4b97da6a15228361  gcc/testsuite/gfortran.dg/deferred_character_6.f90
*************** a1e709d7c93853353c0797ba2949dca8  gcc/te
*** 80584,80590 ****
  e5f02b68e5aa2fee50c3ff70ad3d8f97  gcc/testsuite/gfortran.dg/derived_comp_array_ref_5.f90
  026bd8fa710214d25691eae8c1dbcdfd  gcc/testsuite/gfortran.dg/derived_comp_array_ref_6.f90
  0bee796fdb071ab50d5faf5c678fefa5  gcc/testsuite/gfortran.dg/derived_comp_array_ref_7.f90
! 3ac6e6c4ed41e85971024e19ad69e6a1  gcc/testsuite/gfortran.dg/derived_comp_array_ref_8.f90
  568b11dc7307172904079506d19d6593  gcc/testsuite/gfortran.dg/derived_constructor_char_1.f90
  36d65cd99e01688bd380279fd0c74558  gcc/testsuite/gfortran.dg/derived_constructor_char_2.f90
  3c2f8f5e24883308b8a24313e9e5df89  gcc/testsuite/gfortran.dg/derived_constructor_char_3.f90
--- 80758,80764 ----
  e5f02b68e5aa2fee50c3ff70ad3d8f97  gcc/testsuite/gfortran.dg/derived_comp_array_ref_5.f90
  026bd8fa710214d25691eae8c1dbcdfd  gcc/testsuite/gfortran.dg/derived_comp_array_ref_6.f90
  0bee796fdb071ab50d5faf5c678fefa5  gcc/testsuite/gfortran.dg/derived_comp_array_ref_7.f90
! 9fbdd747401a2ec50f066475c79222bc  gcc/testsuite/gfortran.dg/derived_comp_array_ref_8.f90
  568b11dc7307172904079506d19d6593  gcc/testsuite/gfortran.dg/derived_constructor_char_1.f90
  36d65cd99e01688bd380279fd0c74558  gcc/testsuite/gfortran.dg/derived_constructor_char_2.f90
  3c2f8f5e24883308b8a24313e9e5df89  gcc/testsuite/gfortran.dg/derived_constructor_char_3.f90
*************** ce817f495edb0ac306d6ae1052014e67  gcc/te
*** 81038,81043 ****
--- 81212,81218 ----
  a1de3ecdc32a070009986504b0fcaf97  gcc/testsuite/gfortran.dg/finalize_8.f03
  2127f420195e5f6cdb58fe18800b4c33  gcc/testsuite/gfortran.dg/finalize_9.f90
  bf61238b3b7b6fc0fa0299fb54103da5  gcc/testsuite/gfortran.dg/findloc_1.f90
+ a0e3df827bf32fe2c2f8909306f1c0d5  gcc/testsuite/gfortran.dg/findloc_10.f90
  64ead876be3dc730e11de6b0cdf756a3  gcc/testsuite/gfortran.dg/findloc_2.f90
  c2d255c860f923ee454d9af3f7906dcc  gcc/testsuite/gfortran.dg/findloc_3.f90
  bd9a353d401afba38b6ad5f47b5ae41f  gcc/testsuite/gfortran.dg/findloc_4.f90
*************** bd9a353d401afba38b6ad5f47b5ae41f  gcc/te
*** 81045,81050 ****
--- 81220,81226 ----
  b80ec5f6b587bbcad7647fce5f51e6f2  gcc/testsuite/gfortran.dg/findloc_6.f90
  419ae318160319ea2e9ffb1a589e850d  gcc/testsuite/gfortran.dg/findloc_7.f90
  1fa6e9b23d9f1915dc2131a48feec745  gcc/testsuite/gfortran.dg/findloc_8.f90
+ 963d8fa72a02646044c6f01d4b868b75  gcc/testsuite/gfortran.dg/findloc_9.f90
  dcdc431d3eebcd38c61326f1e9a107c4  gcc/testsuite/gfortran.dg/float_1.f90
  6d61a0e1310090a27fbd2ef3d9f7ea19  gcc/testsuite/gfortran.dg/flush_1.f90
  dfe8c326dde7ba4070312da0fb9fb955  gcc/testsuite/gfortran.dg/fmt_bz_bn.f
*************** f523f11e31c8d7a378a90e54f4cc9a88  gcc/te
*** 81863,81868 ****
--- 82039,82045 ----
  8d0eb4ba7d5d6e2c9ffeb53bd0b900ec  gcc/testsuite/gfortran.dg/gomp/pr103695.f90
  b229abc8cb06bd3633deb0bb940ede08  gcc/testsuite/gfortran.dg/gomp/pr104131.f90
  39842b4010b4165bbe821ffc8a903991  gcc/testsuite/gfortran.dg/gomp/pr104757.f90
+ 616305573acc701769497c1eee637edc  gcc/testsuite/gfortran.dg/gomp/pr114825.f90
  9a6817790a272cd8153d4303d324c00f  gcc/testsuite/gfortran.dg/gomp/pr26224.f
  d2c74a71f2bea0005d853821e6f0142c  gcc/testsuite/gfortran.dg/gomp/pr27573.f90
  a65c4577a606ba1bdab50e690b269b04  gcc/testsuite/gfortran.dg/gomp/pr29759.f90
*************** b75cb93f87f099ad715aceb9cb7b1bf2  gcc/te
*** 82336,82341 ****
--- 82513,82519 ----
  156dc7e9c954310ba5c74c0fbcaa4f42  gcc/testsuite/gfortran.dg/implied_do_io_5.f90
  1f7a9307002a1f0f2a5f8eb76998dcda  gcc/testsuite/gfortran.dg/implied_do_io_6.f90
  2b548a8a46da28ac4ce23e2509a886fc  gcc/testsuite/gfortran.dg/implied_do_io_7.f90
+ 1b11291348a686162c0e48c6b1b5cd66  gcc/testsuite/gfortran.dg/implied_do_io_8.f90
  a8761a2aaffb7680e80dcad5eceada12  gcc/testsuite/gfortran.dg/implied_shape_1.f08
  f9528d7042bf84bf037d6e2b109272ec  gcc/testsuite/gfortran.dg/implied_shape_2.f90
  1b2b68c816459c1a9395771e9851de87  gcc/testsuite/gfortran.dg/implied_shape_3.f08
*************** c7884979306076731054566268cfb979  gcc/te
*** 83362,83368 ****
  eb6af590881f3e995fc6b2c78089f277  gcc/testsuite/gfortran.dg/nullify_1.f
  f202e3843710f9492560538fa53c3847  gcc/testsuite/gfortran.dg/nullify_2.f90
  768d37ebff7930db8f8a99ac16b90d32  gcc/testsuite/gfortran.dg/nullify_3.f90
! 5917ff71bf25a141d882878e441dc15d  gcc/testsuite/gfortran.dg/nullify_4.f90
  bcf5d721d90103bd1208f8548c93c54e  gcc/testsuite/gfortran.dg/num_images_1.f90
  2b630ef1ec72104833ded7049a1347a1  gcc/testsuite/gfortran.dg/o_fast_stacksize.f90
  97d9003b405f5e3d56a941b54189717c  gcc/testsuite/gfortran.dg/old_style_init.f90
--- 83540,83546 ----
  eb6af590881f3e995fc6b2c78089f277  gcc/testsuite/gfortran.dg/nullify_1.f
  f202e3843710f9492560538fa53c3847  gcc/testsuite/gfortran.dg/nullify_2.f90
  768d37ebff7930db8f8a99ac16b90d32  gcc/testsuite/gfortran.dg/nullify_3.f90
! 3f59630d77d85f381c44bc0119d513ee  gcc/testsuite/gfortran.dg/nullify_4.f90
  bcf5d721d90103bd1208f8548c93c54e  gcc/testsuite/gfortran.dg/num_images_1.f90
  2b630ef1ec72104833ded7049a1347a1  gcc/testsuite/gfortran.dg/o_fast_stacksize.f90
  97d9003b405f5e3d56a941b54189717c  gcc/testsuite/gfortran.dg/old_style_init.f90
*************** f67cfd0ae4d38f1ca5dc8d7f6e954087  gcc/te
*** 83493,83498 ****
--- 83671,83677 ----
  1f42496cb72089bef450a6df6a13c299  gcc/testsuite/gfortran.dg/pdt_30.f90
  d586eb557b29a67b9fa981d71d443c8b  gcc/testsuite/gfortran.dg/pdt_31.f03
  e5bda49b00d9e9f9b204003142ebb089  gcc/testsuite/gfortran.dg/pdt_32.f03
+ a7f1b97a8aa1c6a2bd8968ace7c2f8a9  gcc/testsuite/gfortran.dg/pdt_33.f03
  9779f8b6736c414d2620a7f8234f3e40  gcc/testsuite/gfortran.dg/pdt_4.f03
  65d2ad728417ad3174fc1ce2b51a458d  gcc/testsuite/gfortran.dg/pdt_6.f03
  d2c9dae0c6e2385c5712aba8e12a70ba  gcc/testsuite/gfortran.dg/pdt_7.f03
*************** f4aaac7aac9367d9adf2efb9ee95ee74  gcc/te
*** 83555,83561 ****
  3c38f9677dcc8f4e2c42a0fd0cdeaa1d  gcc/testsuite/gfortran.dg/pointer_init_3.f90
  3247bb0ee74a49cfeb46ba67cba9f540  gcc/testsuite/gfortran.dg/pointer_init_4.f90
  caa2926d7c04c6e94cd297a75e4b5b27  gcc/testsuite/gfortran.dg/pointer_init_5.f90
! 859dd7c2364c1c9047201cb2598f2828  gcc/testsuite/gfortran.dg/pointer_init_6.f90
  04a911b96a459127d681989557ce10aa  gcc/testsuite/gfortran.dg/pointer_init_7.f90
  34debb190232d7a7d7ce70fab69c74a1  gcc/testsuite/gfortran.dg/pointer_init_8.f90
  ae06d6761f5e36e2c2e46067aa089b8e  gcc/testsuite/gfortran.dg/pointer_init_9.f90
--- 83734,83740 ----
  3c38f9677dcc8f4e2c42a0fd0cdeaa1d  gcc/testsuite/gfortran.dg/pointer_init_3.f90
  3247bb0ee74a49cfeb46ba67cba9f540  gcc/testsuite/gfortran.dg/pointer_init_4.f90
  caa2926d7c04c6e94cd297a75e4b5b27  gcc/testsuite/gfortran.dg/pointer_init_5.f90
! eaaaba556287aabe0b6479c87a095df3  gcc/testsuite/gfortran.dg/pointer_init_6.f90
  04a911b96a459127d681989557ce10aa  gcc/testsuite/gfortran.dg/pointer_init_7.f90
  34debb190232d7a7d7ce70fab69c74a1  gcc/testsuite/gfortran.dg/pointer_init_8.f90
  ae06d6761f5e36e2c2e46067aa089b8e  gcc/testsuite/gfortran.dg/pointer_init_9.f90
*************** e83cb447f532a018a571c0eb3b9813ac  gcc/te
*** 83632,83637 ****
--- 83811,83818 ----
  529d8c5aafc7e0dd0a65860ed5f85bcf  gcc/testsuite/gfortran.dg/pr103691.f90
  448c7638e7741c015d95260e6491d8fa  gcc/testsuite/gfortran.dg/pr103692.f90
  7880bd79a12dd5ee034f461bbaebed02  gcc/testsuite/gfortran.dg/pr103694.f90
+ 8af96c30a623abf7d639ba532fd9c9ac  gcc/testsuite/gfortran.dg/pr103715.f90
+ c44f10e51915699bd10aa414c56da370  gcc/testsuite/gfortran.dg/pr103716.f90
  3a28632a1496231fb208ccbe80ac9bc8  gcc/testsuite/gfortran.dg/pr103898.f90
  9c2a780c1ca6904bb5164e252d9e5455  gcc/testsuite/gfortran.dg/pr104210.f90
  73191330286eb3bf2c13130685c97c95  gcc/testsuite/gfortran.dg/pr104211.f90
*************** f2033aa803ce0a0763522fb821b7bdf6  gcc/te
*** 83642,83647 ****
--- 83823,83829 ----
  5c1153d4a81aef8918afa2d0f27d3085  gcc/testsuite/gfortran.dg/pr104571.f90
  0d8084e6020a7001ebdb9b59d688556e  gcc/testsuite/gfortran.dg/pr104716.f
  7a5b7a18d621b5e1b9d04b73e259ddd4  gcc/testsuite/gfortran.dg/pr104849.f90
+ 35a7804825dacf412e34e3f973b467f1  gcc/testsuite/gfortran.dg/pr104908.f90
  22283af469347d85bd1fe4dae42939a3  gcc/testsuite/gfortran.dg/pr105230.f90
  04437d9e5ce70eee9f187cabd7a3ae39  gcc/testsuite/gfortran.dg/pr105633.f90
  d4e9f09fafa1c1f5e009aedb22732715  gcc/testsuite/gfortran.dg/pr105954.f90
*************** d4b65efea892e3a54acdb92a298fc582  gcc/te
*** 83653,83659 ****
--- 83835,83843 ----
  e1ccca85dc432ca649742c05520157d9  gcc/testsuite/gfortran.dg/pr106945.f90
  a9c6ba4d14cec93cd2edec54fda6a916  gcc/testsuite/gfortran.dg/pr106985.f90
  eb96b826eeaf84f157c8635706721d40  gcc/testsuite/gfortran.dg/pr106986.f90
+ 054c58cb24c0bee4ea0b5fcf3cdbf86d  gcc/testsuite/gfortran.dg/pr106999.f90
  11beaeea87162696e195837c5224fa2d  gcc/testsuite/gfortran.dg/pr107054.f90
+ 7bf1462b79c3092315b66457dbab371c  gcc/testsuite/gfortran.dg/pr107397.f90
  ba47b0afdca4ac305945fe0fc5dcb1d2  gcc/testsuite/gfortran.dg/pr107872.f90
  cbd5ae902fd5f6bd7cdb6f65c664ea22  gcc/testsuite/gfortran.dg/pr108010.f90
  51c1978cd57328dca2798eaa646a34b7  gcc/testsuite/gfortran.dg/pr108131.f90
*************** ed294cde0b27b346f37fa7a32bf91ea7  gcc/te
*** 83665,83670 ****
--- 83849,83857 ----
  1836eed7a2cdfcdba4e590204735e288  gcc/testsuite/gfortran.dg/pr108502.f90
  bb19038b0b7c42c6403475e34570ae3d  gcc/testsuite/gfortran.dg/pr108527.f90
  a367beafff806aa88b45192d28091201  gcc/testsuite/gfortran.dg/pr108529.f90
+ 898c3ea8360d1452c5f815b15dc6f6f8  gcc/testsuite/gfortran.dg/pr110221.f
+ 6176c5192c44068787a0e803e38dacbd  gcc/testsuite/gfortran.dg/pr111880.f90
+ d3d77a4c149cf5358eb97935171795fb  gcc/testsuite/gfortran.dg/pr114739.f90
  984f8307f36d56a0b48b5acce2dd5eb5  gcc/testsuite/gfortran.dg/pr12884.f
  64075248b9d1bffd6f380bb4e2a6eae0  gcc/testsuite/gfortran.dg/pr15129.f90
  e9cbd51db4e16292fc5dd1fead2e5a49  gcc/testsuite/gfortran.dg/pr15140.f90
*************** c7ad205e6ae355ab8ed11e2933c01c0c  gcc/te
*** 84181,84187 ****
  299cd4b3cd8f981657d37f9d6063d080  gcc/testsuite/gfortran.dg/pr88072.f90
  f2f69037301e6e901e6d032542873c68  gcc/testsuite/gfortran.dg/pr88116_1.f90
  99c41c8c4fc876568fd7e4f16f44a112  gcc/testsuite/gfortran.dg/pr88116_2.f90
! be2e4039f25dfb8ddb1d209b44b9ca1a  gcc/testsuite/gfortran.dg/pr88138.f90
  26a8b12bb3643c1cd5f28f77f51cd045  gcc/testsuite/gfortran.dg/pr88148.f90
  a554e5d57f7bc7a8d1b99acfd01fdaa9  gcc/testsuite/gfortran.dg/pr88155.f90
  86722bed377c20abe3aeeff940fd433d  gcc/testsuite/gfortran.dg/pr88169_1.f90
--- 84368,84374 ----
  299cd4b3cd8f981657d37f9d6063d080  gcc/testsuite/gfortran.dg/pr88072.f90
  f2f69037301e6e901e6d032542873c68  gcc/testsuite/gfortran.dg/pr88116_1.f90
  99c41c8c4fc876568fd7e4f16f44a112  gcc/testsuite/gfortran.dg/pr88116_2.f90
! 722913544c7c88e06a6a0faa72993b6a  gcc/testsuite/gfortran.dg/pr88138.f90
  26a8b12bb3643c1cd5f28f77f51cd045  gcc/testsuite/gfortran.dg/pr88148.f90
  a554e5d57f7bc7a8d1b99acfd01fdaa9  gcc/testsuite/gfortran.dg/pr88155.f90
  86722bed377c20abe3aeeff940fd433d  gcc/testsuite/gfortran.dg/pr88169_1.f90
*************** f5fd6e3fa110d4cb66c18b37bf885f26  gcc/te
*** 84220,84227 ****
  7ebf7d753067f8fb33a012241af298a7  gcc/testsuite/gfortran.dg/pr89664.f90
  51110a6eedd6a04c8d24b1221f417a4c  gcc/testsuite/gfortran.dg/pr89943_1.f90
  c8b61ebc8563f334c25fcd70c0534f36  gcc/testsuite/gfortran.dg/pr89943_2.f90
! 06b2d802f5d95257d8ae61d2b9c466d0  gcc/testsuite/gfortran.dg/pr89943_3.f90
! 76252e955978550643d5d0dc6f7e78e4  gcc/testsuite/gfortran.dg/pr89943_4.f90
  831d5fcec1de1ef5c5b043098058d7a8  gcc/testsuite/gfortran.dg/pr89956.f90
  f93d3cf614a3e39cf100823554d1a638  gcc/testsuite/gfortran.dg/pr90002.f90
  b4b80d372198c955d7e61bb3acdc89e1  gcc/testsuite/gfortran.dg/pr90021.f90
--- 84407,84414 ----
  7ebf7d753067f8fb33a012241af298a7  gcc/testsuite/gfortran.dg/pr89664.f90
  51110a6eedd6a04c8d24b1221f417a4c  gcc/testsuite/gfortran.dg/pr89943_1.f90
  c8b61ebc8563f334c25fcd70c0534f36  gcc/testsuite/gfortran.dg/pr89943_2.f90
! af61ebc1a556ae2b9d4b71efd216ca88  gcc/testsuite/gfortran.dg/pr89943_3.f90
! 144e6e7adcaa47ba26138bcf270ed91e  gcc/testsuite/gfortran.dg/pr89943_4.f90
  831d5fcec1de1ef5c5b043098058d7a8  gcc/testsuite/gfortran.dg/pr89956.f90
  f93d3cf614a3e39cf100823554d1a638  gcc/testsuite/gfortran.dg/pr90002.f90
  b4b80d372198c955d7e61bb3acdc89e1  gcc/testsuite/gfortran.dg/pr90021.f90
*************** ddf6a96210acd9846d96c96f4d91e038  gcc/te
*** 84642,84647 ****
--- 84829,84835 ----
  b6c22a1a69dfaeda3ed576a61060580d  gcc/testsuite/gfortran.dg/ptr-func-2.f90
  2878e4bfa1dc2e80db541a4a8304daaf  gcc/testsuite/gfortran.dg/ptr-func-3.f90
  cf5c200d1a2cf2ebf7bcad1269a85bc7  gcc/testsuite/gfortran.dg/ptr-func-4.f90
+ 2c7d131d00c984ad2bd259734d3144c7  gcc/testsuite/gfortran.dg/ptr-func-5.f90
  c3fb068a6513a1b586c18e7f98aee0e3  gcc/testsuite/gfortran.dg/ptr_func_assign_1.f08
  1e99e686da2b4f91da550dc5cbd8e4b4  gcc/testsuite/gfortran.dg/ptr_func_assign_2.f08
  deda23d08864e8fd5de581142c84d0c3  gcc/testsuite/gfortran.dg/ptr_func_assign_3.f08
*************** b7f688acbe6b27032e2d16f367317b58  gcc/te
*** 84934,84939 ****
--- 85122,85128 ----
  de48eaee117c9656a2db00a7ffbe9cb9  gcc/testsuite/gfortran.dg/select_rank_3.f90
  0eea4aff70c2008ccc3720a5ea3d8ef8  gcc/testsuite/gfortran.dg/select_rank_4.f90
  47b685d5206776c0ac8e9595eecd3af1  gcc/testsuite/gfortran.dg/select_rank_5.f90
+ 75a33bd7de6487f12dfd07ccafa44d4d  gcc/testsuite/gfortran.dg/select_rank_6.f90
  e91693e025c4186322babf06bd1ed7d5  gcc/testsuite/gfortran.dg/select_type_1.f03
  cfc1f17ea1421c22ece9a1d3936945cc  gcc/testsuite/gfortran.dg/select_type_10.f03
  e7fc4e45d93d73096eb5455e0afc91c2  gcc/testsuite/gfortran.dg/select_type_11.f03
*************** df7acd1342733a419754eb5cbcbc9a3f  gcc/te
*** 85002,85007 ****
--- 85191,85197 ----
  8c21b488e7773e67f9472b6a064868b9  gcc/testsuite/gfortran.dg/shape_1.f90
  2a136a103d2e76c84d90569febf9b783  gcc/testsuite/gfortran.dg/shape_10.f90
  052a4b2bd7fe6fdc1737283f758ffaec  gcc/testsuite/gfortran.dg/shape_11.f90
+ a886c4820db91aa38f79d36f82bd5be5  gcc/testsuite/gfortran.dg/shape_12.f90
  83165f49617d33a60724f58032240b93  gcc/testsuite/gfortran.dg/shape_2.f90
  3c6dfb31a52f344f631d36f369e069bf  gcc/testsuite/gfortran.dg/shape_3.f90
  3a839d4a8d0dfd6f0b50c08763804e26  gcc/testsuite/gfortran.dg/shape_4.f90
*************** b901a88b454d7825c0db0571e62c9944  gcc/te
*** 85544,85549 ****
--- 85734,85740 ----
  aa0dfadd71d3f03426fb0f846d07e63b  gcc/testsuite/gfortran.dg/use_29.f90
  9ca8384adf4fc331598e3bcd1cbb8ffe  gcc/testsuite/gfortran.dg/use_3.f90
  e3915d16f4c6f728ab91bc8f9638bf61  gcc/testsuite/gfortran.dg/use_30.f90
+ 38dd8041fc441aa36819446520a45884  gcc/testsuite/gfortran.dg/use_31.f90
  0c64a8a6f9a898ee90f8cccc71a7f782  gcc/testsuite/gfortran.dg/use_4.f90
  4e842fdc63e80db58b1de3e5a39f4573  gcc/testsuite/gfortran.dg/use_5.f90
  3ccf2307581a4141eac7b094a0461b40  gcc/testsuite/gfortran.dg/use_6.f90
*************** ad2a054aea75840d3ecf97c2faa0f183  gcc/te
*** 86229,86234 ****
--- 86420,86426 ----
  1406779a63f2f66b35098f98ca1b272a  gcc/testsuite/gnat.dg/abstract_state1.ads
  f8aa1b9b6d8605d6d8f8640d0af378d3  gcc/testsuite/gnat.dg/abstract_with_anonymous_result.adb
  1ab0ba269ad1e4ee5cc0b2651374a2a5  gcc/testsuite/gnat.dg/access1.adb
+ 6d63d89266459501cbab795f893986a6  gcc/testsuite/gnat.dg/access10.adb
  943026829386ee6566add3daafeab5a1  gcc/testsuite/gnat.dg/access2.adb
  2fa4700bffd8945e6a0f90d0475d0d69  gcc/testsuite/gnat.dg/access3.adb
  85a2981071298449aa62b8862bba17d1  gcc/testsuite/gnat.dg/access3.ads
*************** b7e24879332d72f72c91833c27ceef33  gcc/te
*** 87111,87116 ****
--- 87303,87309 ----
  d24c1f2d3c7c5ce631b8e820352deb2a  gcc/testsuite/gnat.dg/incomplete6.ads
  364f1ec537cca524899aa053257e6e22  gcc/testsuite/gnat.dg/incomplete7.adb
  1f23bb7ed3585206d4d2d3f99f9612a9  gcc/testsuite/gnat.dg/incomplete7.ads
+ f6095c751e19a6eb26e30eb71790897a  gcc/testsuite/gnat.dg/incomplete8.adb
  2d278c8204ff052ae1bda719e5201baa  gcc/testsuite/gnat.dg/init_scalar1.adb
  3479acc931417b59027c8944440c51a6  gcc/testsuite/gnat.dg/initializes.adb
  4c9f08106824a08b0375a36c6163ca80  gcc/testsuite/gnat.dg/initializes.ads
*************** f9299b514c5c25293c940907f5a4059d  gcc/te
*** 87520,87525 ****
--- 87713,87723 ----
  96951bbcc111d51906e9a661916136fc  gcc/testsuite/gnat.dg/opt100.adb
  0ab0b8847dab59911bd57ae14b153fc9  gcc/testsuite/gnat.dg/opt100_pkg.adb
  edbbd0b00edd7e8662b7c3b2dafa9ede  gcc/testsuite/gnat.dg/opt100_pkg.ads
+ e3943d4860baba3dd60a559ec3b4df36  gcc/testsuite/gnat.dg/opt102.adb
+ 50eeb5fbd50f6dc17baedbc5abb804d4  gcc/testsuite/gnat.dg/opt102_pkg.adb
+ 858a5d2e6efff052115969f794debc69  gcc/testsuite/gnat.dg/opt102_pkg.ads
+ 337a806a6dd1106b843af17238d34b5b  gcc/testsuite/gnat.dg/opt104.adb
+ 7ee5b6675114982998270619932802bf  gcc/testsuite/gnat.dg/opt104.ads
  5d50fb38b1ab84c39760906cb103c522  gcc/testsuite/gnat.dg/opt10_pkg.ads
  603264d4afdd2fd2174ea9c4cf4653ed  gcc/testsuite/gnat.dg/opt11.adb
  53160585b3a5d820b653e1e0d5f14c75  gcc/testsuite/gnat.dg/opt11.ads
*************** f3429f34adffc8bdea29c62318bbaca5  gcc/te
*** 87828,87833 ****
--- 88026,88032 ----
  bfd951f08498fce7551e86b55e6d2ac3  gcc/testsuite/gnat.dg/predicate13.ads
  56f5e4c67732ce94802a427f1ba725b4  gcc/testsuite/gnat.dg/predicate14.adb
  87259b1c34db44581ee72ed85285a720  gcc/testsuite/gnat.dg/predicate14.ads
+ a82cac3594ba22e63f0c9ecf8839521f  gcc/testsuite/gnat.dg/predicate15.adb
  98656679a5dd8965b27cb10a0871426e  gcc/testsuite/gnat.dg/predicate2-containers.ads
  cd331caa5287b813c3fc2421aa5bf64b  gcc/testsuite/gnat.dg/predicate2-project-name_values.ads
  a7858dfab3659f60abb1ca21bca1863e  gcc/testsuite/gnat.dg/predicate2-project-registry-attribute.ads
*************** e9400740e9c9b40bb4da23c840d60a4e  gcc/te
*** 88581,88586 ****
--- 88780,88788 ----
  2a80cd9d79a2211498b9098873988b99  gcc/testsuite/gnat.dg/varsize3_pkg1.ads
  76579acc09a2f8f0607f8fc2e0ebf727  gcc/testsuite/gnat.dg/varsize3_pkg2.ads
  6591a0959a5acd0eb22e76a4334deda6  gcc/testsuite/gnat.dg/varsize3_pkg3.ads
+ 4ae356def2518f00f7715d23974f1c0e  gcc/testsuite/gnat.dg/varsize4.adb
+ 07ce0052ebca8f1f930dd1780a210ec2  gcc/testsuite/gnat.dg/varsize4.ads
+ baf7f4a3d0c42677667707dbf4f0a7f7  gcc/testsuite/gnat.dg/varsize4_pkg.ads
  d9ec23ac3512e257b33927c47c0394e2  gcc/testsuite/gnat.dg/vect1.adb
  0717701347aab30e21961df79e6703b1  gcc/testsuite/gnat.dg/vect1.ads
  bced6ddbbb98e340411eba5bf191c0eb  gcc/testsuite/gnat.dg/vect10.adb
*************** d19a0449bac1fb497429a88904f3d658  gcc/te
*** 90698,90704 ****
  38e97f454caf88626c8bd5c84285fb07  gcc/testsuite/jit.dg/all-non-failing-tests.h
  7bc42e89ae77872c8fc581b4babf1832  gcc/testsuite/jit.dg/create-code-for-hello-world-executable.h
  2b9047a87199ea43ffa67df9e0b7f6f2  gcc/testsuite/jit.dg/harness.h
! c3b5a87cb24b18d5a584f92e61d9cbab  gcc/testsuite/jit.dg/jit.exp
  3fd6900c9d1d0edd53191542d96ffcec  gcc/testsuite/jit.dg/test-accessing-bitfield.c
  790dcf4e4a5c3dce84639ef815265f21  gcc/testsuite/jit.dg/test-accessing-struct.c
  60caef14bfb482627a962469a4524fce  gcc/testsuite/jit.dg/test-accessing-union.c
--- 90900,90906 ----
  38e97f454caf88626c8bd5c84285fb07  gcc/testsuite/jit.dg/all-non-failing-tests.h
  7bc42e89ae77872c8fc581b4babf1832  gcc/testsuite/jit.dg/create-code-for-hello-world-executable.h
  2b9047a87199ea43ffa67df9e0b7f6f2  gcc/testsuite/jit.dg/harness.h
! a42ee5a14e50fc71de0f4781681f7318  gcc/testsuite/jit.dg/jit.exp
  3fd6900c9d1d0edd53191542d96ffcec  gcc/testsuite/jit.dg/test-accessing-bitfield.c
  790dcf4e4a5c3dce84639ef815265f21  gcc/testsuite/jit.dg/test-accessing-struct.c
  60caef14bfb482627a962469a4524fce  gcc/testsuite/jit.dg/test-accessing-union.c
*************** b02011c7edbcfca8dfb3bd46815567fc  gcc/te
*** 90821,90827 ****
  6eaf152cbbd78ca034b5acc55db9a308  gcc/testsuite/jit.dg/test-global-init-rvalue.c
  1da38d55df3045d75370957a17d7cbc1  gcc/testsuite/jit.dg/test-global-set-initializer.c
  84606b0daf7effa1be60975ee90658d3  gcc/testsuite/jit.dg/test-hello-world.c
! e240f78f9d25dd2fc5fe93f144d8a4ce  gcc/testsuite/jit.dg/test-link-section-assembler.c
  282cb9f2d6f6d4287ac88a6e77bd3aa9  gcc/testsuite/jit.dg/test-linked-list.c
  6fd5f4e5a344608608f62d434dfbad85  gcc/testsuite/jit.dg/test-local-init-rvalue.c
  98ebb9b31736f32dab268c122c5d8d2d  gcc/testsuite/jit.dg/test-long-names.c
--- 91023,91029 ----
  6eaf152cbbd78ca034b5acc55db9a308  gcc/testsuite/jit.dg/test-global-init-rvalue.c
  1da38d55df3045d75370957a17d7cbc1  gcc/testsuite/jit.dg/test-global-set-initializer.c
  84606b0daf7effa1be60975ee90658d3  gcc/testsuite/jit.dg/test-hello-world.c
! e3f305b93559c865a49c727867b1c4bf  gcc/testsuite/jit.dg/test-link-section-assembler.c
  282cb9f2d6f6d4287ac88a6e77bd3aa9  gcc/testsuite/jit.dg/test-linked-list.c
  6fd5f4e5a344608608f62d434dfbad85  gcc/testsuite/jit.dg/test-local-init-rvalue.c
  98ebb9b31736f32dab268c122c5d8d2d  gcc/testsuite/jit.dg/test-long-names.c
*************** df424c268791473ace062ef873c388e2  gcc/te
*** 90840,90846 ****
  22ffc0e44111996fcb0ebd653190c983  gcc/testsuite/jit.dg/test-reflection.c
  38693c5e37ab7f738ee4f05bc4688ec0  gcc/testsuite/jit.dg/test-register-variable.c
  2819f51a64e319d697134a1319b760b1  gcc/testsuite/jit.dg/test-returning-function-ptr.c
! 00b7c9c55c8b7e6d14d1ad75ad07e5a7  gcc/testsuite/jit.dg/test-setting-alignment.c
  c8398a3f73dd4b289b3b1e611cb3bf23  gcc/testsuite/jit.dg/test-string-literal.c
  0ad799327d6cf83f94f71c26fc490f61  gcc/testsuite/jit.dg/test-sum-of-squares.c
  bca3f58a8fb9ee1db76c5883c6d533f3  gcc/testsuite/jit.dg/test-switch.c
--- 91042,91048 ----
  22ffc0e44111996fcb0ebd653190c983  gcc/testsuite/jit.dg/test-reflection.c
  38693c5e37ab7f738ee4f05bc4688ec0  gcc/testsuite/jit.dg/test-register-variable.c
  2819f51a64e319d697134a1319b760b1  gcc/testsuite/jit.dg/test-returning-function-ptr.c
! a5626b9d860be98a2945e6db0103eb86  gcc/testsuite/jit.dg/test-setting-alignment.c
  c8398a3f73dd4b289b3b1e611cb3bf23  gcc/testsuite/jit.dg/test-string-literal.c
  0ad799327d6cf83f94f71c26fc490f61  gcc/testsuite/jit.dg/test-sum-of-squares.c
  bca3f58a8fb9ee1db76c5883c6d533f3  gcc/testsuite/jit.dg/test-switch.c
*************** a3c51194521aeaec30746bcd09540ded  gcc/te
*** 90913,90919 ****
  fe565ed92d0666a7a8344d516a0fc123  gcc/testsuite/lib/scanwpaipa.exp
  cbf733ca1a40fb4aabb15514b6bb6bd9  gcc/testsuite/lib/target-libpath.exp
  aa367b5d414f9485192ae52d35e25660  gcc/testsuite/lib/target-supports-dg.exp
! 4a2340fe1656af188bf00f3bee35d655  gcc/testsuite/lib/target-supports.exp
  3b5645e1702774baa233a5e5076a70ad  gcc/testsuite/lib/target-utils.exp
  4632a9469eaaac6463c128b7895d3813  gcc/testsuite/lib/timeout-dg.exp
  01d2447cc2594c0de781959c09d306fa  gcc/testsuite/lib/timeout.exp
--- 91115,91121 ----
  fe565ed92d0666a7a8344d516a0fc123  gcc/testsuite/lib/scanwpaipa.exp
  cbf733ca1a40fb4aabb15514b6bb6bd9  gcc/testsuite/lib/target-libpath.exp
  aa367b5d414f9485192ae52d35e25660  gcc/testsuite/lib/target-supports-dg.exp
! f445a820a5c463439decaacfe3d072e4  gcc/testsuite/lib/target-supports.exp
  3b5645e1702774baa233a5e5076a70ad  gcc/testsuite/lib/target-utils.exp
  4632a9469eaaac6463c128b7895d3813  gcc/testsuite/lib/timeout-dg.exp
  01d2447cc2594c0de781959c09d306fa  gcc/testsuite/lib/timeout.exp
*************** df8e1651432977636bf9ca64823f6609  gcc/te
*** 90996,91002 ****
  ff09985655f304be699aaf3b8ac7d0c6  gcc/testsuite/obj-c++.dg/empty-private-1.mm
  64ae66c53d490094dd3c153f9c4a9c75  gcc/testsuite/obj-c++.dg/encode-1-next.mm
  575f87323105c855ece3eec6c673cfb0  gcc/testsuite/obj-c++.dg/encode-1.mm
! 7d7e6fc99c392bf563fae8bf357cc835  gcc/testsuite/obj-c++.dg/encode-10.mm
  4067b5ccc3ec6ec182e59982034a88a4  gcc/testsuite/obj-c++.dg/encode-2.mm
  c4e0785b4aee1c468f74005c33931f44  gcc/testsuite/obj-c++.dg/encode-3.mm
  3e70d4ed3f63678d5b05f4488150f57b  gcc/testsuite/obj-c++.dg/encode-4.mm
--- 91198,91204 ----
  ff09985655f304be699aaf3b8ac7d0c6  gcc/testsuite/obj-c++.dg/empty-private-1.mm
  64ae66c53d490094dd3c153f9c4a9c75  gcc/testsuite/obj-c++.dg/encode-1-next.mm
  575f87323105c855ece3eec6c673cfb0  gcc/testsuite/obj-c++.dg/encode-1.mm
! e4d16fff8957aa01b40df6db83660e61  gcc/testsuite/obj-c++.dg/encode-10.mm
  4067b5ccc3ec6ec182e59982034a88a4  gcc/testsuite/obj-c++.dg/encode-2.mm
  c4e0785b4aee1c468f74005c33931f44  gcc/testsuite/obj-c++.dg/encode-3.mm
  3e70d4ed3f63678d5b05f4488150f57b  gcc/testsuite/obj-c++.dg/encode-4.mm
*************** edc8405f3beeb6923d529479e62f98be  gcc/te
*** 91004,91010 ****
  d1824307e85027695c7f1f621635962f  gcc/testsuite/obj-c++.dg/encode-6.mm
  e8f3db69a8847b70c8bc969edd78dbb2  gcc/testsuite/obj-c++.dg/encode-7.mm
  7a1184e853bc44d526f960ab5978e148  gcc/testsuite/obj-c++.dg/encode-8.mm
! e01e96d007a042cff730ba43b17850f5  gcc/testsuite/obj-c++.dg/encode-9.mm
  e5b9f9a44ce01382be2feb246ccb5ad4  gcc/testsuite/obj-c++.dg/enhanced-proto-1.mm
  407cf4a13a526188246e3f874ce7ac48  gcc/testsuite/obj-c++.dg/enhanced-proto-2.mm
  3f2a93d293bef7fad64048537a3de594  gcc/testsuite/obj-c++.dg/except-1.mm
--- 91206,91212 ----
  d1824307e85027695c7f1f621635962f  gcc/testsuite/obj-c++.dg/encode-6.mm
  e8f3db69a8847b70c8bc969edd78dbb2  gcc/testsuite/obj-c++.dg/encode-7.mm
  7a1184e853bc44d526f960ab5978e148  gcc/testsuite/obj-c++.dg/encode-8.mm
! adb80618556ad5fbbf92001a241e0d74  gcc/testsuite/obj-c++.dg/encode-9.mm
  e5b9f9a44ce01382be2feb246ccb5ad4  gcc/testsuite/obj-c++.dg/enhanced-proto-1.mm
  407cf4a13a526188246e3f874ce7ac48  gcc/testsuite/obj-c++.dg/enhanced-proto-2.mm
  3f2a93d293bef7fad64048537a3de594  gcc/testsuite/obj-c++.dg/except-1.mm
*************** e16387e01018d3d54a2f32822682dac1  gcc/te
*** 91335,91341 ****
  4f3dd54a0c640d2b15ee1f79a8f18369  gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSDate.h
  54ffd1bfa79cf5dc99b3df101a7cd2e6  gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSEnumerator.h
  68c1d47ef6919edabb48b6f50f1a237d  gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSGeometry.h
! dc1b5416df768725686ab6df95dc7a40  gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h
  5696d61d4f4781658d55b84d5095e034  gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObject.h
  6b38d99bc66484db832fe9f58f7b8c5b  gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSRange.h
  b029cb9e81a51e8cdb7b9fbfdd1644a8  gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSString.h
--- 91537,91543 ----
  4f3dd54a0c640d2b15ee1f79a8f18369  gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSDate.h
  54ffd1bfa79cf5dc99b3df101a7cd2e6  gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSEnumerator.h
  68c1d47ef6919edabb48b6f50f1a237d  gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSGeometry.h
! 45941cd12df99357b4e75b6362c3612a  gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h
  5696d61d4f4781658d55b84d5095e034  gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObject.h
  6b38d99bc66484db832fe9f58f7b8c5b  gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSRange.h
  b029cb9e81a51e8cdb7b9fbfdd1644a8  gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSString.h
*************** b157b4e7044f8a4b50066404351184e9  gcc/tr
*** 91977,91983 ****
  a2daa87c3a6e418c66574ac39c4b15e0  gcc/tree-chrec.h
  2be27b22e3169b45888e9b65dabe685b  gcc/tree-complex.cc
  df961ddd006ed4d7ac5a75e47f26773d  gcc/tree-core.h
! c626668ce1384f088e4e25a70aec8b9f  gcc/tree-data-ref.cc
  a949c26e25237c08b9ccd6fe9b8b9bc5  gcc/tree-data-ref.h
  2b823bfa5d526de1e9c434480c0ec1a1  gcc/tree-dfa.cc
  0b6bc9f4562b6d4d959636f818032072  gcc/tree-dfa.h
--- 92179,92185 ----
  a2daa87c3a6e418c66574ac39c4b15e0  gcc/tree-chrec.h
  2be27b22e3169b45888e9b65dabe685b  gcc/tree-complex.cc
  df961ddd006ed4d7ac5a75e47f26773d  gcc/tree-core.h
! 19c2217edbc8fb256bc9c9dd528898da  gcc/tree-data-ref.cc
  a949c26e25237c08b9ccd6fe9b8b9bc5  gcc/tree-data-ref.h
  2b823bfa5d526de1e9c434480c0ec1a1  gcc/tree-dfa.cc
  0b6bc9f4562b6d4d959636f818032072  gcc/tree-dfa.h
*************** e35c2d4712dafbb07acf21e1b9026b1f  gcc/tr
*** 91993,92009 ****
  ebf44536d1655f7bc1689d20fee11feb  gcc/tree-hasher.h
  365ded3a313661e54e44d9c98984c4de  gcc/tree-if-conv.cc
  9e7278ba352bc75f64e06dbb302a4cbf  gcc/tree-if-conv.h
! ef984ea503a4a2a66476697c234a50b5  gcc/tree-inline.cc
  b51f97729f40e0ee84d73134f80560cc  gcc/tree-inline.h
! c80f777fdeb1cf7ef0b38b26c073401c  gcc/tree-into-ssa.cc
  322b9d77ac824db5c790f3c3b67ace47  gcc/tree-into-ssa.h
  d9f8288dc44be70602329547ca0e049b  gcc/tree-iterator.cc
  2b518733b893d8a6df3880d3907c179c  gcc/tree-iterator.h
! c6a74650d4b35d446f1a6f996b5b1c3e  gcc/tree-loop-distribution.cc
! 0abdcd2c7c425cc708ca16023c5a1123  gcc/tree-nested.cc
  69c73b03308d3ca47af9e15c750ba7e8  gcc/tree-nested.h
  242fbbf3b18e8eecaca863253b01cb78  gcc/tree-nrv.cc
! 5043a55bf6cc1c0c643908ad063086dd  gcc/tree-object-size.cc
  87e69dd59b2c11c0dff9af95c58965c8  gcc/tree-object-size.h
  1189f8c61dd50f371b6663918a7727d6  gcc/tree-outof-ssa.cc
  d961b07cd44eaf9cafbcfabb4369fd5e  gcc/tree-outof-ssa.h
--- 92195,92211 ----
  ebf44536d1655f7bc1689d20fee11feb  gcc/tree-hasher.h
  365ded3a313661e54e44d9c98984c4de  gcc/tree-if-conv.cc
  9e7278ba352bc75f64e06dbb302a4cbf  gcc/tree-if-conv.h
! 9ca318b70f5bf32d752fcf56ce1e0c45  gcc/tree-inline.cc
  b51f97729f40e0ee84d73134f80560cc  gcc/tree-inline.h
! f755ad1bab755167011c5bfecdd6769a  gcc/tree-into-ssa.cc
  322b9d77ac824db5c790f3c3b67ace47  gcc/tree-into-ssa.h
  d9f8288dc44be70602329547ca0e049b  gcc/tree-iterator.cc
  2b518733b893d8a6df3880d3907c179c  gcc/tree-iterator.h
! ecf1528a02ce3abefdc62d66de01444c  gcc/tree-loop-distribution.cc
! 688e3e148ea8903672d38101ae6fe6b8  gcc/tree-nested.cc
  69c73b03308d3ca47af9e15c750ba7e8  gcc/tree-nested.h
  242fbbf3b18e8eecaca863253b01cb78  gcc/tree-nrv.cc
! a98341cb84fcb50969baa5214592209e  gcc/tree-object-size.cc
  87e69dd59b2c11c0dff9af95c58965c8  gcc/tree-object-size.h
  1189f8c61dd50f371b6663918a7727d6  gcc/tree-outof-ssa.cc
  d961b07cd44eaf9cafbcfabb4369fd5e  gcc/tree-outof-ssa.h
*************** a9e072251c9cd071080f867b429c833b  gcc/tr
*** 92015,92031 ****
  5d8f11da41666287f34c5c5ff91732bd  gcc/tree-predcom.cc
  685a2a1bc806bfb60256953c02c0ba71  gcc/tree-pretty-print.cc
  bee23ec1af17a7d796af14ca70f8dc46  gcc/tree-pretty-print.h
! 4e8db3ed286087efc4275d75a8345f10  gcc/tree-profile.cc
! 2267c8a08be256094faf58eab483bb2e  gcc/tree-scalar-evolution.cc
  f5e09b2dd6f2fef9f16a58b4cd348400  gcc/tree-scalar-evolution.h
! bdd5e0cb99bb85230a953590c9d3075a  gcc/tree-sra.cc
  22ad2a6946f74c4f2e7665952622d9d0  gcc/tree-sra.h
  a4f99ae3557e1161cd896d23217b56a4  gcc/tree-ssa-address.cc
  4233bdbcb0d4183c9631eebafa6f4820  gcc/tree-ssa-address.h
  5daf63c693503c3da59da196d885d1e6  gcc/tree-ssa-alias-compare.h
  00863b99be56c3e8bd536dc74bdb5411  gcc/tree-ssa-alias.cc
  9693c083b57172a5de1c03311467b54f  gcc/tree-ssa-alias.h
! 36a4a2ae59fd23f04fbd98bf8e717a4c  gcc/tree-ssa-ccp.cc
  038e40c57d9c925b2f2ab27ce65aec68  gcc/tree-ssa-ccp.h
  d0589077e360719205f673fa28e27473  gcc/tree-ssa-coalesce.cc
  7df6905ad76540fc0ba6958ce894a5a4  gcc/tree-ssa-coalesce.h
--- 92217,92233 ----
  5d8f11da41666287f34c5c5ff91732bd  gcc/tree-predcom.cc
  685a2a1bc806bfb60256953c02c0ba71  gcc/tree-pretty-print.cc
  bee23ec1af17a7d796af14ca70f8dc46  gcc/tree-pretty-print.h
! 946fb99ef28d9b8456c053492adf3d3f  gcc/tree-profile.cc
! d3f86577bf5d45cdd84ea0e9e35dc52e  gcc/tree-scalar-evolution.cc
  f5e09b2dd6f2fef9f16a58b4cd348400  gcc/tree-scalar-evolution.h
! e934b1c86118e1814be6e8a8ac39b135  gcc/tree-sra.cc
  22ad2a6946f74c4f2e7665952622d9d0  gcc/tree-sra.h
  a4f99ae3557e1161cd896d23217b56a4  gcc/tree-ssa-address.cc
  4233bdbcb0d4183c9631eebafa6f4820  gcc/tree-ssa-address.h
  5daf63c693503c3da59da196d885d1e6  gcc/tree-ssa-alias-compare.h
  00863b99be56c3e8bd536dc74bdb5411  gcc/tree-ssa-alias.cc
  9693c083b57172a5de1c03311467b54f  gcc/tree-ssa-alias.h
! a0cea7e64f6a07c2f3ad60bcc122e610  gcc/tree-ssa-ccp.cc
  038e40c57d9c925b2f2ab27ce65aec68  gcc/tree-ssa-ccp.h
  d0589077e360719205f673fa28e27473  gcc/tree-ssa-coalesce.cc
  7df6905ad76540fc0ba6958ce894a5a4  gcc/tree-ssa-coalesce.h
*************** b5611be2889ac60f8358352f44be0eac  gcc/tr
*** 92034,92079 ****
  d9087990e3ccbe29be4cb2d6fbcd0d6b  gcc/tree-ssa-dce.h
  38e1cf32b4e25aa2758552af48728c9f  gcc/tree-ssa-dom.cc
  f163bc3e9903da9f8045d8369ae0a861  gcc/tree-ssa-dom.h
! 1b42f80cd56b7b80fdedf19070e1771c  gcc/tree-ssa-dse.cc
  195877f983e0a31af6302aed94fa678f  gcc/tree-ssa-dse.h
  2f7eb6688251cdb496e80893d05208fe  gcc/tree-ssa-forwprop.cc
! 01cb88691242bd822e285cee0991d29d  gcc/tree-ssa-ifcombine.cc
  2583b0542c537376d7d4e52a3a3ce910  gcc/tree-ssa-live.cc
  1d67651fbc8ab600f45126f148f4c12b  gcc/tree-ssa-live.h
  b584536fc99eb576420b3ef5e3780c49  gcc/tree-ssa-loop-ch.cc
! dcbf7a69fb8b686e4356221dc1b7d777  gcc/tree-ssa-loop-im.cc
! 0e82db34e6245ef507793cd8894b447b  gcc/tree-ssa-loop-ivcanon.cc
! 0a143703be12779c74424df733444477  gcc/tree-ssa-loop-ivopts.cc
  3f30c52cd6fd7f965316dafa58373681  gcc/tree-ssa-loop-ivopts.h
  ef807a1da16d0fd13015b7232cea5f9f  gcc/tree-ssa-loop-manip.cc
  d8ad877acd553ebd0bd25b5694a3faff  gcc/tree-ssa-loop-manip.h
  ee6dcea06f13f2e4ffeef5eb7dca0dbb  gcc/tree-ssa-loop-niter.cc
  7846c6b4a5c247d1cbdae546020ad25f  gcc/tree-ssa-loop-niter.h
! 14595cbe718de0b8d598cc311c9b902f  gcc/tree-ssa-loop-prefetch.cc
  757d0efec651140b554d079e79fd5977  gcc/tree-ssa-loop-split.cc
! f7436362de0b3fcd67ad43810db53479  gcc/tree-ssa-loop-unswitch.cc
  5d9355772a32a02f9de8b8da727fe954  gcc/tree-ssa-loop.cc
  16e3b759aa71fcd40fb9ac27f0b4552d  gcc/tree-ssa-loop.h
! f152809e819eb0986c6be0e8a5314c99  gcc/tree-ssa-math-opts.cc
  f0db024320e40ac1ac8d450e8be90f02  gcc/tree-ssa-math-opts.h
  99fc0aa9825a52457c111c1df6c54358  gcc/tree-ssa-operands.cc
  45c8305b030ec69139d01c326f9a1133  gcc/tree-ssa-operands.h
! 45d1b9dbe652edbd08734f14fd8cb203  gcc/tree-ssa-phiopt.cc
  35e3309df2c090d12494914f49fc1e1e  gcc/tree-ssa-phiprop.cc
! fb379cd0159c0885d7948216ffa8e749  gcc/tree-ssa-pre.cc
  3a55ddfc911130111194d8f209761e03  gcc/tree-ssa-propagate.cc
  7e14602488f8f1e7e754422dd9731b01  gcc/tree-ssa-propagate.h
! b1392b609cdfe9efdf50ccbbef5658f1  gcc/tree-ssa-reassoc.cc
  a2d407f6fd4aa95d7eb7ad8a17b81af4  gcc/tree-ssa-reassoc.h
  5a5f1e71f87f5ab41730b4c7fe0651bb  gcc/tree-ssa-sccvn.cc
  9b971767e8b1b24cc98c426f1f399ed8  gcc/tree-ssa-sccvn.h
  648524d5c619edb0acece29c53601b89  gcc/tree-ssa-scopedtables.cc
  9da7a798aaf58ceb04c796be96a5bdc8  gcc/tree-ssa-scopedtables.h
  1a01f1b2d173ce0bd6dc265a99316950  gcc/tree-ssa-sink.cc
! 2012a25aa20863b46230c40ae40b1b69  gcc/tree-ssa-strlen.cc
  c3601488e1adeaebe82eec4348f3568d  gcc/tree-ssa-strlen.h
! 25d1c78b94974440c9fc85ab6aeec599  gcc/tree-ssa-structalias.cc
! 1331a83a0763d00ff819b24064392d12  gcc/tree-ssa-tail-merge.cc
  7599bc99d54acc459659d85b787faee8  gcc/tree-ssa-ter.cc
  08299e87c1517c92eb914373542d3cc8  gcc/tree-ssa-ter.h
  f74ec8bee7ed7504fbe5b21a035e2ec3  gcc/tree-ssa-threadbackward.cc
--- 92236,92281 ----
  d9087990e3ccbe29be4cb2d6fbcd0d6b  gcc/tree-ssa-dce.h
  38e1cf32b4e25aa2758552af48728c9f  gcc/tree-ssa-dom.cc
  f163bc3e9903da9f8045d8369ae0a861  gcc/tree-ssa-dom.h
! 9e92b12de18963b66bd682029be71aea  gcc/tree-ssa-dse.cc
  195877f983e0a31af6302aed94fa678f  gcc/tree-ssa-dse.h
  2f7eb6688251cdb496e80893d05208fe  gcc/tree-ssa-forwprop.cc
! fa6f9132426613883a9a158014b2a7ea  gcc/tree-ssa-ifcombine.cc
  2583b0542c537376d7d4e52a3a3ce910  gcc/tree-ssa-live.cc
  1d67651fbc8ab600f45126f148f4c12b  gcc/tree-ssa-live.h
  b584536fc99eb576420b3ef5e3780c49  gcc/tree-ssa-loop-ch.cc
! 7bb09dec4a6ae87dd19896ba77ac4b4b  gcc/tree-ssa-loop-im.cc
! 595f63705e53fd8387b90a8ee3692ef5  gcc/tree-ssa-loop-ivcanon.cc
! 7c0b4c9c9a41e57bdc77ff9cfb33b9bb  gcc/tree-ssa-loop-ivopts.cc
  3f30c52cd6fd7f965316dafa58373681  gcc/tree-ssa-loop-ivopts.h
  ef807a1da16d0fd13015b7232cea5f9f  gcc/tree-ssa-loop-manip.cc
  d8ad877acd553ebd0bd25b5694a3faff  gcc/tree-ssa-loop-manip.h
  ee6dcea06f13f2e4ffeef5eb7dca0dbb  gcc/tree-ssa-loop-niter.cc
  7846c6b4a5c247d1cbdae546020ad25f  gcc/tree-ssa-loop-niter.h
! 508555a8a882dcaee120afeeada6f95d  gcc/tree-ssa-loop-prefetch.cc
  757d0efec651140b554d079e79fd5977  gcc/tree-ssa-loop-split.cc
! fd8e7ab6072c9318249e544a02ca3d0d  gcc/tree-ssa-loop-unswitch.cc
  5d9355772a32a02f9de8b8da727fe954  gcc/tree-ssa-loop.cc
  16e3b759aa71fcd40fb9ac27f0b4552d  gcc/tree-ssa-loop.h
! 939b791840e8142aabfcbc1e53ab8707  gcc/tree-ssa-math-opts.cc
  f0db024320e40ac1ac8d450e8be90f02  gcc/tree-ssa-math-opts.h
  99fc0aa9825a52457c111c1df6c54358  gcc/tree-ssa-operands.cc
  45c8305b030ec69139d01c326f9a1133  gcc/tree-ssa-operands.h
! 7729ecf4fe5c29c2a3c0d87f651e42fe  gcc/tree-ssa-phiopt.cc
  35e3309df2c090d12494914f49fc1e1e  gcc/tree-ssa-phiprop.cc
! f9e799527e96fb43c96edcf03ebb6a85  gcc/tree-ssa-pre.cc
  3a55ddfc911130111194d8f209761e03  gcc/tree-ssa-propagate.cc
  7e14602488f8f1e7e754422dd9731b01  gcc/tree-ssa-propagate.h
! 6e8f74fdfb4c39b9b305ee8ade1dfa2a  gcc/tree-ssa-reassoc.cc
  a2d407f6fd4aa95d7eb7ad8a17b81af4  gcc/tree-ssa-reassoc.h
  5a5f1e71f87f5ab41730b4c7fe0651bb  gcc/tree-ssa-sccvn.cc
  9b971767e8b1b24cc98c426f1f399ed8  gcc/tree-ssa-sccvn.h
  648524d5c619edb0acece29c53601b89  gcc/tree-ssa-scopedtables.cc
  9da7a798aaf58ceb04c796be96a5bdc8  gcc/tree-ssa-scopedtables.h
  1a01f1b2d173ce0bd6dc265a99316950  gcc/tree-ssa-sink.cc
! 181e1424785cbf0e1a240820e7712120  gcc/tree-ssa-strlen.cc
  c3601488e1adeaebe82eec4348f3568d  gcc/tree-ssa-strlen.h
! 162b5602b917c115869606301bf8da9f  gcc/tree-ssa-structalias.cc
! 2f25bfc0dc9f8ec66fc417c5c22d0f92  gcc/tree-ssa-tail-merge.cc
  7599bc99d54acc459659d85b787faee8  gcc/tree-ssa-ter.cc
  08299e87c1517c92eb914373542d3cc8  gcc/tree-ssa-ter.h
  f74ec8bee7ed7504fbe5b21a035e2ec3  gcc/tree-ssa-threadbackward.cc
*************** f74ec8bee7ed7504fbe5b21a035e2ec3  gcc/tr
*** 92083,92089 ****
  5cbd06b4671b9d3a386ae0b3b1899ff0  gcc/tree-ssa-threadupdate.h
  87d4c13c047088a0266b3ff765ee429e  gcc/tree-ssa-uncprop.cc
  7ed817cf5846d767d8b96f9e60bc058a  gcc/tree-ssa-uninit.cc
! 301dd3bbae1a92fdb0ae7b2cbb5971a5  gcc/tree-ssa.cc
  8c68b1470d74209ca93348eaff68f563  gcc/tree-ssa.h
  1e5a5a5e038804c8ae08600e168b502d  gcc/tree-ssanames.cc
  5f0afaa1eeaac0ca2f771408bdaf5c9d  gcc/tree-ssanames.h
--- 92285,92291 ----
  5cbd06b4671b9d3a386ae0b3b1899ff0  gcc/tree-ssa-threadupdate.h
  87d4c13c047088a0266b3ff765ee429e  gcc/tree-ssa-uncprop.cc
  7ed817cf5846d767d8b96f9e60bc058a  gcc/tree-ssa-uninit.cc
! e325a4a3353d342488995f82d5e0483b  gcc/tree-ssa.cc
  8c68b1470d74209ca93348eaff68f563  gcc/tree-ssa.h
  1e5a5a5e038804c8ae08600e168b502d  gcc/tree-ssanames.cc
  5f0afaa1eeaac0ca2f771408bdaf5c9d  gcc/tree-ssanames.h
*************** aafcaaf57b1b41ce694f51f37fe1dd93  gcc/tr
*** 92096,92128 ****
  9fe812d705ac88f473d91d7ced8745df  gcc/tree-switch-conversion.cc
  f9949ff32a719d47d731381154dd534c  gcc/tree-switch-conversion.h
  1a726f178c55eac3224071963ee9bb3a  gcc/tree-tailcall.cc
! 513bc4b334e877141928d0f73796f3bd  gcc/tree-vect-data-refs.cc
! 212ea4478045644f9da2032ca618a355  gcc/tree-vect-generic.cc
  d77cf2655cb870786e919f02d9b07f1e  gcc/tree-vect-loop-manip.cc
! 89f2128cc9f1b87079c896d12146ffa3  gcc/tree-vect-loop.cc
! cd711de8354580b4aa19eef890071fe8  gcc/tree-vect-patterns.cc
  db19be1249cd94d158a20e2be7032249  gcc/tree-vect-slp-patterns.cc
! 9a43fe7624cfa6c8550521c329469278  gcc/tree-vect-slp.cc
! 7cb2bb4be82d2abbcdef46346dc10101  gcc/tree-vect-stmts.cc
  17da0c4ee2c405d67d63509bd85f801c  gcc/tree-vector-builder.cc
  81e7b3c9a18c29b53f3f017109c91f6f  gcc/tree-vector-builder.h
  541c768983210e5d6b69b9ceeaf40e4b  gcc/tree-vectorizer.cc
  5a1d9b1a4fd93a1dc9773d46eaa80403  gcc/tree-vectorizer.h
  89443f1b171fee24a2d36f7d1af2b315  gcc/tree-vrp.cc
  9cb72e4782bdb3fb2fb9a04498598bf1  gcc/tree-vrp.h
! a2de7abc6b606b71f98be68100bd4a70  gcc/tree.cc
  45808a76997a44962fa135c3a7de1ff8  gcc/tree.def
  637a29beea44508096255de7a58c6860  gcc/tree.h
  789a781bb4a16a840a4d12b33e5e41aa  gcc/treestruct.def
  7176ab9942843346cd7a7e47f7b62463  gcc/tristate.cc
  9b9356511a9a18b1a38ed98eb7a8d3e0  gcc/tristate.h
! beaaf57de01c41199e3b6a9eb24fb143  gcc/tsan.cc
  20c3068b317a87ad36e2e439f2505566  gcc/tsan.h
  114597ac7dc093c760e9fc3ea6b82138  gcc/tsystem.h
  23d3ef3b350b5c0785589547a581b715  gcc/typeclass.h
  d38c58f87ee7ee53eb825a0444aea09b  gcc/typed-splay-tree.cc
  c8f92fd70553d3478d74451987ed8835  gcc/typed-splay-tree.h
! 6a8d8db3cf6d0d7de35a9c5f42e5c353  gcc/ubsan.cc
  e6a6b3805ac7207859f56a703a4cf905  gcc/ubsan.h
  b5748b6b0f57f1d91ae8016e87f5d411  gcc/valtrack.cc
  ad9b356abb114134e0ce58bf604c4a85  gcc/valtrack.h
--- 92298,92330 ----
  9fe812d705ac88f473d91d7ced8745df  gcc/tree-switch-conversion.cc
  f9949ff32a719d47d731381154dd534c  gcc/tree-switch-conversion.h
  1a726f178c55eac3224071963ee9bb3a  gcc/tree-tailcall.cc
! d4a4a21135fb985aa91937e6ba4037fa  gcc/tree-vect-data-refs.cc
! d1fc9b6c5543afd25e87854bb3508f49  gcc/tree-vect-generic.cc
  d77cf2655cb870786e919f02d9b07f1e  gcc/tree-vect-loop-manip.cc
! 7f5964b7413afc7d27c4bfb9eefe326c  gcc/tree-vect-loop.cc
! afdadaa3e7ffae199ce4c4aecbbd98ff  gcc/tree-vect-patterns.cc
  db19be1249cd94d158a20e2be7032249  gcc/tree-vect-slp-patterns.cc
! af6d455d103dc8f9c23ea1f8576825f1  gcc/tree-vect-slp.cc
! c2e7775bf7fd48f0f6b753bb6888f305  gcc/tree-vect-stmts.cc
  17da0c4ee2c405d67d63509bd85f801c  gcc/tree-vector-builder.cc
  81e7b3c9a18c29b53f3f017109c91f6f  gcc/tree-vector-builder.h
  541c768983210e5d6b69b9ceeaf40e4b  gcc/tree-vectorizer.cc
  5a1d9b1a4fd93a1dc9773d46eaa80403  gcc/tree-vectorizer.h
  89443f1b171fee24a2d36f7d1af2b315  gcc/tree-vrp.cc
  9cb72e4782bdb3fb2fb9a04498598bf1  gcc/tree-vrp.h
! 894f26dfce9d0188302e02f92fa3164d  gcc/tree.cc
  45808a76997a44962fa135c3a7de1ff8  gcc/tree.def
  637a29beea44508096255de7a58c6860  gcc/tree.h
  789a781bb4a16a840a4d12b33e5e41aa  gcc/treestruct.def
  7176ab9942843346cd7a7e47f7b62463  gcc/tristate.cc
  9b9356511a9a18b1a38ed98eb7a8d3e0  gcc/tristate.h
! 8919381ccc97b40411151098cfa9f4f4  gcc/tsan.cc
  20c3068b317a87ad36e2e439f2505566  gcc/tsan.h
  114597ac7dc093c760e9fc3ea6b82138  gcc/tsystem.h
  23d3ef3b350b5c0785589547a581b715  gcc/typeclass.h
  d38c58f87ee7ee53eb825a0444aea09b  gcc/typed-splay-tree.cc
  c8f92fd70553d3478d74451987ed8835  gcc/typed-splay-tree.h
! fb06f713782c4665a4b2f32ccf696707  gcc/ubsan.cc
  e6a6b3805ac7207859f56a703a4cf905  gcc/ubsan.h
  b5748b6b0f57f1d91ae8016e87f5d411  gcc/valtrack.cc
  ad9b356abb114134e0ce58bf604c4a85  gcc/valtrack.h
*************** d338ccdbfad0f64ecbdd1b67c8277705  gcc/va
*** 92135,92145 ****
  bc26a3485cb0a269944b49b2427ca012  gcc/value-range-equiv.cc
  b6d9efd1a637bb7e7bb66614921055be  gcc/value-range-equiv.h
  9ec3280a012fbd643f8fbbee8f79eeca  gcc/value-range.cc
! 473bc142d8c84cc76764637c005b943a  gcc/value-range.h
  10e20613642a5a9dfe658f7b7bee260b  gcc/value-relation.cc
  8e00a37814d00e977bd4878c88c6b9f0  gcc/value-relation.h
  93e740653e6cec3f6c4610b2fdee225a  gcc/var-tracking.cc
! 5edbd0093097da1ff9e3402d51c5be76  gcc/varasm.cc
  8d61ef065460d6dd2c76f09bed5abdfa  gcc/varasm.h
  fded5307f938c647643e0c2583d58779  gcc/varpool.cc
  b027979c03d820b6ac30b5ae30e840ff  gcc/vec-perm-indices.cc
--- 92337,92347 ----
  bc26a3485cb0a269944b49b2427ca012  gcc/value-range-equiv.cc
  b6d9efd1a637bb7e7bb66614921055be  gcc/value-range-equiv.h
  9ec3280a012fbd643f8fbbee8f79eeca  gcc/value-range.cc
! 69b2679c0b53e16d632831390c411b40  gcc/value-range.h
  10e20613642a5a9dfe658f7b7bee260b  gcc/value-relation.cc
  8e00a37814d00e977bd4878c88c6b9f0  gcc/value-relation.h
  93e740653e6cec3f6c4610b2fdee225a  gcc/var-tracking.cc
! 45bbba7f424b4970f2ccf2ec51d8d13e  gcc/varasm.cc
  8d61ef065460d6dd2c76f09bed5abdfa  gcc/varasm.h
  fded5307f938c647643e0c2583d58779  gcc/varpool.cc
  b027979c03d820b6ac30b5ae30e840ff  gcc/vec-perm-indices.cc
*************** c569eea2f11765b9f2dd3470d3bbbf4b  gcc/vr
*** 92158,92173 ****
  23d5a7e5548f4e13fc245d606c148f40  gcc/wide-int-bitmask.h
  483f48114286da1c540e3b6a9ec3e6b6  gcc/wide-int-print.cc
  09dba6185099df41595ab2939afa51a2  gcc/wide-int-print.h
! eee34cd0ae971df627b488114bed6b73  gcc/wide-int.cc
! e0eec42a4c843f3c3ea448e9f8e895f8  gcc/wide-int.h
  e82d97504c16e7a9d61318fafd536cac  gcc/xcoff.h
  fc8f6cd70740468b3d092d0a12d9c1b8  gcc/xcoffout.cc
  d675816050a9ff3c1178b9cdf507b9c2  gcc/xcoffout.h
! 92a46884b0bd7d7823480f152c32a2b7  gnattools/ChangeLog
  3e149f46f7f39c4f49e3e3449af997a3  gnattools/Makefile.in
  612bff48e9d0bfce4a8a8b2ce0e136ae  gnattools/configure
  5904825aa8ada9f931733a205c8ed847  gnattools/configure.ac
! 235aaa56a4f43a84a901cd414aba935f  gotools/ChangeLog
  5d56cc28c41dee982565dd2bb6835d75  gotools/Makefile.am
  1b3e301307fb3c8ef2e668e88e9da768  gotools/Makefile.in
  7e23031e2e274aaa07b61c1e8f18dc99  gotools/README
--- 92360,92375 ----
  23d5a7e5548f4e13fc245d606c148f40  gcc/wide-int-bitmask.h
  483f48114286da1c540e3b6a9ec3e6b6  gcc/wide-int-print.cc
  09dba6185099df41595ab2939afa51a2  gcc/wide-int-print.h
! d14807031dd3605275dad2f55a263bb8  gcc/wide-int.cc
! a5e6a809a9631072a9f5ed6d7d9489a3  gcc/wide-int.h
  e82d97504c16e7a9d61318fafd536cac  gcc/xcoff.h
  fc8f6cd70740468b3d092d0a12d9c1b8  gcc/xcoffout.cc
  d675816050a9ff3c1178b9cdf507b9c2  gcc/xcoffout.h
! 6fe225a735e2476d3a7eb82154062975  gnattools/ChangeLog
  3e149f46f7f39c4f49e3e3449af997a3  gnattools/Makefile.in
  612bff48e9d0bfce4a8a8b2ce0e136ae  gnattools/configure
  5904825aa8ada9f931733a205c8ed847  gnattools/configure.ac
! 472a3f3eaa78b4f83a0b6059bea5a608  gotools/ChangeLog
  5d56cc28c41dee982565dd2bb6835d75  gotools/Makefile.am
  1b3e301307fb3c8ef2e668e88e9da768  gotools/Makefile.in
  7e23031e2e274aaa07b61c1e8f18dc99  gotools/README
*************** c4e8176c1964a5ebe0a55900f2141299  gotool
*** 92178,92184 ****
  eb2aeb3a6cffe7b26a8f1c8a2da23dcd  gotools/gofmt.1
  59530bdf33659b29e73d4adb9f9f6552  include/COPYING
  d32239bcb673463ab874e80d47fae504  include/COPYING3
! cca01c352ed03feea3f2bfb48b6d4733  include/ChangeLog
  4263432a72ff47ed8bf420208ee7eea5  include/ChangeLog-9103
  a43d76108493b20da790f953f829c6a5  include/ChangeLog.jit
  8afc0abb1ece39cc1f45718fa5c20ac0  include/ansidecl.h
--- 92380,92386 ----
  eb2aeb3a6cffe7b26a8f1c8a2da23dcd  gotools/gofmt.1
  59530bdf33659b29e73d4adb9f9f6552  include/COPYING
  d32239bcb673463ab874e80d47fae504  include/COPYING3
! 220e7b3577bf9125915e269de16ea863  include/ChangeLog
  4263432a72ff47ed8bf420208ee7eea5  include/ChangeLog-9103
  a43d76108493b20da790f953f829c6a5  include/ChangeLog.jit
  8afc0abb1ece39cc1f45718fa5c20ac0  include/ansidecl.h
*************** e5fc6abe4c74977e3d48a002393b8c83  includ
*** 92227,92233 ****
  2f974ad6ac4ec364faad976d15b7e291  include/xregex2.h
  5a08b4d212a5560e6dad2d8fc20d7128  include/xtensa-config.h
  361482dd6b5b5eb7090fff3986fba68a  install-sh
! d0793aab30d78ad5d3da5d70d2e80f4d  intl/ChangeLog
  a5f61a727ebbc9d02c42160796629b91  intl/Makefile.in
  6ec998bb4716c744bf8185e607f69301  intl/README
  76ca170a525d5b84d90f0478fe788931  intl/VERSION
--- 92429,92435 ----
  2f974ad6ac4ec364faad976d15b7e291  include/xregex2.h
  5a08b4d212a5560e6dad2d8fc20d7128  include/xtensa-config.h
  361482dd6b5b5eb7090fff3986fba68a  install-sh
! 71d31923f061de05b12e0b43d7081767  intl/ChangeLog
  a5f61a727ebbc9d02c42160796629b91  intl/Makefile.in
  6ec998bb4716c744bf8185e607f69301  intl/README
  76ca170a525d5b84d90f0478fe788931  intl/VERSION
*************** ec38b8a64a735196854a8f7d76b79a78  intl/p
*** 92270,92281 ****
  b4758a0194e3e41362b939911472ce62  intl/relocatable.c
  bedade7bcfc3bc5eb09a2c6844f637f3  intl/relocatable.h
  43f287d082528203fc85c1d2d81bf30d  intl/textdomain.c
! e22a3ca9deb85ddb84d0b355da0f4f7b  libada/ChangeLog
  4a09495968cafbde4305e247d508584d  libada/Makefile.in
  c851e0f50ad5e334f1cdf3b8c0bae3e2  libada/configure
  7eed03bb14fc3b93e0ca88cd5bdac93d  libada/configure.ac
  46d3fe6da7a771cc2d5420c4137a6861  libatomic/.gitignore
! 37196434b48d5ec4303feb9adcdacc77  libatomic/ChangeLog
  21f5e5567f586aa064e67dac9e843ed4  libatomic/Makefile.am
  8f480fdd121c7e44c048fec76c598b1f  libatomic/Makefile.in
  04a8eb275561484cf0d6f8c459a38177  libatomic/acinclude.m4
--- 92472,92483 ----
  b4758a0194e3e41362b939911472ce62  intl/relocatable.c
  bedade7bcfc3bc5eb09a2c6844f637f3  intl/relocatable.h
  43f287d082528203fc85c1d2d81bf30d  intl/textdomain.c
! c23e0d9f34d809996e9151c8608f703f  libada/ChangeLog
  4a09495968cafbde4305e247d508584d  libada/Makefile.in
  c851e0f50ad5e334f1cdf3b8c0bae3e2  libada/configure
  7eed03bb14fc3b93e0ca88cd5bdac93d  libada/configure.ac
  46d3fe6da7a771cc2d5420c4137a6861  libatomic/.gitignore
! b8879210d6f82e559202de7fd69b8a8e  libatomic/ChangeLog
  21f5e5567f586aa064e67dac9e843ed4  libatomic/Makefile.am
  8f480fdd121c7e44c048fec76c598b1f  libatomic/Makefile.in
  04a8eb275561484cf0d6f8c459a38177  libatomic/acinclude.m4
*************** c03a072efac9b30f8f8429ac52fd246b  libato
*** 92368,92374 ****
  8a7308fda7ed1543cb9e3be0f8e47bce  libatomic/testsuite/libatomic.c/atomic-store-5.c
  40618200985a15bcba64f871863da498  libatomic/testsuite/libatomic.c/c.exp
  97b0c9cdfcb733664bdf4efe0f5dc449  libatomic/testsuite/libatomic.c/generic-2.c
! b88303e0e82c6f04b9088327a07fbcbe  libbacktrace/ChangeLog
  eb3a88b53140eb234a99a4b3a55e56bf  libbacktrace/ChangeLog.jit
  77c51b931c509c106006d48ecb7e30a2  libbacktrace/Makefile.am
  d0c41a95e9b6adcd3647ee458f392892  libbacktrace/Makefile.in
--- 92570,92576 ----
  8a7308fda7ed1543cb9e3be0f8e47bce  libatomic/testsuite/libatomic.c/atomic-store-5.c
  40618200985a15bcba64f871863da498  libatomic/testsuite/libatomic.c/c.exp
  97b0c9cdfcb733664bdf4efe0f5dc449  libatomic/testsuite/libatomic.c/generic-2.c
! 4bff531b01f22c327fc9875d4b553fa9  libbacktrace/ChangeLog
  eb3a88b53140eb234a99a4b3a55e56bf  libbacktrace/ChangeLog.jit
  77c51b931c509c106006d48ecb7e30a2  libbacktrace/Makefile.am
  d0c41a95e9b6adcd3647ee458f392892  libbacktrace/Makefile.in
*************** ef82780a07b004c254451fc3a09250dd  libbac
*** 92416,92422 ****
  3c331b1a8a552d16255da8a5927b45a3  libbacktrace/xcoff.c
  cb6ac36c0dd658645079581b8ed02ab0  libbacktrace/xztest.c
  a8507bf3a9e7e68d9aa1a4154d7797ed  libbacktrace/ztest.c
! c40c57d85cbb4e8cb7925f387665cfb6  libcc1/ChangeLog
  745ddfe6eed3591d250a7d36011bcc81  libcc1/Makefile.am
  4c0714d9e0254b52de979d8acb09c146  libcc1/Makefile.in
  b39668f1b706dbfe7203b3cfa277b792  libcc1/aclocal.m4
--- 92618,92624 ----
  3c331b1a8a552d16255da8a5927b45a3  libbacktrace/xcoff.c
  cb6ac36c0dd658645079581b8ed02ab0  libbacktrace/xztest.c
  a8507bf3a9e7e68d9aa1a4154d7797ed  libbacktrace/ztest.c
! 07994c87a26c5ca0ec3dffc834ad8c4a  libcc1/ChangeLog
  745ddfe6eed3591d250a7d36011bcc81  libcc1/Makefile.am
  4c0714d9e0254b52de979d8acb09c146  libcc1/Makefile.in
  b39668f1b706dbfe7203b3cfa277b792  libcc1/aclocal.m4
*************** dc912c004adc24445847b1ab9a5e3cfe  libcc1
*** 92438,92447 ****
  3d6bd13fe6e7b16d5cdb484b69befcc0  libcc1/gdbctx.hh
  15c340f9583b429a5f046a42a3459d80  libcc1/libcc1.cc
  99b3a25ce17ed584d9f0aa42b4713938  libcc1/libcc1.sym
! 47a4062c85b0de634c3a8546c8f4176b  libcc1/libcc1plugin.cc
  75503db6a0981a95d9c29d9607b29380  libcc1/libcc1plugin.sym
  b529745bee556d9b313b6d95b0b4a86b  libcc1/libcp1.cc
! 8f52cc449d7a4c6b0a93aa0dfe122511  libcc1/libcp1plugin.cc
  75503db6a0981a95d9c29d9607b29380  libcc1/libcp1plugin.sym
  e8e40807807aef0dfd3ba1f577779fc3  libcc1/marshall-cp.hh
  66b3f0032468a289cdaf735dff4cd2b4  libcc1/marshall.cc
--- 92640,92649 ----
  3d6bd13fe6e7b16d5cdb484b69befcc0  libcc1/gdbctx.hh
  15c340f9583b429a5f046a42a3459d80  libcc1/libcc1.cc
  99b3a25ce17ed584d9f0aa42b4713938  libcc1/libcc1.sym
! 07ba2fa75700f5f80d302e6d77565378  libcc1/libcc1plugin.cc
  75503db6a0981a95d9c29d9607b29380  libcc1/libcc1plugin.sym
  b529745bee556d9b313b6d95b0b4a86b  libcc1/libcp1.cc
! 3bf2d6271de3f9aaf50f4ba044f0a2ab  libcc1/libcp1plugin.cc
  75503db6a0981a95d9c29d9607b29380  libcc1/libcp1plugin.sym
  e8e40807807aef0dfd3ba1f577779fc3  libcc1/marshall-cp.hh
  66b3f0032468a289cdaf735dff4cd2b4  libcc1/marshall.cc
*************** b69641cecc09e16fc04d93dc2ad3be4d  libcc1
*** 92453,92459 ****
  8e32b4f309146e8842db7a077d77be28  libcody/CMakeLists.txt
  c96a56ec7f0400e30e99a9aa445e0425  libcody/CODING.md
  b5243c8c76fc965a409394a30679e613  libcody/CONTRIB.md
! 66907bfdec9f54b70a09958b978bfe1b  libcody/ChangeLog
  86d3f3a95c324c9479bd8986968f4327  libcody/LICENSE
  078d1fd2b3c40db6c184e4c3833bc8e4  libcody/Makefile.in
  ca1c6fe3df5427016005ce753c73d454  libcody/README.md
--- 92655,92661 ----
  8e32b4f309146e8842db7a077d77be28  libcody/CMakeLists.txt
  c96a56ec7f0400e30e99a9aa445e0425  libcody/CODING.md
  b5243c8c76fc965a409394a30679e613  libcody/CONTRIB.md
! e5f4a836459ef13396c9259ce4e9f9b8  libcody/ChangeLog
  86d3f3a95c324c9479bd8986968f4327  libcody/LICENSE
  078d1fd2b3c40db6c184e4c3833bc8e4  libcody/Makefile.in
  ca1c6fe3df5427016005ce753c73d454  libcody/README.md
*************** cffdeae41b78da05839b193e90188f55  libcod
*** 92472,92478 ****
  6419dfc879387358e95288142e569914  libcody/packet.cc
  688ece05c8b9d378b3df186808162e76  libcody/resolver.cc
  b1f3850fc5ac62999d1e124aa6f76531  libcody/server.cc
! 120a5a426a7e802cb13690c0059e4ba0  libcpp/ChangeLog
  2bd831b17997584e38305782cebe6948  libcpp/ChangeLog.jit
  286a774a854575468546d8fce202733f  libcpp/Makefile.in
  9d15bb14e9ac1a74366e673ea260722e  libcpp/aclocal.m4
--- 92674,92680 ----
  6419dfc879387358e95288142e569914  libcody/packet.cc
  688ece05c8b9d378b3df186808162e76  libcody/resolver.cc
  b1f3850fc5ac62999d1e124aa6f76531  libcody/server.cc
! d2dd72d42d9b690fbb295fadc7d18dec  libcpp/ChangeLog
  2bd831b17997584e38305782cebe6948  libcpp/ChangeLog.jit
  286a774a854575468546d8fce202733f  libcpp/Makefile.in
  9d15bb14e9ac1a74366e673ea260722e  libcpp/aclocal.m4
*************** d098c1d7afbbe1618162985c263f8ce9  libcpp
*** 92486,92505 ****
  226d5bfee0c65994a834c831a5d82b80  libcpp/files.cc
  d5218c1d5fc8cde726dc168fafef10a7  libcpp/generated_cpp_wcwidth.h
  e0818fa4239f8ba3958c995630136377  libcpp/identifiers.cc
! c0e59e6492ae26a616e59ad8e1bcbc29  libcpp/include/cpplib.h
  e0ecf491e0d75d9fb4a83d9812c8704b  libcpp/include/line-map.h
  232954149f32cc32e54bbef19c0a4b57  libcpp/include/mkdeps.h
  a1a78400707f80a1a54a7d9b16810e5b  libcpp/include/symtab.h
  7b423055aee45272063c65dc7317f67a  libcpp/init.cc
  12339c1e6f2d40079702f5fa3ff9a749  libcpp/internal.h
! 72cfbc4875a217832f21210eef1ea63b  libcpp/lex.cc
  4af47955f81f498c006099ecab0c5942  libcpp/line-map.cc
  46a07100f95f5e354c7e25cd19d26884  libcpp/location-example.txt
  4cd79d71d4084044415e110329fbef40  libcpp/macro.cc
  e6be2734d60fae9b46b4ed87f86d31b2  libcpp/makeucnid.cc
  af6c487ab06b1986efc158cb9976be08  libcpp/mkdeps.cc
  7d48679b422952c0f759fec7d4706be1  libcpp/pch.cc
! 572fd2a982db12a199bbd023fc840306  libcpp/po/ChangeLog
  768453cca0d8c0e2666a269e0aff862b  libcpp/po/be.gmo
  bf20994ad02b0e524091092e6fe86885  libcpp/po/be.po
  6d54c123e102174620d1738492df73d5  libcpp/po/ca.gmo
--- 92688,92707 ----
  226d5bfee0c65994a834c831a5d82b80  libcpp/files.cc
  d5218c1d5fc8cde726dc168fafef10a7  libcpp/generated_cpp_wcwidth.h
  e0818fa4239f8ba3958c995630136377  libcpp/identifiers.cc
! c16869ad44817659f120b6d55b22d74d  libcpp/include/cpplib.h
  e0ecf491e0d75d9fb4a83d9812c8704b  libcpp/include/line-map.h
  232954149f32cc32e54bbef19c0a4b57  libcpp/include/mkdeps.h
  a1a78400707f80a1a54a7d9b16810e5b  libcpp/include/symtab.h
  7b423055aee45272063c65dc7317f67a  libcpp/init.cc
  12339c1e6f2d40079702f5fa3ff9a749  libcpp/internal.h
! 2f8a3f3a17114557146573f0c619beeb  libcpp/lex.cc
  4af47955f81f498c006099ecab0c5942  libcpp/line-map.cc
  46a07100f95f5e354c7e25cd19d26884  libcpp/location-example.txt
  4cd79d71d4084044415e110329fbef40  libcpp/macro.cc
  e6be2734d60fae9b46b4ed87f86d31b2  libcpp/makeucnid.cc
  af6c487ab06b1986efc158cb9976be08  libcpp/mkdeps.cc
  7d48679b422952c0f759fec7d4706be1  libcpp/pch.cc
! f0b12237227482fb876937e5962b48ad  libcpp/po/ChangeLog
  768453cca0d8c0e2666a269e0aff862b  libcpp/po/be.gmo
  bf20994ad02b0e524091092e6fe86885  libcpp/po/be.po
  6d54c123e102174620d1738492df73d5  libcpp/po/ca.gmo
*************** c31c897eac8d6ae49fc1d381f67dca3f  libcpp
*** 92553,92559 ****
  304e436610cf39f2edaa1e8746827272  libcpp/ucnid.h
  32535698d6e28c93288fdd4db1a5d6b0  libcpp/ucnid.tab
  a6c2b3de06c7424706b16f4c206396a1  libdecnumber/.gitignore
! e2e144e3848c0f93fb8103bb0b1ead1b  libdecnumber/ChangeLog
  2bd831b17997584e38305782cebe6948  libdecnumber/ChangeLog.jit
  0fea971da3ddcbb3bd8d3bfb4c347302  libdecnumber/Makefile.in
  2a70099a79e40a57a666d5430a5e2529  libdecnumber/aclocal.m4
--- 92755,92761 ----
  304e436610cf39f2edaa1e8746827272  libcpp/ucnid.h
  32535698d6e28c93288fdd4db1a5d6b0  libcpp/ucnid.tab
  a6c2b3de06c7424706b16f4c206396a1  libdecnumber/.gitignore
! 1125c5c7db60217cccdc3051b0b64eaf  libdecnumber/ChangeLog
  2bd831b17997584e38305782cebe6948  libdecnumber/ChangeLog.jit
  0fea971da3ddcbb3bd8d3bfb4c347302  libdecnumber/Makefile.in
  2a70099a79e40a57a666d5430a5e2529  libdecnumber/aclocal.m4
*************** a97c47969dfc92a7666dfe3c2e1e1448  libdec
*** 92617,92623 ****
  88e1e033d85211b860055f29fcaab357  libdecnumber/dpd/decimal64.h
  0f6db29710e7075c2fd62bc4478b3b8d  libdecnumber/dpd/decimal64Symbols.h
  055606b47e85369c5d003f6e3a1b657e  libffi/.gitattributes
! 078eb084a21c0d3d865ae2c4d9d44026  libffi/ChangeLog
  0e38ead823643c45765e5fe55e7ab16b  libffi/ChangeLog.libffi
  fbbc216bc25d759a72ea3e6d734af56b  libffi/ChangeLog.libgcj
  d946d2b97454ad50a1dbfbf48923c5be  libffi/ChangeLog.v1
--- 92819,92825 ----
  88e1e033d85211b860055f29fcaab357  libdecnumber/dpd/decimal64.h
  0f6db29710e7075c2fd62bc4478b3b8d  libdecnumber/dpd/decimal64Symbols.h
  055606b47e85369c5d003f6e3a1b657e  libffi/.gitattributes
! 44a31b82ef30ac06c5133cb72bd4f150  libffi/ChangeLog
  0e38ead823643c45765e5fe55e7ab16b  libffi/ChangeLog.libffi
  fbbc216bc25d759a72ea3e6d734af56b  libffi/ChangeLog.libgcj
  d946d2b97454ad50a1dbfbf48923c5be  libffi/ChangeLog.v1
*************** fcf4949764155e3174447f2ee55b0db7  libffi
*** 92742,92748 ****
  8c2fbc617e204f07672c5cae0e592102  libffi/src/powerpc/darwin_closure.S
  b18c5d79db8ec26f2a2a5f5720396e27  libffi/src/powerpc/ffi.c
  84aacb1bbd19a1e9b325c0530554c2f4  libffi/src/powerpc/ffi_darwin.c
! 8c8d42a46c9e51a977c91e351a8fce6e  libffi/src/powerpc/ffi_linux64.c
  88d699c59596d5fa950e20646df8c277  libffi/src/powerpc/ffi_powerpc.h
  b3dfde8013f5032762b6b7b21b089599  libffi/src/powerpc/ffi_sysv.c
  a355fd8f3b93f9f1cdabbcd382f689f1  libffi/src/powerpc/ffitarget.h
--- 92944,92950 ----
  8c2fbc617e204f07672c5cae0e592102  libffi/src/powerpc/darwin_closure.S
  b18c5d79db8ec26f2a2a5f5720396e27  libffi/src/powerpc/ffi.c
  84aacb1bbd19a1e9b325c0530554c2f4  libffi/src/powerpc/ffi_darwin.c
! affbaac10f157c4ac165c80edcad5396  libffi/src/powerpc/ffi_linux64.c
  88d699c59596d5fa950e20646df8c277  libffi/src/powerpc/ffi_powerpc.h
  b3dfde8013f5032762b6b7b21b089599  libffi/src/powerpc/ffi_sysv.c
  a355fd8f3b93f9f1cdabbcd382f689f1  libffi/src/powerpc/ffitarget.h
*************** a3eb5dee2788fe0a6c42502ba658eddd  libffi
*** 93010,93018 ****
  0f3c94e520870e194cf525de7ec404dc  libffi/testsuite/libffi.go/ffitest.h
  6cfb66c1c00023abb2c2276d85f16e77  libffi/testsuite/libffi.go/go.exp
  189dc193fd0e627a2d55b2e84871edc5  libffi/testsuite/libffi.go/static-chain.h
! 88abd98cfe521dec7e15b226f3e3c39e  libgcc/ChangeLog
  e4f6419fde8efa2cce0df95a75d7ff0f  libgcc/Makefile.in
! 9dbca7c5391de8ac8b623dc5278ae0d5  libgcc/config.host
  312fccd8251056a36e26bad71f9cfaa2  libgcc/config.in
  72a922a69d4ebc17df642dac3bba79c7  libgcc/config/aarch64/aarch64-unwind.h
  63ef63f968be856e19a3ac335fb7c645  libgcc/config/aarch64/crtfastmath.c
--- 93212,93220 ----
  0f3c94e520870e194cf525de7ec404dc  libffi/testsuite/libffi.go/ffitest.h
  6cfb66c1c00023abb2c2276d85f16e77  libffi/testsuite/libffi.go/go.exp
  189dc193fd0e627a2d55b2e84871edc5  libffi/testsuite/libffi.go/static-chain.h
! 3eb7727faf9f7249a3063a384399c770  libgcc/ChangeLog
  e4f6419fde8efa2cce0df95a75d7ff0f  libgcc/Makefile.in
! 06d0f213cc7b7c2113bd1144c6b540cc  libgcc/config.host
  312fccd8251056a36e26bad71f9cfaa2  libgcc/config.in
  72a922a69d4ebc17df642dac3bba79c7  libgcc/config/aarch64/aarch64-unwind.h
  63ef63f968be856e19a3ac335fb7c645  libgcc/config/aarch64/crtfastmath.c
*************** dd161f21a37a222399ef8b301518412a  libgcc
*** 93100,93106 ****
  5c7332c4346d41f1ed4a9cbb2f7dd2d2  libgcc/config/arm/bpabi.S
  7bedee93df51d719651d05a1a5fb9692  libgcc/config/arm/bpabi.c
  86e6f8d59940d32bcdabd9a8d2721d50  libgcc/config/arm/cmse.c
! 286006bca8c96af68dfaa726140e86f6  libgcc/config/arm/cmse_nonsecure_call.S
  559c90b8dc77f7ce5fe7f9202ffd2932  libgcc/config/arm/crtfastmath.c
  146012a8864d1505564f83378601725c  libgcc/config/arm/crti.S
  c03f8d9271268dbfc352e80cdf2899f5  libgcc/config/arm/crtn.S
--- 93302,93308 ----
  5c7332c4346d41f1ed4a9cbb2f7dd2d2  libgcc/config/arm/bpabi.S
  7bedee93df51d719651d05a1a5fb9692  libgcc/config/arm/bpabi.c
  86e6f8d59940d32bcdabd9a8d2721d50  libgcc/config/arm/cmse.c
! 54c48fae8a64f934a74ad3e2cd1810f8  libgcc/config/arm/cmse_nonsecure_call.S
  559c90b8dc77f7ce5fe7f9202ffd2932  libgcc/config/arm/crtfastmath.c
  146012a8864d1505564f83378601725c  libgcc/config/arm/crti.S
  c03f8d9271268dbfc352e80cdf2899f5  libgcc/config/arm/crtn.S
*************** f7d079de49740a9b78907a3d673d7233  libgcc
*** 93138,93144 ****
  2e213af1dd13f68b1515d6340fcb540b  libgcc/config/avr/lib1funcs.S
  622f81485f02d0eac2caaafa7d3a2fd1  libgcc/config/avr/lib2-object.mk
  8d7abef73a8c40e4840ea410d4b4ac9b  libgcc/config/avr/lib2funcs.c
! 7cbe5d5e47d2914be811b21210893d7f  libgcc/config/avr/libf7/ChangeLog
  a2d046f165da6bb14e927d322fc2d5f4  libgcc/config/avr/libf7/asm-defs.h
  0b54a2cbfebb93a4e1bddfa3600d6f0b  libgcc/config/avr/libf7/f7-renames.h
  2effcc1c274d5f459695fb6d7d330053  libgcc/config/avr/libf7/f7-wraps.h
--- 93340,93346 ----
  2e213af1dd13f68b1515d6340fcb540b  libgcc/config/avr/lib1funcs.S
  622f81485f02d0eac2caaafa7d3a2fd1  libgcc/config/avr/lib2-object.mk
  8d7abef73a8c40e4840ea410d4b4ac9b  libgcc/config/avr/lib2funcs.c
! 2a73ae67f5c7021af1aa6e8f63375628  libgcc/config/avr/libf7/ChangeLog
  a2d046f165da6bb14e927d322fc2d5f4  libgcc/config/avr/libf7/asm-defs.h
  0b54a2cbfebb93a4e1bddfa3600d6f0b  libgcc/config/avr/libf7/f7-renames.h
  2effcc1c274d5f459695fb6d7d330053  libgcc/config/avr/libf7/f7-wraps.h
*************** fc27792f54d080ae69deec72044fe7c8  libgcc
*** 93220,93226 ****
  05a6aa190fa5a29c3b31a8d2e646e8f2  libgcc/config/darwin-crt-tm.c
  cefdb2a6f42e6873331971739c0295c8  libgcc/config/darwin-crt3.c
  3d9ace1569f13aadc86ee3608541f634  libgcc/config/darwin-unwind.ver
! 0a39ed05e14b91757915624896a5823f  libgcc/config/darwin10-unwind-find-enc-func.c
  95057989325714d78a5d2e16a04d60d4  libgcc/config/epiphany/crti.S
  c4b57a67155b4224d979de1eb2184f34  libgcc/config/epiphany/crtint.S
  406e2cfd54bb726f1f297592e6591d5c  libgcc/config/epiphany/crtm1reg-r43.S
--- 93422,93428 ----
  05a6aa190fa5a29c3b31a8d2e646e8f2  libgcc/config/darwin-crt-tm.c
  cefdb2a6f42e6873331971739c0295c8  libgcc/config/darwin-crt3.c
  3d9ace1569f13aadc86ee3608541f634  libgcc/config/darwin-unwind.ver
! 416f37158b8f19edbb3c495781577dd5  libgcc/config/darwin10-unwind-find-enc-func.c
  95057989325714d78a5d2e16a04d60d4  libgcc/config/epiphany/crti.S
  c4b57a67155b4224d979de1eb2184f34  libgcc/config/epiphany/crtint.S
  406e2cfd54bb726f1f297592e6591d5c  libgcc/config/epiphany/crtm1reg-r43.S
*************** f3d6a0816472fb3b2331400550b2fa0a  libgcc
*** 93434,93440 ****
  96e319c5ee37de30bcf1bbc937780b96  libgcc/config/ia64/vms-unwind.h
  b35bb753a21134489709871dab9b0a6f  libgcc/config/iq2000/lib2funcs.c
  102f7dad8ad6b54434a1b8313d1e42c4  libgcc/config/iq2000/t-iq2000
! 95c6b942c7fcfce520270c41f4bc5a5c  libgcc/config/libbid/ChangeLog
  5a241922dcbbaeba60cf8f739acb4e6f  libgcc/config/libbid/_addsub_dd.c
  f6d2abf11a64e2d5b6d879d2ae33ca1a  libgcc/config/libbid/_addsub_sd.c
  19fa7c129865063148897a4a8ef4b9f7  libgcc/config/libbid/_addsub_td.c
--- 93636,93642 ----
  96e319c5ee37de30bcf1bbc937780b96  libgcc/config/ia64/vms-unwind.h
  b35bb753a21134489709871dab9b0a6f  libgcc/config/iq2000/lib2funcs.c
  102f7dad8ad6b54434a1b8313d1e42c4  libgcc/config/iq2000/t-iq2000
! eb4c0373b6e0b8adfebdc1bc5c5aa5cb  libgcc/config/libbid/ChangeLog
  5a241922dcbbaeba60cf8f739acb4e6f  libgcc/config/libbid/_addsub_dd.c
  f6d2abf11a64e2d5b6d879d2ae33ca1a  libgcc/config/libbid/_addsub_sd.c
  19fa7c129865063148897a4a8ef4b9f7  libgcc/config/libbid/_addsub_td.c
*************** ada9a39786da3b2e999f7440a17a1ed7  libgcc
*** 94242,94249 ****
  7f567bcd22705a965e07f79e8f68ebaa  libgcc/config/stormy16/umodsi3.c
  f199b38114ce849b77b38bd475d72cff  libgcc/config/t-crtfm
  060a49bb5c4a53a2125123d4cbd571de  libgcc/config/t-crtstuff-pic
! 06e78a9599e0fde8f283aa4d9bed8e2e  libgcc/config/t-darwin
  f699f9e7159ba2c6033406086c5c8299  libgcc/config/t-darwin-ehs
  ee7ad6460936fc6f3f89ecb711376477  libgcc/config/t-dfprules
  d747115cbcc2bd56b6b4f73c350c2ae3  libgcc/config/t-eh-dw2-dip
  b9d08c1cbead9131f216accd515ec32c  libgcc/config/t-fdpbit
--- 94444,94454 ----
  7f567bcd22705a965e07f79e8f68ebaa  libgcc/config/stormy16/umodsi3.c
  f199b38114ce849b77b38bd475d72cff  libgcc/config/t-crtfm
  060a49bb5c4a53a2125123d4cbd571de  libgcc/config/t-crtstuff-pic
! fc8b2970727885119792967fb3344fda  libgcc/config/t-darwin
  f699f9e7159ba2c6033406086c5c8299  libgcc/config/t-darwin-ehs
+ 5f05c653ae1e197bae3fc3fc5ca1e59d  libgcc/config/t-darwin-min-1
+ d8138086c2f686d6fb17804f19019954  libgcc/config/t-darwin-min-5
+ 830793a6b0d554dc6c4495bc27a0c9e3  libgcc/config/t-darwin-min-8
  ee7ad6460936fc6f3f89ecb711376477  libgcc/config/t-dfprules
  d747115cbcc2bd56b6b4f73c350c2ae3  libgcc/config/t-eh-dw2-dip
  b9d08c1cbead9131f216accd515ec32c  libgcc/config/t-fdpbit
*************** cb89221d47b4e6af3892aa5ae2110da8  libgcc
*** 94263,94269 ****
  eb3161bf886026cdcf8a78cea885fdd2  libgcc/config/t-openbsd-thread
  474d97884b393e08b0ce416dd09493bc  libgcc/config/t-rtems
  ce563372d6864335705c0f2a39d1a4c2  libgcc/config/t-slibgcc
! 3ecc4173a1b262e4770c789455b2cfc9  libgcc/config/t-slibgcc-darwin
  57f27c60e5d8c572d2645821ec5935e0  libgcc/config/t-slibgcc-elf-ver
  3b575248c67823cee4cb9617c6e13d38  libgcc/config/t-slibgcc-fuchsia
  57e4154cb283fd7d9f323f5d85d534d9  libgcc/config/t-slibgcc-gld
--- 94468,94474 ----
  eb3161bf886026cdcf8a78cea885fdd2  libgcc/config/t-openbsd-thread
  474d97884b393e08b0ce416dd09493bc  libgcc/config/t-rtems
  ce563372d6864335705c0f2a39d1a4c2  libgcc/config/t-slibgcc
! 588d81383c65cf44cee60a4c7ff77fcb  libgcc/config/t-slibgcc-darwin
  57f27c60e5d8c572d2645821ec5935e0  libgcc/config/t-slibgcc-elf-ver
  3b575248c67823cee4cb9617c6e13d38  libgcc/config/t-slibgcc-fuchsia
  57e4154cb283fd7d9f323f5d85d534d9  libgcc/config/t-slibgcc-gld
*************** af1786fe053390d764bd79e2c261822c  libgcc
*** 94491,94497 ****
  3dd3bcd264e7c8c79212741acb2d09d2  libgcc/unwind-compat.c
  507a92f167b02850f1358d2fdc39f764  libgcc/unwind-compat.h
  db6cd6c24e7e86e47264ca84422d02ef  libgcc/unwind-dw2-fde-compat.c
! 3b55297a45bdbbfd4cfcde725037bafc  libgcc/unwind-dw2-fde-dip.c
  1b26d11b3ed1309ef9b8df4403b6de06  libgcc/unwind-dw2-fde.c
  6669cec12a47ada53529ee9efa55ca01  libgcc/unwind-dw2-fde.h
  7e6c41fa4bb6abdb62f1df9985cba7a9  libgcc/unwind-dw2.c
--- 94696,94702 ----
  3dd3bcd264e7c8c79212741acb2d09d2  libgcc/unwind-compat.c
  507a92f167b02850f1358d2fdc39f764  libgcc/unwind-compat.h
  db6cd6c24e7e86e47264ca84422d02ef  libgcc/unwind-dw2-fde-compat.c
! be02d240174c0fe797cb055929bf8a6c  libgcc/unwind-dw2-fde-dip.c
  1b26d11b3ed1309ef9b8df4403b6de06  libgcc/unwind-dw2-fde.c
  6669cec12a47ada53529ee9efa55ca01  libgcc/unwind-dw2-fde.h
  7e6c41fa4bb6abdb62f1df9985cba7a9  libgcc/unwind-dw2.c
*************** f25d8ab44bd78e25e4101be2782fdc8a  libgcc
*** 94505,94511 ****
  86516254f518009cebca3f82cd990254  libgcc/vtv_end_preinit.c
  351c41e966ff8e80444fb57c161e7957  libgcc/vtv_start.c
  0ae6a250e17c98a856aae28baba71d88  libgcc/vtv_start_preinit.c
! ec59eb9960a4feb9c97d6a84b5c382d9  libgfortran/ChangeLog
  9aca36338382e5b4b730e7779170b24d  libgfortran/ChangeLog-2002
  80d3edc880c2da0b7a2beec2e2c4f774  libgfortran/ChangeLog-2003
  9f0239429993a5e64ed793eb6c55a5c1  libgfortran/ChangeLog-2004
--- 94710,94716 ----
  86516254f518009cebca3f82cd990254  libgcc/vtv_end_preinit.c
  351c41e966ff8e80444fb57c161e7957  libgcc/vtv_start.c
  0ae6a250e17c98a856aae28baba71d88  libgcc/vtv_start_preinit.c
! c16cf9b4a0680ac6e9e0d8d891a0e3f7  libgfortran/ChangeLog
  9aca36338382e5b4b730e7779170b24d  libgfortran/ChangeLog-2002
  80d3edc880c2da0b7a2beec2e2c4f774  libgfortran/ChangeLog-2003
  9f0239429993a5e64ed793eb6c55a5c1  libgfortran/ChangeLog-2004
*************** f53bf8a377fabf09b90ff9ac95232c65  libgfo
*** 95337,95343 ****
  f273395f71a8bb633083e471fc1bbf14  libgfortran/io/write_float.def
  6b4c3a7d1ef1470d52a6fb5bef0576eb  libgfortran/kinds-override.h
  840561aa2cceac1389496086176a24b1  libgfortran/libgfortran.h
! 0acddc63592eb50916263aa49d35efe9  libgfortran/libgfortran.spec.in
  dc1a87f5ed3520558b0fe9f43e4f5ba8  libgfortran/libtool-version
  61e3cb51f0b281aef50dab1254b22b5f  libgfortran/m4/all.m4
  ab9bb61b04fe1dacd9460ca03ac1ee8d  libgfortran/m4/any.m4
--- 95542,95548 ----
  f273395f71a8bb633083e471fc1bbf14  libgfortran/io/write_float.def
  6b4c3a7d1ef1470d52a6fb5bef0576eb  libgfortran/kinds-override.h
  840561aa2cceac1389496086176a24b1  libgfortran/libgfortran.h
! 387b6182fc5961d2910eba8861402578  libgfortran/libgfortran.spec.in
  dc1a87f5ed3520558b0fe9f43e4f5ba8  libgfortran/libtool-version
  61e3cb51f0b281aef50dab1254b22b5f  libgfortran/m4/all.m4
  ab9bb61b04fe1dacd9460ca03ac1ee8d  libgfortran/m4/any.m4
*************** d372c6ee28f589dfac9e56f5faea2629  libgfo
*** 95429,95436 ****
  79ec8cc63043a525e906838fe1a16c64  libgfortran/runtime/string.c
  5d4950ecb7b26d2c5e4e7b4e0dd74707  libgo/LICENSE
  160ac38979ae9334894994a1e7b4bf3b  libgo/MERGE
! 35c817a70de4894d5f332e7df88899f3  libgo/Makefile.am
! 85b73a99f9e3ede408b767c5607a246d  libgo/Makefile.in
  3a55d95595a6f9e37dee53826b4daff2  libgo/PATENTS
  d0952f0b499c9ebb887222764488a2fc  libgo/README
  492dd43b98c6602a8754328947942c40  libgo/README.gcc
--- 95634,95641 ----
  79ec8cc63043a525e906838fe1a16c64  libgfortran/runtime/string.c
  5d4950ecb7b26d2c5e4e7b4e0dd74707  libgo/LICENSE
  160ac38979ae9334894994a1e7b4bf3b  libgo/MERGE
! efff2a79351633c1554f1dd62bfce4a3  libgo/Makefile.am
! 9f221aa13c7503fce0651d505c261aa4  libgo/Makefile.in
  3a55d95595a6f9e37dee53826b4daff2  libgo/PATENTS
  d0952f0b499c9ebb887222764488a2fc  libgo/README
  492dd43b98c6602a8754328947942c40  libgo/README.gcc
*************** a37c029e52bd96f9d2bc7dfb49555287  libgo/
*** 98660,98666 ****
  adecb9131ed5256a866ebce39bbca8cc  libgo/go/index/suffixarray/sais2.go
  b467c33283f1a55c04377e216b195ff3  libgo/go/index/suffixarray/suffixarray.go
  2a7f05341169c7c5a8dd7f78a69da041  libgo/go/index/suffixarray/suffixarray_test.go
! 41d068a3051cf8e15bd4acf12e4588e2  libgo/go/internal/abi/abi.go
  2a2a56756bd78668e8a781b424f313ae  libgo/go/internal/buildcfg/cfg.go
  3f0bcc7c55615ab744b82314bd75dfbd  libgo/go/internal/buildcfg/cfg_test.go
  f3042e52ce62216a8411a35c204ca019  libgo/go/internal/buildcfg/exp.go
--- 98865,98871 ----
  adecb9131ed5256a866ebce39bbca8cc  libgo/go/index/suffixarray/sais2.go
  b467c33283f1a55c04377e216b195ff3  libgo/go/index/suffixarray/suffixarray.go
  2a7f05341169c7c5a8dd7f78a69da041  libgo/go/index/suffixarray/suffixarray_test.go
! 6242cf4a5c868b2c89b3bd8a0c81887a  libgo/go/internal/abi/abi.go
  2a2a56756bd78668e8a781b424f313ae  libgo/go/internal/buildcfg/cfg.go
  3f0bcc7c55615ab744b82314bd75dfbd  libgo/go/internal/buildcfg/cfg_test.go
  f3042e52ce62216a8411a35c204ca019  libgo/go/internal/buildcfg/exp.go
*************** caf93ff057c135366a3fabf9c1992ad9  libgo/
*** 100292,100298 ****
  0b7cc30b317196a42882ace5a55527bd  libgo/go/syscall/libcall_hurd.go
  562e5aacf2778a3c9a00918069e43b2f  libgo/go/syscall/libcall_hurd_386.go
  ad4306c7d52c93cc9cdfbaa2415c8ad4  libgo/go/syscall/libcall_irix.go
! 2f1987db41335974b8c0d5af17cf3895  libgo/go/syscall/libcall_linux.go
  08d02e9ba31a2f132b6670d56e5f9a91  libgo/go/syscall/libcall_linux_386.go
  d0dfa8e45cee5defb536480f056ed447  libgo/go/syscall/libcall_linux_alpha.go
  0f110f6b4b28d847963c11d0307ebbfb  libgo/go/syscall/libcall_linux_amd64.go
--- 100497,100503 ----
  0b7cc30b317196a42882ace5a55527bd  libgo/go/syscall/libcall_hurd.go
  562e5aacf2778a3c9a00918069e43b2f  libgo/go/syscall/libcall_hurd_386.go
  ad4306c7d52c93cc9cdfbaa2415c8ad4  libgo/go/syscall/libcall_irix.go
! 40420bf875a1f378e0c79829b064df72  libgo/go/syscall/libcall_linux.go
  08d02e9ba31a2f132b6670d56e5f9a91  libgo/go/syscall/libcall_linux_386.go
  d0dfa8e45cee5defb536480f056ed447  libgo/go/syscall/libcall_linux_alpha.go
  0f110f6b4b28d847963c11d0307ebbfb  libgo/go/syscall/libcall_linux_amd64.go
*************** e3e86019491a40bd4f45424d7ce11037  libgo/
*** 100921,100930 ****
  c5574d106d35be5d94e80301b0855ada  libgo/testsuite/libgo-test-support.exp.in
  bf162aa572f7b96b25dbd2b027845d32  libgo/testsuite/libgo.testmain/testmain.exp
  cc9d2a0e34e31ba866a8caf9f46f48f3  libgomp/.gitattributes
! c57add34b95b05b576546556a557fa6a  libgomp/ChangeLog
  0d55aa862aee66efdc5f8d62c94ff8fb  libgomp/ChangeLog.graphite
  4c820cf0c4f1fd83f68890608487f44e  libgomp/Makefile.am
! 847da02774062ac70dfb906343587d08  libgomp/Makefile.in
  4ba8f039959a7b81003ebc6326e8448f  libgomp/acc_prof.h
  d45f3b20f1be5d95a6c06fb81bedafe9  libgomp/acinclude.m4
  30a64ccfecfa60e8b5098e9fe26ea707  libgomp/aclocal.m4
--- 101126,101135 ----
  c5574d106d35be5d94e80301b0855ada  libgo/testsuite/libgo-test-support.exp.in
  bf162aa572f7b96b25dbd2b027845d32  libgo/testsuite/libgo.testmain/testmain.exp
  cc9d2a0e34e31ba866a8caf9f46f48f3  libgomp/.gitattributes
! ce779ed17e1ef55271eae347116bdbd2  libgomp/ChangeLog
  0d55aa862aee66efdc5f8d62c94ff8fb  libgomp/ChangeLog.graphite
  4c820cf0c4f1fd83f68890608487f44e  libgomp/Makefile.am
! b557677faddb5cc7d23f0e8f8a5bb0a6  libgomp/Makefile.in
  4ba8f039959a7b81003ebc6326e8448f  libgomp/acc_prof.h
  d45f3b20f1be5d95a6c06fb81bedafe9  libgomp/acinclude.m4
  30a64ccfecfa60e8b5098e9fe26ea707  libgomp/aclocal.m4
*************** b164e6b3b504abe76c66769445fb8f59  libgom
*** 101038,101045 ****
  efc434763cbe71b67359f1858f6c9480  libgomp/config/rtems/sem.c
  3803e246a7effac5f68defbc6467d18c  libgomp/config/rtems/sem.h
  af41d1d04a4112345554ca8b8a072ed9  libgomp/config/t-aix
! 173c78953071fc925160b16c41dd7912  libgomp/configure
! c148ac8aacb9f40379a65826a6941790  libgomp/configure.ac
  df326a12f33954a095cf171bc51c7067  libgomp/configure.tgt
  961b136816f6a14d942d57a87dc80550  libgomp/critical.c
  a2846404f7e3b4d082df7d3bcf507ce8  libgomp/env.c
--- 101243,101250 ----
  efc434763cbe71b67359f1858f6c9480  libgomp/config/rtems/sem.c
  3803e246a7effac5f68defbc6467d18c  libgomp/config/rtems/sem.h
  af41d1d04a4112345554ca8b8a072ed9  libgomp/config/t-aix
! 91d7cedb15bd7d6542e55986c1869742  libgomp/configure
! 00cde2fa4f3df681996b438acff2a0ae  libgomp/configure.ac
  df326a12f33954a095cf171bc51c7067  libgomp/configure.tgt
  961b136816f6a14d942d57a87dc80550  libgomp/critical.c
  a2846404f7e3b4d082df7d3bcf507ce8  libgomp/env.c
*************** b4b3ff9a2527e499cebeb7b48c150ff6  libgom
*** 101053,101059 ****
  8f1e6e4f0cf98dcffb1c147b18838798  libgomp/libgomp-plugin.c
  335a7094586075334b6a9d0faa6ebe7d  libgomp/libgomp-plugin.h
  dcc9017cedae0d22507f9f4ce4f87621  libgomp/libgomp.h
! bc1003569ddb2c8a8656d63255855a4b  libgomp/libgomp.info
  c767351b8d4fa4dfa3fbdb2b50c8ab3e  libgomp/libgomp.map
  8b2aa50aecad82171348a6918309afd6  libgomp/libgomp.spec.in
  b5a7cd5e5d03f5bbca766d5cca4219e9  libgomp/libgomp.texi
--- 101258,101264 ----
  8f1e6e4f0cf98dcffb1c147b18838798  libgomp/libgomp-plugin.c
  335a7094586075334b6a9d0faa6ebe7d  libgomp/libgomp-plugin.h
  dcc9017cedae0d22507f9f4ce4f87621  libgomp/libgomp.h
! 66605f980fda8e4618a404069b8692c7  libgomp/libgomp.info
  c767351b8d4fa4dfa3fbdb2b50c8ab3e  libgomp/libgomp.map
  8b2aa50aecad82171348a6918309afd6  libgomp/libgomp.spec.in
  b5a7cd5e5d03f5bbca766d5cca4219e9  libgomp/libgomp.texi
*************** d16c5ca316d6f0bfecb7971ef2a088ab  libgom
*** 101099,101110 ****
  5954576d4231b1ee2a73dbf601bf742e  libgomp/taskloop.c
  da4ddcafdbe90d447ac7ace610407732  libgomp/team.c
  efac562db57f45ea4ec34a672a09bc00  libgomp/teams.c
! e07f04fffd2f6276df2fbeca36cc3d91  libgomp/testsuite/Makefile.am
! 648be0a5f804ab0023a14d22cca4a3de  libgomp/testsuite/Makefile.in
! 01d3ae9b53e2b97f3dce55fcaed1a924  libgomp/testsuite/config/default.exp
  6c859d1c520b245e51a29693632545d6  libgomp/testsuite/lib/libgomp-dg.exp
! 4a9a22558b7ef794bed1f80d040e511f  libgomp/testsuite/lib/libgomp.exp
! 97fdc33cc25788d4b9dc1db6aefed760  libgomp/testsuite/libgomp-site-extra.exp.in
  ed323f968c0e2d197ee36bf3b1f678e3  libgomp/testsuite/libgomp-test-support.exp.in
  75cc672a1bf25974c5f4c5e3bc1a74b1  libgomp/testsuite/libgomp.c++/affinity-1.C
  196ffcd43fb2edf60795e6aabf50d259  libgomp/testsuite/libgomp.c++/allocate-1.C
--- 101304,101316 ----
  5954576d4231b1ee2a73dbf601bf742e  libgomp/taskloop.c
  da4ddcafdbe90d447ac7ace610407732  libgomp/team.c
  efac562db57f45ea4ec34a672a09bc00  libgomp/teams.c
! ae0dcb4c08025996b4bf4550cf72832e  libgomp/testsuite/Makefile.am
! ba6af12ee86801d0846dd7004630c627  libgomp/testsuite/Makefile.in
! 3e9315e9798f8d596fed1074182ee4cf  libgomp/testsuite/config/default.exp
! 989674e1cf3f6739f5d9519d904650c7  libgomp/testsuite/flock
  6c859d1c520b245e51a29693632545d6  libgomp/testsuite/lib/libgomp-dg.exp
! f3fb8810228a9d0ac3e57305368e7898  libgomp/testsuite/lib/libgomp.exp
! 3ac651fe0ff05f2928ca58df5928eba9  libgomp/testsuite/libgomp-site-extra.exp.in
  ed323f968c0e2d197ee36bf3b1f678e3  libgomp/testsuite/libgomp-test-support.exp.in
  75cc672a1bf25974c5f4c5e3bc1a74b1  libgomp/testsuite/libgomp.c++/affinity-1.C
  196ffcd43fb2edf60795e6aabf50d259  libgomp/testsuite/libgomp.c++/allocate-1.C
*************** b033e9045b45805b9c4de42aa8f1eb17  libgom
*** 101125,101131 ****
  7c7e2695a56575284cb08fd139d305e3  libgomp/testsuite/libgomp.c++/atomic-7.C
  d9f74ad4b5095a67f1961e49e03171fb  libgomp/testsuite/libgomp.c++/atomic-8.C
  f25833e3fd46b52ba86a77e5fe12fd99  libgomp/testsuite/libgomp.c++/atomic-9.C
! f88d93d5b83ede82c3825b45f6e209a4  libgomp/testsuite/libgomp.c++/c++.exp
  40e00f7e2acb12d4a4edc44e244a8475  libgomp/testsuite/libgomp.c++/cancel-for-1.C
  1390d00e8471a40c55b009573ddeaf72  libgomp/testsuite/libgomp.c++/cancel-for-2.C
  cc0fc2d47b008343a233c7c3955be678  libgomp/testsuite/libgomp.c++/cancel-parallel-1.C
--- 101331,101337 ----
  7c7e2695a56575284cb08fd139d305e3  libgomp/testsuite/libgomp.c++/atomic-7.C
  d9f74ad4b5095a67f1961e49e03171fb  libgomp/testsuite/libgomp.c++/atomic-8.C
  f25833e3fd46b52ba86a77e5fe12fd99  libgomp/testsuite/libgomp.c++/atomic-9.C
! 06d6f5c8612b87b4ac8b1bee5444c051  libgomp/testsuite/libgomp.c++/c++.exp
  40e00f7e2acb12d4a4edc44e244a8475  libgomp/testsuite/libgomp.c++/cancel-for-1.C
  1390d00e8471a40c55b009573ddeaf72  libgomp/testsuite/libgomp.c++/cancel-for-2.C
  cc0fc2d47b008343a233c7c3955be678  libgomp/testsuite/libgomp.c++/cancel-parallel-1.C
*************** bddf1919febc77ab73283f66e954b61e  libgom
*** 101206,101211 ****
--- 101412,101418 ----
  3f755c96f4b692988ea0d1ddeef1ca9b  libgomp/testsuite/libgomp.c++/parallel-1.C
  918bd233ad318b00f080ec4f186b4ee1  libgomp/testsuite/libgomp.c++/pr108180.C
  47f9fb4165180e335283fecf1a9cd061  libgomp/testsuite/libgomp.c++/pr108286.C
+ 2b5f66e459a48cd1cbeb9dc42d3b751e  libgomp/testsuite/libgomp.c++/pr114572.C
  c57d4e906a72b08e5f49bef40306b63f  libgomp/testsuite/libgomp.c++/pr24455-1.C
  e922df8c56b5c5885b9aa8d370725ea9  libgomp/testsuite/libgomp.c++/pr24455.C
  ebbf9a13ba035141ba01b3281fd27fea  libgomp/testsuite/libgomp.c++/pr26691.C
*************** dffc3aabaa5b2461aa560fc66c80c0fe  libgom
*** 101449,101454 ****
--- 101656,101662 ----
  f959c1fe9d94d7321dbc7b419eefe7a7  libgomp/testsuite/libgomp.c-c++-common/monotonic-1.c
  cc6abf61b301e17286872d6d76d483c0  libgomp/testsuite/libgomp.c-c++-common/monotonic-2.c
  1c4ec2975c3dc84ae293e87a285260b4  libgomp/testsuite/libgomp.c-c++-common/nested-parallel-unbalanced.c
+ 83daaaf005b81e8c9d1f407ac1c30136  libgomp/testsuite/libgomp.c-c++-common/non-rect-loop-1.c
  d9c974865c1c03b48fac0231e028a7be  libgomp/testsuite/libgomp.c-c++-common/nonmonotonic-1.c
  214e7bba3d270a6822e2e6161f05981b  libgomp/testsuite/libgomp.c-c++-common/nonmonotonic-2.c
  857b86f8109e8843b901fc93bce4c8a8  libgomp/testsuite/libgomp.c-c++-common/nothing-1.c
*************** ef7b761ee578290c488dcfb7c28a0b66  libgom
*** 102390,102396 ****
  afbfc00298798c7c56e3095384ac408a  libgomp/testsuite/libgomp.graphite/force-parallel-9.c
  f7f04705cef0b98de36866c93b875ee6  libgomp/testsuite/libgomp.graphite/graphite.exp
  b274f32716465c48bfe021ad40ae5184  libgomp/testsuite/libgomp.graphite/pr41118.c
! a8440c7128038abbec4c5b0b8e057565  libgomp/testsuite/libgomp.oacc-c++/c++.exp
  453e6f1d9f502042e4ee6b8e52564c6a  libgomp/testsuite/libgomp.oacc-c++/cache-1.C
  0af65ee2314145d77cef7ebd9e651556  libgomp/testsuite/libgomp.oacc-c++/declare-1.C
  d4976186c6059f98d3a33b36f5c4d896  libgomp/testsuite/libgomp.oacc-c++/declare-pr94120.C
--- 102598,102604 ----
  afbfc00298798c7c56e3095384ac408a  libgomp/testsuite/libgomp.graphite/force-parallel-9.c
  f7f04705cef0b98de36866c93b875ee6  libgomp/testsuite/libgomp.graphite/graphite.exp
  b274f32716465c48bfe021ad40ae5184  libgomp/testsuite/libgomp.graphite/pr41118.c
! fe37b75ae18ede0238a810723e2d50aa  libgomp/testsuite/libgomp.oacc-c++/c++.exp
  453e6f1d9f502042e4ee6b8e52564c6a  libgomp/testsuite/libgomp.oacc-c++/cache-1.C
  0af65ee2314145d77cef7ebd9e651556  libgomp/testsuite/libgomp.oacc-c++/declare-1.C
  d4976186c6059f98d3a33b36f5c4d896  libgomp/testsuite/libgomp.oacc-c++/declare-pr94120.C
*************** e8a3245c095430c8ef2413afe2ee4c48  libgom
*** 103039,103045 ****
  6093e9d697987434cc9d843eba99b2f5  libgomp/work.c
  99c2e5e712b990ee07be10f53e41f3fb  libiberty/.gitignore
  a916467b91076e631dd8edb7424769c7  libiberty/COPYING.LIB
! e16a3741d0ec76e994bdfc8a75ec4895  libiberty/ChangeLog
  347c31392973de6a4872d540c1718dc1  libiberty/ChangeLog.jit
  73876271d63c0a1714fd605cb5898efa  libiberty/Makefile.in
  c68dbf7834af4281ebd84caa3fd54680  libiberty/README
--- 103247,103253 ----
  6093e9d697987434cc9d843eba99b2f5  libgomp/work.c
  99c2e5e712b990ee07be10f53e41f3fb  libiberty/.gitignore
  a916467b91076e631dd8edb7424769c7  libiberty/COPYING.LIB
! bb8cf2c731de0ee49d5fbd98c147c468  libiberty/ChangeLog
  347c31392973de6a4872d540c1718dc1  libiberty/ChangeLog.jit
  73876271d63c0a1714fd605cb5898efa  libiberty/Makefile.in
  c68dbf7834af4281ebd84caa3fd54680  libiberty/README
*************** b2c289eb14e9197dcad172f3acba12b7  libibe
*** 103206,103212 ****
  6f774a92661ca4a067f1691a7925524b  libiberty/xstrerror.c
  212d4847bfdeadb110f63393e845a968  libiberty/xstrndup.c
  51f9ff1eae01d3f75924518629c63c82  libiberty/xvasprintf.c
! 6386763736afc8944622887be4e31d90  libitm/ChangeLog
  a9df0726c501bf71a46f426068e8fc9f  libitm/Makefile.am
  06bb67375770bbbe550b5708624ed9d8  libitm/Makefile.in
  e73ee635a6e93e055b58fc08cecf2d48  libitm/aatree.cc
--- 103414,103420 ----
  6f774a92661ca4a067f1691a7925524b  libiberty/xstrerror.c
  212d4847bfdeadb110f63393e845a968  libiberty/xstrndup.c
  51f9ff1eae01d3f75924518629c63c82  libiberty/xvasprintf.c
! f072b6a03ec146c50be4c70a30e98202  libitm/ChangeLog
  a9df0726c501bf71a46f426068e8fc9f  libitm/Makefile.am
  06bb67375770bbbe550b5708624ed9d8  libitm/Makefile.in
  e73ee635a6e93e055b58fc08cecf2d48  libitm/aatree.cc
*************** fd380f0eaa4841b1f8185e3d4f8b1ff1  libitm
*** 103264,103270 ****
  01980d1244f27e09b91b774c38e34bf0  libitm/dispatch.h
  6191540cdd3efc4f19822744c765842c  libitm/eh_cpp.cc
  b9157df74e562da678e0ad3e8eb5d1dc  libitm/libitm.h
! d3032fc198e2100f4f07a0e0715c52eb  libitm/libitm.info
  0c43820b921ecdbe9d98f068100e716a  libitm/libitm.map
  ea467d7117853d139bb288ab75261139  libitm/libitm.spec.in
  88925f6e4d09e1e09839f2b5b5ae1bf6  libitm/libitm.texi
--- 103472,103478 ----
  01980d1244f27e09b91b774c38e34bf0  libitm/dispatch.h
  6191540cdd3efc4f19822744c765842c  libitm/eh_cpp.cc
  b9157df74e562da678e0ad3e8eb5d1dc  libitm/libitm.h
! 7132ebbadb76578c67b390aef07e9d43  libitm/libitm.info
  0c43820b921ecdbe9d98f068100e716a  libitm/libitm.map
  ea467d7117853d139bb288ab75261139  libitm/libitm.spec.in
  88925f6e4d09e1e09839f2b5b5ae1bf6  libitm/libitm.texi
*************** b4e503ecfdccc9f13da8f73eeb6f23a9  libitm
*** 103310,103316 ****
  ef24198422c19f99b0c41be6a16f7081  libitm/testsuite/libitm.c/txrelease.c
  827aae314af0cb1a41856a4973e45158  libitm/useraction.cc
  b6007e57947202cf48fe0c24317b69fd  libitm/util.cc
! b7e791d773c133e142979417defeb3ef  libobjc/ChangeLog
  890899e673f4a4b9936a49fd705523d7  libobjc/Makefile.in
  81848b4e1479af80c64f39e3c24666aa  libobjc/NXConstStr.m
  24647c970f57dc764e7822e326b18bfc  libobjc/Object.m
--- 103518,103524 ----
  ef24198422c19f99b0c41be6a16f7081  libitm/testsuite/libitm.c/txrelease.c
  827aae314af0cb1a41856a4973e45158  libitm/useraction.cc
  b6007e57947202cf48fe0c24317b69fd  libitm/util.cc
! b4b03a1d611a048085fd9525038bae9d  libobjc/ChangeLog
  890899e673f4a4b9936a49fd705523d7  libobjc/Makefile.in
  81848b4e1479af80c64f39e3c24666aa  libobjc/NXConstStr.m
  24647c970f57dc764e7822e326b18bfc  libobjc/Object.m
*************** a30af7ca948eb564a2533132489a22b2  libobj
*** 103367,103373 ****
  6460e0de9fc2cf12b5f11a9e8c1c1f70  libobjc/selector.c
  069f2fe8a2ae9b7e7187303013e644a1  libobjc/sendmsg.c
  5e1cf5e279c3c84fddb5afd6ec6f7741  libobjc/thr.c
! b232f844aaee7de79a24aa7ae72e267e  liboffloadmic/ChangeLog
  99e2b0817f42c602b520261f7dee183b  liboffloadmic/Makefile.am
  a64a74f82774f355013471ad4dbe5014  liboffloadmic/Makefile.in
  ab5ae12a0dda7edadc0bd2be40ccff6a  liboffloadmic/aclocal.m4
--- 103575,103581 ----
  6460e0de9fc2cf12b5f11a9e8c1c1f70  libobjc/selector.c
  069f2fe8a2ae9b7e7187303013e644a1  libobjc/sendmsg.c
  5e1cf5e279c3c84fddb5afd6ec6f7741  libobjc/thr.c
! f5fef5a7fee5f4f1c781a392f1cccfee  liboffloadmic/ChangeLog
  99e2b0817f42c602b520261f7dee183b  liboffloadmic/Makefile.am
  a64a74f82774f355013471ad4dbe5014  liboffloadmic/Makefile.in
  ab5ae12a0dda7edadc0bd2be40ccff6a  liboffloadmic/aclocal.m4
*************** b1def68202639bd452fb59aea3371fe4  liboff
*** 103455,103461 ****
  4659326a13bd5fed47bb680ddb6f5dc3  liboffloadmic/runtime/orsl-lite/include/orsl-lite.h
  cc603cdf253cc686bfcee192bb7630df  liboffloadmic/runtime/orsl-lite/lib/orsl-lite.c
  dff5c8575c49d6aa71e549b0fa021479  liboffloadmic/runtime/orsl-lite/version.txt
! 6f942a20088d9f248228f7882fca13e5  libphobos/ChangeLog
  340ec558e25dd7225f7130cbf438ffc4  libphobos/Makefile.am
  76f8b53761f8cbc5794e4a5fb5736588  libphobos/Makefile.in
  ee88c20a7744a2305503e1670f3b7889  libphobos/README.gcc
--- 103663,103669 ----
  4659326a13bd5fed47bb680ddb6f5dc3  liboffloadmic/runtime/orsl-lite/include/orsl-lite.h
  cc603cdf253cc686bfcee192bb7630df  liboffloadmic/runtime/orsl-lite/lib/orsl-lite.c
  dff5c8575c49d6aa71e549b0fa021479  liboffloadmic/runtime/orsl-lite/version.txt
! 9abe86146fe9906ef0668895006b31ca  libphobos/ChangeLog
  340ec558e25dd7225f7130cbf438ffc4  libphobos/Makefile.am
  76f8b53761f8cbc5794e4a5fb5736588  libphobos/Makefile.in
  ee88c20a7744a2305503e1670f3b7889  libphobos/README.gcc
*************** fbb3c30724cb241010afacb0505c53e7  libpho
*** 103464,103470 ****
  4923b1152206303a26c7dfb87f5de315  libphobos/config.h.in
  887a4943e7312bf370be5a00158d366f  libphobos/configure
  05a5341e706c429fee8fa722908db394  libphobos/configure.ac
! 112929974da1fdaa8a96be23952f9a7b  libphobos/configure.tgt
  fb19f2254dad8fbcb5691d673899ddd6  libphobos/d_rules.am
  e4224ccaecb14d942c71d31bef20d78c  libphobos/libdruntime/LICENSE.txt
  7b327ed3d03305451c4c79b5644c2e23  libphobos/libdruntime/MERGE
--- 103672,103678 ----
  4923b1152206303a26c7dfb87f5de315  libphobos/config.h.in
  887a4943e7312bf370be5a00158d366f  libphobos/configure
  05a5341e706c429fee8fa722908db394  libphobos/configure.ac
! 997d010882a14f52760f71c6f479d908  libphobos/configure.tgt
  fb19f2254dad8fbcb5691d673899ddd6  libphobos/d_rules.am
  e4224ccaecb14d942c71d31bef20d78c  libphobos/libdruntime/LICENSE.txt
  7b327ed3d03305451c4c79b5644c2e23  libphobos/libdruntime/MERGE
*************** b11b71e0ad87c1b0e8f53c2841b00f1f  libpho
*** 103487,103493 ****
  49d61e2bb179d74c692b97a61a0bd2ff  libphobos/libdruntime/core/bitop.d
  4a82ffb16f497f908bf37f14173450ca  libphobos/libdruntime/core/builtins.d
  46c8a565a874deb70d23572b5b8f97bf  libphobos/libdruntime/core/checkedint.d
! e78005e94abbe57989cebd7c9a7c745f  libphobos/libdruntime/core/cpuid.d
  6df09f0b0ff14518ab41347884ff95fd  libphobos/libdruntime/core/demangle.d
  e07710eec83b5ac9590ee99967db86b7  libphobos/libdruntime/core/exception.d
  29b15a06fa6567c6eb960bb8f47b97d0  libphobos/libdruntime/core/gc/config.d
--- 103695,103701 ----
  49d61e2bb179d74c692b97a61a0bd2ff  libphobos/libdruntime/core/bitop.d
  4a82ffb16f497f908bf37f14173450ca  libphobos/libdruntime/core/builtins.d
  46c8a565a874deb70d23572b5b8f97bf  libphobos/libdruntime/core/checkedint.d
! c118150dc09078f9987c46ffb8679df1  libphobos/libdruntime/core/cpuid.d
  6df09f0b0ff14518ab41347884ff95fd  libphobos/libdruntime/core/demangle.d
  e07710eec83b5ac9590ee99967db86b7  libphobos/libdruntime/core/exception.d
  29b15a06fa6567c6eb960bb8f47b97d0  libphobos/libdruntime/core/gc/config.d
*************** be2340569194e9c072c40fc94eab3483  libpho
*** 104025,104031 ****
  c49ab40607849fa623787878420e7207  libphobos/m4/gdc.m4
  458abf211dc60540bf28a9257d4bd4e5  libphobos/m4/libtool.m4
  e4224ccaecb14d942c71d31bef20d78c  libphobos/src/LICENSE_1_0.txt
! bf75d8204f8b8dc3f58b5d49af9bae18  libphobos/src/MERGE
  7551c0d5a6b83f8147986e95ed723971  libphobos/src/Makefile.am
  250255bfc33ebb151181231740d0b48b  libphobos/src/Makefile.in
  ff30fe7275b03f69e2a7796e47d142e8  libphobos/src/drtstuff.spec
--- 104233,104239 ----
  c49ab40607849fa623787878420e7207  libphobos/m4/gdc.m4
  458abf211dc60540bf28a9257d4bd4e5  libphobos/m4/libtool.m4
  e4224ccaecb14d942c71d31bef20d78c  libphobos/src/LICENSE_1_0.txt
! ad5939218d15f2ef08ad91c924f685d0  libphobos/src/MERGE
  7551c0d5a6b83f8147986e95ed723971  libphobos/src/Makefile.am
  250255bfc33ebb151181231740d0b48b  libphobos/src/Makefile.in
  ff30fe7275b03f69e2a7796e47d142e8  libphobos/src/drtstuff.spec
*************** d7e0be2558cfd762beb23a58be6fc33d  libpho
*** 104050,104056 ****
  757c8eb1d1c8a51cb52672afd0ad6523  libphobos/src/std/compiler.d
  7d70b27133c5d68900d3722282927e68  libphobos/src/std/complex.d
  9d843077700d2f4ce86837f6c490bb1e  libphobos/src/std/concurrency.d
! 004ac7014a2a3eb7d0ec935350093163  libphobos/src/std/container/array.d
  fbf4cee1f26069434cc434da66c2d9a0  libphobos/src/std/container/binaryheap.d
  d4cbd0e5494bb1e212e809ceba1f3787  libphobos/src/std/container/dlist.d
  df3f67c15b5b7b1af94bf29d9744f005  libphobos/src/std/container/package.d
--- 104258,104264 ----
  757c8eb1d1c8a51cb52672afd0ad6523  libphobos/src/std/compiler.d
  7d70b27133c5d68900d3722282927e68  libphobos/src/std/complex.d
  9d843077700d2f4ce86837f6c490bb1e  libphobos/src/std/concurrency.d
! c2eebb4f46c1e26a43e14ff06660ab15  libphobos/src/std/container/array.d
  fbf4cee1f26069434cc434da66c2d9a0  libphobos/src/std/container/binaryheap.d
  d4cbd0e5494bb1e212e809ceba1f3787  libphobos/src/std/container/dlist.d
  df3f67c15b5b7b1af94bf29d9744f005  libphobos/src/std/container/package.d
*************** ece83ca6b8d7d3df554ca657bdcc387d  libpho
*** 104179,104185 ****
  f0a368222f2eb4ba986cce7bb91802ce  libphobos/src/std/sumtype.d
  743fc73fb5b932ab501e2690fb60f287  libphobos/src/std/system.d
  16bee9a601a5394901ad560af671980b  libphobos/src/std/traits.d
! cad380d728c4715a4d8f53e6cbee63e9  libphobos/src/std/typecons.d
  8592c7afe7a1de32c25d04e3fa0f2bca  libphobos/src/std/typetuple.d
  745692defd8651a1789b4bfc936271a1  libphobos/src/std/uni/package.d
  c2ff190df1f5298cbcc40494150b1d48  libphobos/src/std/uri.d
--- 104387,104393 ----
  f0a368222f2eb4ba986cce7bb91802ce  libphobos/src/std/sumtype.d
  743fc73fb5b932ab501e2690fb60f287  libphobos/src/std/system.d
  16bee9a601a5394901ad560af671980b  libphobos/src/std/traits.d
! 65750d9deabecd03d4d1209fc967c46c  libphobos/src/std/typecons.d
  8592c7afe7a1de32c25d04e3fa0f2bca  libphobos/src/std/typetuple.d
  745692defd8651a1789b4bfc936271a1  libphobos/src/std/uni/package.d
  c2ff190df1f5298cbcc40494150b1d48  libphobos/src/std/uri.d
*************** bf5b834c84dce34c411728d08e740501  libpho
*** 104242,104248 ****
  68b182a855dd5d72a6c0afd27961c698  libphobos/testsuite/libphobos.exceptions/unknown_gc.d
  b6ebfcdaf3a8630eae6d2fea0200d718  libphobos/testsuite/libphobos.gc/attributes.d
  5becf076c0fa4681b6900d0d305d77c1  libphobos/testsuite/libphobos.gc/forkgc.d
! 8af09af86fcec343cb88000da6cfb030  libphobos/testsuite/libphobos.gc/forkgc2.d
  774f5323f130348fc511b3351208502e  libphobos/testsuite/libphobos.gc/gc.exp
  2edada512091a3b4061f7667900f9563  libphobos/testsuite/libphobos.gc/nocollect.d
  96e067519bb8d41abce482b6595333aa  libphobos/testsuite/libphobos.gc/precisegc.d
--- 104450,104456 ----
  68b182a855dd5d72a6c0afd27961c698  libphobos/testsuite/libphobos.exceptions/unknown_gc.d
  b6ebfcdaf3a8630eae6d2fea0200d718  libphobos/testsuite/libphobos.gc/attributes.d
  5becf076c0fa4681b6900d0d305d77c1  libphobos/testsuite/libphobos.gc/forkgc.d
! df3ff72b86d93171f71ffc809fb04d95  libphobos/testsuite/libphobos.gc/forkgc2.d
  774f5323f130348fc511b3351208502e  libphobos/testsuite/libphobos.gc/gc.exp
  2edada512091a3b4061f7667900f9563  libphobos/testsuite/libphobos.gc/nocollect.d
  96e067519bb8d41abce482b6595333aa  libphobos/testsuite/libphobos.gc/precisegc.d
*************** d3ca33295a3a7d8dce98defab11dd626  libpho
*** 104298,104304 ****
  0a20e31851bfeb7af5c833abe63b3ba1  libphobos/testsuite/libphobos.unittest/unittest.exp
  bf9a9859c3d5e0581c756501aefba7b9  libphobos/testsuite/testsuite_flags.in
  a916467b91076e631dd8edb7424769c7  libquadmath/COPYING.LIB
! 989d3fc05f2191afc391b94a8b335f71  libquadmath/ChangeLog
  4696eddf264dd090e144b4849b0a6d91  libquadmath/Makefile.am
  644a78a01d94abe28b364eaa21142d82  libquadmath/Makefile.in
  d9afbc1f1e04c7e461265ff9323cc6f4  libquadmath/acinclude.m4
--- 104506,104512 ----
  0a20e31851bfeb7af5c833abe63b3ba1  libphobos/testsuite/libphobos.unittest/unittest.exp
  bf9a9859c3d5e0581c756501aefba7b9  libphobos/testsuite/testsuite_flags.in
  a916467b91076e631dd8edb7424769c7  libquadmath/COPYING.LIB
! 22232001f6c99303e8d9eff8388ca7bf  libquadmath/ChangeLog
  4696eddf264dd090e144b4849b0a6d91  libquadmath/Makefile.am
  644a78a01d94abe28b364eaa21142d82  libquadmath/Makefile.in
  d9afbc1f1e04c7e461265ff9323cc6f4  libquadmath/acinclude.m4
*************** d9afbc1f1e04c7e461265ff9323cc6f4  libqua
*** 104306,104312 ****
  cf5a7864ff15ab4dd1604e0f6fe4e501  libquadmath/config.h.in
  29f1dc1d4d1b2c2dde209fe86503326b  libquadmath/configure
  06e51379889d00dc467f2a2d496fa0a7  libquadmath/configure.ac
! ad2f49008e837f007286d54545656dcc  libquadmath/libquadmath.info
  b19dc24b5767bb9f3e4d7b3bb50f9f47  libquadmath/libquadmath.texi
  77280bb7ee423875e03d9c0d34527df6  libquadmath/libtool-version
  452fee0ef153d65eb7413a5103c63a23  libquadmath/math/acoshq.c
--- 104514,104520 ----
  cf5a7864ff15ab4dd1604e0f6fe4e501  libquadmath/config.h.in
  29f1dc1d4d1b2c2dde209fe86503326b  libquadmath/configure
  06e51379889d00dc467f2a2d496fa0a7  libquadmath/configure.ac
! f33b7afbc989c830c805e3906f49f823  libquadmath/libquadmath.info
  b19dc24b5767bb9f3e4d7b3bb50f9f47  libquadmath/libquadmath.texi
  77280bb7ee423875e03d9c0d34527df6  libquadmath/libtool-version
  452fee0ef153d65eb7413a5103c63a23  libquadmath/math/acoshq.c
*************** b67a007c23999dda365051cda023edbf  libqua
*** 104420,104427 ****
  dccfb932e7a4ec8c89731a6c7a7a9b82  libquadmath/printf/mul.c
  1cfc3bffd2c94cb06e55b49841dc8f7f  libquadmath/printf/mul_1.c
  f387f032d813cca837e7cf5477e2f6d5  libquadmath/printf/mul_n.c
! 155ece2d5e94e8539083ccfb4779c856  libquadmath/printf/printf_fp.c
! d372c1026983b3d0a5d2fca4a2ff5226  libquadmath/printf/printf_fphex.c
  e1960c6cccb78a5a2d60bdfe428c9d1b  libquadmath/printf/quadmath-printf.c
  793f681760a8266fc2adf2810355df6a  libquadmath/printf/quadmath-printf.h
  4d100ac07c5c1c4033ef4b9f60c96605  libquadmath/printf/rshift.c
--- 104628,104635 ----
  dccfb932e7a4ec8c89731a6c7a7a9b82  libquadmath/printf/mul.c
  1cfc3bffd2c94cb06e55b49841dc8f7f  libquadmath/printf/mul_1.c
  f387f032d813cca837e7cf5477e2f6d5  libquadmath/printf/mul_n.c
! 8f689c2eecdac18dd2ba0d5492bfcd5d  libquadmath/printf/printf_fp.c
! 9bc3ff4862b4fe31d0be46abc64a8bc4  libquadmath/printf/printf_fphex.c
  e1960c6cccb78a5a2d60bdfe428c9d1b  libquadmath/printf/quadmath-printf.c
  793f681760a8266fc2adf2810355df6a  libquadmath/printf/quadmath-printf.h
  4d100ac07c5c1c4033ef4b9f60c96605  libquadmath/printf/rshift.c
*************** e0bd9b8669e44ec6010f92da1d5188ad  libqua
*** 104438,104444 ****
  af84fa5118f4adec8393614994e1c4d6  libquadmath/strtod/strtoflt128.c
  d15a18f7c46ba2add6148edc5b7563c0  libquadmath/strtod/tens_in_limb.c
  12c73a846f7668d29de720bd79502bef  libquadmath/update-quadmath.py
! 21adb4e138b0d07b21ffb5b7797f1d03  libsanitizer/ChangeLog
  63916ba64a3cfa7ce2809fb46ab38597  libsanitizer/HOWTO_MERGE
  0249c37748936faf5b1efd5789587909  libsanitizer/LICENSE.TXT
  eb7d5a3897193a0675d10dd982bfae23  libsanitizer/LOCAL_PATCHES
--- 104646,104652 ----
  af84fa5118f4adec8393614994e1c4d6  libquadmath/strtod/strtoflt128.c
  d15a18f7c46ba2add6148edc5b7563c0  libquadmath/strtod/tens_in_limb.c
  12c73a846f7668d29de720bd79502bef  libquadmath/update-quadmath.py
! 7816518b7997079987d8e04354282881  libsanitizer/ChangeLog
  63916ba64a3cfa7ce2809fb46ab38597  libsanitizer/HOWTO_MERGE
  0249c37748936faf5b1efd5789587909  libsanitizer/LICENSE.TXT
  eb7d5a3897193a0675d10dd982bfae23  libsanitizer/LOCAL_PATCHES
*************** c50a89dac6948f41e92cfe2a810a13f8  libsan
*** 104515,104521 ****
  4d6948c4912be5da16e30aac001b87d7  libsanitizer/config.h.in
  f8900d5fa9ad163e05755076d9d6f33c  libsanitizer/configure
  230826c82aead0ae56877c46d18fd4af  libsanitizer/configure.ac
! 60b96644243456152e202b3863d62262  libsanitizer/configure.tgt
  67b34ddb7e381b476beabd5723cad66a  libsanitizer/hwasan/Makefile.am
  86ee1b4ab68f16b6a2d0b2ed9efc94d4  libsanitizer/hwasan/Makefile.in
  cee328f472ec30601c33b88db78e99e9  libsanitizer/hwasan/hwasan.cpp
--- 104723,104729 ----
  4d6948c4912be5da16e30aac001b87d7  libsanitizer/config.h.in
  f8900d5fa9ad163e05755076d9d6f33c  libsanitizer/configure
  230826c82aead0ae56877c46d18fd4af  libsanitizer/configure.ac
! 04191dbb4e9c8e4f7e942ee188ca7fc7  libsanitizer/configure.tgt
  67b34ddb7e381b476beabd5723cad66a  libsanitizer/hwasan/Makefile.am
  86ee1b4ab68f16b6a2d0b2ed9efc94d4  libsanitizer/hwasan/Makefile.in
  cee328f472ec30601c33b88db78e99e9  libsanitizer/hwasan/hwasan.cpp
*************** bd58abd803667b3373381b6bb1b68f1b  libsan
*** 104909,104915 ****
  545e91fffb8d4987ca5d1c0054aadd11  libsanitizer/ubsan/ubsan_win_dll_thunk.cpp
  e9c85349d92ab1a6b66d0872077acd3b  libsanitizer/ubsan/ubsan_win_dynamic_runtime_thunk.cpp
  72f297f487b6bb9db917cce361192c28  libsanitizer/ubsan/ubsan_win_weak_interception.cpp
! 723d16da34a48581196cf6ac7b5336c6  libssp/ChangeLog
  6a01d14c2cd27212838caea837dc03f3  libssp/Makefile.am
  b56958cdc5828ca811c35bbf479b3a09  libssp/Makefile.in
  f6f6c804e40e3a3ef407d3d13fafb6c0  libssp/aclocal.m4
--- 105117,105123 ----
  545e91fffb8d4987ca5d1c0054aadd11  libsanitizer/ubsan/ubsan_win_dll_thunk.cpp
  e9c85349d92ab1a6b66d0872077acd3b  libsanitizer/ubsan/ubsan_win_dynamic_runtime_thunk.cpp
  72f297f487b6bb9db917cce361192c28  libsanitizer/ubsan/ubsan_win_weak_interception.cpp
! 65af5514b656c4464e11d482b0dc2edb  libssp/ChangeLog
  6a01d14c2cd27212838caea837dc03f3  libssp/Makefile.am
  b56958cdc5828ca811c35bbf479b3a09  libssp/Makefile.in
  f6f6c804e40e3a3ef407d3d13fafb6c0  libssp/aclocal.m4
*************** b7cf7ac9dd30a51c9de8919a232874a4  libssp
*** 104938,104944 ****
  b81de192dda77932887ae66cf31cdd9e  libssp/strncpy-chk.c
  5c71217c6b2a9d406fbc27d0fc6e8042  libssp/vsnprintf-chk.c
  caf814994c08b81abae4688b582bcaf4  libssp/vsprintf-chk.c
! f42c7883b9ccd043a2ac06e4c909c456  libstdc++-v3/ChangeLog
  7aa6c40440a44fcf5ec94c066160c2f8  libstdc++-v3/ChangeLog-1998
  7aff86600b6a1ed3fa87305075a92db0  libstdc++-v3/ChangeLog-1999
  a6f28e8fc9bb07696a9e068b439a3a87  libstdc++-v3/ChangeLog-2000
--- 105146,105152 ----
  b81de192dda77932887ae66cf31cdd9e  libssp/strncpy-chk.c
  5c71217c6b2a9d406fbc27d0fc6e8042  libssp/vsnprintf-chk.c
  caf814994c08b81abae4688b582bcaf4  libssp/vsprintf-chk.c
! b0f94faa585f575db7e4da71ad9544ac  libstdc++-v3/ChangeLog
  7aa6c40440a44fcf5ec94c066160c2f8  libstdc++-v3/ChangeLog-1998
  7aff86600b6a1ed3fa87305075a92db0  libstdc++-v3/ChangeLog-1999
  a6f28e8fc9bb07696a9e068b439a3a87  libstdc++-v3/ChangeLog-2000
*************** a8f4290dba5b481ad426148a03c75dd0  libstd
*** 104966,104974 ****
  6a380413ccbbfc2fdf8d8bc0138fbbd9  libstdc++-v3/Makefile.am
  19c8cb7684c2596811789c770fbe79fc  libstdc++-v3/Makefile.in
  f372af73db4ac0ad88e43199e1f29e08  libstdc++-v3/README
! 23dae2d9ee02fa80e44e1409f1b3e666  libstdc++-v3/acinclude.m4
  734c1cbc8791fbceb09b49c5d07d6966  libstdc++-v3/aclocal.m4
! 4d6b9664edbfbcffc7321a2d0843b55e  libstdc++-v3/config.h.in
  b321f08c525a980d5443810305bb4463  libstdc++-v3/config/abi/compatibility.h
  1e503159ee7333dd5a3f9df292325d11  libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt
  730569c0ef38f6e6322b3c4ac65253ce  libstdc++-v3/config/abi/post/alpha-linux-gnu/baseline_symbols.txt
--- 105174,105182 ----
  6a380413ccbbfc2fdf8d8bc0138fbbd9  libstdc++-v3/Makefile.am
  19c8cb7684c2596811789c770fbe79fc  libstdc++-v3/Makefile.in
  f372af73db4ac0ad88e43199e1f29e08  libstdc++-v3/README
! 53146b59a99fb6a2e1b6850d5b76bdf2  libstdc++-v3/acinclude.m4
  734c1cbc8791fbceb09b49c5d07d6966  libstdc++-v3/aclocal.m4
! 5c576390e1b3345bb87af431246c8203  libstdc++-v3/config.h.in
  b321f08c525a980d5443810305bb4463  libstdc++-v3/config/abi/compatibility.h
  1e503159ee7333dd5a3f9df292325d11  libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt
  730569c0ef38f6e6322b3c4ac65253ce  libstdc++-v3/config/abi/post/alpha-linux-gnu/baseline_symbols.txt
*************** a26caf1cbae7ec64ae4fbb6f805c0a43  libstd
*** 105028,105034 ****
  c975e13735ebb9be1461f2ad8ac4410d  libstdc++-v3/config/cpu/sh/atomicity.h
  ef2abdb7456c30a1284e9c584aa6c997  libstdc++-v3/config/cpu/sparc/atomic_word.h
  ad343c746c7e744633b4f289946e24e2  libstdc++-v3/config/cpu/sparc/atomicity.h
! cc22c8b1fb2381085637d59007445f35  libstdc++-v3/config/io/basic_file_stdio.cc
  6cf1e4b1e947dc35dd4afd51c59dd19f  libstdc++-v3/config/io/basic_file_stdio.h
  a318b6ec50abc4d7950c4833d5b47e87  libstdc++-v3/config/io/c_io_stdio.h
  f56c983e3b553cbca607693455c506dc  libstdc++-v3/config/locale/darwin/ctype_members.cc
--- 105236,105242 ----
  c975e13735ebb9be1461f2ad8ac4410d  libstdc++-v3/config/cpu/sh/atomicity.h
  ef2abdb7456c30a1284e9c584aa6c997  libstdc++-v3/config/cpu/sparc/atomic_word.h
  ad343c746c7e744633b4f289946e24e2  libstdc++-v3/config/cpu/sparc/atomicity.h
! 8220b0d50652281032e9db975ca8a6e7  libstdc++-v3/config/io/basic_file_stdio.cc
  6cf1e4b1e947dc35dd4afd51c59dd19f  libstdc++-v3/config/io/basic_file_stdio.h
  a318b6ec50abc4d7950c4833d5b47e87  libstdc++-v3/config/io/c_io_stdio.h
  f56c983e3b553cbca607693455c506dc  libstdc++-v3/config/locale/darwin/ctype_members.cc
*************** cf2c568c51de05c8c9ea4fc73cc4a7d1  libstd
*** 105083,105089 ****
  4dba8f5fff21b944bc6c09b7476a0cbe  libstdc++-v3/config/os/bsd/darwin/ctype_base.h
  98b61494bb0364dd62a284430d82b6f8  libstdc++-v3/config/os/bsd/darwin/ctype_configure_char.cc
  bea58f0b1462adb4715391585424c2f4  libstdc++-v3/config/os/bsd/darwin/ctype_inline.h
! 89a3b806f2477b51ebadc834cacf5569  libstdc++-v3/config/os/bsd/darwin/os_defines.h
  9e91dfcb11e4c78744df0e1e0cf69b5b  libstdc++-v3/config/os/bsd/darwin/ppc-extra.ver
  0ce4b7914f00fd6af304f11efd7cfd30  libstdc++-v3/config/os/bsd/dragonfly/ctype_base.h
  eec583ae69a4a2889d741f1943ff6d81  libstdc++-v3/config/os/bsd/dragonfly/ctype_configure_char.cc
--- 105291,105297 ----
  4dba8f5fff21b944bc6c09b7476a0cbe  libstdc++-v3/config/os/bsd/darwin/ctype_base.h
  98b61494bb0364dd62a284430d82b6f8  libstdc++-v3/config/os/bsd/darwin/ctype_configure_char.cc
  bea58f0b1462adb4715391585424c2f4  libstdc++-v3/config/os/bsd/darwin/ctype_inline.h
! 61f3c170f9c486a7e15964376e922a65  libstdc++-v3/config/os/bsd/darwin/os_defines.h
  9e91dfcb11e4c78744df0e1e0cf69b5b  libstdc++-v3/config/os/bsd/darwin/ppc-extra.ver
  0ce4b7914f00fd6af304f11efd7cfd30  libstdc++-v3/config/os/bsd/dragonfly/ctype_base.h
  eec583ae69a4a2889d741f1943ff6d81  libstdc++-v3/config/os/bsd/dragonfly/ctype_configure_char.cc
*************** b32b29daa3ac6240ae38f37366b0d4da  libstd
*** 105156,105163 ****
  78d15556a78885c1221dbb429fd77a08  libstdc++-v3/config/os/vxworks/ctype_configure_char.cc
  11c759cf4b750f149bca3052e251404d  libstdc++-v3/config/os/vxworks/ctype_inline.h
  a58306525e8e9363101bf5738db96b46  libstdc++-v3/config/os/vxworks/os_defines.h
! 07fe1df6923c77da58d3ac4ad7b046be  libstdc++-v3/configure
! 66ce87efbc534ee0cded86eba4d48aeb  libstdc++-v3/configure.ac
  6f48d91af78c16e62f258e7bedec5125  libstdc++-v3/configure.host
  584164974df7c169b96d93356371b4a7  libstdc++-v3/crossconfig.m4
  894b6a88368e88c0d19c47645d774272  libstdc++-v3/doc/Makefile.am
--- 105364,105371 ----
  78d15556a78885c1221dbb429fd77a08  libstdc++-v3/config/os/vxworks/ctype_configure_char.cc
  11c759cf4b750f149bca3052e251404d  libstdc++-v3/config/os/vxworks/ctype_inline.h
  a58306525e8e9363101bf5738db96b46  libstdc++-v3/config/os/vxworks/os_defines.h
! 1d922554a4058f8b3dce8a0b82db0587  libstdc++-v3/configure
! 7a5999cfe631e9eabe5b5318b97da7f1  libstdc++-v3/configure.ac
  6f48d91af78c16e62f258e7bedec5125  libstdc++-v3/configure.host
  584164974df7c169b96d93356371b4a7  libstdc++-v3/crossconfig.m4
  894b6a88368e88c0d19c47645d774272  libstdc++-v3/doc/Makefile.am
*************** c37369d9fe7e0c00db096144ce0a40ac  libstd
*** 105167,105173 ****
  520db39aef0e2a59418132af88b897ed  libstdc++-v3/doc/doxygen/mainpage.html
  f298475c719652bf6b563563d90f327a  libstdc++-v3/doc/doxygen/stdheader.cc
  1273764cd133c402d2d3f22cf2913af5  libstdc++-v3/doc/doxygen/tables.html
! d1ac053e43ea0db0479c78a36b6d65fb  libstdc++-v3/doc/doxygen/user.cfg.in
  66e139590a163a3e9d632f33fbe1d1b3  libstdc++-v3/doc/html/README
  c68ff21babfa14f20b98e36a2c808418  libstdc++-v3/doc/html/api.html
  08920438eea18325b4bfdf979379ff66  libstdc++-v3/doc/html/bk02.html
--- 105375,105381 ----
  520db39aef0e2a59418132af88b897ed  libstdc++-v3/doc/doxygen/mainpage.html
  f298475c719652bf6b563563d90f327a  libstdc++-v3/doc/doxygen/stdheader.cc
  1273764cd133c402d2d3f22cf2913af5  libstdc++-v3/doc/doxygen/tables.html
! afb8b693720cc1c47324b843de9ab041  libstdc++-v3/doc/doxygen/user.cfg.in
  66e139590a163a3e9d632f33fbe1d1b3  libstdc++-v3/doc/html/README
  c68ff21babfa14f20b98e36a2c808418  libstdc++-v3/doc/html/api.html
  08920438eea18325b4bfdf979379ff66  libstdc++-v3/doc/html/bk02.html
*************** df705f3839120dcb896e9839cf3404d0  libstd
*** 105255,105263 ****
  852e27e8edf106e3208592c50daf56a1  libstdc++-v3/doc/html/index.html
  fdf71a5407d0c5ced94a94e8575bb59a  libstdc++-v3/doc/html/manual/abi.html
  4ce10e27356ac31a5b7962aecbeb3638  libstdc++-v3/doc/html/manual/algorithms.html
! 3edb5ffdd17ebdecdb2799211a35cdeb  libstdc++-v3/doc/html/manual/api.html
  8e73d011f5b669c14568508316d1dbf8  libstdc++-v3/doc/html/manual/appendix.html
! 9fecd7dab1bd0d46e97d36cded231ebe  libstdc++-v3/doc/html/manual/appendix_contributing.html
  23038a3eb57967596dd7dc4f944e55e6  libstdc++-v3/doc/html/manual/appendix_free.html
  7bedd2c8f6a4683546db552dc3e8261f  libstdc++-v3/doc/html/manual/appendix_gfdl.html
  502f9b7267830b21cb88745d060faacf  libstdc++-v3/doc/html/manual/appendix_gpl.html
--- 105463,105471 ----
  852e27e8edf106e3208592c50daf56a1  libstdc++-v3/doc/html/index.html
  fdf71a5407d0c5ced94a94e8575bb59a  libstdc++-v3/doc/html/manual/abi.html
  4ce10e27356ac31a5b7962aecbeb3638  libstdc++-v3/doc/html/manual/algorithms.html
! 67d875c033ec41f37ef7f86b4ef6eacb  libstdc++-v3/doc/html/manual/api.html
  8e73d011f5b669c14568508316d1dbf8  libstdc++-v3/doc/html/manual/appendix.html
! d42d20a79e67c92482e606d7b1711116  libstdc++-v3/doc/html/manual/appendix_contributing.html
  23038a3eb57967596dd7dc4f944e55e6  libstdc++-v3/doc/html/manual/appendix_free.html
  7bedd2c8f6a4683546db552dc3e8261f  libstdc++-v3/doc/html/manual/appendix_gfdl.html
  502f9b7267830b21cb88745d060faacf  libstdc++-v3/doc/html/manual/appendix_gpl.html
*************** c60c6ae778d5dedae24ac21abf948bdb  libstd
*** 105270,105276 ****
  d588d1650d08cdbff4e809d0890cc498  libstdc++-v3/doc/html/manual/bugs.html
  cc3700f2fde50987f186f23abf98a7b1  libstdc++-v3/doc/html/manual/concept_checking.html
  f3a54a6315d716742603d33f454f2c19  libstdc++-v3/doc/html/manual/concurrency.html
! 3216f881771cf6846b27f28144bb32d9  libstdc++-v3/doc/html/manual/configure.html
  af4e79b9e55fd023eeb0459df34a4a82  libstdc++-v3/doc/html/manual/containers.html
  c7e40c1085e414b3b4d5896db4013205  libstdc++-v3/doc/html/manual/containers_and_c.html
  f71d3ed5d8c1753572ba02518e3744a9  libstdc++-v3/doc/html/manual/debug.html
--- 105478,105484 ----
  d588d1650d08cdbff4e809d0890cc498  libstdc++-v3/doc/html/manual/bugs.html
  cc3700f2fde50987f186f23abf98a7b1  libstdc++-v3/doc/html/manual/concept_checking.html
  f3a54a6315d716742603d33f454f2c19  libstdc++-v3/doc/html/manual/concurrency.html
! e1fadad9f19b599d57938ddef7e014f1  libstdc++-v3/doc/html/manual/configure.html
  af4e79b9e55fd023eeb0459df34a4a82  libstdc++-v3/doc/html/manual/containers.html
  c7e40c1085e414b3b4d5896db4013205  libstdc++-v3/doc/html/manual/containers_and_c.html
  f71d3ed5d8c1753572ba02518e3744a9  libstdc++-v3/doc/html/manual/debug.html
*************** dc012f6bbeb24332ca023dc15d6da9cf  libstd
*** 105335,105354 ****
  d55e182adbf08772ec85b18d390b0dbb  libstdc++-v3/doc/html/manual/profile_mode_diagnostics.html
  0e9a02c563561ad32d5b24fd930bf8f5  libstdc++-v3/doc/html/manual/profile_mode_impl.html
  ffceba0f3c20f451f9753c101c0fa634  libstdc++-v3/doc/html/manual/setup.html
! f82628740b7b95e95da49ce234a05bca  libstdc++-v3/doc/html/manual/source_code_style.html
  f875f3f4cddfe4fee6aff2308ccb4563  libstdc++-v3/doc/html/manual/source_design_notes.html
  391422dd4f4cdbd4d764a952a0f345e6  libstdc++-v3/doc/html/manual/source_organization.html
! 0567c4560dd73b63ee30617758a1be5e  libstdc++-v3/doc/html/manual/status.html
  ea0c531c09fa230f346f8ba700961e4a  libstdc++-v3/doc/html/manual/std_contents.html
  dbb5f81a9e8864374fbb835eaa4e8b0d  libstdc++-v3/doc/html/manual/streambufs.html
  47e6a6ef4752e7c7e3ecb2a4948a7514  libstdc++-v3/doc/html/manual/strings.html
  4fceea62121ba1fe214414a7506d385e  libstdc++-v3/doc/html/manual/stringstreams.html
  52f0c68b15c7a2b6e098bcfb8da0094b  libstdc++-v3/doc/html/manual/support.html
  fcdceeabf3a95117ea22e93a0354e564  libstdc++-v3/doc/html/manual/termination.html
! e19e711d0b369090f4782ac1fc0792bd  libstdc++-v3/doc/html/manual/test.html
  c39b927efcec5ac84139c1490c8ef320  libstdc++-v3/doc/html/manual/traits.html
  530b96535baacfe35df2e65f9dfe7efc  libstdc++-v3/doc/html/manual/unordered_associative.html
! 760f16482c3b2b7c3604132c2c8bdc7e  libstdc++-v3/doc/html/manual/using.html
  a98d94ba8ccfb620e98ebfe01192e61e  libstdc++-v3/doc/html/manual/using_concurrency.html
  79fb9de4a4c89a913a76e1828500499d  libstdc++-v3/doc/html/manual/using_dual_abi.html
  4868e3591133577974ca85a537dbd8a0  libstdc++-v3/doc/html/manual/using_dynamic_or_shared.html
--- 105543,105562 ----
  d55e182adbf08772ec85b18d390b0dbb  libstdc++-v3/doc/html/manual/profile_mode_diagnostics.html
  0e9a02c563561ad32d5b24fd930bf8f5  libstdc++-v3/doc/html/manual/profile_mode_impl.html
  ffceba0f3c20f451f9753c101c0fa634  libstdc++-v3/doc/html/manual/setup.html
! 01c6fb78afa342def6da44376b90a890  libstdc++-v3/doc/html/manual/source_code_style.html
  f875f3f4cddfe4fee6aff2308ccb4563  libstdc++-v3/doc/html/manual/source_design_notes.html
  391422dd4f4cdbd4d764a952a0f345e6  libstdc++-v3/doc/html/manual/source_organization.html
! 6265ce69985e68cb8528e53039f5c9de  libstdc++-v3/doc/html/manual/status.html
  ea0c531c09fa230f346f8ba700961e4a  libstdc++-v3/doc/html/manual/std_contents.html
  dbb5f81a9e8864374fbb835eaa4e8b0d  libstdc++-v3/doc/html/manual/streambufs.html
  47e6a6ef4752e7c7e3ecb2a4948a7514  libstdc++-v3/doc/html/manual/strings.html
  4fceea62121ba1fe214414a7506d385e  libstdc++-v3/doc/html/manual/stringstreams.html
  52f0c68b15c7a2b6e098bcfb8da0094b  libstdc++-v3/doc/html/manual/support.html
  fcdceeabf3a95117ea22e93a0354e564  libstdc++-v3/doc/html/manual/termination.html
! 37fafe257528597090258f340dbfb13b  libstdc++-v3/doc/html/manual/test.html
  c39b927efcec5ac84139c1490c8ef320  libstdc++-v3/doc/html/manual/traits.html
  530b96535baacfe35df2e65f9dfe7efc  libstdc++-v3/doc/html/manual/unordered_associative.html
! 493e51f601322aeac551a55654678e1a  libstdc++-v3/doc/html/manual/using.html
  a98d94ba8ccfb620e98ebfe01192e61e  libstdc++-v3/doc/html/manual/using_concurrency.html
  79fb9de4a4c89a913a76e1828500499d  libstdc++-v3/doc/html/manual/using_dual_abi.html
  4868e3591133577974ca85a537dbd8a0  libstdc++-v3/doc/html/manual/using_dynamic_or_shared.html
*************** df705f3839120dcb896e9839cf3404d0  libstd
*** 105545,105551 ****
  bcce05ee85389a72fb282de91180fe37  libstdc++-v3/doc/xml/manual/abi.xml
  c1d775ba87be90b85044162eab59a66c  libstdc++-v3/doc/xml/manual/algorithms.xml
  14c656cb14d8e0a60b8817d8934d7766  libstdc++-v3/doc/xml/manual/allocator.xml
! 955fe25d6d9b0ad80a7234695a81a794  libstdc++-v3/doc/xml/manual/appendix_contributing.xml
  11e0fd62db5b93db462f3c54750904ec  libstdc++-v3/doc/xml/manual/appendix_free.xml
  0e37b1b056c89ad8cd7ef98f9924284c  libstdc++-v3/doc/xml/manual/appendix_porting.xml
  5139cfc8fdaabd93b5aa7362de789702  libstdc++-v3/doc/xml/manual/atomics.xml
--- 105753,105759 ----
  bcce05ee85389a72fb282de91180fe37  libstdc++-v3/doc/xml/manual/abi.xml
  c1d775ba87be90b85044162eab59a66c  libstdc++-v3/doc/xml/manual/algorithms.xml
  14c656cb14d8e0a60b8817d8934d7766  libstdc++-v3/doc/xml/manual/allocator.xml
! 2344688c312f16b8ba7df0ee483fcb5e  libstdc++-v3/doc/xml/manual/appendix_contributing.xml
  11e0fd62db5b93db462f3c54750904ec  libstdc++-v3/doc/xml/manual/appendix_free.xml
  0e37b1b056c89ad8cd7ef98f9924284c  libstdc++-v3/doc/xml/manual/appendix_porting.xml
  5139cfc8fdaabd93b5aa7362de789702  libstdc++-v3/doc/xml/manual/atomics.xml
*************** e184d827d7fb559037041e81118936cb  libstd
*** 105556,105569 ****
  8f13cae7ea80bc018b87b4ff8de7e3cf  libstdc++-v3/doc/xml/manual/codecvt.xml
  af3361d0d0af961859ec0346c38ac8c8  libstdc++-v3/doc/xml/manual/concurrency.xml
  86f27306f8b76aebd69ea92641fd2c94  libstdc++-v3/doc/xml/manual/concurrency_extensions.xml
! d46239fa5428398e5f3b540396f51e6b  libstdc++-v3/doc/xml/manual/configure.xml
  b7a892b2e432f52274c482549c3264a2  libstdc++-v3/doc/xml/manual/containers.xml
  18a1ebf5d656fe7bf648dd0489546d33  libstdc++-v3/doc/xml/manual/ctype.xml
  1ef2d3bb759e6f6de762e1c79ff08030  libstdc++-v3/doc/xml/manual/debug.xml
  c7064e3c477845a150f6e575e6babf6e  libstdc++-v3/doc/xml/manual/debug_mode.xml
  f320f25003678cca910f09ba54c923fc  libstdc++-v3/doc/xml/manual/diagnostics.xml
  561ce4bba87e35c92c47d95599ca9d9b  libstdc++-v3/doc/xml/manual/documentation_hacking.xml
! c2f83747e3130e48aca7fb2485d3819b  libstdc++-v3/doc/xml/manual/evolution.xml
  137276d6eb0bbaf6563b8319770dc747  libstdc++-v3/doc/xml/manual/extensions.xml
  7f1864c7f3c3b2bfde84b7086be97ca7  libstdc++-v3/doc/xml/manual/internals.xml
  4ea0fb8db18e25304b15e44203e758ed  libstdc++-v3/doc/xml/manual/intro.xml
--- 105764,105777 ----
  8f13cae7ea80bc018b87b4ff8de7e3cf  libstdc++-v3/doc/xml/manual/codecvt.xml
  af3361d0d0af961859ec0346c38ac8c8  libstdc++-v3/doc/xml/manual/concurrency.xml
  86f27306f8b76aebd69ea92641fd2c94  libstdc++-v3/doc/xml/manual/concurrency_extensions.xml
! 553d4d98030b907a6eda291624e1094e  libstdc++-v3/doc/xml/manual/configure.xml
  b7a892b2e432f52274c482549c3264a2  libstdc++-v3/doc/xml/manual/containers.xml
  18a1ebf5d656fe7bf648dd0489546d33  libstdc++-v3/doc/xml/manual/ctype.xml
  1ef2d3bb759e6f6de762e1c79ff08030  libstdc++-v3/doc/xml/manual/debug.xml
  c7064e3c477845a150f6e575e6babf6e  libstdc++-v3/doc/xml/manual/debug_mode.xml
  f320f25003678cca910f09ba54c923fc  libstdc++-v3/doc/xml/manual/diagnostics.xml
  561ce4bba87e35c92c47d95599ca9d9b  libstdc++-v3/doc/xml/manual/documentation_hacking.xml
! a2116aae732dc28139ce0b6ce1ae8d70  libstdc++-v3/doc/xml/manual/evolution.xml
  137276d6eb0bbaf6563b8319770dc747  libstdc++-v3/doc/xml/manual/extensions.xml
  7f1864c7f3c3b2bfde84b7086be97ca7  libstdc++-v3/doc/xml/manual/internals.xml
  4ea0fb8db18e25304b15e44203e758ed  libstdc++-v3/doc/xml/manual/intro.xml
*************** f25986e96331b9ee671b4fe62ab33a1c  libstd
*** 105581,105599 ****
  cec5c5415c371a664adb0490e2571c3c  libstdc++-v3/doc/xml/manual/shared_ptr.xml
  d7f222c42325cd44eadad2c59eef7e6f  libstdc++-v3/doc/xml/manual/spine.xml
  3a11d8e8ab3c584eff4a1db8c89ebb6c  libstdc++-v3/doc/xml/manual/status_cxx1998.xml
! 6ee153ca7e427e35886ef886036025a1  libstdc++-v3/doc/xml/manual/status_cxx2011.xml
! 25b84ee8640ad2ff1c31a6404175c003  libstdc++-v3/doc/xml/manual/status_cxx2014.xml
! 1d6d1225c31632fe76540e978d0ec065  libstdc++-v3/doc/xml/manual/status_cxx2017.xml
! e5396ebd0700ccc6890689e6653ca20e  libstdc++-v3/doc/xml/manual/status_cxx2020.xml
  0c81b681c42b9213a5b7b6368df3e5f3  libstdc++-v3/doc/xml/manual/status_cxx2023.xml
  e12241b98a6c1e835b7b1d1bb31761ca  libstdc++-v3/doc/xml/manual/status_cxxis29124.xml
  7ab71114868b2646704eea5f5e7b1006  libstdc++-v3/doc/xml/manual/status_cxxtr1.xml
  f12dd94d3ab272a7ed475798c7ce8a2d  libstdc++-v3/doc/xml/manual/status_cxxtr24733.xml
  49334f70b9df9a3f9b81e04a418e8066  libstdc++-v3/doc/xml/manual/strings.xml
  2b80feb1b53a8d0895a292620ec430b2  libstdc++-v3/doc/xml/manual/support.xml
! 5a89da07906610f85971c9faa717428e  libstdc++-v3/doc/xml/manual/test.xml
  e2e099be3dd6a4b7a940a7232635ee2c  libstdc++-v3/doc/xml/manual/test_policy_data_structures.xml
! ff637d15d6e9b2e5fbe2af4b74b7e983  libstdc++-v3/doc/xml/manual/using.xml
  30ec356feba73e85c6cef4c27dbb372e  libstdc++-v3/doc/xml/manual/using_exceptions.xml
  74a5acaa32b3d223bd413c1bb5b69ac6  libstdc++-v3/doc/xml/manual/utilities.xml
  bea338f191a4667e20c7800cc6e08c93  libstdc++-v3/doc/xml/spine.xml
--- 105789,105807 ----
  cec5c5415c371a664adb0490e2571c3c  libstdc++-v3/doc/xml/manual/shared_ptr.xml
  d7f222c42325cd44eadad2c59eef7e6f  libstdc++-v3/doc/xml/manual/spine.xml
  3a11d8e8ab3c584eff4a1db8c89ebb6c  libstdc++-v3/doc/xml/manual/status_cxx1998.xml
! 018d0862c809a2964987fff1cc9fed32  libstdc++-v3/doc/xml/manual/status_cxx2011.xml
! 2a26b112e48c210818293fa1236d6a77  libstdc++-v3/doc/xml/manual/status_cxx2014.xml
! 009950fad0ee8a5fe2658c2a4eb9de1f  libstdc++-v3/doc/xml/manual/status_cxx2017.xml
! e4c232569684bb777069868dc10f1144  libstdc++-v3/doc/xml/manual/status_cxx2020.xml
  0c81b681c42b9213a5b7b6368df3e5f3  libstdc++-v3/doc/xml/manual/status_cxx2023.xml
  e12241b98a6c1e835b7b1d1bb31761ca  libstdc++-v3/doc/xml/manual/status_cxxis29124.xml
  7ab71114868b2646704eea5f5e7b1006  libstdc++-v3/doc/xml/manual/status_cxxtr1.xml
  f12dd94d3ab272a7ed475798c7ce8a2d  libstdc++-v3/doc/xml/manual/status_cxxtr24733.xml
  49334f70b9df9a3f9b81e04a418e8066  libstdc++-v3/doc/xml/manual/strings.xml
  2b80feb1b53a8d0895a292620ec430b2  libstdc++-v3/doc/xml/manual/support.xml
! 97018a0f4a315121c5252972bbb47f4d  libstdc++-v3/doc/xml/manual/test.xml
  e2e099be3dd6a4b7a940a7232635ee2c  libstdc++-v3/doc/xml/manual/test_policy_data_structures.xml
! a8210fcc91ba532f4b5de20f748cdd8d  libstdc++-v3/doc/xml/manual/using.xml
  30ec356feba73e85c6cef4c27dbb372e  libstdc++-v3/doc/xml/manual/using_exceptions.xml
  74a5acaa32b3d223bd413c1bb5b69ac6  libstdc++-v3/doc/xml/manual/utilities.xml
  bea338f191a4667e20c7800cc6e08c93  libstdc++-v3/doc/xml/spine.xml
*************** bd966b4a0df6f2a84f9770525581d45c  libstd
*** 105601,105607 ****
  42d14268f2b16c54a6bc2f71538a838c  libstdc++-v3/fragment.am
  d7fa4da355c34d2a2d21cff4143b926f  libstdc++-v3/include/Makefile.am
  f405d265bf2ae2b1dc65804f90517ae6  libstdc++-v3/include/Makefile.in
! 890ccb6d9c249c324d5544704ac517fe  libstdc++-v3/include/backward/auto_ptr.h
  7888a26e5e4a344cb3aee10fe9742d67  libstdc++-v3/include/backward/backward_warning.h
  6b1e3f2a153145ca36e79c175901ed4a  libstdc++-v3/include/backward/binders.h
  11289cccffdd5941fbc099dfde3bf5e7  libstdc++-v3/include/backward/hash_fun.h
--- 105809,105815 ----
  42d14268f2b16c54a6bc2f71538a838c  libstdc++-v3/fragment.am
  d7fa4da355c34d2a2d21cff4143b926f  libstdc++-v3/include/Makefile.am
  f405d265bf2ae2b1dc65804f90517ae6  libstdc++-v3/include/Makefile.in
! d32a78c1055cf3eeb2ae92ef9500da5e  libstdc++-v3/include/backward/auto_ptr.h
  7888a26e5e4a344cb3aee10fe9742d67  libstdc++-v3/include/backward/backward_warning.h
  6b1e3f2a153145ca36e79c175901ed4a  libstdc++-v3/include/backward/binders.h
  11289cccffdd5941fbc099dfde3bf5e7  libstdc++-v3/include/backward/hash_fun.h
*************** f405d265bf2ae2b1dc65804f90517ae6  libstd
*** 105609,105659 ****
  c182ef70f8140930d68b4febf211cd38  libstdc++-v3/include/backward/hash_set
  0786c5fabbdc02e1b5d7f5941b1036f0  libstdc++-v3/include/backward/hashtable.h
  e87dd399a9a3274bd93b51404f64d0bf  libstdc++-v3/include/backward/strstream
! dd3f7f524033a844f5bb1056a873b4ff  libstdc++-v3/include/bits/algorithmfwd.h
  7217663cbd5e0a5e2111f3fec04713c8  libstdc++-v3/include/bits/align.h
! fd441eaab0a8965f7012f98a3edcbb86  libstdc++-v3/include/bits/alloc_traits.h
  6c08ea97cd0ca641b7c6a4e7a687cd0e  libstdc++-v3/include/bits/allocated_ptr.h
! 6fa856a93062ce2b39cf0c9a3a6a3468  libstdc++-v3/include/bits/allocator.h
! a1f49462067f381335c5712907aac440  libstdc++-v3/include/bits/atomic_base.h
  7d8c351bca946a7fab5426d823e9989f  libstdc++-v3/include/bits/atomic_futex.h
  2bc333d129d557e353930e14487d1089  libstdc++-v3/include/bits/atomic_timed_wait.h
  6d4afbc0d502087a5e1d9be679beaf84  libstdc++-v3/include/bits/atomic_wait.h
  1e7a7ec7b70380fec2fae7859f444a62  libstdc++-v3/include/bits/basic_ios.h
  5138e57b1c4bb47b788cf001a00d5e83  libstdc++-v3/include/bits/basic_ios.tcc
! d917f45f52129dd5db90487dd896a862  libstdc++-v3/include/bits/basic_string.h
! 55116d4c1948fa70cbdfabfbe6155c2a  libstdc++-v3/include/bits/basic_string.tcc
  29b717115b885d97e144509c7987d132  libstdc++-v3/include/bits/boost_concept_check.h
  b812f02d862ef0991e7444eeb075e24b  libstdc++-v3/include/bits/c++0x_warning.h
! 730a9760f569df98df8fd3fd78961745  libstdc++-v3/include/bits/c++config
! cc58aeb935ac6f897d8057e145b0f694  libstdc++-v3/include/bits/char_traits.h
  1e60fddeaaeb6880b640941bee6ce9ea  libstdc++-v3/include/bits/charconv.h
! d5eb654578b300b90c0ce1fd859fc4d7  libstdc++-v3/include/bits/chrono.h
  3e9cf75ed9ed37659eac8d4ff38d8f97  libstdc++-v3/include/bits/codecvt.h
  07d6e1893b90a983d593ee7fb21310ed  libstdc++-v3/include/bits/concept_check.h
! 015da4a305462082b6be424248744c97  libstdc++-v3/include/bits/cow_string.h
  834baaab8c868bfccd5bf4fd671ff55b  libstdc++-v3/include/bits/cpp_type_traits.h
  eedc4c8df05c6edc00d2429148559730  libstdc++-v3/include/bits/deque.tcc
  e2975f99f1320ed7aea974ab28e63548  libstdc++-v3/include/bits/enable_special_members.h
  5b841f3a77d290016be71c2ec593e5ee  libstdc++-v3/include/bits/erase_if.h
! d8fee3f5100fd27cac74eb8d143c125e  libstdc++-v3/include/bits/forward_list.h
  6a9e63a5a5b9d8d66230e7498a13a8ac  libstdc++-v3/include/bits/forward_list.tcc
! 06666e6cc9950a3aa955acbae3eb28a0  libstdc++-v3/include/bits/fs_dir.h
  c754907ea8fca8ebfbbd704b0a111dd0  libstdc++-v3/include/bits/fs_fwd.h
! cfd0f2b837bcd99a02d5c7582c18aca4  libstdc++-v3/include/bits/fs_ops.h
! 269b1f0ebd2afa484bd2dd5afa809afe  libstdc++-v3/include/bits/fs_path.h
  7907281755e6b0faa1dfdce636aaa01f  libstdc++-v3/include/bits/fstream.tcc
  a363406ed41198146320f1e077ba3f30  libstdc++-v3/include/bits/functexcept.h
  69623b8458c64a8fc398295e296f4d44  libstdc++-v3/include/bits/functional_hash.h
  3461cc1f731e7f5eab3dfae226db37ea  libstdc++-v3/include/bits/gslice.h
  bfcab028fa2389b4368fedf2ef42c7a3  libstdc++-v3/include/bits/gslice_array.h
! da17bc523256518623e8ec71acb3886d  libstdc++-v3/include/bits/hashtable.h
! a6fcc0732f7e61f215e9ca88f9c795f6  libstdc++-v3/include/bits/hashtable_policy.h
  b7f492a3c197876ddbec011b1ee1c815  libstdc++-v3/include/bits/indirect_array.h
  36f0ed82567fccf4c612b30c6fb08084  libstdc++-v3/include/bits/invoke.h
  53c51c3f00094b1c64caa1bc34dcb29d  libstdc++-v3/include/bits/ios_base.h
  1d80ed8d4657605e55337056a44f4ef7  libstdc++-v3/include/bits/istream.tcc
! 4bfec191df898b11fcfe5ad477868278  libstdc++-v3/include/bits/iterator_concepts.h
! b4bd40923ef5db1adecc4c8cae565963  libstdc++-v3/include/bits/list.tcc
  a9565f66bcc3c46bbc030e0ef2ab1ed9  libstdc++-v3/include/bits/locale_classes.h
  e1da42ac46dbd6c74562953047c225cb  libstdc++-v3/include/bits/locale_classes.tcc
  33034d2531967431e8e609ac63cd3573  libstdc++-v3/include/bits/locale_conv.h
--- 105817,105867 ----
  c182ef70f8140930d68b4febf211cd38  libstdc++-v3/include/backward/hash_set
  0786c5fabbdc02e1b5d7f5941b1036f0  libstdc++-v3/include/backward/hashtable.h
  e87dd399a9a3274bd93b51404f64d0bf  libstdc++-v3/include/backward/strstream
! 55d94cba1b89ba2364853d3bf7ad3b62  libstdc++-v3/include/bits/algorithmfwd.h
  7217663cbd5e0a5e2111f3fec04713c8  libstdc++-v3/include/bits/align.h
! d3293889955e929d58e1f028de6cf29e  libstdc++-v3/include/bits/alloc_traits.h
  6c08ea97cd0ca641b7c6a4e7a687cd0e  libstdc++-v3/include/bits/allocated_ptr.h
! 7362644b2dafeb066cea713bcb177b3f  libstdc++-v3/include/bits/allocator.h
! 55027045dee573f454c97fe82d8a6947  libstdc++-v3/include/bits/atomic_base.h
  7d8c351bca946a7fab5426d823e9989f  libstdc++-v3/include/bits/atomic_futex.h
  2bc333d129d557e353930e14487d1089  libstdc++-v3/include/bits/atomic_timed_wait.h
  6d4afbc0d502087a5e1d9be679beaf84  libstdc++-v3/include/bits/atomic_wait.h
  1e7a7ec7b70380fec2fae7859f444a62  libstdc++-v3/include/bits/basic_ios.h
  5138e57b1c4bb47b788cf001a00d5e83  libstdc++-v3/include/bits/basic_ios.tcc
! 855ed4c5516f043899142200fbe87e6d  libstdc++-v3/include/bits/basic_string.h
! e389499c773300716ed61afb7807e81e  libstdc++-v3/include/bits/basic_string.tcc
  29b717115b885d97e144509c7987d132  libstdc++-v3/include/bits/boost_concept_check.h
  b812f02d862ef0991e7444eeb075e24b  libstdc++-v3/include/bits/c++0x_warning.h
! 8ec1bbae0da273ee03ccd9422ac9eaa9  libstdc++-v3/include/bits/c++config
! a263a3f3602f70203473b672d17c8a72  libstdc++-v3/include/bits/char_traits.h
  1e60fddeaaeb6880b640941bee6ce9ea  libstdc++-v3/include/bits/charconv.h
! 4a85035bd13609f152e96c57bda26cd9  libstdc++-v3/include/bits/chrono.h
  3e9cf75ed9ed37659eac8d4ff38d8f97  libstdc++-v3/include/bits/codecvt.h
  07d6e1893b90a983d593ee7fb21310ed  libstdc++-v3/include/bits/concept_check.h
! dc4f7a9bf49f92b36f90bb74df54e3e8  libstdc++-v3/include/bits/cow_string.h
  834baaab8c868bfccd5bf4fd671ff55b  libstdc++-v3/include/bits/cpp_type_traits.h
  eedc4c8df05c6edc00d2429148559730  libstdc++-v3/include/bits/deque.tcc
  e2975f99f1320ed7aea974ab28e63548  libstdc++-v3/include/bits/enable_special_members.h
  5b841f3a77d290016be71c2ec593e5ee  libstdc++-v3/include/bits/erase_if.h
! df585b647bf64527d75a18d706b9c354  libstdc++-v3/include/bits/forward_list.h
  6a9e63a5a5b9d8d66230e7498a13a8ac  libstdc++-v3/include/bits/forward_list.tcc
! 376a9c72a01c6351fdb3ea876ab1d7fc  libstdc++-v3/include/bits/fs_dir.h
  c754907ea8fca8ebfbbd704b0a111dd0  libstdc++-v3/include/bits/fs_fwd.h
! 24187ccfba5ea82f6400131a7949b9df  libstdc++-v3/include/bits/fs_ops.h
! b8ff50c36c207a47bb5f4c1209b3ee00  libstdc++-v3/include/bits/fs_path.h
  7907281755e6b0faa1dfdce636aaa01f  libstdc++-v3/include/bits/fstream.tcc
  a363406ed41198146320f1e077ba3f30  libstdc++-v3/include/bits/functexcept.h
  69623b8458c64a8fc398295e296f4d44  libstdc++-v3/include/bits/functional_hash.h
  3461cc1f731e7f5eab3dfae226db37ea  libstdc++-v3/include/bits/gslice.h
  bfcab028fa2389b4368fedf2ef42c7a3  libstdc++-v3/include/bits/gslice_array.h
! 331cf9e6a2ec84d2a3fbdcb34cfb4aa0  libstdc++-v3/include/bits/hashtable.h
! 498141d0967c9c29ae6233a318116deb  libstdc++-v3/include/bits/hashtable_policy.h
  b7f492a3c197876ddbec011b1ee1c815  libstdc++-v3/include/bits/indirect_array.h
  36f0ed82567fccf4c612b30c6fb08084  libstdc++-v3/include/bits/invoke.h
  53c51c3f00094b1c64caa1bc34dcb29d  libstdc++-v3/include/bits/ios_base.h
  1d80ed8d4657605e55337056a44f4ef7  libstdc++-v3/include/bits/istream.tcc
! 3adb8ab51f9c7988be4310e07e79698a  libstdc++-v3/include/bits/iterator_concepts.h
! b3dc3c673a64ac23e73f09567dc0b9b3  libstdc++-v3/include/bits/list.tcc
  a9565f66bcc3c46bbc030e0ef2ab1ed9  libstdc++-v3/include/bits/locale_classes.h
  e1da42ac46dbd6c74562953047c225cb  libstdc++-v3/include/bits/locale_classes.tcc
  33034d2531967431e8e609ac63cd3573  libstdc++-v3/include/bits/locale_conv.h
*************** e7ba553e9ab184f5bd68cc7606d816d2  libstd
*** 105668,105684 ****
  7b351469ff54ea35e3e585733ed01c68  libstdc++-v3/include/bits/mofunc_impl.h
  0c3876f398d8dc449bea393734a87ee1  libstdc++-v3/include/bits/move.h
  6c3144ba196d4dbb3fabe7a3235678a8  libstdc++-v3/include/bits/move_only_function.h
! 6b069d101319ece6de3732b658fb1d77  libstdc++-v3/include/bits/new_allocator.h
! 27c968d51ee063ecd3245faa3a6a77b4  libstdc++-v3/include/bits/node_handle.h
  865dc3b8fd8ea9325101bbde9ca457d5  libstdc++-v3/include/bits/ostream.tcc
! 02068878ffa064cf4d81d74fcfa8706a  libstdc++-v3/include/bits/ostream_insert.h
  0dd1b9e9caf16df51df5b5d72c3c5a88  libstdc++-v3/include/bits/parse_numbers.h
  093924672c05904d8e0e1ca87cd021b0  libstdc++-v3/include/bits/postypes.h
  a42f8fd86dfe94e0818cf65d60c0c495  libstdc++-v3/include/bits/predefined_ops.h
! 9b5bf297da766c3f1b9b4657c4f62700  libstdc++-v3/include/bits/ptr_traits.h
! 0db2d39069ef28c3a38688814e808f30  libstdc++-v3/include/bits/quoted_string.h
  c49033f669b537de224bb51e9daac558  libstdc++-v3/include/bits/random.h
! 28800a1dcd1ae032fee845b2f75e4195  libstdc++-v3/include/bits/random.tcc
  1127c7558c4cba717dab561411781868  libstdc++-v3/include/bits/range_access.h
  a93916f72be5983f50e58dcf45bebc66  libstdc++-v3/include/bits/ranges_algo.h
  88b0d11c505562ea7e9a0f6e79378a84  libstdc++-v3/include/bits/ranges_algobase.h
--- 105876,105892 ----
  7b351469ff54ea35e3e585733ed01c68  libstdc++-v3/include/bits/mofunc_impl.h
  0c3876f398d8dc449bea393734a87ee1  libstdc++-v3/include/bits/move.h
  6c3144ba196d4dbb3fabe7a3235678a8  libstdc++-v3/include/bits/move_only_function.h
! f83703c5dc2b5a0391d381f9d92c5e98  libstdc++-v3/include/bits/new_allocator.h
! 94407653d54e092d9f41de76ce8f1e32  libstdc++-v3/include/bits/node_handle.h
  865dc3b8fd8ea9325101bbde9ca457d5  libstdc++-v3/include/bits/ostream.tcc
! adf2e5a7969ff8d86aa467d982a1701e  libstdc++-v3/include/bits/ostream_insert.h
  0dd1b9e9caf16df51df5b5d72c3c5a88  libstdc++-v3/include/bits/parse_numbers.h
  093924672c05904d8e0e1ca87cd021b0  libstdc++-v3/include/bits/postypes.h
  a42f8fd86dfe94e0818cf65d60c0c495  libstdc++-v3/include/bits/predefined_ops.h
! 2beadb8012099b3b2e435d6785332dbb  libstdc++-v3/include/bits/ptr_traits.h
! d3637cd743fa97c819dcc90426acee0d  libstdc++-v3/include/bits/quoted_string.h
  c49033f669b537de224bb51e9daac558  libstdc++-v3/include/bits/random.h
! 1bd2dbed412f1286b2bd6a4e31980b0e  libstdc++-v3/include/bits/random.tcc
  1127c7558c4cba717dab561411781868  libstdc++-v3/include/bits/range_access.h
  a93916f72be5983f50e58dcf45bebc66  libstdc++-v3/include/bits/ranges_algo.h
  88b0d11c505562ea7e9a0f6e79378a84  libstdc++-v3/include/bits/ranges_algobase.h
*************** a45a0035a2ea36833ccd76f01c3674ca  libstd
*** 105687,105719 ****
  154dfd0c70357290b292fa1de3b6b20d  libstdc++-v3/include/bits/ranges_uninitialized.h
  f64c8eee99550f162748196f92025465  libstdc++-v3/include/bits/ranges_util.h
  7134478b2d6962986c8f55feda96f290  libstdc++-v3/include/bits/refwrap.h
! d9c3db17bad25dd466918cd85a244b4a  libstdc++-v3/include/bits/regex.h
  afdda3aa1dbf0e29afa3e1195f5b261f  libstdc++-v3/include/bits/regex.tcc
! 503406f4e782b783c010ffd824341d1e  libstdc++-v3/include/bits/regex_automaton.h
! 56f4b806c3e207e0d4d03ff274e75416  libstdc++-v3/include/bits/regex_automaton.tcc
  abc4868fa7fa69f1ec4bfe9357086f37  libstdc++-v3/include/bits/regex_compiler.h
  c618ded2f7e5df12c5292a63b1c35049  libstdc++-v3/include/bits/regex_compiler.tcc
! 3adc887953dc0fe5a5bea29e5a6c58d0  libstdc++-v3/include/bits/regex_constants.h
! d5427142e821959fa84b6fab58b82d40  libstdc++-v3/include/bits/regex_error.h
! 9e790bedbc4477ba162c19583cac5d44  libstdc++-v3/include/bits/regex_executor.h
! fa2cbcf47f72200af80a8827b2ec5216  libstdc++-v3/include/bits/regex_executor.tcc
  aba82e3133a961d21651b1e236e83955  libstdc++-v3/include/bits/regex_scanner.h
! 84c97e63ca73478752f1837edd8be39e  libstdc++-v3/include/bits/regex_scanner.tcc
  56efa2d600a18ebb013d6683df7d5139  libstdc++-v3/include/bits/semaphore_base.h
  88e13dbb751546443834154ec05bc922  libstdc++-v3/include/bits/shared_ptr.h
! ba41406da6fd97e8f21c90d7c66ad8b5  libstdc++-v3/include/bits/shared_ptr_atomic.h
! f141636c2a59134096ca285caf4f89ae  libstdc++-v3/include/bits/shared_ptr_base.h
  c9e42ab2b6cc1a8edc95c127dc513314  libstdc++-v3/include/bits/slice_array.h
  ba8703462210c53c0fea444a0d04e75f  libstdc++-v3/include/bits/specfun.h
  a4f0ee46114c7eb871e66f07be86d815  libstdc++-v3/include/bits/sstream.tcc
! f9d284276be9b9f792be818fe5ee534e  libstdc++-v3/include/bits/std_abs.h
  031acde85a8896c1ea19c4da889cae8c  libstdc++-v3/include/bits/std_function.h
! 0c1631ea9c6b77a42132f78e7028b526  libstdc++-v3/include/bits/std_mutex.h
  64d1fbbc59f75721c436b611254c743a  libstdc++-v3/include/bits/std_thread.h
! 1f80f17ff9e3b6ed9cc1dacee5649bef  libstdc++-v3/include/bits/stl_algo.h
! 1a6791fdba310103ceb325f334cf0b22  libstdc++-v3/include/bits/stl_algobase.h
! 7659d664f0aa080aa638ffb1531778da  libstdc++-v3/include/bits/stl_bvector.h
! ceba413818ae9b0f6742666be9b2ed67  libstdc++-v3/include/bits/stl_construct.h
  3dc1cd32df14abc94da494258ef5ae60  libstdc++-v3/include/bits/stl_deque.h
  63fc7573f04ccb8f515906b34e2fa890  libstdc++-v3/include/bits/stl_function.h
  6af963f90d2b295e1816b415f43c6e38  libstdc++-v3/include/bits/stl_heap.h
--- 105895,105927 ----
  154dfd0c70357290b292fa1de3b6b20d  libstdc++-v3/include/bits/ranges_uninitialized.h
  f64c8eee99550f162748196f92025465  libstdc++-v3/include/bits/ranges_util.h
  7134478b2d6962986c8f55feda96f290  libstdc++-v3/include/bits/refwrap.h
! b3d1d1fb010cbdbdf16a3356bb857104  libstdc++-v3/include/bits/regex.h
  afdda3aa1dbf0e29afa3e1195f5b261f  libstdc++-v3/include/bits/regex.tcc
! 7e6e868eb004537605330be8ad018752  libstdc++-v3/include/bits/regex_automaton.h
! 521ec6125a927ad13bce983367a2f289  libstdc++-v3/include/bits/regex_automaton.tcc
  abc4868fa7fa69f1ec4bfe9357086f37  libstdc++-v3/include/bits/regex_compiler.h
  c618ded2f7e5df12c5292a63b1c35049  libstdc++-v3/include/bits/regex_compiler.tcc
! 3960da4cd6e735289649a48923d88f64  libstdc++-v3/include/bits/regex_constants.h
! 88b8606dfb1e709785797b445fe59699  libstdc++-v3/include/bits/regex_error.h
! 9ba7811079918f5235c24ee1798d23bd  libstdc++-v3/include/bits/regex_executor.h
! 0e11f3f9802a812a4e4372f540c8c3d8  libstdc++-v3/include/bits/regex_executor.tcc
  aba82e3133a961d21651b1e236e83955  libstdc++-v3/include/bits/regex_scanner.h
! 0c9f47c6f496065e3910ee15866fc14f  libstdc++-v3/include/bits/regex_scanner.tcc
  56efa2d600a18ebb013d6683df7d5139  libstdc++-v3/include/bits/semaphore_base.h
  88e13dbb751546443834154ec05bc922  libstdc++-v3/include/bits/shared_ptr.h
! b0cc86dbb28ea6fb59967062545ebbe1  libstdc++-v3/include/bits/shared_ptr_atomic.h
! b2f3213aa088325c7c49dd690925071e  libstdc++-v3/include/bits/shared_ptr_base.h
  c9e42ab2b6cc1a8edc95c127dc513314  libstdc++-v3/include/bits/slice_array.h
  ba8703462210c53c0fea444a0d04e75f  libstdc++-v3/include/bits/specfun.h
  a4f0ee46114c7eb871e66f07be86d815  libstdc++-v3/include/bits/sstream.tcc
! fd4d88db8c05379090bee503697c1cce  libstdc++-v3/include/bits/std_abs.h
  031acde85a8896c1ea19c4da889cae8c  libstdc++-v3/include/bits/std_function.h
! b8ca4407175edde886c753e9218e35f7  libstdc++-v3/include/bits/std_mutex.h
  64d1fbbc59f75721c436b611254c743a  libstdc++-v3/include/bits/std_thread.h
! 093480d0a62d296a1ca12faa241c4e2d  libstdc++-v3/include/bits/stl_algo.h
! f52c1e15d6ceb9fae0fb0afe04ef4eb5  libstdc++-v3/include/bits/stl_algobase.h
! 2286695ca0fa1999d0f31443691a93d5  libstdc++-v3/include/bits/stl_bvector.h
! 1880b4f432a7cb200d74a3a48081e770  libstdc++-v3/include/bits/stl_construct.h
  3dc1cd32df14abc94da494258ef5ae60  libstdc++-v3/include/bits/stl_deque.h
  63fc7573f04ccb8f515906b34e2fa890  libstdc++-v3/include/bits/stl_function.h
  6af963f90d2b295e1816b415f43c6e38  libstdc++-v3/include/bits/stl_heap.h
*************** ceba413818ae9b0f6742666be9b2ed67  libstd
*** 105721,105754 ****
  38b2a8b62aa295bca5f77a15903f4deb  libstdc++-v3/include/bits/stl_iterator_base_funcs.h
  bce36b604a747a8f3a8ce8c38a7ac225  libstdc++-v3/include/bits/stl_iterator_base_types.h
  73516b0fa035db1e298f5594effbdd24  libstdc++-v3/include/bits/stl_list.h
! f18c995445c8115b28fe5595fc6ef3fd  libstdc++-v3/include/bits/stl_map.h
! 77aa4b615a1562873ee78d8dd6ebcd56  libstdc++-v3/include/bits/stl_multimap.h
! 84946df670c054babd87fa8079a34db7  libstdc++-v3/include/bits/stl_multiset.h
! 36db7ae47394e395415a70ef7cf15fa3  libstdc++-v3/include/bits/stl_numeric.h
! f2351ea411e0407b28929ea2397f6e3f  libstdc++-v3/include/bits/stl_pair.h
  7e6a9bfd3a1772b29829e5f721cfd888  libstdc++-v3/include/bits/stl_queue.h
  ca3e0abe0e9c127479cabae81f09acc0  libstdc++-v3/include/bits/stl_raw_storage_iter.h
  0ec171924cece31342e93ace4c4449fa  libstdc++-v3/include/bits/stl_relops.h
! 4935a22000c5af7a654163249f54cba9  libstdc++-v3/include/bits/stl_set.h
  fe9061931e58eb13610622c957ad8bfe  libstdc++-v3/include/bits/stl_stack.h
! 469a3342893403dff08e484a26d87835  libstdc++-v3/include/bits/stl_tempbuf.h
! 9845b4f95b2f060fd6f4b98136e8ad1d  libstdc++-v3/include/bits/stl_tree.h
! 76b804c7705a952d454f754eea890c01  libstdc++-v3/include/bits/stl_uninitialized.h
! 8db44c3d22440641ac1ba040d9370a58  libstdc++-v3/include/bits/stl_vector.h
! a04724c39d37f5ef63faf8eb2f98eb63  libstdc++-v3/include/bits/stream_iterator.h
  b0fcb882a7290e08ca43e14029ec35de  libstdc++-v3/include/bits/streambuf.tcc
  0bc57a4d1e53acce822697a7a2af289e  libstdc++-v3/include/bits/streambuf_iterator.h
  4b309c48dd81f69fe08fb04bf101abca  libstdc++-v3/include/bits/string_view.tcc
  26f486326c4d6cb8b037baaec6a47af8  libstdc++-v3/include/bits/stringfwd.h
  2a83d892a641f4d5d627db796cc45fe5  libstdc++-v3/include/bits/this_thread_sleep.h
  1aa49350032bcc3a2864897c5791200a  libstdc++-v3/include/bits/uniform_int_dist.h
! fcb492cbf26ebf3de0d70188eeb44113  libstdc++-v3/include/bits/unique_lock.h
! 5afa5b43c03beeacf055d44cdc4bb0e6  libstdc++-v3/include/bits/unique_ptr.h
! 66681adabd3b1d78b8c1598cf4ef6582  libstdc++-v3/include/bits/unordered_map.h
! 2d0f973ffc37cccad521ff7eb0b346d0  libstdc++-v3/include/bits/unordered_set.h
  8fb0bb8a0e08dbc54c6967e43841de9b  libstdc++-v3/include/bits/uses_allocator.h
  7a8e68f36176e9a758f949e3cbaeaf5a  libstdc++-v3/include/bits/uses_allocator_args.h
! 3f505dbdde1dde722e40ea133f643c4f  libstdc++-v3/include/bits/utility.h
  092d0d9f5c5948cb4e5d52b7a5f06923  libstdc++-v3/include/bits/valarray_after.h
  d1794ea86712506af9ad861dfbec9f9b  libstdc++-v3/include/bits/valarray_array.h
  39a6066d7b092ff20a6731264df6ca7e  libstdc++-v3/include/bits/valarray_array.tcc
--- 105929,105962 ----
  38b2a8b62aa295bca5f77a15903f4deb  libstdc++-v3/include/bits/stl_iterator_base_funcs.h
  bce36b604a747a8f3a8ce8c38a7ac225  libstdc++-v3/include/bits/stl_iterator_base_types.h
  73516b0fa035db1e298f5594effbdd24  libstdc++-v3/include/bits/stl_list.h
! 4b4edd2061cbc542c0bb0ff9a0243660  libstdc++-v3/include/bits/stl_map.h
! e326d8cc250ea138fc27585199b9ea1e  libstdc++-v3/include/bits/stl_multimap.h
! a3f8636902da48b83d3aed3621f4a776  libstdc++-v3/include/bits/stl_multiset.h
! 9811bf3c5dc9533306316cac37dbffa3  libstdc++-v3/include/bits/stl_numeric.h
! 17fdc542c1673cbf2246762910ac362d  libstdc++-v3/include/bits/stl_pair.h
  7e6a9bfd3a1772b29829e5f721cfd888  libstdc++-v3/include/bits/stl_queue.h
  ca3e0abe0e9c127479cabae81f09acc0  libstdc++-v3/include/bits/stl_raw_storage_iter.h
  0ec171924cece31342e93ace4c4449fa  libstdc++-v3/include/bits/stl_relops.h
! 3b05d03afaef0afb569b1f6a5964e6e1  libstdc++-v3/include/bits/stl_set.h
  fe9061931e58eb13610622c957ad8bfe  libstdc++-v3/include/bits/stl_stack.h
! 1b1faa88b3cc0d6a85478ff95f6ecfe3  libstdc++-v3/include/bits/stl_tempbuf.h
! b0f070805933485a32b6dcd875ddf57b  libstdc++-v3/include/bits/stl_tree.h
! 896cdab3151745d4496c63e8ebf4a4d4  libstdc++-v3/include/bits/stl_uninitialized.h
! 859577cb28ce25a2a0926b0cacd04970  libstdc++-v3/include/bits/stl_vector.h
! 865f635f62f4671aab4c1aa924218fe4  libstdc++-v3/include/bits/stream_iterator.h
  b0fcb882a7290e08ca43e14029ec35de  libstdc++-v3/include/bits/streambuf.tcc
  0bc57a4d1e53acce822697a7a2af289e  libstdc++-v3/include/bits/streambuf_iterator.h
  4b309c48dd81f69fe08fb04bf101abca  libstdc++-v3/include/bits/string_view.tcc
  26f486326c4d6cb8b037baaec6a47af8  libstdc++-v3/include/bits/stringfwd.h
  2a83d892a641f4d5d627db796cc45fe5  libstdc++-v3/include/bits/this_thread_sleep.h
  1aa49350032bcc3a2864897c5791200a  libstdc++-v3/include/bits/uniform_int_dist.h
! 312a506d6494cd60840850f99356560e  libstdc++-v3/include/bits/unique_lock.h
! 130f210b2e6914a807ebd7caab4be54f  libstdc++-v3/include/bits/unique_ptr.h
! 3b3ac013617af6dccfccd3d52e5fd9ba  libstdc++-v3/include/bits/unordered_map.h
! 8fce9968754eb10cc30265e0644ef411  libstdc++-v3/include/bits/unordered_set.h
  8fb0bb8a0e08dbc54c6967e43841de9b  libstdc++-v3/include/bits/uses_allocator.h
  7a8e68f36176e9a758f949e3cbaeaf5a  libstdc++-v3/include/bits/uses_allocator_args.h
! 8b3b0123243b244104370bc84804f5f4  libstdc++-v3/include/bits/utility.h
  092d0d9f5c5948cb4e5d52b7a5f06923  libstdc++-v3/include/bits/valarray_after.h
  d1794ea86712506af9ad861dfbec9f9b  libstdc++-v3/include/bits/valarray_array.h
  39a6066d7b092ff20a6731264df6ca7e  libstdc++-v3/include/bits/valarray_array.tcc
*************** a76f8506a05bb00c10bff03eb4206cc8  libstd
*** 105884,105905 ****
  d1c85ab843e7786260a3593e711622d5  libstdc++-v3/include/experimental/array
  ce4d9d942c78c7a71a2f983bbd9a37d4  libstdc++-v3/include/experimental/bits/fs_dir.h
  92829844a42af6748ed988249b7c2557  libstdc++-v3/include/experimental/bits/fs_fwd.h
! cfd46a6ba8b7e92c26323aa2041931ae  libstdc++-v3/include/experimental/bits/fs_ops.h
! 67ee2d42f8fd3434cacba2c759731ce4  libstdc++-v3/include/experimental/bits/fs_path.h
  f79062269672eb2b6195fcad7034e18b  libstdc++-v3/include/experimental/bits/lfts_config.h
  85b50cb8925a5dcaa808980b5cb0d8f7  libstdc++-v3/include/experimental/bits/net.h
! 1c99b46217fbeb7cfcb4fe9fd60a5ac8  libstdc++-v3/include/experimental/bits/numeric_traits.h
  1d457f0e71c47e01d107c0ca8609019c  libstdc++-v3/include/experimental/bits/shared_ptr.h
! 5e937c88d4acaed57b976aa6f2273873  libstdc++-v3/include/experimental/bits/simd.h
! 4ee508b691a5157c7e809660bad7ec82  libstdc++-v3/include/experimental/bits/simd_builtin.h
! 893b969b5ded9ce2840356ae752d5063  libstdc++-v3/include/experimental/bits/simd_converter.h
! 7ad58535dc1b2b8a7e0adb98b02a1086  libstdc++-v3/include/experimental/bits/simd_detail.h
! 2f6dec5e93e6387b98ba68b2ed06426b  libstdc++-v3/include/experimental/bits/simd_fixed_size.h
! 1f871284754415e51452369ca2647ddd  libstdc++-v3/include/experimental/bits/simd_math.h
! e861ebcbafc444ea9eb01ac9c5b99979  libstdc++-v3/include/experimental/bits/simd_neon.h
! 9d8c9201675f2559be4096f8d152c694  libstdc++-v3/include/experimental/bits/simd_ppc.h
! 0f52ac4c09d5b301f2ea36edd4b54508  libstdc++-v3/include/experimental/bits/simd_scalar.h
! 3d8ea34f8434a734344fc44773184c25  libstdc++-v3/include/experimental/bits/simd_x86.h
  50722f04d8752d1fa4618f77cc80ed2f  libstdc++-v3/include/experimental/bits/simd_x86_conversions.h
  e1be8e54aaec8a34e1f682da217a9550  libstdc++-v3/include/experimental/bits/string_view.tcc
  b17463914bf45d86c8b27f74d4738c10  libstdc++-v3/include/experimental/buffer
--- 106092,106113 ----
  d1c85ab843e7786260a3593e711622d5  libstdc++-v3/include/experimental/array
  ce4d9d942c78c7a71a2f983bbd9a37d4  libstdc++-v3/include/experimental/bits/fs_dir.h
  92829844a42af6748ed988249b7c2557  libstdc++-v3/include/experimental/bits/fs_fwd.h
! d09b4eb47e1b5339decf29e866cfb096  libstdc++-v3/include/experimental/bits/fs_ops.h
! 43e0d340cd247e40d925b0152b179bbc  libstdc++-v3/include/experimental/bits/fs_path.h
  f79062269672eb2b6195fcad7034e18b  libstdc++-v3/include/experimental/bits/lfts_config.h
  85b50cb8925a5dcaa808980b5cb0d8f7  libstdc++-v3/include/experimental/bits/net.h
! b32e2888ec293d596ddfe98726a78cc7  libstdc++-v3/include/experimental/bits/numeric_traits.h
  1d457f0e71c47e01d107c0ca8609019c  libstdc++-v3/include/experimental/bits/shared_ptr.h
! 450e7e8272e831846c3e0de925774bab  libstdc++-v3/include/experimental/bits/simd.h
! 8c77adb8c96e9ebdd51a5cb3e6f07a31  libstdc++-v3/include/experimental/bits/simd_builtin.h
! 1dcdb4880687a585b7a4eefae780875e  libstdc++-v3/include/experimental/bits/simd_converter.h
! 966744e4a1d8afd63e630bd369285aeb  libstdc++-v3/include/experimental/bits/simd_detail.h
! 45d83d46e5f5e353d6fcb6ed6091c97c  libstdc++-v3/include/experimental/bits/simd_fixed_size.h
! 58d3b8e199b58221b53bc3637d2bb375  libstdc++-v3/include/experimental/bits/simd_math.h
! afe187f0ebc655339d9517eea4162676  libstdc++-v3/include/experimental/bits/simd_neon.h
! 07871da9889f814398693690143f99fd  libstdc++-v3/include/experimental/bits/simd_ppc.h
! c63aee3fd930f615492d6e5b011c787e  libstdc++-v3/include/experimental/bits/simd_scalar.h
! 54752d71b8804634e166d27c0c4a7c75  libstdc++-v3/include/experimental/bits/simd_x86.h
  50722f04d8752d1fa4618f77cc80ed2f  libstdc++-v3/include/experimental/bits/simd_x86_conversions.h
  e1be8e54aaec8a34e1f682da217a9550  libstdc++-v3/include/experimental/bits/string_view.tcc
  b17463914bf45d86c8b27f74d4738c10  libstdc++-v3/include/experimental/buffer
*************** f4f8da16d8133bfcb69eef49d797a1b3  libstd
*** 105909,105915 ****
  174c0fa7105d71925dc0c7ab3376f07c  libstdc++-v3/include/experimental/filesystem
  4cfd0865400c74397b111980a5b8f3ea  libstdc++-v3/include/experimental/forward_list
  ee6ba0e2ca753c4c038a9ebfb0805c4f  libstdc++-v3/include/experimental/functional
! dab5202bb88779e945a419918ae33338  libstdc++-v3/include/experimental/internet
  2766d0b421163f93012e31499fd68480  libstdc++-v3/include/experimental/io_context
  abc318d32456e26882cc3fa419abe900  libstdc++-v3/include/experimental/iterator
  89cd7b8a6b8c8fc54f2f5404abadc032  libstdc++-v3/include/experimental/list
--- 106117,106123 ----
  174c0fa7105d71925dc0c7ab3376f07c  libstdc++-v3/include/experimental/filesystem
  4cfd0865400c74397b111980a5b8f3ea  libstdc++-v3/include/experimental/forward_list
  ee6ba0e2ca753c4c038a9ebfb0805c4f  libstdc++-v3/include/experimental/functional
! 29fa27b81c81da91e282020124e6c470  libstdc++-v3/include/experimental/internet
  2766d0b421163f93012e31499fd68480  libstdc++-v3/include/experimental/io_context
  abc318d32456e26882cc3fa419abe900  libstdc++-v3/include/experimental/iterator
  89cd7b8a6b8c8fc54f2f5404abadc032  libstdc++-v3/include/experimental/list
*************** dafac68817c8f9475fc3bde566ed8902  libstd
*** 105933,105939 ****
  75b66c367e172042a1afedda1fab27e1  libstdc++-v3/include/experimental/system_error
  5f1266d4d8133f022b78f98f0cdefbbf  libstdc++-v3/include/experimental/timer
  718aeb28b4405dec4492366cf0eca27d  libstdc++-v3/include/experimental/tuple
! 84501e2955d71ce01f40c4b8ac8c97b2  libstdc++-v3/include/experimental/type_traits
  92ab5c9c07aa60675ea9c096ca4aebeb  libstdc++-v3/include/experimental/unordered_map
  cbe31faa77957d2214e875f0edad5264  libstdc++-v3/include/experimental/unordered_set
  18cdbc7f9c4eac37a520ae985047e727  libstdc++-v3/include/experimental/utility
--- 106141,106147 ----
  75b66c367e172042a1afedda1fab27e1  libstdc++-v3/include/experimental/system_error
  5f1266d4d8133f022b78f98f0cdefbbf  libstdc++-v3/include/experimental/timer
  718aeb28b4405dec4492366cf0eca27d  libstdc++-v3/include/experimental/tuple
! f28d969ed5020a2e979af19af98348a3  libstdc++-v3/include/experimental/type_traits
  92ab5c9c07aa60675ea9c096ca4aebeb  libstdc++-v3/include/experimental/unordered_map
  cbe31faa77957d2214e875f0edad5264  libstdc++-v3/include/experimental/unordered_set
  18cdbc7f9c4eac37a520ae985047e727  libstdc++-v3/include/experimental/utility
*************** f28cb6d6aaa0d3e381ecaf9e126ebf46  libstd
*** 105950,105961 ****
  ebe0e740b47791e8a0d5fa704ca6db70  libstdc++-v3/include/ext/debug_allocator.h
  f6eb6b846fc6a602340bb94d9d462688  libstdc++-v3/include/ext/enc_filebuf.h
  a991657867364dcaf16d19671aaf643c  libstdc++-v3/include/ext/extptr_allocator.h
! 43c3089edbabbc7eae00a5c6facf7daa  libstdc++-v3/include/ext/functional
  48f390fcfbb6a44e248facdb0ec14988  libstdc++-v3/include/ext/iterator
  d373ed650ddc96c5e431650c65be6e68  libstdc++-v3/include/ext/malloc_allocator.h
  008b2229637eab3f9bc87596aa035239  libstdc++-v3/include/ext/memory
  5a173e66ab05ee5c37fa416596420100  libstdc++-v3/include/ext/mt_allocator.h
! e1998e6fc2a8d3eb451025d3c021ceb3  libstdc++-v3/include/ext/new_allocator.h
  9ae1e878156f72db62d7d94772f7dcb6  libstdc++-v3/include/ext/numeric
  8bcaa226ce57469a87ed94febd6082f9  libstdc++-v3/include/ext/numeric_traits.h
  bd496b3b9a1ecb478f97715addaffe67  libstdc++-v3/include/ext/pb_ds/assoc_container.hpp
--- 106158,106169 ----
  ebe0e740b47791e8a0d5fa704ca6db70  libstdc++-v3/include/ext/debug_allocator.h
  f6eb6b846fc6a602340bb94d9d462688  libstdc++-v3/include/ext/enc_filebuf.h
  a991657867364dcaf16d19671aaf643c  libstdc++-v3/include/ext/extptr_allocator.h
! 6fad287f1dc1ba781865b6cefa140679  libstdc++-v3/include/ext/functional
  48f390fcfbb6a44e248facdb0ec14988  libstdc++-v3/include/ext/iterator
  d373ed650ddc96c5e431650c65be6e68  libstdc++-v3/include/ext/malloc_allocator.h
  008b2229637eab3f9bc87596aa035239  libstdc++-v3/include/ext/memory
  5a173e66ab05ee5c37fa416596420100  libstdc++-v3/include/ext/mt_allocator.h
! 973b74fd9e95de44080c1262bf5a7ae7  libstdc++-v3/include/ext/new_allocator.h
  9ae1e878156f72db62d7d94772f7dcb6  libstdc++-v3/include/ext/numeric
  8bcaa226ce57469a87ed94febd6082f9  libstdc++-v3/include/ext/numeric_traits.h
  bd496b3b9a1ecb478f97715addaffe67  libstdc++-v3/include/ext/pb_ds/assoc_container.hpp
*************** b156f0d597a2edae1a06e54aba071e41  libstd
*** 106293,106319 ****
  16ecbf48b313f47955487be8fe668037  libstdc++-v3/include/pstl/utils.h
  072481f1e7d96b55385089405f535dd4  libstdc++-v3/include/std/algorithm
  570dea393806af64e854327a07eae25a  libstdc++-v3/include/std/any
! 88906e37f833d2f5a22c5438677c71cf  libstdc++-v3/include/std/array
! ba58221a2b190541ffd1168b2d6dd34c  libstdc++-v3/include/std/atomic
  0d3eb7ccdf0eef93cb681ca20d943870  libstdc++-v3/include/std/barrier
  6c4a00cca741ccc69d90f2c62c4bed21  libstdc++-v3/include/std/bit
  60d28f3596e47b8d6f0482c0aa059f08  libstdc++-v3/include/std/bitset
! 2ee22b6a48915ac5bb3f7e44089980c6  libstdc++-v3/include/std/charconv
! 2e799728de69db1ba60355d8204ac60e  libstdc++-v3/include/std/chrono
  ef0864942910987e7d7dc0c185bfe8a4  libstdc++-v3/include/std/codecvt
! be6c12b098d82e85b07d3672abe54bfe  libstdc++-v3/include/std/complex
  16439135249b21db1105ff810c791cf3  libstdc++-v3/include/std/concepts
! 5f9d3f1270677d2a503aa58b9ea24b5d  libstdc++-v3/include/std/condition_variable
  bb6439627adf3d0dfd39054edcaf7d8b  libstdc++-v3/include/std/coroutine
  6b89200406cc1ab389e7796857584f28  libstdc++-v3/include/std/deque
  b7b3e00d632ce3d8dab091194900a119  libstdc++-v3/include/std/execution
  701c8ab43837021f865d4c887bffaade  libstdc++-v3/include/std/expected
! 2591b4b2dfa65f0fae8dd4fdb5c06398  libstdc++-v3/include/std/filesystem
  a9c719562e9e02bb827652856f5a0411  libstdc++-v3/include/std/forward_list
  aad9a7ff99d2eb9e0ba45475cf6c9001  libstdc++-v3/include/std/fstream
  4973a3c4b6705c523303a2162e880d5f  libstdc++-v3/include/std/functional
! 59bae8d38f885b342bdb08e29fc4e9ad  libstdc++-v3/include/std/future
! d7e54ce63c756d943e981b79ad7b87b1  libstdc++-v3/include/std/iomanip
  913326f95f00b67976b511c89ddf1668  libstdc++-v3/include/std/ios
  1fa07fb54e534480c0163b8ede1e6416  libstdc++-v3/include/std/iosfwd
  7d4512e3f3a1b2cce6ebeeadfc5eb944  libstdc++-v3/include/std/iostream
--- 106501,106527 ----
  16ecbf48b313f47955487be8fe668037  libstdc++-v3/include/pstl/utils.h
  072481f1e7d96b55385089405f535dd4  libstdc++-v3/include/std/algorithm
  570dea393806af64e854327a07eae25a  libstdc++-v3/include/std/any
! 19fa1e5331913fa2d824b26a04dfe055  libstdc++-v3/include/std/array
! 8be7bfd2354d786e2db174572c492cdb  libstdc++-v3/include/std/atomic
  0d3eb7ccdf0eef93cb681ca20d943870  libstdc++-v3/include/std/barrier
  6c4a00cca741ccc69d90f2c62c4bed21  libstdc++-v3/include/std/bit
  60d28f3596e47b8d6f0482c0aa059f08  libstdc++-v3/include/std/bitset
! f5445b7fe962edc560c6697d97f8773d  libstdc++-v3/include/std/charconv
! dd90d7b6b45ec1a635ceeb81f7e188c9  libstdc++-v3/include/std/chrono
  ef0864942910987e7d7dc0c185bfe8a4  libstdc++-v3/include/std/codecvt
! dc129583b571999c1345170f762dceda  libstdc++-v3/include/std/complex
  16439135249b21db1105ff810c791cf3  libstdc++-v3/include/std/concepts
! edf1dcc3d28423dc93731d2dd9d8f7ef  libstdc++-v3/include/std/condition_variable
  bb6439627adf3d0dfd39054edcaf7d8b  libstdc++-v3/include/std/coroutine
  6b89200406cc1ab389e7796857584f28  libstdc++-v3/include/std/deque
  b7b3e00d632ce3d8dab091194900a119  libstdc++-v3/include/std/execution
  701c8ab43837021f865d4c887bffaade  libstdc++-v3/include/std/expected
! 3ebb6aed1b2f2ace86fdea6bc2369bb3  libstdc++-v3/include/std/filesystem
  a9c719562e9e02bb827652856f5a0411  libstdc++-v3/include/std/forward_list
  aad9a7ff99d2eb9e0ba45475cf6c9001  libstdc++-v3/include/std/fstream
  4973a3c4b6705c523303a2162e880d5f  libstdc++-v3/include/std/functional
! 684453ca026b3af49aa776a969edef7b  libstdc++-v3/include/std/future
! c9d3fc72ba1a8da1ff01d4caabc6eee4  libstdc++-v3/include/std/iomanip
  913326f95f00b67976b511c89ddf1668  libstdc++-v3/include/std/ios
  1fa07fb54e534480c0163b8ede1e6416  libstdc++-v3/include/std/iosfwd
  7d4512e3f3a1b2cce6ebeeadfc5eb944  libstdc++-v3/include/std/iostream
*************** beb24c4055c34e1ca99669e732635eee  libstd
*** 106326,106367 ****
  5587cbee59427f9937239e4c6c08b890  libstdc++-v3/include/std/map
  10bdb36e17478ec36d07cc2256ca087c  libstdc++-v3/include/std/memory
  e522dd3e975e1e8c5f3456994d59033d  libstdc++-v3/include/std/memory_resource
! 6185fa777de9d0ffd588b3b4f694533a  libstdc++-v3/include/std/mutex
  258094736c1a9827ac9b532d460fea3c  libstdc++-v3/include/std/numbers
  db7224ff7ecff429fbbb5705e8c9cd88  libstdc++-v3/include/std/numeric
! b55ac5ede6133c48df8d44e4bef366b5  libstdc++-v3/include/std/optional
  e21684775dfcf87b9059ad483189890c  libstdc++-v3/include/std/ostream
  678ed5570fa228987b1bd4c3b2ab38a9  libstdc++-v3/include/std/queue
  ad0c4543d69f42e0e141d6c961148a3c  libstdc++-v3/include/std/random
  435c9e3541d6c9a9f23b8d8e9edae738  libstdc++-v3/include/std/ranges
! 83fe6e62c45e5cbeb03e474f78fb84dd  libstdc++-v3/include/std/ratio
  3ad3827bf7257834ed886bfc875792f6  libstdc++-v3/include/std/regex
! a36ee050c2d5e66519638b914997e074  libstdc++-v3/include/std/scoped_allocator
  4afcdb7beade1642d1f3b27ba5e2bfa3  libstdc++-v3/include/std/semaphore
  45dc0825469e66239592e3a77a3a80dc  libstdc++-v3/include/std/set
! 6f5c8b5ac435bdf64613896b8cc6908a  libstdc++-v3/include/std/shared_mutex
  88a3179695d69d9d5efe8967df5bb8c1  libstdc++-v3/include/std/source_location
  692e0b2c06c5d19ac5338d286eb7e5d7  libstdc++-v3/include/std/span
! e086a98622e688a0f02c701b33ae1b75  libstdc++-v3/include/std/spanstream
! 275b137855ae240ad345fcea64ce43d6  libstdc++-v3/include/std/sstream
  ddbf2edbc47249f513d1ec2ef82db9b7  libstdc++-v3/include/std/stack
! c42d9ed7509390ff3996796abf0dcd3e  libstdc++-v3/include/std/stacktrace
  9a484d3a8b869e29b314e81780995cea  libstdc++-v3/include/std/stdexcept
  bca91ec547ac22052499a8fdbf54402f  libstdc++-v3/include/std/stop_token
  41d10501d4e6f65d267f4b3f86edf933  libstdc++-v3/include/std/streambuf
  2050db70d23bce24c0db23f72bb7a5a4  libstdc++-v3/include/std/string
! 418a36401dfa5a9966f3e2e9c1c7836f  libstdc++-v3/include/std/string_view
! 6b175fdd1e71aabe6e03e47e736cb301  libstdc++-v3/include/std/syncstream
! 8b34e73a1cabfdff0bf938e5e7e87321  libstdc++-v3/include/std/system_error
  2bcb7b3da31da2e6a5dba342215915fb  libstdc++-v3/include/std/thread
! ba850143aaf393fbbaec14b91f50a098  libstdc++-v3/include/std/tuple
! d714180ae9702e3a62e2df15d56a73d7  libstdc++-v3/include/std/type_traits
  405de94a2049d47cf0dcc1e507c130c2  libstdc++-v3/include/std/typeindex
  bcde64de884a6ef8713ae1ef3d01c974  libstdc++-v3/include/std/unordered_map
  70ee03c1644aafe0cc882e9a3211d3d1  libstdc++-v3/include/std/unordered_set
! fd851f22b27e7743e814a5b580b5bb9b  libstdc++-v3/include/std/utility
! ed627e591efe729f22f77269217d68af  libstdc++-v3/include/std/valarray
! 0328e72e195b442f7c8bfd341aa65af2  libstdc++-v3/include/std/variant
  3a32d802d4e23e09e723dfe0459079e5  libstdc++-v3/include/std/vector
  07f27972c4ac72fa1bc271f88f049b4a  libstdc++-v3/include/std/version
  315a0c0dcb63f40cf8755bfeedce3f87  libstdc++-v3/include/tr1/array
--- 106534,106575 ----
  5587cbee59427f9937239e4c6c08b890  libstdc++-v3/include/std/map
  10bdb36e17478ec36d07cc2256ca087c  libstdc++-v3/include/std/memory
  e522dd3e975e1e8c5f3456994d59033d  libstdc++-v3/include/std/memory_resource
! 55a0037171b6287a8885be03261039b7  libstdc++-v3/include/std/mutex
  258094736c1a9827ac9b532d460fea3c  libstdc++-v3/include/std/numbers
  db7224ff7ecff429fbbb5705e8c9cd88  libstdc++-v3/include/std/numeric
! 1b42b4ee274bd6efbb416d31943f2297  libstdc++-v3/include/std/optional
  e21684775dfcf87b9059ad483189890c  libstdc++-v3/include/std/ostream
  678ed5570fa228987b1bd4c3b2ab38a9  libstdc++-v3/include/std/queue
  ad0c4543d69f42e0e141d6c961148a3c  libstdc++-v3/include/std/random
  435c9e3541d6c9a9f23b8d8e9edae738  libstdc++-v3/include/std/ranges
! 8a2604c0d9ca51f35d9b036e24287356  libstdc++-v3/include/std/ratio
  3ad3827bf7257834ed886bfc875792f6  libstdc++-v3/include/std/regex
! ecf2b56fde660beef255e7f04613957a  libstdc++-v3/include/std/scoped_allocator
  4afcdb7beade1642d1f3b27ba5e2bfa3  libstdc++-v3/include/std/semaphore
  45dc0825469e66239592e3a77a3a80dc  libstdc++-v3/include/std/set
! f06d5e0bd8ba76c953f6e66286be4872  libstdc++-v3/include/std/shared_mutex
  88a3179695d69d9d5efe8967df5bb8c1  libstdc++-v3/include/std/source_location
  692e0b2c06c5d19ac5338d286eb7e5d7  libstdc++-v3/include/std/span
! 4a9df1750ad06d95e86ac71ebda2e80f  libstdc++-v3/include/std/spanstream
! f20be19b07cc107b37bbac605920911c  libstdc++-v3/include/std/sstream
  ddbf2edbc47249f513d1ec2ef82db9b7  libstdc++-v3/include/std/stack
! 36183b8448cd63f1058082f3dbdf2af8  libstdc++-v3/include/std/stacktrace
  9a484d3a8b869e29b314e81780995cea  libstdc++-v3/include/std/stdexcept
  bca91ec547ac22052499a8fdbf54402f  libstdc++-v3/include/std/stop_token
  41d10501d4e6f65d267f4b3f86edf933  libstdc++-v3/include/std/streambuf
  2050db70d23bce24c0db23f72bb7a5a4  libstdc++-v3/include/std/string
! 2db3ca10419d4457aecb783199bde07b  libstdc++-v3/include/std/string_view
! 53595cdde4367db32fddc133626bd091  libstdc++-v3/include/std/syncstream
! 6059edfe8f0b4e7014488d6627bfbcf9  libstdc++-v3/include/std/system_error
  2bcb7b3da31da2e6a5dba342215915fb  libstdc++-v3/include/std/thread
! bcfe58b0268a24fe16eef99703b24f90  libstdc++-v3/include/std/tuple
! 7ef2b812a24e58bb6a2a97c251197866  libstdc++-v3/include/std/type_traits
  405de94a2049d47cf0dcc1e507c130c2  libstdc++-v3/include/std/typeindex
  bcde64de884a6ef8713ae1ef3d01c974  libstdc++-v3/include/std/unordered_map
  70ee03c1644aafe0cc882e9a3211d3d1  libstdc++-v3/include/std/unordered_set
! c0c9dccc846622406eef9f083e4f4ad5  libstdc++-v3/include/std/utility
! 543899a002d82719328274e29ff5f9ee  libstdc++-v3/include/std/valarray
! caa250d69587be3268588e4efad09e80  libstdc++-v3/include/std/variant
  3a32d802d4e23e09e723dfe0459079e5  libstdc++-v3/include/std/vector
  07f27972c4ac72fa1bc271f88f049b4a  libstdc++-v3/include/std/version
  315a0c0dcb63f40cf8755bfeedce3f87  libstdc++-v3/include/tr1/array
*************** c930d4036922201099619257d25a2245  libstd
*** 106428,106439 ****
  064789c496f0f70ebb4edbc0b7e4a666  libstdc++-v3/include/tr1/wctype.h
  27d05cea5b02463850117b8476f2ec42  libstdc++-v3/include/tr2/bool_set
  917d83e0b0ee35850a1a637a3eee75c9  libstdc++-v3/include/tr2/bool_set.tcc
! 6170b319c367c15cc44b854b464396c2  libstdc++-v3/include/tr2/dynamic_bitset
  4384700c62cb70a7774717710cac4c07  libstdc++-v3/include/tr2/dynamic_bitset.tcc
  88ca2da6dd5700f0e05d5f58e8fa62ef  libstdc++-v3/include/tr2/ratio
  632570c5614f68ebbbf25e6b74a12da2  libstdc++-v3/include/tr2/type_traits
! 4daa7113f4ebba675c4ef23b11602d2e  libstdc++-v3/libsupc++/Makefile.am
! ad30d9aa6fbfa82c6dcb69892d10681b  libstdc++-v3/libsupc++/Makefile.in
  96d5d64fad06961ea529f30e07345f14  libstdc++-v3/libsupc++/array_type_info.cc
  dce6f8e3d6b965cd0fd40f034b78a74d  libstdc++-v3/libsupc++/atexit_arm.cc
  64a51042a2c5073bdb6689e6239ef0ed  libstdc++-v3/libsupc++/atexit_thread.cc
--- 106636,106647 ----
  064789c496f0f70ebb4edbc0b7e4a666  libstdc++-v3/include/tr1/wctype.h
  27d05cea5b02463850117b8476f2ec42  libstdc++-v3/include/tr2/bool_set
  917d83e0b0ee35850a1a637a3eee75c9  libstdc++-v3/include/tr2/bool_set.tcc
! ccdc152be32111912551bd0294ae6989  libstdc++-v3/include/tr2/dynamic_bitset
  4384700c62cb70a7774717710cac4c07  libstdc++-v3/include/tr2/dynamic_bitset.tcc
  88ca2da6dd5700f0e05d5f58e8fa62ef  libstdc++-v3/include/tr2/ratio
  632570c5614f68ebbbf25e6b74a12da2  libstdc++-v3/include/tr2/type_traits
! fa9622f8938011481224bfc47d3e2a92  libstdc++-v3/libsupc++/Makefile.am
! eb43c7ca09c7553290a22c5b553f1433  libstdc++-v3/libsupc++/Makefile.in
  96d5d64fad06961ea529f30e07345f14  libstdc++-v3/libsupc++/array_type_info.cc
  dce6f8e3d6b965cd0fd40f034b78a74d  libstdc++-v3/libsupc++/atexit_arm.cc
  64a51042a2c5073bdb6689e6239ef0ed  libstdc++-v3/libsupc++/atexit_thread.cc
*************** a397502b691bf0d7a9c7b63f63454f98  libstd
*** 106447,106453 ****
  31f5ffc107b8635ae5c3c63e619e7c52  libstdc++-v3/libsupc++/compare
  a8ca959615041ec3243af356f4ecc624  libstdc++-v3/libsupc++/cxxabi.h
  ab128a36728911fa441f71f19397c91f  libstdc++-v3/libsupc++/cxxabi_forced.h
! c0c7802c5e0096ab182755f808164e5a  libstdc++-v3/libsupc++/cxxabi_init_exception.h
  60bb4069fc06de12df9cb43ad21c79ae  libstdc++-v3/libsupc++/del_op.cc
  7f855cd5f1f241ffab0d9ca14d2c3c5d  libstdc++-v3/libsupc++/del_opa.cc
  8ef5bb06ac7b1dc1a42948ad7e78cdf9  libstdc++-v3/libsupc++/del_opant.cc
--- 106655,106661 ----
  31f5ffc107b8635ae5c3c63e619e7c52  libstdc++-v3/libsupc++/compare
  a8ca959615041ec3243af356f4ecc624  libstdc++-v3/libsupc++/cxxabi.h
  ab128a36728911fa441f71f19397c91f  libstdc++-v3/libsupc++/cxxabi_forced.h
! 6fb3ca40d6524dab90228d622d43beeb  libstdc++-v3/libsupc++/cxxabi_init_exception.h
  60bb4069fc06de12df9cb43ad21c79ae  libstdc++-v3/libsupc++/del_op.cc
  7f855cd5f1f241ffab0d9ca14d2c3c5d  libstdc++-v3/libsupc++/del_opa.cc
  8ef5bb06ac7b1dc1a42948ad7e78cdf9  libstdc++-v3/libsupc++/del_opant.cc
*************** d9fad0164214a24429310b8e7c123505  libstd
*** 106468,106474 ****
  2826e5c2de48542ba3ce264b3320d192  libstdc++-v3/libsupc++/eh_call.cc
  f9a2b6ce76ea27f40df988fb955d2de1  libstdc++-v3/libsupc++/eh_catch.cc
  3da7f2c6cfa1995c8968405d9ee450b6  libstdc++-v3/libsupc++/eh_exception.cc
! 7046be6a6b4551f65a840bcf85fbd4bb  libstdc++-v3/libsupc++/eh_globals.cc
  7ccbc99cfaa5318038f64dbee140946b  libstdc++-v3/libsupc++/eh_personality.cc
  1c54e24b64de6b013027e51c6377a701  libstdc++-v3/libsupc++/eh_ptr.cc
  d385138666c69cff7ca02656c9f9ed79  libstdc++-v3/libsupc++/eh_term_handler.cc
--- 106676,106682 ----
  2826e5c2de48542ba3ce264b3320d192  libstdc++-v3/libsupc++/eh_call.cc
  f9a2b6ce76ea27f40df988fb955d2de1  libstdc++-v3/libsupc++/eh_catch.cc
  3da7f2c6cfa1995c8968405d9ee450b6  libstdc++-v3/libsupc++/eh_exception.cc
! fbe70b88b3a21ac5c4ed4a006f176754  libstdc++-v3/libsupc++/eh_globals.cc
  7ccbc99cfaa5318038f64dbee140946b  libstdc++-v3/libsupc++/eh_personality.cc
  1c54e24b64de6b013027e51c6377a701  libstdc++-v3/libsupc++/eh_ptr.cc
  d385138666c69cff7ca02656c9f9ed79  libstdc++-v3/libsupc++/eh_term_handler.cc
*************** dd79628835db55b2e3ac0f19e6d67f4b  libstd
*** 106482,106488 ****
  6b7e04711d0d81627261d8d8d19988de  libstdc++-v3/libsupc++/exception
  c63781c44ea62d41d540e3dc9df083ad  libstdc++-v3/libsupc++/exception.h
  7831f52e348280d54cdefd954a8125ae  libstdc++-v3/libsupc++/exception_defines.h
! e8a32dcadc5d06d341e371fb480b7b44  libstdc++-v3/libsupc++/exception_ptr.h
  e9526cde45ad82aac1bdad78e48b77d9  libstdc++-v3/libsupc++/function_type_info.cc
  19738f26bfd633c091434c2b3a705170  libstdc++-v3/libsupc++/fundamental_type_info.cc
  2a200bb5c53b0893bf37016eaa025581  libstdc++-v3/libsupc++/guard.cc
--- 106690,106696 ----
  6b7e04711d0d81627261d8d8d19988de  libstdc++-v3/libsupc++/exception
  c63781c44ea62d41d540e3dc9df083ad  libstdc++-v3/libsupc++/exception.h
  7831f52e348280d54cdefd954a8125ae  libstdc++-v3/libsupc++/exception_defines.h
! 88ee853a91f89dcf79baecdf5a1e3aa4  libstdc++-v3/libsupc++/exception_ptr.h
  e9526cde45ad82aac1bdad78e48b77d9  libstdc++-v3/libsupc++/function_type_info.cc
  19738f26bfd633c091434c2b3a705170  libstdc++-v3/libsupc++/fundamental_type_info.cc
  2a200bb5c53b0893bf37016eaa025581  libstdc++-v3/libsupc++/guard.cc
*************** b736a3e0c3130311d7283d2e42b337ae  libstd
*** 106495,106501 ****
  008264d01c4067464408c9777e292ee3  libstdc++-v3/libsupc++/new
  87c7167973517867f1dce7e6537f5493  libstdc++-v3/libsupc++/new_handler.cc
  a0242b24fe3d20508b195a569e213580  libstdc++-v3/libsupc++/new_op.cc
! 9147256faba7ae3d5c4e9400ed523a35  libstdc++-v3/libsupc++/new_opa.cc
  db5414821a05e8baefb055b0be852385  libstdc++-v3/libsupc++/new_opant.cc
  fd977844781418fe90162ecd1a5bdcbe  libstdc++-v3/libsupc++/new_opnt.cc
  5bc9c32dd691fa3053c50c840c28112d  libstdc++-v3/libsupc++/new_opv.cc
--- 106703,106709 ----
  008264d01c4067464408c9777e292ee3  libstdc++-v3/libsupc++/new
  87c7167973517867f1dce7e6537f5493  libstdc++-v3/libsupc++/new_handler.cc
  a0242b24fe3d20508b195a569e213580  libstdc++-v3/libsupc++/new_op.cc
! 498cc29197c865d2bd7407914a050a7c  libstdc++-v3/libsupc++/new_opa.cc
  db5414821a05e8baefb055b0be852385  libstdc++-v3/libsupc++/new_opant.cc
  fd977844781418fe90162ecd1a5bdcbe  libstdc++-v3/libsupc++/new_opnt.cc
  5bc9c32dd691fa3053c50c840c28112d  libstdc++-v3/libsupc++/new_opv.cc
*************** c8cbca9ae8196cdff7586f9cd8784702  libstd
*** 106529,106563 ****
  99337a5a9c6351ae321ba8645b3981f0  libstdc++-v3/python/hook.in
  68b329da9893e34099c7d8ad5cb9c940  libstdc++-v3/python/libstdcxx/__init__.py
  9b4aa298a5559f01a31b4252b2ca34c7  libstdc++-v3/python/libstdcxx/v6/__init__.py
! 4f1b43cecbc7e2b0d02fcb19a611d348  libstdc++-v3/python/libstdcxx/v6/printers.py
! 6e0303af3dd318bcf13bd355c8b2ef92  libstdc++-v3/python/libstdcxx/v6/xmethods.py
  cdac7363b91e7d57b85f7b560f62f033  libstdc++-v3/scripts/check_compile
  a4c1d51bba293cee2307fc7f9dd090f7  libstdc++-v3/scripts/check_performance
  128d0fbc24e1d43d9ff93d14bd521aa6  libstdc++-v3/scripts/check_simd
  40f8ee10a4683f6c7f555f9450fcaa12  libstdc++-v3/scripts/create_testsuite_files
! 03e2e969a118c4640e7ce5e696d6c36a  libstdc++-v3/scripts/extract_symvers.in
  e5254f12410a36e94ee38b08c1d35033  libstdc++-v3/scripts/extract_symvers.pl
  755b77f929d926f07f3257df2e802f2e  libstdc++-v3/scripts/gen_bind_includers.pl
  85378fa65bc3dc46ffe255374b304560  libstdc++-v3/scripts/gen_includers.pl
  f1a84a17158780aaa37927191db4463a  libstdc++-v3/scripts/gen_includers2.pl
  c3455b8d87dcefd65c7fdcd24e4ce3a4  libstdc++-v3/scripts/make_exports.pl
  80b6ff44b325c6b6d113435d8eea4b76  libstdc++-v3/scripts/make_graph.py
! 5ff227cd3c32bd4bc544e3cf53d77ccd  libstdc++-v3/scripts/run_doxygen
  b5c90557075248abb064905101257dda  libstdc++-v3/scripts/testsuite_flags.in
! 2800ac0fcda73864d0a7c766563eff44  libstdc++-v3/src/Makefile.am
! 29f868c8cffdab36350b47e3a9c36917  libstdc++-v3/src/Makefile.in
! a8ffe2ad24249db68c5a7ced143fe7f2  libstdc++-v3/src/c++11/Makefile.am
! 44f21e2ab368caf32eb97e02b83eb91d  libstdc++-v3/src/c++11/Makefile.in
! 1bac4c8b59f3d07015bc54141666c8dd  libstdc++-v3/src/c++11/chrono.cc
! ce82126cc7bbe2c763c5eff99de9a963  libstdc++-v3/src/c++11/codecvt.cc
  6f4d4569f8ec67d46c6dcf972c0d8937  libstdc++-v3/src/c++11/compatibility-atomic-c++0x.cc
! 9653bdd9c763b1e15e1a47bd5d1e7402  libstdc++-v3/src/c++11/compatibility-c++0x.cc
! 822301c830c65bb2a495049efd0e0501  libstdc++-v3/src/c++11/compatibility-chrono.cc
! 7fb623f08c2323af817abfbab08370f5  libstdc++-v3/src/c++11/compatibility-condvar.cc
  706be41734f65fd49abdd4588859dea1  libstdc++-v3/src/c++11/compatibility-ldbl-alt128-cxx11.cc
  ba35560b9593674f94b8e5cc2fa5c6a6  libstdc++-v3/src/c++11/compatibility-ldbl-alt128.cc
  8d462d7c234a7824f70c654a77fd0343  libstdc++-v3/src/c++11/compatibility-ldbl-facets-aliases.h
! 47fa47dc9800c7194df096036a780a5a  libstdc++-v3/src/c++11/compatibility-thread-c++0x.cc
  936c3c006efff078161dc4ea908eff51  libstdc++-v3/src/c++11/condition_variable.cc
  0a2f98e6dce0f4843b63c6f18fed049b  libstdc++-v3/src/c++11/cow-fstream-inst.cc
  8ef14c27c500b1c2ae8c88191aa07f4f  libstdc++-v3/src/c++11/cow-locale_init.cc
--- 106737,106772 ----
  99337a5a9c6351ae321ba8645b3981f0  libstdc++-v3/python/hook.in
  68b329da9893e34099c7d8ad5cb9c940  libstdc++-v3/python/libstdcxx/__init__.py
  9b4aa298a5559f01a31b4252b2ca34c7  libstdc++-v3/python/libstdcxx/v6/__init__.py
! 34607b768d02c4b46cc8afbacad73cf4  libstdc++-v3/python/libstdcxx/v6/printers.py
! 8a9fcedb67937bbba12d6701291dfb00  libstdc++-v3/python/libstdcxx/v6/xmethods.py
  cdac7363b91e7d57b85f7b560f62f033  libstdc++-v3/scripts/check_compile
  a4c1d51bba293cee2307fc7f9dd090f7  libstdc++-v3/scripts/check_performance
  128d0fbc24e1d43d9ff93d14bd521aa6  libstdc++-v3/scripts/check_simd
  40f8ee10a4683f6c7f555f9450fcaa12  libstdc++-v3/scripts/create_testsuite_files
! 911aa3877ebe4f7d13e81d877f0e241e  libstdc++-v3/scripts/extract_symvers.in
  e5254f12410a36e94ee38b08c1d35033  libstdc++-v3/scripts/extract_symvers.pl
  755b77f929d926f07f3257df2e802f2e  libstdc++-v3/scripts/gen_bind_includers.pl
  85378fa65bc3dc46ffe255374b304560  libstdc++-v3/scripts/gen_includers.pl
  f1a84a17158780aaa37927191db4463a  libstdc++-v3/scripts/gen_includers2.pl
  c3455b8d87dcefd65c7fdcd24e4ce3a4  libstdc++-v3/scripts/make_exports.pl
  80b6ff44b325c6b6d113435d8eea4b76  libstdc++-v3/scripts/make_graph.py
! 93749ca46c1816bdcd40f638767b6e2f  libstdc++-v3/scripts/run_doxygen
  b5c90557075248abb064905101257dda  libstdc++-v3/scripts/testsuite_flags.in
! e49fcbe6ea0d466f8e355e164552e4fb  libstdc++-v3/src/Makefile.am
! 8d7c6422b9a681072fab2a5dd93ad0c8  libstdc++-v3/src/Makefile.in
! ea4ab687ad1c540c0e58988377b4f365  libstdc++-v3/src/c++11/Makefile.am
! 95cc73e35f558a3d999320fbf7b7b58c  libstdc++-v3/src/c++11/Makefile.in
! 4afad50e36b2bfef56fb3189f112ee46  libstdc++-v3/src/c++11/assert_fail.cc
! c914b3a82977dc07700477f8af234283  libstdc++-v3/src/c++11/chrono.cc
! 5ff7c7e87f5b8aef1a3dafd4292a4782  libstdc++-v3/src/c++11/codecvt.cc
  6f4d4569f8ec67d46c6dcf972c0d8937  libstdc++-v3/src/c++11/compatibility-atomic-c++0x.cc
! 32ea7478f1ddaffbe3764bb00fb64d9d  libstdc++-v3/src/c++11/compatibility-c++0x.cc
! 8e67a7c1de0698003fd3270c31f2ba6a  libstdc++-v3/src/c++11/compatibility-chrono.cc
! 1b83f473b9bf9041d2a7a34c141855ce  libstdc++-v3/src/c++11/compatibility-condvar.cc
  706be41734f65fd49abdd4588859dea1  libstdc++-v3/src/c++11/compatibility-ldbl-alt128-cxx11.cc
  ba35560b9593674f94b8e5cc2fa5c6a6  libstdc++-v3/src/c++11/compatibility-ldbl-alt128.cc
  8d462d7c234a7824f70c654a77fd0343  libstdc++-v3/src/c++11/compatibility-ldbl-facets-aliases.h
! e202697e2502a46c22c7d564febe8e10  libstdc++-v3/src/c++11/compatibility-thread-c++0x.cc
  936c3c006efff078161dc4ea908eff51  libstdc++-v3/src/c++11/condition_variable.cc
  0a2f98e6dce0f4843b63c6f18fed049b  libstdc++-v3/src/c++11/cow-fstream-inst.cc
  8ef14c27c500b1c2ae8c88191aa07f4f  libstdc++-v3/src/c++11/cow-locale_init.cc
*************** c0ce22782698f527aa23c86081579318  libstd
*** 106575,106581 ****
  1873f8363e67f6beac3a8f0cb4ea8b08  libstdc++-v3/src/c++11/cxx11-shim_facets.cc
  077ed5dbaeb50d017644c6a26b19acf5  libstdc++-v3/src/c++11/cxx11-stdexcept.cc
  d13ab90d7b02d7fa901c3b5c1ec93519  libstdc++-v3/src/c++11/cxx11-wlocale-inst.cc
! 6f95f475b9b606e7e6585cfa7b4fb01e  libstdc++-v3/src/c++11/debug.cc
  ccc01b37e3b2bb8b326ea8036a900a13  libstdc++-v3/src/c++11/ext11-inst.cc
  3a70dd8395391521505453d2cf8b6304  libstdc++-v3/src/c++11/fstream-inst.cc
  809f713df54dbe4ce5d5840f7bf50c53  libstdc++-v3/src/c++11/functexcept.cc
--- 106784,106790 ----
  1873f8363e67f6beac3a8f0cb4ea8b08  libstdc++-v3/src/c++11/cxx11-shim_facets.cc
  077ed5dbaeb50d017644c6a26b19acf5  libstdc++-v3/src/c++11/cxx11-stdexcept.cc
  d13ab90d7b02d7fa901c3b5c1ec93519  libstdc++-v3/src/c++11/cxx11-wlocale-inst.cc
! 8d6cbaf5fcd315efc61b8e0aa2803aef  libstdc++-v3/src/c++11/debug.cc
  ccc01b37e3b2bb8b326ea8036a900a13  libstdc++-v3/src/c++11/ext11-inst.cc
  3a70dd8395391521505453d2cf8b6304  libstdc++-v3/src/c++11/fstream-inst.cc
  809f713df54dbe4ce5d5840f7bf50c53  libstdc++-v3/src/c++11/functexcept.cc
*************** ec9c72a5ee0ff6169c89816cd997fc7f  libstd
*** 106605,106611 ****
  62d68a338d9d558342a64e3812f42370  libstdc++-v3/src/c++11/streambuf-inst.cc
  3f5be41744a83869e79685eee51be75b  libstdc++-v3/src/c++11/string-inst.cc
  bfd5afa319b8c484af4d2d6a9c51d6cd  libstdc++-v3/src/c++11/string-io-inst.cc
! 102320edfb80dfb0e5bc3c8b6861d25b  libstdc++-v3/src/c++11/system_error.cc
  e224dbd54286756dd3434a53e714ba2f  libstdc++-v3/src/c++11/thread.cc
  cfb4d4117b273737a07a71762eae15d1  libstdc++-v3/src/c++11/wlocale-inst.cc
  ef307f9cecfa67b64519d3c87e2d7cbf  libstdc++-v3/src/c++11/wstring-inst.cc
--- 106814,106820 ----
  62d68a338d9d558342a64e3812f42370  libstdc++-v3/src/c++11/streambuf-inst.cc
  3f5be41744a83869e79685eee51be75b  libstdc++-v3/src/c++11/string-inst.cc
  bfd5afa319b8c484af4d2d6a9c51d6cd  libstdc++-v3/src/c++11/string-io-inst.cc
! 653ada64af76081793cf995ee8177c22  libstdc++-v3/src/c++11/system_error.cc
  e224dbd54286756dd3434a53e714ba2f  libstdc++-v3/src/c++11/thread.cc
  cfb4d4117b273737a07a71762eae15d1  libstdc++-v3/src/c++11/wlocale-inst.cc
  ef307f9cecfa67b64519d3c87e2d7cbf  libstdc++-v3/src/c++11/wstring-inst.cc
*************** bccfdaafbb95c858e37317d0863bce04  libstd
*** 106624,106632 ****
  f755cc51c53f4702fa47e78a06db4bef  libstdc++-v3/src/c++17/floating_from_chars.cc
  73812a0c249f1a107c6747054f47134b  libstdc++-v3/src/c++17/floating_to_chars.cc
  bb0739a0b76ea0dfca5442362e727905  libstdc++-v3/src/c++17/fs_dir.cc
! 5cdc766edd11539c01605ce5bd586add  libstdc++-v3/src/c++17/fs_ops.cc
  3763d05c842e72fb442d10bcd2333274  libstdc++-v3/src/c++17/fs_path.cc
! b7168c593c53a44cbac0c2f5e38498ce  libstdc++-v3/src/c++17/memory_resource.cc
  f986a48e2efed103402262a2315d1784  libstdc++-v3/src/c++17/ostream-inst.cc
  f7696e2f5518e5e873ced4beacb8d107  libstdc++-v3/src/c++17/ryu/LOCAL_PATCHES
  e225c39ccc4c6adc72a744687977d59d  libstdc++-v3/src/c++17/ryu/MERGE
--- 106833,106841 ----
  f755cc51c53f4702fa47e78a06db4bef  libstdc++-v3/src/c++17/floating_from_chars.cc
  73812a0c249f1a107c6747054f47134b  libstdc++-v3/src/c++17/floating_to_chars.cc
  bb0739a0b76ea0dfca5442362e727905  libstdc++-v3/src/c++17/fs_dir.cc
! 2aa4875b25b628b8f9327916444ba936  libstdc++-v3/src/c++17/fs_ops.cc
  3763d05c842e72fb442d10bcd2333274  libstdc++-v3/src/c++17/fs_path.cc
! 5ae56ccd7ecc861799378737bab31926  libstdc++-v3/src/c++17/memory_resource.cc
  f986a48e2efed103402262a2315d1784  libstdc++-v3/src/c++17/ostream-inst.cc
  f7696e2f5518e5e873ced4beacb8d107  libstdc++-v3/src/c++17/ryu/LOCAL_PATCHES
  e225c39ccc4c6adc72a744687977d59d  libstdc++-v3/src/c++17/ryu/MERGE
*************** ce5be71e7e8cd53b30c2f5098afdf2f3  libstd
*** 106696,106706 ****
  c9755a27253724e51dc118d2832eec1c  libstdc++-v3/src/filesystem/cow-path.cc
  5b0a766e4b7be57dc339424afd722b26  libstdc++-v3/src/filesystem/dir-common.h
  b8fde319e2db86a39680ddcb52522fef  libstdc++-v3/src/filesystem/dir.cc
! 4a48c2fd38b58889cc3af92f5634a30a  libstdc++-v3/src/filesystem/ops-common.h
! a287374bc3d519a3e459736e90573f72  libstdc++-v3/src/filesystem/ops.cc
  339d6d3eeddb51bb668748f19203420f  libstdc++-v3/src/filesystem/path.cc
! 363b12ab3b2dd386adec7aee648e7dd6  libstdc++-v3/src/libbacktrace/Makefile.am
! 775bfe992c7c40d0700e4fa9f00c9d83  libstdc++-v3/src/libbacktrace/Makefile.in
  ce4e38332339194e4192eb2ba07fcd41  libstdc++-v3/src/libbacktrace/backtrace-rename.h
  f1f9f4df2a1a6c954c5a09ac3f6238e8  libstdc++-v3/src/libbacktrace/backtrace-supported.h.in
  d80381bdd74336b121a4f087efc21dbb  libstdc++-v3/src/libbacktrace/config.h.in
--- 106905,106915 ----
  c9755a27253724e51dc118d2832eec1c  libstdc++-v3/src/filesystem/cow-path.cc
  5b0a766e4b7be57dc339424afd722b26  libstdc++-v3/src/filesystem/dir-common.h
  b8fde319e2db86a39680ddcb52522fef  libstdc++-v3/src/filesystem/dir.cc
! 9821e6e174556ccfd8ad9467062344a2  libstdc++-v3/src/filesystem/ops-common.h
! d0e1b8adbd675a382092bd143ee161b9  libstdc++-v3/src/filesystem/ops.cc
  339d6d3eeddb51bb668748f19203420f  libstdc++-v3/src/filesystem/path.cc
! d9c5f36f6a9eb51e654703b145116b53  libstdc++-v3/src/libbacktrace/Makefile.am
! 799e06af4d51c81025cff347841726e0  libstdc++-v3/src/libbacktrace/Makefile.in
  ce4e38332339194e4192eb2ba07fcd41  libstdc++-v3/src/libbacktrace/backtrace-rename.h
  f1f9f4df2a1a6c954c5a09ac3f6238e8  libstdc++-v3/src/libbacktrace/backtrace-supported.h.in
  d80381bdd74336b121a4f087efc21dbb  libstdc++-v3/src/libbacktrace/config.h.in
*************** b8a53b2b8da32d102d69cbedea3d2216  libstd
*** 106761,106767 ****
  64f755290372eba3d8235278d6f5b8b7  libstdc++-v3/testsuite/17_intro/headers/c++2020/operator_names.cc
  652e2a337bf38b3e3ca0c49c2bcdcca6  libstdc++-v3/testsuite/17_intro/headers/c++2020/stdc++.cc
  9df22201175c827bee60b62e621e537b  libstdc++-v3/testsuite/17_intro/headers/c++2020/stdc++_multiple_inclusion.cc
! f11164ff458b5a76ab402a7f1bfb3783  libstdc++-v3/testsuite/17_intro/names.cc
  44aea4dc1700d437c73f660156e02461  libstdc++-v3/testsuite/17_intro/shared_with_static_deps.cc
  ef83f2fe6df689b8cf96f8504ae113db  libstdc++-v3/testsuite/17_intro/static.cc
  dab68cc9b569ccb6c01e3bd633cc366b  libstdc++-v3/testsuite/17_intro/tag_type_explicit_ctor.cc
--- 106970,106976 ----
  64f755290372eba3d8235278d6f5b8b7  libstdc++-v3/testsuite/17_intro/headers/c++2020/operator_names.cc
  652e2a337bf38b3e3ca0c49c2bcdcca6  libstdc++-v3/testsuite/17_intro/headers/c++2020/stdc++.cc
  9df22201175c827bee60b62e621e537b  libstdc++-v3/testsuite/17_intro/headers/c++2020/stdc++_multiple_inclusion.cc
! 710f4242cad3097f884c9052b9d0c1e6  libstdc++-v3/testsuite/17_intro/names.cc
  44aea4dc1700d437c73f660156e02461  libstdc++-v3/testsuite/17_intro/shared_with_static_deps.cc
  ef83f2fe6df689b8cf96f8504ae113db  libstdc++-v3/testsuite/17_intro/static.cc
  dab68cc9b569ccb6c01e3bd633cc366b  libstdc++-v3/testsuite/17_intro/tag_type_explicit_ctor.cc
*************** b9fd24dabd45aeb58f49d163159969e0  libstd
*** 106878,106884 ****
  eb0e3ec00478dd3f996bc89b1923586c  libstdc++-v3/testsuite/18_support/new_aligned.cc
  a48edfb14d283df63c79641898aa4146  libstdc++-v3/testsuite/18_support/new_delete_placement.cc
  183f355142a2ebc660affd473c5471ab  libstdc++-v3/testsuite/18_support/new_handler.cc
! 2f1b95f9cf7dea1e3d5c5afef956866c  libstdc++-v3/testsuite/18_support/new_nothrow.cc
  59ad3909f307e0747eab47ead4637928  libstdc++-v3/testsuite/18_support/numeric_limits/29989.cc
  7ff8875ccb67e3edeb333989b1302c49  libstdc++-v3/testsuite/18_support/numeric_limits/40856.cc
  792e5796ce23ed7ae896f901fe8e21e2  libstdc++-v3/testsuite/18_support/numeric_limits/char16_32_t.cc
--- 107087,107093 ----
  eb0e3ec00478dd3f996bc89b1923586c  libstdc++-v3/testsuite/18_support/new_aligned.cc
  a48edfb14d283df63c79641898aa4146  libstdc++-v3/testsuite/18_support/new_delete_placement.cc
  183f355142a2ebc660affd473c5471ab  libstdc++-v3/testsuite/18_support/new_handler.cc
! 1c9d63a9ccffa11a4326a589634b8962  libstdc++-v3/testsuite/18_support/new_nothrow.cc
  59ad3909f307e0747eab47ead4637928  libstdc++-v3/testsuite/18_support/numeric_limits/29989.cc
  7ff8875ccb67e3edeb333989b1302c49  libstdc++-v3/testsuite/18_support/numeric_limits/40856.cc
  792e5796ce23ed7ae896f901fe8e21e2  libstdc++-v3/testsuite/18_support/numeric_limits/char16_32_t.cc
*************** c06cd3372e5d237f3d664d174e69b38d  libstd
*** 106973,106978 ****
--- 107182,107188 ----
  a6dcf6cbaf916e3c7f40ba4b651d42f3  libstdc++-v3/testsuite/19_diagnostics/runtime_error/what-big.cc
  a3f875cb81845cea6552ad2be474733b  libstdc++-v3/testsuite/19_diagnostics/stacktrace/current.cc
  bcbe8956841ad8748b7d53b018a0f23b  libstdc++-v3/testsuite/19_diagnostics/stacktrace/entry.cc
+ 1cb3680da0023fa955ece4a3030256f9  libstdc++-v3/testsuite/19_diagnostics/stacktrace/hash.cc
  489c2f3ec1b126c0f5cab03ec75198b5  libstdc++-v3/testsuite/19_diagnostics/stacktrace/stacktrace.cc
  1a16038fc4f582a0976f9f59a252d7cb  libstdc++-v3/testsuite/19_diagnostics/stacktrace/synopsis.cc
  663e3dcea433a03255e7eed74d7d7f2f  libstdc++-v3/testsuite/19_diagnostics/stacktrace/version.cc
*************** d01ba038607a0be8c0ebcbc0afc0fe04  libstd
*** 107061,107067 ****
  335e5502fad2ac140247bdc170504f8f  libstdc++-v3/testsuite/20_util/any/cons/104242.cc
  855e75aa8462203b5f87a24541db1952  libstdc++-v3/testsuite/20_util/any/cons/2.cc
  826f185dc51f69a0ab8d1f2335986459  libstdc++-v3/testsuite/20_util/any/cons/90415.cc
! 5539553886e8ad6b2ba83893f0b569bd  libstdc++-v3/testsuite/20_util/any/cons/92156.cc
  cb739269f63b936a136e916b9d839d5f  libstdc++-v3/testsuite/20_util/any/cons/92878_92947.cc
  1a0d7537907092a26f448a5c16ecf941  libstdc++-v3/testsuite/20_util/any/cons/aligned.cc
  c90b9951e6429a4b4ad2ef035e3cc857  libstdc++-v3/testsuite/20_util/any/cons/explicit.cc
--- 107271,107277 ----
  335e5502fad2ac140247bdc170504f8f  libstdc++-v3/testsuite/20_util/any/cons/104242.cc
  855e75aa8462203b5f87a24541db1952  libstdc++-v3/testsuite/20_util/any/cons/2.cc
  826f185dc51f69a0ab8d1f2335986459  libstdc++-v3/testsuite/20_util/any/cons/90415.cc
! 57527ff09347d874b7e2fa6f571b59cb  libstdc++-v3/testsuite/20_util/any/cons/92156.cc
  cb739269f63b936a136e916b9d839d5f  libstdc++-v3/testsuite/20_util/any/cons/92878_92947.cc
  1a0d7537907092a26f448a5c16ecf941  libstdc++-v3/testsuite/20_util/any/cons/aligned.cc
  c90b9951e6429a4b4ad2ef035e3cc857  libstdc++-v3/testsuite/20_util/any/cons/explicit.cc
*************** a04eac60519c81e4fdef0d442c07af11  libstd
*** 107074,107080 ****
  70a36e128b355c8a699ecd49ffdd7b3e  libstdc++-v3/testsuite/20_util/any/misc/swap.cc
  da19833eaea81e776688f755b0c0d7c6  libstdc++-v3/testsuite/20_util/any/modifiers/1.cc
  ffd841383afd9ceee535b6029825102a  libstdc++-v3/testsuite/20_util/any/modifiers/83658.cc
! 0b178f58fe2dc648c5ceadbb3843ace8  libstdc++-v3/testsuite/20_util/any/modifiers/92156.cc
  8cf003e1ff241a7b0df478196794d384  libstdc++-v3/testsuite/20_util/any/observers/type.cc
  b965df8cef8c2d5831514ae10feef71d  libstdc++-v3/testsuite/20_util/any/requirements.cc
  ca32a2a3ed352918a9edce8c1128a596  libstdc++-v3/testsuite/20_util/any/typedefs.cc
--- 107284,107290 ----
  70a36e128b355c8a699ecd49ffdd7b3e  libstdc++-v3/testsuite/20_util/any/misc/swap.cc
  da19833eaea81e776688f755b0c0d7c6  libstdc++-v3/testsuite/20_util/any/modifiers/1.cc
  ffd841383afd9ceee535b6029825102a  libstdc++-v3/testsuite/20_util/any/modifiers/83658.cc
! a8f2be3f2e89f61ab5b418cd3d53f67e  libstdc++-v3/testsuite/20_util/any/modifiers/92156.cc
  8cf003e1ff241a7b0df478196794d384  libstdc++-v3/testsuite/20_util/any/observers/type.cc
  b965df8cef8c2d5831514ae10feef71d  libstdc++-v3/testsuite/20_util/any/requirements.cc
  ca32a2a3ed352918a9edce8c1128a596  libstdc++-v3/testsuite/20_util/any/typedefs.cc
*************** a38ea2fa32cc4818228bb597203e3fe5  libstd
*** 107145,107151 ****
  8795c34c783c151467f9d8c090c4a066  libstdc++-v3/testsuite/20_util/declval/requirements/1_neg.cc
  510094f2352e00bc3c98d72c6e2d291a  libstdc++-v3/testsuite/20_util/default_delete/48631_neg.cc
  9a7515be77eedd837ee73f5e0c54ead4  libstdc++-v3/testsuite/20_util/default_delete/cons/constexpr.cc
! 77aabc6b885a5e747f6090c1f8dd29e2  libstdc++-v3/testsuite/20_util/default_delete/void_neg.cc
  b3415c59024254394b532b647bc497f6  libstdc++-v3/testsuite/20_util/duration/arithmetic/1.cc
  e4b514e6ace9ea3f45a5559e581e68ac  libstdc++-v3/testsuite/20_util/duration/arithmetic/2.cc
  27fb0edde4e6b353a82bda16d421e3b0  libstdc++-v3/testsuite/20_util/duration/arithmetic/58850.cc
--- 107355,107361 ----
  8795c34c783c151467f9d8c090c4a066  libstdc++-v3/testsuite/20_util/declval/requirements/1_neg.cc
  510094f2352e00bc3c98d72c6e2d291a  libstdc++-v3/testsuite/20_util/default_delete/48631_neg.cc
  9a7515be77eedd837ee73f5e0c54ead4  libstdc++-v3/testsuite/20_util/default_delete/cons/constexpr.cc
! ec44da080688f9c9038c0c0cb39248b9  libstdc++-v3/testsuite/20_util/default_delete/void_neg.cc
  b3415c59024254394b532b647bc497f6  libstdc++-v3/testsuite/20_util/duration/arithmetic/1.cc
  e4b514e6ace9ea3f45a5559e581e68ac  libstdc++-v3/testsuite/20_util/duration/arithmetic/2.cc
  27fb0edde4e6b353a82bda16d421e3b0  libstdc++-v3/testsuite/20_util/duration/arithmetic/58850.cc
*************** e80cdba765ebc45f35f3465225e219a8  libstd
*** 107181,107188 ****
  8c1b26686b749cf5ad365ff9d05a5737  libstdc++-v3/testsuite/20_util/duration/requirements/reduced_period.cc
  a972cfee7b783b7695dc85eba704d4b7  libstdc++-v3/testsuite/20_util/duration/requirements/sfinae_friendly_1.cc
  d32f2eb40ce86eb35d99e7d5df9e0b62  libstdc++-v3/testsuite/20_util/duration/requirements/treat_as_floating_point_v.cc
! b2e9238e5e4a5968dd04050cc7997254  libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg1.cc
! 25c9e12b261f6af449879ac690f3c996  libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg2.cc
  e71581e883eae422b1878ffd5c272074  libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg3.cc
  d0208aa17f417e0adb70258de9ddfdb5  libstdc++-v3/testsuite/20_util/duration_cast/constexpr.cc
  f6f5a1d78824477356777d8d15b93c22  libstdc++-v3/testsuite/20_util/duration_cast/rounding.cc
--- 107391,107398 ----
  8c1b26686b749cf5ad365ff9d05a5737  libstdc++-v3/testsuite/20_util/duration/requirements/reduced_period.cc
  a972cfee7b783b7695dc85eba704d4b7  libstdc++-v3/testsuite/20_util/duration/requirements/sfinae_friendly_1.cc
  d32f2eb40ce86eb35d99e7d5df9e0b62  libstdc++-v3/testsuite/20_util/duration/requirements/treat_as_floating_point_v.cc
! 49688231c258d98c1121bf94792b23f5  libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg1.cc
! da662ecb63fff9c57d83cdd174c69253  libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg2.cc
  e71581e883eae422b1878ffd5c272074  libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg3.cc
  d0208aa17f417e0adb70258de9ddfdb5  libstdc++-v3/testsuite/20_util/duration_cast/constexpr.cc
  f6f5a1d78824477356777d8d15b93c22  libstdc++-v3/testsuite/20_util/duration_cast/rounding.cc
*************** e97254ce4fd08fa50a505c35d5316111  libstd
*** 107201,107207 ****
  72288a1f7e75afaa7f130333f81d1d98  libstdc++-v3/testsuite/20_util/enable_shared_from_this/members/weak_from_this.cc
  6d65efb6f7e1e04dad4717a415d9674f  libstdc++-v3/testsuite/20_util/enable_shared_from_this/requirements/explicit_instantiation.cc
  409664681669399d3364b74f0eb3146e  libstdc++-v3/testsuite/20_util/exchange/1.cc
! 0f5354206a79465581c921cc3f2cba78  libstdc++-v3/testsuite/20_util/exchange/constexpr.cc
  5abbf6d20cd589946f4bdfcb28f02dd4  libstdc++-v3/testsuite/20_util/exchange/noexcept.cc
  da3718fa1e22fa960e90da076e9180db  libstdc++-v3/testsuite/20_util/expected/assign.cc
  786012815e4d290200d001a0341260c1  libstdc++-v3/testsuite/20_util/expected/bad.cc
--- 107411,107417 ----
  72288a1f7e75afaa7f130333f81d1d98  libstdc++-v3/testsuite/20_util/enable_shared_from_this/members/weak_from_this.cc
  6d65efb6f7e1e04dad4717a415d9674f  libstdc++-v3/testsuite/20_util/enable_shared_from_this/requirements/explicit_instantiation.cc
  409664681669399d3364b74f0eb3146e  libstdc++-v3/testsuite/20_util/exchange/1.cc
! 7f5bd137420f98f4a7d7e8538b615ec5  libstdc++-v3/testsuite/20_util/exchange/constexpr.cc
  5abbf6d20cd589946f4bdfcb28f02dd4  libstdc++-v3/testsuite/20_util/exchange/noexcept.cc
  da3718fa1e22fa960e90da076e9180db  libstdc++-v3/testsuite/20_util/expected/assign.cc
  786012815e4d290200d001a0341260c1  libstdc++-v3/testsuite/20_util/expected/bad.cc
*************** a7024278402f6bfa44a39f55f6161294  libstd
*** 107231,107237 ****
  5e4098df3da50ef73e46d8ffdd46b39a  libstdc++-v3/testsuite/20_util/from_chars/1_neg.cc
  527af2bc58c919e71583749ebf9cce55  libstdc++-v3/testsuite/20_util/from_chars/2.cc
  4c743055fc43cb29857c73ad99c7c811  libstdc++-v3/testsuite/20_util/from_chars/3.cc
! 25b059603915bc19f9024edb2361e09a  libstdc++-v3/testsuite/20_util/from_chars/4.cc
  afc5f2fb411348dbe627137f0be5c20f  libstdc++-v3/testsuite/20_util/from_chars/5.cc
  173967c637a04148bcc75da2fef53af7  libstdc++-v3/testsuite/20_util/from_chars/6.cc
  33cb1fba3bfa8508f23e78bc210ae25d  libstdc++-v3/testsuite/20_util/from_chars/7.cc
--- 107441,107447 ----
  5e4098df3da50ef73e46d8ffdd46b39a  libstdc++-v3/testsuite/20_util/from_chars/1_neg.cc
  527af2bc58c919e71583749ebf9cce55  libstdc++-v3/testsuite/20_util/from_chars/2.cc
  4c743055fc43cb29857c73ad99c7c811  libstdc++-v3/testsuite/20_util/from_chars/3.cc
! 9dae4db7f88acde050f7758f04464311  libstdc++-v3/testsuite/20_util/from_chars/4.cc
  afc5f2fb411348dbe627137f0be5c20f  libstdc++-v3/testsuite/20_util/from_chars/5.cc
  173967c637a04148bcc75da2fef53af7  libstdc++-v3/testsuite/20_util/from_chars/6.cc
  33cb1fba3bfa8508f23e78bc210ae25d  libstdc++-v3/testsuite/20_util/from_chars/7.cc
*************** fe9469f3df706448a4da3b435459235c  libstd
*** 107350,107356 ****
  f458ef6e28dd60e84def3afb83add43f  libstdc++-v3/testsuite/20_util/headers/functional/synopsis.cc
  b638d5a1436ae1ef82d64e143096673c  libstdc++-v3/testsuite/20_util/headers/functional/types_std_c++0x.cc
  e5037351f89d0c490f773de5e8663921  libstdc++-v3/testsuite/20_util/headers/functional/using_namespace_std_placeholders.cc
! 1ce043d1bf57756c331e317e1b9e515a  libstdc++-v3/testsuite/20_util/headers/memory/synopsis.cc
  f25a24c9881b0423d62f56322f00e192  libstdc++-v3/testsuite/20_util/headers/memory/types_std_c++0x.cc
  029aa6a284914b0a9b1933208ee6d909  libstdc++-v3/testsuite/20_util/headers/type_traits/std_c++0x_neg.cc
  8158b6cba3b9e34ee67ac99fb5984678  libstdc++-v3/testsuite/20_util/headers/type_traits/types_std_c++0x.cc
--- 107560,107566 ----
  f458ef6e28dd60e84def3afb83add43f  libstdc++-v3/testsuite/20_util/headers/functional/synopsis.cc
  b638d5a1436ae1ef82d64e143096673c  libstdc++-v3/testsuite/20_util/headers/functional/types_std_c++0x.cc
  e5037351f89d0c490f773de5e8663921  libstdc++-v3/testsuite/20_util/headers/functional/using_namespace_std_placeholders.cc
! df51b5ed5f0cd9728ccbb7e67808bb02  libstdc++-v3/testsuite/20_util/headers/memory/synopsis.cc
  f25a24c9881b0423d62f56322f00e192  libstdc++-v3/testsuite/20_util/headers/memory/types_std_c++0x.cc
  029aa6a284914b0a9b1933208ee6d909  libstdc++-v3/testsuite/20_util/headers/type_traits/std_c++0x_neg.cc
  8158b6cba3b9e34ee67ac99fb5984678  libstdc++-v3/testsuite/20_util/headers/type_traits/types_std_c++0x.cc
*************** ae78d4e1f061aaf6556908dc649baabd  libstd
*** 107374,107380 ****
--- 107584,107592 ----
  1ef204a969d3f470c0de434d5a42dd20  libstdc++-v3/testsuite/20_util/integer_comparisons/less_neg.cc
  d40d281f67bbddfd8ee3afa09db84194  libstdc++-v3/testsuite/20_util/integer_comparisons/not_equal.cc
  cff204fedb508acd88251e570815bd1e  libstdc++-v3/testsuite/20_util/integer_comparisons/not_equal_neg.cc
+ 01419816e55df10955ea47006b7fd41b  libstdc++-v3/testsuite/20_util/integer_sequence/112473.cc
  77217a1a0be9e8752b771ab62615174e  libstdc++-v3/testsuite/20_util/integer_sequence/intseq.cc
+ b299881c5f8a46c9954c9cfffbb15437  libstdc++-v3/testsuite/20_util/integer_sequence/pr111357.cc
  159d3fde83605a05000ed1adee3483a5  libstdc++-v3/testsuite/20_util/integer_sequence/requirements/typedefs.cc
  d83f2a7f8162634068865ab00d86a66a  libstdc++-v3/testsuite/20_util/integral_constant/call_operator.cc
  2447082448aab79905ba32b3aa79c2aa  libstdc++-v3/testsuite/20_util/integral_constant/operator_value_type.cc
*************** eb9bfe0027ea25f86df479187f2e2b51  libstd
*** 107762,107767 ****
--- 107974,107980 ----
  2e7aead929c8a20b8f4de6346cd95db7  libstdc++-v3/testsuite/20_util/optional/observers/6.cc
  d8af3640e7aabc8dd1960265b3ca5a27  libstdc++-v3/testsuite/20_util/optional/observers/lwg2762.cc
  7c9d417a4b0745e80dc5d920811dd7c1  libstdc++-v3/testsuite/20_util/optional/relops/1.cc
+ 9b0c6c5d74424693ceca6e756d7db294  libstdc++-v3/testsuite/20_util/optional/relops/104606.cc
  e7375870ac149e6fd0b61a1ce5c07e22  libstdc++-v3/testsuite/20_util/optional/relops/2.cc
  b82e5c7c2c813fea4e4e3c1e22106f9a  libstdc++-v3/testsuite/20_util/optional/relops/3.cc
  3ac691fa9feebe1a9124e9dfe774cae8  libstdc++-v3/testsuite/20_util/optional/relops/4.cc
*************** f63763611d2f39c6364f5717ce8aabe0  libstd
*** 107824,107830 ****
  5caef850610155be9b6c2033eeeb4d30  libstdc++-v3/testsuite/20_util/pair/swap_cxx17.cc
  c5d2ad990f812ed47a8b071884c2320f  libstdc++-v3/testsuite/20_util/pair/traits.cc
  4db5230edc60daf04deb5d886b7682e4  libstdc++-v3/testsuite/20_util/pointer_safety/1.cc
! 137193e221b043692c29a575c84f55f7  libstdc++-v3/testsuite/20_util/pointer_traits/lwg3545.cc
  2975cb430bb44eb904c416b203f8ae5c  libstdc++-v3/testsuite/20_util/pointer_traits/pointer_to.cc
  f860bff45e1170370ba6fc13aea4b94f  libstdc++-v3/testsuite/20_util/pointer_traits/pointer_to_constexpr.cc
  72a6d074e60a1b3b35cd824784faa89f  libstdc++-v3/testsuite/20_util/pointer_traits/rebind.cc
--- 108037,108043 ----
  5caef850610155be9b6c2033eeeb4d30  libstdc++-v3/testsuite/20_util/pair/swap_cxx17.cc
  c5d2ad990f812ed47a8b071884c2320f  libstdc++-v3/testsuite/20_util/pair/traits.cc
  4db5230edc60daf04deb5d886b7682e4  libstdc++-v3/testsuite/20_util/pointer_safety/1.cc
! 4ea61b01821ef91d050e7dc8bc19448b  libstdc++-v3/testsuite/20_util/pointer_traits/lwg3545.cc
  2975cb430bb44eb904c416b203f8ae5c  libstdc++-v3/testsuite/20_util/pointer_traits/pointer_to.cc
  f860bff45e1170370ba6fc13aea4b94f  libstdc++-v3/testsuite/20_util/pointer_traits/pointer_to_constexpr.cc
  72a6d074e60a1b3b35cd824784faa89f  libstdc++-v3/testsuite/20_util/pointer_traits/rebind.cc
*************** ee06c841bb23b4293304a23ddb3e1b97  libstd
*** 107855,107860 ****
--- 108068,108074 ----
  388c1b29064b2df244e9e89f3d18ae98  libstdc++-v3/testsuite/20_util/ratio/operations/ops_overflow_neg.cc
  6785d8ad8eab79be32eb8a1acab31957  libstdc++-v3/testsuite/20_util/ratio/requirements/constexpr_data.cc
  fb3427c994513620f40b5feb9d0ca9bb  libstdc++-v3/testsuite/20_util/ratio/requirements/ratio_equal_v.cc
+ d8bbe2c17046f08594a91f5a8e216ba7  libstdc++-v3/testsuite/20_util/ratio/requirements/type_constraints.cc
  adb5d68178006afea0a210c3b6d00b75  libstdc++-v3/testsuite/20_util/raw_storage_iterator/base.cc
  349d560eb6fa81f631f92d67b31e6a52  libstdc++-v3/testsuite/20_util/raw_storage_iterator/dr2127.cc
  d9bd349f9dd045de18c630078b82944e  libstdc++-v3/testsuite/20_util/raw_storage_iterator/requirements/base_classes.cc
*************** a3e2460d6bfae92a75109fe32407b41e  libstd
*** 107919,107924 ****
--- 108133,108139 ----
  9cc69f57d4e8b0f5602b4ebbd25be92b  libstdc++-v3/testsuite/20_util/scoped_allocator/construct_pair.cc
  0ae95cda47e71f65e553871b84de1398  libstdc++-v3/testsuite/20_util/scoped_allocator/construct_pair_c++2a.cc
  da4d65552940e65aa9d1b59f671421ca  libstdc++-v3/testsuite/20_util/scoped_allocator/dr2586.cc
+ 52ac694fb85b64837c02f1c4a7a2ebc9  libstdc++-v3/testsuite/20_util/scoped_allocator/noexcept.cc
  2ca4dc91545f4fa74b0b77f0d54e2ff2  libstdc++-v3/testsuite/20_util/scoped_allocator/outermost.cc
  cf2b68a4f2e80d3601f099fa53008067  libstdc++-v3/testsuite/20_util/scoped_allocator/propagation.cc
  11406f1cab3a7c7fd3f2a496454cc2ba  libstdc++-v3/testsuite/20_util/scoped_allocator/requirements/explicit_instantiation.cc
*************** e229d21ad28b17cf86e6023bb17532b6  libstd
*** 107981,107987 ****
  54c06b1286f303cf4fd6c5ec441153d8  libstdc++-v3/testsuite/20_util/shared_ptr/cons/unique_ptr_deleter_ref_1.cc
  f33d1878b4dbc41ec42803e9f34d9eb5  libstdc++-v3/testsuite/20_util/shared_ptr/cons/unique_ptr_deleter_ref_2.cc
  64521dae3f2aa23bd5aec6d59bc85edb  libstdc++-v3/testsuite/20_util/shared_ptr/cons/unique_ptr_neg.cc
! 7eaa4e5e65923584e56643495f1b5bce  libstdc++-v3/testsuite/20_util/shared_ptr/cons/void_neg.cc
  a528a67a2796e98f560c2ad59405ac7b  libstdc++-v3/testsuite/20_util/shared_ptr/cons/weak_ptr.cc
  e447654b7496b7e56ebe484e788d4d77  libstdc++-v3/testsuite/20_util/shared_ptr/cons/weak_ptr_expired.cc
  0ac7da30cf3e24d402140edd73403a98  libstdc++-v3/testsuite/20_util/shared_ptr/creation/36949.cc
--- 108196,108202 ----
  54c06b1286f303cf4fd6c5ec441153d8  libstdc++-v3/testsuite/20_util/shared_ptr/cons/unique_ptr_deleter_ref_1.cc
  f33d1878b4dbc41ec42803e9f34d9eb5  libstdc++-v3/testsuite/20_util/shared_ptr/cons/unique_ptr_deleter_ref_2.cc
  64521dae3f2aa23bd5aec6d59bc85edb  libstdc++-v3/testsuite/20_util/shared_ptr/cons/unique_ptr_neg.cc
! da830a9eb9b6c692238054df8e4f3bc6  libstdc++-v3/testsuite/20_util/shared_ptr/cons/void_neg.cc
  a528a67a2796e98f560c2ad59405ac7b  libstdc++-v3/testsuite/20_util/shared_ptr/cons/weak_ptr.cc
  e447654b7496b7e56ebe484e788d4d77  libstdc++-v3/testsuite/20_util/shared_ptr/cons/weak_ptr_expired.cc
  0ac7da30cf3e24d402140edd73403a98  libstdc++-v3/testsuite/20_util/shared_ptr/creation/36949.cc
*************** a7b9f2532325aa2dbcb244a2b8858e6d  libstd
*** 108115,108121 ****
  224c36f900afc5ec2ad272b606f5f8d6  libstdc++-v3/testsuite/20_util/to_chars/compare.cc
  5023f6c1a2d374e90adee1ec171efa98  libstdc++-v3/testsuite/20_util/to_chars/double.cc
  23ac211304a3685d878056005dca6369  libstdc++-v3/testsuite/20_util/to_chars/float.cc
! 5d2a72f0b0bb14657b7d750212e5d8b2  libstdc++-v3/testsuite/20_util/to_chars/long_double.cc
  b7f24939aa37c4de46e365ee2377af7f  libstdc++-v3/testsuite/20_util/to_chars/lwg3266.cc
  c750e67c3f3c2a58166a927c07e4c2bc  libstdc++-v3/testsuite/20_util/to_chars/requirements.cc
  05340145a7552fa3d7b9ef3667d9d88d  libstdc++-v3/testsuite/20_util/to_underlying/1.cc
--- 108330,108336 ----
  224c36f900afc5ec2ad272b606f5f8d6  libstdc++-v3/testsuite/20_util/to_chars/compare.cc
  5023f6c1a2d374e90adee1ec171efa98  libstdc++-v3/testsuite/20_util/to_chars/double.cc
  23ac211304a3685d878056005dca6369  libstdc++-v3/testsuite/20_util/to_chars/float.cc
! 2929c86a21f643fd66a85636ac25ece5  libstdc++-v3/testsuite/20_util/to_chars/long_double.cc
  b7f24939aa37c4de46e365ee2377af7f  libstdc++-v3/testsuite/20_util/to_chars/lwg3266.cc
  c750e67c3f3c2a58166a927c07e4c2bc  libstdc++-v3/testsuite/20_util/to_chars/requirements.cc
  05340145a7552fa3d7b9ef3667d9d88d  libstdc++-v3/testsuite/20_util/to_underlying/1.cc
*************** cbbdfb59b20fecf9c36e7976a7e7b591  libstd
*** 108141,108146 ****
--- 108356,108362 ----
  b63b11f3e0b7691716b7b97386098c37  libstdc++-v3/testsuite/20_util/tuple/comparison_operators/three_way.cc
  d23b1a747046dfeaadefce18d2c02b12  libstdc++-v3/testsuite/20_util/tuple/cons/101960.cc
  32c154912a091023741fdaa263538a86  libstdc++-v3/testsuite/20_util/tuple/cons/102270.cc
+ 9a6dc1f9548e126de2581231c632a19f  libstdc++-v3/testsuite/20_util/tuple/cons/114147.cc
  d61a2574bb2f78ba189fb3d3d976b60f  libstdc++-v3/testsuite/20_util/tuple/cons/41530.cc
  f73a0d86bc346a26b596c982337a6ee4  libstdc++-v3/testsuite/20_util/tuple/cons/44487.cc
  9a6caf96eceee35edd4509647bec7df7  libstdc++-v3/testsuite/20_util/tuple/cons/45228.cc
*************** bbb7e8d91361816c5b935b7d6be7171f  libstd
*** 108256,108262 ****
  c1cd4a3f6b5b59a88032dbf805303d25  libstdc++-v3/testsuite/20_util/unique_ptr/creation/array.cc
  826674ffd67673c076a869791f2541b6  libstdc++-v3/testsuite/20_util/unique_ptr/creation/array_neg.cc
  2792ef777902e600585d3d371995f27e  libstdc++-v3/testsuite/20_util/unique_ptr/creation/constexpr.cc
! 118eaf245c4bfe5b8fe9ec33499a7905  libstdc++-v3/testsuite/20_util/unique_ptr/creation/for_overwrite.cc
  1c0ba278f2dc6c12ee8e5ba060feac89  libstdc++-v3/testsuite/20_util/unique_ptr/creation/for_overwrite__neg.cc
  d8442bac5982eadab8ea3614c54314f1  libstdc++-v3/testsuite/20_util/unique_ptr/creation/single.cc
  885f41e25fd52834ab5f4aaedab6120b  libstdc++-v3/testsuite/20_util/unique_ptr/dr2228.cc
--- 108472,108478 ----
  c1cd4a3f6b5b59a88032dbf805303d25  libstdc++-v3/testsuite/20_util/unique_ptr/creation/array.cc
  826674ffd67673c076a869791f2541b6  libstdc++-v3/testsuite/20_util/unique_ptr/creation/array_neg.cc
  2792ef777902e600585d3d371995f27e  libstdc++-v3/testsuite/20_util/unique_ptr/creation/constexpr.cc
! 12b7fc295d7fd872918eece1b32ccf14  libstdc++-v3/testsuite/20_util/unique_ptr/creation/for_overwrite.cc
  1c0ba278f2dc6c12ee8e5ba060feac89  libstdc++-v3/testsuite/20_util/unique_ptr/creation/for_overwrite__neg.cc
  d8442bac5982eadab8ea3614c54314f1  libstdc++-v3/testsuite/20_util/unique_ptr/creation/single.cc
  885f41e25fd52834ab5f4aaedab6120b  libstdc++-v3/testsuite/20_util/unique_ptr/dr2228.cc
*************** f7d0f9129e0b14e1c3df4a90394eaa38  libstd
*** 108368,108381 ****
  47a30bf063796d65f2bb5f1e0d3bc7ac  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/1.cc
  e4b279a4f3b9abde058d6cb00a5c89ba  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/18654.cc
  f9a91331593aabe548c2fc0e48acb792  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/2.cc
! f3ba4193abdc2fa4d0bd35a950966823  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/resize_and_overwrite.cc
  21a08162c432ecd45acdcf71514da2a5  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/shrink_to_fit.cc
  6f776af274307bd76d3595e2bdead30e  libstdc++-v3/testsuite/21_strings/basic_string/capacity/wchar_t/1.cc
  710c93966d68c68a3e2b4606a1cd55ed  libstdc++-v3/testsuite/21_strings/basic_string/capacity/wchar_t/18654.cc
  5511ce6451d8fc11cd2177e28e767cdf  libstdc++-v3/testsuite/21_strings/basic_string/capacity/wchar_t/2.cc
  33fbb68611c0d2796a632eb756426ff8  libstdc++-v3/testsuite/21_strings/basic_string/capacity/wchar_t/shrink_to_fit.cc
  bc8bf776e5ee41c9814d26072b74f552  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/1.cc
! 408950d5673e5a28433457ba820da161  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/103919.cc
  be058c3faf15d6649e949b8b50bc53fb  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/105995.cc
  7cbb90b06fb23bfb46f181effd3fb1d1  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/2.cc
  c3f6121645f290dc77eaea7e494552e3  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/3.cc
--- 108584,108597 ----
  47a30bf063796d65f2bb5f1e0d3bc7ac  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/1.cc
  e4b279a4f3b9abde058d6cb00a5c89ba  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/18654.cc
  f9a91331593aabe548c2fc0e48acb792  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/2.cc
! 24a38889a74f6c2286556a1ea532a9ce  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/resize_and_overwrite.cc
  21a08162c432ecd45acdcf71514da2a5  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/shrink_to_fit.cc
  6f776af274307bd76d3595e2bdead30e  libstdc++-v3/testsuite/21_strings/basic_string/capacity/wchar_t/1.cc
  710c93966d68c68a3e2b4606a1cd55ed  libstdc++-v3/testsuite/21_strings/basic_string/capacity/wchar_t/18654.cc
  5511ce6451d8fc11cd2177e28e767cdf  libstdc++-v3/testsuite/21_strings/basic_string/capacity/wchar_t/2.cc
  33fbb68611c0d2796a632eb756426ff8  libstdc++-v3/testsuite/21_strings/basic_string/capacity/wchar_t/shrink_to_fit.cc
  bc8bf776e5ee41c9814d26072b74f552  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/1.cc
! 122070b73ab61f4cd7f3bf7dca05ad4c  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/103919.cc
  be058c3faf15d6649e949b8b50bc53fb  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/105995.cc
  7cbb90b06fb23bfb46f181effd3fb1d1  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/2.cc
  c3f6121645f290dc77eaea7e494552e3  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/3.cc
*************** b11d0df57f224d847aa3d0cb18f8f4bb  libstd
*** 108627,108638 ****
  3be6aa269cbd95b653b6ea8205b19c8d  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/3.cc
  8a5aedc5a351256b6af8b9d145c6def8  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/nonnull.cc
  0b6a2443178aa75da3ceb62696d49e66  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/range.cc
! dd73b87ff09b692a47a9f72f5fdfbea7  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/range_c++20.cc
  eb0cd7f4dc47b332e4b989164dbf3596  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/1.cc
  19abc9659deed856b266404089b4a97f  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/2.cc
  40bb94b540026ddf7f8657de7554ab2d  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/3.cc
  e26edf9d921a7ba6d7d719a5e60bd472  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/nonnull.cc
! 70c18cee988dbc78964b72ba9c7b52a1  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/range_c++20.cc
  33a72c1b879b7f225bab2d6798ba53df  libstdc++-v3/testsuite/21_strings/basic_string_view/element_access/char/1.cc
  82d6917465a3bdbb78d67ae494174910  libstdc++-v3/testsuite/21_strings/basic_string_view/element_access/char/2.cc
  f51217ab4eda42699b30463d9c64760f  libstdc++-v3/testsuite/21_strings/basic_string_view/element_access/char/back_constexpr_neg.cc
--- 108843,108854 ----
  3be6aa269cbd95b653b6ea8205b19c8d  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/3.cc
  8a5aedc5a351256b6af8b9d145c6def8  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/nonnull.cc
  0b6a2443178aa75da3ceb62696d49e66  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/range.cc
! 7c9f4e5f6fe5fbf99f7f9c2761e884f1  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/range_c++20.cc
  eb0cd7f4dc47b332e4b989164dbf3596  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/1.cc
  19abc9659deed856b266404089b4a97f  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/2.cc
  40bb94b540026ddf7f8657de7554ab2d  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/3.cc
  e26edf9d921a7ba6d7d719a5e60bd472  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/nonnull.cc
! 703dc662683b3d60ac586848b8ce6cc6  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/range_c++20.cc
  33a72c1b879b7f225bab2d6798ba53df  libstdc++-v3/testsuite/21_strings/basic_string_view/element_access/char/1.cc
  82d6917465a3bdbb78d67ae494174910  libstdc++-v3/testsuite/21_strings/basic_string_view/element_access/char/2.cc
  f51217ab4eda42699b30463d9c64760f  libstdc++-v3/testsuite/21_strings/basic_string_view/element_access/char/back_constexpr_neg.cc
*************** cc2f020563c3847b68e798d098126ab4  libstd
*** 108664,108671 ****
--- 108880,108889 ----
  c49dc63272bc485aa7a87cfc078d3242  libstdc++-v3/testsuite/21_strings/basic_string_view/literals/values-char8_t.cc
  7e6023e76cf2d41e8d67c2521c34f0b1  libstdc++-v3/testsuite/21_strings/basic_string_view/literals/values.cc
  ce32a948987ee0257f6c1c20759ae9ba  libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_prefix/char/1.cc
+ be3b65e8d28ffd0b6c071ad71ef5662a  libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_prefix/debug.cc
  64971260c3c99f4bf03ef94b5547589b  libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_prefix/wchar_t/1.cc
  e83ee45f270b4b9df21249b1f4d6d528  libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_suffix/char/1.cc
+ ef869b073577745bda077a76ccf586b4  libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_suffix/debug.cc
  6b382b94f0a3a85d2b7a04ebb5c95d80  libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_suffix/wchar_t/1.cc
  29069c42f8ea2f8510d54827fb9ea605  libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/swap/char/1.cc
  c212a698edf0c7104ba92da18834aece  libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/swap/wchar_t/1.cc
*************** cbe8dd34cb38d056b20592fe96d50940  libstd
*** 108731,108737 ****
  315e59bf71624bfddd1704955e8f5026  libstdc++-v3/testsuite/21_strings/basic_string_view/requirements/traits_neg.cc
  58947d8735c23b82574427ce2851e965  libstdc++-v3/testsuite/21_strings/basic_string_view/requirements/trivially_copyable.cc
  aa743a3bf573499c0785c35cd42e85fb  libstdc++-v3/testsuite/21_strings/basic_string_view/requirements/typedefs.cc
! 847f86350f5eac76fe17cd432a64f4a5  libstdc++-v3/testsuite/21_strings/basic_string_view/typedefs.cc
  2d9e8d751d3e458bf070d211d6afef49  libstdc++-v3/testsuite/21_strings/basic_string_view/types/1.cc
  b5684c275c956cee9f797a9f3ad5626a  libstdc++-v3/testsuite/21_strings/c_strings/char/1.cc
  f9218ebcfbd2487131e1696c75a12702  libstdc++-v3/testsuite/21_strings/c_strings/char/2.cc
--- 108949,108955 ----
  315e59bf71624bfddd1704955e8f5026  libstdc++-v3/testsuite/21_strings/basic_string_view/requirements/traits_neg.cc
  58947d8735c23b82574427ce2851e965  libstdc++-v3/testsuite/21_strings/basic_string_view/requirements/trivially_copyable.cc
  aa743a3bf573499c0785c35cd42e85fb  libstdc++-v3/testsuite/21_strings/basic_string_view/requirements/typedefs.cc
! f933df0db3751fab21097de7b0fdf3b8  libstdc++-v3/testsuite/21_strings/basic_string_view/typedefs.cc
  2d9e8d751d3e458bf070d211d6afef49  libstdc++-v3/testsuite/21_strings/basic_string_view/types/1.cc
  b5684c275c956cee9f797a9f3ad5626a  libstdc++-v3/testsuite/21_strings/c_strings/char/1.cc
  f9218ebcfbd2487131e1696c75a12702  libstdc++-v3/testsuite/21_strings/c_strings/char/2.cc
*************** b585a1bbf03dd84e79127526e05b6b7a  libstd
*** 108741,108746 ****
--- 108959,108965 ----
  f93ec43aa4dd8a420a7ece2440e0666b  libstdc++-v3/testsuite/21_strings/c_strings/wchar_t/2.cc
  22bfc5ed265e4143ba00dd09c45ce88e  libstdc++-v3/testsuite/21_strings/c_strings/wchar_t/24559.cc
  2ec63f6752702d324bcea6556ae1bfe5  libstdc++-v3/testsuite/21_strings/c_strings/wchar_t/3_neg.cc
+ 82d6b4f00580779800e341ec6c9ffaea  libstdc++-v3/testsuite/21_strings/char_traits/requirements/113200.cc
  2b5c3fe3f4e29007d663c0c64a31ec6b  libstdc++-v3/testsuite/21_strings/char_traits/requirements/char/1.cc
  6ba9605ad5b8901d814b619f3e486a3c  libstdc++-v3/testsuite/21_strings/char_traits/requirements/char/57704.cc
  6ca3d966dbea1443e11d0455e8b8a6bd  libstdc++-v3/testsuite/21_strings/char_traits/requirements/char/65049.cc
*************** a8e6b7213cb563f803aabba9861cd5c1  libstd
*** 108799,108804 ****
--- 109018,109026 ----
  d852212d2ead3d526429dcef2df15959  libstdc++-v3/testsuite/22_locale/codecvt/char16_t.cc
  2178238c43cb9063edb4480912809fdb  libstdc++-v3/testsuite/22_locale/codecvt/char32_t-char8_t.cc
  03932ee68bfe475d06d1cf860be50b52  libstdc++-v3/testsuite/22_locale/codecvt/char32_t.cc
+ 39e115ce2884a387df120350fd0ad60b  libstdc++-v3/testsuite/22_locale/codecvt/codecvt_unicode.cc
+ ed6edab6f59b87234fc2bae1fe8db3cb  libstdc++-v3/testsuite/22_locale/codecvt/codecvt_unicode.h
+ a7a3af87e049ad325f7701ed518dcdee  libstdc++-v3/testsuite/22_locale/codecvt/codecvt_unicode_wchar_t.cc
  176b52905d389a9d85a771637808db33  libstdc++-v3/testsuite/22_locale/codecvt/codecvt_utf16/66417.cc
  18d58fc402135cc84f5023d5b9344936  libstdc++-v3/testsuite/22_locale/codecvt/codecvt_utf16/79980.cc
  e604ead22a0915a67aca53d9e6c88142  libstdc++-v3/testsuite/22_locale/codecvt/codecvt_utf16/80041.cc
*************** bd280f3ea3e5d9abf50dd2d5c3c1ea42  libstd
*** 109418,109423 ****
--- 109640,109647 ----
  32ac54909221492a28e633b359888c7c  libstdc++-v3/testsuite/23_containers/array/cons/deduction.cc
  e7020060d3f451aafff35f4f5f1c45ed  libstdc++-v3/testsuite/23_containers/array/cons/deduction_neg.cc
  a0a4fd0ebb58bd078933f95239938034  libstdc++-v3/testsuite/23_containers/array/creation/1.cc
+ 29863c1177013eb82c96ce1e6df02aea  libstdc++-v3/testsuite/23_containers/array/creation/110167.cc
+ c33e3cf546fa87ee1cf2a1313c16655a  libstdc++-v3/testsuite/23_containers/array/creation/111512.cc
  aa17ba9d9b09772b44a183382127ba06  libstdc++-v3/testsuite/23_containers/array/creation/2.cc
  3c3b42932a234b65502e903d67e8f2d8  libstdc++-v3/testsuite/23_containers/array/creation/3_neg.cc
  fe745a295fadf30b545b3d8d16e52a34  libstdc++-v3/testsuite/23_containers/array/debug/back1_neg.cc
*************** e8114d1769d117c368830eb0c7e39b1e  libstd
*** 109554,109562 ****
  ae8b2280d05e29df06d36c98cdb105da  libstdc++-v3/testsuite/23_containers/deque/erasure.cc
  49570c8f2526d4bcac96113389bcbe2f  libstdc++-v3/testsuite/23_containers/deque/init-list.cc
  9d5278f518894accc9b8e1dc3c4dbbd2  libstdc++-v3/testsuite/23_containers/deque/modifiers/assign/1.cc
! 0034f5fd400c9cbb1bb7d78b34c39420  libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/52799.cc
  1aa01e2edef2f76f4833d0c90ecd0014  libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/92878_92947.cc
- 06aba31d0af36c463b4d0a9939af86fc  libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/const_iterator.cc
  f3045ecf6b8921fc4cdc9c92900777f3  libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/cxx17_return.cc
  2c76f139cc33a06edc7644f522965188  libstdc++-v3/testsuite/23_containers/deque/modifiers/erase/1.cc
  6b3511627daf465cc60fc8d69615cd04  libstdc++-v3/testsuite/23_containers/deque/modifiers/erase/2.cc
--- 109778,109785 ----
  ae8b2280d05e29df06d36c98cdb105da  libstdc++-v3/testsuite/23_containers/deque/erasure.cc
  49570c8f2526d4bcac96113389bcbe2f  libstdc++-v3/testsuite/23_containers/deque/init-list.cc
  9d5278f518894accc9b8e1dc3c4dbbd2  libstdc++-v3/testsuite/23_containers/deque/modifiers/assign/1.cc
! 5b30438ec704fa2989c2780d4b7988b0  libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/1.cc
  1aa01e2edef2f76f4833d0c90ecd0014  libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/92878_92947.cc
  f3045ecf6b8921fc4cdc9c92900777f3  libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/cxx17_return.cc
  2c76f139cc33a06edc7644f522965188  libstdc++-v3/testsuite/23_containers/deque/modifiers/erase/1.cc
  6b3511627daf465cc60fc8d69615cd04  libstdc++-v3/testsuite/23_containers/deque/modifiers/erase/2.cc
*************** d71acc9fb4c70a3d2e4a6b65aa0f8300  libstd
*** 109803,109811 ****
  d25b6635b03255d71ed5c110eb9027b7  libstdc++-v3/testsuite/23_containers/list/modifiers/3.h
  8afee581c66a68b2f94906125016a858  libstdc++-v3/testsuite/23_containers/list/modifiers/addressof.cc
  92e3a603af90854c437499ef9b831a26  libstdc++-v3/testsuite/23_containers/list/modifiers/assign/1.cc
! 40e1a1753586a34c905bfb2d8eb0eb82  libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/52799.cc
  12c057db25765d5edb053a225d78c40f  libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/92878_92947.cc
- 81639ee17c309ead699ddcc9cdb22b14  libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/const_iterator.cc
  7152d3ca1891e71f501363f1b22e014b  libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/cxx17_return.cc
  13115fde4dfda8892f0fa9a8fb8ba354  libstdc++-v3/testsuite/23_containers/list/modifiers/erase/54577.cc
  df75c73238ff2c8a2da1f50a46746bda  libstdc++-v3/testsuite/23_containers/list/modifiers/insert/25288.cc
--- 110026,110033 ----
  d25b6635b03255d71ed5c110eb9027b7  libstdc++-v3/testsuite/23_containers/list/modifiers/3.h
  8afee581c66a68b2f94906125016a858  libstdc++-v3/testsuite/23_containers/list/modifiers/addressof.cc
  92e3a603af90854c437499ef9b831a26  libstdc++-v3/testsuite/23_containers/list/modifiers/assign/1.cc
! c25b0a9dc317b9f58288d8f92299007f  libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/1.cc
  12c057db25765d5edb053a225d78c40f  libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/92878_92947.cc
  7152d3ca1891e71f501363f1b22e014b  libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/cxx17_return.cc
  13115fde4dfda8892f0fa9a8fb8ba354  libstdc++-v3/testsuite/23_containers/list/modifiers/erase/54577.cc
  df75c73238ff2c8a2da1f50a46746bda  libstdc++-v3/testsuite/23_containers/list/modifiers/insert/25288.cc
*************** ccff29b520f9850a776c70074e8ea654  libstd
*** 109909,109915 ****
  8642b25c59832140c46994b559a3d1a8  libstdc++-v3/testsuite/23_containers/map/modifiers/108554.cc
  a2fa5a1d057fba63d0586996fd4e5f8b  libstdc++-v3/testsuite/23_containers/map/modifiers/dr130.cc
  190ea7e44e5f498d530d5f384460db60  libstdc++-v3/testsuite/23_containers/map/modifiers/emplace/1.cc
! 65c93864ca531a2dafefb20331b9de6e  libstdc++-v3/testsuite/23_containers/map/modifiers/emplace/92300.cc
  31f967a5bb275aefe7af35363b1a2390  libstdc++-v3/testsuite/23_containers/map/modifiers/emplace/92878_92947.cc
  10c03d16c56c505b0d533a0231f9e320  libstdc++-v3/testsuite/23_containers/map/modifiers/erase/47628.cc
  0abbd71a92f9993b46c8436b5fd00e90  libstdc++-v3/testsuite/23_containers/map/modifiers/erase/51142.cc
--- 110131,110137 ----
  8642b25c59832140c46994b559a3d1a8  libstdc++-v3/testsuite/23_containers/map/modifiers/108554.cc
  a2fa5a1d057fba63d0586996fd4e5f8b  libstdc++-v3/testsuite/23_containers/map/modifiers/dr130.cc
  190ea7e44e5f498d530d5f384460db60  libstdc++-v3/testsuite/23_containers/map/modifiers/emplace/1.cc
! 205086c15a257b2b3847ce68833198f5  libstdc++-v3/testsuite/23_containers/map/modifiers/emplace/92300.cc
  31f967a5bb275aefe7af35363b1a2390  libstdc++-v3/testsuite/23_containers/map/modifiers/emplace/92878_92947.cc
  10c03d16c56c505b0d533a0231f9e320  libstdc++-v3/testsuite/23_containers/map/modifiers/erase/47628.cc
  0abbd71a92f9993b46c8436b5fd00e90  libstdc++-v3/testsuite/23_containers/map/modifiers/erase/51142.cc
*************** bce5590dc4177d3794bcbc8141dc49c1  libstd
*** 109926,109932 ****
  16ee8a55b9ef14176dff7dd15960bce5  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/78595.cc
  c423b3f9feda6d2258e89ab2d974ead8  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/83226.cc
  08d4c52d7b974928c7bf742b835f3474  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/87194.cc
! 0c90bbb89e71d8600d1700a29a8e6b52  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/92300.cc
  d9943e9761bc07a076f479c9b32f9c3b  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/dr2354.cc
  d97a111c9e7b7487c26b2157acbaeaa9  libstdc++-v3/testsuite/23_containers/map/modifiers/insert_or_assign/1.cc
  eebc3dd165121b6a55acfd197e30b097  libstdc++-v3/testsuite/23_containers/map/modifiers/merge.cc
--- 110148,110154 ----
  16ee8a55b9ef14176dff7dd15960bce5  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/78595.cc
  c423b3f9feda6d2258e89ab2d974ead8  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/83226.cc
  08d4c52d7b974928c7bf742b835f3474  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/87194.cc
! bf1079f7dbecd612e1c7ff8cc0558abc  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/92300.cc
  d9943e9761bc07a076f479c9b32f9c3b  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/dr2354.cc
  d97a111c9e7b7487c26b2157acbaeaa9  libstdc++-v3/testsuite/23_containers/map/modifiers/insert_or_assign/1.cc
  eebc3dd165121b6a55acfd197e30b097  libstdc++-v3/testsuite/23_containers/map/modifiers/merge.cc
*************** b90033bf134172fa5857680599d4fb43  libstd
*** 110070,110075 ****
--- 110292,110298 ----
  1f2057626117ba0f2fef313ab9121fa9  libstdc++-v3/testsuite/23_containers/multiset/debug/move_assign_neg.cc
  8c45857d459b7057a803a299991cac30  libstdc++-v3/testsuite/23_containers/multiset/debug/move_neg.cc
  1bdeadc0b50cc91e2151afcdb2371adf  libstdc++-v3/testsuite/23_containers/multiset/init-list.cc
+ b761d5230bf4935944006f713e5604d5  libstdc++-v3/testsuite/23_containers/multiset/modifiers/114401.cc
  4c36e202d6abd8306550ce348e12b0cd  libstdc++-v3/testsuite/23_containers/multiset/modifiers/dr130.cc
  cea6cf805e4009657d1c4634153f8ce3  libstdc++-v3/testsuite/23_containers/multiset/modifiers/emplace/1.cc
  04dd6410ae9c4467847c20d2676d0459  libstdc++-v3/testsuite/23_containers/multiset/modifiers/emplace/92878_92947.cc
*************** a97381ea5bd9d71f1b2acb4fac3c8d3a  libstd
*** 110182,110187 ****
--- 110405,110411 ----
  eec660a30623e93c2c265aa52e826178  libstdc++-v3/testsuite/23_containers/set/debug/move_neg.cc
  dbf252bf31115b88d0ea72c000bb9105  libstdc++-v3/testsuite/23_containers/set/erasure.cc
  4378e383c4836188ab85292183733169  libstdc++-v3/testsuite/23_containers/set/init-list.cc
+ 600f3a07c5d12def9ca643094daf86cd  libstdc++-v3/testsuite/23_containers/set/modifiers/114401.cc
  ca83c2cd9ba50771210d79b9e9e26a9b  libstdc++-v3/testsuite/23_containers/set/modifiers/16728.cc
  56efde33fea333b0aafe8a6d145a9d1a  libstdc++-v3/testsuite/23_containers/set/modifiers/17948.cc
  9bf1d5e6b5c7ccdbe887e1aa22a6188d  libstdc++-v3/testsuite/23_containers/set/modifiers/dr130.cc
*************** f4993e60c966cbd7b7c00a8a0fa6a17b  libstd
*** 110345,110351 ****
  1e14e83ef4746bb9169430b1d5bd9a5a  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/emplace.cc
  b827d771e02de1a1f930ec7e5c7b6765  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/extract.cc
  5c0c1ad89698c2805855fb0b70d10e6b  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/insert_or_assign.cc
! cab517ef1ca869f351a0cdd1cca03942  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/merge.cc
  c9846991c4ca0ce97b56c75dcce0fe88  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/move_assign.cc
  c31ead35490503b9cd3ca60543467c49  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/reserve.cc
  5510fa6dbcd62dde70eb4fd314d91179  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/try_emplace.cc
--- 110569,110575 ----
  1e14e83ef4746bb9169430b1d5bd9a5a  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/emplace.cc
  b827d771e02de1a1f930ec7e5c7b6765  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/extract.cc
  5c0c1ad89698c2805855fb0b70d10e6b  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/insert_or_assign.cc
! 1f5077bbd2eb2b7952076000e8783b81  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/merge.cc
  c9846991c4ca0ce97b56c75dcce0fe88  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/move_assign.cc
  c31ead35490503b9cd3ca60543467c49  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/reserve.cc
  5510fa6dbcd62dde70eb4fd314d91179  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/try_emplace.cc
*************** e4f8f761815549c9655a1afa85c84621  libstd
*** 110535,110540 ****
--- 110759,110765 ----
  2cbb0afd915083a5cabafa50f998d5c8  libstdc++-v3/testsuite/23_containers/unordered_multiset/insert/multiset_range.cc
  25f6641c9b65591cfe0b8858e7b910b5  libstdc++-v3/testsuite/23_containers/unordered_multiset/insert/multiset_single.cc
  c35b057960b073e57577f894c93abd5c  libstdc++-v3/testsuite/23_containers/unordered_multiset/insert/multiset_single_move.cc
+ 81ce776a3ac75fcc704e7f3efc65de81  libstdc++-v3/testsuite/23_containers/unordered_multiset/modifiers/114401.cc
  1031b470e6127a252d2adced81d5dede  libstdc++-v3/testsuite/23_containers/unordered_multiset/modifiers/92878_92947.cc
  1d40b8f180c16337816a13e75181ed5e  libstdc++-v3/testsuite/23_containers/unordered_multiset/modifiers/emplace.cc
  6f1ad8e9a94be3b78fe3ef0ae9684c3d  libstdc++-v3/testsuite/23_containers/unordered_multiset/modifiers/extract.cc
*************** e0ca5e830e5b0abcf4f1b25b0e3cbeb1  libstd
*** 110645,110650 ****
--- 110870,110876 ----
  1a609ba18ef8455b0e135d1b507af9db  libstdc++-v3/testsuite/23_containers/unordered_set/insert/set_single_move.cc
  fc3c05a0cfa119fb13c4bf775be7275b  libstdc++-v3/testsuite/23_containers/unordered_set/instantiation_neg.cc
  6b84d3217cde41a522d1df444f814a43  libstdc++-v3/testsuite/23_containers/unordered_set/max_load_factor/robustness.cc
+ 48b51763d3c882761e49bc54aa3174c2  libstdc++-v3/testsuite/23_containers/unordered_set/modifiers/114401.cc
  f672c3621e6e83f276d79caf6b626a78  libstdc++-v3/testsuite/23_containers/unordered_set/modifiers/92878_92947.cc
  5ac8bb8d2bd7f9f285567564f37af02a  libstdc++-v3/testsuite/23_containers/unordered_set/modifiers/emplace.cc
  53d7181bce16ac21267b0b21427167b3  libstdc++-v3/testsuite/23_containers/unordered_set/modifiers/extract.cc
*************** f7e44bc5605d8dbaecbe9449d6f1ab65  libstd
*** 110784,110789 ****
--- 111010,111016 ----
  539f8a7a20b33d9116aa9937776fc40f  libstdc++-v3/testsuite/23_containers/vector/cons/cons_size.cc
  1ce2272844a9da337ee743c345bec85b  libstdc++-v3/testsuite/23_containers/vector/cons/constexpr.cc
  3bd45daa102290f1176d8405d7221143  libstdc++-v3/testsuite/23_containers/vector/cons/deduction.cc
+ 7a66bf7f5aca27ddc8ca203f2f55a9b6  libstdc++-v3/testsuite/23_containers/vector/cons/destroy-adl.cc
  aba23da2c50408d320fee5821caad013  libstdc++-v3/testsuite/23_containers/vector/cons/destructible_debug_neg.cc
  19f1c44c76dfb817df55800d837fa674  libstdc++-v3/testsuite/23_containers/vector/cons/destructible_neg.cc
  55550ae8dde510aa5f780945c50e0dc9  libstdc++-v3/testsuite/23_containers/vector/cons/moveable.cc
*************** eb2f20a71817b36711028ec1d3cb0cbb  libstd
*** 110846,110854 ****
  bd11fcf10b79647f8bc55f1d9471d13b  libstdc++-v3/testsuite/23_containers/vector/modifiers/assign/1.cc
  3922aaba2a433c66301ae0e55030a827  libstdc++-v3/testsuite/23_containers/vector/modifiers/assign/constexpr.cc
  79f9958e484b07409ba222ba2faa32b4  libstdc++-v3/testsuite/23_containers/vector/modifiers/constexpr.cc
! f0aa5bc2e6c7fda928a4a6e20b362e14  libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/52799.cc
  75a5828dd1b791afd1e1e337538dde58  libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/92878_92947.cc
- 7ebe0a00c3c6232cfa8e3d1d2c4d17fb  libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/const_iterator.cc
  2fd4bdf2964fcd6ec69e53c3ca4904ec  libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/cxx17_return.cc
  265d83f0b170d2bdd58bbdf30702028f  libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/self_emplace.cc
  0e0e6bf0f542ece2df9f9251623e336d  libstdc++-v3/testsuite/23_containers/vector/modifiers/erase/1.cc
--- 111073,111080 ----
  bd11fcf10b79647f8bc55f1d9471d13b  libstdc++-v3/testsuite/23_containers/vector/modifiers/assign/1.cc
  3922aaba2a433c66301ae0e55030a827  libstdc++-v3/testsuite/23_containers/vector/modifiers/assign/constexpr.cc
  79f9958e484b07409ba222ba2faa32b4  libstdc++-v3/testsuite/23_containers/vector/modifiers/constexpr.cc
! 00bc8fb19959079360f78f326f302b5b  libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/1.cc
  75a5828dd1b791afd1e1e337538dde58  libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/92878_92947.cc
  2fd4bdf2964fcd6ec69e53c3ca4904ec  libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/cxx17_return.cc
  265d83f0b170d2bdd58bbdf30702028f  libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/self_emplace.cc
  0e0e6bf0f542ece2df9f9251623e336d  libstdc++-v3/testsuite/23_containers/vector/modifiers/erase/1.cc
*************** d84b529a40c757abd3524ccd17747a1f  libstd
*** 110931,110939 ****
  055fe071dfe8afc4f0581e1704f688fe  libstdc++-v3/testsuite/24_iterators/front_insert_iterator/requirements/container.cc
  a8e15dd63097f29796c8e6d35e4fb176  libstdc++-v3/testsuite/24_iterators/front_insert_iterator/requirements/explicit_instantiation.cc
  1daa51ed33cd59caf57ef78ccc1e5f89  libstdc++-v3/testsuite/24_iterators/front_insert_iterator/requirements/typedefs.cc
! b35864c07a0d2473c948d6b42631346b  libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++11.cc
! 8f9dccdcc7e1170d21beb50e5c614c11  libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++14.cc
! 03ae70d18cc77b5d803349deef0eee0a  libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++17.cc
  b7f81759f38c65b81a7106df73b052e6  libstdc++-v3/testsuite/24_iterators/headers/iterator/synopsis.cc
  437f58978002d1f6b31ac5fba75c9f23  libstdc++-v3/testsuite/24_iterators/headers/iterator/synopsis_c++11.cc
  f58ea44951638f75d41550335c618cd3  libstdc++-v3/testsuite/24_iterators/headers/iterator/synopsis_c++14.cc
--- 111157,111165 ----
  055fe071dfe8afc4f0581e1704f688fe  libstdc++-v3/testsuite/24_iterators/front_insert_iterator/requirements/container.cc
  a8e15dd63097f29796c8e6d35e4fb176  libstdc++-v3/testsuite/24_iterators/front_insert_iterator/requirements/explicit_instantiation.cc
  1daa51ed33cd59caf57ef78ccc1e5f89  libstdc++-v3/testsuite/24_iterators/front_insert_iterator/requirements/typedefs.cc
! 5a82c44ff6e4705b25d9dc8ba83d7149  libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++11.cc
! 6710ae4aae91807beed3b0ba53c8c4ce  libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++14.cc
! 1be51655130165b686fff09bc94870a4  libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++17.cc
  b7f81759f38c65b81a7106df73b052e6  libstdc++-v3/testsuite/24_iterators/headers/iterator/synopsis.cc
  437f58978002d1f6b31ac5fba75c9f23  libstdc++-v3/testsuite/24_iterators/headers/iterator/synopsis_c++11.cc
  f58ea44951638f75d41550335c618cd3  libstdc++-v3/testsuite/24_iterators/headers/iterator/synopsis_c++14.cc
*************** afbf134e563d12a5fdee23b5ba7b39d3  libstd
*** 110941,110946 ****
--- 111167,111173 ----
  01d084dbad05a1a482e18cecd2d4debd  libstdc++-v3/testsuite/24_iterators/headers/iterator/synopsis_c++20.cc
  1dcb96ff6a51bd7f0490d0c5d9732d4c  libstdc++-v3/testsuite/24_iterators/headers/iterator/types_std.cc
  f254b1c37f106eebc5bc55470ab224a9  libstdc++-v3/testsuite/24_iterators/indirect_callable/92894.cc
+ 6293c732540e05cda90f807f444b0120  libstdc++-v3/testsuite/24_iterators/indirect_callable/projected-adl.cc
  a4e27d523d01f0ad52fccda597bb1d05  libstdc++-v3/testsuite/24_iterators/indirect_callable/projected.cc
  a2e77fb2cdc3c2ea904787cd683ae6a1  libstdc++-v3/testsuite/24_iterators/input/concept.cc
  8bdd4ba8221b12e6ff2107b4d22dea1c  libstdc++-v3/testsuite/24_iterators/input/tag.cc
*************** e2776c4264f0886c90f5b2c3f53468b5  libstd
*** 110954,110960 ****
  b279b61963a1d2e6eec75dbce52bd7b3  libstdc++-v3/testsuite/24_iterators/istream_iterator/1.cc
  c62bf745fc97788888e1f31ef115a26f  libstdc++-v3/testsuite/24_iterators/istream_iterator/2.cc
  eaa85a1f451f792d507caed4f5c6b298  libstdc++-v3/testsuite/24_iterators/istream_iterator/70766.cc
! 9e4c847bd9730f86a57df5ea430391e8  libstdc++-v3/testsuite/24_iterators/istream_iterator/cons/constexpr.cc
  8f4d1f0e10990bba5c4f9cbaeac79d02  libstdc++-v3/testsuite/24_iterators/istream_iterator/cons/sentinel.cc
  bb76c4afa6ebba73115fae68df6ed0e7  libstdc++-v3/testsuite/24_iterators/istream_iterator/requirements/base_classes.cc
  b6791eb89d7b366b6e8afc9da446020c  libstdc++-v3/testsuite/24_iterators/istream_iterator/requirements/explicit_instantiation.cc
--- 111181,111187 ----
  b279b61963a1d2e6eec75dbce52bd7b3  libstdc++-v3/testsuite/24_iterators/istream_iterator/1.cc
  c62bf745fc97788888e1f31ef115a26f  libstdc++-v3/testsuite/24_iterators/istream_iterator/2.cc
  eaa85a1f451f792d507caed4f5c6b298  libstdc++-v3/testsuite/24_iterators/istream_iterator/70766.cc
! 6faca5bf9636ccd27cfd5addc5de4960  libstdc++-v3/testsuite/24_iterators/istream_iterator/cons/constexpr.cc
  8f4d1f0e10990bba5c4f9cbaeac79d02  libstdc++-v3/testsuite/24_iterators/istream_iterator/cons/sentinel.cc
  bb76c4afa6ebba73115fae68df6ed0e7  libstdc++-v3/testsuite/24_iterators/istream_iterator/requirements/base_classes.cc
  b6791eb89d7b366b6e8afc9da446020c  libstdc++-v3/testsuite/24_iterators/istream_iterator/requirements/explicit_instantiation.cc
*************** e2367337bb98389a3471640f1b6e863d  libstd
*** 111089,111094 ****
--- 111316,111322 ----
  62f31809d63048366621060ff715781f  libstdc++-v3/testsuite/25_algorithms/clamp/requirements/explicit_instantiation/pod.cc
  b3550a8684d4888ff5c2e243087f628d  libstdc++-v3/testsuite/25_algorithms/constexpr_macro.cc
  177cabfe6b30523bd1d1463d013f00b1  libstdc++-v3/testsuite/25_algorithms/copy/1.cc
+ ab3dc855e72ee51df3a966a7fda86fc5  libstdc++-v3/testsuite/25_algorithms/copy/108846.cc
  01e966f44ac05073030b3ec0f2b362fa  libstdc++-v3/testsuite/25_algorithms/copy/2.cc
  8bf89af26b056de869043ec9426b2d40  libstdc++-v3/testsuite/25_algorithms/copy/3.cc
  841b22dcfcbdba02c358cf74d8bbb302  libstdc++-v3/testsuite/25_algorithms/copy/34595.cc
*************** d7ee23f823ccdda9564597c9865cb166  libstd
*** 111125,111130 ****
--- 111353,111359 ----
  aa156cf9079c8e62d301d2af1dbf197b  libstdc++-v3/testsuite/25_algorithms/copy/streambuf_iterators/wchar_t/2.cc
  c70aabf1b3087a6a7ed829d3143674d9  libstdc++-v3/testsuite/25_algorithms/copy/streambuf_iterators/wchar_t/3.cc
  8b592f8727d345917b4612cd259d628b  libstdc++-v3/testsuite/25_algorithms/copy/streambuf_iterators/wchar_t/4.cc
+ bb0e824b90574124bc4bf32ff7dc510b  libstdc++-v3/testsuite/25_algorithms/copy_backward/108846.cc
  cee1930285898de61a4be2751f2aeb4f  libstdc++-v3/testsuite/25_algorithms/copy_backward/94013.cc
  1ab4159ef3b8b8cb55039235bdaa1e78  libstdc++-v3/testsuite/25_algorithms/copy_backward/95578.cc
  e03dbfa91278f6ec6f1557e001b7b025  libstdc++-v3/testsuite/25_algorithms/copy_backward/constexpr.cc
*************** e5bed8e20df3fad20f903e7537508e3a  libstd
*** 111145,111150 ****
--- 111374,111380 ----
  3349ddaea4c2f3defa34e3ee7e617bbd  libstdc++-v3/testsuite/25_algorithms/copy_if/requirements/explicit_instantiation/2.cc
  95589e4d187aff3fd4e2dbc6bf632a2b  libstdc++-v3/testsuite/25_algorithms/copy_if/requirements/explicit_instantiation/pod.cc
  a3e7222df69ad45f94c26a42c43f2335  libstdc++-v3/testsuite/25_algorithms/copy_n/1.cc
+ 1e20df47bf8b9c2d7325fca62a0f583e  libstdc++-v3/testsuite/25_algorithms/copy_n/108846.cc
  60133f910aec11850b64fdbb10c453bd  libstdc++-v3/testsuite/25_algorithms/copy_n/2.cc
  0911dc705b29d38aea911a8c45926855  libstdc++-v3/testsuite/25_algorithms/copy_n/3.cc
  bca0b6a846c7a12d3a8a06eb7cee0a11  libstdc++-v3/testsuite/25_algorithms/copy_n/4.cc
*************** e9930b44233507ccddf2b50440579c55  libstd
*** 111371,111376 ****
--- 111601,111607 ----
  0340568de491299dc209b19d24097878  libstdc++-v3/testsuite/25_algorithms/lexicographical_compare/requirements/explicit_instantiation/pod.cc
  b84123300f318db795b4127821d5ceef  libstdc++-v3/testsuite/25_algorithms/lexicographical_compare/uchar.cc
  2bfaa67426aa29acae3e6aef04e0478e  libstdc++-v3/testsuite/25_algorithms/lexicographical_compare_three_way/1.cc
+ fda158d264fd98a45243c1135a92fa52  libstdc++-v3/testsuite/25_algorithms/lexicographical_compare_three_way/113960.cc
  b581325610de818749534c0d46aa3ce1  libstdc++-v3/testsuite/25_algorithms/lexicographical_compare_three_way/constexpr.cc
  d8ab00fb36581eefbd51c9ce173c1dc2  libstdc++-v3/testsuite/25_algorithms/lower_bound/1.cc
  3a4f9b5436955304a5ea1cf3d186618f  libstdc++-v3/testsuite/25_algorithms/lower_bound/2.cc
*************** e3353433ba9e10f9f12ef9f1a56a2233  libstd
*** 111458,111463 ****
--- 111689,111695 ----
  905fa5a20f2f6d4cd5968d4412484769  libstdc++-v3/testsuite/25_algorithms/mismatch/constexpr.cc
  559baff14ba095ad0c40317946ecdef6  libstdc++-v3/testsuite/25_algorithms/mismatch/constrained.cc
  3947a31b1187dd211ddfcfb8ec9afa9f  libstdc++-v3/testsuite/25_algorithms/move/1.cc
+ 4ae907818586f505a2d4d108b85aff1d  libstdc++-v3/testsuite/25_algorithms/move/108846.cc
  216d61467a92f257d9bb6c8b6e483530  libstdc++-v3/testsuite/25_algorithms/move/69478.cc
  77435b71473117ed98d79dc854e89466  libstdc++-v3/testsuite/25_algorithms/move/93872.cc
  c29e4b7047b8296e74cbaf898bc2b7f5  libstdc++-v3/testsuite/25_algorithms/move/94013.cc
*************** c41fedc68e3cee79d652221a1c6b2c9a  libstd
*** 111469,111474 ****
--- 111701,111707 ----
  a96504c7196ca10e6855d5546f616be9  libstdc++-v3/testsuite/25_algorithms/move/requirements/explicit_instantiation/2.cc
  cb5598cc3525c0016ef88275fcfebd94  libstdc++-v3/testsuite/25_algorithms/move/requirements/explicit_instantiation/pod.cc
  f087fba1f5a0577853286db5171184a0  libstdc++-v3/testsuite/25_algorithms/move_backward/1.cc
+ ad56a2e5738139bc09cd67e855d44a07  libstdc++-v3/testsuite/25_algorithms/move_backward/108846.cc
  bd16770e040d8a0701e9fc2eca39c128  libstdc++-v3/testsuite/25_algorithms/move_backward/69478.cc
  d3b5eda6d7350468190f595c7c53c70c  libstdc++-v3/testsuite/25_algorithms/move_backward/93872.cc
  278933c4e7ec97cbf8e0c09b50ced266  libstdc++-v3/testsuite/25_algorithms/move_backward/94013.cc
*************** be60fe758d82386ccaa966aafc76bb06  libstd
*** 111607,111615 ****
  16ce09da94a728b6a6598b781fc5aa07  libstdc++-v3/testsuite/25_algorithms/push_heap/constexpr.cc
  6c5db64e22a6d556f551d03092eafaa8  libstdc++-v3/testsuite/25_algorithms/push_heap/requirements/explicit_instantiation/2.cc
  7b69dcdc35a76d124f79a50e8d897f18  libstdc++-v3/testsuite/25_algorithms/push_heap/requirements/explicit_instantiation/pod.cc
! e17f187a7d22403b9e51acc5d6560948  libstdc++-v3/testsuite/25_algorithms/random_shuffle/1.cc
! 95389f17583382590872e839f615c669  libstdc++-v3/testsuite/25_algorithms/random_shuffle/59603.cc
! 68eb66dda45ef787caf505cc37897414  libstdc++-v3/testsuite/25_algorithms/random_shuffle/moveable.cc
  457bbbfb3a832042d307ad45f3813698  libstdc++-v3/testsuite/25_algorithms/random_shuffle/requirements/explicit_instantiation/2.cc
  e15292ccec7214c4903cf1450cb593ab  libstdc++-v3/testsuite/25_algorithms/random_shuffle/requirements/explicit_instantiation/pod.cc
  ae8319d0e7b82102015821d7b3ab7bb9  libstdc++-v3/testsuite/25_algorithms/remove/1.cc
--- 111840,111849 ----
  16ce09da94a728b6a6598b781fc5aa07  libstdc++-v3/testsuite/25_algorithms/push_heap/constexpr.cc
  6c5db64e22a6d556f551d03092eafaa8  libstdc++-v3/testsuite/25_algorithms/push_heap/requirements/explicit_instantiation/2.cc
  7b69dcdc35a76d124f79a50e8d897f18  libstdc++-v3/testsuite/25_algorithms/push_heap/requirements/explicit_instantiation/pod.cc
! 1c8ed22d43220712eaafa915536b6d5d  libstdc++-v3/testsuite/25_algorithms/random_shuffle/1.cc
! afd980d9ab06c5f889f437ba484ef395  libstdc++-v3/testsuite/25_algorithms/random_shuffle/59603.cc
! a5565155158ab1cf9a8d82958acd5a06  libstdc++-v3/testsuite/25_algorithms/random_shuffle/deprecated.cc
! 70c6a38742cfe636d60532908319b138  libstdc++-v3/testsuite/25_algorithms/random_shuffle/moveable.cc
  457bbbfb3a832042d307ad45f3813698  libstdc++-v3/testsuite/25_algorithms/random_shuffle/requirements/explicit_instantiation/2.cc
  e15292ccec7214c4903cf1450cb593ab  libstdc++-v3/testsuite/25_algorithms/random_shuffle/requirements/explicit_instantiation/pod.cc
  ae8319d0e7b82102015821d7b3ab7bb9  libstdc++-v3/testsuite/25_algorithms/remove/1.cc
*************** a0c745f1c47af2a2ec7553fcf4bda762  libstd
*** 111898,111903 ****
--- 112132,112138 ----
  8e56e75f786ab9ab2b33aa9fcf9ca243  libstdc++-v3/testsuite/26_numerics/headers/ccomplex/std_c++0x_neg.cc
  87bce82be6d927c520d1e63ad8201d35  libstdc++-v3/testsuite/26_numerics/headers/cfenv/std_c++0x_neg.cc
  0b98f8f9c557d52570ae7d3bd942e73d  libstdc++-v3/testsuite/26_numerics/headers/cfenv/types_std_c++0x.cc
+ 2c248a4dde912eb37b2f452da846b228  libstdc++-v3/testsuite/26_numerics/headers/cmath/109758.cc
  f53a33be373104096efc8d1ca2ecb454  libstdc++-v3/testsuite/26_numerics/headers/cmath/14608.cc
  71eabdcab36bca2d627d3d4c095a9332  libstdc++-v3/testsuite/26_numerics/headers/cmath/19322.cc
  7285381b30b10361b3c8acaf5850d5c0  libstdc++-v3/testsuite/26_numerics/headers/cmath/25913.cc
*************** bc07796e3dc71ee908b6cf1de3fb0243  libstd
*** 111990,111996 ****
  862f4f439e8707b32a42b5fe736946a5  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/adjacent_difference.cc
  0553df89726830b7195d3dc76149d7b4  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/reduce.cc
  e7d03e915035104e8c34f0e1a253cea1  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/scan.cc
! 371296694e234040b308e95ba965691b  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/transform_reduce.cc
  37a9d3638006b842a59994327880b85f  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/transform_scan.cc
  2203e7f8542c0f2cb67b91452f9cf175  libstdc++-v3/testsuite/26_numerics/random/bernoulli_distribution/cons/default.cc
  3e10f6694b66f03433216378f82c9671  libstdc++-v3/testsuite/26_numerics/random/bernoulli_distribution/cons/parms.cc
--- 112225,112231 ----
  862f4f439e8707b32a42b5fe736946a5  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/adjacent_difference.cc
  0553df89726830b7195d3dc76149d7b4  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/reduce.cc
  e7d03e915035104e8c34f0e1a253cea1  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/scan.cc
! ee23c3ef0c6798a40b17c2720f1599c9  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/transform_reduce.cc
  37a9d3638006b842a59994327880b85f  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/transform_scan.cc
  2203e7f8542c0f2cb67b91452f9cf175  libstdc++-v3/testsuite/26_numerics/random/bernoulli_distribution/cons/default.cc
  3e10f6694b66f03433216378f82c9671  libstdc++-v3/testsuite/26_numerics/random/bernoulli_distribution/cons/parms.cc
*************** e1bf80a338778b1fd8021c6b11da10ae  libstd
*** 111999,112004 ****
--- 112234,112240 ----
  b9ff898ef20784b6377f49a4d59b41a6  libstdc++-v3/testsuite/26_numerics/random/bernoulli_distribution/operators/serialize.cc
  4b853a99f87112f77eafffaa3bfb20c3  libstdc++-v3/testsuite/26_numerics/random/bernoulli_distribution/operators/values.cc
  16b9633198c3d86aa670e0dd71c6cd44  libstdc++-v3/testsuite/26_numerics/random/bernoulli_distribution/requirements/typedefs.cc
+ 334c22069a56db08670dd630ad02a516  libstdc++-v3/testsuite/26_numerics/random/binomial_distribution/114359.cc
  52875fd9eae59363d5913f23adb00abb  libstdc++-v3/testsuite/26_numerics/random/binomial_distribution/cons/default.cc
  3a3b0f3a56ffb11148ee1135661a15a8  libstdc++-v3/testsuite/26_numerics/random/binomial_distribution/cons/parms.cc
  7093745def550fdfc5322966ccef382f  libstdc++-v3/testsuite/26_numerics/random/binomial_distribution/operators/equal.cc
*************** fd35a30659d18b4dfc6f69461d687867  libstd
*** 112191,112197 ****
  336b167edee7c2c97cd1ba0faa509389  libstdc++-v3/testsuite/26_numerics/random/poisson_distribution/operators/values.cc
  b13057ea5e25d9bd21fadbf9a7a5901b  libstdc++-v3/testsuite/26_numerics/random/poisson_distribution/requirements/explicit_instantiation/1.cc
  7f99ecaaf3374e5d961f96f2e1a4076c  libstdc++-v3/testsuite/26_numerics/random/poisson_distribution/requirements/typedefs.cc
! 42c2c0225a7158e51f7eac21fd146318  libstdc++-v3/testsuite/26_numerics/random/pr60037-neg.cc
  fb8dc2f561a0616b43c81b8d8ce74c49  libstdc++-v3/testsuite/26_numerics/random/random_device/85494.cc
  6acc7376afeb4884a1c2f760051d9637  libstdc++-v3/testsuite/26_numerics/random/random_device/94087.cc
  13e7dadb883535e7c011e380914e549e  libstdc++-v3/testsuite/26_numerics/random/random_device/cons/default-cow.cc
--- 112427,112433 ----
  336b167edee7c2c97cd1ba0faa509389  libstdc++-v3/testsuite/26_numerics/random/poisson_distribution/operators/values.cc
  b13057ea5e25d9bd21fadbf9a7a5901b  libstdc++-v3/testsuite/26_numerics/random/poisson_distribution/requirements/explicit_instantiation/1.cc
  7f99ecaaf3374e5d961f96f2e1a4076c  libstdc++-v3/testsuite/26_numerics/random/poisson_distribution/requirements/typedefs.cc
! 1f4374d6f9450751db682750efdc3094  libstdc++-v3/testsuite/26_numerics/random/pr60037-neg.cc
  fb8dc2f561a0616b43c81b8d8ce74c49  libstdc++-v3/testsuite/26_numerics/random/random_device/85494.cc
  6acc7376afeb4884a1c2f760051d9637  libstdc++-v3/testsuite/26_numerics/random/random_device/94087.cc
  13e7dadb883535e7c011e380914e549e  libstdc++-v3/testsuite/26_numerics/random/random_device/cons/default-cow.cc
*************** ce14cd4e63e320814d2f98c9b2e3d47b  libstd
*** 112235,112241 ****
  cae9f40b3c36adf09ab9b7da36be9188  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/55215.cc
  2ea596dd6e6b2bb562905a341572f854  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/copy.cc
  bfdc5dc97c05960cacae7929b0d95463  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/default.cc
! f6735a89cd53d5b140b5c2d979ef11c5  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/lwg3809.cc
  22ce99a43c709f3b69bedea51fb0e19c  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/seed1.cc
  8035cb25ca6db4ae2b1a24b338e42709  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/seed2.cc
  50d353e4a40f0d30d9c999f73f6c8992  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/seed_seq.cc
--- 112471,112477 ----
  cae9f40b3c36adf09ab9b7da36be9188  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/55215.cc
  2ea596dd6e6b2bb562905a341572f854  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/copy.cc
  bfdc5dc97c05960cacae7929b0d95463  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/default.cc
! 7fdf0ab9b87bcd0e74ad97ad9667a1e1  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/lwg3809.cc
  22ce99a43c709f3b69bedea51fb0e19c  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/seed1.cc
  8035cb25ca6db4ae2b1a24b338e42709  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/seed2.cc
  50d353e4a40f0d30d9c999f73f6c8992  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/seed_seq.cc
*************** b1eca1c88d29bc234531e91815621e81  libstd
*** 112786,112793 ****
  142f2542f5179f648b85f4b47db6520f  libstdc++-v3/testsuite/27_io/basic_istringstream/str/char/2.cc
  83956b575c39066e9446320bb6790eb2  libstdc++-v3/testsuite/27_io/basic_istringstream/str/wchar_t/1.cc
  b298dfe137b0c993ff1fb78641f6af32  libstdc++-v3/testsuite/27_io/basic_istringstream/str/wchar_t/2.cc
! 57e5db4dec7d8c57a49b4062805acb76  libstdc++-v3/testsuite/27_io/basic_istringstream/view/char/1.cc
! 13b0232bc5d0b7f1734b813e3c560fb6  libstdc++-v3/testsuite/27_io/basic_istringstream/view/wchar_t/1.cc
  8d47f37af787a3cbb3d3aef4eed85a63  libstdc++-v3/testsuite/27_io/basic_ofstream/assign/1.cc
  6fbb41c2eb58a7c50f53cd5f0ee65f06  libstdc++-v3/testsuite/27_io/basic_ofstream/cons/2020.cc
  8956e5c5203ecf2c1c4a717bdb2f559e  libstdc++-v3/testsuite/27_io/basic_ofstream/cons/char/1.cc
--- 113022,113029 ----
  142f2542f5179f648b85f4b47db6520f  libstdc++-v3/testsuite/27_io/basic_istringstream/str/char/2.cc
  83956b575c39066e9446320bb6790eb2  libstdc++-v3/testsuite/27_io/basic_istringstream/str/wchar_t/1.cc
  b298dfe137b0c993ff1fb78641f6af32  libstdc++-v3/testsuite/27_io/basic_istringstream/str/wchar_t/2.cc
! 57a688e5b674ee49d202703cf49dad30  libstdc++-v3/testsuite/27_io/basic_istringstream/view/char/1.cc
! aa530049fc2ee3bc2c69f7ba7416b86d  libstdc++-v3/testsuite/27_io/basic_istringstream/view/wchar_t/1.cc
  8d47f37af787a3cbb3d3aef4eed85a63  libstdc++-v3/testsuite/27_io/basic_ofstream/assign/1.cc
  6fbb41c2eb58a7c50f53cd5f0ee65f06  libstdc++-v3/testsuite/27_io/basic_ofstream/cons/2020.cc
  8956e5c5203ecf2c1c4a717bdb2f559e  libstdc++-v3/testsuite/27_io/basic_ofstream/cons/char/1.cc
*************** a270d7f7e7321001d328fd4753b77e28  libstd
*** 112962,112969 ****
  6ef2dcb6b7eaeb25bb778f0305135a83  libstdc++-v3/testsuite/27_io/basic_ostringstream/str/wchar_t/1.cc
  635cb7874c5ac3b558287ffaf302bf24  libstdc++-v3/testsuite/27_io/basic_ostringstream/str/wchar_t/2.cc
  03a7326c7d06aa3ab0c5f1f46c2798b2  libstdc++-v3/testsuite/27_io/basic_ostringstream/str/wchar_t/3.cc
! d02dc6dabff50fd9ee2aaa7cb87ac0c5  libstdc++-v3/testsuite/27_io/basic_ostringstream/view/char/1.cc
! 4861ce818104fe71ce507a1c0c565d60  libstdc++-v3/testsuite/27_io/basic_ostringstream/view/wchar_t/1.cc
  6738b09da613713bc72fd5d0c9890f0e  libstdc++-v3/testsuite/27_io/basic_streambuf/cons/2020.cc
  dd99582200109b124dccf94e56382ff0  libstdc++-v3/testsuite/27_io/basic_streambuf/cons/57394.cc
  2599b8946833c7fddbae6cfba0e351f9  libstdc++-v3/testsuite/27_io/basic_streambuf/cons/char/1.cc
--- 113198,113205 ----
  6ef2dcb6b7eaeb25bb778f0305135a83  libstdc++-v3/testsuite/27_io/basic_ostringstream/str/wchar_t/1.cc
  635cb7874c5ac3b558287ffaf302bf24  libstdc++-v3/testsuite/27_io/basic_ostringstream/str/wchar_t/2.cc
  03a7326c7d06aa3ab0c5f1f46c2798b2  libstdc++-v3/testsuite/27_io/basic_ostringstream/str/wchar_t/3.cc
! 4d504579f48fe4971f56c133db86a882  libstdc++-v3/testsuite/27_io/basic_ostringstream/view/char/1.cc
! 0df84a0b0a2b4dc91180c4fcb90d0479  libstdc++-v3/testsuite/27_io/basic_ostringstream/view/wchar_t/1.cc
  6738b09da613713bc72fd5d0c9890f0e  libstdc++-v3/testsuite/27_io/basic_streambuf/cons/2020.cc
  dd99582200109b124dccf94e56382ff0  libstdc++-v3/testsuite/27_io/basic_streambuf/cons/57394.cc
  2599b8946833c7fddbae6cfba0e351f9  libstdc++-v3/testsuite/27_io/basic_streambuf/cons/char/1.cc
*************** cc19e34c508508e7871dc192b34febf7  libstd
*** 113099,113106 ****
  4500f68678e664b104850c50d49cd34e  libstdc++-v3/testsuite/27_io/basic_stringbuf/sungetc/wchar_t/1.cc
  af584112212b193b47b4fd698367cd50  libstdc++-v3/testsuite/27_io/basic_stringbuf/sync/char/1057.cc
  20b710eecc5d61ed3bf89b94e3c8bd57  libstdc++-v3/testsuite/27_io/basic_stringbuf/sync/wchar_t/1057.cc
! 14963b53d87b7f8320eb832bf172a50c  libstdc++-v3/testsuite/27_io/basic_stringbuf/view/char/1.cc
! 706390e349b308d626d70291389209e9  libstdc++-v3/testsuite/27_io/basic_stringbuf/view/wchar_t/1.cc
  38ec6d891d6d4a47865a059e215ea0c8  libstdc++-v3/testsuite/27_io/basic_stringstream/assign/1.cc
  5e8a8a93e5870b17031c24e2b4b199dd  libstdc++-v3/testsuite/27_io/basic_stringstream/assign/81338.cc
  09501862893de29ea85b24bc560b9387  libstdc++-v3/testsuite/27_io/basic_stringstream/cons/2020.cc
--- 113335,113342 ----
  4500f68678e664b104850c50d49cd34e  libstdc++-v3/testsuite/27_io/basic_stringbuf/sungetc/wchar_t/1.cc
  af584112212b193b47b4fd698367cd50  libstdc++-v3/testsuite/27_io/basic_stringbuf/sync/char/1057.cc
  20b710eecc5d61ed3bf89b94e3c8bd57  libstdc++-v3/testsuite/27_io/basic_stringbuf/sync/wchar_t/1057.cc
! 6a14c4de00f2fb2c50f3485166dd5068  libstdc++-v3/testsuite/27_io/basic_stringbuf/view/char/1.cc
! 7d64e1696fb193732ca0118ef00c14f5  libstdc++-v3/testsuite/27_io/basic_stringbuf/view/wchar_t/1.cc
  38ec6d891d6d4a47865a059e215ea0c8  libstdc++-v3/testsuite/27_io/basic_stringstream/assign/1.cc
  5e8a8a93e5870b17031c24e2b4b199dd  libstdc++-v3/testsuite/27_io/basic_stringstream/assign/81338.cc
  09501862893de29ea85b24bc560b9387  libstdc++-v3/testsuite/27_io/basic_stringstream/cons/2020.cc
*************** e8295924f4e5264f13e49f81c52134cf  libstd
*** 113124,113131 ****
  d17c6253f2cedad22f109ac6f77e58fa  libstdc++-v3/testsuite/27_io/basic_stringstream/str/wchar_t/3.cc
  a8e0730088f40f414534c63fc8079003  libstdc++-v3/testsuite/27_io/basic_stringstream/str/wchar_t/4.cc
  b17ebd49a2351a5a06628f8c9d824a9c  libstdc++-v3/testsuite/27_io/basic_stringstream/str/wchar_t/5.cc.cc
! 88f4a448d7064c699e657f8b44faabd9  libstdc++-v3/testsuite/27_io/basic_stringstream/view/char/1.cc
! 1fac8ab5d0edb82b6e006b5e7204e2f4  libstdc++-v3/testsuite/27_io/basic_stringstream/view/wchar_t/1.cc
  fe0d2af1606d21205f2da67070530e99  libstdc++-v3/testsuite/27_io/basic_syncbuf/1.cc
  b380f141304ed16cac8d4d08c4342708  libstdc++-v3/testsuite/27_io/basic_syncbuf/2.cc
  2f08d8d0fca981a79bbabf0cb7a1ece9  libstdc++-v3/testsuite/27_io/basic_syncbuf/basic_ops/1.cc
--- 113360,113367 ----
  d17c6253f2cedad22f109ac6f77e58fa  libstdc++-v3/testsuite/27_io/basic_stringstream/str/wchar_t/3.cc
  a8e0730088f40f414534c63fc8079003  libstdc++-v3/testsuite/27_io/basic_stringstream/str/wchar_t/4.cc
  b17ebd49a2351a5a06628f8c9d824a9c  libstdc++-v3/testsuite/27_io/basic_stringstream/str/wchar_t/5.cc.cc
! c0a4c7f1aff31f6f632a37b8ff8b4fa8  libstdc++-v3/testsuite/27_io/basic_stringstream/view/char/1.cc
! 508441b4d94ab60a19ad81ce101aefc4  libstdc++-v3/testsuite/27_io/basic_stringstream/view/wchar_t/1.cc
  fe0d2af1606d21205f2da67070530e99  libstdc++-v3/testsuite/27_io/basic_syncbuf/1.cc
  b380f141304ed16cac8d4d08c4342708  libstdc++-v3/testsuite/27_io/basic_syncbuf/2.cc
  2f08d8d0fca981a79bbabf0cb7a1ece9  libstdc++-v3/testsuite/27_io/basic_syncbuf/basic_ops/1.cc
*************** a4a432360a8ed2c0d9f582958d93cc62  libstd
*** 113155,113165 ****
  35978ee44efd20a2373d13bfab890b9e  libstdc++-v3/testsuite/27_io/filesystem/operations/canonical.cc
  96e7a09ba65d743166089cae46676bd2  libstdc++-v3/testsuite/27_io/filesystem/operations/copy.cc
  baf6585ecd9476c87e4659aa815018ec  libstdc++-v3/testsuite/27_io/filesystem/operations/copy_file.cc
  8316659f617960cafa349695f2ac163e  libstdc++-v3/testsuite/27_io/filesystem/operations/create_directories.cc
  1d1b529d3483bdbe217244e7f1cb0c1a  libstdc++-v3/testsuite/27_io/filesystem/operations/create_directory.cc
  6742f3d96acb605f9150065bc1b9ed9d  libstdc++-v3/testsuite/27_io/filesystem/operations/create_symlink.cc
  1a326be911f45be0260f9204216aa4d0  libstdc++-v3/testsuite/27_io/filesystem/operations/current_path.cc
! ef6741c85f460eca4314d164cc9ae618  libstdc++-v3/testsuite/27_io/filesystem/operations/equivalent.cc
  40721b7e2bdc65d92b93ed61873cb807  libstdc++-v3/testsuite/27_io/filesystem/operations/exists.cc
  841032b8606254bba1237d18bd980abc  libstdc++-v3/testsuite/27_io/filesystem/operations/file_size.cc
  db20c8025ec30fad37cfa2d5b80f4551  libstdc++-v3/testsuite/27_io/filesystem/operations/is_empty.cc
--- 113391,113402 ----
  35978ee44efd20a2373d13bfab890b9e  libstdc++-v3/testsuite/27_io/filesystem/operations/canonical.cc
  96e7a09ba65d743166089cae46676bd2  libstdc++-v3/testsuite/27_io/filesystem/operations/copy.cc
  baf6585ecd9476c87e4659aa815018ec  libstdc++-v3/testsuite/27_io/filesystem/operations/copy_file.cc
+ 10b6e95add9984bd29138cd25bc3a19f  libstdc++-v3/testsuite/27_io/filesystem/operations/copy_file_108178.cc
  8316659f617960cafa349695f2ac163e  libstdc++-v3/testsuite/27_io/filesystem/operations/create_directories.cc
  1d1b529d3483bdbe217244e7f1cb0c1a  libstdc++-v3/testsuite/27_io/filesystem/operations/create_directory.cc
  6742f3d96acb605f9150065bc1b9ed9d  libstdc++-v3/testsuite/27_io/filesystem/operations/create_symlink.cc
  1a326be911f45be0260f9204216aa4d0  libstdc++-v3/testsuite/27_io/filesystem/operations/current_path.cc
! af5ab2107093ab86366dc780a5ccf849  libstdc++-v3/testsuite/27_io/filesystem/operations/equivalent.cc
  40721b7e2bdc65d92b93ed61873cb807  libstdc++-v3/testsuite/27_io/filesystem/operations/exists.cc
  841032b8606254bba1237d18bd980abc  libstdc++-v3/testsuite/27_io/filesystem/operations/file_size.cc
  db20c8025ec30fad37cfa2d5b80f4551  libstdc++-v3/testsuite/27_io/filesystem/operations/is_empty.cc
*************** e24d44f581a05c8e683843dc9fc1a8f3  libstd
*** 113177,113183 ****
  5c1d700abf212e29f14784e2e523aa2d  libstdc++-v3/testsuite/27_io/filesystem/operations/symlink_status.cc
  0062e5d140893182b615e814cf1ae46f  libstdc++-v3/testsuite/27_io/filesystem/operations/temp_directory_path.cc
  38dee53dd844f69a702bd8d79b5d671b  libstdc++-v3/testsuite/27_io/filesystem/operations/weakly_canonical.cc
! 9897c7912c7b47987d118515b02ab561  libstdc++-v3/testsuite/27_io/filesystem/path/108636.cc
  bba1248fe386d1a1a21631e774815c65  libstdc++-v3/testsuite/27_io/filesystem/path/append/path.cc
  28c0d37c0e2f90cf6a142915f8ff0700  libstdc++-v3/testsuite/27_io/filesystem/path/append/source.cc
  349a648747f4bf9c0d342ff7c45920fb  libstdc++-v3/testsuite/27_io/filesystem/path/assign/assign.cc
--- 113414,113420 ----
  5c1d700abf212e29f14784e2e523aa2d  libstdc++-v3/testsuite/27_io/filesystem/operations/symlink_status.cc
  0062e5d140893182b615e814cf1ae46f  libstdc++-v3/testsuite/27_io/filesystem/operations/temp_directory_path.cc
  38dee53dd844f69a702bd8d79b5d671b  libstdc++-v3/testsuite/27_io/filesystem/operations/weakly_canonical.cc
! b2970ce50b620a0f99e06931534c3d14  libstdc++-v3/testsuite/27_io/filesystem/path/108636.cc
  bba1248fe386d1a1a21631e774815c65  libstdc++-v3/testsuite/27_io/filesystem/path/append/path.cc
  28c0d37c0e2f90cf6a142915f8ff0700  libstdc++-v3/testsuite/27_io/filesystem/path/append/source.cc
  349a648747f4bf9c0d342ff7c45920fb  libstdc++-v3/testsuite/27_io/filesystem/path/assign/assign.cc
*************** a22e69eb2c027825b8fb3e0e6df6a97d  libstd
*** 113195,113201 ****
  62be85132974055d79ef2c66b9d5c87e  libstdc++-v3/testsuite/27_io/filesystem/path/construct/80762.cc
  7ce3d0b79e41297664f123c1bf32d35a  libstdc++-v3/testsuite/27_io/filesystem/path/construct/90281.cc
  c64922a75e4fc4cacdce9eac39563b6c  libstdc++-v3/testsuite/27_io/filesystem/path/construct/90634.cc
! 16f2c14a3bea9b80ab6807caa15c110d  libstdc++-v3/testsuite/27_io/filesystem/path/construct/95048.cc
  3942fb1d3a926fec720c459d973c2f19  libstdc++-v3/testsuite/27_io/filesystem/path/construct/copy.cc
  a6934c3c16b2e54ddf466f543bb7f5a0  libstdc++-v3/testsuite/27_io/filesystem/path/construct/default.cc
  38f0f98a3816f51d44b4c3a09093a1b1  libstdc++-v3/testsuite/27_io/filesystem/path/construct/format.cc
--- 113432,113438 ----
  62be85132974055d79ef2c66b9d5c87e  libstdc++-v3/testsuite/27_io/filesystem/path/construct/80762.cc
  7ce3d0b79e41297664f123c1bf32d35a  libstdc++-v3/testsuite/27_io/filesystem/path/construct/90281.cc
  c64922a75e4fc4cacdce9eac39563b6c  libstdc++-v3/testsuite/27_io/filesystem/path/construct/90634.cc
! 7e3f9d185f69161e92a1fe6e162069f3  libstdc++-v3/testsuite/27_io/filesystem/path/construct/95048.cc
  3942fb1d3a926fec720c459d973c2f19  libstdc++-v3/testsuite/27_io/filesystem/path/construct/copy.cc
  a6934c3c16b2e54ddf466f543bb7f5a0  libstdc++-v3/testsuite/27_io/filesystem/path/construct/default.cc
  38f0f98a3816f51d44b4c3a09093a1b1  libstdc++-v3/testsuite/27_io/filesystem/path/construct/format.cc
*************** ff06448329baa1c06328dea778ee6217  libstd
*** 113330,113336 ****
  694e1a2dbd81fad828cb2f84907cb96f  libstdc++-v3/testsuite/27_io/manipulators/extended/get_money/wchar_t/1.cc
  4369b14d89f3ae467a4fc0adb5817a7c  libstdc++-v3/testsuite/27_io/manipulators/extended/get_money/wchar_t/51288.cc
  57ea7a6e5d482b5441bd701a55e71bec  libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/char/1.cc
! 671f2124125a7d0169da9a4da18a5e8b  libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/char/2.cc
  fce483af0606714dcd2de7e74092938d  libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/wchar_t/1.cc
  5ba95c9f75413e8ceb39c874e7281512  libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/wchar_t/2.cc
  cfe1b2401e3821ead0ca57e2cd6b2ef6  libstdc++-v3/testsuite/27_io/manipulators/extended/put_money/char/1.cc
--- 113567,113573 ----
  694e1a2dbd81fad828cb2f84907cb96f  libstdc++-v3/testsuite/27_io/manipulators/extended/get_money/wchar_t/1.cc
  4369b14d89f3ae467a4fc0adb5817a7c  libstdc++-v3/testsuite/27_io/manipulators/extended/get_money/wchar_t/51288.cc
  57ea7a6e5d482b5441bd701a55e71bec  libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/char/1.cc
! a4c77e3315281d9ee1fd1edc768b4246  libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/char/2.cc
  fce483af0606714dcd2de7e74092938d  libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/wchar_t/1.cc
  5ba95c9f75413e8ceb39c874e7281512  libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/wchar_t/2.cc
  cfe1b2401e3821ead0ca57e2cd6b2ef6  libstdc++-v3/testsuite/27_io/manipulators/extended/put_money/char/1.cc
*************** ebfba19d8a3fd6d3e27bb7b0a3577134  libstd
*** 113447,113452 ****
--- 113684,113690 ----
  b06a0534dbed66ce7509c33dedb7fe0d  libstdc++-v3/testsuite/27_io/types/2.cc
  98c43797dbb511da269fe5daf06f3c8d  libstdc++-v3/testsuite/27_io/types/3.cc
  47c7f43bb6153743c7431f0c1c162142  libstdc++-v3/testsuite/27_io/types/4.cc
+ 2311cea628cce5b052734c24d5a5cae9  libstdc++-v3/testsuite/28_regex/algorithms/regex_match/107376.cc
  ac17a08648e0976b0c7d6fdedfa3b873  libstdc++-v3/testsuite/28_regex/algorithms/regex_match/awk/cstring_01.cc
  b4de49ecda034d158711adf6d15c8c16  libstdc++-v3/testsuite/28_regex/algorithms/regex_match/basic/empty_range.cc
  80c695ed0ff87f3b529b00e4cfb3bac6  libstdc++-v3/testsuite/28_regex/algorithms/regex_match/basic/string_01.cc
*************** fb122acef0bbf0fc9a70c958cb5bc819  libstd
*** 113572,113577 ****
--- 113810,113816 ----
  1346fd756cbbfa5fca18dc7e542b6835  libstdc++-v3/testsuite/28_regex/iterators/regex_token_iterator/wchar_t/wstring_02.cc
  e50868497a6eac9c6a7e389f3cda11ef  libstdc++-v3/testsuite/28_regex/match_results/102667.cc
  c0c620239c2efe0541afd787aae66d95  libstdc++-v3/testsuite/28_regex/match_results/94627.cc
+ ae3c69a2af41b63301190a3e8902a808  libstdc++-v3/testsuite/28_regex/match_results/ctors/char/alloc.cc
  523747fb6682da93512c29f0c3f84d96  libstdc++-v3/testsuite/28_regex/match_results/ctors/char/default.cc
  44e9dfbe7dc2fb0575e1461d15735094  libstdc++-v3/testsuite/28_regex/match_results/ctors/wchar_t/default.cc
  943e9f2d23fb95391f8540b16cbf669c  libstdc++-v3/testsuite/28_regex/match_results/format.cc
*************** be6f2558da97adb9fd11069e714aa638  libstd
*** 113952,113957 ****
--- 114191,114197 ----
  7e1bd6928d9af16b714bdcc3ab2676a7  libstdc++-v3/testsuite/30_threads/shared_lock/cons/5.cc
  1eab13a914dbb5210e8fa29f8548f896  libstdc++-v3/testsuite/30_threads/shared_lock/cons/6.cc
  fdd5b9a72939ea484c451ecafd73ec65  libstdc++-v3/testsuite/30_threads/shared_lock/locking/1.cc
+ f73343e4c89cb77298874c0578e423c3  libstdc++-v3/testsuite/30_threads/shared_lock/locking/112089.cc
  ddb90abb5419839bf18eb9c5c56acde3  libstdc++-v3/testsuite/30_threads/shared_lock/locking/2.cc
  9a932816d03780392dd3ea8a34345d91  libstdc++-v3/testsuite/30_threads/shared_lock/locking/3.cc
  ebaafc7818a24a7298485430455e3f32  libstdc++-v3/testsuite/30_threads/shared_lock/locking/4.cc
*************** bb6a21c3b983ca1e0f627b097b92d18c  libstd
*** 114270,114276 ****
  eed4d160963378898dde2692dcea87d6  libstdc++-v3/testsuite/experimental/chrono/value.cc
  5ed8a0dc031a8b99e196cc860447e1f8  libstdc++-v3/testsuite/experimental/deque/erasure.cc
  486c6490ca99880768c8a8d443ad1c02  libstdc++-v3/testsuite/experimental/feat-char8_t.cc
! 02455db47de7f16c8e2d1f2af4839fc7  libstdc++-v3/testsuite/experimental/feat-cxx14.cc
  f754118861b851f83334813d834cb200  libstdc++-v3/testsuite/experimental/feat-lib-fund.cc
  b357baf6c5aabc7bc6a18b73a159c3f9  libstdc++-v3/testsuite/experimental/filesystem/file_status/1.cc
  6fbf2560cc0f0331e3d9474af50277eb  libstdc++-v3/testsuite/experimental/filesystem/filesystem_error/cons.cc
--- 114510,114516 ----
  eed4d160963378898dde2692dcea87d6  libstdc++-v3/testsuite/experimental/chrono/value.cc
  5ed8a0dc031a8b99e196cc860447e1f8  libstdc++-v3/testsuite/experimental/deque/erasure.cc
  486c6490ca99880768c8a8d443ad1c02  libstdc++-v3/testsuite/experimental/feat-char8_t.cc
! 1e40b25f41d84c78c0074f58858cbdb3  libstdc++-v3/testsuite/experimental/feat-cxx14.cc
  f754118861b851f83334813d834cb200  libstdc++-v3/testsuite/experimental/feat-lib-fund.cc
  b357baf6c5aabc7bc6a18b73a159c3f9  libstdc++-v3/testsuite/experimental/filesystem/file_status/1.cc
  6fbf2560cc0f0331e3d9474af50277eb  libstdc++-v3/testsuite/experimental/filesystem/filesystem_error/cons.cc
*************** e7e8dcabc9ea03dbfe622f77cbdbee0d  libstd
*** 114288,114294 ****
  0b6be655195128ee4c4a44059a79f483  libstdc++-v3/testsuite/experimental/filesystem/operations/create_directory.cc
  86df7b64e4c303e0d8b514da3f6e2403  libstdc++-v3/testsuite/experimental/filesystem/operations/create_symlink.cc
  ad0e395725a0a7fd04d783fa3ecc9f9c  libstdc++-v3/testsuite/experimental/filesystem/operations/current_path.cc
! 4edc111e04a46ececccad8c8b357c98d  libstdc++-v3/testsuite/experimental/filesystem/operations/equivalent.cc
  998942b6add860e6956b4d91ebeb4f4c  libstdc++-v3/testsuite/experimental/filesystem/operations/exists.cc
  49e6da792986ffc12c1d8c07de270f8c  libstdc++-v3/testsuite/experimental/filesystem/operations/file_size.cc
  be0eb21bfeb3e5951b30037607f7fdba  libstdc++-v3/testsuite/experimental/filesystem/operations/is_empty.cc
--- 114528,114534 ----
  0b6be655195128ee4c4a44059a79f483  libstdc++-v3/testsuite/experimental/filesystem/operations/create_directory.cc
  86df7b64e4c303e0d8b514da3f6e2403  libstdc++-v3/testsuite/experimental/filesystem/operations/create_symlink.cc
  ad0e395725a0a7fd04d783fa3ecc9f9c  libstdc++-v3/testsuite/experimental/filesystem/operations/current_path.cc
! 916229d21d5aa6928469db80451ffcfc  libstdc++-v3/testsuite/experimental/filesystem/operations/equivalent.cc
  998942b6add860e6956b4d91ebeb4f4c  libstdc++-v3/testsuite/experimental/filesystem/operations/exists.cc
  49e6da792986ffc12c1d8c07de270f8c  libstdc++-v3/testsuite/experimental/filesystem/operations/file_size.cc
  be0eb21bfeb3e5951b30037607f7fdba  libstdc++-v3/testsuite/experimental/filesystem/operations/is_empty.cc
*************** c06b01e19066f0d4ffa4faa5202f4e3e  libstd
*** 114313,114319 ****
  0b9876d2dbc13ea170ce1e6f98c951a7  libstdc++-v3/testsuite/experimental/filesystem/path/construct/80762.cc
  f075500414fc6cbaf74c652ceabb379f  libstdc++-v3/testsuite/experimental/filesystem/path/construct/90281.cc
  abdd6f0c4be378f596d9eafe1d838cb4  libstdc++-v3/testsuite/experimental/filesystem/path/construct/90634.cc
! 5c406dc2e8d3c5bbab9689a471cce8f9  libstdc++-v3/testsuite/experimental/filesystem/path/construct/95048.cc
  117246a83e96fccd8c3b5aeac5882f9c  libstdc++-v3/testsuite/experimental/filesystem/path/construct/copy.cc
  441fcf2bc3399ac3cc19178605716898  libstdc++-v3/testsuite/experimental/filesystem/path/construct/default.cc
  d9b9a772f9f82a1016a72762f2c923e4  libstdc++-v3/testsuite/experimental/filesystem/path/construct/locale.cc
--- 114553,114559 ----
  0b9876d2dbc13ea170ce1e6f98c951a7  libstdc++-v3/testsuite/experimental/filesystem/path/construct/80762.cc
  f075500414fc6cbaf74c652ceabb379f  libstdc++-v3/testsuite/experimental/filesystem/path/construct/90281.cc
  abdd6f0c4be378f596d9eafe1d838cb4  libstdc++-v3/testsuite/experimental/filesystem/path/construct/90634.cc
! bc0c58037ed5ab6415d0899ccc8799af  libstdc++-v3/testsuite/experimental/filesystem/path/construct/95048.cc
  117246a83e96fccd8c3b5aeac5882f9c  libstdc++-v3/testsuite/experimental/filesystem/path/construct/copy.cc
  441fcf2bc3399ac3cc19178605716898  libstdc++-v3/testsuite/experimental/filesystem/path/construct/default.cc
  d9b9a772f9f82a1016a72762f2c923e4  libstdc++-v3/testsuite/experimental/filesystem/path/construct/locale.cc
*************** d3648d8a2ddc3c7201a4d5148ea0eabb  libstd
*** 114416,114421 ****
--- 114656,114662 ----
  b82e376b28cf430be76d2adc2ffa231a  libstdc++-v3/testsuite/experimental/net/internet/address/v4/creation.cc
  3a11c8807fab0d2f61e6dda6fc2fb3de  libstdc++-v3/testsuite/experimental/net/internet/address/v4/members.cc
  2011063352328b4b10ea7578b6f6b968  libstdc++-v3/testsuite/experimental/net/internet/address/v6/members.cc
+ b289bacb72f52125d6995bdc98f9a336  libstdc++-v3/testsuite/experimental/net/internet/network/v6/cons.cc
  e074bf09364a14b650e240651a0a47bc  libstdc++-v3/testsuite/experimental/net/internet/resolver/base.cc
  4e3970ded3af166abeb3813088cc10ea  libstdc++-v3/testsuite/experimental/net/internet/resolver/ops/lookup.cc
  8947f13760e616166e7059b1a52984f1  libstdc++-v3/testsuite/experimental/net/internet/resolver/ops/reverse.cc
*************** cd56463689cba039dc0577c8b2d7a855  libstd
*** 114518,114523 ****
--- 114759,114767 ----
  d6f0083479e5097ec27151965ff89e5d  libstdc++-v3/testsuite/experimental/simd/README.md
  2c666451450a60415a52ed94723ea1a6  libstdc++-v3/testsuite/experimental/simd/driver.sh
  744a88ed80132268f2d29c9d5e586308  libstdc++-v3/testsuite/experimental/simd/generate_makefile.sh
+ 03e8f51d7ef48b8a37325dad25e551ed  libstdc++-v3/testsuite/experimental/simd/pr109261_constexpr_simd.cc
+ 40516291f4d97883db23570b8f0c38a0  libstdc++-v3/testsuite/experimental/simd/pr109822_cast_functions.cc
+ 4abe9d75da280cd5bcef090bd6898210  libstdc++-v3/testsuite/experimental/simd/pr114803_vecbuiltin_cvt.cc
  febb06982704a772da61d7b14e5795ee  libstdc++-v3/testsuite/experimental/simd/standard_abi_usable.cc
  8456d329f682f25f869aac367480356e  libstdc++-v3/testsuite/experimental/simd/standard_abi_usable_2.cc
  59bc95299ad0d5ce1b19ecb4358e5c43  libstdc++-v3/testsuite/experimental/simd/tests/abs.cc
*************** d32d57c818b064ed375165ea4754089f  libstd
*** 114532,114545 ****
  5f84478dfa4dcd3e1c05aed24c8a3be0  libstdc++-v3/testsuite/experimental/simd/tests/bits/verify.h
  60407475679dc04e7d60bb1bc86dffdb  libstdc++-v3/testsuite/experimental/simd/tests/broadcast.cc
  ffc42372c02e90af242f59788399db5a  libstdc++-v3/testsuite/experimental/simd/tests/casts.cc
! 101a999bb7c646b579b4376416643895  libstdc++-v3/testsuite/experimental/simd/tests/fpclassify.cc
! 5c39c95d201f635a1de2535d53521fc9  libstdc++-v3/testsuite/experimental/simd/tests/frexp.cc
  af847d64df49c134727d3da5561a3723  libstdc++-v3/testsuite/experimental/simd/tests/generator.cc
  b234ef1901b5ba6d6ef358f2098f9475  libstdc++-v3/testsuite/experimental/simd/tests/hypot3_fma.cc
! 9002b5364b98cae972f0c9239f161205  libstdc++-v3/testsuite/experimental/simd/tests/integer_operators.cc
! e71a311524b3ac7dcc5fa6956e5b5a81  libstdc++-v3/testsuite/experimental/simd/tests/ldexp_scalbn_scalbln_modf.cc
  2f4834e979867c7f1db242a3dc9e0f84  libstdc++-v3/testsuite/experimental/simd/tests/loadstore.cc
! 894e612c58b45d3a0a0664f507d404ce  libstdc++-v3/testsuite/experimental/simd/tests/logarithm.cc
  a0f7c3ca5a18f8542ba3a9915810f127  libstdc++-v3/testsuite/experimental/simd/tests/mask_broadcast.cc
  b107b97473b7c99530a8603cf2da2324  libstdc++-v3/testsuite/experimental/simd/tests/mask_conversions.cc
  2b751bab06aaa71fa2b9053371d4f5be  libstdc++-v3/testsuite/experimental/simd/tests/mask_implicit_cvt.cc
--- 114776,114789 ----
  5f84478dfa4dcd3e1c05aed24c8a3be0  libstdc++-v3/testsuite/experimental/simd/tests/bits/verify.h
  60407475679dc04e7d60bb1bc86dffdb  libstdc++-v3/testsuite/experimental/simd/tests/broadcast.cc
  ffc42372c02e90af242f59788399db5a  libstdc++-v3/testsuite/experimental/simd/tests/casts.cc
! b6b91725acf8af5720a3dd16652d1864  libstdc++-v3/testsuite/experimental/simd/tests/fpclassify.cc
! f72a1d1b5d8432706793ea4498b30578  libstdc++-v3/testsuite/experimental/simd/tests/frexp.cc
  af847d64df49c134727d3da5561a3723  libstdc++-v3/testsuite/experimental/simd/tests/generator.cc
  b234ef1901b5ba6d6ef358f2098f9475  libstdc++-v3/testsuite/experimental/simd/tests/hypot3_fma.cc
! a05483aa2ba15e9e2a19d8ed7b9096f0  libstdc++-v3/testsuite/experimental/simd/tests/integer_operators.cc
! 9d8315b30118571c4530f2fbaaa67f5e  libstdc++-v3/testsuite/experimental/simd/tests/ldexp_scalbn_scalbln_modf.cc
  2f4834e979867c7f1db242a3dc9e0f84  libstdc++-v3/testsuite/experimental/simd/tests/loadstore.cc
! 8b0a10497d7aa54e7bf71efadd70c73e  libstdc++-v3/testsuite/experimental/simd/tests/logarithm.cc
  a0f7c3ca5a18f8542ba3a9915810f127  libstdc++-v3/testsuite/experimental/simd/tests/mask_broadcast.cc
  b107b97473b7c99530a8603cf2da2324  libstdc++-v3/testsuite/experimental/simd/tests/mask_conversions.cc
  2b751bab06aaa71fa2b9053371d4f5be  libstdc++-v3/testsuite/experimental/simd/tests/mask_implicit_cvt.cc
*************** b107b97473b7c99530a8603cf2da2324  libstd
*** 114549,114564 ****
  9a3d07ed231ad4a8ac07b19bb4761b2b  libstdc++-v3/testsuite/experimental/simd/tests/mask_reductions.cc
  951b947393323da0fd0bd090f8fc81d9  libstdc++-v3/testsuite/experimental/simd/tests/math_1arg.cc
  1595c4b98dd21d21548e171ba5bb5a7a  libstdc++-v3/testsuite/experimental/simd/tests/math_2arg.cc
! d21cdbc7bc3b41b29957f4e2fd8e3357  libstdc++-v3/testsuite/experimental/simd/tests/operator_cvt.cc
  b7691a7156c96f83c25b9fe6a36307ca  libstdc++-v3/testsuite/experimental/simd/tests/operators.cc
! dd671dbe35947377857f0f71337ea225  libstdc++-v3/testsuite/experimental/simd/tests/reductions.cc
  602de48c0437c1eca409deac2c196c53  libstdc++-v3/testsuite/experimental/simd/tests/remqo.cc
  2b03327b12708d313a4591a4fbb2f3e2  libstdc++-v3/testsuite/experimental/simd/tests/simd.cc
  070b37e3ae10319ba1cdd6a15808e929  libstdc++-v3/testsuite/experimental/simd/tests/sincos.cc
  2cb204227ac6a30742376b71c73ab773  libstdc++-v3/testsuite/experimental/simd/tests/split_concat.cc
  08fa96bd646c4d617dfedb1436d00717  libstdc++-v3/testsuite/experimental/simd/tests/splits.cc
  9bf3b6278fe2f036cc846a88df8ebcb3  libstdc++-v3/testsuite/experimental/simd/tests/trigonometric.cc
! 201affd1d9ed7afd66658b1f2f5701c0  libstdc++-v3/testsuite/experimental/simd/tests/trunc_ceil_floor.cc
  2f197150877211119ac153f159dc1200  libstdc++-v3/testsuite/experimental/simd/tests/where.cc
  ebdd856dc1e0446c45236f494cddaefb  libstdc++-v3/testsuite/experimental/source_location/1.cc
  fccce21c04130e6b402d758f8e7e4de4  libstdc++-v3/testsuite/experimental/string/erasure.cc
--- 114793,114808 ----
  9a3d07ed231ad4a8ac07b19bb4761b2b  libstdc++-v3/testsuite/experimental/simd/tests/mask_reductions.cc
  951b947393323da0fd0bd090f8fc81d9  libstdc++-v3/testsuite/experimental/simd/tests/math_1arg.cc
  1595c4b98dd21d21548e171ba5bb5a7a  libstdc++-v3/testsuite/experimental/simd/tests/math_2arg.cc
! 5d4e9d4a781714bda02df195620d5d28  libstdc++-v3/testsuite/experimental/simd/tests/operator_cvt.cc
  b7691a7156c96f83c25b9fe6a36307ca  libstdc++-v3/testsuite/experimental/simd/tests/operators.cc
! 8f727e7bb555702245107256530790ba  libstdc++-v3/testsuite/experimental/simd/tests/reductions.cc
  602de48c0437c1eca409deac2c196c53  libstdc++-v3/testsuite/experimental/simd/tests/remqo.cc
  2b03327b12708d313a4591a4fbb2f3e2  libstdc++-v3/testsuite/experimental/simd/tests/simd.cc
  070b37e3ae10319ba1cdd6a15808e929  libstdc++-v3/testsuite/experimental/simd/tests/sincos.cc
  2cb204227ac6a30742376b71c73ab773  libstdc++-v3/testsuite/experimental/simd/tests/split_concat.cc
  08fa96bd646c4d617dfedb1436d00717  libstdc++-v3/testsuite/experimental/simd/tests/splits.cc
  9bf3b6278fe2f036cc846a88df8ebcb3  libstdc++-v3/testsuite/experimental/simd/tests/trigonometric.cc
! 618a6afab8386f2b5d8375673bc85dda  libstdc++-v3/testsuite/experimental/simd/tests/trunc_ceil_floor.cc
  2f197150877211119ac153f159dc1200  libstdc++-v3/testsuite/experimental/simd/tests/where.cc
  ebdd856dc1e0446c45236f494cddaefb  libstdc++-v3/testsuite/experimental/source_location/1.cc
  fccce21c04130e6b402d758f8e7e4de4  libstdc++-v3/testsuite/experimental/string/erasure.cc
*************** dd6759b40a7f7a797962e13433070128  libstd
*** 114632,114638 ****
  c97bb58a0d698de4ac0963f0a2971db0  libstdc++-v3/testsuite/experimental/string_view/requirements/explicit_instantiation/char8_t/1.cc
  2ea27c389fe9f2cdd56b517580289990  libstdc++-v3/testsuite/experimental/string_view/requirements/explicit_instantiation/wchar_t/1.cc
  667094772a251d3a614c05b38a484ec2  libstdc++-v3/testsuite/experimental/string_view/requirements/typedefs.cc
! 082b55b5bcbe6779a39c54e959a5d9e3  libstdc++-v3/testsuite/experimental/string_view/typedefs.cc
  ebdd3bcc1466d8e7516c043bd77303d9  libstdc++-v3/testsuite/experimental/string_view/types/1.cc
  44afa132fe15442f7cad19b625884b73  libstdc++-v3/testsuite/experimental/system_error/value.cc
  5b0712bcc9e4658332efc1e4fadb2a47  libstdc++-v3/testsuite/experimental/tuple/apply.cc
--- 114876,114882 ----
  c97bb58a0d698de4ac0963f0a2971db0  libstdc++-v3/testsuite/experimental/string_view/requirements/explicit_instantiation/char8_t/1.cc
  2ea27c389fe9f2cdd56b517580289990  libstdc++-v3/testsuite/experimental/string_view/requirements/explicit_instantiation/wchar_t/1.cc
  667094772a251d3a614c05b38a484ec2  libstdc++-v3/testsuite/experimental/string_view/requirements/typedefs.cc
! 5c206362fbacd074b00202aa695c38d1  libstdc++-v3/testsuite/experimental/string_view/typedefs.cc
  ebdd3bcc1466d8e7516c043bd77303d9  libstdc++-v3/testsuite/experimental/string_view/types/1.cc
  44afa132fe15442f7cad19b625884b73  libstdc++-v3/testsuite/experimental/system_error/value.cc
  5b0712bcc9e4658332efc1e4fadb2a47  libstdc++-v3/testsuite/experimental/tuple/apply.cc
*************** cd0313fea79467b83d9afaf51ea7b6f8  libstd
*** 115000,115008 ****
  efe80cd6fb09aa93d37114ed5340800c  libstdc++-v3/testsuite/ext/vstring/requirements/explicit_instantiation/wchar_t/1.cc
  64b3206e033f99952dd1678871a15f2a  libstdc++-v3/testsuite/ext/vstring/requirements/typedefs.cc
  d30063403274e1065cc854085e116d6b  libstdc++-v3/testsuite/ext/vstring/types/23767.cc
! 4ab0eb3fb5aaffdf8091547947d6f98f  libstdc++-v3/testsuite/lib/dg-options.exp
  fc2503720aae2c77c00f195d8b6ba64e  libstdc++-v3/testsuite/lib/gdb-test.exp
! 4424f97ad0c4ff6ebfb5044d99e5a347  libstdc++-v3/testsuite/lib/libstdc++.exp
  56632af45fd1ea0f618c2958d04755ae  libstdc++-v3/testsuite/lib/prune.exp
  06e070e55f5a8385db00266af680f0eb  libstdc++-v3/testsuite/libstdc++-abi/abi.exp
  e49fd8c901c170534216585f66b1e045  libstdc++-v3/testsuite/libstdc++-dg/conformance.exp
--- 115244,115252 ----
  efe80cd6fb09aa93d37114ed5340800c  libstdc++-v3/testsuite/ext/vstring/requirements/explicit_instantiation/wchar_t/1.cc
  64b3206e033f99952dd1678871a15f2a  libstdc++-v3/testsuite/ext/vstring/requirements/typedefs.cc
  d30063403274e1065cc854085e116d6b  libstdc++-v3/testsuite/ext/vstring/types/23767.cc
! 256140b1f8d4dee5a7ecea0c156e8307  libstdc++-v3/testsuite/lib/dg-options.exp
  fc2503720aae2c77c00f195d8b6ba64e  libstdc++-v3/testsuite/lib/gdb-test.exp
! ab0b85152edcb64e60abf681a9c2f33d  libstdc++-v3/testsuite/lib/libstdc++.exp
  56632af45fd1ea0f618c2958d04755ae  libstdc++-v3/testsuite/lib/prune.exp
  06e070e55f5a8385db00266af680f0eb  libstdc++-v3/testsuite/libstdc++-abi/abi.exp
  e49fd8c901c170534216585f66b1e045  libstdc++-v3/testsuite/libstdc++-dg/conformance.exp
*************** c417b54472d07ec7aa6e7af1c3c6d896  libstd
*** 115011,115017 ****
  152e703d617bb7d3724a194d7c9f0799  libstdc++-v3/testsuite/libstdc++-prettyprinters/80276.cc
  b1281cbb5e95214d54adafdf2cf2b03f  libstdc++-v3/testsuite/libstdc++-prettyprinters/91997.cc
  46e322fb900e091e5635c048b2623306  libstdc++-v3/testsuite/libstdc++-prettyprinters/compat.cc
! a621e16465f591704a2e3250537aad0e  libstdc++-v3/testsuite/libstdc++-prettyprinters/cxx11.cc
  a8d73378b5fc400100d29de439be4a44  libstdc++-v3/testsuite/libstdc++-prettyprinters/cxx17.cc
  8a7a1074cfc491af32881d81a2c24a91  libstdc++-v3/testsuite/libstdc++-prettyprinters/cxx20.cc
  9ec08e769d05c4e57a2216c17a47a794  libstdc++-v3/testsuite/libstdc++-prettyprinters/debug.cc
--- 115255,115261 ----
  152e703d617bb7d3724a194d7c9f0799  libstdc++-v3/testsuite/libstdc++-prettyprinters/80276.cc
  b1281cbb5e95214d54adafdf2cf2b03f  libstdc++-v3/testsuite/libstdc++-prettyprinters/91997.cc
  46e322fb900e091e5635c048b2623306  libstdc++-v3/testsuite/libstdc++-prettyprinters/compat.cc
! 3b476a3e62e680bfa3526c5eb93bd80c  libstdc++-v3/testsuite/libstdc++-prettyprinters/cxx11.cc
  a8d73378b5fc400100d29de439be4a44  libstdc++-v3/testsuite/libstdc++-prettyprinters/cxx17.cc
  8a7a1074cfc491af32881d81a2c24a91  libstdc++-v3/testsuite/libstdc++-prettyprinters/cxx20.cc
  9ec08e769d05c4e57a2216c17a47a794  libstdc++-v3/testsuite/libstdc++-prettyprinters/debug.cc
*************** a0fdef1654a7cce567c466178f2e4b29  libstd
*** 115027,115033 ****
  e62ddba2d5699b2da68d1bd242a3536c  libstdc++-v3/testsuite/libstdc++-prettyprinters/whatis2.cc
  bce8bb63953cd2f76e9429708e884949  libstdc++-v3/testsuite/libstdc++-xmethods/array.cc
  a0e7ce5b03ed560d49265aed37b12cc7  libstdc++-v3/testsuite/libstdc++-xmethods/associative-containers.cc
! 94a207eeede0afa31ca42f89a730dd1f  libstdc++-v3/testsuite/libstdc++-xmethods/deque.cc
  c2226029ecf5fdb125ac9a4771b762d6  libstdc++-v3/testsuite/libstdc++-xmethods/forwardlist.cc
  a100879d6e7ba579a0ad08cdbbc26eb0  libstdc++-v3/testsuite/libstdc++-xmethods/list.cc
  63d39e620edeb5e4aaafa8737fe9af2d  libstdc++-v3/testsuite/libstdc++-xmethods/shared_ptr.cc
--- 115271,115277 ----
  e62ddba2d5699b2da68d1bd242a3536c  libstdc++-v3/testsuite/libstdc++-prettyprinters/whatis2.cc
  bce8bb63953cd2f76e9429708e884949  libstdc++-v3/testsuite/libstdc++-xmethods/array.cc
  a0e7ce5b03ed560d49265aed37b12cc7  libstdc++-v3/testsuite/libstdc++-xmethods/associative-containers.cc
! 9e231002b5b4bc22d6fc172c9850bc4f  libstdc++-v3/testsuite/libstdc++-xmethods/deque.cc
  c2226029ecf5fdb125ac9a4771b762d6  libstdc++-v3/testsuite/libstdc++-xmethods/forwardlist.cc
  a100879d6e7ba579a0ad08cdbbc26eb0  libstdc++-v3/testsuite/libstdc++-xmethods/list.cc
  63d39e620edeb5e4aaafa8737fe9af2d  libstdc++-v3/testsuite/libstdc++-xmethods/shared_ptr.cc
*************** d92e49da207bf912ef96adc5011f6de0  libstd
*** 115312,115318 ****
  c192d585fa9080c1f80ec4cec5ed1772  libstdc++-v3/testsuite/std/ranges/iota/iota_view.cc
  0cd77770d34e5f400c9eea5fad4e8690  libstdc++-v3/testsuite/std/ranges/iota/iterator.cc
  d3cf733a5c3197ae11dcddfeaa512b9e  libstdc++-v3/testsuite/std/ranges/iota/lwg3292_neg.cc
! 9b396381e8b657a19f1c2426a30d24a6  libstdc++-v3/testsuite/std/ranges/iota/max_size_type.cc
  667b44b08d3b7ae9548298cfe6bcaa85  libstdc++-v3/testsuite/std/ranges/iota/size.cc
  61222efbc6eff91f53bcecd1b3758779  libstdc++-v3/testsuite/std/ranges/istream_view.cc
  64080a8eda23a51d5fb499026fa0dae4  libstdc++-v3/testsuite/std/ranges/p2259.cc
--- 115556,115562 ----
  c192d585fa9080c1f80ec4cec5ed1772  libstdc++-v3/testsuite/std/ranges/iota/iota_view.cc
  0cd77770d34e5f400c9eea5fad4e8690  libstdc++-v3/testsuite/std/ranges/iota/iterator.cc
  d3cf733a5c3197ae11dcddfeaa512b9e  libstdc++-v3/testsuite/std/ranges/iota/lwg3292_neg.cc
! 1308c157b3c799e07aa9f74367dbee83  libstdc++-v3/testsuite/std/ranges/iota/max_size_type.cc
  667b44b08d3b7ae9548298cfe6bcaa85  libstdc++-v3/testsuite/std/ranges/iota/size.cc
  61222efbc6eff91f53bcecd1b3758779  libstdc++-v3/testsuite/std/ranges/istream_view.cc
  64080a8eda23a51d5fb499026fa0dae4  libstdc++-v3/testsuite/std/ranges/p2259.cc
*************** afe90a21fe8f6c5a2a97cbe9fc1ae49a  libstd
*** 115342,115355 ****
  6a2f0eb60479730d6b6f1b6d3436a913  libstdc++-v3/testsuite/std/time/is_pm/1.cc
  11a1b0b0dc2f0bf45b2b9a7608bff871  libstdc++-v3/testsuite/std/time/make12/1.cc
  dbc4514c5003ed2d1442d0676cbc4a02  libstdc++-v3/testsuite/std/time/make24/1.cc
! 2cc4ffcc2e7118793e56e0b07507f0c8  libstdc++-v3/testsuite/std/time/month/1.cc
  e012fe1eb95d2291f6ad6c8c5f1fe041  libstdc++-v3/testsuite/std/time/month_day/1.cc
  7f2aefa66b33b12663b816445f8e994a  libstdc++-v3/testsuite/std/time/month_day_last/1.cc
  dbb34b617244c645fd9bc32dcfb84663  libstdc++-v3/testsuite/std/time/month_weekday/1.cc
  cd3f90e806f2979c466207907984351b  libstdc++-v3/testsuite/std/time/month_weekday_last/1.cc
  75e70bdabe3c07e0218b303a1f3ecf37  libstdc++-v3/testsuite/std/time/syn_c++20.cc
  95fc10e252443f22e4022a1a82715453  libstdc++-v3/testsuite/std/time/traits/is_clock.cc
! 6cc3dff9098d0a0b4987232ffa4192a0  libstdc++-v3/testsuite/std/time/weekday/1.cc
  07a6c4c70bcfd13350693a1ad65f00fa  libstdc++-v3/testsuite/std/time/weekday_indexed/1.cc
  f9bb2332633525b6b855cb92aee40380  libstdc++-v3/testsuite/std/time/weekday_last/1.cc
  feca06bff9fab60b776db8b63e94508f  libstdc++-v3/testsuite/std/time/year/1.cc
--- 115586,115601 ----
  6a2f0eb60479730d6b6f1b6d3436a913  libstdc++-v3/testsuite/std/time/is_pm/1.cc
  11a1b0b0dc2f0bf45b2b9a7608bff871  libstdc++-v3/testsuite/std/time/make12/1.cc
  dbc4514c5003ed2d1442d0676cbc4a02  libstdc++-v3/testsuite/std/time/make24/1.cc
! f7b3c80c4e116dab00e6313d95ec8615  libstdc++-v3/testsuite/std/time/month/1.cc
! b7a5373ed0797aa495f69436f1939726  libstdc++-v3/testsuite/std/time/month/2.cc
  e012fe1eb95d2291f6ad6c8c5f1fe041  libstdc++-v3/testsuite/std/time/month_day/1.cc
  7f2aefa66b33b12663b816445f8e994a  libstdc++-v3/testsuite/std/time/month_day_last/1.cc
  dbb34b617244c645fd9bc32dcfb84663  libstdc++-v3/testsuite/std/time/month_weekday/1.cc
  cd3f90e806f2979c466207907984351b  libstdc++-v3/testsuite/std/time/month_weekday_last/1.cc
  75e70bdabe3c07e0218b303a1f3ecf37  libstdc++-v3/testsuite/std/time/syn_c++20.cc
  95fc10e252443f22e4022a1a82715453  libstdc++-v3/testsuite/std/time/traits/is_clock.cc
! 9c3ec11094d0ce79885b65560b53d78e  libstdc++-v3/testsuite/std/time/weekday/1.cc
! d6cb5f0804c9bd14e047294d47decf33  libstdc++-v3/testsuite/std/time/weekday/2.cc
  07a6c4c70bcfd13350693a1ad65f00fa  libstdc++-v3/testsuite/std/time/weekday_indexed/1.cc
  f9bb2332633525b6b855cb92aee40380  libstdc++-v3/testsuite/std/time/weekday_last/1.cc
  feca06bff9fab60b776db8b63e94508f  libstdc++-v3/testsuite/std/time/year/1.cc
*************** c2a97eca3a90bb49f2ca88521206e5d9  libstd
*** 115939,115948 ****
  d14e66c94eaa24942df81154214ce8cb  libstdc++-v3/testsuite/tr1/8_c_compatibility/complex/overloads_float.cc
  bad82e60eaf42f633348637ad6af882f  libstdc++-v3/testsuite/tr1/8_c_compatibility/complex/overloads_int.cc
  c2853e3ee835fcea365cd724ea5f2cdd  libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdint/types_std_tr1.cc
! 3836874d6428ebe546651be55a1a15ec  libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdio/functions.cc
  61f1a85f64525693cb564ca7e09a9927  libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdlib/functions.cc
  c603793d94afa72f146a44405619126c  libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdlib/types_std_tr1.cc
! 9f136149c3baef1fd7e1cbc98e5000d2  libstdc++-v3/testsuite/tr1/8_c_compatibility/cwchar/functions.cc
  db0e9942bd6d90868055ae7e838b0a21  libstdc++-v3/testsuite/tr1/8_c_compatibility/cwctype/functions.cc
  d9e471422e6ce045cb7591717d3deaac  libstdc++-v3/testsuite/tr1/headers/all.cc
  41ab99c3159e620c64444c0ff4619850  libstdc++-v3/testsuite/tr1/headers/c++200x/complex.cc
--- 116185,116194 ----
  d14e66c94eaa24942df81154214ce8cb  libstdc++-v3/testsuite/tr1/8_c_compatibility/complex/overloads_float.cc
  bad82e60eaf42f633348637ad6af882f  libstdc++-v3/testsuite/tr1/8_c_compatibility/complex/overloads_int.cc
  c2853e3ee835fcea365cd724ea5f2cdd  libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdint/types_std_tr1.cc
! 79c0be2a6ede9940c27ebca5afd095ac  libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdio/functions.cc
  61f1a85f64525693cb564ca7e09a9927  libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdlib/functions.cc
  c603793d94afa72f146a44405619126c  libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdlib/types_std_tr1.cc
! 42fa6cf0d06073c00e3fce1f11d3c1b6  libstdc++-v3/testsuite/tr1/8_c_compatibility/cwchar/functions.cc
  db0e9942bd6d90868055ae7e838b0a21  libstdc++-v3/testsuite/tr1/8_c_compatibility/cwctype/functions.cc
  d9e471422e6ce045cb7591717d3deaac  libstdc++-v3/testsuite/tr1/headers/all.cc
  41ab99c3159e620c64444c0ff4619850  libstdc++-v3/testsuite/tr1/headers/c++200x/complex.cc
*************** f11ef991bc17262fc656f24489ad5bc2  libstd
*** 115962,115967 ****
--- 116208,116214 ----
  2b4a18798ec59ec0ccb42b1b6dfeda0a  libstdc++-v3/testsuite/tr2/dynamic_bitset/pr58729.cc
  03f730c3136672f8cd1226742b5abe63  libstdc++-v3/testsuite/tr2/dynamic_bitset/pr87784.cc
  e3b7410ecb9a7c465b9bb748d97e0a49  libstdc++-v3/testsuite/tr2/dynamic_bitset/pr92059.cc
+ ecda9a957b2187c0e03c98357f9a8f67  libstdc++-v3/testsuite/tr2/dynamic_bitset/string.cc
  e38724df984f6f323ea00f7a077fec36  libstdc++-v3/testsuite/tr2/headers/all.cc
  6854641b62882de184c8f0cad1cafbad  libstdc++-v3/testsuite/tr2/headers/using_namespace_std_tr2.cc
  4b5b900d3ee66e7ce3cf094c41c8888c  libstdc++-v3/testsuite/util/atomic/wait_notify_util.h
*************** e7d5f77a9502136b76649f684199ef70  libstd
*** 116030,116036 ****
  4a9a9063a97988791213102aa96d7632  libstdc++-v3/testsuite/util/performance/time/elapsed_timer.hpp
  a5c6a20d7e5bf02bb86fe0dbf6cf4884  libstdc++-v3/testsuite/util/performance/time/timing_test_base.hpp
  f229f005fb6b0edfab2a25224f4aa670  libstdc++-v3/testsuite/util/pstl/pstl_test_config.h
! 315ea42a1d905634a70b6bfebf2b60e4  libstdc++-v3/testsuite/util/pstl/test_utils.h
  5dfc09db3b2617d5c19c9eaec6f64d67  libstdc++-v3/testsuite/util/regression/basic_type.hpp
  6eadb86a02b8dc5e99f6258f3034b19b  libstdc++-v3/testsuite/util/regression/common_type.hpp
  a31d5aa6650e7d3ba8be115d978a0d62  libstdc++-v3/testsuite/util/regression/rand/assoc/container_rand_regression_test.h
--- 116277,116283 ----
  4a9a9063a97988791213102aa96d7632  libstdc++-v3/testsuite/util/performance/time/elapsed_timer.hpp
  a5c6a20d7e5bf02bb86fe0dbf6cf4884  libstdc++-v3/testsuite/util/performance/time/timing_test_base.hpp
  f229f005fb6b0edfab2a25224f4aa670  libstdc++-v3/testsuite/util/pstl/pstl_test_config.h
! 5286838f82726826df274b6eb8e38ff1  libstdc++-v3/testsuite/util/pstl/test_utils.h
  5dfc09db3b2617d5c19c9eaec6f64d67  libstdc++-v3/testsuite/util/regression/basic_type.hpp
  6eadb86a02b8dc5e99f6258f3034b19b  libstdc++-v3/testsuite/util/regression/common_type.hpp
  a31d5aa6650e7d3ba8be115d978a0d62  libstdc++-v3/testsuite/util/regression/rand/assoc/container_rand_regression_test.h
*************** b1dbe55b9edd1c63e213a5d77d4daa77  libstd
*** 116061,116067 ****
  b6512138575fef873fceae65f127e888  libstdc++-v3/testsuite/util/testsuite_abi.h
  890a2ba99fd019bde86026b30a2431e6  libstdc++-v3/testsuite/util/testsuite_abi_check.cc
  6e266b277968cb27c93329a4b5ba47de  libstdc++-v3/testsuite/util/testsuite_allocator.cc
! 76bce70903547f6b2805d51a82152975  libstdc++-v3/testsuite/util/testsuite_allocator.h
  73cbff69a4a3732bb760848ce25110bf  libstdc++-v3/testsuite/util/testsuite_api.h
  5ed09a09458ce0f5233885ea4ff0c00a  libstdc++-v3/testsuite/util/testsuite_character.cc
  27d746bda1ad2167a2f4b476782ac174  libstdc++-v3/testsuite/util/testsuite_character.h
--- 116308,116314 ----
  b6512138575fef873fceae65f127e888  libstdc++-v3/testsuite/util/testsuite_abi.h
  890a2ba99fd019bde86026b30a2431e6  libstdc++-v3/testsuite/util/testsuite_abi_check.cc
  6e266b277968cb27c93329a4b5ba47de  libstdc++-v3/testsuite/util/testsuite_allocator.cc
! aa37b1c51691a6e5b257ed5b3883c3bd  libstdc++-v3/testsuite/util/testsuite_allocator.h
  73cbff69a4a3732bb760848ce25110bf  libstdc++-v3/testsuite/util/testsuite_api.h
  5ed09a09458ce0f5233885ea4ff0c00a  libstdc++-v3/testsuite/util/testsuite_character.cc
  27d746bda1ad2167a2f4b476782ac174  libstdc++-v3/testsuite/util/testsuite_character.h
*************** a412686870425c5fb3e383ec59146426  libstd
*** 116088,116094 ****
  039fb71c0474e0e873b0c17058f6787e  libstdc++-v3/testsuite/util/thread/all.h
  b950d655469c477755252b1e18009596  libtool-ldflags
  1936a81f2a04a996ff99c7ebdebc5003  libtool.m4
! 50e3c52d294280d8f3223126bd7c0e12  libvtv/ChangeLog
  ba2573e6811220314686b082dc2e0204  libvtv/Makefile.am
  b1170aae9472f26fdc8326737dc22aba  libvtv/Makefile.in
  3b765c4f4a0a0f606db1472bce2b8d29  libvtv/acinclude.m4
--- 116335,116341 ----
  039fb71c0474e0e873b0c17058f6787e  libstdc++-v3/testsuite/util/thread/all.h
  b950d655469c477755252b1e18009596  libtool-ldflags
  1936a81f2a04a996ff99c7ebdebc5003  libtool.m4
! b03547475365ba6f358b267f7bad9587  libvtv/ChangeLog
  ba2573e6811220314686b082dc2e0204  libvtv/Makefile.am
  b1170aae9472f26fdc8326737dc22aba  libvtv/Makefile.in
  3b765c4f4a0a0f606db1472bce2b8d29  libvtv/acinclude.m4
*************** e0e7ee6d9ede75d9d8822ab3b88d5080  libvtv
*** 116171,116177 ****
  05b984c47b23470a9bac686f5d51249e  libvtv/vtv_utils.h
  247597a3fcc5b5aa8bd923351c59d853  ltgcc.m4
  06c2854f9cfe5864b2885e0d0e9c512f  ltmain.sh
! 40a05a0efcbacc4548e850973d26d3b1  lto-plugin/ChangeLog
  50806c6aac4ef6d8e689dfe596507a3a  lto-plugin/Makefile.am
  5d97b067df8959a09d2d9392fca6774b  lto-plugin/Makefile.in
  75fc65b35d0a47ac098f7a278d37060b  lto-plugin/aclocal.m4
--- 116418,116424 ----
  05b984c47b23470a9bac686f5d51249e  libvtv/vtv_utils.h
  247597a3fcc5b5aa8bd923351c59d853  ltgcc.m4
  06c2854f9cfe5864b2885e0d0e9c512f  ltmain.sh
! 8d1a275647af986a06a4319be2ff9ee9  lto-plugin/ChangeLog
  50806c6aac4ef6d8e689dfe596507a3a  lto-plugin/Makefile.am
  5d97b067df8959a09d2d9392fca6774b  lto-plugin/Makefile.in
  75fc65b35d0a47ac098f7a278d37060b  lto-plugin/aclocal.m4
*************** dee72a6a60e99528b0d17bf3ff9a1e15  ltopti
*** 116184,116190 ****
  bc2f6032c98896249eadb56177c7d357  ltsugar.m4
  c30cd33c496505f13d9fbdb6970c7c33  ltversion.m4
  293853a13b7e218e3a4342cf85fbbf25  lt~obsolete.m4
! 28a64fafbd465ac45b99e801b303f508  maintainer-scripts/ChangeLog
  33c7bc2d2c55956dfac85a05d8a80eff  maintainer-scripts/README
  507e832af5f2d63b8a78eef217c807a7  maintainer-scripts/branch_changer.py
  c819510f0d438149c1518bda7b165ac4  maintainer-scripts/bugzilla-close-candidate.py
--- 116431,116437 ----
  bc2f6032c98896249eadb56177c7d357  ltsugar.m4
  c30cd33c496505f13d9fbdb6970c7c33  ltversion.m4
  293853a13b7e218e3a4342cf85fbbf25  lt~obsolete.m4
! c5d4720a61f135f6352038ef2ee28f09  maintainer-scripts/ChangeLog
  33c7bc2d2c55956dfac85a05d8a80eff  maintainer-scripts/README
  507e832af5f2d63b8a78eef217c807a7  maintainer-scripts/branch_changer.py
  c819510f0d438149c1518bda7b165ac4  maintainer-scripts/bugzilla-close-candidate.py
*************** cf2baa0854f564a7785307e79f155efc  symlin
*** 116205,116211 ****
  40bb1f4ce4a60a36d1ec50d66aeed4d1  test-driver
  cb06c1be6a41d68b0a65e0c1a91752bc  ylwrap
  03bf3ba8089f4bf475ef4035cf316a47  zlib/CMakeLists.txt
! 2ddb3e0e2465797bb389c92f87b62a6d  zlib/ChangeLog
  f10e5e9394787b288e91fed29533720a  zlib/ChangeLog.gcj
  0e9a37be8e3b85cc0ccf60504064c297  zlib/ChangeLog.jit
  b7a1991f01daea3efe108a215c5514a5  zlib/FAQ
--- 116452,116458 ----
  40bb1f4ce4a60a36d1ec50d66aeed4d1  test-driver
  cb06c1be6a41d68b0a65e0c1a91752bc  ylwrap
  03bf3ba8089f4bf475ef4035cf316a47  zlib/CMakeLists.txt
! 088b790ce8fb45f4faba82a93ba72343  zlib/ChangeLog
  f10e5e9394787b288e91fed29533720a  zlib/ChangeLog.gcj
  0e9a37be8e3b85cc0ccf60504064c297  zlib/ChangeLog.jit
  b7a1991f01daea3efe108a215c5514a5  zlib/FAQ
diff -Nrcpad gcc-12.3.0/NEWS gcc-12.4.0/NEWS
*** gcc-12.3.0/NEWS	Mon May  8 12:15:47 2023
--- gcc-12.4.0/NEWS	Thu Jun 20 08:11:22 2024
*************** see ONEWS.
*** 6,31 ****
  
  ======================================================================
  http://gcc.gnu.org/gcc-12/index.html
- 
                               GCC 12 Release Series
  
!    May 8, 2023
  
!    The GCC developers are pleased to announce the release of GCC 12.3.
  
     This release is a bug-fix release, containing fixes for regressions in
!    GCC 12.2 relative to previous releases of GCC.
  
  Release History
  
     GCC 12.3
!           May 8, 2023 ([1]changes, [2]documentation)
  
     GCC 12.2
!           Aug 19, 2022 ([3]changes, [4]documentation)
  
     GCC 12.1
!           May 6, 2022 ([5]changes, [6]documentation)
  
  References and Acknowledgements
  
--- 6,33 ----
  
  ======================================================================
  http://gcc.gnu.org/gcc-12/index.html
                               GCC 12 Release Series
  
!    Jun 20, 2024
  
!    The GCC developers are pleased to announce the release of GCC 12.4.
  
     This release is a bug-fix release, containing fixes for regressions in
!    GCC 12.3 relative to previous releases of GCC.
  
  Release History
  
+    GCC 12.4
+           Jun 20, 2024 ([1]changes, [2]documentation)
+ 
     GCC 12.3
!           May 8, 2023 ([3]changes, [4]documentation)
  
     GCC 12.2
!           Aug 19, 2022 ([5]changes, [6]documentation)
  
     GCC 12.1
!           May 6, 2022 ([7]changes, [8]documentation)
  
  References and Acknowledgements
  
*************** References and Acknowledgements
*** 33,90 ****
     supports several other languages aside from C, it now stands for the
     GNU Compiler Collection.
  
-    A list of [7]successful builds is updated as new information becomes
-    available.
- 
     The GCC developers would like to thank the numerous people that have
     contributed new features, improvements, bug fixes, and other changes as
!    well as test results to GCC. This [8]amazing group of volunteers is
     what makes GCC successful.
  
!    For additional information about GCC please refer to the [9]GCC project
!    web site or contact the [10]GCC development mailing list.
  
!    To obtain GCC please use [11]our mirror sites or [12]our version
     control system.
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [13]GCC manuals. If that fails, the
!     [14]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [15]gcc@gcc.gnu.org. All of [16]our lists have public
      archives.
  
!    Copyright (C) [17]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [18]maintained by the GCC team. Last modified
!    2023-05-08.
  
  References
  
!    1. http://gcc.gnu.org/gcc-12/changes.html
!    2. http://gcc.gnu.org/onlinedocs/12.3.0/
!    3. http://gcc.gnu.org/gcc-12/changes.html
!    4. http://gcc.gnu.org/onlinedocs/12.2.0/
!    5. http://gcc.gnu.org/gcc-12/changes.html
!    6. http://gcc.gnu.org/onlinedocs/12.1.0/
!    7. http://gcc.gnu.org/gcc-12/buildstat.html
!    8. http://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Contributors.html
!    9. http://gcc.gnu.org/index.html
!   10. mailto:gcc@gcc.gnu.org
!   11. http://gcc.gnu.org/mirrors.html
!   12. http://gcc.gnu.org/git.html
!   13. https://gcc.gnu.org/onlinedocs/
!   14. mailto:gcc-help@gcc.gnu.org
!   15. mailto:gcc@gcc.gnu.org
!   16. https://gcc.gnu.org/lists.html
!   17. https://www.fsf.org/
!   18. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-12/changes.html
- 
                               GCC 12 Release Series
                          Changes, New Features, and Fixes
  
--- 35,89 ----
     supports several other languages aside from C, it now stands for the
     GNU Compiler Collection.
  
     The GCC developers would like to thank the numerous people that have
     contributed new features, improvements, bug fixes, and other changes as
!    well as test results to GCC. This [9]amazing group of volunteers is
     what makes GCC successful.
  
!    For additional information about GCC please refer to the [10]GCC
!    project web site or contact the [11]GCC development mailing list.
  
!    To obtain GCC please use [12]our mirror sites or [13]our version
     control system.
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [14]GCC manuals. If that fails, the
!     [15]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [16]gcc@gcc.gnu.org. All of [17]our lists have public
      archives.
  
!    Copyright (C) [18]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [19]maintained by the GCC team. Last modified
!    2024-06-20.
  
  References
  
!    1. https://gcc.gnu.org/gcc-12/changes.html
!    2. https://gcc.gnu.org/onlinedocs/12.4.0/
!    3. https://gcc.gnu.org/gcc-12/changes.html
!    4. https://gcc.gnu.org/onlinedocs/12.3.0/
!    5. https://gcc.gnu.org/gcc-12/changes.html
!    6. https://gcc.gnu.org/onlinedocs/12.2.0/
!    7. https://gcc.gnu.org/gcc-12/changes.html
!    8. https://gcc.gnu.org/onlinedocs/12.1.0/
!    9. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Contributors.html
!   10. https://gcc.gnu.org/index.html
!   11. mailto:gcc@gcc.gnu.org
!   12. https://gcc.gnu.org/mirrors.html
!   13. https://gcc.gnu.org/git.html
!   14. https://gcc.gnu.org/onlinedocs/
!   15. mailto:gcc-help@gcc.gnu.org
!   16. mailto:gcc@gcc.gnu.org
!   17. https://gcc.gnu.org/lists.html
!   18. https://www.fsf.org/
!   19. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-12/changes.html
                               GCC 12 Release Series
                          Changes, New Features, and Fixes
  
*************** Caveats
*** 161,170 ****
  
  General Improvements
  
!      * Vectorization is enabled at -O2 which is now equivalent to the
!        original -O2 -ftree-vectorize -fvect-cost-model=very-cheap. Note
!        that default vectorizer cost model has been changed which used to
!        behave as -fvect-cost-model=cheap were specified.
       * GCC now supports the [7]ShadowCallStack sanitizer, which can be
         enabled using the command-line option
         [8]-fsanitize=shadow-call-stack. This sanitizer currently only
--- 160,170 ----
  
  General Improvements
  
!      * Vectorization is enabled at -O2 which is now equivalent to what
!        would have been -O2 -ftree-vectorize -fvect-cost-model=very-cheap
!        in the past. Note that the default vectorizer cost model has been
!        changed; it used to behave as if -fvect-cost-model=cheap had been
!        specified.
       * GCC now supports the [7]ShadowCallStack sanitizer, which can be
         enabled using the command-line option
         [8]-fsanitize=shadow-call-stack. This sanitizer currently only
*************** New Targets and Target Specific Improvem
*** 577,584 ****
    BPF
  
       * Support for CO-RE (compile-once, run-everywhere) has been added to
!        the BPF backend. CO-RE allows to compile portable BPF programs that
!        are able to run among different versions of the Linux kernel.
  
    IA-32/x86-64
  
--- 577,584 ----
    BPF
  
       * Support for CO-RE (compile-once, run-everywhere) has been added to
!        the BPF back end. CO-RE allows to compile portable BPF programs
!        that are able to run among different versions of the Linux kernel.
  
    IA-32/x86-64
  
*************** New Targets and Target Specific Improvem
*** 655,661 ****
         functions has been rewritten to be easier and less error-prone to
         maintain. Every attempt has been made to ensure that the new
         behavior matches the old behavior, but inevitably some bugs can be
!        expected. Please report any problems via [104]GCC Bugzilla.
       * The built-in functions __builtin_get_texasr, __builtin_get_texasru,
         __builtin_get_tfhar, __builtin_get_tfiar, __builtin_set_texasr,
         __builtin_set_texasru, __builtin_set_tfhar, and __builtin_set_tfiar
--- 655,661 ----
         functions has been rewritten to be easier and less error-prone to
         maintain. Every attempt has been made to ensure that the new
         behavior matches the old behavior, but inevitably some bugs can be
!        expected. Please [104]report any problems.
       * The built-in functions __builtin_get_texasr, __builtin_get_texasru,
         __builtin_get_tfhar, __builtin_get_tfiar, __builtin_set_texasr,
         __builtin_set_texasru, __builtin_set_tfhar, and __builtin_set_tfiar
*************** New Targets and Target Specific Improvem
*** 679,685 ****
         [106]announcement
       * New ISA extension support for zba, zbb, zbc, zbs was added.
       * New ISA extension support for vector and scalar crypto was added,
!        only support architecture testing marco and -march= parsing.
       * The option -mtune=thead-c906 is added to tune for T-HEAD c906
         cores.
       * libstdc++ no longer attempts to detect built-in atomics.
--- 679,685 ----
         [106]announcement
       * New ISA extension support for zba, zbb, zbc, zbs was added.
       * New ISA extension support for vector and scalar crypto was added,
!        only support architecture testing macro and -march= parsing.
       * The option -mtune=thead-c906 is added to tune for T-HEAD c906
         cores.
       * libstdc++ no longer attempts to detect built-in atomics.
*************** GCC 12.3
*** 824,830 ****
    x86-64
  
       * GCC now supports AMD CPUs based on the znver4 core via
!        -march=znver4. The switch makes GCC consider using 512 bit vectors
         when auto-vectorizing.
  
     This is the [141]list of problem reports (PRs) from GCC's bug tracking
--- 824,830 ----
    x86-64
  
       * GCC now supports AMD CPUs based on the znver4 core via
!        -march=znver4. The switch makes GCC consider using 512-bit vectors
         when auto-vectorizing.
  
     This is the [141]list of problem reports (PRs) from GCC's bug tracking
*************** GCC 12.3
*** 834,842 ****
  
  GCC 12.4
  
-    Note: GCC 12.4 has not been released yet, so this section is a
-    work-in-progress.
- 
     This is the [142]list of problem reports (PRs) from GCC's bug tracking
     system that are known to be fixed in the 12.4 release. This list might
     not be complete (that is, it is possible that some PRs that have been
--- 834,839 ----
*************** GCC 12.4
*** 855,878 ****
     provided this notice is preserved.
  
     These pages are [148]maintained by the GCC team. Last modified
!    2023-05-08.
  
  References
  
!    1. http://gcc.gnu.org/gcc-12/porting_to.html
!    2. http://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/PR102024
     4. https://gcc.gnu.org/PR42217
!    5. http://gcc.gnu.org/gcc-12/changes.html#mips_zero_width_fields
     6. https://gcc.gnu.org/install/specific.html
     7. https://clang.llvm.org/docs/ShadowCallStack.html
     8. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Instrumentation-Options.html#index-fsanitize_003dshadow-call-stack
     9. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/libgomp/OpenMP-Implementation-Status.html
    10. https://www.openacc.org/
!   11. https://gcc.gnu.org/wiki/OpenACC/Implementation%20Status#status-12
    12. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/libgomp/Enabling-OpenACC.html
!   13. http://gcc.gnu.org/gcc-12/changes.html#amdgcn
!   14. http://gcc.gnu.org/gcc-12/changes.html#nvptx
    15. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Optimize-Options.html#index-param
    16. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Warning-Options.html#index-Wopenacc-parallelism
    17. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/C-Dialect-Options.html#index-foffload-options
--- 852,875 ----
     provided this notice is preserved.
  
     These pages are [148]maintained by the GCC team. Last modified
!    2024-06-20.
  
  References
  
!    1. https://gcc.gnu.org/gcc-12/porting_to.html
!    2. https://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/PR102024
     4. https://gcc.gnu.org/PR42217
!    5. https://gcc.gnu.org/gcc-12/changes.html#mips_zero_width_fields
     6. https://gcc.gnu.org/install/specific.html
     7. https://clang.llvm.org/docs/ShadowCallStack.html
     8. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Instrumentation-Options.html#index-fsanitize_003dshadow-call-stack
     9. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/libgomp/OpenMP-Implementation-Status.html
    10. https://www.openacc.org/
!   11. https://gcc.gnu.org/wiki/OpenACC/Implementation Status#status-12
    12. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/libgomp/Enabling-OpenACC.html
!   13. https://gcc.gnu.org/gcc-12/changes.html#amdgcn
!   14. https://gcc.gnu.org/gcc-12/changes.html#nvptx
    15. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Optimize-Options.html#index-param
    16. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Warning-Options.html#index-Wopenacc-parallelism
    17. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/C-Dialect-Options.html#index-foffload-options
*************** References
*** 962,968 ****
   101. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/jit/topics/expressions.html#c.gcc_jit_context_new_cast
   102. https://gcc.gnu.org/PR95498
   103. https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/arm-a-profile-architecture-developments-2020
!  104. https://gcc.gnu.org/bugzilla/
   105. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Named-Address-Spaces.html#PRU-Named-Address-Spaces
   106. https://groups.google.com/a/groups.riscv.org/g/sw-dev/c/aE1ZeHHCYf4
   107. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Static-Analyzer-Options.html#index-Wanalyzer-use-of-uninitialized-value
--- 959,965 ----
   101. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/jit/topics/expressions.html#c.gcc_jit_context_new_cast
   102. https://gcc.gnu.org/PR95498
   103. https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/arm-a-profile-architecture-developments-2020
!  104. https://gcc.gnu.org/bugs/
   105. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Named-Address-Spaces.html#PRU-Named-Address-Spaces
   106. https://groups.google.com/a/groups.riscv.org/g/sw-dev/c/aE1ZeHHCYf4
   107. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Static-Analyzer-Options.html#index-Wanalyzer-use-of-uninitialized-value
*************** References
*** 1009,1034 ****
   148. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-11/index.html
- 
                               GCC 11 Release Series
  
!    April 21, 2022
  
!    The GCC developers are pleased to announce the release of GCC 11.3.
  
     This release is a bug-fix release, containing fixes for regressions in
!    GCC 11.2 relative to previous releases of GCC.
  
  Release History
  
     GCC 11.3
!           April 21, 2022 ([1]changes, [2]documentation)
  
     GCC 11.2
!           July 28, 2021 ([3]changes, [4]documentation)
  
     GCC 11.1
!           April 27, 2021 ([5]changes, [6]documentation)
  
  References and Acknowledgements
  
--- 1006,1033 ----
   148. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-11/index.html
                               GCC 11 Release Series
  
!    May 29, 2023
  
!    The GCC developers are pleased to announce the release of GCC 11.4.
  
     This release is a bug-fix release, containing fixes for regressions in
!    GCC 11.3 relative to previous releases of GCC.
  
  Release History
  
+    GCC 11.4
+           May 29, 2023 ([1]changes, [2]documentation)
+ 
     GCC 11.3
!           April 21, 2022 ([3]changes, [4]documentation)
  
     GCC 11.2
!           July 28, 2021 ([5]changes, [6]documentation)
  
     GCC 11.1
!           April 27, 2021 ([7]changes, [8]documentation)
  
  References and Acknowledgements
  
*************** References and Acknowledgements
*** 1036,1093 ****
     supports several other languages aside from C, it now stands for the
     GNU Compiler Collection.
  
-    A list of [7]successful builds is updated as new information becomes
-    available.
- 
     The GCC developers would like to thank the numerous people that have
     contributed new features, improvements, bug fixes, and other changes as
!    well as test results to GCC. This [8]amazing group of volunteers is
     what makes GCC successful.
  
!    For additional information about GCC please refer to the [9]GCC project
!    web site or contact the [10]GCC development mailing list.
  
!    To obtain GCC please use [11]our mirror sites or [12]our version
     control system.
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [13]GCC manuals. If that fails, the
!     [14]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [15]gcc@gcc.gnu.org. All of [16]our lists have public
      archives.
  
!    Copyright (C) [17]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [18]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
!    1. http://gcc.gnu.org/gcc-11/changes.html
!    2. http://gcc.gnu.org/onlinedocs/11.3.0/
!    3. http://gcc.gnu.org/gcc-11/changes.html
!    4. http://gcc.gnu.org/onlinedocs/11.2.0/
!    5. http://gcc.gnu.org/gcc-11/changes.html
!    6. http://gcc.gnu.org/onlinedocs/11.1.0/
!    7. http://gcc.gnu.org/gcc-11/buildstat.html
!    8. http://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Contributors.html
!    9. http://gcc.gnu.org/index.html
!   10. mailto:gcc@gcc.gnu.org
!   11. http://gcc.gnu.org/mirrors.html
!   12. http://gcc.gnu.org/git.html
!   13. https://gcc.gnu.org/onlinedocs/
!   14. mailto:gcc-help@gcc.gnu.org
!   15. mailto:gcc@gcc.gnu.org
!   16. https://gcc.gnu.org/lists.html
!   17. https://www.fsf.org/
!   18. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-11/changes.html
- 
                               GCC 11 Release Series
                          Changes, New Features, and Fixes
  
--- 1035,1089 ----
     supports several other languages aside from C, it now stands for the
     GNU Compiler Collection.
  
     The GCC developers would like to thank the numerous people that have
     contributed new features, improvements, bug fixes, and other changes as
!    well as test results to GCC. This [9]amazing group of volunteers is
     what makes GCC successful.
  
!    For additional information about GCC please refer to the [10]GCC
!    project web site or contact the [11]GCC development mailing list.
  
!    To obtain GCC please use [12]our mirror sites or [13]our version
     control system.
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [14]GCC manuals. If that fails, the
!     [15]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [16]gcc@gcc.gnu.org. All of [17]our lists have public
      archives.
  
!    Copyright (C) [18]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [19]maintained by the GCC team. Last modified
!    2024-05-30.
  
  References
  
!    1. https://gcc.gnu.org/gcc-11/changes.html
!    2. https://gcc.gnu.org/onlinedocs/11.4.0/
!    3. https://gcc.gnu.org/gcc-11/changes.html
!    4. https://gcc.gnu.org/onlinedocs/11.3.0/
!    5. https://gcc.gnu.org/gcc-11/changes.html
!    6. https://gcc.gnu.org/onlinedocs/11.2.0/
!    7. https://gcc.gnu.org/gcc-11/changes.html
!    8. https://gcc.gnu.org/onlinedocs/11.1.0/
!    9. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Contributors.html
!   10. https://gcc.gnu.org/index.html
!   11. mailto:gcc@gcc.gnu.org
!   12. https://gcc.gnu.org/mirrors.html
!   13. https://gcc.gnu.org/git.html
!   14. https://gcc.gnu.org/onlinedocs/
!   15. mailto:gcc-help@gcc.gnu.org
!   16. mailto:gcc@gcc.gnu.org
!   17. https://gcc.gnu.org/lists.html
!   18. https://www.fsf.org/
!   19. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-11/changes.html
                               GCC 11 Release Series
                          Changes, New Features, and Fixes
  
*************** General Improvements
*** 1140,1149 ****
              and
            + multicolumn characters (requiring more than one column to
              display in a monospace font)
!        For example, the character p ("GREEK SMALL LETTER PI (U+03C0)")
         occupies one column, and its UTF-8 encoding requires two bytes; the
!        character &#x1F642; ("SLIGHTLY SMILING FACE (U+1F642)") occupies
!        two columns, and its UTF-8 encoding requires four bytes.
         In GCC 11 the column numbers default to being column numbers,
         respecting multi-column characters. The old behavior can be
         restored using a new option [7]-fdiagnostics-column-unit=byte.
--- 1136,1145 ----
              and
            + multicolumn characters (requiring more than one column to
              display in a monospace font)
!        For example, the character π ("GREEK SMALL LETTER PI (U+03C0)")
         occupies one column, and its UTF-8 encoding requires two bytes; the
!        character 🙂 ("SLIGHTLY SMILING FACE (U+1F642)") occupies two
!        columns, and its UTF-8 encoding requires four bytes.
         In GCC 11 the column numbers default to being column numbers,
         respecting multi-column characters. The old behavior can be
         restored using a new option [7]-fdiagnostics-column-unit=byte.
*************** New Languages and Language specific impr
*** 1454,1460 ****
              core.stdc.config module.
            + User-defined attributes can now be used to annotate enum
              members, alias declarations, and function parameters.
!           + Templates alias parameters can now be instantiated with basic
              types such as int or void function().
            + The mixin construct can now be used as types in the form
              mixin(string) var.
--- 1450,1456 ----
              core.stdc.config module.
            + User-defined attributes can now be used to annotate enum
              members, alias declarations, and function parameters.
!           + Template alias parameters can now be instantiated with basic
              types such as int or void function().
            + The mixin construct can now be used as types in the form
              mixin(string) var.
*************** New Targets and Target Specific Improvem
*** 1575,1581 ****
    AArch64 & arm
  
       * A number of new CPUs are supported through arguments to the -mcpu
!        and -mtune options in both the arm and aarch64 backends (GCC
         identifiers in parentheses):
            + Arm Cortex-A78 (cortex-a78).
            + Arm Cortex-A78AE (cortex-a78ae).
--- 1571,1577 ----
    AArch64 & arm
  
       * A number of new CPUs are supported through arguments to the -mcpu
!        and -mtune options in both the arm and aarch64 back ends (GCC
         identifiers in parentheses):
            + Arm Cortex-A78 (cortex-a78).
            + Arm Cortex-A78AE (cortex-a78ae).
*************** Operating Systems
*** 1718,1725 ****
  
    AIX
  
!      * GCC for AIX can be built as a 64 bit application and the runtime is
!        built as FAT libraries containing both 32 bit and 64 bit objects.
       * Support AIX Vector Extended ABI with -mabi=vec-extabi.
       * Thread-Local uninitiated data placed in local common section.
       * Use thread-safe access in ctype.
--- 1714,1721 ----
  
    AIX
  
!      * GCC for AIX can be built as a 64-bit application and the runtime is
!        built as FAT libraries containing both 32-bit and 64-bit objects.
       * Support AIX Vector Extended ABI with -mabi=vec-extabi.
       * Thread-Local uninitiated data placed in local common section.
       * Use thread-safe access in ctype.
*************** GCC 11.3
*** 1786,1791 ****
--- 1782,1794 ----
     not be complete (that is, it is possible that some PRs that have been
     fixed are not listed here).
  
+ GCC 11.4
+ 
+    This is the [70]list of problem reports (PRs) from GCC's bug tracking
+    system that are known to be fixed in the 11.4 release. This list might
+    not be complete (that is, it is possible that some PRs that have been
+    fixed are not listed here).
+ 
    Target Specific Changes
  
      x86-64
*************** GCC 11.3
*** 1802,1824 ****
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [70]GCC manuals. If that fails, the
!     [71]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [72]gcc@gcc.gnu.org. All of [73]our lists have public
      archives.
  
!    Copyright (C) [74]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [75]maintained by the GCC team. Last modified
!    2023-02-02.
  
  References
  
!    1. http://gcc.gnu.org/gcc-11/porting_to.html
!    2. http://gcc.gnu.org/onlinedocs/index.html#current
     3. https://wg21.link/p0522r0
     4. https://gcc.gnu.org/pipermail/gcc-patches/2020-May/546494.html
     5. https://github.com/google/sanitizers/wiki/ThreadSanitizerCppManual
--- 1805,1827 ----
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [71]GCC manuals. If that fails, the
!     [72]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [73]gcc@gcc.gnu.org. All of [74]our lists have public
      archives.
  
!    Copyright (C) [75]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [76]maintained by the GCC team. Last modified
!    2024-06-14.
  
  References
  
!    1. https://gcc.gnu.org/gcc-11/porting_to.html
!    2. https://gcc.gnu.org/onlinedocs/index.html#current
     3. https://wg21.link/p0522r0
     4. https://gcc.gnu.org/pipermail/gcc-patches/2020-May/546494.html
     5. https://github.com/google/sanitizers/wiki/ThreadSanitizerCppManual
*************** References
*** 1837,1843 ****
    18. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Optimize-Options.html#index-fprofile-values
    19. https://www.openmp.org/specifications/
    20. https://www.openacc.org/
!   21. https://gcc.gnu.org/wiki/OpenACC/Implementation%20Status#status-11
    22. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/libgomp/Enabling-OpenACC.html
    23. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Common-Function-Attributes.html#index-no_005fstack_005fprotector-function-attribute
    24. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Common-Function-Attributes.html#index-malloc-function-attribute
--- 1840,1846 ----
    18. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Optimize-Options.html#index-fprofile-values
    19. https://www.openmp.org/specifications/
    20. https://www.openacc.org/
!   21. https://gcc.gnu.org/wiki/OpenACC/Implementation Status#status-11
    22. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/libgomp/Enabling-OpenACC.html
    23. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Common-Function-Attributes.html#index-no_005fstack_005fprotector-function-attribute
    24. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Common-Function-Attributes.html#index-malloc-function-attribute
*************** References
*** 1853,1860 ****
    34. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Warning-Options.html#index-Wuninitialized
    35. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Warning-Options.html#index-Warray-parameter
    36. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Warning-Options.html#index-Wvla-parameter
!   37. http://gcc.gnu.org/projects/cxx-status.html#cxx20
!   38. http://gcc.gnu.org/projects/cxx-status.html#cxx23
    39. https://gcc.gnu.org/PR41437
    40. https://gcc.gnu.org/PR95307
    41. https://gcc.gnu.org/PR97518
--- 1856,1863 ----
    34. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Warning-Options.html#index-Wuninitialized
    35. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Warning-Options.html#index-Warray-parameter
    36. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Warning-Options.html#index-Wvla-parameter
!   37. https://gcc.gnu.org/projects/cxx-status.html#cxx20
!   38. https://gcc.gnu.org/projects/cxx-status.html#cxx23
    39. https://gcc.gnu.org/PR41437
    40. https://gcc.gnu.org/PR95307
    41. https://gcc.gnu.org/PR97518
*************** References
*** 1865,1871 ****
    46. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wmismatched-new-delete
    47. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wvexing-parse
    48. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Warning-Options.html#index-Wnonnull
!   49. http://gcc.gnu.org/gcc-5/changes.html#jit
    50. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/jit/topics/compatibility.html
    51. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/jit/topics/expressions.html#c.gcc_jit_global_set_initializer
    52. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/jit/topics/asm.html
--- 1868,1874 ----
    46. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wmismatched-new-delete
    47. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wvexing-parse
    48. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Warning-Options.html#index-Wnonnull
!   49. https://gcc.gnu.org/gcc-5/changes.html#jit
    50. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/jit/topics/compatibility.html
    51. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/jit/topics/expressions.html#c.gcc_jit_global_set_initializer
    52. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/jit/topics/asm.html
*************** References
*** 1886,1923 ****
    67. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=11.0
    68. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=11.2
    69. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=11.3
!   70. https://gcc.gnu.org/onlinedocs/
!   71. mailto:gcc-help@gcc.gnu.org
!   72. mailto:gcc@gcc.gnu.org
!   73. https://gcc.gnu.org/lists.html
!   74. https://www.fsf.org/
!   75. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-10/index.html
- 
                               GCC 10 Release Series
  
!    June 28, 2022
  
     The [1]GNU project and the GCC developers are pleased to announce the
!    release of GCC 10.4.
  
     This release is a bug-fix release, containing fixes for regressions in
!    GCC 10.3 relative to previous releases of GCC.
  
  Release History
  
     GCC 10.4
!           June 28, 2022 ([2]changes, [3]documentation)
  
     GCC 10.3
!           April 8, 2021 ([4]changes, [5]documentation)
  
     GCC 10.2
!           July 23, 2020 ([6]changes, [7]documentation)
  
     GCC 10.1
!           May 7, 2020 ([8]changes, [9]documentation)
  
  References and Acknowledgements
  
--- 1889,1931 ----
    67. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=11.0
    68. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=11.2
    69. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=11.3
!   70. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=11.4
!   71. https://gcc.gnu.org/onlinedocs/
!   72. mailto:gcc-help@gcc.gnu.org
!   73. mailto:gcc@gcc.gnu.org
!   74. https://gcc.gnu.org/lists.html
!   75. https://www.fsf.org/
!   76. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-10/index.html
                               GCC 10 Release Series
  
!    (This release series is no longer supported.)
! 
!    July, 7, 2023
  
     The [1]GNU project and the GCC developers are pleased to announce the
!    release of GCC 10.5.
  
     This release is a bug-fix release, containing fixes for regressions in
!    GCC 10.4 relative to previous releases of GCC.
  
  Release History
  
+    GCC 10.5
+           July 7, 2023 ([2]changes, [3]documentation)
+ 
     GCC 10.4
!           June 28, 2022 ([4]changes, [5]documentation)
  
     GCC 10.3
!           April 8, 2021 ([6]changes, [7]documentation)
  
     GCC 10.2
!           July 23, 2020 ([8]changes, [9]documentation)
  
     GCC 10.1
!           May 7, 2020 ([10]changes, [11]documentation)
  
  References and Acknowledgements
  
*************** References and Acknowledgements
*** 1925,1985 ****
     supports several other languages aside from C, it now stands for the
     GNU Compiler Collection.
  
-    A list of [10]successful builds is updated as new information becomes
-    available.
- 
     The GCC developers would like to thank the numerous people that have
     contributed new features, improvements, bug fixes, and other changes as
!    well as test results to GCC. This [11]amazing group of volunteers is
     what makes GCC successful.
  
!    For additional information about GCC please refer to the [12]GCC
!    project web site or contact the [13]GCC development mailing list.
  
!    To obtain GCC please use [14]our mirror sites or [15]our version
     control system.
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [16]GCC manuals. If that fails, the
!     [17]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [18]gcc@gcc.gnu.org. All of [19]our lists have public
      archives.
  
!    Copyright (C) [20]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [21]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-10/changes.html
!    3. http://gcc.gnu.org/onlinedocs/10.4.0/
!    4. http://gcc.gnu.org/gcc-10/changes.html
!    5. http://gcc.gnu.org/onlinedocs/10.3.0/
!    6. http://gcc.gnu.org/gcc-10/changes.html
!    7. http://gcc.gnu.org/onlinedocs/10.2.0/
!    8. http://gcc.gnu.org/gcc-10/changes.html
!    9. http://gcc.gnu.org/onlinedocs/10.1.0/
!   10. http://gcc.gnu.org/gcc-10/buildstat.html
!   11. http://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Contributors.html
!   12. http://gcc.gnu.org/index.html
!   13. mailto:gcc@gcc.gnu.org
!   14. http://gcc.gnu.org/mirrors.html
!   15. http://gcc.gnu.org/git.html
!   16. https://gcc.gnu.org/onlinedocs/
!   17. mailto:gcc-help@gcc.gnu.org
!   18. mailto:gcc@gcc.gnu.org
!   19. https://gcc.gnu.org/lists.html
!   20. https://www.fsf.org/
!   21. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-10/changes.html
- 
                               GCC 10 Release Series
                          Changes, New Features, and Fixes
  
--- 1933,1990 ----
     supports several other languages aside from C, it now stands for the
     GNU Compiler Collection.
  
     The GCC developers would like to thank the numerous people that have
     contributed new features, improvements, bug fixes, and other changes as
!    well as test results to GCC. This [12]amazing group of volunteers is
     what makes GCC successful.
  
!    For additional information about GCC please refer to the [13]GCC
!    project web site or contact the [14]GCC development mailing list.
  
!    To obtain GCC please use [15]our mirror sites or [16]our version
     control system.
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [17]GCC manuals. If that fails, the
!     [18]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [19]gcc@gcc.gnu.org. All of [20]our lists have public
      archives.
  
!    Copyright (C) [21]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [22]maintained by the GCC team. Last modified
!    2024-05-30.
  
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-10/changes.html
!    3. https://gcc.gnu.org/onlinedocs/10.5.0/
!    4. https://gcc.gnu.org/gcc-10/changes.html
!    5. https://gcc.gnu.org/onlinedocs/10.4.0/
!    6. https://gcc.gnu.org/gcc-10/changes.html
!    7. https://gcc.gnu.org/onlinedocs/10.3.0/
!    8. https://gcc.gnu.org/gcc-10/changes.html
!    9. https://gcc.gnu.org/onlinedocs/10.2.0/
!   10. https://gcc.gnu.org/gcc-10/changes.html
!   11. https://gcc.gnu.org/onlinedocs/10.1.0/
!   12. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Contributors.html
!   13. https://gcc.gnu.org/index.html
!   14. mailto:gcc@gcc.gnu.org
!   15. https://gcc.gnu.org/mirrors.html
!   16. https://gcc.gnu.org/git.html
!   17. https://gcc.gnu.org/onlinedocs/
!   18. mailto:gcc-help@gcc.gnu.org
!   19. mailto:gcc@gcc.gnu.org
!   20. https://gcc.gnu.org/lists.html
!   21. https://www.fsf.org/
!   22. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-10/changes.html
                               GCC 10 Release Series
                          Changes, New Features, and Fixes
  
*************** New Languages and Language-Specific Impr
*** 2147,2155 ****
         the input encoding (UTF-8, by default), in addition to the UCN
         syntax (\uNNNN or \UNNNNNNNN) that is already supported:
  
! static const int p = 3;
! int get_na�ve_pi() {
!   return p;
  }
  
    C
--- 2152,2160 ----
         the input encoding (UTF-8, by default), in addition to the UCN
         syntax (\uNNNN or \UNNNNNNNN) that is already supported:
  
! static const int π = 3;
! int get_naïve_pi() {
!   return π;
  }
  
    C
*************** typedef svbool_t pred512 __attribute__((
*** 2429,2435 ****
              one. Previously it would always use SVE if possible.
            + If a vector loop uses Advanced SIMD rather than SVE, the
              vectorizer now considers using SVE to vectorize the left-over
!             elements (the "scalar tail" or "epilog").
            + Besides these specific points, there have been many general
              improvements to the way that the vectorizer uses SVE.
       * The -mbranch-protection=pac-ret option now accepts the optional
--- 2434,2440 ----
              one. Previously it would always use SVE if possible.
            + If a vector loop uses Advanced SIMD rather than SVE, the
              vectorizer now considers using SVE to vectorize the left-over
!             elements (the “scalar tail” or “epilog”).
            + Besides these specific points, there have been many general
              improvements to the way that the vectorizer uses SVE.
       * The -mbranch-protection=pac-ret option now accepts the optional
*************** GCC 10.4
*** 2718,2745 ****
         MMX no longer changes how they are passed nor returned. This ABI
         change is now diagnosed with -Wpsabi.
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [61]GCC manuals. If that fails, the
!     [62]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [63]gcc@gcc.gnu.org. All of [64]our lists have public
      archives.
  
!    Copyright (C) [65]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [66]maintained by the GCC team. Last modified
!    2023-03-11.
  
  References
  
!    1. http://gcc.gnu.org/gcc-10/porting_to.html
!    2. http://gcc.gnu.org/onlinedocs/index.html#current
!    3. http://gcc.gnu.org/gcc-10/changes.html#empty_base
     4. https://www.mpfr.org/
!    5. http://gcc.gnu.org/gcc-10/changes.html#iterator_base
     6. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/cpp/_005f_005fhas_005fbuiltin.html#g_t_005f_005fhas_005fbuiltin
     7. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Optimize-Options.html#index-fno-allocation-dce
     8. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Optimize-Options.html#index-fprofile-partial-training
--- 2723,2757 ----
         MMX no longer changes how they are passed nor returned. This ABI
         change is now diagnosed with -Wpsabi.
  
+ GCC 10.5
+ 
+    This is the [61]list of problem reports (PRs) from GCC's bug tracking
+    system that are known to be fixed in the 10.5 release. This list might
+    not be complete (that is, it is possible that some PRs that have been
+    fixed are not listed here).
+ 
  
      For questions related to the use of GCC, please consult these web
!     pages and the [62]GCC manuals. If that fails, the
!     [63]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [64]gcc@gcc.gnu.org. All of [65]our lists have public
      archives.
  
!    Copyright (C) [66]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [67]maintained by the GCC team. Last modified
!    2023-07-07.
  
  References
  
!    1. https://gcc.gnu.org/gcc-10/porting_to.html
!    2. https://gcc.gnu.org/onlinedocs/index.html#current
!    3. https://gcc.gnu.org/gcc-10/changes.html#empty_base
     4. https://www.mpfr.org/
!    5. https://gcc.gnu.org/gcc-10/changes.html#iterator_base
     6. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/cpp/_005f_005fhas_005fbuiltin.html#g_t_005f_005fhas_005fbuiltin
     7. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Optimize-Options.html#index-fno-allocation-dce
     8. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Optimize-Options.html#index-fprofile-partial-training
*************** References
*** 2752,2758 ****
    15. https://facebook.github.io/zstd/
    16. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Optimize-Options.html#index-fprofile-values
    17. https://www.openacc.org/
!   18. https://gcc.gnu.org/wiki/OpenACC/Implementation%20Status#status-10
    19. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/libgomp/#toc-Enabling-OpenACC-1
    20. https://www.openmp.org/specifications/
    21. https://gcc.gnu.org/wiki/Offloading
--- 2764,2770 ----
    15. https://facebook.github.io/zstd/
    16. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Optimize-Options.html#index-fprofile-values
    17. https://www.openacc.org/
!   18. https://gcc.gnu.org/wiki/OpenACC/Implementation Status#status-10
    19. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/libgomp/#toc-Enabling-OpenACC-1
    20. https://www.openmp.org/specifications/
    21. https://gcc.gnu.org/wiki/Offloading
*************** References
*** 2778,2784 ****
    41. https://gcc.gnu.org/onlinedocs/jit/topics/compatibility.html#c.gcc_jit_version_patchlevel
    42. https://gcc.gnu.org/onlinedocs/jit/topics/types.html#c.gcc_jit_context_new_bitfield
    43. https://developer.arm.com/documentation/101028/0009/Data-processing-intrinsics
!   44. https://developer.arm.com/Architectures/M-Profile%20Architecture
    45. https://developer.arm.com/architectures/instruction-sets/intrinsics/
    46. https://developer.arm.com/documentation/101028/0010/Custom-Datapath-Extension
    47. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/AVR-Options.html#index-nodevicespecs
--- 2790,2796 ----
    41. https://gcc.gnu.org/onlinedocs/jit/topics/compatibility.html#c.gcc_jit_version_patchlevel
    42. https://gcc.gnu.org/onlinedocs/jit/topics/types.html#c.gcc_jit_context_new_bitfield
    43. https://developer.arm.com/documentation/101028/0009/Data-processing-intrinsics
!   44. https://developer.arm.com/Architectures/M-Profile Architecture
    45. https://developer.arm.com/architectures/instruction-sets/intrinsics/
    46. https://developer.arm.com/documentation/101028/0010/Custom-Datapath-Extension
    47. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/AVR-Options.html#index-nodevicespecs
*************** References
*** 2795,2809 ****
    58. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=10.2
    59. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=10.3
    60. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=10.4
!   61. https://gcc.gnu.org/onlinedocs/
!   62. mailto:gcc-help@gcc.gnu.org
!   63. mailto:gcc@gcc.gnu.org
!   64. https://gcc.gnu.org/lists.html
!   65. https://www.fsf.org/
!   66. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-9/index.html
- 
                                GCC 9 Release Series
  
     (This release series is no longer supported.)
--- 2807,2821 ----
    58. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=10.2
    59. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=10.3
    60. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=10.4
!   61. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=10.5
!   62. https://gcc.gnu.org/onlinedocs/
!   63. mailto:gcc-help@gcc.gnu.org
!   64. mailto:gcc@gcc.gnu.org
!   65. https://gcc.gnu.org/lists.html
!   66. https://www.fsf.org/
!   67. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-9/index.html
                                GCC 9 Release Series
  
     (This release series is no longer supported.)
*************** References and Acknowledgements
*** 2839,2901 ****
     supports several other languages aside from C, it now stands for the
     GNU Compiler Collection.
  
-    A list of [12]successful builds is updated as new information becomes
-    available.
- 
     The GCC developers would like to thank the numerous people that have
     contributed new features, improvements, bug fixes, and other changes as
!    well as test results to GCC. This [13]amazing group of volunteers is
     what makes GCC successful.
  
!    For additional information about GCC please refer to the [14]GCC
!    project web site or contact the [15]GCC development mailing list.
  
!    To obtain GCC please use [16]our mirror sites or [17]our version
     control system.
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [18]GCC manuals. If that fails, the
!     [19]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [20]gcc@gcc.gnu.org. All of [21]our lists have public
      archives.
  
!    Copyright (C) [22]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [23]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-9/changes.html
!    3. http://gcc.gnu.org/onlinedocs/9.5.0/
!    4. http://gcc.gnu.org/gcc-9/changes.html
!    5. http://gcc.gnu.org/onlinedocs/9.4.0/
!    6. http://gcc.gnu.org/gcc-9/changes.html
!    7. http://gcc.gnu.org/onlinedocs/9.3.0/
!    8. http://gcc.gnu.org/gcc-9/changes.html
!    9. http://gcc.gnu.org/onlinedocs/9.2.0/
!   10. http://gcc.gnu.org/gcc-9/changes.html
!   11. http://gcc.gnu.org/onlinedocs/9.1.0/
!   12. http://gcc.gnu.org/gcc-9/buildstat.html
!   13. http://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Contributors.html
!   14. http://gcc.gnu.org/index.html
!   15. mailto:gcc@gcc.gnu.org
!   16. http://gcc.gnu.org/mirrors.html
!   17. http://gcc.gnu.org/git.html
!   18. https://gcc.gnu.org/onlinedocs/
!   19. mailto:gcc-help@gcc.gnu.org
!   20. mailto:gcc@gcc.gnu.org
!   21. https://gcc.gnu.org/lists.html
!   22. https://www.fsf.org/
!   23. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-9/changes.html
- 
                                GCC 9 Release Series
                          Changes, New Features, and Fixes
  
--- 2851,2908 ----
     supports several other languages aside from C, it now stands for the
     GNU Compiler Collection.
  
     The GCC developers would like to thank the numerous people that have
     contributed new features, improvements, bug fixes, and other changes as
!    well as test results to GCC. This [12]amazing group of volunteers is
     what makes GCC successful.
  
!    For additional information about GCC please refer to the [13]GCC
!    project web site or contact the [14]GCC development mailing list.
  
!    To obtain GCC please use [15]our mirror sites or [16]our version
     control system.
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [17]GCC manuals. If that fails, the
!     [18]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [19]gcc@gcc.gnu.org. All of [20]our lists have public
      archives.
  
!    Copyright (C) [21]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [22]maintained by the GCC team. Last modified
!    2024-05-30.
  
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-9/changes.html
!    3. https://gcc.gnu.org/onlinedocs/9.5.0/
!    4. https://gcc.gnu.org/gcc-9/changes.html
!    5. https://gcc.gnu.org/onlinedocs/9.4.0/
!    6. https://gcc.gnu.org/gcc-9/changes.html
!    7. https://gcc.gnu.org/onlinedocs/9.3.0/
!    8. https://gcc.gnu.org/gcc-9/changes.html
!    9. https://gcc.gnu.org/onlinedocs/9.2.0/
!   10. https://gcc.gnu.org/gcc-9/changes.html
!   11. https://gcc.gnu.org/onlinedocs/9.1.0/
!   12. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Contributors.html
!   13. https://gcc.gnu.org/index.html
!   14. mailto:gcc@gcc.gnu.org
!   15. https://gcc.gnu.org/mirrors.html
!   16. https://gcc.gnu.org/git.html
!   17. https://gcc.gnu.org/onlinedocs/
!   18. mailto:gcc-help@gcc.gnu.org
!   19. mailto:gcc@gcc.gnu.org
!   20. https://gcc.gnu.org/lists.html
!   21. https://www.fsf.org/
!   22. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-9/changes.html
                                GCC 9 Release Series
                          Changes, New Features, and Fixes
  
*************** mory");
*** 3031,3037 ****
         chain, and profile information (if available).
       * Inter-procedural propagation of stack alignment can now be
         controlled by [22]-fipa-stack-alignment.
!      * Propagation of addressability, readonly and writeonly flags on
         static variables can now be controlled by
         [23]-fipa-reference-addressable.
  
--- 3038,3044 ----
         chain, and profile information (if available).
       * Inter-procedural propagation of stack alignment can now be
         controlled by [22]-fipa-stack-alignment.
!      * Propagation of addressability, readonly, and writeonly flags on
         static variables can now be controlled by
         [23]-fipa-reference-addressable.
  
*************** foo (int how)
*** 3070,3077 ****
         can be transformed into 100 * how + 5 (for values defined in the
         switch statement).
       * Inter-procedural optimization improvements:
!           + Inliner defaults was tuned to better suits modern C++
!             codebases especially when built with link time optimizations.
              New parameters max-inline-insns-small, max-inline-insns-size,
              uninlined-function-insns, uninlined-function-time,
              uninlined-thunk-insns, and uninlined-thunk-time were added.
--- 3077,3084 ----
         can be transformed into 100 * how + 5 (for values defined in the
         switch statement).
       * Inter-procedural optimization improvements:
!           + Inliner defaults were tuned to better suit modern C++
!             codebases, especially when built with link time-optimizations.
              New parameters max-inline-insns-small, max-inline-insns-size,
              uninlined-function-insns, uninlined-function-time,
              uninlined-thunk-insns, and uninlined-thunk-time were added.
*************** foo (int how)
*** 3082,3106 ****
            + [29]-fprofile-use now enables [30]-fversion-loops-for-strides,
              [31]-floop-interchange, [32]-floop-unroll-and-jam,
              [33]-ftree-loop-distribution.
!           + Streaming of counter histograms was removed. This reduces the
!             size of profile files. Histogram is computed on the fly with
!             link-time optimization. Parameter hot-bb-count-ws-permille was
!             reduced from 999 to 990 to account for more precise
!             histograms.
       * Link-time optimization improvements:
!           + Types are now simplified prior streaming resulting in
!             significant reductions of the LTO object files, link-time
!             memory use, and improvements of link-time parallelism.
!           + Default number of partitions (--param lto-partitions) was
              increased from 32 to 128 enabling effective use of CPUs with
              more than 32 hyperthreads. --param
!             lto-max-streaming-parallelism can now be used to control
              number of streaming processes.
            + Warnings on C++ One Decl Rule violations (-Wodr) are now more
              informative and produce fewer redundant results.
         Overall compile time of Firefox 66 and LibreOffice 6.2.3 on an
         8-core machine was reduced by about 5% compared to GCC 8.3, and the
!        size of LTO object files by 7%. LTO link-time improves by 11% on an
         8-core machine and scales significantly better for more parallel
         build environments. The serial stage of the link-time optimization
         is 28% faster consuming 20% less memory. The parallel stage now
--- 3089,3113 ----
            + [29]-fprofile-use now enables [30]-fversion-loops-for-strides,
              [31]-floop-interchange, [32]-floop-unroll-and-jam,
              [33]-ftree-loop-distribution.
!           + Streaming of counter histograms was removed, which reduces the
!             size of profile files. Histograms are computed on the fly with
!             link-time optimization.
!           + The parameter hot-bb-count-ws-permille was reduced from 999 to
!             990 to account for more precise histograms.
       * Link-time optimization improvements:
!           + Types are now simplified prior to streaming resulting in
!             significant reductions of LTO object file sizes and link-time
!             memory use as well as improvements of link-time parallelism.
!           + The default number of partitions (--param lto-partitions) was
              increased from 32 to 128 enabling effective use of CPUs with
              more than 32 hyperthreads. --param
!             lto-max-streaming-parallelism can now be used to control the
              number of streaming processes.
            + Warnings on C++ One Decl Rule violations (-Wodr) are now more
              informative and produce fewer redundant results.
         Overall compile time of Firefox 66 and LibreOffice 6.2.3 on an
         8-core machine was reduced by about 5% compared to GCC 8.3, and the
!        size of LTO object files by 7%. LTO link time improves by 11% on an
         8-core machine and scales significantly better for more parallel
         build environments. The serial stage of the link-time optimization
         is 28% faster consuming 20% less memory. The parallel stage now
*************** New Targets and Target Specific Improvem
*** 3582,3588 ****
         The produced code is compatible only with newer glibc versions,
         which provide the __fentry__ symbol and do not clobber r0 when
         resolving lazily bound functions. -mfentry is only supported when
!        generating 64 bit code and does not work with nested C functions.
       * The -mnop-mcount option can be used to emit NOP instructions
         instead of an mcount or fentry call stub.
       * With the -mrecord-mcount option a __mcount_loc section is generated
--- 3589,3595 ----
         The produced code is compatible only with newer glibc versions,
         which provide the __fentry__ symbol and do not clobber r0 when
         resolving lazily bound functions. -mfentry is only supported when
!        generating 64-bit code and does not work with nested C functions.
       * The -mnop-mcount option can be used to emit NOP instructions
         instead of an mcount or fentry call stub.
       * With the -mrecord-mcount option a __mcount_loc section is generated
*************** GCC 9.5
*** 3695,3706 ****
     provided this notice is preserved.
  
     These pages are [75]maintained by the GCC team. Last modified
!    2023-02-22.
  
  References
  
!    1. http://gcc.gnu.org/gcc-9/porting_to.html
!    2. http://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88469
     4. https://gcc.gnu.org/ml/gcc/2018-10/msg00139.html
     5. https://gcc.gnu.org/ml/gcc/2019-04/msg00023.html
--- 3702,3713 ----
     provided this notice is preserved.
  
     These pages are [75]maintained by the GCC team. Last modified
!    2024-05-09.
  
  References
  
!    1. https://gcc.gnu.org/gcc-9/porting_to.html
!    2. https://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88469
     4. https://gcc.gnu.org/ml/gcc/2018-10/msg00139.html
     5. https://gcc.gnu.org/ml/gcc/2019-04/msg00023.html
*************** References
*** 3734,3740 ****
    33. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Optimize-Options.html#index-ftree-loop-distribution
    34. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Invoking-Gcov.html#Invoking-Gcov
    35. https://www.openacc.org/
!   36. https://gcc.gnu.org/wiki/OpenACC/Implementation%20Status#status-9
    37. https://www.openmp.org/specifications/
    38. https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00628.html
    39. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Vector-Extensions.html#index-_005f_005fbuiltin_005fconvertvector
--- 3741,3747 ----
    33. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Optimize-Options.html#index-ftree-loop-distribution
    34. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Invoking-Gcov.html#Invoking-Gcov
    35. https://www.openacc.org/
!   36. https://gcc.gnu.org/wiki/OpenACC/Implementation Status#status-9
    37. https://www.openmp.org/specifications/
    38. https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00628.html
    39. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Vector-Extensions.html#index-_005f_005fbuiltin_005fconvertvector
*************** References
*** 3751,3757 ****
    50. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wredundant-move
    51. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wpessimizing-move
    52. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wclass-conversion
!   53. http://gcc.gnu.org/projects/cxx-status.html#cxx2a
    54. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Warning-Options.html#index-Wformat
    55. https://github.com/oneapi-src/oneTBB
    56. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gfortran/Fortran-Dialect-Options.html#index-fdec-include
--- 3758,3764 ----
    50. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wredundant-move
    51. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wpessimizing-move
    52. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wclass-conversion
!   53. https://gcc.gnu.org/projects/cxx-status.html#cxx2a
    54. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Warning-Options.html#index-Wformat
    55. https://github.com/oneapi-src/oneTBB
    56. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gfortran/Fortran-Dialect-Options.html#index-fdec-include
*************** References
*** 3776,3782 ****
    75. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-8/index.html
- 
                                GCC 8 Release Series
  
     (This release series is no longer supported.)
--- 3783,3788 ----
*************** References and Acknowledgements
*** 3839,3865 ****
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-8/changes.html
!    3. http://gcc.gnu.org/onlinedocs/8.5.0/
!    4. http://gcc.gnu.org/gcc-8/changes.html
!    5. http://gcc.gnu.org/onlinedocs/8.4.0/
!    6. http://gcc.gnu.org/gcc-8/changes.html
!    7. http://gcc.gnu.org/onlinedocs/8.3.0/
!    8. http://gcc.gnu.org/gcc-8/changes.html
!    9. http://gcc.gnu.org/onlinedocs/8.2.0/
!   10. http://gcc.gnu.org/gcc-8/changes.html
!   11. http://gcc.gnu.org/onlinedocs/8.1.0/
!   12. http://gcc.gnu.org/gcc-8/buildstat.html
!   13. http://gcc.gnu.org/onlinedocs/gcc-8.1.0/gcc/Contributors.html
!   14. http://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. http://gcc.gnu.org/mirrors.html
!   17. http://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
--- 3845,3871 ----
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2024-05-30.
  
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-8/changes.html
!    3. https://gcc.gnu.org/onlinedocs/8.5.0/
!    4. https://gcc.gnu.org/gcc-8/changes.html
!    5. https://gcc.gnu.org/onlinedocs/8.4.0/
!    6. https://gcc.gnu.org/gcc-8/changes.html
!    7. https://gcc.gnu.org/onlinedocs/8.3.0/
!    8. https://gcc.gnu.org/gcc-8/changes.html
!    9. https://gcc.gnu.org/onlinedocs/8.2.0/
!   10. https://gcc.gnu.org/gcc-8/changes.html
!   11. https://gcc.gnu.org/onlinedocs/8.1.0/
!   12. https://gcc.gnu.org/gcc-8/buildstat.html
!   13. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/gcc/Contributors.html
!   14. https://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. https://gcc.gnu.org/mirrors.html
!   17. https://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
*************** References
*** 3868,3874 ****
    23. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-8/changes.html
- 
                                GCC 8 Release Series
                          Changes, New Features, and Fixes
  
--- 3874,3879 ----
*************** void copy (const char *s)
*** 4153,4159 ****
  {
      char buf[80];
      strncpy (buf, s, sizeof buf);
!     ...
  }
  warning: 'strncpy' specified bound 80 equals destination size [-Wstringop-trunca
  tion]
--- 4158,4164 ----
  {
      char buf[80];
      strncpy (buf, s, sizeof buf);
!     …
  }
  warning: 'strncpy' specified bound 80 equals destination size [-Wstringop-trunca
  tion]
*************** void f (void)
*** 4226,4232 ****
  {
      char a[] = "abcd1234";
      strcpy (a, a + 4);
!     ...
  }
  warning: 'strcpy' accessing 5 bytes at offsets 0 and 4 overlaps 1 byte at offset
   4 [-Wrestrict]
--- 4231,4237 ----
  {
      char a[] = "abcd1234";
      strcpy (a, a + 4);
!     …
  }
  warning: 'strcpy' accessing 5 bytes at offsets 0 and 4 overlaps 1 byte at offset
   4 [-Wrestrict]
*************** GCC 8.5
*** 4952,4959 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-8/porting_to.html
!    2. http://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/ml/gcc/2018-04/msg00102.html
     4. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/gcc/Warning-Options.html#index-Wmultistatement-macros
     5. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/gcc/Warning-Options.html#index-Wstringop-truncation
--- 4957,4964 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-8/porting_to.html
!    2. https://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/ml/gcc/2018-04/msg00102.html
     4. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/gcc/Warning-Options.html#index-Wmultistatement-macros
     5. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/gcc/Warning-Options.html#index-Wstringop-truncation
*************** References
*** 4968,4974 ****
    14. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/gcc/Warning-Options.html#index-Wformat-truncation
    15. https://gcc.gnu.org/PR86094
    16. https://gcc.gnu.org/onlinedocs/gcc/C_002b_002b-Dialect-Options.html#index-Wclass-memaccess
!   17. http://gcc.gnu.org/projects/cxx-status.html#cxx2a
    18. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/jit/topics/types.html#gcc_jit_type_get_vector
    19. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/jit/topics/expressions.html#gcc_jit_context_new_rvalue_from_vector
    20. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/jit/topics/types.html#gcc_jit_type_get_aligned
--- 4973,4979 ----
    14. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/gcc/Warning-Options.html#index-Wformat-truncation
    15. https://gcc.gnu.org/PR86094
    16. https://gcc.gnu.org/onlinedocs/gcc/C_002b_002b-Dialect-Options.html#index-Wclass-memaccess
!   17. https://gcc.gnu.org/projects/cxx-status.html#cxx2a
    18. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/jit/topics/types.html#gcc_jit_type_get_vector
    19. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/jit/topics/expressions.html#gcc_jit_context_new_rvalue_from_vector
    20. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/jit/topics/types.html#gcc_jit_type_get_aligned
*************** References
*** 4984,4990 ****
    30. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=8.0
    31. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=8.2
    32. https://gcc.gnu.org/PR86094
!   33. http://gcc.gnu.org/gcc-8/changes.html#cxx
    34. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84413
    35. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=8.3
    36. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87137
--- 4989,4995 ----
    30. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=8.0
    31. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=8.2
    32. https://gcc.gnu.org/PR86094
!   33. https://gcc.gnu.org/gcc-8/changes.html#cxx
    34. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84413
    35. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=8.3
    36. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87137
*************** References
*** 4998,5004 ****
    44. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-7/index.html
- 
                                GCC 7 Release Series
  
     (This release series is no longer supported.)
--- 5003,5008 ----
*************** References and Acknowledgements
*** 5061,5087 ****
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-7/changes.html
!    3. http://gcc.gnu.org/onlinedocs/7.5.0/
!    4. http://gcc.gnu.org/gcc-7/changes.html
!    5. http://gcc.gnu.org/onlinedocs/7.4.0/
!    6. http://gcc.gnu.org/gcc-7/changes.html
!    7. http://gcc.gnu.org/onlinedocs/7.3.0/
!    8. http://gcc.gnu.org/gcc-7/changes.html
!    9. http://gcc.gnu.org/onlinedocs/7.2.0/
!   10. http://gcc.gnu.org/gcc-7/changes.html
!   11. http://gcc.gnu.org/onlinedocs/7.1.0/
!   12. http://gcc.gnu.org/gcc-7/buildstat.html
!   13. http://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. http://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. http://gcc.gnu.org/mirrors.html
!   17. http://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
--- 5065,5091 ----
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2024-05-30.
  
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-7/changes.html
!    3. https://gcc.gnu.org/onlinedocs/7.5.0/
!    4. https://gcc.gnu.org/gcc-7/changes.html
!    5. https://gcc.gnu.org/onlinedocs/7.4.0/
!    6. https://gcc.gnu.org/gcc-7/changes.html
!    7. https://gcc.gnu.org/onlinedocs/7.3.0/
!    8. https://gcc.gnu.org/gcc-7/changes.html
!    9. https://gcc.gnu.org/onlinedocs/7.2.0/
!   10. https://gcc.gnu.org/gcc-7/changes.html
!   11. https://gcc.gnu.org/onlinedocs/7.1.0/
!   12. https://gcc.gnu.org/gcc-7/buildstat.html
!   13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. https://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. https://gcc.gnu.org/mirrors.html
!   17. https://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
*************** References
*** 5090,5096 ****
    23. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-7/changes.html
- 
                                GCC 7 Release Series
                          Changes, New Features, and Fixes
  
--- 5094,5099 ----
*************** void f (int n)
*** 5459,5465 ****
      d = alloca (n);
    else
      d = malloc (n);
!   ...
  }
  
  warning: argument to 'alloca may be too large due to conversion from 'int' to 'l
--- 5462,5468 ----
      d = alloca (n);
    else
      d = malloc (n);
!   …
  }
  
  warning: argument to 'alloca may be too large due to conversion from 'int' to 'l
*************** ong unsigned int' [-Walloca-larger-than=
*** 5472,5478 ****
  void f (size_t n)
  {
    char *d = alloca (n);
!   ...
  }
  
  warning: unbounded use of 'alloca' [-Walloca-larger-than=]
--- 5475,5481 ----
  void f (size_t n)
  {
    char *d = alloca (n);
!   …
  }
  
  warning: unbounded use of 'alloca' [-Walloca-larger-than=]
*************** void f (unsigned x)
*** 5520,5526 ****
  {
    char d[4];
    snprintf (d, sizeof d, "%#02x", x & 0xff);
!   ...
  }
  
  warning: 'snprintf' output may be truncated before the last format character [-W
--- 5523,5529 ----
  {
    char d[4];
    snprintf (d, sizeof d, "%#02x", x & 0xff);
!   …
  }
  
  warning: 'snprintf' output may be truncated before the last format character [-W
*************** void f (const char *fname)
*** 5548,5554 ****
    char d[8];
    strncpy (d, "/tmp/", sizeof d);
    strncat (d, fname, sizeof d);
!   ...
  }
  
  warning: specified bound 8 equals the size of the destination [-Wstringop-overfl
--- 5551,5557 ----
    char d[8];
    strncpy (d, "/tmp/", sizeof d);
    strncat (d, fname, sizeof d);
!   …
  }
  
  warning: specified bound 8 equals the size of the destination [-Wstringop-overfl
*************** test.cc:4:11: error: expected ';' after
*** 5686,5695 ****
            + std::as_const, std::not_fn,
              std::has_unique_object_representations, constexpr
              std::addressof.
!        Thanks to Daniel Kr�gler, Tim Shen, Edward Smith-Rowland, and Ville
         Voutilainen for work on the C++17 support.
       * A new power-of-two rehashing policy for use with the _Hashtable
!        internals, thanks to Fran�ois Dumont.
  
    Fortran
  
--- 5689,5698 ----
            + std::as_const, std::not_fn,
              std::has_unique_object_representations, constexpr
              std::addressof.
!        Thanks to Daniel Krügler, Tim Shen, Edward Smith-Rowland, and Ville
         Voutilainen for work on the C++17 support.
       * A new power-of-two rehashing policy for use with the _Hashtable
!        internals, thanks to François Dumont.
  
    Fortran
  
*************** const int* get_address (unsigned idx)
*** 5859,5865 ****
  }
  
       * A new command-line option -Wmisspelled-isr has been added. It turns
!        off -- or turns into errors -- warnings that are reported for
         interrupt service routines (ISRs) which don't follow AVR-LibC's
         naming convention of prefixing ISR names with __vector.
       * __builtin_avr_nops(n) is a new [17]built-in function that inserts n
--- 5862,5868 ----
  }
  
       * A new command-line option -Wmisspelled-isr has been added. It turns
!        off — or turns into errors — warnings that are reported for
         interrupt service routines (ISRs) which don't follow AVR-LibC's
         naming convention of prefixing ISR names with __vector.
       * __builtin_avr_nops(n) is a new [17]built-in function that inserts n
*************** GCC 7.5
*** 6162,6169 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-7/porting_to.html
!    2. http://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/wiki/LRAIsDefault
     4. https://gcc.gnu.org/onlinedocs/gcc-7.1.0/libstdc++/manual/manual/profile_mode.html
     5. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
--- 6165,6172 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-7/porting_to.html
!    2. https://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/wiki/LRAIsDefault
     4. https://gcc.gnu.org/onlinedocs/gcc-7.1.0/libstdc++/manual/manual/profile_mode.html
     5. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
*************** References
*** 6197,6203 ****
    33. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-6/index.html
- 
                                GCC 6 Release Series
  
     (This release series is no longer supported.)
--- 6200,6205 ----
*************** References and Acknowledgements
*** 6260,6286 ****
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-6/changes.html
!    3. http://gcc.gnu.org/onlinedocs/6.5.0/
!    4. http://gcc.gnu.org/gcc-6/changes.html
!    5. http://gcc.gnu.org/onlinedocs/6.4.0/
!    6. http://gcc.gnu.org/gcc-6/changes.html
!    7. http://gcc.gnu.org/onlinedocs/6.3.0/
!    8. http://gcc.gnu.org/gcc-6/changes.html
!    9. http://gcc.gnu.org/onlinedocs/6.2.0/
!   10. http://gcc.gnu.org/gcc-6/changes.html
!   11. http://gcc.gnu.org/onlinedocs/6.1.0/
!   12. http://gcc.gnu.org/gcc-6/buildstat.html
!   13. http://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. http://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. http://gcc.gnu.org/mirrors.html
!   17. http://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
--- 6262,6288 ----
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2024-05-30.
  
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-6/changes.html
!    3. https://gcc.gnu.org/onlinedocs/6.5.0/
!    4. https://gcc.gnu.org/gcc-6/changes.html
!    5. https://gcc.gnu.org/onlinedocs/6.4.0/
!    6. https://gcc.gnu.org/gcc-6/changes.html
!    7. https://gcc.gnu.org/onlinedocs/6.3.0/
!    8. https://gcc.gnu.org/gcc-6/changes.html
!    9. https://gcc.gnu.org/onlinedocs/6.2.0/
!   10. https://gcc.gnu.org/gcc-6/changes.html
!   11. https://gcc.gnu.org/onlinedocs/6.1.0/
!   12. https://gcc.gnu.org/gcc-6/buildstat.html
!   13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. https://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. https://gcc.gnu.org/mirrors.html
!   17. https://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
*************** References
*** 6289,6295 ****
    23. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-6/changes.html
- 
                                GCC 6 Release Series
                          Changes, New Features, and Fixes
  
--- 6291,6296 ----
*************** Operating Systems
*** 7002,7009 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-6/porting_to.html
!    2. http://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/ml/gcc/2015-08/msg00101.html
     4. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71151
     5. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87822
--- 7003,7010 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-6/porting_to.html
!    2. https://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/ml/gcc/2015-08/msg00101.html
     4. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71151
     5. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87822
*************** References
*** 7036,7042 ****
    32. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-5/index.html
- 
                                GCC 5 Release Series
  
     (This release series is no longer supported.)
--- 7037,7042 ----
*************** References and Acknowledgements
*** 7099,7125 ****
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-5/changes.html
!    3. http://gcc.gnu.org/onlinedocs/5.5.0/
!    4. http://gcc.gnu.org/gcc-5/changes.html
!    5. http://gcc.gnu.org/onlinedocs/5.4.0/
!    6. http://gcc.gnu.org/gcc-5/changes.html
!    7. http://gcc.gnu.org/onlinedocs/5.3.0/
!    8. http://gcc.gnu.org/gcc-5/changes.html
!    9. http://gcc.gnu.org/onlinedocs/5.2.0/
!   10. http://gcc.gnu.org/gcc-5/changes.html
!   11. http://gcc.gnu.org/onlinedocs/5.1.0/
!   12. http://gcc.gnu.org/gcc-5/buildstat.html
!   13. http://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. http://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. http://gcc.gnu.org/mirrors.html
!   17. http://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
--- 7099,7125 ----
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2024-05-30.
  
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-5/changes.html
!    3. https://gcc.gnu.org/onlinedocs/5.5.0/
!    4. https://gcc.gnu.org/gcc-5/changes.html
!    5. https://gcc.gnu.org/onlinedocs/5.4.0/
!    6. https://gcc.gnu.org/gcc-5/changes.html
!    7. https://gcc.gnu.org/onlinedocs/5.3.0/
!    8. https://gcc.gnu.org/gcc-5/changes.html
!    9. https://gcc.gnu.org/onlinedocs/5.2.0/
!   10. https://gcc.gnu.org/gcc-5/changes.html
!   11. https://gcc.gnu.org/onlinedocs/5.1.0/
!   12. https://gcc.gnu.org/gcc-5/buildstat.html
!   13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. https://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. https://gcc.gnu.org/mirrors.html
!   17. https://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
*************** References
*** 7128,7134 ****
    23. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-5/changes.html
- 
                                GCC 5 Release Series
                          Changes, New Features, and Fixes
  
--- 7128,7133 ----
*************** New Targets and Target Specific Improvem
*** 7663,7669 ****
         Using -mcpu=cortex-a72 requires a version of GNU binutils that has
         support for the Cortex-A72.
       * The transitional options -mlra and -mno-lra have been removed. The
!        AArch64 backend now uses the local register allocator (LRA) only.
  
    ARM
  
--- 7662,7668 ----
         Using -mcpu=cortex-a72 requires a version of GNU binutils that has
         support for the Cortex-A72.
       * The transitional options -mlra and -mno-lra have been removed. The
!        AArch64 back end now uses the local register allocator (LRA) only.
  
    ARM
  
*************** New Targets and Target Specific Improvem
*** 7696,7702 ****
         -mtpcs-leaf-frame which are only applicable to the old ABI have
         been deprecated.
       * The transitional options -mlra and -mno-lra have been removed. The
!        ARM backend now uses the local register allocator (LRA) only.
  
    AVR
  
--- 7695,7701 ----
         -mtpcs-leaf-frame which are only applicable to the old ABI have
         been deprecated.
       * The transitional options -mlra and -mno-lra have been removed. The
!        ARM back end now uses the local register allocator (LRA) only.
  
    AVR
  
*************** Target Specific Changes
*** 8008,8033 ****
     provided this notice is preserved.
  
     These pages are [49]maintained by the GCC team. Last modified
!    2023-02-20.
  
  References
  
!    1. http://gcc.gnu.org/gcc-5/changes.html#libstdcxx
     2. https://gcc.gnu.org/onlinedocs/gcc/Spec-Files.html
     3. https://savannah.nongnu.org/bugs/?44574
!    4. https://gcc.gnu.org/wiki/Intel%20MPX%20support%20in%20the%20GCC%20compiler
     5. https://www.openmp.org/wp-content/uploads/OpenMP4.0.0.pdf
     6. https://www.openmp.org/wp-content/uploads/OpenMP4.0.0.Examples.pdf
     7. https://gcc.gnu.org/wiki/OpenACC
     8. https://gcc.gnu.org/install/configure.html
     9. https://isocpp.org/std/standing-documents/sd-6-sg10-feature-test-recommendations
!   10. http://gcc.gnu.org/projects/cxx1y.html
    11. https://isocpp.org/std/standing-documents/sd-6-sg10-feature-test-recommendations
!   12. http://gcc.gnu.org/projects/cxx1y.html
!   13. http://gcc.gnu.org/projects/cxx1y.html
!   14. http://gcc.gnu.org/projects/cxx1y.html
    15. https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2013/n3639.html
!   16. http://gcc.gnu.org/onlinedocs/libstdc++/manual/using_dual_abi.html
    17. https://gcc.gnu.org/onlinedocs/gcc-5.1.0/libstdc++/manual/manual/status.html#status.iso.2011
    18. https://gcc.gnu.org/onlinedocs/gcc-5.1.0/libstdc++/manual/manual/status.html#status.iso.2014
    19. https://gcc.gnu.org/onlinedocs/gcc-5.1.0/libstdc++/manual/manual/status.html#status.iso.2014
--- 8007,8032 ----
     provided this notice is preserved.
  
     These pages are [49]maintained by the GCC team. Last modified
!    2024-06-08.
  
  References
  
!    1. https://gcc.gnu.org/gcc-5/changes.html#libstdcxx
     2. https://gcc.gnu.org/onlinedocs/gcc/Spec-Files.html
     3. https://savannah.nongnu.org/bugs/?44574
!    4. https://gcc.gnu.org/wiki/Intel MPX support in the GCC compiler
     5. https://www.openmp.org/wp-content/uploads/OpenMP4.0.0.pdf
     6. https://www.openmp.org/wp-content/uploads/OpenMP4.0.0.Examples.pdf
     7. https://gcc.gnu.org/wiki/OpenACC
     8. https://gcc.gnu.org/install/configure.html
     9. https://isocpp.org/std/standing-documents/sd-6-sg10-feature-test-recommendations
!   10. https://gcc.gnu.org/projects/cxx1y.html
    11. https://isocpp.org/std/standing-documents/sd-6-sg10-feature-test-recommendations
!   12. https://gcc.gnu.org/projects/cxx1y.html
!   13. https://gcc.gnu.org/projects/cxx1y.html
!   14. https://gcc.gnu.org/projects/cxx1y.html
    15. https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2013/n3639.html
!   16. https://gcc.gnu.org/onlinedocs/libstdc++/manual/using_dual_abi.html
    17. https://gcc.gnu.org/onlinedocs/gcc-5.1.0/libstdc++/manual/manual/status.html#status.iso.2011
    18. https://gcc.gnu.org/onlinedocs/gcc-5.1.0/libstdc++/manual/manual/status.html#status.iso.2014
    19. https://gcc.gnu.org/onlinedocs/gcc-5.1.0/libstdc++/manual/manual/status.html#status.iso.2014
*************** References
*** 8063,8069 ****
    49. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.9/index.html
- 
                               GCC 4.9 Release Series
  
     (This release series is no longer supported.)
--- 8062,8067 ----
*************** References and Acknowledgements
*** 8126,8152 ****
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.9/changes.html
!    3. http://gcc.gnu.org/onlinedocs/4.9.4/
!    4. http://gcc.gnu.org/gcc-4.9/changes.html
!    5. http://gcc.gnu.org/onlinedocs/4.9.3/
!    6. http://gcc.gnu.org/gcc-4.9/changes.html
!    7. http://gcc.gnu.org/onlinedocs/4.9.2/
!    8. http://gcc.gnu.org/gcc-4.9/changes.html
!    9. http://gcc.gnu.org/onlinedocs/4.9.1/
!   10. http://gcc.gnu.org/gcc-4.9/changes.html
    11. https://gcc.gnu.org/onlinedocs/4.9.0/
!   12. http://gcc.gnu.org/gcc-4.9/buildstat.html
    13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. http://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. http://gcc.gnu.org/mirrors.html
!   17. http://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
--- 8124,8150 ----
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2024-05-30.
  
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.9/changes.html
!    3. https://gcc.gnu.org/onlinedocs/4.9.4/
!    4. https://gcc.gnu.org/gcc-4.9/changes.html
!    5. https://gcc.gnu.org/onlinedocs/4.9.3/
!    6. https://gcc.gnu.org/gcc-4.9/changes.html
!    7. https://gcc.gnu.org/onlinedocs/4.9.2/
!    8. https://gcc.gnu.org/gcc-4.9/changes.html
!    9. https://gcc.gnu.org/onlinedocs/4.9.1/
!   10. https://gcc.gnu.org/gcc-4.9/changes.html
    11. https://gcc.gnu.org/onlinedocs/4.9.0/
!   12. https://gcc.gnu.org/gcc-4.9/buildstat.html
    13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. https://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. https://gcc.gnu.org/mirrors.html
!   17. https://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
*************** References
*** 8155,8161 ****
    23. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.9/changes.html
- 
                               GCC 4.9 Release Series
                          Changes, New Features, and Fixes
  
--- 8153,8158 ----
*************** New Languages and Language specific impr
*** 8269,8289 ****
         -fdiagnostics-color=never.
         Sample diagnostics output:
      $ g++ -fdiagnostics-color=always -S -Wall test.C
!     test.C: In function `int foo()':
      test.C:1:14: warning: no return statement in function returning non-void [-W
  return-type]
       int foo () { }
                    ^
      test.C:2:46: error: template instantiation depth exceeds maximum of 900 (use
!  -ftemplate-depth= to increase the maximum) instantiating `struct X<100>'
       template <int N> struct X { static const int value = X<N-1>::value; }; temp
  late struct X<1000>;
                                                    ^
!     test.C:2:46:   recursively required from `const int X<999>::value'
!     test.C:2:46:   required from `const int X<1000>::value'
      test.C:2:88:   required from here
  
!     test.C:2:46: error: incomplete type `X<100>' used in nested name specifier
  
       * With the new [7]#pragma GCC ivdep, the user can assert that there
         are no loop-carried dependencies which would prevent concurrent
--- 8266,8286 ----
         -fdiagnostics-color=never.
         Sample diagnostics output:
      $ g++ -fdiagnostics-color=always -S -Wall test.C
!     test.C: In function ‘int foo()’:
      test.C:1:14: warning: no return statement in function returning non-void [-W
  return-type]
       int foo () { }
                    ^
      test.C:2:46: error: template instantiation depth exceeds maximum of 900 (use
!  -ftemplate-depth= to increase the maximum) instantiating ‘struct X<100>’
       template <int N> struct X { static const int value = X<N-1>::value; }; temp
  late struct X<1000>;
                                                    ^
!     test.C:2:46:   recursively required from ‘const int X<999>::value’
!     test.C:2:46:   required from ‘const int X<1000>::value’
      test.C:2:88:   required from here
  
!     test.C:2:46: error: incomplete type ‘X<100>’ used in nested name specifier
  
       * With the new [7]#pragma GCC ivdep, the user can assert that there
         are no loop-carried dependencies which would prevent concurrent
*************** auto incr = [](auto x) { return x++; };
*** 8388,8395 ****
  // a functional object that will add two like-type objects
  auto add = [] <typename T> (T a, T b) { return a + b; };
  
!      * G++ supports unconstrained generic functions as specified by �4.1.2
!        and �5.1.1 of [15]N3889: Concepts Lite Specification. Briefly, auto
         may be used as a type-specifier in a parameter declaration of any
         function declarator in order to introduce an implicit function
         template parameter, akin to generic lambdas.
--- 8385,8392 ----
  // a functional object that will add two like-type objects
  auto add = [] <typename T> (T a, T b) { return a + b; };
  
!      * G++ supports unconstrained generic functions as specified by §4.1.2
!        and §5.1.1 of [15]N3889: Concepts Lite Specification. Briefly, auto
         may be used as a type-specifier in a parameter declaration of any
         function declarator in order to introduce an implicit function
         template parameter, akin to generic lambdas.
*************** auto incr(T x) { return x++; }
*** 8482,8488 ****
         be used as argument to ISO_C_BINDING's C_LOC and as actual argument
         to another NO_ARG_CHECK dummy argument; also the other constraints
         of TYPE(*) apply. The dummy arguments should be declared as scalar
!        or assumed-size variable of type type(*) (recommended) - or of type
         integer, real, complex or logical. With NO_ARG_CHECK, a pointer to
         the data without further type or shape information is passed,
         similar to C's void*. Note that also TS 29113's
--- 8479,8485 ----
         be used as argument to ISO_C_BINDING's C_LOC and as actual argument
         to another NO_ARG_CHECK dummy argument; also the other constraints
         of TYPE(*) apply. The dummy arguments should be declared as scalar
!        or assumed-size variable of type type(*) (recommended) – or of type
         integer, real, complex or logical. With NO_ARG_CHECK, a pointer to
         the data without further type or shape information is passed,
         similar to C's void*. Note that also TS 29113's
*************** New Targets and Target Specific Improvem
*** 8530,8544 ****
       * Coverage of more of the ISA including the SIMD extensions has been
         added. The Advanced SIMD intrinsics have also been improved.
       * The new local register allocator (LRA) is now on by default for the
!        AArch64 backend.
       * The REE (Redundant extension elimination) pass has now been enabled
!        by default for the AArch64 backend.
       * Tuning for the Cortex-A53 and Cortex-A57 has been improved.
       * Initial big.LITTLE tuning support for the combination of Cortex-A57
         and Cortex-A53 was added through the -mcpu=cortex-a57.cortex-a53
         option.
       * A number of structural changes have been made to both the ARM and
!        AArch64 backends to facilitate improved code-generation.
       * As of GCC 4.9.2 a workaround for the ARM Cortex-A53 erratum 835769
         has been added and can be enabled by giving the
         -mfix-cortex-a53-835769 option. Alternatively it can be enabled by
--- 8527,8541 ----
       * Coverage of more of the ISA including the SIMD extensions has been
         added. The Advanced SIMD intrinsics have also been improved.
       * The new local register allocator (LRA) is now on by default for the
!        AArch64 back end.
       * The REE (Redundant extension elimination) pass has now been enabled
!        by default for the AArch64 back end.
       * Tuning for the Cortex-A53 and Cortex-A57 has been improved.
       * Initial big.LITTLE tuning support for the combination of Cortex-A57
         and Cortex-A53 was added through the -mcpu=cortex-a57.cortex-a53
         option.
       * A number of structural changes have been made to both the ARM and
!        AArch64 back ends to facilitate improved code-generation.
       * As of GCC 4.9.2 a workaround for the ARM Cortex-A53 erratum 835769
         has been added and can be enabled by giving the
         -mfix-cortex-a53-835769 option. Alternatively it can be enabled by
*************** New Targets and Target Specific Improvem
*** 8579,8585 ****
         data segments to be relative to text segments has been added. This
         is on by default for all targets except VxWorks RTP.
       * A number of infrastructural changes have been made to both the ARM
!        and AArch64 backends to facilitate improved code-generation.
       * GCC now supports Cortex-A12 and the Cortex-R7 through the
         -mcpu=cortex-a12 and -mcpu=cortex-r7 options.
       * GCC now has tuning for the Cortex-A57 and Cortex-A53 through the
--- 8576,8582 ----
         data segments to be relative to text segments has been added. This
         is on by default for all targets except VxWorks RTP.
       * A number of infrastructural changes have been made to both the ARM
!        and AArch64 back ends to facilitate improved code-generation.
       * GCC now supports Cortex-A12 and the Cortex-R7 through the
         -mcpu=cortex-a12 and -mcpu=cortex-r7 options.
       * GCC now has tuning for the Cortex-A57 and Cortex-A53 through the
*************** New Targets and Target Specific Improvem
*** 8641,8654 ****
  
    MSP430
  
!      * A new command-line option -mcpu= has been added to the MSP430
!        backend. This option is used to specify the ISA to be used.
!        Accepted values are msp430 (the default), msp430x and msp430xv2.
!        The ISA is no longer deduced from the -mmcu= option as there are
!        far too many different MCU names. The -mmcu= option is still
!        supported, and this is still used to select linker scripts and
!        generate a C preprocessor symbol that will be recognised by the
!        msp430.h header file.
  
    NDS32
  
--- 8638,8651 ----
  
    MSP430
  
!      * A new command-line option -mcpu= has been added to the MSP430 back
!        end. This option is used to specify the ISA to be used. Accepted
!        values are msp430 (the default), msp430x and msp430xv2. The ISA is
!        no longer deduced from the -mmcu= option as there are far too many
!        different MCU names. The -mmcu= option is still supported, and this
!        is still used to select linker scripts and generate a C
!        preprocessor symbol that will be recognised by the msp430.h header
!        file.
  
    NDS32
  
*************** GCC 4.9.4
*** 8765,8771 ****
     provided this notice is preserved.
  
     These pages are [33]maintained by the GCC team. Last modified
!    2023-01-19.
  
  References
  
--- 8762,8768 ----
     provided this notice is preserved.
  
     These pages are [33]maintained by the GCC team. Last modified
!    2023-09-02.
  
  References
  
*************** References
*** 8776,8788 ****
     5. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/Optimize-Options.html#index-fsimd-cost-model-908
     6. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/Language-Independent-Options.html#index-fdiagnostics-color-252
     7. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/Loop-Specific-Pragmas.html
!    8. http://gcc.gnu.org/projects/cxx1y.html
     9. https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2013/n3638.html
!   10. http://gcc.gnu.org/projects/cxx1y.html
!   11. http://gcc.gnu.org/projects/cxx1y.html
!   12. http://gcc.gnu.org/projects/cxx1y.html
!   13. http://gcc.gnu.org/projects/cxx1y.html
!   14. http://gcc.gnu.org/projects/cxx1y.html
    15. https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2014/n3889.pdf
    16. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/libstdc++/manual/manual/status.html#status.iso.2011
    17. https://gcc.gnu.org/onlinedocs/libstdc++/manual/status.html#status.iso.2014
--- 8773,8785 ----
     5. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/Optimize-Options.html#index-fsimd-cost-model-908
     6. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/Language-Independent-Options.html#index-fdiagnostics-color-252
     7. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/Loop-Specific-Pragmas.html
!    8. https://gcc.gnu.org/projects/cxx1y.html
     9. https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2013/n3638.html
!   10. https://gcc.gnu.org/projects/cxx1y.html
!   11. https://gcc.gnu.org/projects/cxx1y.html
!   12. https://gcc.gnu.org/projects/cxx1y.html
!   13. https://gcc.gnu.org/projects/cxx1y.html
!   14. https://gcc.gnu.org/projects/cxx1y.html
    15. https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2014/n3889.pdf
    16. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/libstdc++/manual/manual/status.html#status.iso.2011
    17. https://gcc.gnu.org/onlinedocs/libstdc++/manual/status.html#status.iso.2014
*************** References
*** 8804,8810 ****
    33. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.8/index.html
- 
                               GCC 4.8 Release Series
  
     (This release series is no longer supported.)
--- 8801,8806 ----
*************** References and Acknowledgements
*** 8875,8898 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.8/changes.html
     3. https://gcc.gnu.org/onlinedocs/4.8.5/
!    4. http://gcc.gnu.org/gcc-4.8/changes.html
     5. https://gcc.gnu.org/onlinedocs/4.8.4/
!    6. http://gcc.gnu.org/gcc-4.8/changes.html
     7. https://gcc.gnu.org/onlinedocs/4.8.3/
!    8. http://gcc.gnu.org/gcc-4.8/changes.html
     9. https://gcc.gnu.org/onlinedocs/4.8.2/
!   10. http://gcc.gnu.org/gcc-4.8/changes.html
    11. https://gcc.gnu.org/onlinedocs/4.8.1/
!   12. http://gcc.gnu.org/gcc-4.8/changes.html
    13. https://gcc.gnu.org/onlinedocs/4.8.0/
!   14. http://gcc.gnu.org/gcc-4.8/buildstat.html
    15. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   16. http://gcc.gnu.org/index.html
    17. mailto:gcc@gcc.gnu.org
!   18. http://gcc.gnu.org/mirrors.html
!   19. http://gcc.gnu.org/git.html
    20. https://gcc.gnu.org/onlinedocs/
    21. mailto:gcc-help@gcc.gnu.org
    22. mailto:gcc@gcc.gnu.org
--- 8871,8894 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.8/changes.html
     3. https://gcc.gnu.org/onlinedocs/4.8.5/
!    4. https://gcc.gnu.org/gcc-4.8/changes.html
     5. https://gcc.gnu.org/onlinedocs/4.8.4/
!    6. https://gcc.gnu.org/gcc-4.8/changes.html
     7. https://gcc.gnu.org/onlinedocs/4.8.3/
!    8. https://gcc.gnu.org/gcc-4.8/changes.html
     9. https://gcc.gnu.org/onlinedocs/4.8.2/
!   10. https://gcc.gnu.org/gcc-4.8/changes.html
    11. https://gcc.gnu.org/onlinedocs/4.8.1/
!   12. https://gcc.gnu.org/gcc-4.8/changes.html
    13. https://gcc.gnu.org/onlinedocs/4.8.0/
!   14. https://gcc.gnu.org/gcc-4.8/buildstat.html
    15. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   16. https://gcc.gnu.org/index.html
    17. mailto:gcc@gcc.gnu.org
!   18. https://gcc.gnu.org/mirrors.html
!   19. https://gcc.gnu.org/git.html
    20. https://gcc.gnu.org/onlinedocs/
    21. mailto:gcc-help@gcc.gnu.org
    22. mailto:gcc@gcc.gnu.org
*************** References
*** 8901,8907 ****
    25. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.8/changes.html
- 
                               GCC 4.8 Release Series
                          Changes, New Features, and Fixes
  
--- 8897,8902 ----
*************** New Languages and Language specific impr
*** 9030,9037 ****
         diagnostics. Combined with the caret information, an example
         diagnostic showing these two features is:
  
! t.c:1:94: error: invalid operands to binary < (have `struct mystruct' and `float
! ')
   #define MYMAX(A,B)    __extension__ ({ __typeof__(A) __a = (A); __typeof__(B) _
  _b = (B); __a < __b ? __b : __a; })
  
--- 9025,9032 ----
         diagnostics. Combined with the caret information, an example
         diagnostic showing these two features is:
  
! t.c:1:94: error: invalid operands to binary < (have ‘struct mystruct’ and ‘float
! ’)
   #define MYMAX(A,B)    __extension__ ({ __typeof__(A) __a = (A); __typeof__(B) _
  _b = (B); __a < __b ? __b : __a; })
  
*************** int i = A().f();  // error, f() requires
*** 9155,9162 ****
              older versions except as noted below.
            + ABI: Some internal names (used in the assembler/object file)
              have changed for symbols declared in the specification part of
!             a module. If an affected module - or a file using it via use
!             association - is recompiled, the module and all files which
              directly use such symbols have to be recompiled as well. This
              change only affects the following kind of module symbols:
                 o Procedure pointers. Note: C-interoperable function
--- 9150,9157 ----
              older versions except as noted below.
            + ABI: Some internal names (used in the assembler/object file)
              have changed for symbols declared in the specification part of
!             a module. If an affected module – or a file using it via use
!             association – is recompiled, the module and all files which
              directly use such symbols have to be recompiled as well. This
              change only affects the following kind of module symbols:
                 o Procedure pointers. Note: C-interoperable function
*************** int i = A().f();  // error, f() requires
*** 9183,9189 ****
       * The [21]-Wcompare-reals command-line option has been added. When
         this is set, warnings are issued when comparing REAL or COMPLEX
         types for equality and inequality; consider replacing a == b by
!        abs(a-b) < eps with a suitable eps. -Wcompare-reals is enabled by
         -Wextra.
       * The [22]-Wtarget-lifetime command-line option has been added
         (enabled with -Wall), which warns if the pointer in a pointer
--- 9178,9184 ----
       * The [21]-Wcompare-reals command-line option has been added. When
         this is set, warnings are issued when comparing REAL or COMPLEX
         types for equality and inequality; consider replacing a == b by
!        abs(a−b) < eps with a suitable eps. -Wcompare-reals is enabled by
         -Wextra.
       * The [22]-Wtarget-lifetime command-line option has been added
         (enabled with -Wall), which warns if the pointer in a pointer
*************** int i = A().f();  // error, f() requires
*** 9195,9201 ****
         4.0e0).
         (For Fortran source code, consider replacing the "q" in
         floating-point literals by a kind parameter (e.g. 4.0e0_qp with a
!        suitable qp). Note that - in Fortran source code - replacing "q" by
         a simple "e" is not equivalent.)
       * The GFORTRAN_TMPDIR environment variable for specifying a
         non-default directory for files opened with STATUS="SCRATCH", is
--- 9190,9196 ----
         4.0e0).
         (For Fortran source code, consider replacing the "q" in
         floating-point literals by a kind parameter (e.g. 4.0e0_qp with a
!        suitable qp). Note that – in Fortran source code – replacing "q" by
         a simple "e" is not equivalent.)
       * The GFORTRAN_TMPDIR environment variable for specifying a
         non-default directory for files opened with STATUS="SCRATCH", is
*************** New Targets and Target Specific Improvem
*** 9290,9297 ****
      }
         The inline assembler in this example will generate code like
      mov r24, 8+7
!        provided c is allocated to R24 and val is allocated to R8...R15.
!        This works because the GNU assembler accepts plain register numbers
         without register prefix.
       * Static initializers with 3-byte symbols are supported now:
      extern const __memx char foo;
--- 9285,9292 ----
      }
         The inline assembler in this example will generate code like
      mov r24, 8+7
!        provided c is allocated to R24 and val is allocated to R8…R15. This
!        works because the GNU assembler accepts plain register numbers
         without register prefix.
       * Static initializers with 3-byte symbols are supported now:
      extern const __memx char foo;
*************** References
*** 9637,9649 ****
     6. https://github.com/google/sanitizers
     7. https://code.google.com/archive/p/data-race-test/wikis/ThreadSanitizer.wiki
     8. https://lkml.org/lkml/2006/11/28/239
!    9. http://gcc.gnu.org/gcc-4.8/cxx0x_status.html
!   10. http://gcc.gnu.org/gcc-4.8/cxx0x_status.html
!   11. http://gcc.gnu.org/gcc-4.8/cxx0x_status.html
    12. https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2011/n3276.pdf
!   13. http://gcc.gnu.org/gcc-4.8/cxx0x_status.html
    14. https://www.open-std.org/JTC1/SC22/WG21/docs/papers/2012/n3386.html
!   15. http://gcc.gnu.org/projects/cxx1y.html
    16. https://gcc.gnu.org/onlinedocs/gcc-4.8.4/libstdc++/manual/manual/status.html#status.iso.2011
    17. https://gcc.gnu.org/onlinedocs/gfortran/BACKTRACE.html
    18. https://gcc.gnu.org/onlinedocs/gfortran/Error-and-Warning-Options.html
--- 9632,9644 ----
     6. https://github.com/google/sanitizers
     7. https://code.google.com/archive/p/data-race-test/wikis/ThreadSanitizer.wiki
     8. https://lkml.org/lkml/2006/11/28/239
!    9. https://gcc.gnu.org/gcc-4.8/cxx0x_status.html
!   10. https://gcc.gnu.org/gcc-4.8/cxx0x_status.html
!   11. https://gcc.gnu.org/gcc-4.8/cxx0x_status.html
    12. https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2011/n3276.pdf
!   13. https://gcc.gnu.org/gcc-4.8/cxx0x_status.html
    14. https://www.open-std.org/JTC1/SC22/WG21/docs/papers/2012/n3386.html
!   15. https://gcc.gnu.org/projects/cxx1y.html
    16. https://gcc.gnu.org/onlinedocs/gcc-4.8.4/libstdc++/manual/manual/status.html#status.iso.2011
    17. https://gcc.gnu.org/onlinedocs/gfortran/BACKTRACE.html
    18. https://gcc.gnu.org/onlinedocs/gfortran/Error-and-Warning-Options.html
*************** References
*** 9674,9680 ****
    43. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.7/index.html
- 
                               GCC 4.7 Release Series
  
     (This release series is no longer supported.)
--- 9669,9674 ----
*************** References and Acknowledgements
*** 9742,9763 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.7/changes.html
     3. https://gcc.gnu.org/onlinedocs/4.7.4/
!    4. http://gcc.gnu.org/gcc-4.7/changes.html
     5. https://gcc.gnu.org/onlinedocs/4.7.3/
!    6. http://gcc.gnu.org/gcc-4.7/changes.html
     7. https://gcc.gnu.org/onlinedocs/4.7.2/
!    8. http://gcc.gnu.org/gcc-4.7/changes.html
     9. https://gcc.gnu.org/onlinedocs/4.7.1/
!   10. http://gcc.gnu.org/gcc-4.7/changes.html
    11. https://gcc.gnu.org/onlinedocs/4.7.0/
!   12. http://gcc.gnu.org/gcc-4.7/buildstat.html
    13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. http://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. http://gcc.gnu.org/mirrors.html
!   17. http://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
--- 9736,9757 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.7/changes.html
     3. https://gcc.gnu.org/onlinedocs/4.7.4/
!    4. https://gcc.gnu.org/gcc-4.7/changes.html
     5. https://gcc.gnu.org/onlinedocs/4.7.3/
!    6. https://gcc.gnu.org/gcc-4.7/changes.html
     7. https://gcc.gnu.org/onlinedocs/4.7.2/
!    8. https://gcc.gnu.org/gcc-4.7/changes.html
     9. https://gcc.gnu.org/onlinedocs/4.7.1/
!   10. https://gcc.gnu.org/gcc-4.7/changes.html
    11. https://gcc.gnu.org/onlinedocs/4.7.0/
!   12. https://gcc.gnu.org/gcc-4.7/buildstat.html
    13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. https://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. https://gcc.gnu.org/mirrors.html
!   17. https://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
*************** References
*** 9766,9772 ****
    23. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.7/changes.html
- 
                               GCC 4.7 Release Series
                          Changes, New Features, and Fixes
  
--- 9760,9765 ----
*************** long double pi = 180.0_degrees;
*** 10097,10103 ****
  template <class T> using Ptr = T*;
  Ptr<int> ip;  // decltype(ip) is int*
  
!      * Thanks to Ville Voutilainen and Pedro Lamar�o, G++ now implements
         [12]C++11 delegating constructors.
  
  struct A {
--- 10090,10096 ----
  template <class T> using Ptr = T*;
  Ptr<int> ip;  // decltype(ip) is int*
  
!      * Thanks to Ville Voutilainen and Pedro Lamarão, G++ now implements
         [12]C++11 delegating constructors.
  
  struct A {
*************** New Targets and Target Specific Improvem
*** 10291,10297 ****
  
       * GCC now supports the XMEGA architecture. This requires GNU binutils
         2.22 or later.
!      * Support for the [35]named address spaces __flash, __flash1, ...,
         __flash5 and __memx has been added. These address spaces locate
         read-only data in flash memory and allow reading from flash memory
         by means of ordinary C code, i.e. without the need of (inline)
--- 10284,10290 ----
  
       * GCC now supports the XMEGA architecture. This requires GNU binutils
         2.22 or later.
!      * Support for the [35]named address spaces __flash, __flash1, …,
         __flash5 and __memx has been added. These address spaces locate
         read-only data in flash memory and allow reading from flash memory
         by means of ordinary C code, i.e. without the need of (inline)
*************** void set_portb (uint8_t value)
*** 10335,10341 ****
         suitable to be used as operand in an I/O command. The address must
         be a constant integer known at compile time.
       * The inline assembler constraint "R" to represent integers in the
!        range -6 ... 5 has been removed without replacement.
       * Many optimizations to:
            + 64-bit integer arithmetic
            + Widening multiplication
--- 10328,10334 ----
         suitable to be used as operand in an I/O command. The address must
         be a constant integer known at compile time.
       * The inline assembler constraint "R" to represent integers in the
!        range −6 … 5 has been removed without replacement.
       * Many optimizations to:
            + 64-bit integer arithmetic
            + Widening multiplication
*************** void set_portb (uint8_t value)
*** 10347,10353 ****
            + If-else decision trees generated by switch instructions
            + Merging of data located in flash memory
            + New libgcc variants for devices with 8-bit wide stack pointer
!           + ...
       * Better documentation:
            + Handling of EIND and indirect jumps on devices with more than
              128 KiB of program memory.
--- 10340,10346 ----
            + If-else decision trees generated by switch instructions
            + Merging of data located in flash memory
            + New libgcc variants for devices with 8-bit wide stack pointer
!           + …
       * Better documentation:
            + Handling of EIND and indirect jumps on devices with more than
              128 KiB of program memory.
*************** References
*** 10568,10579 ****
     4. https://gcc.gnu.org/gcc-4.7/porting_to.html
     5. https://gcc.gnu.org/wiki/TransactionalMemory
     6. https://gcc.gnu.org/wiki/Atomic/GCCMM
!    7. http://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!    8. http://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!    9. http://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!   10. http://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!   11. http://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!   12. http://gcc.gnu.org/gcc-4.7/cxx0x_status.html
    13. https://gcc.gnu.org/PR14258
    14. https://gcc.gnu.org/PR35688
    15. https://gcc.gnu.org/onlinedocs/gcc-4.7.4/libstdc++/manual/manual/status.html#status.iso.2011
--- 10561,10572 ----
     4. https://gcc.gnu.org/gcc-4.7/porting_to.html
     5. https://gcc.gnu.org/wiki/TransactionalMemory
     6. https://gcc.gnu.org/wiki/Atomic/GCCMM
!    7. https://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!    8. https://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!    9. https://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!   10. https://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!   11. https://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!   12. https://gcc.gnu.org/gcc-4.7/cxx0x_status.html
    13. https://gcc.gnu.org/PR14258
    14. https://gcc.gnu.org/PR35688
    15. https://gcc.gnu.org/onlinedocs/gcc-4.7.4/libstdc++/manual/manual/status.html#status.iso.2011
*************** References
*** 10599,10605 ****
    35. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gcc/Named-Address-Spaces.html
    36. http://www.nongnu.org/avr-libc/
    37. https://gcc.gnu.org/PR54461
!   38. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gcc/AVR-Built%5f002din-Functions.html
    39. https://sites.google.com/site/x32abi/
    40. https://dwarfstd.org/issues/100909.1.html
    41. https://dwarfstd.org/issues/100909.2.html
--- 10592,10598 ----
    35. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gcc/Named-Address-Spaces.html
    36. http://www.nongnu.org/avr-libc/
    37. https://gcc.gnu.org/PR54461
!   38. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gcc/AVR-Built_002din-Functions.html
    39. https://sites.google.com/site/x32abi/
    40. https://dwarfstd.org/issues/100909.1.html
    41. https://dwarfstd.org/issues/100909.2.html
*************** References
*** 10618,10624 ****
    54. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.6/index.html
- 
                               GCC 4.6 Release Series
  
     (This release series is no longer supported.)
--- 10611,10616 ----
*************** References and Acknowledgements
*** 10686,10707 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.6/changes.html
     3. https://gcc.gnu.org/onlinedocs/4.6.4/
!    4. http://gcc.gnu.org/gcc-4.6/changes.html
     5. https://gcc.gnu.org/onlinedocs/4.6.3/
!    6. http://gcc.gnu.org/gcc-4.6/changes.html
     7. https://gcc.gnu.org/onlinedocs/4.6.2/
!    8. http://gcc.gnu.org/gcc-4.6/changes.html
     9. https://gcc.gnu.org/onlinedocs/4.6.1/
!   10. http://gcc.gnu.org/gcc-4.6/changes.html
    11. https://gcc.gnu.org/onlinedocs/4.6.0/
!   12. http://gcc.gnu.org/gcc-4.6/buildstat.html
    13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. http://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. http://gcc.gnu.org/mirrors.html
!   17. http://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
--- 10678,10699 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.6/changes.html
     3. https://gcc.gnu.org/onlinedocs/4.6.4/
!    4. https://gcc.gnu.org/gcc-4.6/changes.html
     5. https://gcc.gnu.org/onlinedocs/4.6.3/
!    6. https://gcc.gnu.org/gcc-4.6/changes.html
     7. https://gcc.gnu.org/onlinedocs/4.6.2/
!    8. https://gcc.gnu.org/gcc-4.6/changes.html
     9. https://gcc.gnu.org/onlinedocs/4.6.1/
!   10. https://gcc.gnu.org/gcc-4.6/changes.html
    11. https://gcc.gnu.org/onlinedocs/4.6.0/
!   12. https://gcc.gnu.org/gcc-4.6/buildstat.html
    13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. https://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. https://gcc.gnu.org/mirrors.html
!   17. https://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
*************** References
*** 10710,10716 ****
    23. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.6/changes.html
- 
                               GCC 4.6 Release Series
                          Changes, New Features, and Fixes
  
--- 10702,10707 ----
*************** New Languages and Language specific impr
*** 11050,11056 ****
  
       * [12]Improved experimental support for the upcoming ISO C++
         standard, C++0x, including using constexpr and nullptr.
!      * Performance improvements to the [13]Debug Mode, thanks to Fran�ois
         Dumont.
       * Atomic operations used for reference-counting are annotated so that
         they can be understood by race detectors such as Helgrind, see
--- 11041,11047 ----
  
       * [12]Improved experimental support for the upcoming ISO C++
         standard, C++0x, including using constexpr and nullptr.
!      * Performance improvements to the [13]Debug Mode, thanks to François
         Dumont.
       * Atomic operations used for reference-counting are annotated so that
         they can be understood by race detectors such as Helgrind, see
*************** New Languages and Language specific impr
*** 11105,11111 ****
              allocated (if unallocated) or reallocated (if the shape or
              type parameter is different). To avoid the small performance
              penalty, you can use a(:) = ... instead of a = ... for arrays
!             and character strings - or disable the feature using -std=f95
              or -fno-realloc-lhs.
            + Deferred type parameter: For scalar allocatable and pointer
              variables the character length can be deferred.
--- 11096,11102 ----
              allocated (if unallocated) or reallocated (if the shape or
              type parameter is different). To avoid the small performance
              penalty, you can use a(:) = ... instead of a = ... for arrays
!             and character strings – or disable the feature using -std=f95
              or -fno-realloc-lhs.
            + Deferred type parameter: For scalar allocatable and pointer
              variables the character length can be deferred.
*************** New Languages and Language specific impr
*** 11160,11166 ****
              be declared in a single PROCEDURE statement; implied-shape
              arrays are supported for named constants (PARAMETER). The
              transformational, three argument versions of BESSEL_JN and
!             BESSEL_YN were added - the elemental, two-argument version had
              been added in GCC 4.4; note that the transformational
              functions use a recurrence algorithm.
  
--- 11151,11157 ----
              be declared in a single PROCEDURE statement; implied-shape
              arrays are supported for named constants (PARAMETER). The
              transformational, three argument versions of BESSEL_JN and
!             BESSEL_YN were added – the elemental, two-argument version had
              been added in GCC 4.4; note that the transformational
              functions use a recurrence algorithm.
  
*************** New Targets and Target Specific Improvem
*** 11290,11296 ****
         and store multiples.
       * Several enhancements were committed to improve SIMD code generation
         for NEON by adding support for widening instructions, misaligned
!        loads and stores, vector conditionals and support for 64 bit
         arithmetic.
       * Support was added for the Faraday cores fa526, fa606te, fa626te,
         fmp626te, fmp626 and fa726te and can be used with the respective
--- 11281,11287 ----
         and store multiples.
       * Several enhancements were committed to improve SIMD code generation
         for NEON by adding support for widening instructions, misaligned
!        loads and stores, vector conditionals and support for 64-bit
         arithmetic.
       * Support was added for the Faraday cores fa526, fa606te, fa626te,
         fmp626te, fmp626 and fa726te and can be used with the respective
*************** New Targets and Target Specific Improvem
*** 11396,11404 ****
         instructions.
       * The GCC compiler on AIX now defaults to a process layout with a
         larger data space allowing larger programs to be compiled.
!      * The GCC long double type on AIX 6.1 and above has reverted to 64
!        bit double precision, matching the AIX XL compiler default, because
!        of missing C99 symbols required by the GCC runtime.
       * The default processor scheduling model and tuning for PowerPC64
         GNU/Linux and for AIX 6.1 and above now is POWER7.
       * Starting with GCC 4.6.1, vectors of type vector long long or vector
--- 11387,11395 ----
         instructions.
       * The GCC compiler on AIX now defaults to a process layout with a
         larger data space allowing larger programs to be compiled.
!      * The GCC long double type on AIX 6.1 and above has reverted to
!        64-bit double precision, matching the AIX XL compiler default,
!        because of missing C99 symbols required by the GCC runtime.
       * The default processor scheduling model and tuning for PowerPC64
         GNU/Linux and for AIX 6.1 and above now is POWER7.
       * Starting with GCC 4.6.1, vectors of type vector long long or vector
*************** GCC 4.6.4
*** 11605,11621 ****
     provided this notice is preserved.
  
     These pages are [28]maintained by the GCC team. Last modified
!    2023-01-18.
  
  References
  
     1. https://sourceware.org/bugzilla/show_bug.cgi?id=10401
!    2. http://gcc.gnu.org/gcc-4.5/changes.html
!    3. http://gcc.gnu.org/gcc-4.5/changes.html#obsoleted
!    4. http://gcc.gnu.org/gcc-4.6/porting_to.html
!    5. http://gcc.gnu.org/projects/lto/whopr.pdf
     6. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html#Warning-Options
!    7. http://gcc.gnu.org/gcc-4.6/cxx0x_status.html
     8. https://gcc.gnu.org/PR43145
     9. https://gcc.gnu.org/PR43680
    10. https://gcc.gnu.org/PR33558
--- 11596,11612 ----
     provided this notice is preserved.
  
     These pages are [28]maintained by the GCC team. Last modified
!    2024-05-17.
  
  References
  
     1. https://sourceware.org/bugzilla/show_bug.cgi?id=10401
!    2. https://gcc.gnu.org/gcc-4.5/changes.html
!    3. https://gcc.gnu.org/gcc-4.5/changes.html#obsoleted
!    4. https://gcc.gnu.org/gcc-4.6/porting_to.html
!    5. https://gcc.gnu.org/projects/lto/whopr.pdf
     6. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html#Warning-Options
!    7. https://gcc.gnu.org/gcc-4.6/cxx0x_status.html
     8. https://gcc.gnu.org/PR43145
     9. https://gcc.gnu.org/PR43680
    10. https://gcc.gnu.org/PR33558
*************** References
*** 11639,11645 ****
    28. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.5/index.html
- 
                               GCC 4.5 Release Series
  
     (This release series is no longer supported.)
--- 11630,11635 ----
*************** References and Acknowledgements
*** 11707,11723 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.5/changes.html
!    3. http://gcc.gnu.org/gcc-4.5/changes.html
!    4. http://gcc.gnu.org/gcc-4.5/changes.html
!    5. http://gcc.gnu.org/gcc-4.5/changes.html
!    6. http://gcc.gnu.org/gcc-4.5/changes.html
!    7. http://gcc.gnu.org/gcc-4.5/buildstat.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    9. http://gcc.gnu.org/index.html
    10. mailto:gcc@gcc.gnu.org
!   11. http://gcc.gnu.org/mirrors.html
!   12. http://gcc.gnu.org/git.html
    13. https://gcc.gnu.org/onlinedocs/
    14. mailto:gcc-help@gcc.gnu.org
    15. mailto:gcc@gcc.gnu.org
--- 11697,11713 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.5/changes.html
!    3. https://gcc.gnu.org/gcc-4.5/changes.html
!    4. https://gcc.gnu.org/gcc-4.5/changes.html
!    5. https://gcc.gnu.org/gcc-4.5/changes.html
!    6. https://gcc.gnu.org/gcc-4.5/changes.html
!    7. https://gcc.gnu.org/gcc-4.5/buildstat.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    9. https://gcc.gnu.org/index.html
    10. mailto:gcc@gcc.gnu.org
!   11. https://gcc.gnu.org/mirrors.html
!   12. https://gcc.gnu.org/git.html
    13. https://gcc.gnu.org/onlinedocs/
    14. mailto:gcc-help@gcc.gnu.org
    15. mailto:gcc@gcc.gnu.org
*************** References
*** 11726,11732 ****
    18. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.5/changes.html
- 
                               GCC 4.5 Release Series
                          Changes, New Features, and Fixes
  
--- 11716,11721 ----
*************** New Languages and Language specific impr
*** 11963,11969 ****
         defined ([12]DR 757).
       * Labels may now have attributes, as has been permitted for a while
         in C. This is only permitted when the label definition and the
!        attribute specifier is followed by a semicolon--i.e., the label
         applies to an empty statement. The only useful attribute for a
         label is unused.
       * G++ now implements [13]DR 176. Previously G++ did not support using
--- 11952,11958 ----
         defined ([12]DR 757).
       * Labels may now have attributes, as has been permitted for a while
         in C. This is only permitted when the label definition and the
!        attribute specifier is followed by a semicolon—i.e., the label
         applies to an empty statement. The only useful attribute for a
         label is unused.
       * G++ now implements [13]DR 176. Previously G++ did not support using
*************** vector-size: improvement = 3: call stack
*** 12045,12051 ****
  
    Fortran
  
!      * The COMMON default padding has been changed - instead of adding the
         padding before a variable it is now added afterwards, which
         increases the compatibility with other vendors and helps to obtain
         the correct output in some cases. Cf. also the -falign-commons
--- 12034,12040 ----
  
    Fortran
  
!      * The COMMON default padding has been changed – instead of adding the
         padding before a variable it is now added afterwards, which
         increases the compatibility with other vendors and helps to obtain
         the correct output in some cases. Cf. also the -falign-commons
*************** GCC 4.5.4
*** 12374,12400 ****
     provided this notice is preserved.
  
     These pages are [32]maintained by the GCC team. Last modified
!    2023-01-15.
  
  References
  
!    1. https://www.multiprecision.org/mpc/
     2. https://gcc.gnu.org/install/prerequisites.html
     3. https://gcc.gnu.org/ml/gcc/2010-01/msg00510.html
!    4. http://gcc.gnu.org/gcc-4.4/changes.html#obsoleted
!    5. http://gcc.gnu.org/gcc-4.5/changes.html#x86
     6. https://gcc.gnu.org/PR30789
     7. https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html#index-flto-801
     8. https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html#index-fwhopr-802
     9. https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html#index-fwhole-program-800
    10. https://gcc.gnu.org/onlinedocs/gcc/Restricted-Pointers.html
!   11. http://gcc.gnu.org/gcc-4.5/cxx0x_status.html
    12. https://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#757
    13. https://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#176
    14. https://gcc.gnu.org/onlinedocs/libstdc++/manual/profile_mode.html
    15. https://gcc.gnu.org/onlinedocs/libstdc++/manual/status.html#status.iso.tr24733
    16. https://sourceware.org/gdb/wiki/STLSupport
!   17. http://gcc.gnu.org/gcc-4.4/changes.html
    18. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html
    19. https://gcc.gnu.org/onlinedocs/gfortran/Mixed-Language-Programming.html
    20. https://gcc.gnu.org/onlinedocs/gfortran/GNU-Fortran-Compiler-Directives.html
--- 12363,12389 ----
     provided this notice is preserved.
  
     These pages are [32]maintained by the GCC team. Last modified
!    2023-07-30.
  
  References
  
!    1. https://www.multiprecision.org/
     2. https://gcc.gnu.org/install/prerequisites.html
     3. https://gcc.gnu.org/ml/gcc/2010-01/msg00510.html
!    4. https://gcc.gnu.org/gcc-4.4/changes.html#obsoleted
!    5. https://gcc.gnu.org/gcc-4.5/changes.html#x86
     6. https://gcc.gnu.org/PR30789
     7. https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html#index-flto-801
     8. https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html#index-fwhopr-802
     9. https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html#index-fwhole-program-800
    10. https://gcc.gnu.org/onlinedocs/gcc/Restricted-Pointers.html
!   11. https://gcc.gnu.org/gcc-4.5/cxx0x_status.html
    12. https://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#757
    13. https://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#176
    14. https://gcc.gnu.org/onlinedocs/libstdc++/manual/profile_mode.html
    15. https://gcc.gnu.org/onlinedocs/libstdc++/manual/status.html#status.iso.tr24733
    16. https://sourceware.org/gdb/wiki/STLSupport
!   17. https://gcc.gnu.org/gcc-4.4/changes.html
    18. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html
    19. https://gcc.gnu.org/onlinedocs/gfortran/Mixed-Language-Programming.html
    20. https://gcc.gnu.org/onlinedocs/gfortran/GNU-Fortran-Compiler-Directives.html
*************** References
*** 12412,12418 ****
    32. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.4/index.html
- 
                               GCC 4.4 Release Series
  
     This release series is no longer maintained.
--- 12401,12406 ----
*************** References and Acknowledgements
*** 12489,12508 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.4/changes.html
!    3. http://gcc.gnu.org/gcc-4.4/changes.html
!    4. http://gcc.gnu.org/gcc-4.4/changes.html
!    5. http://gcc.gnu.org/gcc-4.4/changes.html
!    6. http://gcc.gnu.org/gcc-4.4/changes.html
!    7. http://gcc.gnu.org/gcc-4.4/changes.html
!    8. http://gcc.gnu.org/gcc-4.4/changes.html
!    9. http://gcc.gnu.org/gcc-4.4/changes.html
!   10. http://gcc.gnu.org/gcc-4.4/buildstat.html
    11. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   12. http://gcc.gnu.org/index.html
    13. mailto:gcc@gcc.gnu.org
!   14. http://gcc.gnu.org/mirrors.html
!   15. http://gcc.gnu.org/git.html
    16. https://gcc.gnu.org/onlinedocs/
    17. mailto:gcc-help@gcc.gnu.org
    18. mailto:gcc@gcc.gnu.org
--- 12477,12496 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.4/changes.html
!    3. https://gcc.gnu.org/gcc-4.4/changes.html
!    4. https://gcc.gnu.org/gcc-4.4/changes.html
!    5. https://gcc.gnu.org/gcc-4.4/changes.html
!    6. https://gcc.gnu.org/gcc-4.4/changes.html
!    7. https://gcc.gnu.org/gcc-4.4/changes.html
!    8. https://gcc.gnu.org/gcc-4.4/changes.html
!    9. https://gcc.gnu.org/gcc-4.4/changes.html
!   10. https://gcc.gnu.org/gcc-4.4/buildstat.html
    11. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   12. https://gcc.gnu.org/index.html
    13. mailto:gcc@gcc.gnu.org
!   14. https://gcc.gnu.org/mirrors.html
!   15. https://gcc.gnu.org/git.html
    16. https://gcc.gnu.org/onlinedocs/
    17. mailto:gcc-help@gcc.gnu.org
    18. mailto:gcc@gcc.gnu.org
*************** References
*** 12511,12517 ****
    21. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.4/changes.html
- 
                               GCC 4.4 Release Series
                          Changes, New Features, and Fixes
  
--- 12499,12504 ----
*************** GCC 4.4.7
*** 13118,13129 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-4.4/changes.html#4.4.7
!    2. http://gcc.gnu.org/gcc-4.3/changes.html#obsoleted
!    3. http://gcc.gnu.org/gcc-4.4/porting_to.html
     4. https://gcc.gnu.org/wiki/Graphite
     5. https://www.open-std.org/jtc1/sc22/wg14/www/docs/n1040.pdf
!    6. http://gcc.gnu.org/gcc-4.4/cxx0x_status.html
     7. https://gcc.gnu.org/onlinedocs/gfortran/Preprocessing-Options.html
     8. https://gcc.gnu.org/onlinedocs/gfortran/Error-and-Warning-Options.html#index-g_t_0040code_007bWarray-temporaries_007d-125
     9. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html#index-g_t_0040code_007bfcheck-array-temporaries_007d-221
--- 13105,13116 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-4.4/changes.html#4.4.7
!    2. https://gcc.gnu.org/gcc-4.3/changes.html#obsoleted
!    3. https://gcc.gnu.org/gcc-4.4/porting_to.html
     4. https://gcc.gnu.org/wiki/Graphite
     5. https://www.open-std.org/jtc1/sc22/wg14/www/docs/n1040.pdf
!    6. https://gcc.gnu.org/gcc-4.4/cxx0x_status.html
     7. https://gcc.gnu.org/onlinedocs/gfortran/Preprocessing-Options.html
     8. https://gcc.gnu.org/onlinedocs/gfortran/Error-and-Warning-Options.html#index-g_t_0040code_007bWarray-temporaries_007d-125
     9. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html#index-g_t_0040code_007bfcheck-array-temporaries_007d-221
*************** References
*** 13143,13149 ****
    23. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.3/index.html
- 
                               GCC 4.3 Release Series
  
     (This release series is no longer supported.)
--- 13130,13135 ----
*************** References and Acknowledgements
*** 13217,13235 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.3/changes.html
!    3. http://gcc.gnu.org/gcc-4.3/changes.html
!    4. http://gcc.gnu.org/gcc-4.3/changes.html
!    5. http://gcc.gnu.org/gcc-4.3/changes.html
!    6. http://gcc.gnu.org/gcc-4.3/changes.html
!    7. http://gcc.gnu.org/gcc-4.3/changes.html
!    8. http://gcc.gnu.org/gcc-4.3/changes.html
!    9. http://gcc.gnu.org/gcc-4.3/buildstat.html
    10. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   11. http://gcc.gnu.org/index.html
    12. mailto:gcc@gcc.gnu.org
!   13. http://gcc.gnu.org/mirrors.html
!   14. http://gcc.gnu.org/git.html
    15. https://gcc.gnu.org/onlinedocs/
    16. mailto:gcc-help@gcc.gnu.org
    17. mailto:gcc@gcc.gnu.org
--- 13203,13221 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.3/changes.html
!    3. https://gcc.gnu.org/gcc-4.3/changes.html
!    4. https://gcc.gnu.org/gcc-4.3/changes.html
!    5. https://gcc.gnu.org/gcc-4.3/changes.html
!    6. https://gcc.gnu.org/gcc-4.3/changes.html
!    7. https://gcc.gnu.org/gcc-4.3/changes.html
!    8. https://gcc.gnu.org/gcc-4.3/changes.html
!    9. https://gcc.gnu.org/gcc-4.3/buildstat.html
    10. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   11. https://gcc.gnu.org/index.html
    12. mailto:gcc@gcc.gnu.org
!   13. https://gcc.gnu.org/mirrors.html
!   14. https://gcc.gnu.org/git.html
    15. https://gcc.gnu.org/onlinedocs/
    16. mailto:gcc-help@gcc.gnu.org
    17. mailto:gcc@gcc.gnu.org
*************** References
*** 13238,13244 ****
    20. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.3/changes.html
- 
                               GCC 4.3 Release Series
                          Changes, New Features, and Fixes
  
--- 13224,13229 ----
*************** GCC 4.3.6
*** 14021,14036 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-4.3/changes.html#4.3.5
     2. https://gmplib.org/
     3. https://www.mpfr.org/
     4. https://gcc.gnu.org/install/prerequisites.html
     5. https://gcc.gnu.org/ml/gcc-announce/2001/msg00000.html
     6. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html#Warning-Options
!    7. http://gcc.gnu.org/gcc-4.3/porting_to.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html
!    9. http://gcc.gnu.org/gcc-4.3/cxx0x_status.html
!   10. http://gcc.gnu.org/gcc-4.3/cxx0x_status.html
    11. https://gcc.gnu.org/onlinedocs/libstdc++/manual/parallel_mode.html
    12. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html#Code-Gen-Options
    13. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html#index-g_t_0040code_007bfinit-local-zero_007d-167
--- 14006,14021 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-4.3/changes.html#4.3.5
     2. https://gmplib.org/
     3. https://www.mpfr.org/
     4. https://gcc.gnu.org/install/prerequisites.html
     5. https://gcc.gnu.org/ml/gcc-announce/2001/msg00000.html
     6. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html#Warning-Options
!    7. https://gcc.gnu.org/gcc-4.3/porting_to.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html
!    9. https://gcc.gnu.org/gcc-4.3/cxx0x_status.html
!   10. https://gcc.gnu.org/gcc-4.3/cxx0x_status.html
    11. https://gcc.gnu.org/onlinedocs/libstdc++/manual/parallel_mode.html
    12. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html#Code-Gen-Options
    13. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html#index-g_t_0040code_007bfinit-local-zero_007d-167
*************** References
*** 14053,14059 ****
    30. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.2/index.html
- 
                               GCC 4.2 Release Series
  
     (This release series is no longer supported.)
--- 14038,14043 ----
*************** References and Acknowledgements
*** 14121,14137 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.2/changes.html
!    3. http://gcc.gnu.org/gcc-4.2/changes.html
!    4. http://gcc.gnu.org/gcc-4.2/changes.html
!    5. http://gcc.gnu.org/gcc-4.2/changes.html
!    6. http://gcc.gnu.org/gcc-4.2/changes.html
!    7. http://gcc.gnu.org/gcc-4.2/buildstat.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    9. http://gcc.gnu.org/index.html
    10. mailto:gcc@gcc.gnu.org
!   11. http://gcc.gnu.org/mirrors.html
!   12. http://gcc.gnu.org/git.html
    13. https://gcc.gnu.org/onlinedocs/
    14. mailto:gcc-help@gcc.gnu.org
    15. mailto:gcc@gcc.gnu.org
--- 14105,14121 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.2/changes.html
!    3. https://gcc.gnu.org/gcc-4.2/changes.html
!    4. https://gcc.gnu.org/gcc-4.2/changes.html
!    5. https://gcc.gnu.org/gcc-4.2/changes.html
!    6. https://gcc.gnu.org/gcc-4.2/changes.html
!    7. https://gcc.gnu.org/gcc-4.2/buildstat.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    9. https://gcc.gnu.org/index.html
    10. mailto:gcc@gcc.gnu.org
!   11. https://gcc.gnu.org/mirrors.html
!   12. https://gcc.gnu.org/git.html
    13. https://gcc.gnu.org/onlinedocs/
    14. mailto:gcc-help@gcc.gnu.org
    15. mailto:gcc@gcc.gnu.org
*************** References
*** 14140,14146 ****
    18. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.2/changes.html
- 
                               GCC 4.2 Release Series
                          Changes, New Features, and Fixes
  
--- 14124,14129 ----
*************** Other significant improvements
*** 14448,14454 ****
  
  References
  
!    1. http://gcc.gnu.org/projects/gomp/
     2. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html
     3. https://gcc.gnu.org/onlinedocs/libstdc++/ext/pb_ds/index.html
     4. https://gcc.gnu.org/onlinedocs/gfortran/Runtime-Options.html
--- 14431,14437 ----
  
  References
  
!    1. https://gcc.gnu.org/projects/gomp/
     2. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html
     3. https://gcc.gnu.org/onlinedocs/libstdc++/ext/pb_ds/index.html
     4. https://gcc.gnu.org/onlinedocs/gfortran/Runtime-Options.html
*************** References
*** 14461,14467 ****
    11. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.1/index.html
- 
                               GCC 4.1 Release Series
  
     (This release series is no longer supported.)
--- 14444,14449 ----
*************** References and Acknowledgements
*** 14523,14537 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.1/changes.html#4.1.2
!    3. http://gcc.gnu.org/gcc-4.1/changes.html
!    4. http://gcc.gnu.org/gcc-4.1/changes.html
!    5. http://gcc.gnu.org/gcc-4.1/buildstat.html
     6. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    7. http://gcc.gnu.org/index.html
     8. mailto:gcc@gcc.gnu.org
!    9. http://gcc.gnu.org/mirrors.html
!   10. http://gcc.gnu.org/git.html
    11. https://gcc.gnu.org/onlinedocs/
    12. mailto:gcc-help@gcc.gnu.org
    13. mailto:gcc@gcc.gnu.org
--- 14505,14519 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.1/changes.html#4.1.2
!    3. https://gcc.gnu.org/gcc-4.1/changes.html
!    4. https://gcc.gnu.org/gcc-4.1/changes.html
!    5. https://gcc.gnu.org/gcc-4.1/buildstat.html
     6. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    7. https://gcc.gnu.org/index.html
     8. mailto:gcc@gcc.gnu.org
!    9. https://gcc.gnu.org/mirrors.html
!   10. https://gcc.gnu.org/git.html
    11. https://gcc.gnu.org/onlinedocs/
    12. mailto:gcc-help@gcc.gnu.org
    13. mailto:gcc@gcc.gnu.org
*************** References
*** 14540,14546 ****
    16. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.1/changes.html
- 
                               GCC 4.1 Release Series
                          Changes, New Features, and Fixes
  
--- 14522,14527 ----
*************** GCC 4.1.2
*** 15081,15087 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-4.1/changes.html#4.1.2
     2. https://gcc.gnu.org/ml/java/2005-05/msg00260.html
     3. https://developer.classpath.org/doc/
     4. https://gcc.gnu.org/onlinedocs/gcc-4.1.0/gcc/Atomic-Builtins.html
--- 15062,15068 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-4.1/changes.html#4.1.2
     2. https://gcc.gnu.org/ml/java/2005-05/msg00260.html
     3. https://developer.classpath.org/doc/
     4. https://gcc.gnu.org/onlinedocs/gcc-4.1.0/gcc/Atomic-Builtins.html
*************** References
*** 15094,15100 ****
    11. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.0/index.html
- 
                               GCC 4.0 Release Series
  
     (This release series is no longer supported.)
--- 15075,15080 ----
*************** References and Acknowledgements
*** 15162,15178 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.0/changes.html#4.0.4
!    3. http://gcc.gnu.org/gcc-4.0/changes.html#4.0.3
!    4. http://gcc.gnu.org/gcc-4.0/changes.html#4.0.2
!    5. http://gcc.gnu.org/gcc-4.0/changes.html#4.0.1
!    6. http://gcc.gnu.org/gcc-4.0/changes.html
!    7. http://gcc.gnu.org/gcc-4.0/buildstat.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    9. http://gcc.gnu.org/index.html
    10. mailto:gcc@gcc.gnu.org
!   11. http://gcc.gnu.org/mirrors.html
!   12. http://gcc.gnu.org/git.html
    13. https://gcc.gnu.org/onlinedocs/
    14. mailto:gcc-help@gcc.gnu.org
    15. mailto:gcc@gcc.gnu.org
--- 15142,15158 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.0/changes.html#4.0.4
!    3. https://gcc.gnu.org/gcc-4.0/changes.html#4.0.3
!    4. https://gcc.gnu.org/gcc-4.0/changes.html#4.0.2
!    5. https://gcc.gnu.org/gcc-4.0/changes.html#4.0.1
!    6. https://gcc.gnu.org/gcc-4.0/changes.html
!    7. https://gcc.gnu.org/gcc-4.0/buildstat.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    9. https://gcc.gnu.org/index.html
    10. mailto:gcc@gcc.gnu.org
!   11. https://gcc.gnu.org/mirrors.html
!   12. https://gcc.gnu.org/git.html
    13. https://gcc.gnu.org/onlinedocs/
    14. mailto:gcc-help@gcc.gnu.org
    15. mailto:gcc@gcc.gnu.org
*************** References
*** 15181,15187 ****
    18. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.0/changes.html
- 
                               GCC 4.0 Release Series
                          Changes, New Features, and Fixes
  
--- 15161,15166 ----
*************** GCC 4.0.4
*** 15687,15701 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-4.0/changes.html#4.0.4
     2. https://www.cl.cam.ac.uk/~mgk25/ucs/quotes.html
!    3. http://gcc.gnu.org/projects/tree-ssa/
!    4. http://gcc.gnu.org/projects/tree-ssa/vectorization.html
!    5. http://gcc.gnu.org/news/sms.html
     6. https://www.akkadia.org/drepper/dsohowto.pdf
!    7. http://gcc.gnu.org/gcc-4.0/changes.html#visibility
     8. https://itanium-cxx-abi.github.io/cxx-abi/
!    9. http://gcc.gnu.org/fortran/
    10. https://gcc.gnu.org/install/
    11. https://gcc.gnu.org/wiki/Visibility
    12. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.0.1
--- 15666,15680 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-4.0/changes.html#4.0.4
     2. https://www.cl.cam.ac.uk/~mgk25/ucs/quotes.html
!    3. https://gcc.gnu.org/projects/tree-ssa/
!    4. https://gcc.gnu.org/projects/tree-ssa/vectorization.html
!    5. https://gcc.gnu.org/news/sms.html
     6. https://www.akkadia.org/drepper/dsohowto.pdf
!    7. https://gcc.gnu.org/gcc-4.0/changes.html#visibility
     8. https://itanium-cxx-abi.github.io/cxx-abi/
!    9. https://gcc.gnu.org/fortran/
    10. https://gcc.gnu.org/install/
    11. https://gcc.gnu.org/wiki/Visibility
    12. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.0.1
*************** References
*** 15710,15716 ****
    21. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.4/index.html
- 
                               GCC 3.4 Release Series
  
     (This release series is no longer supported.)
--- 15689,15694 ----
*************** References and Acknowledgements
*** 15789,15809 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-3.4/changes.html
     3. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    4. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.6
!    5. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.5
!    6. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.4
!    7. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.3
!    8. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.2
!    9. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.1
!   10. http://gcc.gnu.org/gcc-3.4/changes.html
!   11. http://gcc.gnu.org/gcc-3.4/buildstat.html
    12. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   13. http://gcc.gnu.org/index.html
    14. mailto:gcc@gcc.gnu.org
!   15. http://gcc.gnu.org/mirrors.html
!   16. http://gcc.gnu.org/git.html
    17. https://gcc.gnu.org/onlinedocs/
    18. mailto:gcc-help@gcc.gnu.org
    19. mailto:gcc@gcc.gnu.org
--- 15767,15787 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-3.4/changes.html
     3. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    4. https://gcc.gnu.org/gcc-3.4/changes.html#3.4.6
!    5. https://gcc.gnu.org/gcc-3.4/changes.html#3.4.5
!    6. https://gcc.gnu.org/gcc-3.4/changes.html#3.4.4
!    7. https://gcc.gnu.org/gcc-3.4/changes.html#3.4.3
!    8. https://gcc.gnu.org/gcc-3.4/changes.html#3.4.2
!    9. https://gcc.gnu.org/gcc-3.4/changes.html#3.4.1
!   10. https://gcc.gnu.org/gcc-3.4/changes.html
!   11. https://gcc.gnu.org/gcc-3.4/buildstat.html
    12. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   13. https://gcc.gnu.org/index.html
    14. mailto:gcc@gcc.gnu.org
!   15. https://gcc.gnu.org/mirrors.html
!   16. https://gcc.gnu.org/git.html
    17. https://gcc.gnu.org/onlinedocs/
    18. mailto:gcc-help@gcc.gnu.org
    19. mailto:gcc@gcc.gnu.org
*************** References
*** 15812,15818 ****
    22. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.4/changes.html
- 
                               GCC 3.4 Release Series
                          Changes, New Features, and Fixes
  
--- 15790,15795 ----
*************** GCC 3.4.6
*** 17576,17593 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.6
!    2. http://gcc.gnu.org/gcc-3.4/changes.html#cplusplus
!    3. http://gcc.gnu.org/gcc-3.3/changes.html#obsolete_systems
!    4. http://gcc.gnu.org/gcc-3.4/changes.html#obsolete_systems
!    5. http://gcc.gnu.org/gcc-3.4/mips-abi.html
!    6. http://gcc.gnu.org/gcc-3.4/sparc-abi.html
     7. https://www.boost.org/
     8. https://gcc.gnu.org/PR11953
     9. https://gcc.gnu.org/PR8361
!   10. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Other-Builtins.html#Other%20Builtins
    11. https://www.open-std.org/jtc1/sc22/wg21/docs/cwg_closed.html#209
!   12. http://gcc.gnu.org/bugs/#cxx_rvalbind
    13. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Objective-C-Dialect-Options.html
    14. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Objective-C-Dialect-Options.html
    15. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Objective-C-Dialect-Options.html
--- 17553,17570 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-3.4/changes.html#3.4.6
!    2. https://gcc.gnu.org/gcc-3.4/changes.html#cplusplus
!    3. https://gcc.gnu.org/gcc-3.3/changes.html#obsolete_systems
!    4. https://gcc.gnu.org/gcc-3.4/changes.html#obsolete_systems
!    5. https://gcc.gnu.org/gcc-3.4/mips-abi.html
!    6. https://gcc.gnu.org/gcc-3.4/sparc-abi.html
     7. https://www.boost.org/
     8. https://gcc.gnu.org/PR11953
     9. https://gcc.gnu.org/PR8361
!   10. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Other-Builtins.html#Other Builtins
    11. https://www.open-std.org/jtc1/sc22/wg21/docs/cwg_closed.html#209
!   12. https://gcc.gnu.org/bugs/#cxx_rvalbind
    13. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Objective-C-Dialect-Options.html
    14. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Objective-C-Dialect-Options.html
    15. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Objective-C-Dialect-Options.html
*************** References
*** 17598,17607 ****
    20. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gccint/Processor-pipeline-description.html
    21. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gccint/Comparison-of-the-two-descriptions.html
    22. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gccint/Processor-pipeline-description.html
!   23. http://gcc.gnu.org/gcc-3.4/mips-abi.html
!   24. http://gcc.gnu.org/gcc-3.4/powerpc-abi.html
!   25. http://gcc.gnu.org/gcc-3.4/sparc-abi.html
!   26. https://gcc.gnu.org/bugzilla/buglist.cgi?short_desc_type=notregexp&short_desc=%5C%5B3%5C.4.*%5BRr%5Degression&target_milestone=3.4.0&bug_status=RESOLVED&resolution=FIXED
    27. https://gcc.gnu.org/PR10129
    28. https://gcc.gnu.org/PR14576
    29. https://gcc.gnu.org/PR14760
--- 17575,17584 ----
    20. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gccint/Processor-pipeline-description.html
    21. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gccint/Comparison-of-the-two-descriptions.html
    22. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gccint/Processor-pipeline-description.html
!   23. https://gcc.gnu.org/gcc-3.4/mips-abi.html
!   24. https://gcc.gnu.org/gcc-3.4/powerpc-abi.html
!   25. https://gcc.gnu.org/gcc-3.4/sparc-abi.html
!   26. https://gcc.gnu.org/bugzilla/buglist.cgi?short_desc_type=notregexp&short_desc=\[3\.4.*[Rr]egression&target_milestone=3.4.0&bug_status=RESOLVED&resolution=FIXED
    27. https://gcc.gnu.org/PR10129
    28. https://gcc.gnu.org/PR14576
    29. https://gcc.gnu.org/PR14760
*************** References
*** 17994,18000 ****
   416. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.3/index.html
- 
                               GCC 3.3 Release Series
  
     (This release series is no longer supported.)
--- 17971,17976 ----
*************** References and Acknowledgements
*** 18073,18092 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-3.3/changes.html
     3. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    4. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.6
!    5. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.5
!    6. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.4
!    7. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.3
!    8. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.2
!    9. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.1
!   10. http://gcc.gnu.org/gcc-3.3/changes.html
!   11. http://gcc.gnu.org/gcc-3.3/buildstat.html
    12. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   13. http://gcc.gnu.org/index.html
    14. mailto:gcc@gcc.gnu.org
!   15. http://gcc.gnu.org/mirrors.html
    16. https://gcc.gnu.org/onlinedocs/
    17. mailto:gcc-help@gcc.gnu.org
    18. mailto:gcc@gcc.gnu.org
--- 18049,18068 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-3.3/changes.html
     3. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    4. https://gcc.gnu.org/gcc-3.3/changes.html#3.3.6
!    5. https://gcc.gnu.org/gcc-3.3/changes.html#3.3.5
!    6. https://gcc.gnu.org/gcc-3.3/changes.html#3.3.4
!    7. https://gcc.gnu.org/gcc-3.3/changes.html#3.3.3
!    8. https://gcc.gnu.org/gcc-3.3/changes.html#3.3.2
!    9. https://gcc.gnu.org/gcc-3.3/changes.html#3.3.1
!   10. https://gcc.gnu.org/gcc-3.3/changes.html
!   11. https://gcc.gnu.org/gcc-3.3/buildstat.html
    12. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   13. https://gcc.gnu.org/index.html
    14. mailto:gcc@gcc.gnu.org
!   15. https://gcc.gnu.org/mirrors.html
    16. https://gcc.gnu.org/onlinedocs/
    17. mailto:gcc-help@gcc.gnu.org
    18. mailto:gcc@gcc.gnu.org
*************** References
*** 18095,18101 ****
    21. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.3/changes.html
- 
                               GCC 3.3 Release Series
                          Changes, New Features, and Fixes
  
--- 18071,18076 ----
*************** GCC 3.3.6
*** 19447,19458 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.6
!    2. http://gcc.gnu.org/gcc-3.1/changes.html#obsolete_systems
!    3. http://gcc.gnu.org/gcc-3.3/changes.html#obsolete_systems
!    4. http://gcc.gnu.org/gcc-3.3/changes.html#nonnull_attribute
!    5. http://gcc.gnu.org/news/dfa.html
!    6. http://gcc.gnu.org/c99status.html
     7. https://gcc.gnu.org/onlinedocs/gcc-3.3.6/g77/News.html
     8. https://gcc.gnu.org/PR10140
     9. https://gcc.gnu.org/PR10198
--- 19422,19433 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-3.3/changes.html#3.3.6
!    2. https://gcc.gnu.org/gcc-3.1/changes.html#obsolete_systems
!    3. https://gcc.gnu.org/gcc-3.3/changes.html#obsolete_systems
!    4. https://gcc.gnu.org/gcc-3.3/changes.html#nonnull_attribute
!    5. https://gcc.gnu.org/news/dfa.html
!    6. https://gcc.gnu.org/c99status.html
     7. https://gcc.gnu.org/onlinedocs/gcc-3.3.6/g77/News.html
     8. https://gcc.gnu.org/PR10140
     9. https://gcc.gnu.org/PR10198
*************** References
*** 20005,20011 ****
   556. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.2/index.html
- 
                               GCC 3.2 Release Series
  
     (This release series is no longer supported.)
--- 19980,19985 ----
*************** References and Acknowledgements
*** 20078,20093 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-3.2/changes.html
!    3. http://gcc.gnu.org/gcc-3.2/changes.html#3.2.3
!    4. http://gcc.gnu.org/gcc-3.2/changes.html#3.2.2
!    5. http://gcc.gnu.org/gcc-3.2/changes.html#3.2.1
!    6. http://gcc.gnu.org/gcc-3.2/changes.html#3.2
!    7. http://gcc.gnu.org/gcc-3.2/buildstat.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    9. http://gcc.gnu.org/index.html
    10. mailto:gcc@gcc.gnu.org
!   11. http://gcc.gnu.org/mirrors.html
    12. https://gcc.gnu.org/onlinedocs/
    13. mailto:gcc-help@gcc.gnu.org
    14. mailto:gcc@gcc.gnu.org
--- 20052,20067 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-3.2/changes.html
!    3. https://gcc.gnu.org/gcc-3.2/changes.html#3.2.3
!    4. https://gcc.gnu.org/gcc-3.2/changes.html#3.2.2
!    5. https://gcc.gnu.org/gcc-3.2/changes.html#3.2.1
!    6. https://gcc.gnu.org/gcc-3.2/changes.html#3.2
!    7. https://gcc.gnu.org/gcc-3.2/buildstat.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    9. https://gcc.gnu.org/index.html
    10. mailto:gcc@gcc.gnu.org
!   11. https://gcc.gnu.org/mirrors.html
    12. https://gcc.gnu.org/onlinedocs/
    13. mailto:gcc-help@gcc.gnu.org
    14. mailto:gcc@gcc.gnu.org
*************** References
*** 20096,20102 ****
    17. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.2/changes.html
- 
                               GCC 3.2 Release Series
                          Changes, New Features, and Fixes
  
--- 20070,20075 ----
*************** GCC 3.2
*** 20700,20708 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-3.2/changes.html#3.2.3
!    2. http://gcc.gnu.org/gcc-3.1/changes.html
!    3. http://gcc.gnu.org/gcc-3.2/c++-abi.html
     4. https://gcc.gnu.org/PR3782
     5. https://gcc.gnu.org/PR6440
     6. https://gcc.gnu.org/PR7050
--- 20673,20681 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-3.2/changes.html#3.2.3
!    2. https://gcc.gnu.org/gcc-3.1/changes.html
!    3. https://gcc.gnu.org/gcc-3.2/c++-abi.html
     4. https://gcc.gnu.org/PR3782
     5. https://gcc.gnu.org/PR6440
     6. https://gcc.gnu.org/PR7050
*************** References
*** 20953,20959 ****
   251. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.1/index.html
- 
                                      GCC 3.1
  
     (This release series is no longer supported.)
--- 20926,20931 ----
*************** References
*** 21007,21018 ****
  
     1. http://www.gnu.org/
     2. http://www.gnu.org/
!    3. http://gcc.gnu.org/gcc-3.1/buildstat.html
!    4. http://gcc.gnu.org/gcc-3.1/changes.html
     5. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    6. http://gcc.gnu.org/index.html
     7. mailto:gcc@gcc.gnu.org
!    8. http://gcc.gnu.org/mirrors.html
     9. https://gcc.gnu.org/onlinedocs/
    10. mailto:gcc-help@gcc.gnu.org
    11. mailto:gcc@gcc.gnu.org
--- 20979,20990 ----
  
     1. http://www.gnu.org/
     2. http://www.gnu.org/
!    3. https://gcc.gnu.org/gcc-3.1/buildstat.html
!    4. https://gcc.gnu.org/gcc-3.1/changes.html
     5. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    6. https://gcc.gnu.org/index.html
     7. mailto:gcc@gcc.gnu.org
!    8. https://gcc.gnu.org/mirrors.html
     9. https://gcc.gnu.org/onlinedocs/
    10. mailto:gcc-help@gcc.gnu.org
    11. mailto:gcc@gcc.gnu.org
*************** References
*** 21021,21027 ****
    14. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.1/changes.html
- 
                               GCC 3.1 Release Series
                          Changes, New Features, and Fixes
  
--- 20993,20998 ----
*************** New Targets and Target Specific Improvem
*** 21239,21245 ****
            + For those targets that support it, -mfpmath=sse will cause the
              compiler to generate SSE/SSE2 instructions for floating point
              math instead of x87 instructions. Usually, this will lead to
!             quicker code -- especially on the Pentium 4. Note that only
              scalar floating point instructions are used and GCC does not
              exploit SIMD features yet.
            + Prefetch support has been added to the Pentium III, Pentium 4,
--- 21210,21216 ----
            + For those targets that support it, -mfpmath=sse will cause the
              compiler to generate SSE/SSE2 instructions for floating point
              math instead of x87 instructions. Usually, this will lead to
!             quicker code — especially on the Pentium 4. Note that only
              scalar floating point instructions are used and GCC does not
              exploit SIMD features yet.
            + Prefetch support has been added to the Pentium III, Pentium 4,
*************** Documentation improvements
*** 21360,21368 ****
  References
  
     1. https://gcc.gnu.org/ml/gcc/2002-07/msg01208.html
!    2. http://gcc.gnu.org/news/profiledriven.html
!    3. http://gcc.gnu.org/benchmarks/
!    4. http://gcc.gnu.org/c99status.html
     5. https://gcc.gnu.org/onlinedocs/libstdc++/faq.html
     6. https://gcc.gnu.org/onlinedocs/gcc-3.1.1/g77/News.html
     7. https://www.adacore.com/
--- 21331,21339 ----
  References
  
     1. https://gcc.gnu.org/ml/gcc/2002-07/msg01208.html
!    2. https://gcc.gnu.org/news/profiledriven.html
!    3. https://gcc.gnu.org/benchmarks/
!    4. https://gcc.gnu.org/c99status.html
     5. https://gcc.gnu.org/onlinedocs/libstdc++/faq.html
     6. https://gcc.gnu.org/onlinedocs/gcc-3.1.1/g77/News.html
     7. https://www.adacore.com/
*************** References
*** 21374,21380 ****
    13. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.0/index.html
- 
                                     GCC 3.0.4
  
     (This release series is no longer supported.)
--- 21345,21350 ----
*************** Previous 3.0.x Releases
*** 21434,21446 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-3.0/features.html
!    3. http://gcc.gnu.org/gcc-3.0/buildstat.html
     4. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    5. http://gcc.gnu.org/gcc-3.0/caveats.html
!    6. http://gcc.gnu.org/index.html
     7. mailto:gcc@gcc.gnu.org
!    8. http://gcc.gnu.org/mirrors.html
     9. https://gcc.gnu.org/onlinedocs/
    10. mailto:gcc-help@gcc.gnu.org
    11. mailto:gcc@gcc.gnu.org
--- 21404,21416 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-3.0/features.html
!    3. https://gcc.gnu.org/gcc-3.0/buildstat.html
     4. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    5. https://gcc.gnu.org/gcc-3.0/caveats.html
!    6. https://gcc.gnu.org/index.html
     7. mailto:gcc@gcc.gnu.org
!    8. https://gcc.gnu.org/mirrors.html
     9. https://gcc.gnu.org/onlinedocs/
    10. mailto:gcc-help@gcc.gnu.org
    11. mailto:gcc@gcc.gnu.org
*************** References
*** 21449,21455 ****
    14. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.0/features.html
- 
                                GCC 3.0 New Features
  
  Additional changes in GCC 3.0.4
--- 21419,21424 ----
*************** Other significant improvements
*** 21625,21641 ****
  References
  
     1. http://www.netbsd.org/
!    2. http://gcc.gnu.org/news/reorder.html
!    3. http://gcc.gnu.org/news/ssa.html
!    4. http://gcc.gnu.org/news/null.html
!    5. http://gcc.gnu.org/news/unify.html
!    6. http://gcc.gnu.org/gcc-3.0/c++features.html
!    7. http://gcc.gnu.org/news/inlining.html
!    8. http://gcc.gnu.org/news/dependencies.html
!    9. http://gcc.gnu.org/c99status.html
    10. https://gcc.gnu.org/onlinedocs/gcc-3.4.6/g77/News.html
!   11. http://gcc.gnu.org/gcc-3.0/libgcc.html
!   12. http://gcc.gnu.org/gcc-2.95/features.html
    13. https://gcc.gnu.org/onlinedocs/
    14. mailto:gcc-help@gcc.gnu.org
    15. mailto:gcc@gcc.gnu.org
--- 21594,21610 ----
  References
  
     1. http://www.netbsd.org/
!    2. https://gcc.gnu.org/news/reorder.html
!    3. https://gcc.gnu.org/news/ssa.html
!    4. https://gcc.gnu.org/news/null.html
!    5. https://gcc.gnu.org/news/unify.html
!    6. https://gcc.gnu.org/gcc-3.0/c++features.html
!    7. https://gcc.gnu.org/news/inlining.html
!    8. https://gcc.gnu.org/news/dependencies.html
!    9. https://gcc.gnu.org/c99status.html
    10. https://gcc.gnu.org/onlinedocs/gcc-3.4.6/g77/News.html
!   11. https://gcc.gnu.org/gcc-3.0/libgcc.html
!   12. https://gcc.gnu.org/gcc-2.95/features.html
    13. https://gcc.gnu.org/onlinedocs/
    14. mailto:gcc-help@gcc.gnu.org
    15. mailto:gcc@gcc.gnu.org
*************** References
*** 21644,21650 ****
    18. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.0/caveats.html
- 
                                  GCC 3.0 Caveats
  
       * -fstrict-aliasing is now part of -O2 and higher optimization
--- 21613,21618 ----
*************** References
*** 21704,21710 ****
     7. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-2.95/index.html
- 
                                      GCC 2.95
  
     (This release series is no longer supported.)
--- 21672,21677 ----
*************** References and Acknowledgements
*** 21777,21790 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-2.95/regress.html
!    2. http://gcc.gnu.org/gcc-2.95/othertest.html
!    3. http://gcc.gnu.org/gcc-2.95/features.html
!    4. http://gcc.gnu.org/gcc-2.95/buildstat.html
     5. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    6. http://gcc.gnu.org/gcc-2.95/caveats.html
!    7. http://gcc.gnu.org/mirrors.html
!    8. http://gcc.gnu.org/index.html
     9. mailto:gcc@gcc.gnu.org
    10. https://gcc.gnu.org/onlinedocs/
    11. mailto:gcc-help@gcc.gnu.org
--- 21744,21757 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-2.95/regress.html
!    2. https://gcc.gnu.org/gcc-2.95/othertest.html
!    3. https://gcc.gnu.org/gcc-2.95/features.html
!    4. https://gcc.gnu.org/gcc-2.95/buildstat.html
     5. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    6. https://gcc.gnu.org/gcc-2.95/caveats.html
!    7. https://gcc.gnu.org/mirrors.html
!    8. https://gcc.gnu.org/index.html
     9. mailto:gcc@gcc.gnu.org
    10. https://gcc.gnu.org/onlinedocs/
    11. mailto:gcc-help@gcc.gnu.org
*************** References
*** 21794,21800 ****
    15. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-2.95/features.html
- 
                               GCC 2.95 New Features
  
       * General Optimizer Improvements:
--- 21761,21766 ----
*************** http://gcc.gnu.org/gcc-2.95/features.htm
*** 21823,21829 ****
            + More support for various pragmas which appear in vendor
              include files
       * New Targets and Target Specific Improvements
!           + [14]SPARC backend rewrite.
            + -mschedule=8000 will optimize code for PA8000 class
              processors; -mpa-risc-2-0 will generate code for PA2.0
              processors
--- 21789,21795 ----
            + More support for various pragmas which appear in vendor
              include files
       * New Targets and Target Specific Improvements
!           + [14]SPARC back end rewrite.
            + -mschedule=8000 will optimize code for PA8000 class
              processors; -mpa-risc-2-0 will generate code for PA2.0
              processors
*************** Additional Changes in GCC 2.95.2
*** 21963,21969 ****
       * Platform specific bugfixes and improvements
            + Work around bug in Sun V5.0 compilers which caused bootstrap
              comparison failures on SPARC targets.
!           + Fix SPARC backend bug which caused aborts in final.c.
            + Fix sparc-hal-solaris2* configuration fragments.
            + Fix bug in sparc block profiling.
            + Fix obscure code generation bug for the PARISC targets.
--- 21929,21935 ----
       * Platform specific bugfixes and improvements
            + Work around bug in Sun V5.0 compilers which caused bootstrap
              comparison failures on SPARC targets.
!           + Fix SPARC back end bug which caused aborts in final.c.
            + Fix sparc-hal-solaris2* configuration fragments.
            + Fix bug in sparc block profiling.
            + Fix obscure code generation bug for the PARISC targets.
*************** Additional Changes in GCC 2.95.3
*** 22038,22063 ****
     provided this notice is preserved.
  
     These pages are [22]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
!    1. http://gcc.gnu.org/news/spill.html
!    2. http://gcc.gnu.org/news/lcm.html
!    3. http://gcc.gnu.org/news/cprop.html
!    4. http://gcc.gnu.org/news/cfg.html
!    5. http://gcc.gnu.org/news/dse.html
!    6. http://gcc.gnu.org/news/hoist.html
!    7. http://gcc.gnu.org/news/alias.html
!    8. http://gcc.gnu.org/gcc-2.95/c++features.html
     9. https://gcc.gnu.org/onlinedocs/gcc-3.4.6/g77/News.html
!   10. http://gcc.gnu.org/news/gcj-announce.txt
!   11. http://gcc.gnu.org/news/javaannounce.html
!   12. http://gcc.gnu.org/c99status.html
!   13. http://gcc.gnu.org/news/chill.html
!   14. http://gcc.gnu.org/news/sparc.html
!   15. http://gcc.gnu.org/news/egcs-vcg.html
!   16. http://gcc.gnu.org/egcs-1.0/features-2.8.html
    17. https://gcc.gnu.org/onlinedocs/
    18. mailto:gcc-help@gcc.gnu.org
    19. mailto:gcc@gcc.gnu.org
--- 22004,22029 ----
     provided this notice is preserved.
  
     These pages are [22]maintained by the GCC team. Last modified
!    2023-09-02.
  
  References
  
!    1. https://gcc.gnu.org/news/spill.html
!    2. https://gcc.gnu.org/news/lcm.html
!    3. https://gcc.gnu.org/news/cprop.html
!    4. https://gcc.gnu.org/news/cfg.html
!    5. https://gcc.gnu.org/news/dse.html
!    6. https://gcc.gnu.org/news/hoist.html
!    7. https://gcc.gnu.org/news/alias.html
!    8. https://gcc.gnu.org/gcc-2.95/c++features.html
     9. https://gcc.gnu.org/onlinedocs/gcc-3.4.6/g77/News.html
!   10. https://gcc.gnu.org/news/gcj-announce.txt
!   11. https://gcc.gnu.org/news/javaannounce.html
!   12. https://gcc.gnu.org/c99status.html
!   13. https://gcc.gnu.org/news/chill.html
!   14. https://gcc.gnu.org/news/sparc.html
!   15. https://gcc.gnu.org/news/egcs-vcg.html
!   16. https://gcc.gnu.org/egcs-1.0/features-2.8.html
    17. https://gcc.gnu.org/onlinedocs/
    18. mailto:gcc-help@gcc.gnu.org
    19. mailto:gcc@gcc.gnu.org
*************** References
*** 22066,22072 ****
    22. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-2.95/caveats.html
- 
                                  GCC 2.95 Caveats
  
       * GCC 2.95 will issue an error for invalid asm statements that had
--- 22032,22037 ----
*************** References
*** 22134,22140 ****
     7. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/egcs-1.1/index.html
- 
                                      EGCS 1.1
  
     September 3, 1998: We are pleased to announce the release of EGCS 1.1.
--- 22099,22104 ----
*************** http://gcc.gnu.org/egcs-1.1/index.html
*** 22161,22167 ****
       * Vastly improved [4]C++ compiler and integrated C++ runtime
         libraries.
       * Fixes for the /tmp symlink race security problems.
!      * New targets including mips16, arm-thumb and 64 bit PowerPC.
       * Improvements to GNU Fortran (g77) compiler and runtime library made
         since g77 version 0.5.23.
  
--- 22125,22131 ----
       * Vastly improved [4]C++ compiler and integrated C++ runtime
         libraries.
       * Fixes for the /tmp symlink race security problems.
!      * New targets including mips16, arm-thumb and 64-bit PowerPC.
       * Improvements to GNU Fortran (g77) compiler and runtime library made
         since g77 version 0.5.23.
  
*************** http://gcc.gnu.org/egcs-1.1/index.html
*** 22205,22211 ****
            + Fix a few arm code generation bugs.
            + Fixincludes will fix additional broken SCO OpenServer header
              files.
!           + Fix a m68k backend bug which caused invalid offsets in reg+d
              addresses.
            + Fix problems with 64bit AIX 4.3 support.
            + Fix handling of long longs for varargs/stdarg functions on the
--- 22169,22175 ----
            + Fix a few arm code generation bugs.
            + Fixincludes will fix additional broken SCO OpenServer header
              files.
!           + Fix a m68k back end bug which caused invalid offsets in reg+d
              addresses.
            + Fix problems with 64bit AIX 4.3 support.
            + Fix handling of long longs for varargs/stdarg functions on the
*************** http://gcc.gnu.org/egcs-1.1/index.html
*** 22342,22360 ****
     provided this notice is preserved.
  
     These pages are [15]maintained by the GCC team. Last modified
!    2023-01-21.
  
  References
  
!    1. http://gcc.gnu.org/egcs-1.1/egcs-1.1-test.html
!    2. http://gcc.gnu.org/news/gcse.html
!    3. http://gcc.gnu.org/news/alias.html
!    4. http://gcc.gnu.org/egcs-1.1/c++features.html
!    5. http://gcc.gnu.org/egcs-1.1/features.html
!    6. http://gcc.gnu.org/egcs-1.1/buildstat.html
     7. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    8. http://gcc.gnu.org/egcs-1.1/caveats.html
!    9. http://gcc.gnu.org/mirrors.html
    10. https://gcc.gnu.org/onlinedocs/
    11. mailto:gcc-help@gcc.gnu.org
    12. mailto:gcc@gcc.gnu.org
--- 22306,22324 ----
     provided this notice is preserved.
  
     These pages are [15]maintained by the GCC team. Last modified
!    2024-05-18.
  
  References
  
!    1. https://gcc.gnu.org/egcs-1.1/egcs-1.1-test.html
!    2. https://gcc.gnu.org/news/gcse.html
!    3. https://gcc.gnu.org/news/alias.html
!    4. https://gcc.gnu.org/egcs-1.1/c++features.html
!    5. https://gcc.gnu.org/egcs-1.1/features.html
!    6. https://gcc.gnu.org/egcs-1.1/buildstat.html
     7. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    8. https://gcc.gnu.org/egcs-1.1/caveats.html
!    9. https://gcc.gnu.org/mirrors.html
    10. https://gcc.gnu.org/onlinedocs/
    11. mailto:gcc-help@gcc.gnu.org
    12. mailto:gcc@gcc.gnu.org
*************** References
*** 22363,22369 ****
    15. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/egcs-1.1/features.html
- 
                               EGCS 1.1 new features
  
       * Integrated GNU Fortran (g77) compiler and runtime library with
--- 22327,22332 ----
*************** http://gcc.gnu.org/egcs-1.1/features.htm
*** 22418,22424 ****
              Intel recommendations now. Various improvements throughout the
              x86 port to improve performance on Pentium processors
              (including improved epilogue sequences for Pentium chips and
!             backend improvements which should help register allocation on
              all x86 variants. Conditional move support has been fixed and
              enabled for PPro processors. The x86 port also better supports
              64bit operations now. Unixware 7, a System V Release 5 target,
--- 22381,22387 ----
              Intel recommendations now. Various improvements throughout the
              x86 port to improve performance on Pentium processors
              (including improved epilogue sequences for Pentium chips and
!             back end improvements which should help register allocation on
              all x86 variants. Conditional move support has been fixed and
              enabled for PPro processors. The x86 port also better supports
              64bit operations now. Unixware 7, a System V Release 5 target,
*************** http://gcc.gnu.org/egcs-1.1/features.htm
*** 22441,22454 ****
     provided this notice is preserved.
  
     These pages are [10]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
!    1. http://gcc.gnu.org/egcs-1.1/c++features.html
!    2. http://gcc.gnu.org/news/gcse.html
!    3. http://gcc.gnu.org/news/alias.html
!    4. http://gcc.gnu.org/egcs-1.0/features-2.8.html
     5. https://gcc.gnu.org/onlinedocs/
     6. mailto:gcc-help@gcc.gnu.org
     7. mailto:gcc@gcc.gnu.org
--- 22404,22417 ----
     provided this notice is preserved.
  
     These pages are [10]maintained by the GCC team. Last modified
!    2023-09-02.
  
  References
  
!    1. https://gcc.gnu.org/egcs-1.1/c++features.html
!    2. https://gcc.gnu.org/news/gcse.html
!    3. https://gcc.gnu.org/news/alias.html
!    4. https://gcc.gnu.org/egcs-1.0/features-2.8.html
     5. https://gcc.gnu.org/onlinedocs/
     6. mailto:gcc-help@gcc.gnu.org
     7. mailto:gcc@gcc.gnu.org
*************** References
*** 22457,22463 ****
    10. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/egcs-1.1/caveats.html
- 
                                  EGCS 1.1 Caveats
  
       * EGCS has an integrated libstdc++, but does not have an integrated
--- 22420,22425 ----
*************** References
*** 22507,22513 ****
     6. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/egcs-1.0/index.html
- 
                                      EGCS 1.0
  
     December 3, 1997: We are pleased to announce the release of EGCS 1.0.
--- 22469,22474 ----
*************** http://gcc.gnu.org/egcs-1.0/index.html
*** 22616,22622 ****
            + Add missing entries to g77 lang-options.
            + Fix problem with -fpedantic in the g77 compiler.
            + Fix "backspace" problem with g77 on alphas.
!           + Fix x86 backend problem with Fortran literals and -fpic.
            + Fix some of the problems with negative subscripts for g77 on
              alphas.
            + Fixes for Fortran builds on cygwin32/mingw32.
--- 22577,22583 ----
            + Add missing entries to g77 lang-options.
            + Fix problem with -fpedantic in the g77 compiler.
            + Fix "backspace" problem with g77 on alphas.
!           + Fix x86 back end problem with Fortran literals and -fpic.
            + Fix some of the problems with negative subscripts for g77 on
              alphas.
            + Fixes for Fortran builds on cygwin32/mingw32.
*************** http://gcc.gnu.org/egcs-1.0/index.html
*** 22691,22704 ****
     provided this notice is preserved.
  
     These pages are [10]maintained by the GCC team. Last modified
!    2023-01-21.
  
  References
  
!    1. http://gcc.gnu.org/egcs-1.0/features.html
!    2. http://gcc.gnu.org/egcs-1.0/buildstat.html
!    3. http://gcc.gnu.org/egcs-1.0/caveats.html
!    4. http://gcc.gnu.org/mirrors.html
     5. https://gcc.gnu.org/onlinedocs/
     6. mailto:gcc-help@gcc.gnu.org
     7. mailto:gcc@gcc.gnu.org
--- 22652,22665 ----
     provided this notice is preserved.
  
     These pages are [10]maintained by the GCC team. Last modified
!    2023-09-02.
  
  References
  
!    1. https://gcc.gnu.org/egcs-1.0/features.html
!    2. https://gcc.gnu.org/egcs-1.0/buildstat.html
!    3. https://gcc.gnu.org/egcs-1.0/caveats.html
!    4. https://gcc.gnu.org/mirrors.html
     5. https://gcc.gnu.org/onlinedocs/
     6. mailto:gcc-help@gcc.gnu.org
     7. mailto:gcc@gcc.gnu.org
*************** References
*** 22707,22713 ****
    10. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/egcs-1.0/features.html
- 
                                 EGCS 1.0 features
  
       * Core compiler is based on the gcc2 development tree from Aug 2,
--- 22668,22673 ----
*************** http://gcc.gnu.org/egcs-1.0/features.htm
*** 22761,22768 ****
  
  References
  
!    1. http://gcc.gnu.org/egcs-1.0/features-2.8.html
!    2. http://gcc.gnu.org/egcs-1.0/c++features.html
     3. https://gcc.gnu.org/onlinedocs/
     4. mailto:gcc-help@gcc.gnu.org
     5. mailto:gcc@gcc.gnu.org
--- 22721,22728 ----
  
  References
  
!    1. https://gcc.gnu.org/egcs-1.0/features-2.8.html
!    2. https://gcc.gnu.org/egcs-1.0/c++features.html
     3. https://gcc.gnu.org/onlinedocs/
     4. mailto:gcc-help@gcc.gnu.org
     5. mailto:gcc@gcc.gnu.org
*************** References
*** 22771,22777 ****
     8. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/egcs-1.0/caveats.html
- 
                                  EGCS 1.0 Caveats
  
       * EGCS has an integrated libstdc++, but does not have an integrated
--- 22731,22736 ----
diff -Nrcpad gcc-12.3.0/c++tools/ChangeLog gcc-12.4.0/c++tools/ChangeLog
*** gcc-12.3.0/c++tools/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/c++tools/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/config/ChangeLog gcc-12.4.0/config/ChangeLog
*** gcc-12.3.0/config/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/config/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/configure gcc-12.4.0/configure
*** gcc-12.3.0/configure	Mon May  8 12:14:39 2023
--- gcc-12.4.0/configure	Thu Jun 20 08:10:28 2024
*************** fi
*** 8646,8652 ****
  # Check whether --enable-host-shared was given.
  if test "${enable_host_shared+set}" = set; then :
    enableval=$enable_host_shared; host_shared=$enableval
!  case $target in
     x86_64-*-darwin* | aarch64-*-darwin*)
       if test x$host_shared != xyes ; then
         # PIC is the default, and actually cannot be switched off.
--- 8646,8652 ----
  # Check whether --enable-host-shared was given.
  if test "${enable_host_shared+set}" = set; then :
    enableval=$enable_host_shared; host_shared=$enableval
!  case $host in
     x86_64-*-darwin* | aarch64-*-darwin*)
       if test x$host_shared != xyes ; then
         # PIC is the default, and actually cannot be switched off.
diff -Nrcpad gcc-12.3.0/configure.ac gcc-12.4.0/configure.ac
*** gcc-12.3.0/configure.ac	Mon May  8 12:14:39 2023
--- gcc-12.4.0/configure.ac	Thu Jun 20 08:08:05 2024
*************** AC_ARG_ENABLE(host-shared,
*** 1918,1924 ****
  [AS_HELP_STRING([--enable-host-shared],
  		[build host code as shared libraries])],
  [host_shared=$enableval
!  case $target in
     x86_64-*-darwin* | aarch64-*-darwin*)
       if test x$host_shared != xyes ; then
         # PIC is the default, and actually cannot be switched off.
--- 1918,1924 ----
  [AS_HELP_STRING([--enable-host-shared],
  		[build host code as shared libraries])],
  [host_shared=$enableval
!  case $host in
     x86_64-*-darwin* | aarch64-*-darwin*)
       if test x$host_shared != xyes ; then
         # PIC is the default, and actually cannot be switched off.
diff -Nrcpad gcc-12.3.0/contrib/ChangeLog gcc-12.4.0/contrib/ChangeLog
*** gcc-12.3.0/contrib/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/contrib/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/contrib/header-tools/ChangeLog gcc-12.4.0/contrib/header-tools/ChangeLog
*** gcc-12.3.0/contrib/header-tools/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/contrib/header-tools/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/contrib/reghunt/ChangeLog gcc-12.4.0/contrib/reghunt/ChangeLog
*** gcc-12.3.0/contrib/reghunt/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/contrib/reghunt/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/contrib/regression/ChangeLog gcc-12.4.0/contrib/regression/ChangeLog
*** gcc-12.3.0/contrib/regression/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/contrib/regression/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/fixincludes/ChangeLog gcc-12.4.0/fixincludes/ChangeLog
*** gcc-12.3.0/fixincludes/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/fixincludes/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,34 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-04-04  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-01-21  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* fixincl.x: Regenerate.
+ 	* inclhack.def (darwin_objc_runtime_1): New hack.
+ 	* tests/base/objc/runtime.h: New file.
+ 
+ 2024-04-04  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-01-21  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR target/107568
+ 	* fixincl.x: Regenerate.
+ 	* inclhack.def: Add a fix for MacOS13 SDK function deprecations
+ 	in stdio.h.
+ 	* tests/base/stdio.h (__deprecated_msg): New test.
+ 
+ 2023-12-11  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	* inclhack.def (darwin_flt_eval_method): Handle macOS 14 guard
+ 	variant.
+ 	* fixincl.x: Regenerate.
+ 	* tests/base/math.h [DARWIN_FLT_EVAL_METHOD_CHECK]: Update test.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/fixincludes/fixincl.x gcc-12.4.0/fixincludes/fixincl.x
*** gcc-12.3.0/fixincludes/fixincl.x	Mon May  8 12:14:39 2023
--- gcc-12.4.0/fixincludes/fixincl.x	Thu Jun 20 08:08:05 2024
***************
*** 2,12 ****
   *
   * DO NOT EDIT THIS FILE   (fixincl.x)
   *
!  * It has been AutoGen-ed  February 27, 2022 at 07:47:03 PM by AutoGen 5.18.16
   * From the definitions    inclhack.def
   * and the template file   fixincl
   */
! /* DO NOT SVN-MERGE THIS FILE, EITHER Sun Feb 27 19:47:03 UTC 2022
   *
   * You must regenerate it.  Use the ./genfixes script.
   *
--- 2,12 ----
   *
   * DO NOT EDIT THIS FILE   (fixincl.x)
   *
!  * It has been AutoGen-ed  March 30, 2024 at 04:03:59 PM by AutoGen 5.18.7
   * From the definitions    inclhack.def
   * and the template file   fixincl
   */
! /* DO NOT SVN-MERGE THIS FILE, EITHER Sat Mar 30 16:03:59 GMT 2024
   *
   * You must regenerate it.  Use the ./genfixes script.
   *
***************
*** 15,21 ****
   * certain ANSI-incompatible system header files which are fixed to work
   * correctly with ANSI C and placed in a directory that GNU C will search.
   *
!  * This file contains 267 fixup descriptions.
   *
   * See README for more information.
   *
--- 15,21 ----
   * certain ANSI-incompatible system header files which are fixed to work
   * correctly with ANSI C and placed in a directory that GNU C will search.
   *
!  * This file contains 269 fixup descriptions.
   *
   * See README for more information.
   *
*************** int vfscanf(FILE *, const char *, __buil
*** 2610,2615 ****
--- 2610,2655 ----
  
  /* * * * * * * * * * * * * * * * * * * * * * * * * *
   *
+  *  Description of Apple_Local_Stdio_Fn_Deprecation fix
+  */
+ tSCC zApple_Local_Stdio_Fn_DeprecationName[] =
+      "apple_local_stdio_fn_deprecation";
+ 
+ /*
+  *  File name selection pattern
+  */
+ tSCC zApple_Local_Stdio_Fn_DeprecationList[] =
+   "stdio.h\0";
+ /*
+  *  Machine/OS name selection pattern
+  */
+ tSCC* apzApple_Local_Stdio_Fn_DeprecationMachs[] = {
+         "*-*-*darwin2*",
+         (const char*)NULL };
+ 
+ /*
+  *  content selection pattern - do fix if pattern found
+  */
+ tSCC zApple_Local_Stdio_Fn_DeprecationSelect0[] =
+        "__deprecated_msg([^\n\
+ ]*)$";
+ 
+ #define    APPLE_LOCAL_STDIO_FN_DEPRECATION_TEST_CT  1
+ static tTestDesc aApple_Local_Stdio_Fn_DeprecationTests[] = {
+   { TT_EGREP,    zApple_Local_Stdio_Fn_DeprecationSelect0, (regex_t*)NULL }, };
+ 
+ /*
+  *  Fix Command Arguments for Apple_Local_Stdio_Fn_Deprecation
+  */
+ static const char* apzApple_Local_Stdio_Fn_DeprecationPatch[] = {
+     "format",
+     "#if defined(__APPLE_LOCAL_DEPRECATIONS)\n\
+ %0\n\
+ #endif",
+     (char*)NULL };
+ 
+ /* * * * * * * * * * * * * * * * * * * * * * * * * *
+  *
   *  Description of Ctrl_Quotes_Def fix
   */
  tSCC zCtrl_Quotes_DefName[] =
*************** static const char* apzDarwin_Os_Trace_2P
*** 3046,3051 ****
--- 3086,3138 ----
  
  /* * * * * * * * * * * * * * * * * * * * * * * * * *
   *
+  *  Description of Darwin_Objc_Runtime_1 fix
+  */
+ tSCC zDarwin_Objc_Runtime_1Name[] =
+      "darwin_objc_runtime_1";
+ 
+ /*
+  *  File name selection pattern
+  */
+ tSCC zDarwin_Objc_Runtime_1List[] =
+   "objc/runtime.h\0";
+ /*
+  *  Machine/OS name selection pattern
+  */
+ tSCC* apzDarwin_Objc_Runtime_1Machs[] = {
+         "*-*-darwin2*",
+         (const char*)NULL };
+ 
+ /*
+  *  content selection pattern - do fix if pattern found
+  */
+ tSCC zDarwin_Objc_Runtime_1Select0[] =
+        "OBJC_EXPORT void.*\n\
+ objc_enumerateClasses.*\n\
+ .*\n\
+ .*\n\
+ .*\n\
+ .*void \\(\\^ _Nonnull block.*\n\
+ .*\n\
+ .*\n\
+ .*OBJC_REFINED_FOR_SWIFT.*";
+ 
+ #define    DARWIN_OBJC_RUNTIME_1_TEST_CT  1
+ static tTestDesc aDarwin_Objc_Runtime_1Tests[] = {
+   { TT_EGREP,    zDarwin_Objc_Runtime_1Select0, (regex_t*)NULL }, };
+ 
+ /*
+  *  Fix Command Arguments for Darwin_Objc_Runtime_1
+  */
+ static const char* apzDarwin_Objc_Runtime_1Patch[] = {
+     "format",
+     "#if __BLOCKS__\n\
+ %0\n\
+ #endif",
+     (char*)NULL };
+ 
+ /* * * * * * * * * * * * * * * * * * * * * * * * * *
+  *
   *  Description of Darwin_Os_Trace_3 fix
   */
  tSCC zDarwin_Os_Trace_3Name[] =
*************** tSCC* apzDarwin_Flt_Eval_MethodMachs[] =
*** 3587,3593 ****
   *  content selection pattern - do fix if pattern found
   */
  tSCC zDarwin_Flt_Eval_MethodSelect0[] =
!        "^#if __FLT_EVAL_METHOD__ == 0$";
  
  #define    DARWIN_FLT_EVAL_METHOD_TEST_CT  1
  static tTestDesc aDarwin_Flt_Eval_MethodTests[] = {
--- 3674,3680 ----
   *  content selection pattern - do fix if pattern found
   */
  tSCC zDarwin_Flt_Eval_MethodSelect0[] =
!        "^#if __FLT_EVAL_METHOD__ == 0( \\|\\| __FLT_EVAL_METHOD__ == -1)?$";
  
  #define    DARWIN_FLT_EVAL_METHOD_TEST_CT  1
  static tTestDesc aDarwin_Flt_Eval_MethodTests[] = {
*************** static tTestDesc aDarwin_Flt_Eval_Method
*** 3598,3604 ****
   */
  static const char* apzDarwin_Flt_Eval_MethodPatch[] = {
      "format",
!     "#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == 16",
      (char*)NULL };
  
  /* * * * * * * * * * * * * * * * * * * * * * * * * *
--- 3685,3691 ----
   */
  static const char* apzDarwin_Flt_Eval_MethodPatch[] = {
      "format",
!     "%0 || __FLT_EVAL_METHOD__ == 16",
      (char*)NULL };
  
  /* * * * * * * * * * * * * * * * * * * * * * * * * *
*************** static const char* apzX11_SprintfPatch[]
*** 10872,10880 ****
   *
   *  List of all fixes
   */
! #define REGEX_COUNT          305
  #define MACH_LIST_SIZE_LIMIT 187
! #define FIX_COUNT            267
  
  /*
   *  Enumerate the fixes
--- 10959,10967 ----
   *
   *  List of all fixes
   */
! #define REGEX_COUNT          307
  #define MACH_LIST_SIZE_LIMIT 187
! #define FIX_COUNT            269
  
  /*
   *  Enumerate the fixes
*************** typedef enum {
*** 10941,10946 ****
--- 11028,11034 ----
      BROKEN_CABS_FIXIDX,
      BROKEN_NAN_FIXIDX,
      BSD_STDIO_ATTRS_CONFLICT_FIXIDX,
+     APPLE_LOCAL_STDIO_FN_DEPRECATION_FIXIDX,
      CTRL_QUOTES_DEF_FIXIDX,
      CTRL_QUOTES_USE_FIXIDX,
      CXX_UNREADY_FIXIDX,
*************** typedef enum {
*** 10952,10957 ****
--- 11040,11046 ----
      DARWIN_LONGJMP_NORETURN_FIXIDX,
      DARWIN_OS_TRACE_1_FIXIDX,
      DARWIN_OS_TRACE_2_FIXIDX,
+     DARWIN_OBJC_RUNTIME_1_FIXIDX,
      DARWIN_OS_TRACE_3_FIXIDX,
      DARWIN_OS_BASE_1_FIXIDX,
      DARWIN_DISPATCH_OBJECT_1_FIXIDX,
*************** tFixDesc fixDescList[ FIX_COUNT ] = {
*** 11455,11460 ****
--- 11544,11554 ----
       BSD_STDIO_ATTRS_CONFLICT_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
       aBsd_Stdio_Attrs_ConflictTests,   apzBsd_Stdio_Attrs_ConflictPatch, 0 },
  
+   {  zApple_Local_Stdio_Fn_DeprecationName,    zApple_Local_Stdio_Fn_DeprecationList,
+      apzApple_Local_Stdio_Fn_DeprecationMachs,
+      APPLE_LOCAL_STDIO_FN_DEPRECATION_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
+      aApple_Local_Stdio_Fn_DeprecationTests,   apzApple_Local_Stdio_Fn_DeprecationPatch, 0 },
+ 
    {  zCtrl_Quotes_DefName,    zCtrl_Quotes_DefList,
       apzCtrl_Quotes_DefMachs,
       CTRL_QUOTES_DEF_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
*************** tFixDesc fixDescList[ FIX_COUNT ] = {
*** 11510,11515 ****
--- 11604,11614 ----
       DARWIN_OS_TRACE_2_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
       aDarwin_Os_Trace_2Tests,   apzDarwin_Os_Trace_2Patch, 0 },
  
+   {  zDarwin_Objc_Runtime_1Name,    zDarwin_Objc_Runtime_1List,
+      apzDarwin_Objc_Runtime_1Machs,
+      DARWIN_OBJC_RUNTIME_1_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
+      aDarwin_Objc_Runtime_1Tests,   apzDarwin_Objc_Runtime_1Patch, 0 },
+ 
    {  zDarwin_Os_Trace_3Name,    zDarwin_Os_Trace_3List,
       apzDarwin_Os_Trace_3Machs,
       DARWIN_OS_TRACE_3_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
diff -Nrcpad gcc-12.3.0/fixincludes/inclhack.def gcc-12.4.0/fixincludes/inclhack.def
*** gcc-12.3.0/fixincludes/inclhack.def	Mon May  8 12:14:39 2023
--- gcc-12.4.0/fixincludes/inclhack.def	Thu Jun 20 08:08:05 2024
*************** fix = {
*** 1269,1274 ****
--- 1269,1286 ----
      test_text = '#define  vfscanf	__svfscanf';
  };
  
+ fix = {
+     hackname  = apple_local_stdio_fn_deprecation;
+     mach      = "*-*-*darwin2*";
+     files     = stdio.h;
+     select    = "__deprecated_msg([^\n]*)$";
+     c_fix     = format;
+     c_fix_arg = "#if defined(__APPLE_LOCAL_DEPRECATIONS)\n"
+                 "%0\n"
+                 "#endif";
+     test_text = '__deprecated_msg("This function is provided for compat...")';
+ };
+ 
  /*
   *  Fix various macros used to define ioctl numbers.
   *  The traditional syntax was:
*************** fix = {
*** 1480,1485 ****
--- 1492,1532 ----
  };
  
  /*
+  *  macOSX 13.0 SDK objc/runtime.h uses Apple Blocks extension without a guard.
+  */
+ 
+ fix = {
+   hackname  = darwin_objc_runtime_1;
+   mach      = "*-*-darwin2*";
+   files     = objc/runtime.h;
+   select    =   <<- _EOSelect_
+ 	OBJC_EXPORT void.*
+ 	objc_enumerateClasses.*
+ 	.*
+ 	.*
+ 	.*
+ 	.*void \(\^ _Nonnull block.*
+ 	.*
+ 	.*
+ 	.*OBJC_REFINED_FOR_SWIFT.*
+ 	_EOSelect_;
+   c_fix     = format;
+   c_fix_arg = "#if __BLOCKS__\n%0\n#endif";
+   test_text = <<- _OBJC_RUNTIME_1
+ OBJC_EXPORT void
+ objc_enumerateClasses(const void * _Nullable image,
+                       const char * _Nullable namePrefix,
+                       Protocol * _Nullable conformingTo,
+                       Class _Nullable subclassing,
+                       void (^ _Nonnull block)(Class _Nonnull aClass, BOOL * _Nonnull stop)
+                       OBJC_NOESCAPE)
+ OBJC_AVAILABLE(13.0, 16.0, 16.0, 9.0, 7.0)
+ OBJC_REFINED_FOR_SWIFT;
+ _OBJC_RUNTIME_1;
+ };
+ 
+ 
+ /*
   *  In Mac OS X 10.1[012] <os/trace.h>, need to guard users of
   *  os_trace_payload_t typedef, too.
   */
*************** fix = {
*** 1772,1781 ****
      hackname  = darwin_flt_eval_method;
      mach      = "*-*-darwin*";
      files     = math.h;
!     select    = "^#if __FLT_EVAL_METHOD__ == 0$";
      c_fix     = format;
!     c_fix_arg = "#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == 16";
!     test_text = "#if __FLT_EVAL_METHOD__ == 0";
  };
  
  /*
--- 1819,1829 ----
      hackname  = darwin_flt_eval_method;
      mach      = "*-*-darwin*";
      files     = math.h;
!     select    = "^#if __FLT_EVAL_METHOD__ == 0( \\|\\| __FLT_EVAL_METHOD__ == -1)?$";
      c_fix     = format;
!     c_fix_arg = "%0 || __FLT_EVAL_METHOD__ == 16";
!     test_text = "#if __FLT_EVAL_METHOD__ == 0\n"
!                "#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == -1";
  };
  
  /*
diff -Nrcpad gcc-12.3.0/fixincludes/tests/base/math.h gcc-12.4.0/fixincludes/tests/base/math.h
*** gcc-12.3.0/fixincludes/tests/base/math.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/fixincludes/tests/base/math.h	Thu Jun 20 08:08:05 2024
***************
*** 32,37 ****
--- 32,38 ----
  
  #if defined( DARWIN_FLT_EVAL_METHOD_CHECK )
  #if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == 16
+ #if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == -1 || __FLT_EVAL_METHOD__ == 16
  #endif  /* DARWIN_FLT_EVAL_METHOD_CHECK */
  
  
diff -Nrcpad gcc-12.3.0/fixincludes/tests/base/objc/runtime.h gcc-12.4.0/fixincludes/tests/base/objc/runtime.h
*** gcc-12.3.0/fixincludes/tests/base/objc/runtime.h	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/fixincludes/tests/base/objc/runtime.h	Thu Jun 20 08:08:05 2024
***************
*** 0 ****
--- 1,24 ----
+ /*  DO NOT EDIT THIS FILE.
+ 
+     It has been auto-edited by fixincludes from:
+ 
+ 	"fixinc/tests/inc/objc/runtime.h"
+ 
+     This had to be done to correct non-standard usages in the
+     original, manufacturer supplied header file.  */
+ 
+ 
+ 
+ #if defined( DARWIN_OBJC_RUNTIME_1_CHECK )
+ #if __BLOCKS__
+ OBJC_EXPORT void
+ objc_enumerateClasses(const void * _Nullable image,
+                       const char * _Nullable namePrefix,
+                       Protocol * _Nullable conformingTo,
+                       Class _Nullable subclassing,
+                       void (^ _Nonnull block)(Class _Nonnull aClass, BOOL * _Nonnull stop)
+                       OBJC_NOESCAPE)
+ OBJC_AVAILABLE(13.0, 16.0, 16.0, 9.0, 7.0)
+ OBJC_REFINED_FOR_SWIFT;
+ #endif
+ #endif  /* DARWIN_OBJC_RUNTIME_1_CHECK */
diff -Nrcpad gcc-12.3.0/fixincludes/tests/base/stdio.h gcc-12.4.0/fixincludes/tests/base/stdio.h
*** gcc-12.3.0/fixincludes/tests/base/stdio.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/fixincludes/tests/base/stdio.h	Thu Jun 20 08:08:05 2024
*************** int vfscanf(FILE *, const char *, __buil
*** 41,46 ****
--- 41,53 ----
  #endif  /* BSD_STDIO_ATTRS_CONFLICT_CHECK */
  
  
+ #if defined( APPLE_LOCAL_STDIO_FN_DEPRECATION_CHECK )
+ #if defined(__APPLE_LOCAL_DEPRECATIONS)
+ __deprecated_msg("This function is provided for compat...")
+ #endif
+ #endif  /* APPLE_LOCAL_STDIO_FN_DEPRECATION_CHECK */
+ 
+ 
  #if defined( HPUX10_STDIO_DECLARATIONS_CHECK )
  #  define _iob __iob
  
diff -Nrcpad gcc-12.3.0/gcc/BASE-VER gcc-12.4.0/gcc/BASE-VER
*** gcc-12.3.0/gcc/BASE-VER	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/BASE-VER	Thu Jun 20 08:09:01 2024
***************
*** 1 ****
! 12.3.0
--- 1 ----
! 12.4.0
diff -Nrcpad gcc-12.3.0/gcc/ChangeLog gcc-12.4.0/gcc/ChangeLog
*** gcc-12.3.0/gcc/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,3109 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-12  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	Backported from master:
+ 	2024-05-03  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	PR rtl-optimization/114924
+ 	* cfgrtl.cc (duplicate_insn_chain): When updating MEM_EXPRs,
+ 	don't strip (e.g.) ARRAY_REFs from the final MEM_EXPR.
+ 
+ 2024-06-12  Vladimir N. Makarov  <vmakarov@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-09-25  Vladimir N. Makarov  <vmakarov@redhat.com>
+ 
+ 	PR middle-end/111497
+ 	* lra-constraints.cc (lra_constraints): Copy substituted
+ 	equivalence.
+ 	* lra.cc (lra): Change comment for calling unshare_all_rtl_again.
+ 
+ 2024-06-12  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2022-12-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/40635
+ 	* tree-into-ssa.cc (rewrite_update_phi_arguments): Only
+ 	update the argument when the reaching definition is different
+ 	from the current argument.  Keep an existing argument
+ 	location.
+ 
+ 2024-06-12  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-02-19  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR rtl-optimization/54052
+ 	* rtl-ssa/blocks.cc (function_info::place_phis): Filter
+ 	local defs by LR_OUT.
+ 
+ 2024-06-12  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2024-06-12  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 		    Yvan ROUX  <yvan.roux@foss.st.com>
+ 
+ 	PR target/115253
+ 	* config/arm/arm.cc (cmse_nonsecure_call_inline_register_clear):
+ 	Sign extend for Thumb1.
+ 	(thumb1_expand_prologue): Add zero/sign extend.
+ 
+ 2024-06-11  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2024-03-07  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	PR middle-end/111632
+ 	* system.h: Include safe-ctype.h after C++ standard headers.
+ 
+ 2024-06-11  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	Backported from master:
+ 	2024-05-20  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	PR tree-optimization/115143
+ 	* tree-ssa-phiopt.cc (minmax_replacement): Check for empty
+ 	phi nodes for middle bbs for the case where middle bb is not empty.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-06-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/115337
+ 	* fold-const.cc (tree_call_nonnegative_warnv_p) <CASE_CFN_CLZ>:
+ 	If fn is CFN_CLZ, use CLZ_DEFINED_VALUE_AT.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-06-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/108789
+ 	* builtins.cc (fold_builtin_arith_overflow): For ovf_only,
+ 	don't call save_expr and don't build REALPART_EXPR, otherwise
+ 	set TREE_SIDE_EFFECTS on call before calling save_expr.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-06-03  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/115324
+ 	* config/rs6000/rs6000-gen-builtins.cc (write_decls): Remove
+ 	GTY markup from struct bifdata and struct ovlddata and remove their
+ 	fntype members.  Change next member in struct ovlddata and
+ 	first_instance member of struct ovldrecord to have int type rather
+ 	than struct ovlddata *.  Remove GTY markup from rs6000_builtin_info
+ 	and rs6000_instance_info arrays, declare new
+ 	rs6000_builtin_info_fntype and rs6000_instance_info_fntype arrays,
+ 	which have GTY markup.
+ 	(write_bif_static_init): Adjust for the above changes.
+ 	(write_ovld_static_init): Likewise.
+ 	(write_init_bif_table): Likewise.
+ 	(write_init_ovld_table): Likewise.
+ 	* config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Likewise.
+ 	* config/rs6000/rs6000-c.cc (find_instance): Likewise.  Make static.
+ 	(altivec_resolve_overloaded_builtin): Adjust for the above changes.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-05-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/114902
+ 	PR rtl-optimization/115092
+ 	* combine.cc (simplify_compare_const): Don't optimize
+ 	GE op0 SIGNED_MIN or LT op0 SIGNED_MIN into NE op0 const0_rtx or
+ 	EQ op0 const0_rtx.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-05-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR sanitizer/114956
+ 	* tree-inline.cc: Include asan.h.
+ 	(copy_bb): Remove also .ASAN_MARK calls if id->dst_fn has asan/hwasan
+ 	sanitization disabled.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/114876
+ 	* gimple-ssa-sprintf.cc (format_character): For min == 0 && max == 0,
+ 	set max, likely and unlikely members to 1 rather than 0.  Remove
+ 	useless res.knownrange = true;.  Formatting fixes.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-25  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR fortran/114825
+ 	* tree-nested.cc (get_debug_decl): New function.
+ 	(get_nonlocal_debug_decl): Use it.
+ 	(get_local_debug_decl): Likewise.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-19  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/114768
+ 	* rtlanal.cc (set_noop_p): Don't return true for MEM <- MEM
+ 	sets if src has side-effects or for stores into ZERO_EXTRACT
+ 	if ZERO_EXTRACT operand has side-effects.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-18  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/114753
+ 	* internal-fn.cc (expand_mul_overflow): Save flag_trapv and
+ 	temporarily clear it for the duration of the function, then
+ 	restore previous value.
+ 	(expand_vector_ubsan_overflow): Likewise.
+ 	(expand_arith_overflow): Likewise.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/114634
+ 	* attribs.cc (diag_attr_exclusions): Set attrs[1] to NULL_TREE for
+ 	decls with NULL TREE_TYPE.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/110027
+ 	* asan.cc (asan_emit_stack_protection): Assert offsets[0] is
+ 	zero if there is no stack protect guard, otherwise
+ 	-ASAN_RED_ZONE_SIZE.  If alignb > ASAN_RED_ZONE_SIZE and there is
+ 	stack pointer guard, take the ASAN_RED_ZONE_SIZE bytes allocated at
+ 	the top of the stack into account when computing base_align_bias.
+ 	Recompute use_after_return_class from asan_frame_size + base_align_bias
+ 	and set to -1 if that would overflow to 11.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/114566
+ 	* tree-vect-loop.cc (update_epilogue_loop_vinfo): Don't clear
+ 	base_misaligned.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/114537
+ 	* fold-const.cc (native_encode_initializer): Look through
+ 	NON_LVALUE_EXPR if val is INTEGER_CST.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-14  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/113907
+ 	* ipa-icf.cc (sem_item_optimizer::merge_classes): Reset
+ 	SSA_NAME_RANGE_INFO and SSA_NAME_PTR_INFO on successfully ICF merged
+ 	functions.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-14  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/114310
+ 	* config/aarch64/aarch64.cc (aarch64_expand_compare_and_swap): For
+ 	TImode force newval into a register.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/110079
+ 	* bb-reorder.cc (fix_crossing_unconditional_branches): Don't adjust
+ 	asm goto.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/114184
+ 	* config/i386/i386-expand.cc (ix86_expand_move): If XFmode op1
+ 	is SUBREG of CONSTANT_P, force the SUBREG_REG into memory or
+ 	register.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-12  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/113674
+ 	* attribs.cc (extract_attribute_substring): Remove.
+ 	(lookup_scoped_attribute_spec): Don't call it.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-03  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* ggc-common.cc (gt_pch_save): Allow addr to be equal to
+ 	mmi.preferred_base + mmi.size - sizeof (void *).
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/113603
+ 	* tree-ssa-strlen.cc (strlen_pass::handle_store): After
+ 	count_nonzero_bytes call refetch si using get_strinfo in case it
+ 	has been unshared in the meantime.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-25  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* doc/generic.texi (VECTOR_CST): Fix typo - petterns -> patterns.
+ 	* doc/rtl.texi (CONST_VECTOR): Likewise.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-18  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/113122
+ 	* config/i386/i386.cc (x86_function_profiler): Add -masm=intel
+ 	support.  Add missing space after , in emitted assembly in some
+ 	cases.  Formatting fixes.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/113372
+ 	PR middle-end/90348
+ 	PR middle-end/110115
+ 	PR middle-end/111422
+ 	* cfgexpand.cc (add_scope_conflicts_2): New function.
+ 	(add_scope_conflicts_1): Use it.
+ 
+ 2024-06-11  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-08-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/111070
+ 	* tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
+ 	an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
+ 
+ 2024-06-07  Jan Hubicka  <jh@suse.cz>
+ 
+ 	Backported from master:
+ 	2023-12-29  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS,
+ 	X86_TUNE_AVOID_256FMA_CHAINS): Enable for znver4 and Core.
+ 
+ 2024-06-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-11-28  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/112732
+ 	* tree.cc (build_opaque_vector_type): Reset TYPE_ALIAS_SET
+ 	of the newly built type.
+ 
+ 2024-06-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-06-26  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/110381
+ 	* tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
+ 	Materialize permutes before fold-left reductions.
+ 
+ 2024-06-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-02-14  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/113910
+ 	* bitmap.cc (bitmap_hash): Mix the full element "hash" to
+ 	the hashval_t hash.
+ 
+ 2024-06-04  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	Backported from master:
+ 	2024-01-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR target/113281
+ 	* tree-vect-patterns.cc (vect_recog_over_widening_pattern): Remove
+ 	workaround for right shifts.
+ 	(vect_truncatable_operation_p): Handle NEGATE_EXPR and BIT_NOT_EXPR.
+ 	(vect_determine_precisions_from_range): Be more selective about
+ 	which codes can be narrowed based on their input and output ranges.
+ 	For shifts, require at least one more bit of precision than the
+ 	maximum shift amount.
+ 
+ 2024-06-04  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	Backported from master:
+ 	2024-05-24  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR tree-optimization/115192
+ 	* tree-data-ref.cc (create_intersect_range_checks): Take the
+ 	alignment of the access sizes into account.
+ 
+ 2024-06-03  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	Backported from master:
+ 	2024-05-31  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/115297
+ 	* config/alpha/alpha.md (<any_divmod:code>si3): Wrap DImode
+ 	operands 3 and 4 with truncate:SI RTX.
+ 	(*divmodsi_internal_er): Ditto for operands 1 and 2.
+ 	(*divmodsi_internal_er_1): Ditto.
+ 	(*divmodsi_internal): Ditto.
+ 	* config/alpha/constraints.md ("b"): Correct register
+ 	number in the description.
+ 
+ 2024-05-30  YunQiang Su  <syq@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2024-05-29  YunQiang Su  <syq@gcc.gnu.org>
+ 
+ 	* config/mips/mips.cc(mips16_gp_pseudo_reg): Mark
+ 	MIPS16_PIC_TEMP and MIPS_PROLOGUE_TEMP clobbered.
+ 	(mips_emit_call_insn): Mark MIPS16_PIC_TEMP and
+ 	MIPS_PROLOGUE_TEMP clobbered if MIPS16 and CALL_CLOBBERED_GP.
+ 
+ 2024-05-28  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-05-22  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR sanitizer/115172
+ 	* ubsan.cc (instrument_bool_enum_load): If rhs is not in generic
+ 	address space, use qualified version of utype with the right
+ 	address space.  Formatting fix.
+ 
+ 2024-05-28  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	Backported from master:
+ 	2024-05-14  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/113907
+ 	* ipa-prop.h (ipa_jump_functions_equivalent_p): Declare.
+ 	(values_equal_for_ipcp_p): Likewise.
+ 	* ipa-prop.cc (ipa_agg_pass_through_jf_equivalent_p): New function.
+ 	(ipa_agg_jump_functions_equivalent_p): Likewise.
+ 	(ipa_jump_functions_equivalent_p): Likewise.
+ 	* ipa-cp.cc (values_equal_for_ipcp_p): Make function public.
+ 	* ipa-icf-gimple.cc: Include alloc-pool.h, symbol-summary.h, sreal.h,
+ 	ipa-cp.h and ipa-prop.h.
+ 	(func_checker::compare_gimple_call): Comapre jump functions.
+ 
+ 2024-05-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-01-31  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/110176
+ 	* match.pd (zext (bool) <= (int) 4294967295u): Make sure
+ 	to match INTEGER_CST only without outstanding conversion.
+ 
+ 2024-05-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-08-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/111039
+ 	* tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
+ 	SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
+ 
+ 2024-05-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-11-20  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/112281
+ 	* tree-loop-distribution.cc
+ 	(loop_distribution::pg_add_dependence_edges): For = in the
+ 	innermost common loop record a partition conflict.
+ 
+ 2024-05-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-11-13  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/112495
+ 	* tree-data-ref.cc (runtime_alias_check_p): Reject checks
+ 	between different address spaces.
+ 
+ 2024-05-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-01-11  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/112505
+ 	* tree-vect-loop.cc (vectorizable_induction): Reject
+ 	bit-precision induction.
+ 
+ 2024-05-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-01-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/112718
+ 	* dwarf2out.cc (dwarf2out_finish): Reset all type units
+ 	for the fat part of an LTO compile.
+ 
+ 2024-05-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-12-14  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/112793
+ 	* tree-vect-slp.cc (vect_schedule_slp_node): Already
+ 	code-generated constant/external nodes are OK.
+ 
+ 2024-05-16  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-02-22  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/114027
+ 	* tree-vect-loop.cc (vecctorizable_reduction): Use optimized
+ 	condition reduction classification only for single-element
+ 	chains.
+ 
+ 2024-05-16  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-05-08  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/114375
+ 	* tree-vect-slp.cc (vect_build_slp_tree_2): Compute the
+ 	load permutation for masked loads but reject it when any
+ 	such is necessary.
+ 	* tree-vect-stmts.cc (vectorizable_load): Reject masked
+ 	VMAT_ELEMENTWISE and VMAT_STRIDED_SLP as those are not
+ 	supported.
+ 
+ 2024-05-16  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-03-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/114231
+ 	* tree-vect-slp.cc (vect_analyze_slp): Lookup patterns when
+ 	processing a BB SLP root.
+ 
+ 2024-05-16  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-05-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/114734
+ 	* internal-fn.cc (expand_call_mem_ref): Use
+ 	get_gimple_for_ssa_name to get at the def stmt of the address
+ 	argument to honor SSA coalescing constraints.
+ 
+ 2024-05-16  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-04-09  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR lto/114655
+ 	* lto-wrapper.cc (merge_flto_options): Add force argument.
+ 	(merge_and_complain): Do not force here.
+ 	(run_gcc): But here to make the link-time -flto option override
+ 	any compile-time one.
+ 
+ 2024-05-16  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-05-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR gcov-profile/114715
+ 	* gimplify.cc (gimplify_switch_expr): Set the location of the
+ 	GIMPLE switch.
+ 
+ 2024-05-15  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	Backported from master:
+ 	2024-04-08  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/108007
+ 	PR ipa/112616
+ 	* cgraph.h (cgraph_edge): Add a parameter to
+ 	redirect_call_stmt_to_callee.
+ 	* ipa-param-manipulation.h (ipa_param_adjustments): Add a
+ 	parameter to modify_call.
+ 	(ipa_release_ssas_in_hash): Declare.
+ 	* cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
+ 	parameter killed_ssas, pass it to padjs->modify_call.
+ 	* ipa-param-manipulation.cc (purge_all_uses): New function.
+ 	(ipa_param_adjustments::modify_call): New parameter killed_ssas.
+ 	Instead of substituting uses, invoke purge_all_uses.  If
+ 	hash of killed SSAs has not been provided, create a temporary one
+ 	and release SSAs that have been added to it.
+ 	(compare_ssa_versions): New function.
+ 	(ipa_release_ssas_in_hash): Likewise.
+ 	* tree-inline.cc (redirect_all_calls): Create
+ 	id->killed_new_ssa_names earlier, pass it to edge redirection,
+ 	adjust a comment.
+ 	(copy_body): Release SSAs in id->killed_new_ssa_names.
+ 
+ 2024-05-15  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	Backported from master:
+ 	2024-04-05  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/114247
+ 	* ipa-param-manipulation.cc (ipa_param_adjustments::modify_call):
+ 	Force values obtined through pass-through maps to the expected
+ 	split type.
+ 
+ 2024-05-13  Andrew MacLeod  <amacleod@redhat.com>
+ 
+ 	PR tree-optimization/111009
+ 	* range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
+ 	* value-range.h (contains_zero_p): New.
+ 
+ 2024-05-09  Andrew Pinski  <apinski@marvell.com>
+ 
+ 	Backported from master:
+ 	2023-09-25  Andrew Pinski  <apinski@marvell.com>
+ 
+ 	PR tree-optimization/110386
+ 	* gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR.
+ 
+ 2024-05-08  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	Backported from master:
+ 	2024-02-22  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	PR tree-optimization/109804
+ 	* gimple-ssa-warn-access.cc (new_delete_mismatch_p): Handle
+ 	DEMANGLE_COMPONENT_UNNAMED_TYPE.
+ 
+ 2024-05-08  Andrew Pinski  <apinski@marvell.com>
+ 
+ 	Backported from master:
+ 	2023-09-10  Andrew Pinski  <apinski@marvell.com>
+ 
+ 	PR tree-optimization/111331
+ 	* tree-ssa-phiopt.cc (minmax_replacement):
+ 	Fix the LE/GE comparison for the
+ 	`(a CMP CST1) ? max<a,CST2> : a` optimization.
+ 
+ 2024-05-08  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	Backported from master:
+ 	2024-03-11  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	PR middle-end/95351
+ 	* fold-const.cc (merge_truthop_with_opposite_arm): Use
+ 	the type of the operands of the comparison and not the type
+ 	of the comparison.
+ 
+ 2024-05-07  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	* config/avr/avr-mcus.def: Add new MCUs (copy from gcc-13).
+ 	* doc/avr-mmcu.texi: Rebuild.
+ 
+ 2024-05-07  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Backported from master:
+ 	2024-05-06  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR ipa/92606
+ 	* config/avr/avr.cc (avr_option_override): Set
+ 	flag_ipa_icf_variables = 0.
+ 
+ 2024-05-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-04-10  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/114672
+ 	* tree-ssa-math-opts.cc (convert_plusminus_to_widen): Only
+ 	allow mode-precision results.
+ 
+ 2024-05-02  Will Schmidt  <will_schmidt@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2024-04-12  Will Schmidt  <will_schmidt@linux.ibm.com>
+ 		    Peter Bergner  <bergner@linux.ibm.com>
+ 
+ 	PR target/101865
+ 	* config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported): Use
+ 	TARGET_POWER8.
+ 	* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Use
+ 	OPTION_MASK_POWER8.
+ 	* config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add OPTION_MASK_POWER8.
+ 	(ISA_2_7_MASKS_SERVER): Likewise.
+ 	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Update
+ 	comment.  Use OPTION_MASK_POWER8 and TARGET_POWER8.
+ 	* config/rs6000/rs6000.h (TARGET_SYNC_HI_QI): Use TARGET_POWER8.
+ 	* config/rs6000/rs6000.md (define_attr "isa"): Add p8.
+ 	(define_attr "enabled"): Handle it.
+ 	(define_insn "prefetch"): Use TARGET_POWER8.
+ 	* config/rs6000/rs6000.opt (mpower8-internal): New.
+ 
+ 2024-05-02  Peter Bergner  <bergner@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2024-04-10  Peter Bergner  <bergner@linux.ibm.com>
+ 
+ 	PR target/101865
+ 	* config/rs6000/rs6000.h (TARGET_DIRECT_MOVE): Define.
+ 	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Replace
+ 	OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR.  Delete redundant
+ 	OPTION_MASK_DIRECT_MOVE usage.  Delete TARGET_DIRECT_MOVE dead code.
+ 	(rs6000_opt_masks): Neuter the "direct-move" option.
+ 	* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Replace
+ 	OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR.  Delete useless
+ 	comment.
+ 	* config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete
+ 	OPTION_MASK_DIRECT_MOVE.
+ 	(OTHER_P8_VECTOR_MASKS): Likewise.
+ 	(POWERPC_MASKS): Likewise.
+ 	* config/rs6000/rs6000.opt (mdirect-move): Remove Mask and Var.
+ 
+ 2024-05-01  Jeevitha  <jeevitha@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2024-03-07  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>
+ 
+ 	PR target/113950
+ 	* config/rs6000/vsx.md (vsx_splat_<mode>): Correct assignment to operand1
+ 	and simplify else if with else.
+ 
+ 2024-04-30  Joe Ramsay  <Joe.Ramsay@arm.com>
+ 
+ 	Backported from master:
+ 	2024-03-15  Joe Ramsay  <Joe.Ramsay@arm.com>
+ 
+ 	* match.pd: Fix truncation pattern for -fno-signed-zeroes
+ 
+ 2024-04-30  Yang Yujie  <yangyujie@loongson.cn>
+ 
+ 	Backported from master:
+ 	2023-12-12  Yang Yujie  <yangyujie@loongson.cn>
+ 
+ 	PR target/114848
+ 	* config/loongarch/loongarch.cc: Do not restore the saved eh_return
+ 	data registers ($r4-$r7) for a normal return of a function that calls
+ 	__builtin_eh_return elsewhere.
+ 	* config/loongarch/loongarch-protos.h: Same.
+ 	* config/loongarch/loongarch.md: Same.
+ 
+ 2024-04-26  Richard Ball  <richard.ball@arm.com>
+ 
+ 	PR target/114272
+ 	* config/aarch64/aarch64-cores.def (AARCH64_CORE):
+ 	Change SCHEDULER_IDENT from cortexa55 to cortexa53
+ 	for Cortex-A510.
+ 
+ 2024-04-25  Richard Ball  <richard.ball@arm.com>
+ 
+ 	Backported from master:
+ 	2024-04-25  Richard Ball  <richard.ball@arm.com>
+ 
+ 	PR target/114837
+ 	* config/arm/arm.cc (cmse_nonsecure_call_inline_register_clear):
+ 	Add zero/sign extend.
+ 	(arm_expand_prologue): Add zero/sign extend.
+ 
+ 2024-04-25  Kewen Lin  <linkw@linux.ibm.com>
+ 	    Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	PR target/88309
+ 	* config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Fix
+ 	wrong align passed to function build_aligned_type.
+ 	* tree-ssa-loop-prefetch.cc (is_miss_rate_acceptable): Add an
+ 	assertion to ensure align_unit should be positive.
+ 	* tree.cc (build_qualified_type): Update function comments.
+ 
+ 2024-04-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-26  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR sanitizer/111736
+ 	* tsan.cc (instrument_expr): Punt on non-generic address space
+ 	accesses.
+ 
+ 2024-04-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-22  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR sanitizer/111736
+ 	* ubsan.cc (ubsan_expand_null_ifn, instrument_mem_ref): Avoid
+ 	SANITIZE_NULL instrumentation for non-generic address spaces
+ 	for which targetm.addr_space.zero_address_valid (as) is true.
+ 
+ 2024-04-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-03-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/111736
+ 	* asan.cc (instrument_derefs): Do not instrument accesses
+ 	to non-generic address-spaces.
+ 
+ 2024-04-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-12-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR sanitizer/111736
+ 	* asan.cc (asan_protect_global): Do not protect globals
+ 	in non-generic address-space.
+ 
+ 2024-04-22  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-09-04  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
+ 	all 32b Darwin PowerPC cases.
+ 
+ 2024-04-22  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-04-02  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.cc (darwin_override_options): Update the
+ 	clang major version value in the dsymutil check.
+ 
+ 2024-04-21  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-04-02  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.cc (darwin_override_options): Reduce the debug
+ 	level to 2 if dsymutil cannot handle .macinfo sections.
+ 
+ 2024-04-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-10-25  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.cc (darwin_override_options): Handle fPIE.
+ 
+ 2024-04-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.h (LINK_COMMAND_SPEC_A): Handle weak crts
+ 	before other objects. (REAL_LIBGCC_SPEC): Remove weak crts
+ 	from here.  (DARWIN_WEAK_CRTS): New.
+ 
+ 2024-04-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-01-28  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.cc (darwin_build_constant_cfstring): Prevent over-
+ 	alignment of CFString constants by setting DECL_USER_ALIGN.
+ 
+ 2024-04-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-01-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.cc (darwin_objc1_section): Use the correct
+ 	meta-data version for constant strings.
+ 	(machopic_select_section): Assert if we fail to handle CFString
+ 	sections as Obejctive-C meta-data or drectly.
+ 
+ 2024-04-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-01-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR target/105522
+ 	* config/darwin.cc (machopic_select_section): Handle C and C++
+ 	CFStrings.
+ 	(darwin_rename_builtins): Move this out of the CFString code.
+ 	(darwin_libc_has_function): Likewise.
+ 	(darwin_build_constant_cfstring): Create an anonymous var to
+ 	hold each CFString.
+ 	* config/darwin.h (ASM_OUTPUT_LABELREF): Handle constant
+ 	CFstrings.
+ 
+ 2024-04-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-10-26  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.h
+ 	(darwin_label_is_anonymous_local_objc_name): Make metadata names
+ 	linker-visibile for GNU objective C.
+ 
+ 2024-04-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-10-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config.in: Regenerate.
+ 	* config/darwin.cc (darwin_file_start): Add assembler directives
+ 	for the target OS version, where these are supported by the
+ 	assembler.
+ 	(darwin_override_options): Check for building >= macOS 10.14.
+ 	* configure: Regenerate.
+ 	* configure.ac: Check for assembler support of .build_version
+ 	directives.
+ 
+ 2024-04-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-09-10  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.cc (darwin_function_section): Place unlikely
+ 	executed global init code into the standard cold section.
+ 
+ 2024-04-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-09-04  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin-sections.def (static_init_section): Add the
+ 	__TEXT,__StaticInit section.
+ 	* config/darwin.cc (darwin_function_section): Use the static init
+ 	section for global initializers, to match other platform toolchains.
+ 
+ 2024-04-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-09-04  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin-sections.def (darwin_exception_section): Move to
+ 	the __TEXT segment.
+ 	* config/darwin.cc (darwin_emit_except_table_label): Align before
+ 	the exception table label.
+ 	* config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
+ 	relative 4byte relocs.
+ 
+ 2024-04-18  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	Backported from master:
+ 	2023-08-17  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	* configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
+ 	output.
+ 	* configure: Regenerate.
+ 
+ 2024-04-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-09-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* configure: Regenerate.
+ 	* configure.ac: Handle explict disable of stdlib option, set
+ 	defaults for Darwin.
+ 
+ 2024-04-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-09-20  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.h:
+ 	(SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same
+ 	specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'.
+ 
+ 2024-04-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-04-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/114599
+ 	PR gcov-profile/114115
+ 	* symtab.cc (ifunc_ref_map): Do not use auto_bitmap.
+ 	(is_caller_ifunc_resolver): Optimize bitmap_bit_p/bitmap_set_bit
+ 	pair.
+ 	(symtab_node::check_ifunc_callee_symtab_nodes): Properly
+ 	allocate ifunc_ref_map here.
+ 
+ 2024-04-15  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	Backported from master:
+ 	2024-04-03  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	PR tree-optimization/114115
+ 	* cgraph.h (symtab_node): Add check_ifunc_callee_symtab_nodes.
+ 	(cgraph_node): Add called_by_ifunc_resolver.
+ 	* cgraphunit.cc (symbol_table::compile): Call
+ 	symtab_node::check_ifunc_callee_symtab_nodes.
+ 	* symtab.cc (check_ifunc_resolver): New.
+ 	(ifunc_ref_map): Likewise.
+ 	(is_caller_ifunc_resolver): Likewise.
+ 	(symtab_node::check_ifunc_callee_symtab_nodes): Likewise.
+ 	* tree-profile.cc (gimple_gen_ic_func_profiler): Disable indirect
+ 	call profiling for IFUNC resolvers and their callees.
+ 
+ 2024-04-15  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	* config/aarch64/aarch64.h (AARCH64_ARCH): Remove LS64 from
+ 	Armv8.7-a.
+ 
+ 2024-04-15  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	PR tree-optimization/113552
+ 	* config/aarch64/aarch64.cc
+ 	(aarch64_simd_clone_compute_vecsize_and_simdlen): Block simdlen 1.
+ 
+ 2024-04-12  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-09-27  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR target/111610
+ 	* configure: Regenerate.
+ 	* configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN".
+ 
+ 2024-04-12  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-09-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin-protos.h (enum darwin_external_toolchain): New.
+ 	* config/darwin.cc (DSYMUTIL_VERSION): New.
+ 	(darwin_override_options): Choose the default debug DWARF version
+ 	depending on the configured dsymutil version.
+ 
+ 2024-04-12  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2022-05-03  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/darwin.cc (darwin_label_is_anonymous_local_objc_name): Make
+ 	protocol class methods linker-visible.
+ 
+ 2024-04-11  Kito Cheng  <kito.cheng@sifive.com>
+ 
+ 	Backported from master:
+ 	2024-02-29  Kito Cheng  <kito.cheng@sifive.com>
+ 
+ 	PR target/114130
+ 	* config/riscv/sync.md (atomic_compare_and_swap<mode>): Sign
+ 	extend the expected value if needed.
+ 
+ 2024-04-04  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-07-13  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR target/110624
+ 	* config/darwin.h (DARWIN_PLATFORM_ID): New.
+ 	(LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
+ 	and SDK data to the static linker.
+ 
+ 2024-04-02  Qing Zhao  <qing.zhao@oracle.com>
+ 
+ 	Backported from master:
+ 	2023-09-15  Qing Zhao  <qing.zhao@oracle.com>
+ 
+ 	PR tree-optimization/111407
+ 	* tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
+ 	when one of the operands is subject to abnormal coalescing.
+ 
+ 2024-04-01  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	Backported from master:
+ 	2024-01-11  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	PR target/113233
+ 	* config/loongarch/genopts/loongarch.opt.in: Mark options with
+ 	the "Save" property.
+ 	* config/loongarch/loongarch-opts.cc
+ 	(loongarch_update_gcc_opt_status): Update the value of the
+ 	la_target to global_options.
+ 	* config/loongarch/loongarch-opts.h
+ 	(loongarch_update_gcc_opt_status): Add a function declaration.
+ 	* config/loongarch/loongarch.cc
+ 	(loongarch_option_override_internal): Call the function
+ 	loongarch_update_gcc_opt_status.
+ 	(loongarch_option_save): New functions.
+ 	(loongarch_option_restore): Likewise.
+ 	(TARGET_OPTION_SAVE): Define macro.
+ 	(TARGET_OPTION_RESTORE): Likewise.
+ 	* config/loongarch/loongarch.opt: Regenerate.
+ 
+ 2024-03-27  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	Backported from master:
+ 	2024-03-05  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR sanitizer/97696
+ 	* asan.cc (asan_expand_mark_ifn): Allow the length to be a poly_int.
+ 
+ 2024-03-26  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-08-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/110838
+ 	* match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
+ 	the arithmetic right-shift case to non-negative operands.
+ 
+ 2024-03-26  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-07-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/91838
+ 	* gimple-match-head.cc: Include attribs.h and asan.h.
+ 	* generic-match-head.cc: Likewise.
+ 	* match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
+ 
+ 2024-03-17  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-07-02  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR target/108743
+ 	* config/darwin.opt: Add fconstant-cfstrings alias to
+ 	mconstant-cfstrings.
+ 	* doc/invoke.texi: Amend invocation descriptions to reflect
+ 	that the fconstant-cfstrings is a target-option alias and to
+ 	add the missing mconstant-cfstrings option description to the
+ 	Darwin section.
+ 
+ 2024-03-17  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/i386/darwin.h (ENDFILE_SPEC): Fix whitespace.
+ 
+ 2024-03-14  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	Backported from master:
+ 	2024-03-14  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	* config/i386/i386-features.cc
+ 	(general_scalar_chain::convert_op): Handle REG_EH_REGION note.
+ 	(convert_scalars_to_vector): Ditto.
+ 	* config/i386/i386-features.h (class scalar_chain): New
+ 	memeber control_flow_insns.
+ 
+ 2024-03-09  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	Backported from master:
+ 	2024-03-09  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	* config/loongarch/sync.md (atomic_cas_value_strong<mode>):
+ 	In loongarch64, a sign extension operation is added when
+ 	operands[2] is a register operand and the mode is SImode.
+ 
+ 2024-03-03  Oleg Endo  <olegendo@gcc.gnu.org>
+ 
+ 	PR target/101737
+ 	* config/sh/sh.cc (sh_is_nott_insn): Handle case where the input
+ 	is not an insn, but e.g. a code label.
+ 
+ 2024-03-01  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-02-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/110221
+ 	* tree-vect-slp.cc (vect_schedule_slp_node): When loop
+ 	masking / len is applied make sure to not schedule
+ 	intenal defs outside of the loop.
+ 
+ 2024-02-27  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* tree-ssa-dse.cc (compute_trims): Fix description.  Return early
+ 	if either ref->offset is not byte aligned or ref->size is not known
+ 	to be equal to ref->max_size.
+ 	(maybe_trim_complex_store): Fix description.
+ 	(maybe_trim_constructor_store): Likewise.
+ 	(maybe_trim_partially_dead_store): Likewise.
+ 
+ 2024-02-27  Jeevitha  <jeevitha@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-08-31  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>
+ 
+ 	PR target/110411
+ 	* config/rs6000/mma.md (define_insn_and_split movoo): Disallow
+ 	AltiVec address operands.
+ 	(define_insn_and_split movxo): Likewise.
+ 	* config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
+ 	redundant mode size check.
+ 
+ 2024-02-27  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	Backported from master:
+ 	2024-02-26  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	PR target/114098
+ 	* config/i386/amxtileintrin.h (_tile_loadconfig): Use
+ 	__builtin_ia32_ldtilecfg.
+ 	(_tile_storeconfig): Use __builtin_ia32_sttilecfg.
+ 	* config/i386/i386-builtin.def (BDESC): Add
+ 	__builtin_ia32_ldtilecfg and __builtin_ia32_sttilecfg.
+ 	* config/i386/i386-expand.cc (ix86_expand_builtin): Handle
+ 	IX86_BUILTIN_LDTILECFG and IX86_BUILTIN_STTILECFG.
+ 	* config/i386/i386.md (ldtilecfg): New pattern.
+ 	(sttilecfg): Likewise.
+ 
+ 2024-02-23  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	Backported from master:
+ 	2024-02-23  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/108120
+ 	* config/arm/neon.md (div<VCVTF:mode>3): Rename from div<mode>3.
+ 	Gate with ARM_HAVE_NEON_<MODE>_ARITH.
+ 
+ 2024-02-22  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	Backported from master:
+ 	2023-10-31  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	PR target/112299
+ 	* config/loongarch/loongarch-opts.h (HAVE_AS_TLS): Define to 0
+ 	if not defined yet.
+ 
+ 2024-02-22  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	Backported from master:
+ 	2023-11-14  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	PR target/112330
+ 	* config/loongarch/genopts/loongarch.opt.in: Add
+ 	-m[no]-pass-relax-to-as.  Change the default of -m[no]-relax to
+ 	account conditional branch relaxation support status.
+ 	* config/loongarch/loongarch.opt: Regenerate.
+ 	* configure.ac (gcc_cv_as_loongarch_cond_branch_relax): Check if
+ 	the assembler supports conditional branch relaxation.
+ 	* configure: Regenerate.
+ 	* config.in: Regenerate.  Note that there are some unrelated
+ 	changes introduced by r14-5424 (which does not contain a
+ 	config.in regeneration).
+ 	* config/loongarch/loongarch-opts.h
+ 	(HAVE_AS_COND_BRANCH_RELAXATION): Define to 0 if not defined.
+ 	* config/loongarch/loongarch.h (ASM_MRELAX_DEFAULT): Define.
+ 	(ASM_MRELAX_SPEC): Define.
+ 	(ASM_SPEC): Use ASM_MRELAX_SPEC instead of "%{mno-relax}".
+ 	* doc/invoke.texi: Document -m[no-]relax and
+ 	-m[no-]pass-mrelax-to-as for LoongArch.
+ 
+ 2024-02-22  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	Backported from master:
+ 	2023-09-20  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	* config.in: Regenerate.
+ 	* config/loongarch/genopts/loongarch.opt.in: Add compilation option
+ 	mrelax. And set the initial value of explicit-relocs according to the
+ 	detection status.
+ 	* config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the
+ 	--no-relax option to the linker.
+ 	* config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro.
+ 	* config/loongarch/loongarch.opt: Regenerate.
+ 	* configure: Regenerate.
+ 	* configure.ac: Add detection of support for binutils relax function.
+ 
+ 2024-02-22  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	Backported from master:
+ 	2023-10-17  Lulu Cheng  <chenglulu@loongson.cn>
+ 		    Chenghua Xu  <xuchenghua@loongson.cn>
+ 
+ 	* config/loongarch/loongarch.h (ASM_OUTPUT_ALIGN_WITH_NOP):
+ 	Delete.
+ 
+ 2024-02-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	Backported from master:
+ 	2023-12-20  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	PR target/112787
+ 	* tree-vect-generic.cc (type_for_widest_vector_mode): Change function to
+ 	use original vector type and check widest vector mode has at most the
+ 	same number of elements.
+ 	(get_compute_type): Pass original vector type rather than the element
+ 	type to type_for_widest_vector_mode and remove now obsolete check for
+ 	the number of elements.
+ 
+ 2024-02-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/113921
+ 	* cfgrtl.h (prepend_insn_to_edge): New declaration.
+ 	* cfgrtl.cc (insert_insn_on_edge): Clarify behavior in function
+ 	comment.
+ 	(prepend_insn_to_edge): New function.
+ 	* cfgexpand.cc (expand_asm_stmt): Use prepend_insn_to_edge instead of
+ 	insert_insn_on_edge.
+ 
+ 2024-02-14  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	Backported from master:
+ 	2024-02-07  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	PR target/111677
+ 	* config/aarch64/aarch64.cc (aarch64_reg_save_mode): Use
+ 	V16QImode for the full 16-byte FPR saves in the vector PCS case.
+ 	(aarch64_gen_storewb_pair): Handle V16QImode.
+ 	(aarch64_gen_loadwb_pair): Likewise.
+ 	(aarch64_gen_load_pair): Likewise.
+ 	* config/aarch64/aarch64.md (loadwb_pair<TX:mode>_<P:mode>):
+ 	Rename to ...
+ 	(loadwb_pair<TX_V16QI:mode>_<P:mode>): ... this, extending to
+ 	V16QImode.
+ 	(storewb_pair<TX:mode>_<P:mode>): Rename to ...
+ 	(storewb_pair<TX_V16QI:mode>_<P:mode>): ... this, extending to
+ 	V16QImode.
+ 	* config/aarch64/iterators.md (TX_V16QI): New.
+ 
+ 2024-02-14  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/113896
+ 	* tree-vect-slp.cc (vect_optimize_slp): Permute
+ 	SLP_TREE_SCALAR_STMTS when eliding a permuation in a
+ 	VEC_PERM node we need to preserve because it wraps an
+ 	extern vector.
+ 
+ 2024-02-08  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Backported from master:
+ 	2024-02-08  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/113824
+ 	* config/avr/avr-mcus.def (ata5797): Move from avr5 to avr4.
+ 	* doc/avr-mmcu.texi: Rebuild.
+ 
+ 2024-02-05  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-06-02  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/95226
+ 	PR c++/109359
+ 	* varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
+ 	(initializer_constant_valid_p_1): Compare float precision.
+ 
+ 2024-02-05  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	Backported from master:
+ 	2024-02-05  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	* config/mips/mips-msa.md (neg<mode:MSA>2): Add missing mode for
+ 	neg.
+ 
+ 2024-02-05  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	Backported from master:
+ 	2024-02-05  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	* config/mips/mips-msa.md (elmsgnbit): New define_mode_attr.
+ 	(neg<mode>2): Change the mode iterator from MSA to IMSA because
+ 	in FP arithmetic we cannot use (0 - x) for -x.
+ 	(neg<mode>2): New define_insn to implement FP vector negation,
+ 	using a bnegi instruction to negate the sign bit.
+ 
+ 2024-02-02  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	Backported from master:
+ 	2024-01-24  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR tree-optimization/110422
+ 	* tree-sra.cc (scan_function): Disqualify bases of operands of asm
+ 	gotos.
+ 
+ 2024-02-01  John David Anglin  <danglin@gcc.gnu.org>
+ 
+ 	* config/pa/pa.md (atomic_storedi_1): Fix bug in
+ 	alternative 1.
+ 
+ 2024-01-26  Wilco Dijkstra  <wilco.dijkstra@arm.com>
+ 
+ 	Backported from master:
+ 	2024-01-16  Wilco Dijkstra  <wilco.dijkstra@arm.com>
+ 
+ 	* config/aarch64/aarch64-cores.def (AARCH64_CORE): Add 'cobalt-100' CPU.
+ 	* config/aarch64/aarch64-tune.md: Regenerated.
+ 	* doc/invoke.texi (-mcpu): Add cobalt-100 core.
+ 
+ 2024-01-25  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Backported from master:
+ 	2024-01-25  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/113601
+ 	* config/avr/avr-mcus.def (atmega3208, atmega3209): Fix data_section_start.
+ 
+ 2024-01-16  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Backported from master:
+ 	2024-01-15  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/107201
+ 	* config/avr/avr.h (EXTRA_SPEC_FUNCTIONS): Add no-devlib, avr_no_devlib.
+ 	* config/avr/driver-avr.cc (avr_no_devlib): New function.
+ 	(avr_devicespecs_file): Use it to remove -nodevicelib from the
+ 	options for cores only.
+ 	* config/avr/avr-arch.h (avr_get_parch): New prototype.
+ 	* config/avr/avr-devices.cc (avr_get_parch): New function.
+ 
+ 2024-01-15  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	Backported from master:
+ 	2024-01-15  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	PR target/113156
+ 	* config/avr/avr.opt (-mdouble, -mlong-double): Add "Save" flag.
+ 	(-mbranch-cost): Set "Optimization" flag.
+ 
+ 2024-01-12  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Backported from master:
+ 	2024-01-12  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	* config/avr/avr.cc (avr_handle_addr_attribute): Move "..." from
+ 	format string to %s argument.
+ 
+ 2024-01-08  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Backported from master:
+ 	2024-01-08  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/112952
+ 	* config/avr/avr.cc (avr_handle_addr_attribute): Also print valid
+ 	range when diagnosing attribute "io" and "io_low" are out of range.
+ 	(avr_eval_addr_attrib): Don't ICE on empty address at that place.
+ 	(avr_insert_attributes): Reject if attribute "address", "io" or "io_low"
+ 	in contexts other than static storage.
+ 	(avr_asm_output_aligned_decl_common): Move output of decls with
+ 	attribute "address", "io", and "io_low" to...
+ 	(avr_output_addr_attrib): ...this new function.
+ 	(avr_asm_asm_output_aligned_bss): Remove output for decls with
+ 	attribute "address", "io", and "io_low".
+ 	(avr_encode_section_info): Rectify handling of decls with attribute
+ 	"address", "io", and "io_low".
+ 
+ 2023-12-19  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-12-19  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/112816
+ 	* config/i386/mmx.md (signbitv2sf2): Force operands[1] into a REG.
+ 
+ 2023-12-18  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-12-18  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/113013
+ 	* tree-object-size.cc (alloc_object_size): Return size_unknown if
+ 	corresponding argument(s) don't have integral type or have integral
+ 	type with higher precision than sizetype.  Don't check arg1 >= 0
+ 	uselessly.  Compare argument indexes against gimple_call_num_args
+ 	in unsigned type rather than int.  Formatting fixes.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-29  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/112733
+ 	* fold-const.cc (multiple_of_p): Pass SIGNED rather than
+ 	UNSIGNED for wi::multiple_of_p on widest_int arguments.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-12-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/112845
+ 	* config/i386/i386.md (movabsq $(i32 << shift), r64 peephole2): FAIL
+ 	if the new immediate is ix86_endbr_immediate_operand.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-12-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/112837
+ 	* config/i386/i386.cc (ix86_elim_entry_set_got): Before checking
+ 	for UNSPEC_SET_GOT check that SET_SRC is UNSPEC.  Use SET_SRC and
+ 	SET_DEST macros instead of XEXP, rename vec variable to set.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-12-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/112816
+ 	* config/i386/sse.md (signbit<mode>2): Force operands[1] into a REG.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-25  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/111408
+ 	* config/i386/i386.md (*jcc_bt<mode>_mask): Add (const_int 0) as
+ 	expected second operand of bt_comparison_operator.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-13  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/111967
+ 	* gimple-range-cache.cc (block_range_cache::set_bb_range): Grow
+ 	m_ssa_ranges to num_ssa_names rather than num_ssa_names + 1.
+ 	(block_range_cache::dump): Iterate from 1 rather than 0.  Don't use
+ 	ssa_name (x) unless m_ssa_ranges[x] is non-NULL.  Iterate to
+ 	m_ssa_ranges.length () rather than num_ssa_names.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c/112339
+ 	* attribs.cc (attribute_ignored_p): Only return true for
+ 	attr_namespace_ignored_p if as is NULL.
+ 	(decl_attributes): Never add ignored attributes.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-07-19  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/110731
+ 	* wide-int.cc (wi::divmod_internal): Always unpack dividend and
+ 	divisor as UNSIGNED regardless of sgn.
+ 
+ 2023-12-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-08-24  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/111080
+ 	* dwarf2out.cc (prune_unused_types_walk): Handle
+ 	DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
+ 	DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
+ 	and DW_TAG_dynamic_type as to only output them when referenced.
+ 
+ 2023-12-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-08-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/111137
+ 	* tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
+ 	Properly handle grouped stores from other SLP instances.
+ 
+ 2023-12-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-08-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
+ 	Split out from vect_slp_analyze_node_dependences, remove
+ 	dead code.
+ 	(vect_slp_analyze_load_dependences): Split out from
+ 	vect_slp_analyze_node_dependences, adjust comments.  Process
+ 	queued stores before any disambiguation.
+ 	(vect_slp_analyze_node_dependences): Remove.
+ 	(vect_slp_analyze_instance_dependence): Adjust.
+ 
+ 2023-12-12  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	Backported from master:
+ 	2023-12-12  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	PR target/112891
+ 	* config/i386/i386.cc (ix86_avx_u128_mode_after): Return
+ 	AVX_U128_ANY if callee_abi doesn't clobber all_sse_regs to
+ 	align with ix86_avx_u128_mode_needed.
+ 	(ix86_avx_u128_mode_needed): Return AVX_U128_ClEAN for
+ 	sibling_call.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-10-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/111917
+ 	* tree-ssa-loop-unswitch.cc (hoist_guard): Always insert
+ 	new conditional after last stmt.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-10-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/111818
+ 	* tree-ssa.cc (maybe_optimize_var): When clearing
+ 	DECL_NOT_GIMPLE_REG_P always rewrite into SSA.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-09-28  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/111614
+ 	* tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly
+ 	convert the first vector when required.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-10-12  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/111764
+ 	* tree-vect-loop.cc (check_reduction_path): Remove the attempt
+ 	to allow x + x via special-casing of assigns.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-10-20  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/111445
+ 	* tree-scalar-evolution.cc (simple_iv_with_niters):
+ 	Add missing check for a sign-conversion.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-08-18  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/111019
+ 	* tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
+ 	also scrap base and offset in case the ref is indirect.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-08-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/110702
+ 	* tree-ssa-loop-ivopts.cc (rewrite_use_address): When
+ 	we created a NULL pointer based access rewrite that to
+ 	a LEA.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-07-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/110556
+ 	* tree-ssa-tail-merge.cc (gimple_equal_p): Check
+ 	assign code and all operands of non-stores.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-07-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/110515
+ 	* tree-ssa-pre.cc (compute_avail): Make code dealing
+ 	with hoisting loads with different alias-sets more
+ 	robust.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-06-20  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/110295
+ 	* dwarf2out.cc (process_scope_var): Continue processing
+ 	the decl after setting a parent in case the existing DIE
+ 	was in limbo.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-05-31  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR ipa/109983
+ 	PR tree-optimization/109143
+ 	* tree-ssa-structalias.cc (struct topo_info): Remove.
+ 	(init_topo_info): Likewise.
+ 	(free_topo_info): Likewise.
+ 	(compute_topo_order): Simplify API, put the component
+ 	with ESCAPED last so it's processed first.
+ 	(topo_visit): Adjust.
+ 	(solve_graph): Likewise.
+ 
+ 2023-11-24  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	Backported from master:
+ 	2023-11-23  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/112672
+ 	* config/i386/i386.md (parityhi2):
+ 	Use temporary register in the call to gen_parityhi2_cmp.
+ 
+ 2023-11-22  Maciej W. Rozycki  <macro@embecosm.com>
+ 
+ 	Backported from master:
+ 	2023-11-22  Maciej W. Rozycki  <macro@embecosm.com>
+ 
+ 	PR target/111815
+ 	* config/vax/vax.cc (index_term_p): Only accept the index scaler
+ 	as the RHS operand to ASHIFT.
+ 
+ 2023-11-20  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	Backported from master:
+ 	2023-11-20  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	* config/loongarch/gnu-user.h (MUSL_ABI_SPEC): Modify suffix.
+ 
+ 2023-11-20  Peng Fan  <fanpeng@loongson.cn>
+ 
+ 	Backported from master:
+ 	2023-04-21  Peng Fan  <fanpeng@loongson.cn>
+ 
+ 	* config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
+ 
+ 2023-11-16  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	Backported from master:
+ 	2023-11-15  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	* config/loongarch/loongarch.cc
+ 	(loongarch_memmodel_needs_release_fence): Remove.
+ 	(loongarch_cas_failure_memorder_needs_acquire): New static
+ 	function.
+ 	(loongarch_print_operand): Redefine 'G' for the barrier on CAS
+ 	failure.
+ 	* config/loongarch/sync.md (atomic_cas_value_strong<mode>):
+ 	Remove the redundant barrier before the LL instruction, and
+ 	emit an acquire barrier on failure if needed by
+ 	failure_memorder.
+ 	(atomic_cas_value_cmp_and_7_<mode>): Likewise.
+ 	(atomic_cas_value_add_7_<mode>): Remove the unnecessary barrier
+ 	before the LL instruction.
+ 	(atomic_cas_value_sub_7_<mode>): Likewise.
+ 	(atomic_cas_value_and_7_<mode>): Likewise.
+ 	(atomic_cas_value_xor_7_<mode>): Likewise.
+ 	(atomic_cas_value_or_7_<mode>): Likewise.
+ 	(atomic_cas_value_nand_7_<mode>): Likewise.
+ 	(atomic_cas_value_exchange_7_<mode>): Likewise.
+ 
+ 2023-11-15  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-11-06  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	PR target/111828
+ 	* config.in: Regenerate.
+ 	* config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Guard
+ 	inline asm handling under !HAVE_AS_POWER10_HTM.
+ 	* configure: Regenerate.
+ 	* configure.ac: Detect assembler support for HTM insns at power10.
+ 
+ 2023-11-10  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	Backported from master:
+ 	2023-11-10  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	PR target/112443
+ 	* config/i386/sse.md (*avx2_pcmp<mode>3_4): Fix swap condition
+ 	from LT to GT since there's not in the pattern.
+ 	(*avx2_pcmp<mode>3_5): Ditto.
+ 
+ 2023-11-06  John David Anglin  <danglin@gcc.gnu.org>
+ 
+ 	* config/pa/pa.cc (pa_asm_trampoline_template): Fix typo.
+ 
+ 2023-10-26  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	Backported from master:
+ 	2023-10-23  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	* config/loongarch/loongarch.h (CLEAR_INSN_CACHE): New definition.
+ 
+ 2023-10-26  chenxiaolong  <chenxiaolong@loongson.cn>
+ 
+ 	Backported from master:
+ 	2023-10-25  chenxiaolong  <chenxiaolong@loongson.cn>
+ 
+ 	* config/loongarch/loongarch.md (get_thread_pointer<mode>):Adds the
+ 	instruction template corresponding to the __builtin_thread_pointer
+ 	function.
+ 	* doc/extend.texi:Add the __builtin_thread_pointer function support
+ 	description to the documentation.
+ 
+ 2023-10-26  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	Backported from master:
+ 	2023-07-06  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	PR target/110170
+ 	* config/i386/i386.md (movdf_internal): Disparage slightly for
+ 	2 alternatives (r,v) and (v,r) by adding constraint modifier
+ 	'?'.
+ 
+ 2023-10-23  Oleg Endo  <olegendo@gcc.gnu.org>
+ 
+ 	PR target/111001
+ 	* config/sh/sh_treg_combine.cc (sh_treg_combine::record_set_of_reg):
+ 	Skip over nop move insns.
+ 
+ 2023-10-23  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-10-12  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	PR target/111367
+ 	* config/rs6000/rs6000.md (stack_protect_setsi): Support prefixed
+ 	instruction emission and incorporate to stack_protect_set<mode>.
+ 	(stack_protect_setdi): Rename to ...
+ 	(stack_protect_set<mode>): ... this, adjust constraint.
+ 	(stack_protect_testsi): Support prefixed instruction emission and
+ 	incorporate to stack_protect_test<mode>.
+ 	(stack_protect_testdi): Rename to ...
+ 	(stack_protect_test<mode>): ... this, adjust constraint.
+ 
+ 2023-10-20  Oleg Endo  <olegendo@gcc.gnu.org>
+ 
+ 	PR target/101177
+ 	* config/sh/sh.md (unnamed split pattern): Fix comparison of
+ 	find_regno_note result.
+ 
+ 2023-10-19  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	Backported from master:
+ 	2023-09-07  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR target/111528
+ 	* lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
+ 	rather than gen_rtx_PLUS.
+ 
+ 2023-10-16  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-09-25  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	PR target/111380
+ 	* config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt
+ 	target_option_default_node when the callee has no option
+ 	attributes, also simplify the existing code accordingly.
+ 
+ 2023-10-16  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-09-25  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	PR target/111366
+ 	* config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip
+ 	empty inline asm.
+ 
+ 2023-10-07  Andrew Pinski  <pinskia@gmail.com>
+ 
+ 	Backported from master:
+ 	2023-10-06  Andrew Pinski  <pinskia@gmail.com>
+ 
+ 	PR middle-end/111699
+ 	* match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
+ 	(v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Enable only for GIMPLE.
+ 
+ 2023-10-02  Pat Haugen  <pthaugen@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-09-19  Pat Haugen  <pthaugen@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the
+ 	modulo instruction is disabled.
+ 	* config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New.
+ 	* config/rs6000/rs6000.md (mod<mode>3, *mod<mode>3): Check it.
+ 	(define_expand umod<mode>3): New.
+ 	(define_insn umod<mode>3): Rename to *umod<mode>3 and check if the modulo
+ 	instruction is disabled.
+ 	(umodti3, modti3): Check if the modulo instruction is disabled.
+ 
+ 2023-09-29  Wilco Dijkstra  <wilco.dijkstra@arm.com>
+ 
+ 	Backported from master:
+ 	2023-09-28  Wilco Dijkstra  <wilco.dijkstra@arm.com>
+ 
+ 	PR target/111121
+ 	* config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander.
+ 	(movmemdi): Call aarch64_expand_cpymem_mops for correct expansion.
+ 	* config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support
+ 	for memmove.
+ 	* config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new
+ 	function.
+ 
+ 2023-09-26  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gimple-range-gori.cc (gori_compute::logical_combine): Add missing
+ 	return statement in the varying case.
+ 
+ 2023-09-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	Backported from master:
+ 	2023-09-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR target/111411
+ 	* config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
+ 	the lower memory access to a mem-pair operand.
+ 
+ 2023-09-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	Backported from master:
+ 	2023-08-31  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.md (untyped_call): Emit a call_value
+ 	rather than a call.  List each possible destination register
+ 	in the call pattern.
+ 
+ 2023-09-12  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/111340
+ 	* config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
+ 	Call output_addr_const for CASE_CONST_SCALAR_INT.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
+ 	New function.
+ 	(aarch64_layout_frame): Use it to decide whether locals should
+ 	go above or below the saved registers.
+ 	(aarch64_expand_prologue): Update stack layout comment.
+ 	Emit a stack tie after the final adjustment.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
+ 	(aarch64_frame::below_hard_fp_saved_regs_size): Delete.
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
+ 	(aarch64_frame::hard_fp_save_and_probe): New fields.
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
+ 	Rather than asserting that a leaf function saves LR, instead assert
+ 	that a leaf function saves something.
+ 	(aarch64_get_separate_components): Prevent the chosen probe
+ 	registers from being individually shrink-wrapped.
+ 	(aarch64_allocate_and_probe_stack_space): Remove workaround for
+ 	probe registers that aren't at the bottom of the previous allocation.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
+ 	Always probe the residual allocation at offset 1024, asserting
+ 	that that is in range.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
+ 	the LR save slot is in the first 16 bytes of the register save area.
+ 	Only form STP/LDP push/pop candidates if both registers are valid.
+ 	(aarch64_allocate_and_probe_stack_space): Remove workaround for
+ 	when LR was not in the first 16 bytes.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
+ 	Don't probe final allocations that are exactly 1KiB in size (after
+ 	unprobed space above the final allocation has been deducted).
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
+ 	calculation of initial_adjust for frames in which all saves
+ 	are SVE saves.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
+ 	the allocation of the top of the frame.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.h (aarch64_frame): Add comment above
+ 	reg_offset.
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
+ 	from the bottom of the frame, rather than the bottom of the saved
+ 	register area.  Measure reg_offset from the bottom of the frame
+ 	rather than the bottom of the saved register area.
+ 	(aarch64_save_callee_saves): Update accordingly.
+ 	(aarch64_restore_callee_saves): Likewise.
+ 	(aarch64_get_separate_components): Likewise.
+ 	(aarch64_process_components): Likewise.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
+ 	to...
+ 	(aarch64_frame::bytes_above_hard_fp): ...this.
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame)
+ 	(aarch64_expand_prologue): Update accordingly.
+ 	(aarch64_initial_elimination_offset): Likewise.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
+ 	(aarch64_frame::bytes_above_locals): ...this.
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame)
+ 	(aarch64_initial_elimination_offset): Update accordingly.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
+ 	calculation of chain_offset into the emit_frame_chain block.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
+ 	callee_offset handling.
+ 	(aarch64_save_callee_saves): Replace the start_offset parameter
+ 	with a bytes_below_sp parameter.
+ 	(aarch64_restore_callee_saves): Likewise.
+ 	(aarch64_expand_prologue): Update accordingly.
+ 	(aarch64_expand_epilogue): Likewise.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
+ 	field.
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
+ 	(aarch64_expand_epilogue): Use it instead of
+ 	below_hard_fp_saved_regs_size.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
+ 	field.
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
+ 	and use it instead of crtl->outgoing_args_size.
+ 	(aarch64_get_separate_components): Use bytes_below_saved_regs instead
+ 	of outgoing_args_size.
+ 	(aarch64_process_components): Likewise.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
+ 	allocate the frame in one go if there are no saved registers.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
+ 	chain_offset rather than callee_offset.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
+ 	a local shorthand for cfun->machine->frame.
+ 	(aarch64_restore_callee_saves, aarch64_get_separate_components):
+ 	(aarch64_process_components): Likewise.
+ 	(aarch64_allocate_and_probe_stack_space): Likewise.
+ 	(aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
+ 	(aarch64_layout_frame): Use existing shorthand for one more case.
+ 
+ 2023-09-12  Haochen Gui  <guihaoc@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2023-08-31  Haochen Gui  <guihaoc@gcc.gnu.org>
+ 
+ 	PR target/96762
+ 	* config/rs6000/rs6000-string.cc (expand_block_move): Call vector
+ 	load/store with length only on 64-bit Power10.
+ 
+ 2023-09-11  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	Backported from master:
+ 	2023-09-11  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	PR target/111306
+ 	PR target/111335
+ 	* config/i386/sse.md (int_comm): New int_attr.
+ 	(fma_<complexopname>_<mode><sdc_maskz_name><round_name>):
+ 	Remove % for Complex conjugate operations since they're not
+ 	commutative.
+ 	(fma_<complexpairopname>_<mode>_pair): Ditto.
+ 	(<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
+ 	(cmul<conj_op><mode>3): Ditto.
+ 
+ 2023-09-01  Tobias Burnus  <tobias@codesourcery.com>
+ 
+ 	Backported from master:
+ 	2023-08-19  Tobias Burnus  <tobias@codesourcery.com>
+ 
+ 	PR middle-end/111017
+ 	* omp-expand.cc (expand_omp_for_init_vars): Pass after=true
+ 	to expand_omp_build_cond for 'factor != 0' condition, resulting
+ 	in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
+ 
+ 2023-09-01  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	Backported from master:
+ 	2023-09-01  Lulu Cheng  <chenglulu@loongson.cn>
+ 		    Guo Jie  <guojie@loongson.cn>
+ 
+ 	PR target/110484
+ 	* config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
+ 	frame_pointer_needed to determine whether to use the $fp register.
+ 
+ 2023-08-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-08-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/110914
+ 	* tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
+ 	adjust_last_stmt unless len is known constant.
+ 
+ 2023-08-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-08-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/111015
+ 	* gimple-ssa-store-merging.cc
+ 	(imm_store_chain_info::output_merged_store): Use wi::mask and
+ 	wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
+ 	build_int_cst to build BIT_AND_EXPR mask.
+ 
+ 2023-08-19  Guo Jie  <guojie@loongson.cn>
+ 
+ 	Backported from master:
+ 	2023-08-19  Guo Jie  <guojie@loongson.cn>
+ 		    Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	* config/loongarch/t-loongarch: Add loongarch-driver.h into
+ 	TM_H. Add loongarch-def.h and loongarch-tune.h into
+ 	OPTIONS_H_EXTRA.
+ 
+ 2023-08-16  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	Backported from master:
+ 	2023-08-16  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	* config/i386/i386-builtins.cc
+ 	(ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
+ 	* config/i386/i386-options.cc (parse_mtune_ctrl_str):
+ 	Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
+ 	8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
+ 	* config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
+ 	for use_scatter_8parts
+ 	* config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
+ 	(TARGET_USE_GATHER_8PARTS): .. this.
+ 	(TARGET_USE_SCATTER): Rename to ..
+ 	(TARGET_USE_SCATTER_8PARTS): .. this.
+ 	* config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
+ 	(X86_TUNE_USE_GATHER_8PARTS): .. this.
+ 	(X86_TUNE_USE_SCATTER): Rename to
+ 	(X86_TUNE_USE_SCATTER_8PARTS): .. this.
+ 	* config/i386/i386.opt: Add new options mgather, mscatter.
+ 
+ 2023-08-16  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	Backported from master:
+ 	2023-08-16  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	* config/i386/i386-options.cc (m_GDS): New macro.
+ 	* config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
+ 	enable for m_GDS.
+ 	(X86_TUNE_USE_GATHER_4PARTS): Ditto.
+ 	(X86_TUNE_USE_GATHER): Ditto.
+ 
+ 2023-08-09  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	* common/config/i386/cpuinfo.h (get_available_features): Check
+ 	max_subleaf_level for valid subleaf before use CPUID.
+ 
+ 2023-08-01  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-07-26  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	PR target/110741
+ 	* config/rs6000/vsx.md (define_insn xxeval): Correct vsx
+ 	operands output with "x".
+ 
+ 2023-07-14  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	Backported from master:
+ 	2023-07-14  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/110206
+ 	* fwprop.cc (contains_paradoxical_subreg_p): Move to ...
+ 	* rtlanal.cc (contains_paradoxical_subreg_p): ... here.
+ 	* rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
+ 	* cprop.cc (try_replace_reg): Do not set REG_EQUAL note
+ 	when the original source contains a paradoxical subreg.
+ 
+ 2023-07-14  Oleg Endo  <olegendo@gcc.gnu.org>
+ 
+ 	PR target/101469
+ 	* config/sh/sh.md (peephole2): Handle case where eliminated reg
+ 	is also	used by the address of the following memory operand.
+ 
+ 2023-07-13  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	Backported from master:
+ 	2023-07-13  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/106966
+ 	* config/alpha/alpha.cc (alpha_emit_set_long_const):
+ 	Always use DImode when constructing long const.
+ 
+ 2023-07-08  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-07-08  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR c++/110595
+ 	* doc/invoke.texi (Warning Options): Fix typo.
+ 
+ 2023-07-05  Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-06-23   Michael Meissner  <meissner@linux.ibm.com>
+ 		    Aaron Sawdey   <acsawdey@linux.ibm.com>
+ 
+ 	PR target/105325
+ 	* config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
+ 	allowed prefixed lwa to be generated.
+ 	* config/rs6000/fusion.md: Regenerate.
+ 	* config/rs6000/predicates.md (ds_form_mem_operand): Delete.
+ 	* config/rs6000/rs6000.md (prefixed attribute): Add support for load
+ 	plus compare immediate fused insns.
+ 	(maybe_prefixed): Likewise.
+ 
+ 2023-07-05  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	Backported from master:
+ 	2023-06-06  Segher Boessenkool  <segher@kernel.crashing.org>
+ 
+ 	* config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
+ 	split out from...
+ 	(gen_ld_cmpi_p10): ... this.
+ 
+ 2023-07-04  Cui, Lili  <lili.cui@intel.com>
+ 
+ 	* common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
+ 	from Rocketlake, remove model value 0xbf from Alderlake.
+ 
+ 2023-06-30  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
+ 	(fold_nonarray_ctor_reference): Likewise.  Specifically deal
+ 	with integral bit-fields.
+ 	(fold_ctor_reference): Make sure that the constructor uses the
+ 	native storage order.
+ 
+ 2023-06-29  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	PR rtl-optimization/110237
+ 	* config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
+ 	UNSPEC_MASKMOV.
+ 	(maskstore<mode><avx512fmaskmodelower): Ditto.
+ 	(*<avx512>_store<mode>_mask): New define_insn, it's renamed
+ 	from original <avx512>_store<mode>_mask.
+ 
+ 2023-06-29  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	PR target/110309
+ 	* config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
+ 	Refine pattern with UNSPEC_MASKLOAD.
+ 	(maskload<mode><avx512fmaskmodelower>): Ditto.
+ 	(*<avx512>_load<mode>_mask): Extend mode iterator to
+ 	VI12HF_AVX512VL.
+ 	(*<avx512>_load<mode>): Ditto.
+ 
+ 2023-06-29  Hongyu Wang  <hongyu.wang@intel.com>
+ 
+ 	Backported from master:
+ 	2023-06-26  Hongyu Wang  <hongyu.wang@intel.com>
+ 
+ 	* config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
+ 	Override tune_string with arch_string if tune_string is not
+ 	explicitly specified.
+ 
+ 2023-06-28  Thomas Schwinge  <thomas@codesourcery.com>
+ 
+ 	Backported from master:
+ 	2023-06-02  Thomas Schwinge  <thomas@codesourcery.com>
+ 
+ 	PR testsuite/66005
+ 	* doc/install.texi: Document (optional) Perl usage for parallel
+ 	testing of libgomp.
+ 
+ 2023-06-28  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	* config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
+ 	Move flag_expensive_optimizations && !optimize_size to ..
+ 	* config/i386/i386-options.cc (ix86_option_override_internal):
+ 	.. this, it makes -mvzeroupper independent of optimization
+ 	level, but still keeps the behavior of architecture
+ 	tuning(emit_vzeroupper) unchanged.
+ 
+ 2023-06-27  Andrew Pinski  <apinski@marvell.com>
+ 
+ 	Backported from master:
+ 	2023-06-27  Andrew Pinski  <apinski@marvell.com>
+ 
+ 	PR middle-end/110420
+ 	PR middle-end/103979
+ 	PR middle-end/98619
+ 	* gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
+ 
+ 2023-06-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-06-19  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/110298
+ 	* tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
+ 	Clear number of iterations info before cleaning up the CFG.
+ 
+ 2023-06-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-06-09  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/110182
+ 	* match.pd (two conversions in a row): Use element_precision
+ 	to DTRT for VECTOR_TYPE.
+ 
+ 2023-06-22  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	Backported from master:
+ 	2023-06-07  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	PR target/110132
+ 	* config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
+ 	New. Use it ...
+ 	(aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
+ 	names for builtins.
+ 	(aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
+ 	setup if in_lto_p, just like we do for SVE.
+ 	* config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
+ 	(__arm_st64b): Delete.
+ 	(__arm_st64bv): Delete.
+ 	(__arm_st64bv0): Delete.
+ 
+ 2023-06-22  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	Backported from master:
+ 	2023-06-07  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	PR target/110100
+ 	* config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
+ 	Use input operand for the destination address.
+ 	* config/aarch64/aarch64.md (st64b): Fix constraint on address
+ 	operand.
+ 
+ 2023-06-22  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	Backported from master:
+ 	2023-06-07  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	PR target/110100
+ 	* config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
+ 	Replace eight consecutive spaces with tabs.
+ 	(aarch64_init_ls64_builtins): Likewise.
+ 	(aarch64_expand_builtin_ls64): Likewise.
+ 	* config/aarch64/aarch64.md (ld64b): Likewise.
+ 	(st64b): Likewise.
+ 	(st64bv): Likewise
+ 	(st64bv0): Likewise.
+ 
+ 2023-06-20  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-06-12  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	PR target/109932
+ 	* config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
+ 	__builtin_unpack_vector_int128): Move from stanza power7 to vsx.
+ 
+ 2023-06-20  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-06-12  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	PR target/110011
+ 	* config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
+ 	floating constant itself for real_to_target call.
+ 
+ 2023-06-15  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	Backported from master:
+ 	2023-06-15  Lulu Cheng  <chenglulu@loongson.cn>
+ 		    Andrew Pinski  <apinski@marvell.com>
+ 
+ 	PR target/110136
+ 	* config/loongarch/loongarch.md: Modify the register constraints for template
+ 	"jumptable" and "indirect_jump" from "r" to "e".
+ 
+ 2023-06-12  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-06-12  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/110200
+ 	* genmatch.cc (expr::gen_transform): Put braces around
+ 	the if arm for the (convert ...) short-cut.
+ 
+ 2023-06-10  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/109650
+ 	PR target/92729
+ 	Backport from 2023-05-10 master r14-1688.
+ 	* config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
+ 	* config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
+ 	(avr_pass_data_ifelse): New pass_data for it.
+ 	(make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
+ 	(avr_canonicalize_comparison, avr_out_plus_set_ZN)
+ 	(avr_out_cmp_ext): New functions.
+ 	(compare_condtition): Make sure REG_CC dies in the branch insn.
+ 	(avr_rtx_costs_1): Add computation of cbranch costs.
+ 	(avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
+ 	[ADJUST_LEN_CMP_SEXT]Handle them.
+ 	(TARGET_CANONICALIZE_COMPARISON): New define.
+ 	(avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
+ 	(avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
+ 	(TARGET_MACHINE_DEPENDENT_REORG): Remove define.
+ 	* config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
+ 	(make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
+ 	(avr_out_cmp_zext): New Protos
+ 	* config/avr/avr.md (branch, difficult_branch): Don't split insns.
+ 	(*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
+ 	(*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
+ 	(*cbranch<mode>4): Rename to cbranch<mode>4_insn.
+ 	(define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
+ 	(define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
+ 	Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
+ 	Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
+ 	(adjust_len) [add_set_ZN, cmp_zext]: New.
+ 	(QIPSI): New mode iterator.
+ 	(ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
+ 	(gelt): New code iterator.
+ 	(gelt_eqne): New code attribute.
+ 	(rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
+ 	(branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
+ 	(*cmpqi_sign_extend): Remove insns.
+ 	(define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
+ 	* config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
+ 	* config/avr/predicates.md (scratch_or_d_register_operand): New.
+ 	* config/avr/constraints.md (Yxx): New constraint.
+ 
+ 2023-06-09  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-06-06  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>
+ 
+ 	PR target/106907
+ 	* config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
+ 	duplicate expression.
+ 
+ 2023-06-09  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-06-02  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR target/110044
+ 	* config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
+ 	Make sure that we do not have a cap on field alignment before altering
+ 	the struct layout based on the type alignment of the first entry.
+ 
+ 2023-06-09  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	PR target/110108
+ 	* config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
+ 	view_convert_expr mask to signed type when folding pblendvb
+ 	builtins.
+ 
+ 2023-06-08  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	Backported from master:
+ 	2023-05-25  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	PR target/109800
+ 	* config/arm/arm.md (movdf): Generate temporary pseudo in DImode
+ 	instead of DFmode.
+ 	* config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
+ 	lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
+ 	DFmode as an rvalue.
+ 
+ 2023-06-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	Backported from master:
+ 	2023-05-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	PR target/109939
+ 	* config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
+ 	qualifier_none for the return operand.
+ 
+ 2023-06-02  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/110088
+ 	* config/avr/avr.md: Add an RTL peephole to optimize operations on
+ 	non-LD_REGS after a move from LD_REGS.
+ 	(piaop): New code iterator.
+ 
+ 2023-06-01  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-06-01  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR target/109954
+ 	* doc/invoke.texi (x86 Options): Fix description of -m32 option.
+ 
+ 2023-05-30  Andreas Schwab  <schwab@suse.de>
+ 
+ 	PR target/110036
+ 	* config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
+ 	match libsanitizer.
+ 
+ 2023-05-25  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/104327
+ 	* config/avr/avr.cc (avr_can_inline_p): New static function.
+ 	(TARGET_CAN_INLINE_P): Define to that function.
+ 
+ 2023-05-25  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/82931
+ 	* config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
+ 	Handle any bit position and use mode QISI.
+ 	* config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
+ 	of 2 insns for bit-transfer of respective style.
+ 
+ 2023-05-23  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	* config/avr/avr.cc (avr_insn_cost): New static function.
+ 	(TARGET_INSN_COST): Define to that function.
+ 
+ 2023-05-22   Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	PR target/70243
+ 	* config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
+ 	(vsx_nfmsv4sf4): Do not generate vnmsubfp.  Back port from master
+ 	04/10/2023 change.
+ 
+ 2023-05-22  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-05-21  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/109505
+ 	* match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
+ 	Combine successive equal operations with constants,
+ 	(A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
+ 	CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
+ 	operands.
+ 
+ 2023-05-22  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-05-17  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	* tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
+ 	suggested unroll factor once the previous analysis fails.
+ 
+ 2023-05-20  Triffid Hunter  <triffid.hunter@gmail.com>
+ 
+ 	PR target/105753
+ 	Backport from 2023-05-20 https://gcc.gnu.org/r14-1016
+ 	* config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
+ 	Remove superfluous "parallel" in insn pattern.
+ 	([u]divmod<mode>4): Tidy code.  Use gcc_unreachable() instead of
+ 	printing error text to assembly.
+ 
+ 2023-05-18  Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	* config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
+ 	after vmsr and vmrs, and lower the case of P0.
+ 
+ 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	* config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
+ 	(__ARM_mve_coerce1): Remove.
+ 	(__ARM_mve_coerce2): Remove.
+ 	(__ARM_mve_coerce3): Remove.
+ 	(__ARM_mve_coerce_i_scalar): New.
+ 	(__ARM_mve_coerce_s8_ptr): New.
+ 	(__ARM_mve_coerce_u8_ptr): New.
+ 	(__ARM_mve_coerce_s16_ptr): New.
+ 	(__ARM_mve_coerce_u16_ptr): New.
+ 	(__ARM_mve_coerce_s32_ptr): New.
+ 	(__ARM_mve_coerce_u32_ptr): New.
+ 	(__ARM_mve_coerce_s64_ptr): New.
+ 	(__ARM_mve_coerce_u64_ptr): New.
+ 	(__ARM_mve_coerce_f_scalar): New.
+ 	(__ARM_mve_coerce_f16_ptr): New.
+ 	(__ARM_mve_coerce_f32_ptr): New.
+ 	(__arm_vst4q): Change _coerce_ overloads.
+ 	(__arm_vbicq): Change _coerce_ overloads.
+ 	(__arm_vmulq): Change _coerce_ overloads.
+ 	(__arm_vcmpeqq): Change _coerce_ overloads.
+ 	(__arm_vcmpneq): Change _coerce_ overloads.
+ 	(__arm_vmaxnmavq): Change _coerce_ overloads.
+ 	(__arm_vmaxnmvq): Change _coerce_ overloads.
+ 	(__arm_vminnmavq): Change _coerce_ overloads.
+ 	(__arm_vsubq): Change _coerce_ overloads.
+ 	(__arm_vminnmvq): Change _coerce_ overloads.
+ 	(__arm_vrshlq): Change _coerce_ overloads.
+ 	(__arm_vqsubq): Change _coerce_ overloads.
+ 	(__arm_vqdmulltq): Change _coerce_ overloads.
+ 	(__arm_vqdmullbq): Change _coerce_ overloads.
+ 	(__arm_vqdmulhq): Change _coerce_ overloads.
+ 	(__arm_vqaddq): Change _coerce_ overloads.
+ 	(__arm_vhaddq): Change _coerce_ overloads.
+ 	(__arm_vhsubq): Change _coerce_ overloads.
+ 	(__arm_vqdmlashq): Change _coerce_ overloads.
+ 	(__arm_vqrdmlahq): Change _coerce_ overloads.
+ 	(__arm_vmlasq): Change _coerce_ overloads.
+ 	(__arm_vqdmlahq): Change _coerce_ overloads.
+ 	(__arm_vmaxnmavq_p): Change _coerce_ overloads.
+ 	(__arm_vmaxnmvq_p): Change _coerce_ overloads.
+ 	(__arm_vminnmavq_p): Change _coerce_ overloads.
+ 	(__arm_vminnmvq_p): Change _coerce_ overloads.
+ 	(__arm_vfmasq_m): Change _coerce_ overloads.
+ 	(__arm_vld1q): Change _coerce_ overloads.
+ 	(__arm_vld1q_z): Change _coerce_ overloads.
+ 	(__arm_vld2q): Change _coerce_ overloads.
+ 	(__arm_vld4q): Change _coerce_ overloads.
+ 	(__arm_vldrhq_gather_offset): Change _coerce_ overloads.
+ 	(__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
+ 	(__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
+ 	(__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
+ 	(__arm_vldrwq_gather_offset): Change _coerce_ overloads.
+ 	(__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
+ 	(__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
+ 	(__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
+ 	(__arm_vst1q_p): Change _coerce_ overloads.
+ 	(__arm_vst2q): Change _coerce_ overloads.
+ 	(__arm_vst1q): Change _coerce_ overloads.
+ 	(__arm_vstrhq): Change _coerce_ overloads.
+ 	(__arm_vstrhq_p): Change _coerce_ overloads.
+ 	(__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
+ 	(__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
+ 	(__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
+ 	(__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
+ 	(__arm_vstrwq_p): Change _coerce_ overloads.
+ 	(__arm_vstrwq): Change _coerce_ overloads.
+ 	(__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
+ 	(__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
+ 	(__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
+ 	(__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
+ 	(__arm_vsetq_lane): Change _coerce_ overloads.
+ 	(__arm_vcmpneq_m): Change _coerce_ overloads.
+ 	(__arm_vldrbq_gather_offset): Change _coerce_ overloads.
+ 	(__arm_vdwdupq_x_u8): Change _coerce_ overloads.
+ 	(__arm_vdwdupq_x_u16): Change _coerce_ overloads.
+ 	(__arm_vdwdupq_x_u32): Change _coerce_ overloads.
+ 	(__arm_viwdupq_x_u8): Change _coerce_ overloads.
+ 	(__arm_viwdupq_x_u16): Change _coerce_ overloads.
+ 	(__arm_viwdupq_x_u32): Change _coerce_ overloads.
+ 	(__arm_vidupq_x_u8): Change _coerce_ overloads.
+ 	(__arm_vddupq_x_u8): Change _coerce_ overloads.
+ 	(__arm_vidupq_x_u16): Change _coerce_ overloads.
+ 	(__arm_vddupq_x_u16): Change _coerce_ overloads.
+ 	(__arm_vidupq_x_u32): Change _coerce_ overloads.
+ 	(__arm_vddupq_x_u32): Change _coerce_ overloads.
+ 	(__arm_vhaddq_x): Change _coerce_ overloads.
+ 	(__arm_vhsubq_x): Change _coerce_ overloads.
+ 	(__arm_vldrdq_gather_offset): Change _coerce_ overloads.
+ 	(__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
+ 	(__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
+ 	(__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
+ 	(__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
+ 	(__arm_vqrdmlahq_m): Change _coerce_ overloads.
+ 	(__arm_vqrdmlashq_m): Change _coerce_ overloads.
+ 	(__arm_vqdmlashq_m): Change _coerce_ overloads.
+ 	(__arm_vmlaldavaxq_p): Change _coerce_ overloads.
+ 	(__arm_vmlasq_m): Change _coerce_ overloads.
+ 	(__arm_vqdmulhq_m): Change _coerce_ overloads.
+ 	(__arm_vqdmulltq_m): Change _coerce_ overloads.
+ 	(__arm_vidupq_u16): Change _coerce_ overloads.
+ 	(__arm_vidupq_u32): Change _coerce_ overloads.
+ 	(__arm_vidupq_u8): Change _coerce_ overloads.
+ 	(__arm_vddupq_u16): Change _coerce_ overloads.
+ 	(__arm_vddupq_u32): Change _coerce_ overloads.
+ 	(__arm_vddupq_u8): Change _coerce_ overloads.
+ 	(__arm_viwdupq_m): Change _coerce_ overloads.
+ 	(__arm_viwdupq_u16): Change _coerce_ overloads.
+ 	(__arm_viwdupq_u32): Change _coerce_ overloads.
+ 	(__arm_viwdupq_u8): Change _coerce_ overloads.
+ 	(__arm_vdwdupq_m): Change _coerce_ overloads.
+ 	(__arm_vdwdupq_u16): Change _coerce_ overloads.
+ 	(__arm_vdwdupq_u32): Change _coerce_ overloads.
+ 	(__arm_vdwdupq_u8): Change _coerce_ overloads.
+ 	(__arm_vaddlvaq): Change _coerce_ overloads.
+ 	(__arm_vaddlvaq_p): Change _coerce_ overloads.
+ 	(__arm_vaddvaq): Change _coerce_ overloads.
+ 	(__arm_vaddvaq_p): Change _coerce_ overloads.
+ 	(__arm_vcmphiq_m): Change _coerce_ overloads.
+ 	(__arm_vmladavaq_p): Change _coerce_ overloads.
+ 	(__arm_vmladavaxq): Change _coerce_ overloads.
+ 	(__arm_vmlaldavaxq): Change _coerce_ overloads.
+ 	(__arm_vstrbq): Change _coerce_ overloads.
+ 	(__arm_vstrbq_p): Change _coerce_ overloads.
+ 	(__arm_vrmlaldavhaq_p): Change _coerce_ overloads.
+ 	(__arm_vstrbq_scatter_offset): Change _coerce_ overloads.
+ 	(__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
+ 	(__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
+ 	(__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
+ 	(__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
+ 	(__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
+ 
+ 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	* config/arm/arm_mve.h (__arm_vbicq): Change coerce on
+ 	scalar constant.
+ 	(__arm_vmvnq_m): Likewise.
+ 
+ 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	* config/arm/arm_mve.h (__arm_vorrq): Add _n variant.
+ 
+ 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	Backported from master:
+ 	2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	* config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
+ 	(__arm_vadcq_u32): Likewise.
+ 	(__arm_vadcq_m_s32): Likewise.
+ 	(__arm_vadcq_m_u32): Likewise.
+ 	(__arm_vsbcq_s32): Likewise.
+ 	(__arm_vsbcq_u32): Likewise.
+ 	(__arm_vsbcq_m_s32): Likewise.
+ 	(__arm_vsbcq_m_u32): Likewise.
+ 	* config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
+ 	(mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
+ 	(mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
+ 	(mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
+ 	(mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
+ 	(mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
+ 	(mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
+ 	(mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
+ 	(mve_vctp<mode1>qhi, mve_vbrsrq_n_f<mode>)
+ 	(mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
+ 	(mve_vbicq_n_<supf><mode>, mve_vctp<mode1>q_mhi)
+ 	(mve_vcvtbq_f16_f32v8hf, mve_vcvttq_f16_f32v8hf)
+ 	(mve_veorq_f<mode>, mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
+ 	(mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
+ 	(mve_vrmlaldavhxq_sv4si, mve_vbicq_m_n_<supf><mode>)
+ 	(mve_vcvtq_m_to_f_<supf><mode>, mve_vshlcq_<supf><mode>)
+ 	(mve_vmvnq_m_<supf><mode>, mve_vpselq_<supf><mode>)
+ 	(mve_vcvtbq_m_f16_f32v8hf, mve_vcvtbq_m_f32_f16v4sf)
+ 	(mve_vcvttq_m_f16_f32v8hf, mve_vcvttq_m_f32_f16v4sf)
+ 	(mve_vmlaldavq_p_<supf><mode>, mve_vmlsldavaq_s<mode>)
+ 	(mve_vmlsldavaxq_s<mode>, mve_vmlsldavq_p_s<mode>)
+ 	(mve_vmlsldavxq_p_s<mode>, mve_vmvnq_m_n_<supf><mode>)
+ 	(mve_vorrq_m_n_<supf><mode>, mve_vpselq_f<mode>)
+ 	(mve_vrev32q_m_fv8hf, mve_vrev32q_m_<supf><mode>)
+ 	(mve_vrev64q_m_f<mode>, mve_vrmlaldavhaxq_sv4si)
+ 	(mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhaxq_sv4si)
+ 	(mve_vrmlsldavhq_p_sv4si, mve_vrmlsldavhxq_p_sv4si)
+ 	(mve_vrev16q_m_<supf>v16qi, mve_vrmlaldavhq_p_<supf>v4si)
+ 	(mve_vrmlsldavhaq_sv4si, mve_vandq_m_<supf><mode>)
+ 	(mve_vbicq_m_<supf><mode>, mve_veorq_m_<supf><mode>)
+ 	(mve_vornq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
+ 	(mve_vandq_m_f<mode>, mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>)
+ 	(mve_vornq_m_f<mode>, mve_vorrq_m_f<mode>)
+ 	(mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
+ 	(mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
+ 	(mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
+ 	capitalization in the emitted asm.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* config/arm/constraints.md (mve_vldrd_immediate): Move it to
+ 	predicates.md.
+ 	(Ri): Move constraint definition from predicates.md.
+ 	(Rl): Define new constraint.
+ 	* config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
+ 	missing constraint.
+ 	(mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
+ 	for op 1, use mve_vstrw_immediate predicate and Rl constraint for
+ 	op 2. Fix asm output spacing.
+ 	(mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
+ 	* config/arm/predicates.md (Ri) Move constraint to constraints.md
+ 	(mve_vldrd_immediate): Move it from
+ 	constraints.md.
+ 	(mve_vstrw_immediate): New predicate.
+ 
+ 2023-05-18  Murray Steele  <murray.steele@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-18  Murray Steele  <murray.steele@arm.com>
+ 
+ 	PR target/108442
+ 	* config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
+ 	function.
+ 	(__arm_vst1q_p_s8): Likewise.
+ 	(__arm_vld1q_z_u8): Likewise.
+ 	(__arm_vld1q_z_s8): Likewise.
+ 	(__arm_vst1q_p_u16): Likewise.
+ 	(__arm_vst1q_p_s16): Likewise.
+ 	(__arm_vld1q_z_u16): Likewise.
+ 	(__arm_vld1q_z_s16): Likewise.
+ 	(__arm_vst1q_p_u32): Likewise.
+ 	(__arm_vst1q_p_s32): Likewise.
+ 	(__arm_vld1q_z_u32): Likewise.
+ 	(__arm_vld1q_z_s32): Likewise.
+ 	(__arm_vld1q_z_f16): Likewise.
+ 	(__arm_vst1q_p_f16): Likewise.
+ 	(__arm_vld1q_z_f32): Likewise.
+ 	(__arm_vst1q_p_f32): Likewise.
+ 
+ 2023-05-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-24  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	PR target/108177
+ 	* config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
+ 	mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
+ 	as input operand.
+ 
+ 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	Backported from master:
+ 	2023-04-04  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	* config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
+ 	(mve_vcreateq_f<mode>): Swap operands.
+ 
+ 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-16  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	PR target/96795
+ 	PR target/107515
+ 	* config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
+ 	(__ARM_mve_coerce3): Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
+ 	Fix spacing.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
+ 
+ 2023-05-18  Christophe Lyon  <christophe.lyon@arm.com>
+ 
+ 	Backported from master:
+ 	2023-02-03  Christophe Lyon  <christophe.lyon@arm.com>
+ 
+ 	* config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
+ 	attribute.
+ 	(mve_vqshluq_m_n_s<mode>): Likewise.
+ 	(mve_vshlq_m_<supf><mode>): Likewise.
+ 	(mve_vsriq_m_n_<supf><mode>): Likewise.
+ 	(mve_vsubq_m_<supf><mode>): Likewise.
+ 
+ 2023-05-18  Christophe Lyon  <christophe.lyon@arm.com>
+ 
+ 	Backported from master:
+ 	2022-10-03  Christophe Lyon  <christophe.lyon@arm.com>
+ 
+ 	* config/arm/mve.md (mve_vrev64q_m_<supf><mode>): Add early
+ 	clobber.
+ 	(mve_vrev64q_m_f<mode>): Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* config/arm/mve.md (mve_vrmlaldavhq_<supf>v4si,
+ 	mve_vrmlaldavhaq_<supf>v4si): Fix spacing vs tabs.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
+ 	(mve_vmlaldavaxq_s<mode>, mve_vmlaldavaxq_p_<supf><mode>): Fix
+ 	spacing vs tabs.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* config/arm/mve.md (mve_vsubq_n_f<mode>): Fix spacing.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* config/arm/mve.md (mve_vaddlvq_p_<supf>v4si)
+ 	(mve_vaddq_n_<supf><mode>, mve_vaddvaq_<supf><mode>)
+ 	(mve_vaddlvaq_<supf>v4si, mve_vaddq_n_f<mode>)
+ 	(mve_vaddlvaq_p_<supf>v4si, mve_vaddq<mode>, mve_vaddq_f<mode>):
+ 	Fix spacing.
+ 
+ 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	* config/arm/arm_mve.h (__arm_vsubq_x FP): New overloads.
+ 	(__arm_vsubq_x Integer): New.
+ 
+ 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	PR target/107515
+ 	* config/arm/arm_mve.h (__ARM_mve_typeid): Add float types.
+ 
+ 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	PR target/96795
+ 	* config/arm/arm_mve.h (__arm_vaddq): Fix Overloading.
+ 	(__arm_vmulq): Likewise.
+ 	(__arm_vcmpeqq): Likewise.
+ 	(__arm_vcmpneq): Likewise.
+ 	(__arm_vmaxnmavq): Likewise.
+ 	(__arm_vmaxnmvq): Likewise.
+ 	(__arm_vminnmavq): Likewise.
+ 	(__arm_vsubq): Likewise.
+ 	(__arm_vminnmvq): Likewise.
+ 	(__arm_vrshlq): Likewise.
+ 	(__arm_vqsubq): Likewise.
+ 	(__arm_vqdmulltq): Likewise.
+ 	(__arm_vqdmullbq): Likewise.
+ 	(__arm_vqdmulhq): Likewise.
+ 	(__arm_vqaddq): Likewise.
+ 	(__arm_vhaddq): Likewise.
+ 	(__arm_vhsubq): Likewise.
+ 	(__arm_vqdmlashq): Likewise.
+ 	(__arm_vqrdmlahq): Likewise.
+ 	(__arm_vmlasq): Likewise.
+ 	(__arm_vqdmlahq): Likewise.
+ 	(__arm_vmaxnmavq_p): Likewise.
+ 	(__arm_vmaxnmvq_p): Likewise.
+ 	(__arm_vminnmavq_p): Likewise.
+ 	(__arm_vminnmvq_p): Likewise.
+ 	(__arm_vfmasq_m): Likewise.
+ 	(__arm_vsetq_lane): Likewise.
+ 	(__arm_vcmpneq_m): Likewise.
+ 	(__arm_vhaddq_x): Likewise.
+ 	(__arm_vhsubq_x): Likewise.
+ 	(__arm_vqrdmlashq_m): Likewise.
+ 	(__arm_vqdmlashq_m): Likewise.
+ 	(__arm_vmlaldavaxq_p): Likewise.
+ 	(__arm_vmlasq_m): Likewise.
+ 	(__arm_vqdmulhq_m): Likewise.
+ 	(__arm_vqdmulltq_m): Likewise.
+ 	(__arm_viwdupq_m): Likewise.
+ 	(__arm_viwdupq_u16): Likewise.
+ 	(__arm_viwdupq_u32): Likewise.
+ 	(__arm_viwdupq_u8): Likewise.
+ 	(__arm_vdwdupq_m): Likewise.
+ 	(__arm_vdwdupq_u16): Likewise.
+ 	(__arm_vdwdupq_u32): Likewise.
+ 	(__arm_vdwdupq_u8): Likewise.
+ 	(__arm_vaddlvaq): Likewise.
+ 	(__arm_vaddlvaq_p): Likewise.
+ 	(__arm_vaddvaq): Likewise.
+ 	(__arm_vaddvaq_p): Likewise.
+ 	(__arm_vcmphiq_m): Likewise.
+ 	(__arm_vmladavaq_p): Likewise.
+ 	(__arm_vmladavaxq): Likewise.
+ 	(__arm_vmlaldavaxq): Likewise.
+ 	(__arm_vrmlaldavhaq_p): Likewise.
+ 
+ 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	PR target/96795
+ 	* config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Change types.
+ 	(__arm_vaddq_m_n_s32): Likewise.
+ 	(__arm_vaddq_m_n_s16): Likewise.
+ 	(__arm_vaddq_m_n_u8): Likewise.
+ 	(__arm_vaddq_m_n_u32): Likewise.
+ 	(__arm_vaddq_m_n_u16): Likewise.
+ 	(__arm_vaddq_m): Fix Overloading.
+ 	(__ARM_mve_coerce3): New.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* config/arm/mve.md (mve_vabsq_f<mode>): Fix spacing.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* config/arm/mve.md (@mve_vcmp<mve_cmp_op>q_<mode>): Fix
+ 	spacing.
+ 	* config/arm/arm_mve.h (__arm_vcmpgtq_m, __arm_vcmpleq_m)
+ 	(__arm_vcmpltq_m, __arm_vcmpneq_m): Add missing defines.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* config/arm/mve.md (mve_vdupq_n_f<mode>)
+ 	(mve_vdupq_n_<supf><mode>, mve_vdupq_m_n_<supf><mode>)
+ 	(mve_vdupq_m_n_f<mode>): Fix spacing.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* config/arm/mve.md (mve_vdwdupq_m_wb_u<mode>_insn): Fix spacing.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* config/arm/mve.md (mve_vddupq_u<mode>_insn): Fix 'vddup.u'
+ 	spacing.
+ 	(mve_vddupq_m_wb_u<mode>_insn): Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Fix
+ 	'vmsr' spacing and reg capitalization.
+ 
+ 2023-05-15  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	* config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
+ 	whenever -mdaz-ftz is specified. Don't link crtfastmath.o
+ 	when -mno-daz-ftz is specified.
+ 	* config/i386/darwin.h (ENDFILE_SPEC): Ditto.
+ 	* config/i386/gnu-user-common.h
+ 	(GNU_USER_TARGET_MATHFILE_SPEC): Ditto.
+ 	* config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
+ 	* config/i386/i386.opt (mdaz-ftz): New option.
+ 	* doc/invoke.texi (x86 options): Document mftz-daz.
+ 
+ 2023-05-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-05-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/109778
+ 	* wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
+ 	wi::zext (x, width) rather than x if width != precision, rather
+ 	than using wi::zext (right, width) after the shift.
+ 	* tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
+ 	of wi::lrotate or wi::rrotate.
+ 
+ 2023-05-09  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-04-26  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	PR target/108758
+ 	* config/rs6000/rs6000-builtins.def
+ 	(__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
+ 	__builtin_vsx_scalar_cmp_exp_qp_lt,
+ 	__builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
+ 	to power9-vector.
+ 
+ 2023-05-09  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-04-26  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	PR target/109069
+ 	* config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
+ 	easy_vector_constant with const_vector_each_byte_same, add
+ 	handlings in preparation for !easy_vector_constant, and update
+ 	VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
+ 	* config/rs6000/predicates.md (const_vector_each_byte_same): New
+ 	predicate.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/DATESTAMP gcc-12.4.0/gcc/DATESTAMP
*** gcc-12.3.0/gcc/DATESTAMP	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/DATESTAMP	Thu Jun 20 08:08:05 2024
***************
*** 1 ****
! 20230508
--- 1 ----
! 20240620
diff -Nrcpad gcc-12.3.0/gcc/ada/ChangeLog gcc-12.4.0/gcc/ada/ChangeLog
*** gcc-12.3.0/gcc/ada/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/ada/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,60 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-10  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR ada/114708
+ 	* exp_util.adb (Finalize_Address): Add guard for incomplete types.
+ 
+ 2024-03-07  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR ada/113979
+ 	* exp_ch4.adb (Expand_N_Allocator): In the subtype indication case,
+ 	remove call to Apply_Predicate_Check.
+ 
+ 2024-02-26  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR ada/113893
+ 	* exp_ch7.adb (Build_Anonymous_Master): Do not build the master
+ 	for a local designated type.
+ 	* exp_util.adb (Build_Allocate_Deallocate_Proc): Force Needs_Fin
+ 	to false if no finalization master is attached to an access type
+ 	and assert that it is anonymous in this case.
+ 	* sem_res.adb (Resolve_Allocator): Mention that the object might
+ 	not be finalized at all in the warning given when the type is an
+ 	anonymous access-to-controlled type.
+ 
+ 2024-01-09  Steve Baird  <baird@adacore.com>
+ 
+ 	PR ada/104354
+ 	* libgnat/s-rident.ads: Define a new restriction,
+ 	No_Task_Hierarchy_Implicit. This is like the No_Task_Hierarchy
+ 	restriction, but with the difference that setting this restriction
+ 	does not mean the H.6(6) post-compilation check is satisified.
+ 	* exp_ch6.adb (Add_Task_Actuals_To_Build_In_Place_Call): If it is
+ 	known that the function result cannot have tasks, then pass in a
+ 	null literal for the activation chain actual parameter. This
+ 	avoids generating a reference to an entity that
+ 	Build_Activation_Chain_Entity may have chosen not to generate a
+ 	declaration for.
+ 	* gnatbind.adb (List_Applicable_Restrictions): Do not list the
+ 	No_Task_Hierarchy_Implicit restriction.
+ 	* restrict.adb: Special treatment for the
+ 	No_Task_Hierarchy_Implicit restriction in functions
+ 	Get_Restriction_Id and Restriction_Active. The former is needed to
+ 	disallow the (unlikely) case that a user tries to explicitly
+ 	reference the No_Task_Hierarchy_Implicit restriction.
+ 	* sem_prag.adb (Analyze_Pragma): If a Sequential
+ 	Partition_Elaboration_Policy is specified (and the
+ 	No_Task_Hierarchy restriction is not already enabled), then enable
+ 	the No_Task_Hierarchy_Implicit restriction.
+ 
+ 2023-11-16  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc-interface/decl.cc (gnat_to_gnu_subprog_type): Also create a
+ 	TYPE_DECL for the return type built for the CI/CO mechanism.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/ada/exp_ch4.adb gcc-12.4.0/gcc/ada/exp_ch4.adb
*** gcc-12.3.0/gcc/ada/exp_ch4.adb	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/exp_ch4.adb	Thu Jun 20 08:08:06 2024
*************** package body Exp_Ch4 is
*** 4823,4830 ****
           if Is_Array_Type (Dtyp) and then not No_Initialization (N) then
              Apply_Constraint_Check (Expression (N), Dtyp, No_Sliding => True);
  
-             Apply_Predicate_Check (Expression (N), Dtyp);
- 
              if Nkind (Expression (N)) = N_Raise_Constraint_Error then
                 Rewrite (N, New_Copy (Expression (N)));
                 Set_Etype (N, PtrT);
--- 4823,4828 ----
diff -Nrcpad gcc-12.3.0/gcc/ada/exp_ch6.adb gcc-12.4.0/gcc/ada/exp_ch6.adb
*** gcc-12.3.0/gcc/ada/exp_ch6.adb	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/exp_ch6.adb	Thu Jun 20 08:08:06 2024
*************** package body Exp_Ch6 is
*** 630,636 ****
  
        --  Create the actual which is a pointer to the current activation chain
  
!       if No (Chain) then
           Chain_Actual :=
             Make_Attribute_Reference (Loc,
               Prefix         => Make_Identifier (Loc, Name_uChain),
--- 630,639 ----
  
        --  Create the actual which is a pointer to the current activation chain
  
!       if Restriction_Active (No_Task_Hierarchy) then
!          Chain_Actual := Make_Null (Loc);
! 
!       elsif No (Chain) then
           Chain_Actual :=
             Make_Attribute_Reference (Loc,
               Prefix         => Make_Identifier (Loc, Name_uChain),
diff -Nrcpad gcc-12.3.0/gcc/ada/exp_ch7.adb gcc-12.4.0/gcc/ada/exp_ch7.adb
*** gcc-12.3.0/gcc/ada/exp_ch7.adb	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/exp_ch7.adb	Thu Jun 20 08:08:06 2024
*************** package body Exp_Ch7 is
*** 796,801 ****
--- 796,802 ----
        Desig_Typ : Entity_Id;
        FM_Id     : Entity_Id;
        Priv_View : Entity_Id;
+       Scop      : Entity_Id;
        Unit_Decl : Node_Id;
        Unit_Id   : Entity_Id;
  
*************** package body Exp_Ch7 is
*** 834,839 ****
--- 835,852 ----
           Desig_Typ := Priv_View;
        end if;
  
+       --  For a designated type not declared at library level, we cannot create
+       --  a finalization collection attached to an outer unit since this would
+       --  generate dangling references to the dynamic scope through access-to-
+       --  procedure values designating the local Finalize_Address primitive.
+ 
+       Scop := Enclosing_Dynamic_Scope (Desig_Typ);
+       if Scop /= Standard_Standard
+         and then Scope_Depth (Scop) > Scope_Depth (Unit_Id)
+       then
+          return;
+       end if;
+ 
        --  Determine whether the current semantic unit already has an anonymous
        --  master which services the designated type.
  
diff -Nrcpad gcc-12.3.0/gcc/ada/exp_util.adb gcc-12.4.0/gcc/ada/exp_util.adb
*** gcc-12.3.0/gcc/ada/exp_util.adb	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/exp_util.adb	Thu Jun 20 08:08:06 2024
*************** package body Exp_Util is
*** 859,864 ****
--- 859,874 ----
          Needs_Finalization (Desig_Typ)
            and then not No_Heap_Finalization (Ptr_Typ);
  
+       --  The allocation/deallocation of a controlled object must be associated
+       --  with an attachment to/detachment from a finalization master, but the
+       --  implementation cannot guarantee this property for every anonymous
+       --  access tyoe, see Build_Anonymous_Collection.
+ 
+       if Needs_Fin and then No (Finalization_Master (Ptr_Typ)) then
+          pragma Assert (Ekind (Ptr_Typ) = E_Anonymous_Access_Type);
+          Needs_Fin := False;
+       end if;
+ 
        if Needs_Fin then
  
           --  Do nothing if the access type may never allocate / deallocate
*************** package body Exp_Util is
*** 868,878 ****
              return;
           end if;
  
-          --  The allocation / deallocation of a controlled object must be
-          --  chained on / detached from a finalization master.
- 
-          pragma Assert (Present (Finalization_Master (Ptr_Typ)));
- 
        --  The only other kind of allocation / deallocation supported by this
        --  routine is on / from a subpool.
  
--- 878,883 ----
*************** package body Exp_Util is
*** 5861,5866 ****
--- 5866,5877 ----
  
        Utyp := Underlying_Type (Base_Type (Utyp));
  
+       --  Handle incomplete types
+ 
+       if No (Utyp) then
+          return Empty;
+       end if;
+ 
        --  Deal with untagged derivation of private views. If the parent is
        --  now known to be protected, the finalization routine is the one
        --  defined on the corresponding record of the ancestor (corresponding
diff -Nrcpad gcc-12.3.0/gcc/ada/gcc-interface/decl.cc gcc-12.4.0/gcc/ada/gcc-interface/decl.cc
*** gcc-12.3.0/gcc/ada/gcc-interface/decl.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/gcc-interface/decl.cc	Thu Jun 20 08:08:06 2024
*************** gnat_to_gnu_subprog_type (Entity_Id gnat
*** 6207,6212 ****
--- 6207,6218 ----
  
  	  if (debug_info_p)
  	    rest_of_record_type_compilation (gnu_cico_return_type);
+ 
+ 	  /* Declare it now since it will never be declared otherwise.  This
+ 	     is necessary to ensure that its subtrees are properly marked.  */
+ 	  create_type_decl (TYPE_NAME (gnu_cico_return_type),
+ 			    gnu_cico_return_type,
+ 			    true, debug_info_p, gnat_subprog);
  	}
  
        gnu_return_type = gnu_cico_return_type;
diff -Nrcpad gcc-12.3.0/gcc/ada/gnatbind.adb gcc-12.4.0/gcc/ada/gnatbind.adb
*** gcc-12.3.0/gcc/ada/gnatbind.adb	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/gnatbind.adb	Thu Jun 20 08:08:06 2024
*************** procedure Gnatbind is
*** 214,219 ****
--- 214,222 ----
           No_Specification_Of_Aspect      => False,
           --  Requires a parameter value, not a count
  
+          No_Task_Hierarchy_Implicit      => False,
+          --  A compiler implementation artifact, not a documented restriction
+ 
           No_Use_Of_Attribute             => False,
           --  Requires a parameter value, not a count
  
diff -Nrcpad gcc-12.3.0/gcc/ada/libgnat/s-rident.ads gcc-12.4.0/gcc/ada/libgnat/s-rident.ads
*** gcc-12.3.0/gcc/ada/libgnat/s-rident.ads	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/libgnat/s-rident.ads	Thu Jun 20 08:08:06 2024
*************** package System.Rident is
*** 106,112 ****
        No_Dispatching_Calls,                      -- GNAT
        No_Dynamic_Accessibility_Checks,           -- GNAT
        No_Dynamic_Attachment,                     -- Ada 2012 (RM E.7(10/3))
!       No_Dynamic_CPU_Assignment,                 -- Ada 202x (RM D.7(10/3))
        No_Dynamic_Priorities,                     -- (RM D.9(9))
        No_Enumeration_Maps,                       -- GNAT
        No_Entry_Calls_In_Elaboration_Code,        -- GNAT
--- 106,112 ----
        No_Dispatching_Calls,                      -- GNAT
        No_Dynamic_Accessibility_Checks,           -- GNAT
        No_Dynamic_Attachment,                     -- Ada 2012 (RM E.7(10/3))
!       No_Dynamic_CPU_Assignment,                 -- Ada 2022 (RM D.7(10/3))
        No_Dynamic_Priorities,                     -- (RM D.9(9))
        No_Enumeration_Maps,                       -- GNAT
        No_Entry_Calls_In_Elaboration_Code,        -- GNAT
*************** package System.Rident is
*** 150,157 ****
        No_Task_Attributes_Package,                -- GNAT
        No_Task_At_Interrupt_Priority,             -- GNAT
        No_Task_Hierarchy,                         -- (RM D.7(3), H.4(3))
!       No_Task_Termination,                       -- GNAT (Ravenscar)
!       No_Tasks_Unassigned_To_CPU,                -- Ada 202x (D.7(10.10/4))
        No_Tasking,                                -- GNAT
        No_Terminate_Alternatives,                 -- (RM D.7(6))
        No_Unchecked_Access,                       -- (RM H.4(18))
--- 150,158 ----
        No_Task_Attributes_Package,                -- GNAT
        No_Task_At_Interrupt_Priority,             -- GNAT
        No_Task_Hierarchy,                         -- (RM D.7(3), H.4(3))
!       No_Task_Hierarchy_Implicit,                -- GNAT
!       No_Task_Termination,                       -- Ada 2005 (D.7(15.1/2))
!       No_Tasks_Unassigned_To_CPU,                -- Ada 2022 (D.7(10.10/4))
        No_Tasking,                                -- GNAT
        No_Terminate_Alternatives,                 -- (RM D.7(6))
        No_Unchecked_Access,                       -- (RM H.4(18))
diff -Nrcpad gcc-12.3.0/gcc/ada/restrict.adb gcc-12.4.0/gcc/ada/restrict.adb
*** gcc-12.3.0/gcc/ada/restrict.adb	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/restrict.adb	Thu Jun 20 08:08:06 2024
*************** package body Restrict is
*** 886,892 ****
           declare
              S : constant String := Restriction_Id'Image (J);
           begin
!             if S = Name_Buffer (1 .. Name_Len) then
                 return J;
              end if;
           end;
--- 886,895 ----
           declare
              S : constant String := Restriction_Id'Image (J);
           begin
!             if S = Name_Buffer (1 .. Name_Len)
!               --  users cannot name the N_T_H_Implicit restriction
!               and then J /= No_Task_Hierarchy_Implicit
!             then
                 return J;
              end if;
           end;
*************** package body Restrict is
*** 1093,1099 ****
  
     function Restriction_Active (R : All_Restrictions) return Boolean is
     begin
!       return Restrictions.Set (R) and then not Restriction_Warnings (R);
     end Restriction_Active;
  
     --------------------------------
--- 1096,1107 ----
  
     function Restriction_Active (R : All_Restrictions) return Boolean is
     begin
!       if Restrictions.Set (R) and then not Restriction_Warnings (R) then
!          return True;
!       else
!          return R = No_Task_Hierarchy
!            and then Restriction_Active (No_Task_Hierarchy_Implicit);
!       end if;
     end Restriction_Active;
  
     --------------------------------
diff -Nrcpad gcc-12.3.0/gcc/ada/sem_prag.adb gcc-12.4.0/gcc/ada/sem_prag.adb
*** gcc-12.3.0/gcc/ada/sem_prag.adb	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/sem_prag.adb	Thu Jun 20 08:08:06 2024
*************** package body Sem_Prag is
*** 21102,21107 ****
--- 21102,21126 ----
                 if Partition_Elaboration_Policy_Sloc /= System_Location then
                    Partition_Elaboration_Policy_Sloc := Loc;
                 end if;
+ 
+                if PEP_Val = Name_Sequential
+                  and then not Restriction_Active (No_Task_Hierarchy)
+                then
+                   --  RM H.6(6) guarantees that No_Task_Hierarchy will be
+                   --  set eventually, so take advantage of that knowledge now.
+                   --  But we have to do this in a tricky way. If we simply
+                   --  set the No_Task_Hierarchy restriction here, then the
+                   --  assumption that the restriction will be set eventually
+                   --  becomes a self-fulfilling prophecy; the binder can
+                   --  then mistakenly conclude that the H.6(6) rule is
+                   --  satisified in cases where the post-compilation check
+                   --  should fail. So we invent a new restriction,
+                   --  No_Task_Hierarchy_Implicit, which is treated specially
+                   --  in the function Restriction_Active.
+ 
+                   Set_Restriction (No_Task_Hierarchy_Implicit, N);
+                   pragma Assert (Restriction_Active (No_Task_Hierarchy));
+                end if;
              end if;
           end PEP;
  
diff -Nrcpad gcc-12.3.0/gcc/ada/sem_res.adb gcc-12.4.0/gcc/ada/sem_res.adb
*** gcc-12.3.0/gcc/ada/sem_res.adb	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/sem_res.adb	Thu Jun 20 08:08:06 2024
*************** package body Sem_Res is
*** 5691,5709 ****
                 Set_Is_Dynamic_Coextension (N, False);
                 Set_Is_Static_Coextension  (N, False);
  
!                --  Anonymous access-to-controlled objects are not finalized on
!                --  time because this involves run-time ownership and currently
!                --  this property is not available. In rare cases the object may
!                --  not be finalized at all. Warn on potential issues involving
!                --  anonymous access-to-controlled objects.
  
                 if Ekind (Typ) = E_Anonymous_Access_Type
                   and then Is_Controlled_Active (Desig_T)
                 then
                    Error_Msg_N
!                     ("??object designated by anonymous access object might "
                       & "not be finalized until its enclosing library unit "
!                      & "goes out of scope", N);
                    Error_Msg_N ("\use named access type instead", N);
                 end if;
              end if;
--- 5691,5709 ----
                 Set_Is_Dynamic_Coextension (N, False);
                 Set_Is_Static_Coextension  (N, False);
  
!                --  Objects allocated through anonymous access types are not
!                --  finalized on time because this involves run-time ownership
!                --  and currently this property is not available. In rare cases
!                --  the object might not be finalized at all. Warn on potential
!                --  issues involving anonymous access-to-controlled types.
  
                 if Ekind (Typ) = E_Anonymous_Access_Type
                   and then Is_Controlled_Active (Desig_T)
                 then
                    Error_Msg_N
!                     ("??object designated by anonymous access value might "
                       & "not be finalized until its enclosing library unit "
!                      & "goes out of scope, or not be finalized at all", N);
                    Error_Msg_N ("\use named access type instead", N);
                 end if;
              end if;
diff -Nrcpad gcc-12.3.0/gcc/analyzer/ChangeLog gcc-12.4.0/gcc/analyzer/ChangeLog
*** gcc-12.3.0/gcc/analyzer/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/analyzer/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/asan.cc gcc-12.4.0/gcc/asan.cc
*** gcc-12.3.0/gcc/asan.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/asan.cc	Thu Jun 20 08:08:06 2024
*************** asan_emit_stack_protection (rtx base, rt
*** 1869,1887 ****
      }
    str_cst = asan_pp_string (&asan_pp);
  
    /* Emit the prologue sequence.  */
    if (asan_frame_size > 32 && asan_frame_size <= 65536 && pbase
        && param_asan_use_after_return)
      {
        use_after_return_class = floor_log2 (asan_frame_size - 1) - 5;
        /* __asan_stack_malloc_N guarantees alignment
  	 N < 6 ? (64 << N) : 4096 bytes.  */
        if (alignb > (use_after_return_class < 6
  		    ? (64U << use_after_return_class) : 4096U))
  	use_after_return_class = -1;
!       else if (alignb > ASAN_RED_ZONE_SIZE && (asan_frame_size & (alignb - 1)))
! 	base_align_bias = ((asan_frame_size + alignb - 1)
! 			   & ~(alignb - HOST_WIDE_INT_1)) - asan_frame_size;
      }
  
    /* Align base if target is STRICT_ALIGNMENT.  */
--- 1869,1907 ----
      }
    str_cst = asan_pp_string (&asan_pp);
  
+   gcc_checking_assert (offsets[0] == (crtl->stack_protect_guard
+ 				      ? -ASAN_RED_ZONE_SIZE : 0));
    /* Emit the prologue sequence.  */
    if (asan_frame_size > 32 && asan_frame_size <= 65536 && pbase
        && param_asan_use_after_return)
      {
+       HOST_WIDE_INT adjusted_frame_size = asan_frame_size;
+       /* The stack protector guard is allocated at the top of the frame
+ 	 and cfgexpand.cc then uses align_frame_offset (ASAN_RED_ZONE_SIZE);
+ 	 while in that case we can still use asan_frame_size, we need to take
+ 	 that into account when computing base_align_bias.  */
+       if (alignb > ASAN_RED_ZONE_SIZE && crtl->stack_protect_guard)
+ 	adjusted_frame_size += ASAN_RED_ZONE_SIZE;
        use_after_return_class = floor_log2 (asan_frame_size - 1) - 5;
        /* __asan_stack_malloc_N guarantees alignment
  	 N < 6 ? (64 << N) : 4096 bytes.  */
        if (alignb > (use_after_return_class < 6
  		    ? (64U << use_after_return_class) : 4096U))
  	use_after_return_class = -1;
!       else if (alignb > ASAN_RED_ZONE_SIZE
! 	       && (adjusted_frame_size & (alignb - 1)))
! 	{
! 	  base_align_bias
! 	    = ((adjusted_frame_size + alignb - 1)
! 	       & ~(alignb - HOST_WIDE_INT_1)) - adjusted_frame_size;
! 	  use_after_return_class
! 	    = floor_log2 (asan_frame_size + base_align_bias - 1) - 5;
! 	  if (use_after_return_class > 10)
! 	    {
! 	      base_align_bias = 0;
! 	      use_after_return_class = -1;
! 	    }
! 	}
      }
  
    /* Align base if target is STRICT_ALIGNMENT.  */
*************** asan_protect_global (tree decl, bool ign
*** 2251,2256 ****
--- 2271,2278 ----
        || (DECL_SECTION_NAME (decl) != NULL
  	  && !symtab_node::get (decl)->implicit_section
  	  && !section_sanitized_p (DECL_SECTION_NAME (decl)))
+       /* Don't protect variables in non-generic address-space.  */
+       || !ADDR_SPACE_GENERIC_P (TYPE_ADDR_SPACE (TREE_TYPE (decl)))
        || DECL_SIZE (decl) == 0
        || ASAN_RED_ZONE_SIZE * BITS_PER_UNIT > MAX_OFILE_ALIGNMENT
        || TREE_CODE (DECL_SIZE_UNIT (decl)) != INTEGER_CST
*************** instrument_derefs (gimple_stmt_iterator
*** 2710,2715 ****
--- 2732,2741 ----
    if (VAR_P (inner) && DECL_HARD_REGISTER (inner))
      return;
  
+   /* Accesses to non-generic address-spaces should not be instrumented.  */
+   if (!ADDR_SPACE_GENERIC_P (TYPE_ADDR_SPACE (TREE_TYPE (inner))))
+     return;
+ 
    poly_int64 decl_size;
    if ((VAR_P (inner) || TREE_CODE (inner) == RESULT_DECL)
        && offset == NULL_TREE
*************** asan_expand_mark_ifn (gimple_stmt_iterat
*** 3746,3754 ****
      }
    tree len = gimple_call_arg (g, 2);
  
!   gcc_assert (tree_fits_shwi_p (len));
!   unsigned HOST_WIDE_INT size_in_bytes = tree_to_shwi (len);
!   gcc_assert (size_in_bytes);
  
    g = gimple_build_assign (make_ssa_name (pointer_sized_int_node),
  			   NOP_EXPR, base);
--- 3772,3778 ----
      }
    tree len = gimple_call_arg (g, 2);
  
!   gcc_assert (poly_int_tree_p (len));
  
    g = gimple_build_assign (make_ssa_name (pointer_sized_int_node),
  			   NOP_EXPR, base);
*************** asan_expand_mark_ifn (gimple_stmt_iterat
*** 3757,3765 ****
    tree base_addr = gimple_assign_lhs (g);
  
    /* Generate direct emission if size_in_bytes is small.  */
!   if (size_in_bytes
!       <= (unsigned)param_use_after_scope_direct_emission_threshold)
      {
        const unsigned HOST_WIDE_INT shadow_size
  	= shadow_mem_size (size_in_bytes);
        const unsigned int shadow_align
--- 3781,3790 ----
    tree base_addr = gimple_assign_lhs (g);
  
    /* Generate direct emission if size_in_bytes is small.  */
!   unsigned threshold = param_use_after_scope_direct_emission_threshold;
!   if (tree_fits_uhwi_p (len) && tree_to_uhwi (len) <= threshold)
      {
+       unsigned HOST_WIDE_INT size_in_bytes = tree_to_uhwi (len);
        const unsigned HOST_WIDE_INT shadow_size
  	= shadow_mem_size (size_in_bytes);
        const unsigned int shadow_align
diff -Nrcpad gcc-12.3.0/gcc/attribs.cc gcc-12.4.0/gcc/attribs.cc
*** gcc-12.3.0/gcc/attribs.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/attribs.cc	Thu Jun 20 08:08:06 2024
*************** static const struct attribute_spec empty
*** 109,123 ****
    { NULL, 0, 0, false, false, false, false, NULL, NULL }
  };
  
- /* Return base name of the attribute.  Ie '__attr__' is turned into 'attr'.
-    To avoid need for copying, we simply return length of the string.  */
- 
- static void
- extract_attribute_substring (struct substring *str)
- {
-   canonicalize_attr_name (str->str, str->length);
- }
- 
  /* Insert an array of attributes ATTRIBUTES into a namespace.  This
     array must be NULL terminated.  NS is the name of attribute
     namespace.  IGNORED_P is true iff all unknown attributes in this
--- 109,114 ----
*************** lookup_scoped_attribute_spec (const_tree
*** 409,415 ****
  
    attr.str = IDENTIFIER_POINTER (name);
    attr.length = IDENTIFIER_LENGTH (name);
-   extract_attribute_substring (&attr);
    return attrs->attribute_hash->find_with_hash (&attr,
  						substring_hash (attr.str,
  							       	attr.length));
--- 400,405 ----
*************** diag_attr_exclusions (tree last_decl, tr
*** 489,495 ****
    if (DECL_P (node))
      {
        attrs[0] = DECL_ATTRIBUTES (node);
!       attrs[1] = TYPE_ATTRIBUTES (TREE_TYPE (node));
      }
    else
      {
--- 479,490 ----
    if (DECL_P (node))
      {
        attrs[0] = DECL_ATTRIBUTES (node);
!       if (TREE_TYPE (node))
! 	attrs[1] = TYPE_ATTRIBUTES (TREE_TYPE (node));
!       else
! 	/* TREE_TYPE can be NULL e.g. while processing attributes on
! 	   enumerators.  */
! 	attrs[1] = NULL_TREE;
      }
    else
      {
*************** attribute_ignored_p (tree attr)
*** 578,586 ****
      return false;
    if (tree ns = get_attribute_namespace (attr))
      {
-       if (attr_namespace_ignored_p (ns))
- 	return true;
        const attribute_spec *as = lookup_attribute_spec (TREE_PURPOSE (attr));
        if (as && as->max_length == -2)
  	return true;
      }
--- 573,581 ----
      return false;
    if (tree ns = get_attribute_namespace (attr))
      {
        const attribute_spec *as = lookup_attribute_spec (TREE_PURPOSE (attr));
+       if (as == NULL && attr_namespace_ignored_p (ns))
+ 	return true;
        if (as && as->max_length == -2)
  	return true;
      }
*************** decl_attributes (tree *node, tree attrib
*** 851,857 ****
  	    }
  	}
  
!       if (no_add_attrs)
  	continue;
  
        if (spec->handler != NULL)
--- 846,855 ----
  	    }
  	}
  
!       if (no_add_attrs
! 	  /* Don't add attributes registered just for -Wno-attributes=foo::bar
! 	     purposes.  */
! 	  || attribute_ignored_p (attr))
  	continue;
  
        if (spec->handler != NULL)
diff -Nrcpad gcc-12.3.0/gcc/bb-reorder.cc gcc-12.4.0/gcc/bb-reorder.cc
*** gcc-12.3.0/gcc/bb-reorder.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/bb-reorder.cc	Thu Jun 20 08:08:06 2024
*************** fix_crossing_unconditional_branches (voi
*** 2266,2272 ****
  	  /* Make sure the jump is not already an indirect or table jump.  */
  
  	  if (!computed_jump_p (last_insn)
! 	      && !tablejump_p (last_insn, NULL, NULL))
  	    {
  	      /* We have found a "crossing" unconditional branch.  Now
  		 we must convert it to an indirect jump.  First create
--- 2266,2273 ----
  	  /* Make sure the jump is not already an indirect or table jump.  */
  
  	  if (!computed_jump_p (last_insn)
! 	      && !tablejump_p (last_insn, NULL, NULL)
! 	      && asm_noperands (PATTERN (last_insn)) < 0)
  	    {
  	      /* We have found a "crossing" unconditional branch.  Now
  		 we must convert it to an indirect jump.  First create
diff -Nrcpad gcc-12.3.0/gcc/bitmap.cc gcc-12.4.0/gcc/bitmap.cc
*** gcc-12.3.0/gcc/bitmap.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/bitmap.cc	Thu Jun 20 08:08:06 2024
*************** bitmap_hash (const_bitmap head)
*** 2673,2679 ****
        for (ix = 0; ix != BITMAP_ELEMENT_WORDS; ix++)
  	hash ^= ptr->bits[ix];
      }
!   return (hashval_t)hash;
  }
  
  
--- 2673,2679 ----
        for (ix = 0; ix != BITMAP_ELEMENT_WORDS; ix++)
  	hash ^= ptr->bits[ix];
      }
!   return iterative_hash (&hash, sizeof (hash), 0);
  }
  
  
diff -Nrcpad gcc-12.3.0/gcc/builtins.cc gcc-12.4.0/gcc/builtins.cc
*** gcc-12.3.0/gcc/builtins.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/builtins.cc	Thu Jun 20 08:08:06 2024
*************** fold_builtin_arith_overflow (location_t
*** 9180,9186 ****
        tree ctype = build_complex_type (type);
        tree call = build_call_expr_internal_loc (loc, ifn, ctype, 2,
  						arg0, arg1);
!       tree tgt = save_expr (call);
        intres = build1_loc (loc, REALPART_EXPR, type, tgt);
        ovfres = build1_loc (loc, IMAGPART_EXPR, type, tgt);
        ovfres = fold_convert_loc (loc, boolean_type_node, ovfres);
--- 9180,9200 ----
        tree ctype = build_complex_type (type);
        tree call = build_call_expr_internal_loc (loc, ifn, ctype, 2,
  						arg0, arg1);
!       tree tgt;
!       if (ovf_only)
! 	{
! 	  tgt = call;
! 	  intres = NULL_TREE;
! 	}
!       else
! 	{
! 	  /* Force SAVE_EXPR even for calls which satisfy tree_invariant_p_1,
! 	     as while the call itself is const, the REALPART_EXPR store is
! 	     certainly not.  And in any case, we want just one call,
! 	     not multiple and trying to CSE them later.  */
! 	  TREE_SIDE_EFFECTS (call) = 1;
! 	  tgt = save_expr (call);
! 	}
        intres = build1_loc (loc, REALPART_EXPR, type, tgt);
        ovfres = build1_loc (loc, IMAGPART_EXPR, type, tgt);
        ovfres = fold_convert_loc (loc, boolean_type_node, ovfres);
diff -Nrcpad gcc-12.3.0/gcc/c/ChangeLog gcc-12.4.0/gcc/c/ChangeLog
*** gcc-12.3.0/gcc/c/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/c/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,17 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-06-06  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c/114493
+ 	* c-decl.cc (c_fixup_may_alias): New function.
+ 	(finish_struct): Call it if "may_alias" attribute is
+ 	specified.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/c/c-decl.cc gcc-12.4.0/gcc/c/c-decl.cc
*** gcc-12.3.0/gcc/c/c-decl.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/c/c-decl.cc	Thu Jun 20 08:08:06 2024
*************** finish_incomplete_vars (tree incomplete_
*** 8699,8704 ****
--- 8699,8715 ----
      }
  }
  
+ /* TYPE is a struct or union that we're applying may_alias to after the body is
+    parsed.  Fixup any POINTER_TO types.  */
+ 
+ static void
+ c_fixup_may_alias (tree type)
+ {
+   for (tree t = TYPE_POINTER_TO (type); t; t = TYPE_NEXT_PTR_TO (t))
+     for (tree v = TYPE_MAIN_VARIANT (t); v; v = TYPE_NEXT_VARIANT (v))
+       TYPE_REF_CAN_ALIAS_ALL (v) = true;
+ }
+ 
  /* Fill in the fields of a RECORD_TYPE or UNION_TYPE node, T.
     LOC is the location of the RECORD_TYPE or UNION_TYPE's definition.
     FIELDLIST is a chain of FIELD_DECL nodes for the fields.
*************** finish_struct (location_t loc, tree t, t
*** 8973,8978 ****
--- 8984,8993 ----
        warning_at (loc, 0, "union cannot be made transparent");
      }
  
+   if (lookup_attribute ("may_alias", TYPE_ATTRIBUTES (t)))
+     for (x = TYPE_MAIN_VARIANT (t); x; x = TYPE_NEXT_VARIANT (x))
+       c_fixup_may_alias (x);
+ 
    tree incomplete_vars = C_TYPE_INCOMPLETE_VARS (TYPE_MAIN_VARIANT (t));
    for (x = TYPE_MAIN_VARIANT (t); x; x = TYPE_NEXT_VARIANT (x))
      {
diff -Nrcpad gcc-12.3.0/gcc/c-family/ChangeLog gcc-12.4.0/gcc/c-family/ChangeLog
*** gcc-12.3.0/gcc/c-family/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/c-family/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,71 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-22  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c/114007
+ 	* c-lex.cc (c_common_has_attribute): Parse 2 CPP_COLONs with
+ 	the first one with COLON_SCOPE flag the same as CPP_SCOPE but
+ 	ensure 0 is returned then.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c/113262
+ 	* c-attribs.cc (handle_copy_attribute): Don't use
+ 	DECL_SOURCE_LOCATION (decl) if decl is not DECL_P, use input_location
+ 	instead.  Formatting fixes.
+ 
+ 2024-05-08  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	Backported from master:
+ 	2024-05-07  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	PR c++/89224
+ 	* c-common.cc (convert_vector_to_array_for_subscript): Call build_qualified_type
+ 	for the inner type.
+ 
+ 2024-01-27  Lewis Hyatt  <lhyatt@gmail.com>
+ 
+ 	PR preprocessor/105608
+ 	* c-pch.cc (c_common_read_pch): Start a new line map before asking
+ 	libcpp to restore macros defined prior to reading the PCH, instead
+ 	of afterward.
+ 
+ 2023-12-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-08-31  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/111253
+ 	* c-pretty-print.cc (c_pretty_printer::primary_expression):
+ 	Only dump gimple_assign_single_p SSA def RHS.
+ 
+ 2023-05-19  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-05-15  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	* c-cppbuiltin.cc (c_cpp_builtins): Predefine __cpp_auto_cast
+ 	for C++23.
+ 
+ 2023-05-09  Martin Uecker  <uecker@tugraz.at>
+ 
+ 	Backported from master:
+ 	2023-02-18  Martin Uecker  <uecker@tugraz.at>
+ 
+ 	PR c/105660
+ 	* c-attribs.cc (append_access_attr): Use order of arguments when
+ 	construction string.
+ 	(append_access_attr_idxs): Rename and make static.
+ 	* c-warn.cc (warn_parm_array_mismatch): Add assertion.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/c-family/c-attribs.cc gcc-12.4.0/gcc/c-family/c-attribs.cc
*** gcc-12.3.0/gcc/c-family/c-attribs.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/c-family/c-attribs.cc	Thu Jun 20 08:08:06 2024
*************** handle_copy_attribute (tree *node, tree
*** 2820,2832 ****
    if (ref == error_mark_node)
      return NULL_TREE;
  
    if (TREE_CODE (ref) == STRING_CST)
      {
        /* Explicitly handle this case since using a string literal
  	 as an argument is a likely mistake.  */
!       error_at (DECL_SOURCE_LOCATION (decl),
! 		"%qE attribute argument cannot be a string",
! 		name);
        return NULL_TREE;
      }
  
--- 2820,2833 ----
    if (ref == error_mark_node)
      return NULL_TREE;
  
+   location_t loc = input_location;
+   if (DECL_P (decl))
+     loc = DECL_SOURCE_LOCATION (decl);
    if (TREE_CODE (ref) == STRING_CST)
      {
        /* Explicitly handle this case since using a string literal
  	 as an argument is a likely mistake.  */
!       error_at (loc, "%qE attribute argument cannot be a string", name);
        return NULL_TREE;
      }
  
*************** handle_copy_attribute (tree *node, tree
*** 2837,2846 ****
        /* Similar to the string case, since some function attributes
  	 accept literal numbers as arguments (e.g., alloc_size or
  	 nonnull) using one here is a likely mistake.  */
!       error_at (DECL_SOURCE_LOCATION (decl),
! 		"%qE attribute argument cannot be a constant arithmetic "
! 		"expression",
! 		name);
        return NULL_TREE;
      }
  
--- 2838,2845 ----
        /* Similar to the string case, since some function attributes
  	 accept literal numbers as arguments (e.g., alloc_size or
  	 nonnull) using one here is a likely mistake.  */
!       error_at (loc, "%qE attribute argument cannot be a constant arithmetic "
! 		"expression", name);
        return NULL_TREE;
      }
  
*************** handle_copy_attribute (tree *node, tree
*** 2848,2859 ****
      {
        /* Another possible mistake (but indirect self-references aren't
  	 and diagnosed and shouldn't be).  */
!       if (warning_at (DECL_SOURCE_LOCATION (decl), OPT_Wattributes,
  		      "%qE attribute ignored on a redeclaration "
! 		      "of the referenced symbol",
! 		      name))
! 	inform (DECL_SOURCE_LOCATION (node[1]),
! 		"previous declaration here");
        return NULL_TREE;
      }
  
--- 2847,2857 ----
      {
        /* Another possible mistake (but indirect self-references aren't
  	 and diagnosed and shouldn't be).  */
!       if (warning_at (loc, OPT_Wattributes,
  		      "%qE attribute ignored on a redeclaration "
! 		      "of the referenced symbol", name)
! 	  && DECL_P (node[1]))
! 	inform (DECL_SOURCE_LOCATION (node[1]), "previous declaration here");
        return NULL_TREE;
      }
  
*************** handle_copy_attribute (tree *node, tree
*** 2873,2879 ****
  	ref = TREE_OPERAND (ref, 1);
        else
  	break;
!     } while (!DECL_P (ref));
  
    /* For object pointer expressions, consider those to be requests
       to copy from their type, such as in:
--- 2871,2878 ----
  	ref = TREE_OPERAND (ref, 1);
        else
  	break;
!     }
!   while (!DECL_P (ref));
  
    /* For object pointer expressions, consider those to be requests
       to copy from their type, such as in:
*************** handle_copy_attribute (tree *node, tree
*** 2905,2912 ****
  	     to a variable, or variable attributes to a function.  */
  	  if (warning (OPT_Wattributes,
  		       "%qE attribute ignored on a declaration of "
! 		       "a different kind than referenced symbol",
! 		       name)
  	      && DECL_P (ref))
  	    inform (DECL_SOURCE_LOCATION (ref),
  		    "symbol %qD referenced by %qD declared here", ref, decl);
--- 2904,2910 ----
  	     to a variable, or variable attributes to a function.  */
  	  if (warning (OPT_Wattributes,
  		       "%qE attribute ignored on a declaration of "
! 		       "a different kind than referenced symbol", name)
  	      && DECL_P (ref))
  	    inform (DECL_SOURCE_LOCATION (ref),
  		    "symbol %qD referenced by %qD declared here", ref, decl);
*************** handle_copy_attribute (tree *node, tree
*** 2956,2964 ****
      }
    else if (!TYPE_P (decl))
      {
!       error_at (DECL_SOURCE_LOCATION (decl),
! 		"%qE attribute must apply to a declaration",
! 		name);
        return NULL_TREE;
      }
  
--- 2954,2960 ----
      }
    else if (!TYPE_P (decl))
      {
!       error_at (loc, "%qE attribute must apply to a declaration", name);
        return NULL_TREE;
      }
  
*************** append_access_attr (tree node[3], tree a
*** 4624,4645 ****
    rdwr_map cur_idxs;
    init_attr_rdwr_indices (&cur_idxs, attrs);
  
    std::string spec;
!   for (auto it = new_idxs.begin (); it != new_idxs.end (); ++it)
      {
!       const auto &newaxsref = *it;
  
        /* The map has two equal entries for each pointer argument that
  	 has an associated size argument.  Process just the entry for
  	 the former.  */
!       if ((unsigned)newaxsref.first != newaxsref.second.ptrarg)
  	continue;
  
!       const attr_access* const cura = cur_idxs.get (newaxsref.first);
        if (!cura)
  	{
  	  /* The new attribute needs to be added.  */
! 	  tree str = newaxsref.second.to_internal_string ();
  	  spec += TREE_STRING_POINTER (str);
  	  continue;
  	}
--- 4620,4646 ----
    rdwr_map cur_idxs;
    init_attr_rdwr_indices (&cur_idxs, attrs);
  
+   tree args = TYPE_ARG_TYPES (node[0]);
+   int argpos = 0;
    std::string spec;
!   for (tree arg = args; arg; arg = TREE_CHAIN (arg), argpos++)
      {
!       const attr_access* const newa = new_idxs.get (argpos);
! 
!       if (!newa)
! 	continue;
  
        /* The map has two equal entries for each pointer argument that
  	 has an associated size argument.  Process just the entry for
  	 the former.  */
!       if ((unsigned)argpos != newa->ptrarg)
  	continue;
  
!       const attr_access* const cura = cur_idxs.get (argpos);
        if (!cura)
  	{
  	  /* The new attribute needs to be added.  */
! 	  tree str = newa->to_internal_string ();
  	  spec += TREE_STRING_POINTER (str);
  	  continue;
  	}
*************** append_access_attr (tree node[3], tree a
*** 4647,4653 ****
        /* The new access spec refers to an array/pointer argument for
  	 which an access spec already exists.  Check and diagnose any
  	 conflicts.  If no conflicts are found, merge the two.  */
-       const attr_access* const newa = &newaxsref.second;
  
        if (!attrstr)
  	{
--- 4648,4653 ----
*************** append_access_attr (tree node[3], tree a
*** 4782,4788 ****
  	continue;
  
        /* Merge the CURA and NEWA.  */
!       attr_access merged = newaxsref.second;
  
        /* VLA seen in a declaration takes precedence.  */
        if (cura->minsize == HOST_WIDE_INT_M1U)
--- 4782,4788 ----
  	continue;
  
        /* Merge the CURA and NEWA.  */
!       attr_access merged = *newa;
  
        /* VLA seen in a declaration takes precedence.  */
        if (cura->minsize == HOST_WIDE_INT_M1U)
*************** append_access_attr (tree node[3], tree a
*** 4808,4816 ****
  
  /* Convenience wrapper for the above.  */
  
! tree
! append_access_attr (tree node[3], tree attrs, const char *attrstr,
! 		    char code, HOST_WIDE_INT idxs[2])
  {
    char attrspec[80];
    int n = sprintf (attrspec, "%c%u", code, (unsigned) idxs[0] - 1);
--- 4808,4816 ----
  
  /* Convenience wrapper for the above.  */
  
! static tree
! append_access_attr_idxs (tree node[3], tree attrs, const char *attrstr,
! 			 char code, HOST_WIDE_INT idxs[2])
  {
    char attrspec[80];
    int n = sprintf (attrspec, "%c%u", code, (unsigned) idxs[0] - 1);
*************** handle_access_attribute (tree node[3], t
*** 5101,5107 ****
       attributes specified on previous declarations of the same type
       and if not, concatenate the two.  */
    const char code = attr_access::mode_chars[mode];
!   tree new_attrs = append_access_attr (node, attrs, attrstr, code, idxs);
    if (!new_attrs)
      return NULL_TREE;
  
--- 5101,5107 ----
       attributes specified on previous declarations of the same type
       and if not, concatenate the two.  */
    const char code = attr_access::mode_chars[mode];
!   tree new_attrs = append_access_attr_idxs (node, attrs, attrstr, code, idxs);
    if (!new_attrs)
      return NULL_TREE;
  
*************** handle_access_attribute (tree node[3], t
*** 5114,5120 ****
      {
        /* Repeat for the previously declared type.  */
        attrs = TYPE_ATTRIBUTES (TREE_TYPE (node[1]));
!       new_attrs = append_access_attr (node, attrs, attrstr, code, idxs);
        if (!new_attrs)
  	return NULL_TREE;
  
--- 5114,5120 ----
      {
        /* Repeat for the previously declared type.  */
        attrs = TYPE_ATTRIBUTES (TREE_TYPE (node[1]));
!       new_attrs = append_access_attr_idxs (node, attrs, attrstr, code, idxs);
        if (!new_attrs)
  	return NULL_TREE;
  
diff -Nrcpad gcc-12.3.0/gcc/c-family/c-common.cc gcc-12.4.0/gcc/c-family/c-common.cc
*** gcc-12.3.0/gcc/c-family/c-common.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/c-family/c-common.cc	Thu Jun 20 08:08:06 2024
*************** convert_vector_to_array_for_subscript (l
*** 8511,8516 ****
--- 8511,8517 ----
    if (gnu_vector_type_p (TREE_TYPE (*vecp)))
      {
        tree type = TREE_TYPE (*vecp);
+       tree newitype;
  
        ret = !lvalue_p (*vecp);
  
*************** convert_vector_to_array_for_subscript (l
*** 8525,8532 ****
  	 for function parameters.  */
        c_common_mark_addressable_vec (*vecp);
  
        *vecp = build1 (VIEW_CONVERT_EXPR,
! 		      build_array_type_nelts (TREE_TYPE (type),
  					      TYPE_VECTOR_SUBPARTS (type)),
  		      *vecp);
      }
--- 8526,8537 ----
  	 for function parameters.  */
        c_common_mark_addressable_vec (*vecp);
  
+       /* Make sure qualifiers are copied from the vector type to the new element
+ 	 of the array type.  */
+       newitype = build_qualified_type (TREE_TYPE (type), TYPE_QUALS (type));
+ 
        *vecp = build1 (VIEW_CONVERT_EXPR,
! 		      build_array_type_nelts (newitype,
  					      TYPE_VECTOR_SUBPARTS (type)),
  		      *vecp);
      }
diff -Nrcpad gcc-12.3.0/gcc/c-family/c-cppbuiltin.cc gcc-12.4.0/gcc/c-family/c-cppbuiltin.cc
*** gcc-12.3.0/gcc/c-family/c-cppbuiltin.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/c-family/c-cppbuiltin.cc	Thu Jun 20 08:08:06 2024
*************** c_cpp_builtins (cpp_reader *pfile)
*** 1080,1085 ****
--- 1080,1086 ----
  	  cpp_define (pfile, "__cpp_if_consteval=202106L");
  	  cpp_define (pfile, "__cpp_constexpr=202110L");
  	  cpp_define (pfile, "__cpp_multidimensional_subscript=202110L");
+ 	  cpp_define (pfile, "__cpp_auto_cast=202110L");
  	}
        if (flag_concepts)
          {
diff -Nrcpad gcc-12.3.0/gcc/c-family/c-lex.cc gcc-12.4.0/gcc/c-family/c-lex.cc
*** gcc-12.3.0/gcc/c-family/c-lex.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/c-family/c-lex.cc	Thu Jun 20 08:08:06 2024
*************** c_common_has_attribute (cpp_reader *pfil
*** 327,335 ****
        do
  	nxt_token = cpp_peek_token (pfile, idx++);
        while (nxt_token->type == CPP_PADDING);
!       if (nxt_token->type == CPP_SCOPE)
  	{
- 	  have_scope = true;
  	  get_token_no_padding (pfile); // Eat scope.
  	  nxt_token = get_token_no_padding (pfile);
  	  if (nxt_token->type == CPP_NAME)
--- 327,354 ----
        do
  	nxt_token = cpp_peek_token (pfile, idx++);
        while (nxt_token->type == CPP_PADDING);
!       if (!c_dialect_cxx ()
! 	  && nxt_token->type == CPP_COLON
! 	  && (nxt_token->flags & COLON_SCOPE) != 0)
! 	{
! 	  const cpp_token *prev_token = nxt_token;
! 	  do
! 	    nxt_token = cpp_peek_token (pfile, idx++);
! 	  while (nxt_token->type == CPP_PADDING);
! 	  if (nxt_token->type == CPP_COLON)
! 	    {
! 	      /* __has_attribute (vendor::attr) in -std=c17 etc. modes.
! 		 :: isn't CPP_SCOPE but 2 CPP_COLON tokens, where the
! 		 first one should have COLON_SCOPE flag to distinguish
! 		 it from : :.  */
! 	      have_scope = true;
! 	      get_token_no_padding (pfile); // Eat first colon.
! 	    }
! 	  else
! 	    nxt_token = prev_token;
! 	}
!       if (nxt_token->type == CPP_SCOPE || have_scope)
  	{
  	  get_token_no_padding (pfile); // Eat scope.
  	  nxt_token = get_token_no_padding (pfile);
  	  if (nxt_token->type == CPP_NAME)
*************** c_common_has_attribute (cpp_reader *pfil
*** 359,364 ****
--- 378,392 ----
  			 "attribute identifier required after scope");
  	      attr_name = NULL_TREE;
  	    }
+ 	  if (have_scope)
+ 	    {
+ 	      /* The parser in this case won't be able to parse
+ 		 [[vendor::attr]], so ensure 0 is returned.  */
+ 	      result = 0;
+ 	      attr_name = NULL_TREE;
+ 	    }
+ 	  else
+ 	    have_scope = true;
  	}
        else
  	{
diff -Nrcpad gcc-12.3.0/gcc/c-family/c-pch.cc gcc-12.4.0/gcc/c-family/c-pch.cc
*** gcc-12.3.0/gcc/c-family/c-pch.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/c-family/c-pch.cc	Thu Jun 20 08:08:06 2024
*************** c_common_read_pch (cpp_reader *pfile, co
*** 342,347 ****
--- 342,349 ----
    gt_pch_restore (f);
    cpp_set_line_map (pfile, line_table);
    rebuild_location_adhoc_htab (line_table);
+   line_table->trace_includes = saved_trace_includes;
+   linemap_add (line_table, LC_ENTER, 0, saved_loc.file, saved_loc.line);
  
    timevar_push (TV_PCH_CPP_RESTORE);
    if (cpp_read_state (pfile, name, f, smd) != 0)
*************** c_common_read_pch (cpp_reader *pfile, co
*** 355,363 ****
  
    fclose (f);
  
-   line_table->trace_includes = saved_trace_includes;
-   linemap_add (line_table, LC_ENTER, 0, saved_loc.file, saved_loc.line);
- 
    /* Give the front end a chance to take action after a PCH file has
       been loaded.  */
    if (lang_post_pch_load)
--- 357,362 ----
diff -Nrcpad gcc-12.3.0/gcc/c-family/c-pretty-print.cc gcc-12.4.0/gcc/c-family/c-pretty-print.cc
*** gcc-12.3.0/gcc/c-family/c-pretty-print.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/c-family/c-pretty-print.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 33,38 ****
--- 33,41 ----
  #include "langhooks.h"
  #include "options.h"
  #include "internal-fn.h"
+ #include "function.h"
+ #include "basic-block.h"
+ #include "gimple.h"
  
  /* The pretty-printer code is primarily designed to closely follow
     (GNU) C and C++ grammars.  That is to be contrasted with spaghetti
*************** c_pretty_printer::primary_expression (tr
*** 1363,1374 ****
  	  else
  	    primary_expression (var);
  	}
!       else
  	{
  	  /* Print only the right side of the GIMPLE assignment.  */
  	  gimple *def_stmt = SSA_NAME_DEF_STMT (e);
  	  pp_gimple_stmt_1 (this, def_stmt, 0, TDF_RHS_ONLY);
  	}
        break;
  
      default:
--- 1366,1379 ----
  	  else
  	    primary_expression (var);
  	}
!       else if (gimple_assign_single_p (SSA_NAME_DEF_STMT (e)))
  	{
  	  /* Print only the right side of the GIMPLE assignment.  */
  	  gimple *def_stmt = SSA_NAME_DEF_STMT (e);
  	  pp_gimple_stmt_1 (this, def_stmt, 0, TDF_RHS_ONLY);
  	}
+       else
+ 	expression (e);
        break;
  
      default:
diff -Nrcpad gcc-12.3.0/gcc/c-family/c-warn.cc gcc-12.4.0/gcc/c-family/c-warn.cc
*** gcc-12.3.0/gcc/c-family/c-warn.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/c-family/c-warn.cc	Thu Jun 20 08:08:06 2024
*************** warn_parm_array_mismatch (location_t ori
*** 3628,3633 ****
--- 3628,3635 ----
        for (tree newvbl = newa->size, curvbl = cura->size; newvbl;
  	   newvbl = TREE_CHAIN (newvbl), curvbl = TREE_CHAIN (curvbl))
  	{
+ 	  gcc_assert (curvbl);
+ 
  	  tree newpos = TREE_PURPOSE (newvbl);
  	  tree curpos = TREE_PURPOSE (curvbl);
  
diff -Nrcpad gcc-12.3.0/gcc/cfgexpand.cc gcc-12.4.0/gcc/cfgexpand.cc
*** gcc-12.3.0/gcc/cfgexpand.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cfgexpand.cc	Thu Jun 20 08:08:06 2024
*************** visit_conflict (gimple *, tree op, tree,
*** 571,576 ****
--- 571,596 ----
    return false;
  }
  
+ /* Helper function for add_scope_conflicts_1.  For USE on
+    a stmt, if it is a SSA_NAME and in its SSA_NAME_DEF_STMT is known to be
+    based on some ADDR_EXPR, invoke VISIT on that ADDR_EXPR.  */
+ 
+ static inline void
+ add_scope_conflicts_2 (tree use, bitmap work,
+ 		       walk_stmt_load_store_addr_fn visit)
+ {
+   if (TREE_CODE (use) == SSA_NAME
+       && (POINTER_TYPE_P (TREE_TYPE (use))
+ 	  || INTEGRAL_TYPE_P (TREE_TYPE (use))))
+     {
+       gimple *g = SSA_NAME_DEF_STMT (use);
+       if (is_gimple_assign (g))
+ 	if (tree op = gimple_assign_rhs1 (g))
+ 	  if (TREE_CODE (op) == ADDR_EXPR)
+ 	    visit (g, TREE_OPERAND (op, 0), op, work);
+     }
+ }
+ 
  /* Helper routine for add_scope_conflicts, calculating the active partitions
     at the end of BB, leaving the result in WORK.  We're called to generate
     conflicts when FOR_CONFLICT is true, otherwise we're just tracking
*************** add_scope_conflicts_1 (basic_block bb, b
*** 583,588 ****
--- 603,610 ----
    edge_iterator ei;
    gimple_stmt_iterator gsi;
    walk_stmt_load_store_addr_fn visit;
+   use_operand_p use_p;
+   ssa_op_iter iter;
  
    bitmap_clear (work);
    FOR_EACH_EDGE (e, ei, bb->preds)
*************** add_scope_conflicts_1 (basic_block bb, b
*** 593,599 ****
--- 615,624 ----
    for (gsi = gsi_start_phis (bb); !gsi_end_p (gsi); gsi_next (&gsi))
      {
        gimple *stmt = gsi_stmt (gsi);
+       gphi *phi = as_a <gphi *> (stmt);
        walk_stmt_load_store_addr_ops (stmt, work, NULL, NULL, visit);
+       FOR_EACH_PHI_ARG (use_p, phi, iter, SSA_OP_USE)
+ 	add_scope_conflicts_2 (USE_FROM_PTR (use_p), work, visit);
      }
    for (gsi = gsi_after_labels (bb); !gsi_end_p (gsi); gsi_next (&gsi))
      {
*************** add_scope_conflicts_1 (basic_block bb, b
*** 613,620 ****
  	}
        else if (!is_gimple_debug (stmt))
  	{
! 	  if (for_conflict
! 	      && visit == visit_op)
  	    {
  	      /* If this is the first real instruction in this BB we need
  	         to add conflicts for everything live at this point now.
--- 638,644 ----
  	}
        else if (!is_gimple_debug (stmt))
  	{
! 	  if (for_conflict && visit == visit_op)
  	    {
  	      /* If this is the first real instruction in this BB we need
  	         to add conflicts for everything live at this point now.
*************** add_scope_conflicts_1 (basic_block bb, b
*** 634,639 ****
--- 658,665 ----
  	      visit = visit_conflict;
  	    }
  	  walk_stmt_load_store_addr_ops (stmt, work, visit, visit, visit);
+ 	  FOR_EACH_SSA_USE_OPERAND (use_p, stmt, iter, SSA_OP_USE)
+ 	    add_scope_conflicts_2 (USE_FROM_PTR (use_p), work, visit);
  	}
      }
  }
*************** expand_asm_stmt (gasm *stmt)
*** 3635,3641 ****
  		emit_insn (copy_insn (PATTERN (curr)));
  	      rtx_insn *copy = get_insns ();
  	      end_sequence ();
! 	      insert_insn_on_edge (copy, e);
  	    }
  	}
      }
--- 3661,3667 ----
  		emit_insn (copy_insn (PATTERN (curr)));
  	      rtx_insn *copy = get_insns ();
  	      end_sequence ();
! 	      prepend_insn_to_edge (copy, e);
  	    }
  	}
      }
diff -Nrcpad gcc-12.3.0/gcc/cfgrtl.cc gcc-12.4.0/gcc/cfgrtl.cc
*** gcc-12.3.0/gcc/cfgrtl.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cfgrtl.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 25,31 ****
       - CFG-aware instruction chain manipulation
  	 delete_insn, delete_insn_chain
       - Edge splitting and committing to edges
! 	 insert_insn_on_edge, commit_edge_insertions
       - CFG updating after insn simplification
  	 purge_dead_edges, purge_all_dead_edges
       - CFG fixing after coarse manipulation
--- 25,31 ----
       - CFG-aware instruction chain manipulation
  	 delete_insn, delete_insn_chain
       - Edge splitting and committing to edges
! 	 insert_insn_on_edge, prepend_insn_to_edge, commit_edge_insertions
       - CFG updating after insn simplification
  	 purge_dead_edges, purge_all_dead_edges
       - CFG fixing after coarse manipulation
*************** rtl_split_edge (edge edge_in)
*** 1967,1973 ****
  
  /* Queue instructions for insertion on an edge between two basic blocks.
     The new instructions and basic blocks (if any) will not appear in the
!    CFG until commit_edge_insertions is called.  */
  
  void
  insert_insn_on_edge (rtx pattern, edge e)
--- 1967,1974 ----
  
  /* Queue instructions for insertion on an edge between two basic blocks.
     The new instructions and basic blocks (if any) will not appear in the
!    CFG until commit_edge_insertions is called.  If there are already
!    queued instructions on the edge, PATTERN is appended to them.  */
  
  void
  insert_insn_on_edge (rtx pattern, edge e)
*************** insert_insn_on_edge (rtx pattern, edge e
*** 1987,1992 ****
--- 1988,2012 ----
    end_sequence ();
  }
  
+ /* Like insert_insn_on_edge, but if there are already queued instructions
+    on the edge, PATTERN is prepended to them.  */
+ 
+ void
+ prepend_insn_to_edge (rtx pattern, edge e)
+ {
+   /* We cannot insert instructions on an abnormal critical edge.
+      It will be easier to find the culprit if we die now.  */
+   gcc_assert (!((e->flags & EDGE_ABNORMAL) && EDGE_CRITICAL_P (e)));
+ 
+   start_sequence ();
+ 
+   emit_insn (pattern);
+   emit_insn (e->insns.r);
+ 
+   e->insns.r = get_insns ();
+   end_sequence ();
+ }
+ 
  /* Update the CFG for the instructions queued on edge E.  */
  
  void
*************** duplicate_insn_chain (rtx_insn *from, rt
*** 4354,4365 ****
  			   since MEM_EXPR is shared so make a copy and
  			   walk to the subtree again.  */
  			tree new_expr = unshare_expr (MEM_EXPR (*iter));
  			if (TREE_CODE (new_expr) == WITH_SIZE_EXPR)
  			  new_expr = TREE_OPERAND (new_expr, 0);
  			while (handled_component_p (new_expr))
  			  new_expr = TREE_OPERAND (new_expr, 0);
  			MR_DEPENDENCE_CLIQUE (new_expr) = newc;
! 			set_mem_expr (const_cast <rtx> (*iter), new_expr);
  		      }
  		  }
  	    }
--- 4374,4386 ----
  			   since MEM_EXPR is shared so make a copy and
  			   walk to the subtree again.  */
  			tree new_expr = unshare_expr (MEM_EXPR (*iter));
+ 			tree orig_new_expr = new_expr;
  			if (TREE_CODE (new_expr) == WITH_SIZE_EXPR)
  			  new_expr = TREE_OPERAND (new_expr, 0);
  			while (handled_component_p (new_expr))
  			  new_expr = TREE_OPERAND (new_expr, 0);
  			MR_DEPENDENCE_CLIQUE (new_expr) = newc;
! 			set_mem_expr (const_cast <rtx> (*iter), orig_new_expr);
  		      }
  		  }
  	    }
diff -Nrcpad gcc-12.3.0/gcc/cfgrtl.h gcc-12.4.0/gcc/cfgrtl.h
*** gcc-12.3.0/gcc/cfgrtl.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cfgrtl.h	Thu Jun 20 08:08:06 2024
*************** extern edge try_redirect_by_replacing_ju
*** 38,43 ****
--- 38,44 ----
  extern void emit_barrier_after_bb (basic_block bb);
  extern basic_block force_nonfallthru_and_redirect (edge, basic_block, rtx);
  extern void insert_insn_on_edge (rtx, edge);
+ extern void prepend_insn_to_edge (rtx, edge);
  extern void commit_one_edge_insertion (edge e);
  extern void commit_edge_insertions (void);
  extern void print_rtl_with_bb (FILE *, const rtx_insn *, dump_flags_t);
diff -Nrcpad gcc-12.3.0/gcc/cgraph.cc gcc-12.4.0/gcc/cgraph.cc
*** gcc-12.3.0/gcc/cgraph.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cgraph.cc	Thu Jun 20 08:08:06 2024
*************** cgraph_edge::redirect_callee (cgraph_nod
*** 1403,1413 ****
     speculative indirect call, remove "speculative" of the indirect call and
     also redirect stmt to it's final direct target.
  
     It is up to caller to iteratively transform each "speculative"
     direct call as appropriate.  */
  
  gimple *
! cgraph_edge::redirect_call_stmt_to_callee (cgraph_edge *e)
  {
    tree decl = gimple_call_fndecl (e->call_stmt);
    gcall *new_stmt;
--- 1403,1419 ----
     speculative indirect call, remove "speculative" of the indirect call and
     also redirect stmt to it's final direct target.
  
+    When called from within tree-inline, KILLED_SSAs has to contain the pointer
+    to killed_new_ssa_names within the copy_body_data structure and SSAs
+    discovered to be useless (if LHS is removed) will be added to it, otherwise
+    it needs to be NULL.
+ 
     It is up to caller to iteratively transform each "speculative"
     direct call as appropriate.  */
  
  gimple *
! cgraph_edge::redirect_call_stmt_to_callee (cgraph_edge *e,
! 					   hash_set <tree> *killed_ssas)
  {
    tree decl = gimple_call_fndecl (e->call_stmt);
    gcall *new_stmt;
*************** cgraph_edge::redirect_call_stmt_to_calle
*** 1528,1534 ****
  	remove_stmt_from_eh_lp (e->call_stmt);
  
        tree old_fntype = gimple_call_fntype (e->call_stmt);
!       new_stmt = padjs->modify_call (e, false);
        cgraph_node *origin = e->callee;
        while (origin->clone_of)
  	origin = origin->clone_of;
--- 1534,1540 ----
  	remove_stmt_from_eh_lp (e->call_stmt);
  
        tree old_fntype = gimple_call_fntype (e->call_stmt);
!       new_stmt = padjs->modify_call (e, false, killed_ssas);
        cgraph_node *origin = e->callee;
        while (origin->clone_of)
  	origin = origin->clone_of;
diff -Nrcpad gcc-12.3.0/gcc/cgraph.h gcc-12.4.0/gcc/cgraph.h
*** gcc-12.3.0/gcc/cgraph.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cgraph.h	Thu Jun 20 08:08:06 2024
*************** public:
*** 476,481 ****
--- 476,484 ----
       Return NULL if there's no such node.  */
    static symtab_node *get_for_asmname (const_tree asmname);
  
+   /* Check symbol table for callees of IFUNC resolvers.  */
+   static void check_ifunc_callee_symtab_nodes (void);
+ 
    /* Verify symbol table for internal consistency.  */
    static DEBUG_FUNCTION void verify_symtab_nodes (void);
  
*************** struct GTY((tag ("SYMTAB_FUNCTION"))) cg
*** 892,898 ****
        versionable (false), can_change_signature (false),
        redefined_extern_inline (false), tm_may_enter_irr (false),
        ipcp_clone (false), declare_variant_alt (false),
!       calls_declare_variant_alt (false), m_uid (uid), m_summary_id (-1)
    {}
  
    /* Remove the node from cgraph and all inline clones inlined into it.
--- 895,903 ----
        versionable (false), can_change_signature (false),
        redefined_extern_inline (false), tm_may_enter_irr (false),
        ipcp_clone (false), declare_variant_alt (false),
!       calls_declare_variant_alt (false),
!       called_by_ifunc_resolver (false),
!       m_uid (uid), m_summary_id (-1)
    {}
  
    /* Remove the node from cgraph and all inline clones inlined into it.
*************** struct GTY((tag ("SYMTAB_FUNCTION"))) cg
*** 1491,1496 ****
--- 1496,1503 ----
    unsigned declare_variant_alt : 1;
    /* True if the function calls declare_variant_alt functions.  */
    unsigned calls_declare_variant_alt : 1;
+   /* Set if the function is called by an IFUNC resolver.  */
+   unsigned called_by_ifunc_resolver : 1;
  
  private:
    /* Unique id of the node.  */
*************** public:
*** 1833,1841 ****
       speculative indirect call, remove "speculative" of the indirect call and
       also redirect stmt to it's final direct target.
  
       It is up to caller to iteratively transform each "speculative"
       direct call as appropriate.  */
!   static gimple *redirect_call_stmt_to_callee (cgraph_edge *e);
  
    /* Create clone of edge in the node N represented
       by CALL_EXPR the callgraph.  */
--- 1840,1855 ----
       speculative indirect call, remove "speculative" of the indirect call and
       also redirect stmt to it's final direct target.
  
+      When called from within tree-inline, KILLED_SSAs has to contain the
+      pointer to killed_new_ssa_names within the copy_body_data structure and
+      SSAs discovered to be useless (if LHS is removed) will be added to it,
+      otherwise it needs to be NULL.
+ 
       It is up to caller to iteratively transform each "speculative"
       direct call as appropriate.  */
!   static gimple *redirect_call_stmt_to_callee (cgraph_edge *e,
! 					       hash_set <tree>
! 					       *killed_ssas = nullptr);
  
    /* Create clone of edge in the node N represented
       by CALL_EXPR the callgraph.  */
diff -Nrcpad gcc-12.3.0/gcc/cgraphunit.cc gcc-12.4.0/gcc/cgraphunit.cc
*** gcc-12.3.0/gcc/cgraphunit.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cgraphunit.cc	Thu Jun 20 08:08:06 2024
*************** symbol_table::compile (void)
*** 2265,2270 ****
--- 2265,2272 ----
  
    symtab_node::checking_verify_symtab_nodes ();
  
+   symtab_node::check_ifunc_callee_symtab_nodes ();
+ 
    timevar_push (TV_CGRAPHOPT);
    if (pre_ipa_mem_report)
      dump_memory_report ("Memory consumption before IPA");
diff -Nrcpad gcc-12.3.0/gcc/combine.cc gcc-12.4.0/gcc/combine.cc
*** gcc-12.3.0/gcc/combine.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/combine.cc	Thu Jun 20 08:08:06 2024
*************** simplify_compare_const (enum rtx_code co
*** 11789,11796 ****
       `and'ed with that bit), we can replace this with a comparison
       with zero.  */
    if (const_op
!       && (code == EQ || code == NE || code == GE || code == GEU
! 	  || code == LT || code == LTU)
        && is_a <scalar_int_mode> (mode, &int_mode)
        && GET_MODE_PRECISION (int_mode) - 1 < HOST_BITS_PER_WIDE_INT
        && pow2p_hwi (const_op & GET_MODE_MASK (int_mode))
--- 11789,11798 ----
       `and'ed with that bit), we can replace this with a comparison
       with zero.  */
    if (const_op
!       && (code == EQ || code == NE || code == GEU || code == LTU
! 	  /* This optimization is incorrect for signed >= INT_MIN or
! 	     < INT_MIN, those are always true or always false.  */
! 	  || ((code == GE || code == LT) && const_op > 0))
        && is_a <scalar_int_mode> (mode, &int_mode)
        && GET_MODE_PRECISION (int_mode) - 1 < HOST_BITS_PER_WIDE_INT
        && pow2p_hwi (const_op & GET_MODE_MASK (int_mode))
diff -Nrcpad gcc-12.3.0/gcc/common/config/i386/cpuinfo.h gcc-12.4.0/gcc/common/config/i386/cpuinfo.h
*** gcc-12.3.0/gcc/common/config/i386/cpuinfo.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/common/config/i386/cpuinfo.h	Thu Jun 20 08:08:06 2024
*************** get_intel_cpu (struct __processor_model
*** 435,441 ****
        cpu_model->__cpu_subtype = INTEL_COREI7_SKYLAKE;
        break;
      case 0xa7:
-     case 0xa8:
        /* Rocket Lake.  */
        cpu = "rocketlake";
        CHECK___builtin_cpu_is ("corei7");
--- 435,440 ----
*************** get_intel_cpu (struct __processor_model
*** 508,514 ****
        break;
      case 0x97:
      case 0x9a:
-     case 0xbf:
        /* Alder Lake.  */
        cpu = "alderlake";
        CHECK___builtin_cpu_is ("corei7");
--- 507,512 ----
*************** get_available_features (struct __process
*** 649,655 ****
    /* Get Advanced Features at level 7 (eax = 7, ecx = 0/1). */
    if (max_cpuid_level >= 7)
      {
!       __cpuid_count (7, 0, eax, ebx, ecx, edx);
        if (ebx & bit_BMI)
  	set_feature (FEATURE_BMI);
        if (ebx & bit_SGX)
--- 647,655 ----
    /* Get Advanced Features at level 7 (eax = 7, ecx = 0/1). */
    if (max_cpuid_level >= 7)
      {
!       unsigned int max_subleaf_level;
! 
!       __cpuid_count (7, 0, max_subleaf_level, ebx, ecx, edx);
        if (ebx & bit_BMI)
  	set_feature (FEATURE_BMI);
        if (ebx & bit_SGX)
*************** get_available_features (struct __process
*** 761,778 ****
  	    set_feature (FEATURE_AVX512FP16);
  	}
  
!       __cpuid_count (7, 1, eax, ebx, ecx, edx);
!       if (eax & bit_HRESET)
! 	set_feature (FEATURE_HRESET);
!       if (avx_usable)
! 	{
! 	  if (eax & bit_AVXVNNI)
! 	    set_feature (FEATURE_AVXVNNI);
! 	}
!       if (avx512_usable)
  	{
! 	  if (eax & bit_AVX512BF16)
! 	    set_feature (FEATURE_AVX512BF16);
  	}
      }
  
--- 761,781 ----
  	    set_feature (FEATURE_AVX512FP16);
  	}
  
!       if (max_subleaf_level >= 1)
  	{
! 	  __cpuid_count (7, 1, eax, ebx, ecx, edx);
! 	  if (eax & bit_HRESET)
! 	    set_feature (FEATURE_HRESET);
! 	  if (avx_usable)
! 	    {
! 	      if (eax & bit_AVXVNNI)
! 		set_feature (FEATURE_AVXVNNI);
! 	    }
! 	  if (avx512_usable)
! 	    {
! 	      if (eax & bit_AVX512BF16)
! 		set_feature (FEATURE_AVX512BF16);
! 	    }
  	}
      }
  
diff -Nrcpad gcc-12.3.0/gcc/config/aarch64/aarch64-builtins.cc gcc-12.4.0/gcc/config/aarch64/aarch64-builtins.cc
*** gcc-12.3.0/gcc/config/aarch64/aarch64-builtins.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/aarch64/aarch64-builtins.cc	Thu Jun 20 08:08:06 2024
*************** aarch64_general_add_builtin (const char
*** 751,756 ****
--- 751,766 ----
  			       NULL, attrs);
  }
  
+ static tree
+ aarch64_general_simulate_builtin (const char *name, tree fntype,
+ 				  unsigned int code,
+ 				  tree attrs = NULL_TREE)
+ {
+   code = (code << AARCH64_BUILTIN_SHIFT) | AARCH64_BUILTIN_GENERAL;
+   return simulate_builtin_function_decl (input_location, name, fntype,
+ 					 code, NULL, attrs);
+ }
+ 
  static const char *
  aarch64_mangle_builtin_scalar_type (const_tree type)
  {
*************** aarch64_init_ls64_builtins_types (void)
*** 1634,1644 ****
    gcc_assert (TYPE_ALIGN (array_type) == 64);
  
    tree field = build_decl (input_location, FIELD_DECL,
!                            get_identifier ("val"), array_type);
  
    ls64_arm_data_t = lang_hooks.types.simulate_record_decl (input_location,
!                          tuple_type_name,
!                          make_array_slice (&field, 1));
  
    gcc_assert (TYPE_MODE (ls64_arm_data_t) == V8DImode);
    gcc_assert (TYPE_MODE_RAW (ls64_arm_data_t) == TYPE_MODE (ls64_arm_data_t));
--- 1644,1654 ----
    gcc_assert (TYPE_ALIGN (array_type) == 64);
  
    tree field = build_decl (input_location, FIELD_DECL,
! 			   get_identifier ("val"), array_type);
  
    ls64_arm_data_t = lang_hooks.types.simulate_record_decl (input_location,
! 			 tuple_type_name,
! 			 make_array_slice (&field, 1));
  
    gcc_assert (TYPE_MODE (ls64_arm_data_t) == V8DImode);
    gcc_assert (TYPE_MODE_RAW (ls64_arm_data_t) == TYPE_MODE (ls64_arm_data_t));
*************** aarch64_init_ls64_builtins (void)
*** 1651,1673 ****
    aarch64_init_ls64_builtins_types ();
  
    ls64_builtins_data data[4] = {
!     {"__builtin_aarch64_ld64b", AARCH64_LS64_BUILTIN_LD64B,
       build_function_type_list (ls64_arm_data_t,
!                                const_ptr_type_node, NULL_TREE)},
!     {"__builtin_aarch64_st64b", AARCH64_LS64_BUILTIN_ST64B,
       build_function_type_list (void_type_node, ptr_type_node,
!                                ls64_arm_data_t, NULL_TREE)},
!     {"__builtin_aarch64_st64bv", AARCH64_LS64_BUILTIN_ST64BV,
       build_function_type_list (uint64_type_node, ptr_type_node,
!                                ls64_arm_data_t, NULL_TREE)},
!     {"__builtin_aarch64_st64bv0", AARCH64_LS64_BUILTIN_ST64BV0,
       build_function_type_list (uint64_type_node, ptr_type_node,
!                                ls64_arm_data_t, NULL_TREE)},
    };
  
    for (size_t i = 0; i < ARRAY_SIZE (data); ++i)
      aarch64_builtin_decls[data[i].code]
!       = aarch64_general_add_builtin (data[i].name, data[i].type, data[i].code);
  }
  
  static void
--- 1661,1684 ----
    aarch64_init_ls64_builtins_types ();
  
    ls64_builtins_data data[4] = {
!     {"__arm_ld64b", AARCH64_LS64_BUILTIN_LD64B,
       build_function_type_list (ls64_arm_data_t,
! 			       const_ptr_type_node, NULL_TREE)},
!     {"__arm_st64b", AARCH64_LS64_BUILTIN_ST64B,
       build_function_type_list (void_type_node, ptr_type_node,
! 			       ls64_arm_data_t, NULL_TREE)},
!     {"__arm_st64bv", AARCH64_LS64_BUILTIN_ST64BV,
       build_function_type_list (uint64_type_node, ptr_type_node,
! 			       ls64_arm_data_t, NULL_TREE)},
!     {"__arm_st64bv0", AARCH64_LS64_BUILTIN_ST64BV0,
       build_function_type_list (uint64_type_node, ptr_type_node,
! 			       ls64_arm_data_t, NULL_TREE)},
    };
  
    for (size_t i = 0; i < ARRAY_SIZE (data); ++i)
      aarch64_builtin_decls[data[i].code]
!       = aarch64_general_simulate_builtin (data[i].name, data[i].type,
! 					  data[i].code);
  }
  
  static void
*************** aarch64_general_init_builtins (void)
*** 1800,1805 ****
--- 1811,1819 ----
  
    if (TARGET_MEMTAG)
      aarch64_init_memtag_builtins ();
+ 
+   if (in_lto_p)
+     handle_arm_acle_h ();
  }
  
  /* Implement TARGET_BUILTIN_DECL for the AARCH64_BUILTIN_GENERAL group.  */
*************** aarch64_expand_builtin_ls64 (int fcode,
*** 2281,2320 ****
      {
      case AARCH64_LS64_BUILTIN_LD64B:
        {
!         rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
!         create_output_operand (&ops[0], target, V8DImode);
!         create_input_operand (&ops[1], op0, DImode);
!         expand_insn (CODE_FOR_ld64b, 2, ops);
!         return ops[0].value;
        }
      case AARCH64_LS64_BUILTIN_ST64B:
        {
!         rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
!         rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1));
!         create_output_operand (&ops[0], op0, DImode);
!         create_input_operand (&ops[1], op1, V8DImode);
!         expand_insn (CODE_FOR_st64b, 2, ops);
!         return const0_rtx;
        }
      case AARCH64_LS64_BUILTIN_ST64BV:
        {
!         rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
!         rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1));
!         create_output_operand (&ops[0], target, DImode);
!         create_input_operand (&ops[1], op0, DImode);
!         create_input_operand (&ops[2], op1, V8DImode);
!         expand_insn (CODE_FOR_st64bv, 3, ops);
!         return ops[0].value;
        }
      case AARCH64_LS64_BUILTIN_ST64BV0:
        {
!         rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
!         rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1));
!         create_output_operand (&ops[0], target, DImode);
!         create_input_operand (&ops[1], op0, DImode);
!         create_input_operand (&ops[2], op1, V8DImode);
!         expand_insn (CODE_FOR_st64bv0, 3, ops);
!         return ops[0].value;
        }
      }
  
--- 2295,2334 ----
      {
      case AARCH64_LS64_BUILTIN_LD64B:
        {
! 	rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
! 	create_output_operand (&ops[0], target, V8DImode);
! 	create_input_operand (&ops[1], op0, DImode);
! 	expand_insn (CODE_FOR_ld64b, 2, ops);
! 	return ops[0].value;
        }
      case AARCH64_LS64_BUILTIN_ST64B:
        {
! 	rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
! 	rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1));
! 	create_input_operand (&ops[0], op0, DImode);
! 	create_input_operand (&ops[1], op1, V8DImode);
! 	expand_insn (CODE_FOR_st64b, 2, ops);
! 	return const0_rtx;
        }
      case AARCH64_LS64_BUILTIN_ST64BV:
        {
! 	rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
! 	rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1));
! 	create_output_operand (&ops[0], target, DImode);
! 	create_input_operand (&ops[1], op0, DImode);
! 	create_input_operand (&ops[2], op1, V8DImode);
! 	expand_insn (CODE_FOR_st64bv, 3, ops);
! 	return ops[0].value;
        }
      case AARCH64_LS64_BUILTIN_ST64BV0:
        {
! 	rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
! 	rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1));
! 	create_output_operand (&ops[0], target, DImode);
! 	create_input_operand (&ops[1], op0, DImode);
! 	create_input_operand (&ops[2], op1, V8DImode);
! 	expand_insn (CODE_FOR_st64bv0, 3, ops);
! 	return ops[0].value;
        }
      }
  
diff -Nrcpad gcc-12.3.0/gcc/config/aarch64/aarch64-cores.def gcc-12.4.0/gcc/config/aarch64/aarch64-cores.def
*** gcc-12.3.0/gcc/config/aarch64/aarch64-cores.def	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/aarch64/aarch64-cores.def	Thu Jun 20 08:08:06 2024
*************** AARCH64_CORE("cortex-r82", cortexr82, co
*** 164,170 ****
  /* Armv9.0-A Architecture Processors.  */
  
  /* Arm ('A') cores. */
! AARCH64_CORE("cortex-a510",  cortexa510, cortexa55, 9A,  AARCH64_FL_FOR_ARCH9 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_MEMTAG
   | AARCH64_FL_I8MM | AARCH64_FL_BF16, cortexa53, 0x41, 0xd46, -1)
  
  AARCH64_CORE("cortex-a710",  cortexa710, cortexa57, 9A,  AARCH64_FL_FOR_ARCH9 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_MEMTAG | AARCH64_FL_I8MM | AARCH64_FL_BF16, neoversen2, 0x41, 0xd47, -1)
--- 164,170 ----
  /* Armv9.0-A Architecture Processors.  */
  
  /* Arm ('A') cores. */
! AARCH64_CORE("cortex-a510",  cortexa510, cortexa53, 9A,  AARCH64_FL_FOR_ARCH9 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_MEMTAG
   | AARCH64_FL_I8MM | AARCH64_FL_BF16, cortexa53, 0x41, 0xd46, -1)
  
  AARCH64_CORE("cortex-a710",  cortexa710, cortexa57, 9A,  AARCH64_FL_FOR_ARCH9 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_MEMTAG | AARCH64_FL_I8MM | AARCH64_FL_BF16, neoversen2, 0x41, 0xd47, -1)
*************** AARCH64_CORE("cortex-a710",  cortexa710,
*** 172,177 ****
--- 172,178 ----
  AARCH64_CORE("cortex-x2",  cortexx2, cortexa57, 9A,  AARCH64_FL_FOR_ARCH9 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_MEMTAG | AARCH64_FL_I8MM | AARCH64_FL_BF16, neoversen2, 0x41, 0xd48, -1)
  
  AARCH64_CORE("neoverse-n2", neoversen2, cortexa57, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_RNG | AARCH64_FL_MEMTAG | AARCH64_FL_PROFILE, neoversen2, 0x41, 0xd49, -1)
+ AARCH64_CORE("cobalt-100",   cobalt100, cortexa57, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_RNG | AARCH64_FL_MEMTAG | AARCH64_FL_PROFILE, neoversen2, 0x6d, 0xd49, -1)
  
  AARCH64_CORE("demeter", demeter, cortexa57, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_RNG | AARCH64_FL_MEMTAG | AARCH64_FL_PROFILE, neoversev2, 0x41, 0xd4f, -1)
  AARCH64_CORE("neoverse-v2", neoversev2, cortexa57, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_RNG | AARCH64_FL_MEMTAG | AARCH64_FL_PROFILE, neoversev2, 0x41, 0xd4f, -1)
diff -Nrcpad gcc-12.3.0/gcc/config/aarch64/aarch64-protos.h gcc-12.4.0/gcc/config/aarch64/aarch64-protos.h
*** gcc-12.3.0/gcc/config/aarch64/aarch64-protos.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/aarch64/aarch64-protos.h	Thu Jun 20 08:08:06 2024
*************** bool aarch64_emit_approx_div (rtx, rtx,
*** 781,786 ****
--- 781,787 ----
  bool aarch64_emit_approx_sqrt (rtx, rtx, bool);
  tree aarch64_vector_load_decl (tree);
  void aarch64_expand_call (rtx, rtx, rtx, bool);
+ bool aarch64_expand_cpymem_mops (rtx *, bool);
  bool aarch64_expand_cpymem (rtx *);
  bool aarch64_expand_setmem (rtx *);
  bool aarch64_float_const_zero_rtx_p (rtx);
diff -Nrcpad gcc-12.3.0/gcc/config/aarch64/aarch64-tune.md gcc-12.4.0/gcc/config/aarch64/aarch64-tune.md
*** gcc-12.3.0/gcc/config/aarch64/aarch64-tune.md	Mon May  8 12:15:24 2023
--- gcc-12.4.0/gcc/config/aarch64/aarch64-tune.md	Thu Jun 20 08:10:28 2024
***************
*** 1,5 ****
  ;; -*- buffer-read-only: t -*-
  ;; Generated automatically by gentune.sh from aarch64-cores.def
  (define_attr "tune"
! 	"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,zeus,neoversev1,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa710,cortexx2,neoversen2,demeter,neoversev2"
  	(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
--- 1,5 ----
  ;; -*- buffer-read-only: t -*-
  ;; Generated automatically by gentune.sh from aarch64-cores.def
  (define_attr "tune"
! 	"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,zeus,neoversev1,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa710,cortexx2,neoversen2,cobalt100,demeter,neoversev2"
  	(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
diff -Nrcpad gcc-12.3.0/gcc/config/aarch64/aarch64.cc gcc-12.4.0/gcc/config/aarch64/aarch64.cc
*** gcc-12.3.0/gcc/config/aarch64/aarch64.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/aarch64/aarch64.cc	Thu Jun 20 08:08:06 2024
*************** aarch64_reg_save_mode (unsigned int regn
*** 4135,4141 ****
        case ARM_PCS_SIMD:
  	/* The vector PCS saves the low 128 bits (which is the full
  	   register on non-SVE targets).  */
! 	return TFmode;
  
        case ARM_PCS_SVE:
  	/* Use vectors of DImode for registers that need frame
--- 4135,4141 ----
        case ARM_PCS_SIMD:
  	/* The vector PCS saves the low 128 bits (which is the full
  	   register on non-SVE targets).  */
! 	return V16QImode;
  
        case ARM_PCS_SVE:
  	/* Use vectors of DImode for registers that need frame
*************** aarch64_needs_frame_chain (void)
*** 8133,8150 ****
    return aarch64_use_frame_pointer;
  }
  
  /* Mark the registers that need to be saved by the callee and calculate
     the size of the callee-saved registers area and frame record (both FP
     and LR may be omitted).  */
  static void
  aarch64_layout_frame (void)
  {
-   poly_int64 offset = 0;
    int regno, last_fp_reg = INVALID_REGNUM;
    machine_mode vector_save_mode = aarch64_reg_save_mode (V8_REGNUM);
    poly_int64 vector_save_size = GET_MODE_SIZE (vector_save_mode);
    bool frame_related_fp_reg_p = false;
    aarch64_frame &frame = cfun->machine->frame;
  
    frame.emit_frame_chain = aarch64_needs_frame_chain ();
  
--- 8133,8164 ----
    return aarch64_use_frame_pointer;
  }
  
+ /* Return true if the current function should save registers above
+    the locals area, rather than below it.  */
+ 
+ static bool
+ aarch64_save_regs_above_locals_p ()
+ {
+   /* When using stack smash protection, make sure that the canary slot
+      comes between the locals and the saved registers.  Otherwise,
+      it would be possible for a carefully sized smash attack to change
+      the saved registers (particularly LR and FP) without reaching the
+      canary.  */
+   return crtl->stack_protect_guard;
+ }
+ 
  /* Mark the registers that need to be saved by the callee and calculate
     the size of the callee-saved registers area and frame record (both FP
     and LR may be omitted).  */
  static void
  aarch64_layout_frame (void)
  {
    int regno, last_fp_reg = INVALID_REGNUM;
    machine_mode vector_save_mode = aarch64_reg_save_mode (V8_REGNUM);
    poly_int64 vector_save_size = GET_MODE_SIZE (vector_save_mode);
    bool frame_related_fp_reg_p = false;
    aarch64_frame &frame = cfun->machine->frame;
+   poly_int64 top_of_locals = -1;
  
    frame.emit_frame_chain = aarch64_needs_frame_chain ();
  
*************** aarch64_layout_frame (void)
*** 8211,8221 ****
  	&& !crtl->abi->clobbers_full_reg_p (regno))
        frame.reg_offset[regno] = SLOT_REQUIRED;
  
!   /* With stack-clash, LR must be saved in non-leaf functions.  The saving of
!      LR counts as an implicit probe which allows us to maintain the invariant
!      described in the comment at expand_prologue.  */
!   gcc_assert (crtl->is_leaf
! 	      || maybe_ne (frame.reg_offset[R30_REGNUM], SLOT_NOT_REQUIRED));
  
    /* Now assign stack slots for the registers.  Start with the predicate
       registers, since predicate LDR and STR have a relatively small
--- 8225,8242 ----
  	&& !crtl->abi->clobbers_full_reg_p (regno))
        frame.reg_offset[regno] = SLOT_REQUIRED;
  
!   bool regs_at_top_p = aarch64_save_regs_above_locals_p ();
! 
!   poly_int64 offset = crtl->outgoing_args_size;
!   gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT));
!   if (regs_at_top_p)
!     {
!       offset += get_frame_size ();
!       offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
!       top_of_locals = offset;
!     }
!   frame.bytes_below_saved_regs = offset;
!   frame.sve_save_and_probe = INVALID_REGNUM;
  
    /* Now assign stack slots for the registers.  Start with the predicate
       registers, since predicate LDR and STR have a relatively small
*************** aarch64_layout_frame (void)
*** 8223,8233 ****
    for (regno = P0_REGNUM; regno <= P15_REGNUM; regno++)
      if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED))
        {
  	frame.reg_offset[regno] = offset;
  	offset += BYTES_PER_SVE_PRED;
        }
  
!   if (maybe_ne (offset, 0))
      {
        /* If we have any vector registers to save above the predicate registers,
  	 the offset of the vector register save slots need to be a multiple
--- 8244,8257 ----
    for (regno = P0_REGNUM; regno <= P15_REGNUM; regno++)
      if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED))
        {
+ 	if (frame.sve_save_and_probe == INVALID_REGNUM)
+ 	  frame.sve_save_and_probe = regno;
  	frame.reg_offset[regno] = offset;
  	offset += BYTES_PER_SVE_PRED;
        }
  
!   poly_int64 saved_prs_size = offset - frame.bytes_below_saved_regs;
!   if (maybe_ne (saved_prs_size, 0))
      {
        /* If we have any vector registers to save above the predicate registers,
  	 the offset of the vector register save slots need to be a multiple
*************** aarch64_layout_frame (void)
*** 8245,8254 ****
  	offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
        else
  	{
! 	  if (known_le (offset, vector_save_size))
! 	    offset = vector_save_size;
! 	  else if (known_le (offset, vector_save_size * 2))
! 	    offset = vector_save_size * 2;
  	  else
  	    gcc_unreachable ();
  	}
--- 8269,8278 ----
  	offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
        else
  	{
! 	  if (known_le (saved_prs_size, vector_save_size))
! 	    offset = frame.bytes_below_saved_regs + vector_save_size;
! 	  else if (known_le (saved_prs_size, vector_save_size * 2))
! 	    offset = frame.bytes_below_saved_regs + vector_save_size * 2;
  	  else
  	    gcc_unreachable ();
  	}
*************** aarch64_layout_frame (void)
*** 8259,8292 ****
      for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
        if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED))
  	{
  	  frame.reg_offset[regno] = offset;
  	  offset += vector_save_size;
  	}
  
    /* OFFSET is now the offset of the hard frame pointer from the bottom
       of the callee save area.  */
!   bool saves_below_hard_fp_p = maybe_ne (offset, 0);
!   frame.below_hard_fp_saved_regs_size = offset;
    if (frame.emit_frame_chain)
      {
        /* FP and LR are placed in the linkage record.  */
!       frame.reg_offset[R29_REGNUM] = offset;
!       frame.wb_push_candidate1 = R29_REGNUM;
!       frame.reg_offset[R30_REGNUM] = offset + UNITS_PER_WORD;
!       frame.wb_push_candidate2 = R30_REGNUM;
!       offset += 2 * UNITS_PER_WORD;
      }
  
    for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++)
      if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED))
!       {
! 	frame.reg_offset[regno] = offset;
! 	if (frame.wb_push_candidate1 == INVALID_REGNUM)
! 	  frame.wb_push_candidate1 = regno;
! 	else if (frame.wb_push_candidate2 == INVALID_REGNUM)
! 	  frame.wb_push_candidate2 = regno;
! 	offset += UNITS_PER_WORD;
!       }
  
    poly_int64 max_int_offset = offset;
    offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
--- 8283,8335 ----
      for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
        if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED))
  	{
+ 	  if (frame.sve_save_and_probe == INVALID_REGNUM)
+ 	    frame.sve_save_and_probe = regno;
  	  frame.reg_offset[regno] = offset;
  	  offset += vector_save_size;
  	}
  
    /* OFFSET is now the offset of the hard frame pointer from the bottom
       of the callee save area.  */
!   auto below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs;
!   bool saves_below_hard_fp_p = maybe_ne (below_hard_fp_saved_regs_size, 0);
!   gcc_assert (!saves_below_hard_fp_p
! 	      || (frame.sve_save_and_probe != INVALID_REGNUM
! 		  && known_eq (frame.reg_offset[frame.sve_save_and_probe],
! 			       frame.bytes_below_saved_regs)));
! 
!   frame.bytes_below_hard_fp = offset;
!   frame.hard_fp_save_and_probe = INVALID_REGNUM;
! 
!   auto allocate_gpr_slot = [&](unsigned int regno)
!     {
!       if (frame.hard_fp_save_and_probe == INVALID_REGNUM)
! 	frame.hard_fp_save_and_probe = regno;
!       frame.reg_offset[regno] = offset;
!       if (frame.wb_push_candidate1 == INVALID_REGNUM)
! 	frame.wb_push_candidate1 = regno;
!       else if (frame.wb_push_candidate2 == INVALID_REGNUM)
! 	frame.wb_push_candidate2 = regno;
!       offset += UNITS_PER_WORD;
!     };
! 
    if (frame.emit_frame_chain)
      {
        /* FP and LR are placed in the linkage record.  */
!       allocate_gpr_slot (R29_REGNUM);
!       allocate_gpr_slot (R30_REGNUM);
      }
+   else if (flag_stack_clash_protection
+ 	   && known_eq (frame.reg_offset[R30_REGNUM], SLOT_REQUIRED))
+     /* Put the LR save slot first, since it makes a good choice of probe
+        for stack clash purposes.  The idea is that the link register usually
+        has to be saved before a call anyway, and so we lose little by
+        stopping it from being individually shrink-wrapped.  */
+     allocate_gpr_slot (R30_REGNUM);
  
    for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++)
      if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED))
!       allocate_gpr_slot (regno);
  
    poly_int64 max_int_offset = offset;
    offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
*************** aarch64_layout_frame (void)
*** 8295,8300 ****
--- 8338,8345 ----
    for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
      if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED))
        {
+ 	if (frame.hard_fp_save_and_probe == INVALID_REGNUM)
+ 	  frame.hard_fp_save_and_probe = regno;
  	/* If there is an alignment gap between integer and fp callee-saves,
  	   allocate the last fp register to it if possible.  */
  	if (regno == last_fp_reg
*************** aarch64_layout_frame (void)
*** 8317,8346 ****
  
    offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
  
!   frame.saved_regs_size = offset;
! 
!   poly_int64 varargs_and_saved_regs_size = offset + frame.saved_varargs_size;
! 
!   poly_int64 above_outgoing_args
!     = aligned_upper_bound (varargs_and_saved_regs_size
! 			   + get_frame_size (),
! 			   STACK_BOUNDARY / BITS_PER_UNIT);
  
!   frame.hard_fp_offset
!     = above_outgoing_args - frame.below_hard_fp_saved_regs_size;
  
!   /* Both these values are already aligned.  */
!   gcc_assert (multiple_p (crtl->outgoing_args_size,
! 			  STACK_BOUNDARY / BITS_PER_UNIT));
!   frame.frame_size = above_outgoing_args + crtl->outgoing_args_size;
  
!   frame.locals_offset = frame.saved_varargs_size;
  
    frame.initial_adjust = 0;
    frame.final_adjust = 0;
    frame.callee_adjust = 0;
    frame.sve_callee_adjust = 0;
-   frame.callee_offset = 0;
  
    frame.wb_pop_candidate1 = frame.wb_push_candidate1;
    frame.wb_pop_candidate2 = frame.wb_push_candidate2;
--- 8362,8397 ----
  
    offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
  
!   auto saved_regs_size = offset - frame.bytes_below_saved_regs;
!   gcc_assert (known_eq (saved_regs_size, below_hard_fp_saved_regs_size)
! 	      || (frame.hard_fp_save_and_probe != INVALID_REGNUM
! 		  && known_eq (frame.reg_offset[frame.hard_fp_save_and_probe],
! 			       frame.bytes_below_hard_fp)));
  
!   /* With stack-clash, a register must be saved in non-leaf functions.
!      The saving of the bottommost register counts as an implicit probe,
!      which allows us to maintain the invariant described in the comment
!      at expand_prologue.  */
!   gcc_assert (crtl->is_leaf || maybe_ne (saved_regs_size, 0));
  
!   if (!regs_at_top_p)
!     {
!       offset += get_frame_size ();
!       offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
!       top_of_locals = offset;
!     }
!   offset += frame.saved_varargs_size;
!   gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT));
!   frame.frame_size = offset;
  
!   frame.bytes_above_hard_fp = frame.frame_size - frame.bytes_below_hard_fp;
!   gcc_assert (known_ge (top_of_locals, 0));
!   frame.bytes_above_locals = frame.frame_size - top_of_locals;
  
    frame.initial_adjust = 0;
    frame.final_adjust = 0;
    frame.callee_adjust = 0;
    frame.sve_callee_adjust = 0;
  
    frame.wb_pop_candidate1 = frame.wb_push_candidate1;
    frame.wb_pop_candidate2 = frame.wb_push_candidate2;
*************** aarch64_layout_frame (void)
*** 8351,8357 ****
    frame.is_scs_enabled
      = (!crtl->calls_eh_return
         && sanitize_flags_p (SANITIZE_SHADOW_CALL_STACK)
!        && known_ge (cfun->machine->frame.reg_offset[LR_REGNUM], 0));
  
    /* When shadow call stack is enabled, the scs_pop in the epilogue will
       restore x30, and we don't need to pop x30 again in the traditional
--- 8402,8408 ----
    frame.is_scs_enabled
      = (!crtl->calls_eh_return
         && sanitize_flags_p (SANITIZE_SHADOW_CALL_STACK)
!        && known_ge (frame.reg_offset[LR_REGNUM], 0));
  
    /* When shadow call stack is enabled, the scs_pop in the epilogue will
       restore x30, and we don't need to pop x30 again in the traditional
*************** aarch64_layout_frame (void)
*** 8371,8445 ****
       max_push_offset to 0, because no registers are popped at this time,
       so callee_adjust cannot be adjusted.  */
    HOST_WIDE_INT max_push_offset = 0;
!   if (frame.wb_pop_candidate2 != INVALID_REGNUM)
!     max_push_offset = 512;
!   else if (frame.wb_pop_candidate1 != INVALID_REGNUM)
!     max_push_offset = 256;
  
!   HOST_WIDE_INT const_size, const_outgoing_args_size, const_fp_offset;
    HOST_WIDE_INT const_saved_regs_size;
!   if (frame.frame_size.is_constant (&const_size)
!       && const_size < max_push_offset
!       && known_eq (frame.hard_fp_offset, const_size))
      {
!       /* Simple, small frame with no outgoing arguments:
  
  	 stp reg1, reg2, [sp, -frame_size]!
  	 stp reg3, reg4, [sp, 16]  */
        frame.callee_adjust = const_size;
      }
!   else if (crtl->outgoing_args_size.is_constant (&const_outgoing_args_size)
! 	   && frame.saved_regs_size.is_constant (&const_saved_regs_size)
! 	   && const_outgoing_args_size + const_saved_regs_size < 512
! 	   /* We could handle this case even with outgoing args, provided
! 	      that the number of args left us with valid offsets for all
! 	      predicate and vector save slots.  It's such a rare case that
! 	      it hardly seems worth the effort though.  */
! 	   && (!saves_below_hard_fp_p || const_outgoing_args_size == 0)
  	   && !(cfun->calls_alloca
! 		&& frame.hard_fp_offset.is_constant (&const_fp_offset)
! 		&& const_fp_offset < max_push_offset))
      {
!       /* Frame with small outgoing arguments:
  
  	 sub sp, sp, frame_size
! 	 stp reg1, reg2, [sp, outgoing_args_size]
! 	 stp reg3, reg4, [sp, outgoing_args_size + 16]  */
        frame.initial_adjust = frame.frame_size;
-       frame.callee_offset = const_outgoing_args_size;
      }
    else if (saves_below_hard_fp_p
! 	   && known_eq (frame.saved_regs_size,
! 			frame.below_hard_fp_saved_regs_size))
      {
        /* Frame in which all saves are SVE saves:
  
! 	 sub sp, sp, hard_fp_offset + below_hard_fp_saved_regs_size
  	 save SVE registers relative to SP
! 	 sub sp, sp, outgoing_args_size  */
!       frame.initial_adjust = (frame.hard_fp_offset
! 			      + frame.below_hard_fp_saved_regs_size);
!       frame.final_adjust = crtl->outgoing_args_size;
      }
!   else if (frame.hard_fp_offset.is_constant (&const_fp_offset)
! 	   && const_fp_offset < max_push_offset)
      {
!       /* Frame with large outgoing arguments or SVE saves, but with
! 	 a small local area:
  
  	 stp reg1, reg2, [sp, -hard_fp_offset]!
  	 stp reg3, reg4, [sp, 16]
  	 [sub sp, sp, below_hard_fp_saved_regs_size]
  	 [save SVE registers relative to SP]
! 	 sub sp, sp, outgoing_args_size  */
!       frame.callee_adjust = const_fp_offset;
!       frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size;
!       frame.final_adjust = crtl->outgoing_args_size;
      }
    else
      {
!       /* Frame with large local area and outgoing arguments or SVE saves,
! 	 using frame pointer:
  
  	 sub sp, sp, hard_fp_offset
  	 stp x29, x30, [sp, 0]
--- 8422,8497 ----
       max_push_offset to 0, because no registers are popped at this time,
       so callee_adjust cannot be adjusted.  */
    HOST_WIDE_INT max_push_offset = 0;
!   if (frame.wb_pop_candidate1 != INVALID_REGNUM)
!     {
!       if (frame.wb_pop_candidate2 != INVALID_REGNUM)
! 	max_push_offset = 512;
!       else
! 	max_push_offset = 256;
!     }
  
!   HOST_WIDE_INT const_size, const_below_saved_regs, const_above_fp;
    HOST_WIDE_INT const_saved_regs_size;
!   if (known_eq (saved_regs_size, 0))
!     frame.initial_adjust = frame.frame_size;
!   else if (frame.frame_size.is_constant (&const_size)
! 	   && const_size < max_push_offset
! 	   && known_eq (frame.bytes_above_hard_fp, const_size))
      {
!       /* Simple, small frame with no data below the saved registers.
  
  	 stp reg1, reg2, [sp, -frame_size]!
  	 stp reg3, reg4, [sp, 16]  */
        frame.callee_adjust = const_size;
      }
!   else if (frame.bytes_below_saved_regs.is_constant (&const_below_saved_regs)
! 	   && saved_regs_size.is_constant (&const_saved_regs_size)
! 	   && const_below_saved_regs + const_saved_regs_size < 512
! 	   /* We could handle this case even with data below the saved
! 	      registers, provided that that data left us with valid offsets
! 	      for all predicate and vector save slots.  It's such a rare
! 	      case that it hardly seems worth the effort though.  */
! 	   && (!saves_below_hard_fp_p || const_below_saved_regs == 0)
  	   && !(cfun->calls_alloca
! 		&& frame.bytes_above_hard_fp.is_constant (&const_above_fp)
! 		&& const_above_fp < max_push_offset))
      {
!       /* Frame with small area below the saved registers:
  
  	 sub sp, sp, frame_size
! 	 stp reg1, reg2, [sp, bytes_below_saved_regs]
! 	 stp reg3, reg4, [sp, bytes_below_saved_regs + 16]  */
        frame.initial_adjust = frame.frame_size;
      }
    else if (saves_below_hard_fp_p
! 	   && known_eq (saved_regs_size, below_hard_fp_saved_regs_size))
      {
        /* Frame in which all saves are SVE saves:
  
! 	 sub sp, sp, frame_size - bytes_below_saved_regs
  	 save SVE registers relative to SP
! 	 sub sp, sp, bytes_below_saved_regs  */
!       frame.initial_adjust = frame.frame_size - frame.bytes_below_saved_regs;
!       frame.final_adjust = frame.bytes_below_saved_regs;
      }
!   else if (frame.bytes_above_hard_fp.is_constant (&const_above_fp)
! 	   && const_above_fp < max_push_offset)
      {
!       /* Frame with large area below the saved registers, or with SVE saves,
! 	 but with a small area above:
  
  	 stp reg1, reg2, [sp, -hard_fp_offset]!
  	 stp reg3, reg4, [sp, 16]
  	 [sub sp, sp, below_hard_fp_saved_regs_size]
  	 [save SVE registers relative to SP]
! 	 sub sp, sp, bytes_below_saved_regs  */
!       frame.callee_adjust = const_above_fp;
!       frame.sve_callee_adjust = below_hard_fp_saved_regs_size;
!       frame.final_adjust = frame.bytes_below_saved_regs;
      }
    else
      {
!       /* General case:
  
  	 sub sp, sp, hard_fp_offset
  	 stp x29, x30, [sp, 0]
*************** aarch64_layout_frame (void)
*** 8447,8456 ****
  	 stp reg3, reg4, [sp, 16]
  	 [sub sp, sp, below_hard_fp_saved_regs_size]
  	 [save SVE registers relative to SP]
! 	 sub sp, sp, outgoing_args_size  */
!       frame.initial_adjust = frame.hard_fp_offset;
!       frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size;
!       frame.final_adjust = crtl->outgoing_args_size;
      }
  
    /* Make sure the individual adjustments add up to the full frame size.  */
--- 8499,8527 ----
  	 stp reg3, reg4, [sp, 16]
  	 [sub sp, sp, below_hard_fp_saved_regs_size]
  	 [save SVE registers relative to SP]
! 	 sub sp, sp, bytes_below_saved_regs  */
!       frame.initial_adjust = frame.bytes_above_hard_fp;
!       frame.sve_callee_adjust = below_hard_fp_saved_regs_size;
!       frame.final_adjust = frame.bytes_below_saved_regs;
!     }
! 
!   /* The frame is allocated in pieces, with each non-final piece
!      including a register save at offset 0 that acts as a probe for
!      the following piece.  In addition, the save of the bottommost register
!      acts as a probe for callees and allocas.  Roll back any probes that
!      aren't needed.
! 
!      A probe isn't needed if it is associated with the final allocation
!      (including callees and allocas) that happens before the epilogue is
!      executed.  */
!   if (crtl->is_leaf
!       && !cfun->calls_alloca
!       && known_eq (frame.final_adjust, 0))
!     {
!       if (maybe_ne (frame.sve_callee_adjust, 0))
! 	frame.sve_save_and_probe = INVALID_REGNUM;
!       else
! 	frame.hard_fp_save_and_probe = INVALID_REGNUM;
      }
  
    /* Make sure the individual adjustments add up to the full frame size.  */
*************** aarch64_gen_storewb_pair (machine_mode m
*** 8531,8536 ****
--- 8602,8611 ----
        return gen_storewb_pairtf_di (base, base, reg, reg2,
  				    GEN_INT (-adjustment),
  				    GEN_INT (UNITS_PER_VREG - adjustment));
+     case E_V16QImode:
+       return gen_storewb_pairv16qi_di (base, base, reg, reg2,
+ 				       GEN_INT (-adjustment),
+ 				       GEN_INT (UNITS_PER_VREG - adjustment));
      default:
        gcc_unreachable ();
      }
*************** aarch64_gen_loadwb_pair (machine_mode mo
*** 8576,8581 ****
--- 8651,8660 ----
      case E_TFmode:
        return gen_loadwb_pairtf_di (base, base, reg, reg2, GEN_INT (adjustment),
  				   GEN_INT (UNITS_PER_VREG));
+     case E_V16QImode:
+       return gen_loadwb_pairv16qi_di (base, base, reg, reg2,
+ 				      GEN_INT (adjustment),
+ 				      GEN_INT (UNITS_PER_VREG));
      default:
        gcc_unreachable ();
      }
*************** aarch64_gen_load_pair (machine_mode mode
*** 8659,8664 ****
--- 8738,8746 ----
      case E_V4SImode:
        return gen_load_pairv4siv4si (reg1, mem1, reg2, mem2);
  
+     case E_V16QImode:
+       return gen_load_pairv16qiv16qi (reg1, mem1, reg2, mem2);
+ 
      default:
        gcc_unreachable ();
      }
*************** aarch64_add_cfa_expression (rtx_insn *in
*** 8754,8768 ****
  }
  
  /* Emit code to save the callee-saved registers from register number START
!    to LIMIT to the stack at the location starting at offset START_OFFSET,
!    skipping any write-back candidates if SKIP_WB is true.  HARD_FP_VALID_P
!    is true if the hard frame pointer has been set up.  */
  
  static void
! aarch64_save_callee_saves (poly_int64 start_offset,
  			   unsigned start, unsigned limit, bool skip_wb,
  			   bool hard_fp_valid_p)
  {
    rtx_insn *insn;
    unsigned regno;
    unsigned regno2;
--- 8836,8852 ----
  }
  
  /* Emit code to save the callee-saved registers from register number START
!    to LIMIT to the stack.  The stack pointer is currently BYTES_BELOW_SP
!    bytes above the bottom of the static frame.  Skip any write-back
!    candidates if SKIP_WB is true.  HARD_FP_VALID_P is true if the hard
!    frame pointer has been set up.  */
  
  static void
! aarch64_save_callee_saves (poly_int64 bytes_below_sp,
  			   unsigned start, unsigned limit, bool skip_wb,
  			   bool hard_fp_valid_p)
  {
+   aarch64_frame &frame = cfun->machine->frame;
    rtx_insn *insn;
    unsigned regno;
    unsigned regno2;
*************** aarch64_save_callee_saves (poly_int64 st
*** 8777,8784 ****
        bool frame_related_p = aarch64_emit_cfi_for_reg_p (regno);
  
        if (skip_wb
! 	  && (regno == cfun->machine->frame.wb_push_candidate1
! 	      || regno == cfun->machine->frame.wb_push_candidate2))
  	continue;
  
        if (cfun->machine->reg_is_wrapped_separately[regno])
--- 8861,8868 ----
        bool frame_related_p = aarch64_emit_cfi_for_reg_p (regno);
  
        if (skip_wb
! 	  && (regno == frame.wb_push_candidate1
! 	      || regno == frame.wb_push_candidate2))
  	continue;
  
        if (cfun->machine->reg_is_wrapped_separately[regno])
*************** aarch64_save_callee_saves (poly_int64 st
*** 8786,8792 ****
  
        machine_mode mode = aarch64_reg_save_mode (regno);
        reg = gen_rtx_REG (mode, regno);
!       offset = start_offset + cfun->machine->frame.reg_offset[regno];
        rtx base_rtx = stack_pointer_rtx;
        poly_int64 sp_offset = offset;
  
--- 8870,8876 ----
  
        machine_mode mode = aarch64_reg_save_mode (regno);
        reg = gen_rtx_REG (mode, regno);
!       offset = frame.reg_offset[regno] - bytes_below_sp;
        rtx base_rtx = stack_pointer_rtx;
        poly_int64 sp_offset = offset;
  
*************** aarch64_save_callee_saves (poly_int64 st
*** 8797,8805 ****
        else if (GP_REGNUM_P (regno)
  	       && (!offset.is_constant (&const_offset) || const_offset >= 512))
  	{
! 	  gcc_assert (known_eq (start_offset, 0));
! 	  poly_int64 fp_offset
! 	    = cfun->machine->frame.below_hard_fp_saved_regs_size;
  	  if (hard_fp_valid_p)
  	    base_rtx = hard_frame_pointer_rtx;
  	  else
--- 8881,8887 ----
        else if (GP_REGNUM_P (regno)
  	       && (!offset.is_constant (&const_offset) || const_offset >= 512))
  	{
! 	  poly_int64 fp_offset = frame.bytes_below_hard_fp - bytes_below_sp;
  	  if (hard_fp_valid_p)
  	    base_rtx = hard_frame_pointer_rtx;
  	  else
*************** aarch64_save_callee_saves (poly_int64 st
*** 8821,8828 ****
  	  && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit
  	  && !cfun->machine->reg_is_wrapped_separately[regno2]
  	  && known_eq (GET_MODE_SIZE (mode),
! 		       cfun->machine->frame.reg_offset[regno2]
! 		       - cfun->machine->frame.reg_offset[regno]))
  	{
  	  rtx reg2 = gen_rtx_REG (mode, regno2);
  	  rtx mem2;
--- 8903,8909 ----
  	  && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit
  	  && !cfun->machine->reg_is_wrapped_separately[regno2]
  	  && known_eq (GET_MODE_SIZE (mode),
! 		       frame.reg_offset[regno2] - frame.reg_offset[regno]))
  	{
  	  rtx reg2 = gen_rtx_REG (mode, regno2);
  	  rtx mem2;
*************** aarch64_save_callee_saves (poly_int64 st
*** 8864,8877 ****
  }
  
  /* Emit code to restore the callee registers from register number START
!    up to and including LIMIT.  Restore from the stack offset START_OFFSET,
!    skipping any write-back candidates if SKIP_WB is true.  Write the
!    appropriate REG_CFA_RESTORE notes into CFI_OPS.  */
  
  static void
! aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start,
  			      unsigned limit, bool skip_wb, rtx *cfi_ops)
  {
    unsigned regno;
    unsigned regno2;
    poly_int64 offset;
--- 8945,8960 ----
  }
  
  /* Emit code to restore the callee registers from register number START
!    up to and including LIMIT.  The stack pointer is currently BYTES_BELOW_SP
!    bytes above the bottom of the static frame.  Skip any write-back
!    candidates if SKIP_WB is true.  Write the appropriate REG_CFA_RESTORE
!    notes into CFI_OPS.  */
  
  static void
! aarch64_restore_callee_saves (poly_int64 bytes_below_sp, unsigned start,
  			      unsigned limit, bool skip_wb, rtx *cfi_ops)
  {
+   aarch64_frame &frame = cfun->machine->frame;
    unsigned regno;
    unsigned regno2;
    poly_int64 offset;
*************** aarch64_restore_callee_saves (poly_int64
*** 8888,8900 ****
        rtx reg, mem;
  
        if (skip_wb
! 	  && (regno == cfun->machine->frame.wb_pop_candidate1
! 	      || regno == cfun->machine->frame.wb_pop_candidate2))
  	continue;
  
        machine_mode mode = aarch64_reg_save_mode (regno);
        reg = gen_rtx_REG (mode, regno);
!       offset = start_offset + cfun->machine->frame.reg_offset[regno];
        rtx base_rtx = stack_pointer_rtx;
        if (mode == VNx2DImode && BYTES_BIG_ENDIAN)
  	aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg,
--- 8971,8983 ----
        rtx reg, mem;
  
        if (skip_wb
! 	  && (regno == frame.wb_pop_candidate1
! 	      || regno == frame.wb_pop_candidate2))
  	continue;
  
        machine_mode mode = aarch64_reg_save_mode (regno);
        reg = gen_rtx_REG (mode, regno);
!       offset = frame.reg_offset[regno] - bytes_below_sp;
        rtx base_rtx = stack_pointer_rtx;
        if (mode == VNx2DImode && BYTES_BIG_ENDIAN)
  	aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg,
*************** aarch64_restore_callee_saves (poly_int64
*** 8905,8912 ****
  	  && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit
  	  && !cfun->machine->reg_is_wrapped_separately[regno2]
  	  && known_eq (GET_MODE_SIZE (mode),
! 		       cfun->machine->frame.reg_offset[regno2]
! 		       - cfun->machine->frame.reg_offset[regno]))
  	{
  	  rtx reg2 = gen_rtx_REG (mode, regno2);
  	  rtx mem2;
--- 8988,8994 ----
  	  && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit
  	  && !cfun->machine->reg_is_wrapped_separately[regno2]
  	  && known_eq (GET_MODE_SIZE (mode),
! 		       frame.reg_offset[regno2] - frame.reg_offset[regno]))
  	{
  	  rtx reg2 = gen_rtx_REG (mode, regno2);
  	  rtx mem2;
*************** offset_12bit_unsigned_scaled_p (machine_
*** 9011,9016 ****
--- 9093,9099 ----
  static sbitmap
  aarch64_get_separate_components (void)
  {
+   aarch64_frame &frame = cfun->machine->frame;
    sbitmap components = sbitmap_alloc (LAST_SAVED_REGNUM + 1);
    bitmap_clear (components);
  
*************** aarch64_get_separate_components (void)
*** 9027,9046 ****
  	if (mode == VNx2DImode && BYTES_BIG_ENDIAN)
  	  continue;
  
! 	poly_int64 offset = cfun->machine->frame.reg_offset[regno];
! 
! 	/* If the register is saved in the first SVE save slot, we use
! 	   it as a stack probe for -fstack-clash-protection.  */
! 	if (flag_stack_clash_protection
! 	    && maybe_ne (cfun->machine->frame.below_hard_fp_saved_regs_size, 0)
! 	    && known_eq (offset, 0))
! 	  continue;
  
  	/* Get the offset relative to the register we'll use.  */
  	if (frame_pointer_needed)
! 	  offset -= cfun->machine->frame.below_hard_fp_saved_regs_size;
! 	else
! 	  offset += crtl->outgoing_args_size;
  
  	/* Check that we can access the stack slot of the register with one
  	   direct load with no adjustments needed.  */
--- 9110,9120 ----
  	if (mode == VNx2DImode && BYTES_BIG_ENDIAN)
  	  continue;
  
! 	poly_int64 offset = frame.reg_offset[regno];
  
  	/* Get the offset relative to the register we'll use.  */
  	if (frame_pointer_needed)
! 	  offset -= frame.bytes_below_hard_fp;
  
  	/* Check that we can access the stack slot of the register with one
  	   direct load with no adjustments needed.  */
*************** aarch64_get_separate_components (void)
*** 9057,9067 ****
    /* If the spare predicate register used by big-endian SVE code
       is call-preserved, it must be saved in the main prologue
       before any saves that use it.  */
!   if (cfun->machine->frame.spare_pred_reg != INVALID_REGNUM)
!     bitmap_clear_bit (components, cfun->machine->frame.spare_pred_reg);
  
!   unsigned reg1 = cfun->machine->frame.wb_push_candidate1;
!   unsigned reg2 = cfun->machine->frame.wb_push_candidate2;
    /* If registers have been chosen to be stored/restored with
       writeback don't interfere with them to avoid having to output explicit
       stack adjustment instructions.  */
--- 9131,9141 ----
    /* If the spare predicate register used by big-endian SVE code
       is call-preserved, it must be saved in the main prologue
       before any saves that use it.  */
!   if (frame.spare_pred_reg != INVALID_REGNUM)
!     bitmap_clear_bit (components, frame.spare_pred_reg);
  
!   unsigned reg1 = frame.wb_push_candidate1;
!   unsigned reg2 = frame.wb_push_candidate2;
    /* If registers have been chosen to be stored/restored with
       writeback don't interfere with them to avoid having to output explicit
       stack adjustment instructions.  */
*************** aarch64_get_separate_components (void)
*** 9072,9077 ****
--- 9146,9158 ----
  
    bitmap_clear_bit (components, LR_REGNUM);
    bitmap_clear_bit (components, SP_REGNUM);
+   if (flag_stack_clash_protection)
+     {
+       if (frame.sve_save_and_probe != INVALID_REGNUM)
+ 	bitmap_clear_bit (components, frame.sve_save_and_probe);
+       if (frame.hard_fp_save_and_probe != INVALID_REGNUM)
+ 	bitmap_clear_bit (components, frame.hard_fp_save_and_probe);
+     }
  
    return components;
  }
*************** aarch64_get_next_set_bit (sbitmap bmp, u
*** 9170,9175 ****
--- 9251,9257 ----
  static void
  aarch64_process_components (sbitmap components, bool prologue_p)
  {
+   aarch64_frame &frame = cfun->machine->frame;
    rtx ptr_reg = gen_rtx_REG (Pmode, frame_pointer_needed
  			     ? HARD_FRAME_POINTER_REGNUM
  			     : STACK_POINTER_REGNUM);
*************** aarch64_process_components (sbitmap comp
*** 9184,9194 ****
        machine_mode mode = aarch64_reg_save_mode (regno);
        
        rtx reg = gen_rtx_REG (mode, regno);
!       poly_int64 offset = cfun->machine->frame.reg_offset[regno];
        if (frame_pointer_needed)
! 	offset -= cfun->machine->frame.below_hard_fp_saved_regs_size;
!       else
! 	offset += crtl->outgoing_args_size;
  
        rtx addr = plus_constant (Pmode, ptr_reg, offset);
        rtx mem = gen_frame_mem (mode, addr);
--- 9266,9274 ----
        machine_mode mode = aarch64_reg_save_mode (regno);
        
        rtx reg = gen_rtx_REG (mode, regno);
!       poly_int64 offset = frame.reg_offset[regno];
        if (frame_pointer_needed)
! 	offset -= frame.bytes_below_hard_fp;
  
        rtx addr = plus_constant (Pmode, ptr_reg, offset);
        rtx mem = gen_frame_mem (mode, addr);
*************** aarch64_process_components (sbitmap comp
*** 9211,9224 ****
  	  break;
  	}
  
!       poly_int64 offset2 = cfun->machine->frame.reg_offset[regno2];
        /* The next register is not of the same class or its offset is not
  	 mergeable with the current one into a pair.  */
        if (aarch64_sve_mode_p (mode)
  	  || !satisfies_constraint_Ump (mem)
  	  || GP_REGNUM_P (regno) != GP_REGNUM_P (regno2)
  	  || (crtl->abi->id () == ARM_PCS_SIMD && FP_REGNUM_P (regno))
! 	  || maybe_ne ((offset2 - cfun->machine->frame.reg_offset[regno]),
  		       GET_MODE_SIZE (mode)))
  	{
  	  insn = emit_insn (set);
--- 9291,9304 ----
  	  break;
  	}
  
!       poly_int64 offset2 = frame.reg_offset[regno2];
        /* The next register is not of the same class or its offset is not
  	 mergeable with the current one into a pair.  */
        if (aarch64_sve_mode_p (mode)
  	  || !satisfies_constraint_Ump (mem)
  	  || GP_REGNUM_P (regno) != GP_REGNUM_P (regno2)
  	  || (crtl->abi->id () == ARM_PCS_SIMD && FP_REGNUM_P (regno))
! 	  || maybe_ne ((offset2 - frame.reg_offset[regno]),
  		       GET_MODE_SIZE (mode)))
  	{
  	  insn = emit_insn (set);
*************** aarch64_process_components (sbitmap comp
*** 9240,9248 ****
        /* REGNO2 can be saved/restored in a pair with REGNO.  */
        rtx reg2 = gen_rtx_REG (mode, regno2);
        if (frame_pointer_needed)
! 	offset2 -= cfun->machine->frame.below_hard_fp_saved_regs_size;
!       else
! 	offset2 += crtl->outgoing_args_size;
        rtx addr2 = plus_constant (Pmode, ptr_reg, offset2);
        rtx mem2 = gen_frame_mem (mode, addr2);
        rtx set2 = prologue_p ? gen_rtx_SET (mem2, reg2)
--- 9320,9326 ----
        /* REGNO2 can be saved/restored in a pair with REGNO.  */
        rtx reg2 = gen_rtx_REG (mode, regno2);
        if (frame_pointer_needed)
! 	offset2 -= frame.bytes_below_hard_fp;
        rtx addr2 = plus_constant (Pmode, ptr_reg, offset2);
        rtx mem2 = gen_frame_mem (mode, addr2);
        rtx set2 = prologue_p ? gen_rtx_SET (mem2, reg2)
*************** aarch64_stack_clash_protection_alloca_pr
*** 9316,9325 ****
     registers.  If POLY_SIZE is not large enough to require a probe this function
     will only adjust the stack.  When allocating the stack space
     FRAME_RELATED_P is then used to indicate if the allocation is frame related.
!    FINAL_ADJUSTMENT_P indicates whether we are allocating the outgoing
!    arguments.  If we are then we ensure that any allocation larger than the ABI
!    defined buffer needs a probe so that the invariant of having a 1KB buffer is
!    maintained.
  
     We emit barriers after each stack adjustment to prevent optimizations from
     breaking the invariant that we never drop the stack more than a page.  This
--- 9394,9403 ----
     registers.  If POLY_SIZE is not large enough to require a probe this function
     will only adjust the stack.  When allocating the stack space
     FRAME_RELATED_P is then used to indicate if the allocation is frame related.
!    FINAL_ADJUSTMENT_P indicates whether we are allocating the area below
!    the saved registers.  If we are then we ensure that any allocation
!    larger than the ABI defined buffer needs a probe so that the
!    invariant of having a 1KB buffer is maintained.
  
     We emit barriers after each stack adjustment to prevent optimizations from
     breaking the invariant that we never drop the stack more than a page.  This
*************** aarch64_allocate_and_probe_stack_space (
*** 9335,9379 ****
  					bool frame_related_p,
  					bool final_adjustment_p)
  {
    HOST_WIDE_INT guard_size
      = 1 << param_stack_clash_protection_guard_size;
    HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD;
    HOST_WIDE_INT min_probe_threshold
      = (final_adjustment_p
!        ? guard_used_by_caller
         : guard_size - guard_used_by_caller);
!   /* When doing the final adjustment for the outgoing arguments, take into
!      account any unprobed space there is above the current SP.  There are
!      two cases:
! 
!      - When saving SVE registers below the hard frame pointer, we force
!        the lowest save to take place in the prologue before doing the final
!        adjustment (i.e. we don't allow the save to be shrink-wrapped).
!        This acts as a probe at SP, so there is no unprobed space.
! 
!      - When there are no SVE register saves, we use the store of the link
!        register as a probe.  We can't assume that LR was saved at position 0
!        though, so treat any space below it as unprobed.  */
!   if (final_adjustment_p
!       && known_eq (cfun->machine->frame.below_hard_fp_saved_regs_size, 0))
!     {
!       poly_int64 lr_offset = cfun->machine->frame.reg_offset[LR_REGNUM];
!       if (known_ge (lr_offset, 0))
! 	min_probe_threshold -= lr_offset.to_constant ();
!       else
! 	gcc_assert (!flag_stack_clash_protection || known_eq (poly_size, 0));
!     }
! 
!   poly_int64 frame_size = cfun->machine->frame.frame_size;
  
    /* We should always have a positive probe threshold.  */
    gcc_assert (min_probe_threshold > 0);
  
    if (flag_stack_clash_protection && !final_adjustment_p)
      {
!       poly_int64 initial_adjust = cfun->machine->frame.initial_adjust;
!       poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust;
!       poly_int64 final_adjust = cfun->machine->frame.final_adjust;
  
        if (known_eq (frame_size, 0))
  	{
--- 9413,9438 ----
  					bool frame_related_p,
  					bool final_adjustment_p)
  {
+   aarch64_frame &frame = cfun->machine->frame;
    HOST_WIDE_INT guard_size
      = 1 << param_stack_clash_protection_guard_size;
    HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD;
+   HOST_WIDE_INT byte_sp_alignment = STACK_BOUNDARY / BITS_PER_UNIT;
+   gcc_assert (multiple_p (poly_size, byte_sp_alignment));
    HOST_WIDE_INT min_probe_threshold
      = (final_adjustment_p
!        ? guard_used_by_caller + byte_sp_alignment
         : guard_size - guard_used_by_caller);
!   poly_int64 frame_size = frame.frame_size;
  
    /* We should always have a positive probe threshold.  */
    gcc_assert (min_probe_threshold > 0);
  
    if (flag_stack_clash_protection && !final_adjustment_p)
      {
!       poly_int64 initial_adjust = frame.initial_adjust;
!       poly_int64 sve_callee_adjust = frame.sve_callee_adjust;
!       poly_int64 final_adjust = frame.final_adjust;
  
        if (known_eq (frame_size, 0))
  	{
*************** aarch64_allocate_and_probe_stack_space (
*** 9527,9533 ****
    /* Handle any residuals.  Residuals of at least MIN_PROBE_THRESHOLD have to
       be probed.  This maintains the requirement that each page is probed at
       least once.  For initial probing we probe only if the allocation is
!      more than GUARD_SIZE - buffer, and for the outgoing arguments we probe
       if the amount is larger than buffer.  GUARD_SIZE - buffer + buffer ==
       GUARD_SIZE.  This works that for any allocation that is large enough to
       trigger a probe here, we'll have at least one, and if they're not large
--- 9586,9592 ----
    /* Handle any residuals.  Residuals of at least MIN_PROBE_THRESHOLD have to
       be probed.  This maintains the requirement that each page is probed at
       least once.  For initial probing we probe only if the allocation is
!      more than GUARD_SIZE - buffer, and below the saved registers we probe
       if the amount is larger than buffer.  GUARD_SIZE - buffer + buffer ==
       GUARD_SIZE.  This works that for any allocation that is large enough to
       trigger a probe here, we'll have at least one, and if they're not large
*************** aarch64_allocate_and_probe_stack_space (
*** 9537,9552 ****
       are still safe.  */
    if (residual)
      {
!       HOST_WIDE_INT residual_probe_offset = guard_used_by_caller;
        /* If we're doing final adjustments, and we've done any full page
  	 allocations then any residual needs to be probed.  */
        if (final_adjustment_p && rounded_size != 0)
  	min_probe_threshold = 0;
-       /* If doing a small final adjustment, we always probe at offset 0.
- 	 This is done to avoid issues when LR is not at position 0 or when
- 	 the final adjustment is smaller than the probing offset.  */
-       else if (final_adjustment_p && rounded_size == 0)
- 	residual_probe_offset = 0;
  
        aarch64_sub_sp (temp1, temp2, residual, frame_related_p);
        if (residual >= min_probe_threshold)
--- 9596,9607 ----
       are still safe.  */
    if (residual)
      {
!       gcc_assert (guard_used_by_caller + byte_sp_alignment <= size);
! 
        /* If we're doing final adjustments, and we've done any full page
  	 allocations then any residual needs to be probed.  */
        if (final_adjustment_p && rounded_size != 0)
  	min_probe_threshold = 0;
  
        aarch64_sub_sp (temp1, temp2, residual, frame_related_p);
        if (residual >= min_probe_threshold)
*************** aarch64_allocate_and_probe_stack_space (
*** 9557,9564 ****
  		     HOST_WIDE_INT_PRINT_DEC " bytes, probing will be required."
  		     "\n", residual);
  
! 	    emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx,
! 					     residual_probe_offset));
  	  emit_insn (gen_blockage ());
  	}
      }
--- 9612,9619 ----
  		     HOST_WIDE_INT_PRINT_DEC " bytes, probing will be required."
  		     "\n", residual);
  
! 	  emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx,
! 					   guard_used_by_caller));
  	  emit_insn (gen_blockage ());
  	}
      }
*************** aarch64_epilogue_uses (int regno)
*** 9596,9615 ****
  	|  for register varargs         |
  	|                               |
  	+-------------------------------+
! 	|  local variables              | <-- frame_pointer_rtx
  	|                               |
  	+-------------------------------+
! 	|  padding                      | \
! 	+-------------------------------+  |
! 	|  callee-saved registers       |  | frame.saved_regs_size
! 	+-------------------------------+  |
! 	|  LR'                          |  |
! 	+-------------------------------+  |
! 	|  FP'                          |  |
! 	+-------------------------------+  |<- hard_frame_pointer_rtx (aligned)
! 	|  SVE vector registers         |  | \
! 	+-------------------------------+  |  | below_hard_fp_saved_regs_size
! 	|  SVE predicate registers      | /  /
  	+-------------------------------+
  	|  dynamic allocation           |
  	+-------------------------------+
--- 9651,9674 ----
  	|  for register varargs         |
  	|                               |
  	+-------------------------------+
! 	|  local variables (1)          | <-- frame_pointer_rtx
  	|                               |
  	+-------------------------------+
! 	|  padding (1)                  |
! 	+-------------------------------+
! 	|  callee-saved registers       |
! 	+-------------------------------+
! 	|  LR'                          |
! 	+-------------------------------+
! 	|  FP'                          |
! 	+-------------------------------+ <-- hard_frame_pointer_rtx (aligned)
! 	|  SVE vector registers         |
! 	+-------------------------------+
! 	|  SVE predicate registers      |
! 	+-------------------------------+
! 	|  local variables (2)          |
! 	+-------------------------------+
! 	|  padding (2)                  |
  	+-------------------------------+
  	|  dynamic allocation           |
  	+-------------------------------+
*************** aarch64_epilogue_uses (int regno)
*** 9620,9625 ****
--- 9679,9687 ----
  	+-------------------------------+
  	|                               | <-- stack_pointer_rtx (aligned)
  
+    The regions marked (1) and (2) are mutually exclusive.  (2) is used
+    when aarch64_save_regs_above_locals_p is true.
+ 
     Dynamic stack allocations via alloca() decrease stack_pointer_rtx
     but leave frame_pointer_rtx and hard_frame_pointer_rtx
     unchanged.
*************** aarch64_epilogue_uses (int regno)
*** 9634,9641 ****
     When probing is needed, we emit a probe at the start of the prologue
     and every PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE bytes thereafter.
  
!    We have to track how much space has been allocated and the only stores
!    to the stack we track as implicit probes are the FP/LR stores.
  
     For outgoing arguments we probe if the size is larger than 1KB, such that
     the ABI specified buffer is maintained for the next callee.
--- 9696,9703 ----
     When probing is needed, we emit a probe at the start of the prologue
     and every PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE bytes thereafter.
  
!    We can also use register saves as probes.  These are stored in
!    sve_save_and_probe and hard_fp_save_and_probe.
  
     For outgoing arguments we probe if the size is larger than 1KB, such that
     the ABI specified buffer is maintained for the next callee.
*************** aarch64_epilogue_uses (int regno)
*** 9662,9678 ****
  void
  aarch64_expand_prologue (void)
  {
!   poly_int64 frame_size = cfun->machine->frame.frame_size;
!   poly_int64 initial_adjust = cfun->machine->frame.initial_adjust;
!   HOST_WIDE_INT callee_adjust = cfun->machine->frame.callee_adjust;
!   poly_int64 final_adjust = cfun->machine->frame.final_adjust;
!   poly_int64 callee_offset = cfun->machine->frame.callee_offset;
!   poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust;
!   poly_int64 below_hard_fp_saved_regs_size
!     = cfun->machine->frame.below_hard_fp_saved_regs_size;
!   unsigned reg1 = cfun->machine->frame.wb_push_candidate1;
!   unsigned reg2 = cfun->machine->frame.wb_push_candidate2;
!   bool emit_frame_chain = cfun->machine->frame.emit_frame_chain;
    rtx_insn *insn;
  
    if (flag_stack_clash_protection && known_eq (callee_adjust, 0))
--- 9724,9738 ----
  void
  aarch64_expand_prologue (void)
  {
!   aarch64_frame &frame = cfun->machine->frame;
!   poly_int64 frame_size = frame.frame_size;
!   poly_int64 initial_adjust = frame.initial_adjust;
!   HOST_WIDE_INT callee_adjust = frame.callee_adjust;
!   poly_int64 final_adjust = frame.final_adjust;
!   poly_int64 sve_callee_adjust = frame.sve_callee_adjust;
!   unsigned reg1 = frame.wb_push_candidate1;
!   unsigned reg2 = frame.wb_push_candidate2;
!   bool emit_frame_chain = frame.emit_frame_chain;
    rtx_insn *insn;
  
    if (flag_stack_clash_protection && known_eq (callee_adjust, 0))
*************** aarch64_expand_prologue (void)
*** 9703,9709 ****
      }
  
    /* Push return address to shadow call stack.  */
!   if (cfun->machine->frame.is_scs_enabled)
      emit_insn (gen_scs_push ());
  
    if (flag_stack_usage_info)
--- 9763,9769 ----
      }
  
    /* Push return address to shadow call stack.  */
!   if (frame.is_scs_enabled)
      emit_insn (gen_scs_push ());
  
    if (flag_stack_usage_info)
*************** aarch64_expand_prologue (void)
*** 9740,9760 ****
    if (callee_adjust != 0)
      aarch64_push_regs (reg1, reg2, callee_adjust);
  
!   /* The offset of the frame chain record (if any) from the current SP.  */
!   poly_int64 chain_offset = (initial_adjust + callee_adjust
! 			     - cfun->machine->frame.hard_fp_offset);
!   gcc_assert (known_ge (chain_offset, 0));
! 
!   /* The offset of the bottom of the save area from the current SP.  */
!   poly_int64 saved_regs_offset = chain_offset - below_hard_fp_saved_regs_size;
  
    if (emit_frame_chain)
      {
        if (callee_adjust == 0)
  	{
  	  reg1 = R29_REGNUM;
  	  reg2 = R30_REGNUM;
! 	  aarch64_save_callee_saves (saved_regs_offset, reg1, reg2,
  				     false, false);
  	}
        else
--- 9800,9820 ----
    if (callee_adjust != 0)
      aarch64_push_regs (reg1, reg2, callee_adjust);
  
!   /* The offset of the current SP from the bottom of the static frame.  */
!   poly_int64 bytes_below_sp = frame_size - initial_adjust - callee_adjust;
  
    if (emit_frame_chain)
      {
+       /* The offset of the frame chain record (if any) from the current SP.  */
+       poly_int64 chain_offset = (initial_adjust + callee_adjust
+ 				 - frame.bytes_above_hard_fp);
+       gcc_assert (known_ge (chain_offset, 0));
+ 
        if (callee_adjust == 0)
  	{
  	  reg1 = R29_REGNUM;
  	  reg2 = R30_REGNUM;
! 	  aarch64_save_callee_saves (bytes_below_sp, reg1, reg2,
  				     false, false);
  	}
        else
*************** aarch64_expand_prologue (void)
*** 9779,9786 ****
  	     implicit.  */
  	  if (!find_reg_note (insn, REG_CFA_ADJUST_CFA, NULL_RTX))
  	    {
! 	      rtx src = plus_constant (Pmode, stack_pointer_rtx,
! 				       callee_offset);
  	      add_reg_note (insn, REG_CFA_ADJUST_CFA,
  			    gen_rtx_SET (hard_frame_pointer_rtx, src));
  	    }
--- 9839,9845 ----
  	     implicit.  */
  	  if (!find_reg_note (insn, REG_CFA_ADJUST_CFA, NULL_RTX))
  	    {
! 	      rtx src = plus_constant (Pmode, stack_pointer_rtx, chain_offset);
  	      add_reg_note (insn, REG_CFA_ADJUST_CFA,
  			    gen_rtx_SET (hard_frame_pointer_rtx, src));
  	    }
*************** aarch64_expand_prologue (void)
*** 9795,9801 ****
        emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx));
      }
  
!   aarch64_save_callee_saves (saved_regs_offset, R0_REGNUM, R30_REGNUM,
  			     callee_adjust != 0 || emit_frame_chain,
  			     emit_frame_chain);
    if (maybe_ne (sve_callee_adjust, 0))
--- 9854,9860 ----
        emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx));
      }
  
!   aarch64_save_callee_saves (bytes_below_sp, R0_REGNUM, R30_REGNUM,
  			     callee_adjust != 0 || emit_frame_chain,
  			     emit_frame_chain);
    if (maybe_ne (sve_callee_adjust, 0))
*************** aarch64_expand_prologue (void)
*** 9805,9822 ****
        aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx,
  					      sve_callee_adjust,
  					      !frame_pointer_needed, false);
!       saved_regs_offset += sve_callee_adjust;
      }
!   aarch64_save_callee_saves (saved_regs_offset, P0_REGNUM, P15_REGNUM,
  			     false, emit_frame_chain);
!   aarch64_save_callee_saves (saved_regs_offset, V0_REGNUM, V31_REGNUM,
  			     callee_adjust != 0 || emit_frame_chain,
  			     emit_frame_chain);
  
    /* We may need to probe the final adjustment if it is larger than the guard
       that is assumed by the called.  */
    aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, final_adjust,
  					  !frame_pointer_needed, true);
  }
  
  /* Return TRUE if we can use a simple_return insn.
--- 9864,9884 ----
        aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx,
  					      sve_callee_adjust,
  					      !frame_pointer_needed, false);
!       bytes_below_sp -= sve_callee_adjust;
      }
!   aarch64_save_callee_saves (bytes_below_sp, P0_REGNUM, P15_REGNUM,
  			     false, emit_frame_chain);
!   aarch64_save_callee_saves (bytes_below_sp, V0_REGNUM, V31_REGNUM,
  			     callee_adjust != 0 || emit_frame_chain,
  			     emit_frame_chain);
  
    /* We may need to probe the final adjustment if it is larger than the guard
       that is assumed by the called.  */
+   gcc_assert (known_eq (bytes_below_sp, final_adjust));
    aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, final_adjust,
  					  !frame_pointer_needed, true);
+   if (emit_frame_chain && maybe_ne (final_adjust, 0))
+     emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx));
  }
  
  /* Return TRUE if we can use a simple_return insn.
*************** aarch64_use_return_insn_p (void)
*** 9845,9860 ****
  void
  aarch64_expand_epilogue (bool for_sibcall)
  {
!   poly_int64 initial_adjust = cfun->machine->frame.initial_adjust;
!   HOST_WIDE_INT callee_adjust = cfun->machine->frame.callee_adjust;
!   poly_int64 final_adjust = cfun->machine->frame.final_adjust;
!   poly_int64 callee_offset = cfun->machine->frame.callee_offset;
!   poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust;
!   poly_int64 below_hard_fp_saved_regs_size
!     = cfun->machine->frame.below_hard_fp_saved_regs_size;
!   unsigned reg1 = cfun->machine->frame.wb_pop_candidate1;
!   unsigned reg2 = cfun->machine->frame.wb_pop_candidate2;
!   unsigned int last_gpr = (cfun->machine->frame.is_scs_enabled
  			   ? R29_REGNUM : R30_REGNUM);
    rtx cfi_ops = NULL;
    rtx_insn *insn;
--- 9907,9921 ----
  void
  aarch64_expand_epilogue (bool for_sibcall)
  {
!   aarch64_frame &frame = cfun->machine->frame;
!   poly_int64 initial_adjust = frame.initial_adjust;
!   HOST_WIDE_INT callee_adjust = frame.callee_adjust;
!   poly_int64 final_adjust = frame.final_adjust;
!   poly_int64 sve_callee_adjust = frame.sve_callee_adjust;
!   poly_int64 bytes_below_hard_fp = frame.bytes_below_hard_fp;
!   unsigned reg1 = frame.wb_pop_candidate1;
!   unsigned reg2 = frame.wb_pop_candidate2;
!   unsigned int last_gpr = (frame.is_scs_enabled
  			   ? R29_REGNUM : R30_REGNUM);
    rtx cfi_ops = NULL;
    rtx_insn *insn;
*************** aarch64_expand_epilogue (bool for_sibcal
*** 9888,9894 ****
    /* We need to add memory barrier to prevent read from deallocated stack.  */
    bool need_barrier_p
      = maybe_ne (get_frame_size ()
! 		+ cfun->machine->frame.saved_varargs_size, 0);
  
    /* Emit a barrier to prevent loads from a deallocated stack.  */
    if (maybe_gt (final_adjust, crtl->outgoing_args_size)
--- 9949,9955 ----
    /* We need to add memory barrier to prevent read from deallocated stack.  */
    bool need_barrier_p
      = maybe_ne (get_frame_size ()
! 		+ frame.saved_varargs_size, 0);
  
    /* Emit a barrier to prevent loads from a deallocated stack.  */
    if (maybe_gt (final_adjust, crtl->outgoing_args_size)
*************** aarch64_expand_epilogue (bool for_sibcal
*** 9909,9915 ****
         is restored on the instruction doing the writeback.  */
      aarch64_add_offset (Pmode, stack_pointer_rtx,
  			hard_frame_pointer_rtx,
! 			-callee_offset - below_hard_fp_saved_regs_size,
  			tmp1_rtx, tmp0_rtx, callee_adjust == 0);
    else
       /* The case where we need to re-use the register here is very rare, so
--- 9970,9976 ----
         is restored on the instruction doing the writeback.  */
      aarch64_add_offset (Pmode, stack_pointer_rtx,
  			hard_frame_pointer_rtx,
! 			-bytes_below_hard_fp + final_adjust,
  			tmp1_rtx, tmp0_rtx, callee_adjust == 0);
    else
       /* The case where we need to re-use the register here is very rare, so
*************** aarch64_expand_epilogue (bool for_sibcal
*** 9919,9927 ****
  
    /* Restore the vector registers before the predicate registers,
       so that we can use P4 as a temporary for big-endian SVE frames.  */
!   aarch64_restore_callee_saves (callee_offset, V0_REGNUM, V31_REGNUM,
  				callee_adjust != 0, &cfi_ops);
!   aarch64_restore_callee_saves (callee_offset, P0_REGNUM, P15_REGNUM,
  				false, &cfi_ops);
    if (maybe_ne (sve_callee_adjust, 0))
      aarch64_add_sp (NULL_RTX, NULL_RTX, sve_callee_adjust, true);
--- 9980,9988 ----
  
    /* Restore the vector registers before the predicate registers,
       so that we can use P4 as a temporary for big-endian SVE frames.  */
!   aarch64_restore_callee_saves (final_adjust, V0_REGNUM, V31_REGNUM,
  				callee_adjust != 0, &cfi_ops);
!   aarch64_restore_callee_saves (final_adjust, P0_REGNUM, P15_REGNUM,
  				false, &cfi_ops);
    if (maybe_ne (sve_callee_adjust, 0))
      aarch64_add_sp (NULL_RTX, NULL_RTX, sve_callee_adjust, true);
*************** aarch64_expand_epilogue (bool for_sibcal
*** 9929,9935 ****
    /* When shadow call stack is enabled, the scs_pop in the epilogue will
       restore x30, we don't need to restore x30 again in the traditional
       way.  */
!   aarch64_restore_callee_saves (callee_offset - sve_callee_adjust,
  				R0_REGNUM, last_gpr,
  				callee_adjust != 0, &cfi_ops);
  
--- 9990,9996 ----
    /* When shadow call stack is enabled, the scs_pop in the epilogue will
       restore x30, we don't need to restore x30 again in the traditional
       way.  */
!   aarch64_restore_callee_saves (final_adjust + sve_callee_adjust,
  				R0_REGNUM, last_gpr,
  				callee_adjust != 0, &cfi_ops);
  
*************** aarch64_expand_epilogue (bool for_sibcal
*** 9969,9975 ****
      }
  
    /* Pop return address from shadow call stack.  */
!   if (cfun->machine->frame.is_scs_enabled)
      {
        machine_mode mode = aarch64_reg_save_mode (R30_REGNUM);
        rtx reg = gen_rtx_REG (mode, R30_REGNUM);
--- 10030,10036 ----
      }
  
    /* Pop return address from shadow call stack.  */
!   if (frame.is_scs_enabled)
      {
        machine_mode mode = aarch64_reg_save_mode (R30_REGNUM);
        rtx reg = gen_rtx_REG (mode, R30_REGNUM);
*************** aarch64_can_eliminate (const int from AT
*** 12564,12587 ****
  poly_int64
  aarch64_initial_elimination_offset (unsigned from, unsigned to)
  {
    if (to == HARD_FRAME_POINTER_REGNUM)
      {
        if (from == ARG_POINTER_REGNUM)
! 	return cfun->machine->frame.hard_fp_offset;
  
        if (from == FRAME_POINTER_REGNUM)
! 	return cfun->machine->frame.hard_fp_offset
! 	       - cfun->machine->frame.locals_offset;
      }
  
    if (to == STACK_POINTER_REGNUM)
      {
        if (from == FRAME_POINTER_REGNUM)
! 	  return cfun->machine->frame.frame_size
! 		 - cfun->machine->frame.locals_offset;
      }
  
!   return cfun->machine->frame.frame_size;
  }
  
  
--- 12625,12648 ----
  poly_int64
  aarch64_initial_elimination_offset (unsigned from, unsigned to)
  {
+   aarch64_frame &frame = cfun->machine->frame;
+ 
    if (to == HARD_FRAME_POINTER_REGNUM)
      {
        if (from == ARG_POINTER_REGNUM)
! 	return frame.bytes_above_hard_fp;
  
        if (from == FRAME_POINTER_REGNUM)
! 	return frame.bytes_above_hard_fp - frame.bytes_above_locals;
      }
  
    if (to == STACK_POINTER_REGNUM)
      {
        if (from == FRAME_POINTER_REGNUM)
! 	return frame.frame_size - frame.bytes_above_locals;
      }
  
!   return frame.frame_size;
  }
  
  
*************** aarch64_expand_compare_and_swap (rtx ope
*** 22949,22954 ****
--- 23010,23017 ----
          rval = copy_to_mode_reg (r_mode, oldval);
        else
  	emit_move_insn (rval, gen_lowpart (r_mode, oldval));
+       if (mode == TImode)
+ 	newval = force_reg (mode, newval);
  
        emit_insn (gen_aarch64_compare_and_swap_lse (mode, rval, mem,
  						   newval, mod_s));
*************** aarch64_copy_one_block_and_progress_poin
*** 24686,24695 ****
    *dst = aarch64_progress_pointer (*dst);
  }
  
! /* Expand a cpymem using the MOPS extension.  OPERANDS are taken
!    from the cpymem pattern.  Return true iff we succeeded.  */
! static bool
! aarch64_expand_cpymem_mops (rtx *operands)
  {
    if (!TARGET_MOPS)
      return false;
--- 24749,24759 ----
    *dst = aarch64_progress_pointer (*dst);
  }
  
! /* Expand a cpymem/movmem using the MOPS extension.  OPERANDS are taken
!    from the cpymem/movmem pattern.  IS_MEMMOVE is true if this is a memmove
!    rather than memcpy.  Return true iff we succeeded.  */
! bool
! aarch64_expand_cpymem_mops (rtx *operands, bool is_memmove = false)
  {
    if (!TARGET_MOPS)
      return false;
*************** aarch64_expand_cpymem_mops (rtx *operand
*** 24701,24708 ****
    rtx dst_mem = replace_equiv_address (operands[0], dst_addr);
    rtx src_mem = replace_equiv_address (operands[1], src_addr);
    rtx sz_reg = copy_to_mode_reg (DImode, operands[2]);
!   emit_insn (gen_aarch64_cpymemdi (dst_mem, src_mem, sz_reg));
! 
    return true;
  }
  
--- 24765,24774 ----
    rtx dst_mem = replace_equiv_address (operands[0], dst_addr);
    rtx src_mem = replace_equiv_address (operands[1], src_addr);
    rtx sz_reg = copy_to_mode_reg (DImode, operands[2]);
!   if (is_memmove)
!     emit_insn (gen_aarch64_movmemdi (dst_mem, src_mem, sz_reg));
!   else
!     emit_insn (gen_aarch64_cpymemdi (dst_mem, src_mem, sz_reg));
    return true;
  }
  
*************** aarch64_operands_ok_for_ldpstp (rtx *ope
*** 25981,25991 ****
    gcc_assert (known_eq (GET_MODE_SIZE (GET_MODE (mem_1)),
  			GET_MODE_SIZE (GET_MODE (mem_2))));
  
!   /* One of the memory accesses must be a mempair operand.
!      If it is not the first one, they need to be swapped by the
!      peephole.  */
!   if (!aarch64_mem_pair_operand (mem_1, GET_MODE (mem_1))
!        && !aarch64_mem_pair_operand (mem_2, GET_MODE (mem_2)))
      return false;
  
    if (REG_P (reg_1) && FP_REGNUM_P (REGNO (reg_1)))
--- 26047,26055 ----
    gcc_assert (known_eq (GET_MODE_SIZE (GET_MODE (mem_1)),
  			GET_MODE_SIZE (GET_MODE (mem_2))));
  
!   /* The lower memory access must be a mem-pair operand.  */
!   rtx lower_mem = reversed ? mem_2 : mem_1;
!   if (!aarch64_mem_pair_operand (lower_mem, GET_MODE (lower_mem)))
      return false;
  
    if (REG_P (reg_1) && FP_REGNUM_P (REGNO (reg_1)))
*************** aarch64_simd_clone_compute_vecsize_and_s
*** 26836,26842 ****
  					tree base_type, int num)
  {
    tree t, ret_type;
!   unsigned int elt_bits, count;
    unsigned HOST_WIDE_INT const_simdlen;
    poly_uint64 vec_bits;
  
--- 26900,26906 ----
  					tree base_type, int num)
  {
    tree t, ret_type;
!   unsigned int elt_bits, count = 0;
    unsigned HOST_WIDE_INT const_simdlen;
    poly_uint64 vec_bits;
  
*************** aarch64_simd_clone_compute_vecsize_and_s
*** 26904,26911 ****
    elt_bits = GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type));
    if (known_eq (clonei->simdlen, 0U))
      {
!       count = 2;
!       vec_bits = (num == 0 ? 64 : 128);
        clonei->simdlen = exact_div (vec_bits, elt_bits);
      }
    else
--- 26968,26984 ----
    elt_bits = GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type));
    if (known_eq (clonei->simdlen, 0U))
      {
!       /* We don't support simdlen == 1.  */
!       if (known_eq (elt_bits, 64))
! 	{
! 	  count = 1;
! 	  vec_bits = 128;
! 	}
!       else
! 	{
! 	  count = 2;
! 	  vec_bits = (num == 0 ? 64 : 128);
! 	}
        clonei->simdlen = exact_div (vec_bits, elt_bits);
      }
    else
*************** aarch64_simd_clone_compute_vecsize_and_s
*** 26923,26928 ****
--- 26996,27002 ----
  	  return 0;
  	}
      }
+ 
    clonei->vecsize_int = vec_bits;
    clonei->vecsize_float = vec_bits;
    return count;
diff -Nrcpad gcc-12.3.0/gcc/config/aarch64/aarch64.h gcc-12.4.0/gcc/config/aarch64/aarch64.h
*** gcc-12.3.0/gcc/config/aarch64/aarch64.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/aarch64/aarch64.h	Thu Jun 20 08:08:06 2024
*************** extern unsigned aarch64_architecture_ver
*** 268,274 ****
    (AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_V8_6 | AARCH64_FL_FPSIMD \
     | AARCH64_FL_I8MM | AARCH64_FL_BF16)
  #define AARCH64_FL_FOR_ARCH8_7			\
!   (AARCH64_FL_FOR_ARCH8_6 | AARCH64_FL_V8_7 | AARCH64_FL_LS64)
  #define AARCH64_FL_FOR_ARCH8_8			\
    (AARCH64_FL_FOR_ARCH8_7 | AARCH64_FL_V8_8 | AARCH64_FL_MOPS)
  
--- 268,274 ----
    (AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_V8_6 | AARCH64_FL_FPSIMD \
     | AARCH64_FL_I8MM | AARCH64_FL_BF16)
  #define AARCH64_FL_FOR_ARCH8_7			\
!   (AARCH64_FL_FOR_ARCH8_6 | AARCH64_FL_V8_7)
  #define AARCH64_FL_FOR_ARCH8_8			\
    (AARCH64_FL_FOR_ARCH8_7 | AARCH64_FL_V8_8 | AARCH64_FL_MOPS)
  
*************** extern enum aarch64_processor aarch64_tu
*** 860,865 ****
--- 860,868 ----
  #ifdef HAVE_POLY_INT_H
  struct GTY (()) aarch64_frame
  {
+   /* The offset from the bottom of the static frame (the bottom of the
+      outgoing arguments) of each register save slot, or -2 if no save is
+      needed.  */
    poly_int64 reg_offset[LAST_SAVED_REGNUM + 1];
  
    /* The number of extra stack bytes taken up by register varargs.
*************** struct GTY (()) aarch64_frame
*** 868,892 ****
       STACK_BOUNDARY.  */
    HOST_WIDE_INT saved_varargs_size;
  
!   /* The size of the callee-save registers with a slot in REG_OFFSET.  */
!   poly_int64 saved_regs_size;
  
!   /* The size of the callee-save registers with a slot in REG_OFFSET that
!      are saved below the hard frame pointer.  */
!   poly_int64 below_hard_fp_saved_regs_size;
  
!   /* Offset from the base of the frame (incomming SP) to the
!      top of the locals area.  This value is always a multiple of
       STACK_BOUNDARY.  */
!   poly_int64 locals_offset;
  
!   /* Offset from the base of the frame (incomming SP) to the
!      hard_frame_pointer.  This value is always a multiple of
       STACK_BOUNDARY.  */
!   poly_int64 hard_fp_offset;
  
!   /* The size of the frame.  This value is the offset from base of the
!      frame (incomming SP) to the stack_pointer.  This value is always
       a multiple of STACK_BOUNDARY.  */
    poly_int64 frame_size;
  
--- 871,898 ----
       STACK_BOUNDARY.  */
    HOST_WIDE_INT saved_varargs_size;
  
!   /* The number of bytes between the bottom of the static frame (the bottom
!      of the outgoing arguments) and the bottom of the register save area.
!      This value is always a multiple of STACK_BOUNDARY.  */
!   poly_int64 bytes_below_saved_regs;
  
!   /* The number of bytes between the bottom of the static frame (the bottom
!      of the outgoing arguments) and the hard frame pointer.  This value is
!      always a multiple of STACK_BOUNDARY.  */
!   poly_int64 bytes_below_hard_fp;
  
!   /* The number of bytes between the top of the locals area and the top
!      of the frame (the incomming SP).  This value is always a multiple of
       STACK_BOUNDARY.  */
!   poly_int64 bytes_above_locals;
  
!   /* The number of bytes between the hard_frame_pointer and the top of
!      the frame (the incomming SP).  This value is always a multiple of
       STACK_BOUNDARY.  */
!   poly_int64 bytes_above_hard_fp;
  
!   /* The size of the frame, i.e. the number of bytes between the bottom
!      of the outgoing arguments and the incoming SP.  This value is always
       a multiple of STACK_BOUNDARY.  */
    poly_int64 frame_size;
  
*************** struct GTY (()) aarch64_frame
*** 897,906 ****
       It is zero when no push is used.  */
    HOST_WIDE_INT callee_adjust;
  
-   /* The offset from SP to the callee-save registers after initial_adjust.
-      It may be non-zero if no push is used (ie. callee_adjust == 0).  */
-   poly_int64 callee_offset;
- 
    /* The size of the stack adjustment before saving or after restoring
       SVE registers.  */
    poly_int64 sve_callee_adjust;
--- 903,908 ----
*************** struct GTY (()) aarch64_frame
*** 948,953 ****
--- 950,963 ----
       This is the register they should use.  */
    unsigned spare_pred_reg;
  
+   /* An SVE register that is saved below the hard frame pointer and that acts
+      as a probe for later allocations, or INVALID_REGNUM if none.  */
+   unsigned sve_save_and_probe;
+ 
+   /* A register that is saved at the hard frame pointer and that acts
+      as a probe for later allocations, or INVALID_REGNUM if none.  */
+   unsigned hard_fp_save_and_probe;
+ 
    bool laid_out;
  
    /* True if shadow call stack should be enabled for the current function.  */
diff -Nrcpad gcc-12.3.0/gcc/config/aarch64/aarch64.md gcc-12.4.0/gcc/config/aarch64/aarch64.md
*** gcc-12.3.0/gcc/config/aarch64/aarch64.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/aarch64/aarch64.md	Thu Jun 20 08:08:06 2024
***************
*** 1159,1167 ****
  {
    int i;
  
    /* Untyped calls always use the default ABI.  It's only possible to use
       ABI variants if we know the type of the target function.  */
!   emit_call_insn (gen_call (operands[0], const0_rtx, const0_rtx));
  
    for (i = 0; i < XVECLEN (operands[2], 0); i++)
      {
--- 1159,1185 ----
  {
    int i;
  
+   /* Generate a PARALLEL that contains all of the register results.
+      The offsets are somewhat arbitrary, since we don't know the
+      actual return type.  The main thing we need to avoid is having
+      overlapping byte ranges, since those might give the impression
+      that two registers are known to have data in common.  */
+   rtvec rets = rtvec_alloc (XVECLEN (operands[2], 0));
+   poly_int64 offset = 0;
+   for (i = 0; i < XVECLEN (operands[2], 0); i++)
+     {
+       rtx reg = SET_SRC (XVECEXP (operands[2], 0, i));
+       gcc_assert (REG_P (reg));
+       rtx offset_rtx = gen_int_mode (offset, Pmode);
+       rtx piece = gen_rtx_EXPR_LIST (VOIDmode, reg, offset_rtx);
+       RTVEC_ELT (rets, i) = piece;
+       offset += GET_MODE_SIZE (GET_MODE (reg));
+     }
+   rtx ret = gen_rtx_PARALLEL (VOIDmode, rets);
+ 
    /* Untyped calls always use the default ABI.  It's only possible to use
       ABI variants if we know the type of the target function.  */
!   emit_call_insn (gen_call_value (ret, operands[0], const0_rtx, const0_rtx));
  
    for (i = 0; i < XVECLEN (operands[2], 0); i++)
      {
***************
*** 1627,1633 ****
  }
  )
  
! (define_insn "aarch64_movmemdi"
    [(parallel [
     (set (match_operand:DI 2 "register_operand" "+&r") (const_int 0))
     (clobber (match_operand:DI 0 "register_operand" "+&r"))
--- 1645,1666 ----
  }
  )
  
! (define_expand "aarch64_movmemdi"
!   [(parallel
!      [(set (match_operand 2) (const_int 0))
!       (clobber (match_dup 3))
!       (clobber (match_dup 4))
!       (clobber (reg:CC CC_REGNUM))
!       (set (match_operand 0)
! 	   (unspec:BLK [(match_operand 1) (match_dup 2)] UNSPEC_MOVMEM))])]
!   "TARGET_MOPS"
!   {
!     operands[3] = XEXP (operands[0], 0);
!     operands[4] = XEXP (operands[1], 0);
!   }
! )
! 
! (define_insn "*aarch64_movmemdi"
    [(parallel [
     (set (match_operand:DI 2 "register_operand" "+&r") (const_int 0))
     (clobber (match_operand:DI 0 "register_operand" "+&r"))
***************
*** 1660,1676 ****
         && INTVAL (sz_reg) < aarch64_mops_memmove_size_threshold)
       FAIL;
  
!    rtx addr_dst = XEXP (operands[0], 0);
!    rtx addr_src = XEXP (operands[1], 0);
! 
!    if (!REG_P (sz_reg))
!      sz_reg = force_reg (DImode, sz_reg);
!    if (!REG_P (addr_dst))
!      addr_dst = force_reg (DImode, addr_dst);
!    if (!REG_P (addr_src))
!      addr_src = force_reg (DImode, addr_src);
!    emit_insn (gen_aarch64_movmemdi (addr_dst, addr_src, sz_reg));
!    DONE;
  }
  )
  
--- 1693,1701 ----
         && INTVAL (sz_reg) < aarch64_mops_memmove_size_threshold)
       FAIL;
  
!   if (aarch64_expand_cpymem_mops (operands, true))
!     DONE;
!   FAIL;
  }
  )
  
***************
*** 1849,1865 ****
    [(set_attr "type" "neon_load1_2reg")]
  )
  
! (define_insn "loadwb_pair<TX:mode>_<P:mode>"
    [(parallel
      [(set (match_operand:P 0 "register_operand" "=k")
!           (plus:P (match_operand:P 1 "register_operand" "0")
!                   (match_operand:P 4 "aarch64_mem_pair_offset" "n")))
!      (set (match_operand:TX 2 "register_operand" "=w")
!           (mem:TX (match_dup 1)))
!      (set (match_operand:TX 3 "register_operand" "=w")
!           (mem:TX (plus:P (match_dup 1)
  			  (match_operand:P 5 "const_int_operand" "n"))))])]
!   "TARGET_SIMD && INTVAL (operands[5]) == GET_MODE_SIZE (<TX:MODE>mode)"
    "ldp\\t%q2, %q3, [%1], %4"
    [(set_attr "type" "neon_ldp_q")]
  )
--- 1874,1891 ----
    [(set_attr "type" "neon_load1_2reg")]
  )
  
! (define_insn "loadwb_pair<TX_V16QI:mode>_<P:mode>"
    [(parallel
      [(set (match_operand:P 0 "register_operand" "=k")
! 	  (plus:P (match_operand:P 1 "register_operand" "0")
! 		  (match_operand:P 4 "aarch64_mem_pair_offset" "n")))
!      (set (match_operand:TX_V16QI 2 "register_operand" "=w")
! 	  (mem:TX_V16QI (match_dup 1)))
!      (set (match_operand:TX_V16QI 3 "register_operand" "=w")
! 	  (mem:TX_V16QI (plus:P (match_dup 1)
  			  (match_operand:P 5 "const_int_operand" "n"))))])]
!   "TARGET_SIMD
!    && known_eq (INTVAL (operands[5]), GET_MODE_SIZE (<TX_V16QI:MODE>mode))"
    "ldp\\t%q2, %q3, [%1], %4"
    [(set_attr "type" "neon_ldp_q")]
  )
***************
*** 1898,1917 ****
    [(set_attr "type" "neon_store1_2reg<q>")]
  )
  
! (define_insn "storewb_pair<TX:mode>_<P:mode>"
    [(parallel
      [(set (match_operand:P 0 "register_operand" "=&k")
!           (plus:P (match_operand:P 1 "register_operand" "0")
!                   (match_operand:P 4 "aarch64_mem_pair_offset" "n")))
!      (set (mem:TX (plus:P (match_dup 0)
  			  (match_dup 4)))
!           (match_operand:TX 2 "register_operand" "w"))
!      (set (mem:TX (plus:P (match_dup 0)
  			  (match_operand:P 5 "const_int_operand" "n")))
!           (match_operand:TX 3 "register_operand" "w"))])]
    "TARGET_SIMD
!    && INTVAL (operands[5])
!       == INTVAL (operands[4]) + GET_MODE_SIZE (<TX:MODE>mode)"
    "stp\\t%q2, %q3, [%0, %4]!"
    [(set_attr "type" "neon_stp_q")]
  )
--- 1924,1943 ----
    [(set_attr "type" "neon_store1_2reg<q>")]
  )
  
! (define_insn "storewb_pair<TX_V16QI:mode>_<P:mode>"
    [(parallel
      [(set (match_operand:P 0 "register_operand" "=&k")
! 	  (plus:P (match_operand:P 1 "register_operand" "0")
! 		  (match_operand:P 4 "aarch64_mem_pair_offset" "n")))
!      (set (mem:TX_V16QI (plus:P (match_dup 0)
  			  (match_dup 4)))
! 	  (match_operand:TX_V16QI 2 "register_operand" "w"))
!      (set (mem:TX_V16QI (plus:P (match_dup 0)
  			  (match_operand:P 5 "const_int_operand" "n")))
! 	  (match_operand:TX_V16QI 3 "register_operand" "w"))])]
    "TARGET_SIMD
!    && known_eq (INTVAL (operands[5]),
! 		INTVAL (operands[4]) + GET_MODE_SIZE (<TX_V16QI:MODE>mode))"
    "stp\\t%q2, %q3, [%0, %4]!"
    [(set_attr "type" "neon_stp_q")]
  )
***************
*** 7668,7676 ****
  ;; Load/Store 64-bit (LS64) instructions.
  (define_insn "ld64b"
    [(set (match_operand:V8DI 0 "register_operand" "=r")
!         (unspec_volatile:V8DI
!           [(mem:V8DI (match_operand:DI 1 "register_operand" "r"))]
!             UNSPEC_LD64B)
    )]
    "TARGET_LS64"
    "ld64b\\t%0, [%1]"
--- 7694,7702 ----
  ;; Load/Store 64-bit (LS64) instructions.
  (define_insn "ld64b"
    [(set (match_operand:V8DI 0 "register_operand" "=r")
! 	(unspec_volatile:V8DI
! 	  [(mem:V8DI (match_operand:DI 1 "register_operand" "r"))]
! 	    UNSPEC_LD64B)
    )]
    "TARGET_LS64"
    "ld64b\\t%0, [%1]"
***************
*** 7678,7686 ****
  )
  
  (define_insn "st64b"
!   [(set (mem:V8DI (match_operand:DI 0 "register_operand" "=r"))
!         (unspec_volatile:V8DI [(match_operand:V8DI 1 "register_operand" "r")]
!             UNSPEC_ST64B)
    )]
    "TARGET_LS64"
    "st64b\\t%1, [%0]"
--- 7704,7712 ----
  )
  
  (define_insn "st64b"
!   [(set (mem:V8DI (match_operand:DI 0 "register_operand" "r"))
! 	(unspec_volatile:V8DI [(match_operand:V8DI 1 "register_operand" "r")]
! 	    UNSPEC_ST64B)
    )]
    "TARGET_LS64"
    "st64b\\t%1, [%0]"
***************
*** 7689,7698 ****
  
  (define_insn "st64bv"
    [(set (match_operand:DI 0 "register_operand" "=r")
!         (unspec_volatile:DI [(const_int 0)] UNSPEC_ST64BV_RET))
     (set (mem:V8DI (match_operand:DI 1 "register_operand" "r"))
!         (unspec_volatile:V8DI [(match_operand:V8DI 2 "register_operand" "r")]
!             UNSPEC_ST64BV)
    )]
    "TARGET_LS64"
    "st64bv\\t%0, %2, [%1]"
--- 7715,7724 ----
  
  (define_insn "st64bv"
    [(set (match_operand:DI 0 "register_operand" "=r")
! 	(unspec_volatile:DI [(const_int 0)] UNSPEC_ST64BV_RET))
     (set (mem:V8DI (match_operand:DI 1 "register_operand" "r"))
! 	(unspec_volatile:V8DI [(match_operand:V8DI 2 "register_operand" "r")]
! 	    UNSPEC_ST64BV)
    )]
    "TARGET_LS64"
    "st64bv\\t%0, %2, [%1]"
***************
*** 7701,7710 ****
  
  (define_insn "st64bv0"
    [(set (match_operand:DI 0 "register_operand" "=r")
!         (unspec_volatile:DI [(const_int 0)] UNSPEC_ST64BV0_RET))
     (set (mem:V8DI (match_operand:DI 1 "register_operand" "r"))
!         (unspec_volatile:V8DI [(match_operand:V8DI 2 "register_operand" "r")]
!             UNSPEC_ST64BV0)
    )]
    "TARGET_LS64"
    "st64bv0\\t%0, %2, [%1]"
--- 7727,7736 ----
  
  (define_insn "st64bv0"
    [(set (match_operand:DI 0 "register_operand" "=r")
! 	(unspec_volatile:DI [(const_int 0)] UNSPEC_ST64BV0_RET))
     (set (mem:V8DI (match_operand:DI 1 "register_operand" "r"))
! 	(unspec_volatile:V8DI [(match_operand:V8DI 2 "register_operand" "r")]
! 	    UNSPEC_ST64BV0)
    )]
    "TARGET_LS64"
    "st64bv0\\t%0, %2, [%1]"
diff -Nrcpad gcc-12.3.0/gcc/config/aarch64/arm_acle.h gcc-12.4.0/gcc/config/aarch64/arm_acle.h
*** gcc-12.3.0/gcc/config/aarch64/arm_acle.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/aarch64/arm_acle.h	Thu Jun 20 08:08:06 2024
*************** __ttest (void)
*** 270,309 ****
  #endif
  
  #ifdef __ARM_FEATURE_LS64
- #pragma GCC push_options
- #pragma GCC target ("+nothing+ls64")
- 
  typedef __arm_data512_t data512_t;
- 
- __extension__ extern __inline data512_t
- __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
- __arm_ld64b (const void *__addr)
- {
-   return __builtin_aarch64_ld64b (__addr);
- }
- 
- __extension__ extern __inline void
- __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
- __arm_st64b (void *__addr, data512_t __value)
- {
-   __builtin_aarch64_st64b (__addr, __value);
- }
- 
- __extension__ extern __inline uint64_t
- __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
- __arm_st64bv (void *__addr, data512_t __value)
- {
-   return __builtin_aarch64_st64bv (__addr, __value);
- }
- 
- __extension__ extern __inline uint64_t
- __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
- __arm_st64bv0 (void *__addr, data512_t __value)
- {
-   return __builtin_aarch64_st64bv0 (__addr, __value);
- }
- 
- #pragma GCC pop_options
  #endif
  
  #pragma GCC push_options
--- 270,276 ----
diff -Nrcpad gcc-12.3.0/gcc/config/aarch64/iterators.md gcc-12.4.0/gcc/config/aarch64/iterators.md
*** gcc-12.3.0/gcc/config/aarch64/iterators.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/aarch64/iterators.md	Thu Jun 20 08:08:06 2024
***************
*** 303,308 ****
--- 303,311 ----
  
  (define_mode_iterator TX [TI TF])
  
+ ;; TX plus V16QImode.
+ (define_mode_iterator TX_V16QI [TI TF V16QI])
+ 
  ;; Advanced SIMD opaque structure modes.
  (define_mode_iterator VSTRUCT [OI CI XI])
  
diff -Nrcpad gcc-12.3.0/gcc/config/alpha/alpha.cc gcc-12.4.0/gcc/config/alpha/alpha.cc
*** gcc-12.3.0/gcc/config/alpha/alpha.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/alpha/alpha.cc	Thu Jun 20 08:08:06 2024
*************** static rtx
*** 2070,2075 ****
--- 2070,2077 ----
  alpha_emit_set_long_const (rtx target, HOST_WIDE_INT c1)
  {
    HOST_WIDE_INT d1, d2, d3, d4;
+   machine_mode mode = GET_MODE (target);
+   rtx orig_target = target;
  
    /* Decompose the entire word */
  
*************** alpha_emit_set_long_const (rtx target, H
*** 2082,2087 ****
--- 2084,2092 ----
    d4 = ((c1 & 0xffffffff) ^ 0x80000000) - 0x80000000;
    gcc_assert (c1 == d4);
  
+   if (mode != DImode)
+     target = gen_lowpart (DImode, target);
+ 
    /* Construct the high word */
    if (d4)
      {
*************** alpha_emit_set_long_const (rtx target, H
*** 2101,2107 ****
    if (d1)
      emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d1)));
  
!   return target;
  }
  
  /* Given an integral CONST_INT or CONST_VECTOR, return the low 64 bits.  */
--- 2106,2112 ----
    if (d1)
      emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d1)));
  
!   return orig_target;
  }
  
  /* Given an integral CONST_INT or CONST_VECTOR, return the low 64 bits.  */
diff -Nrcpad gcc-12.3.0/gcc/config/alpha/alpha.md gcc-12.4.0/gcc/config/alpha/alpha.md
*** gcc-12.3.0/gcc/config/alpha/alpha.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/alpha/alpha.md	Thu Jun 20 08:08:06 2024
***************
*** 756,762 ****
  	(sign_extend:DI (match_operand:SI 2 "nonimmediate_operand")))
     (parallel [(set (match_dup 5)
  		   (sign_extend:DI
! 		    (any_divmod:SI (match_dup 3) (match_dup 4))))
  	      (clobber (reg:DI 23))
  	      (clobber (reg:DI 28))])
     (set (match_operand:SI 0 "nonimmediate_operand")
--- 756,763 ----
  	(sign_extend:DI (match_operand:SI 2 "nonimmediate_operand")))
     (parallel [(set (match_dup 5)
  		   (sign_extend:DI
! 		    (any_divmod:SI (truncate:SI (match_dup 3))
! 				   (truncate:SI (match_dup 4)))))
  	      (clobber (reg:DI 23))
  	      (clobber (reg:DI 28))])
     (set (match_operand:SI 0 "nonimmediate_operand")
***************
*** 782,790 ****
  
  (define_insn_and_split "*divmodsi_internal_er"
    [(set (match_operand:DI 0 "register_operand" "=c")
! 	(sign_extend:DI (match_operator:SI 3 "divmod_operator"
! 			[(match_operand:DI 1 "register_operand" "a")
! 			 (match_operand:DI 2 "register_operand" "b")])))
     (clobber (reg:DI 23))
     (clobber (reg:DI 28))]
    "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF"
--- 783,792 ----
  
  (define_insn_and_split "*divmodsi_internal_er"
    [(set (match_operand:DI 0 "register_operand" "=c")
! 	(sign_extend:DI
! 	 (match_operator:SI 3 "divmod_operator"
! 	  [(truncate:SI (match_operand:DI 1 "register_operand" "a"))
! 	   (truncate:SI (match_operand:DI 2 "register_operand" "b"))])))
     (clobber (reg:DI 23))
     (clobber (reg:DI 28))]
    "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF"
***************
*** 826,833 ****
  (define_insn "*divmodsi_internal_er_1"
    [(set (match_operand:DI 0 "register_operand" "=c")
  	(sign_extend:DI (match_operator:SI 3 "divmod_operator"
!                         [(match_operand:DI 1 "register_operand" "a")
!                          (match_operand:DI 2 "register_operand" "b")])))
     (use (match_operand:DI 4 "register_operand" "c"))
     (use (match_operand 5 "const_int_operand"))
     (clobber (reg:DI 23))
--- 828,835 ----
  (define_insn "*divmodsi_internal_er_1"
    [(set (match_operand:DI 0 "register_operand" "=c")
  	(sign_extend:DI (match_operator:SI 3 "divmod_operator"
! 	 [(truncate:SI (match_operand:DI 1 "register_operand" "a"))
! 	  (truncate:SI (match_operand:DI 2 "register_operand" "b"))])))
     (use (match_operand:DI 4 "register_operand" "c"))
     (use (match_operand 5 "const_int_operand"))
     (clobber (reg:DI 23))
***************
*** 839,847 ****
  
  (define_insn "*divmodsi_internal"
    [(set (match_operand:DI 0 "register_operand" "=c")
! 	(sign_extend:DI (match_operator:SI 3 "divmod_operator"
! 			[(match_operand:DI 1 "register_operand" "a")
! 			 (match_operand:DI 2 "register_operand" "b")])))
     (clobber (reg:DI 23))
     (clobber (reg:DI 28))]
    "TARGET_ABI_OSF"
--- 841,850 ----
  
  (define_insn "*divmodsi_internal"
    [(set (match_operand:DI 0 "register_operand" "=c")
! 	(sign_extend:DI
! 	 (match_operator:SI 3 "divmod_operator"
! 	  [(truncate:SI (match_operand:DI 1 "register_operand" "a"))
! 	   (truncate:SI (match_operand:DI 2 "register_operand" "b"))])))
     (clobber (reg:DI 23))
     (clobber (reg:DI 28))]
    "TARGET_ABI_OSF"
diff -Nrcpad gcc-12.3.0/gcc/config/alpha/constraints.md gcc-12.4.0/gcc/config/alpha/constraints.md
*** gcc-12.3.0/gcc/config/alpha/constraints.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/alpha/constraints.md	Thu Jun 20 08:08:06 2024
***************
*** 27,33 ****
   "General register 24, input to division routine")
  
  (define_register_constraint "b" "R25_REG"
!  "General register 24, input to division routine")
  
  (define_register_constraint "c" "R27_REG"
   "General register 27, function call address")
--- 27,33 ----
   "General register 24, input to division routine")
  
  (define_register_constraint "b" "R25_REG"
!  "General register 25, input to division routine")
  
  (define_register_constraint "c" "R27_REG"
   "General register 27, function call address")
diff -Nrcpad gcc-12.3.0/gcc/config/arm/arm-builtins.cc gcc-12.4.0/gcc/config/arm/arm-builtins.cc
*** gcc-12.3.0/gcc/config/arm/arm-builtins.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/arm/arm-builtins.cc	Thu Jun 20 08:08:06 2024
*************** arm_binop_imm_qualifiers[SIMD_MAX_BUILTI
*** 97,103 ****
  /* T (T, unsigned immediate).  */
  static enum arm_type_qualifiers
  arm_sat_binop_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
!   = { qualifier_unsigned, qualifier_none, qualifier_unsigned_immediate };
  #define SAT_BINOP_UNSIGNED_IMM_QUALIFIERS \
    (arm_sat_binop_imm_qualifiers)
  
--- 97,103 ----
  /* T (T, unsigned immediate).  */
  static enum arm_type_qualifiers
  arm_sat_binop_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
!   = { qualifier_none, qualifier_none, qualifier_unsigned_immediate };
  #define SAT_BINOP_UNSIGNED_IMM_QUALIFIERS \
    (arm_sat_binop_imm_qualifiers)
  
diff -Nrcpad gcc-12.3.0/gcc/config/arm/arm.cc gcc-12.4.0/gcc/config/arm/arm.cc
*** gcc-12.3.0/gcc/config/arm/arm.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/arm/arm.cc	Thu Jun 20 08:08:06 2024
*************** cmse_nonsecure_call_inline_register_clea
*** 18989,18994 ****
--- 18989,19026 ----
  	  end_sequence ();
  	  emit_insn_before (seq, insn);
  
+ 	  /* The AAPCS requires the callee to widen integral types narrower
+ 	     than 32 bits to the full width of the register; but when handling
+ 	     calls to non-secure space, we cannot trust the callee to have
+ 	     correctly done so.  So forcibly re-widen the result here.  */
+ 	  tree ret_type = TREE_TYPE (fntype);
+ 	  if ((TREE_CODE (ret_type) == INTEGER_TYPE
+ 	      || TREE_CODE (ret_type) == ENUMERAL_TYPE
+ 	      || TREE_CODE (ret_type) == BOOLEAN_TYPE)
+ 	      && known_lt (GET_MODE_SIZE (TYPE_MODE (ret_type)), 4))
+ 	    {
+ 	      rtx ret_reg = gen_rtx_REG (TYPE_MODE (ret_type), R0_REGNUM);
+ 	      rtx si_reg = gen_rtx_REG (SImode, R0_REGNUM);
+ 	      rtx extend;
+ 	      if (TYPE_UNSIGNED (ret_type))
+ 		extend = gen_rtx_SET (si_reg, gen_rtx_ZERO_EXTEND (SImode,
+ 								   ret_reg));
+ 	      else
+ 		{
+ 		  /* Signed-extension is a special case because of
+ 		     thumb1_extendhisi2.  */
+ 		  if (TARGET_THUMB1
+ 		      && known_eq (GET_MODE_SIZE (TYPE_MODE (ret_type)), 2))
+ 		    extend = gen_thumb1_extendhisi2 (si_reg, ret_reg);
+ 		  else
+ 		    extend = gen_rtx_SET (si_reg,
+ 					  gen_rtx_SIGN_EXTEND (SImode,
+ 							       ret_reg));
+ 		}
+ 	      emit_insn_after (extend, insn);
+ 	    }
+ 
+ 
  	  if (TARGET_HAVE_FPCXT_CMSE)
  	    {
  	      rtx_insn *last, *pop_insn, *after = insn;
*************** arm_expand_prologue (void)
*** 23397,23402 ****
--- 23429,23479 ----
  
    ip_rtx = gen_rtx_REG (SImode, IP_REGNUM);
  
+   /* The AAPCS requires the callee to widen integral types narrower
+      than 32 bits to the full width of the register; but when handling
+      calls to non-secure space, we cannot trust the callee to have
+      correctly done so.  So forcibly re-widen the result here.  */
+   if (IS_CMSE_ENTRY (func_type))
+     {
+       function_args_iterator args_iter;
+       CUMULATIVE_ARGS args_so_far_v;
+       cumulative_args_t args_so_far;
+       bool first_param = true;
+       tree arg_type;
+       tree fndecl = current_function_decl;
+       tree fntype = TREE_TYPE (fndecl);
+       arm_init_cumulative_args (&args_so_far_v, fntype, NULL_RTX, fndecl);
+       args_so_far = pack_cumulative_args (&args_so_far_v);
+       FOREACH_FUNCTION_ARGS (fntype, arg_type, args_iter)
+ 	{
+ 	  rtx arg_rtx;
+ 
+ 	  if (VOID_TYPE_P (arg_type))
+ 	    break;
+ 
+ 	  function_arg_info arg (arg_type, /*named=*/true);
+ 	  if (!first_param)
+ 	    /* We should advance after processing the argument and pass
+ 	       the argument we're advancing past.  */
+ 	    arm_function_arg_advance (args_so_far, arg);
+ 	  first_param = false;
+ 	  arg_rtx = arm_function_arg (args_so_far, arg);
+ 	  gcc_assert (REG_P (arg_rtx));
+ 	  if ((TREE_CODE (arg_type) == INTEGER_TYPE
+ 	      || TREE_CODE (arg_type) == ENUMERAL_TYPE
+ 	      || TREE_CODE (arg_type) == BOOLEAN_TYPE)
+ 	      && known_lt (GET_MODE_SIZE (GET_MODE (arg_rtx)), 4))
+ 	    {
+ 	      if (TYPE_UNSIGNED (arg_type))
+ 		emit_set_insn (gen_rtx_REG (SImode, REGNO (arg_rtx)),
+ 			       gen_rtx_ZERO_EXTEND (SImode, arg_rtx));
+ 	      else
+ 		emit_set_insn (gen_rtx_REG (SImode, REGNO (arg_rtx)),
+ 			       gen_rtx_SIGN_EXTEND (SImode, arg_rtx));
+ 	    }
+ 	}
+     }
+ 
    if (IS_STACKALIGN (func_type))
      {
        rtx r0, r1;
*************** thumb1_expand_prologue (void)
*** 26878,26883 ****
--- 26955,27012 ----
    live_regs_mask = offsets->saved_regs_mask;
    lr_needs_saving = live_regs_mask & (1 << LR_REGNUM);
  
+   /* The AAPCS requires the callee to widen integral types narrower
+      than 32 bits to the full width of the register; but when handling
+      calls to non-secure space, we cannot trust the callee to have
+      correctly done so.  So forcibly re-widen the result here.  */
+   if (IS_CMSE_ENTRY (func_type))
+     {
+       function_args_iterator args_iter;
+       CUMULATIVE_ARGS args_so_far_v;
+       cumulative_args_t args_so_far;
+       bool first_param = true;
+       tree arg_type;
+       tree fndecl = current_function_decl;
+       tree fntype = TREE_TYPE (fndecl);
+       arm_init_cumulative_args (&args_so_far_v, fntype, NULL_RTX, fndecl);
+       args_so_far = pack_cumulative_args (&args_so_far_v);
+       FOREACH_FUNCTION_ARGS (fntype, arg_type, args_iter)
+ 	{
+ 	  rtx arg_rtx;
+ 
+ 	  if (VOID_TYPE_P (arg_type))
+ 	    break;
+ 
+ 	  function_arg_info arg (arg_type, /*named=*/true);
+ 	  if (!first_param)
+ 	    /* We should advance after processing the argument and pass
+ 	       the argument we're advancing past.  */
+ 	    arm_function_arg_advance (args_so_far, arg);
+ 	  first_param = false;
+ 	  arg_rtx = arm_function_arg (args_so_far, arg);
+ 	  gcc_assert (REG_P (arg_rtx));
+ 	  if ((TREE_CODE (arg_type) == INTEGER_TYPE
+ 	      || TREE_CODE (arg_type) == ENUMERAL_TYPE
+ 	      || TREE_CODE (arg_type) == BOOLEAN_TYPE)
+ 	      && known_lt (GET_MODE_SIZE (GET_MODE (arg_rtx)), 4))
+ 	    {
+ 	      rtx res_reg = gen_rtx_REG (SImode, REGNO (arg_rtx));
+ 	      if (TYPE_UNSIGNED (arg_type))
+ 		emit_set_insn (res_reg, gen_rtx_ZERO_EXTEND (SImode, arg_rtx));
+ 	      else
+ 		{
+ 		  /* Signed-extension is a special case because of
+ 		     thumb1_extendhisi2.  */
+ 		  if (known_eq (GET_MODE_SIZE (GET_MODE (arg_rtx)), 2))
+ 		    emit_insn (gen_thumb1_extendhisi2 (res_reg, arg_rtx));
+ 		  else
+ 		    emit_set_insn (res_reg,
+ 				   gen_rtx_SIGN_EXTEND (SImode, arg_rtx));
+ 		}
+ 	    }
+ 	}
+     }
+ 
    /* Extract a mask of the ones we can give to the Thumb's push instruction.  */
    l_mask = live_regs_mask & 0x40ff;
    /* Then count how many other high registers will need to be pushed.  */
diff -Nrcpad gcc-12.3.0/gcc/config/arm/arm.md gcc-12.4.0/gcc/config/arm/arm.md
*** gcc-12.3.0/gcc/config/arm/arm.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/arm/arm.md	Thu Jun 20 08:08:06 2024
***************
*** 7466,7472 ****
        && !arm_const_double_rtx (operands[1])
        && !(TARGET_VFP_DOUBLE && vfp3_const_double_rtx (operands[1])))
      {
!       rtx clobreg = gen_reg_rtx (DFmode);
        emit_insn (gen_no_literal_pool_df_immediate (operands[0], operands[1],
  						   clobreg));
        DONE;
--- 7466,7472 ----
        && !arm_const_double_rtx (operands[1])
        && !(TARGET_VFP_DOUBLE && vfp3_const_double_rtx (operands[1])))
      {
!       rtx clobreg = gen_reg_rtx (DImode);
        emit_insn (gen_no_literal_pool_df_immediate (operands[0], operands[1],
  						   clobreg));
        DONE;
diff -Nrcpad gcc-12.3.0/gcc/config/arm/arm_mve.h gcc-12.4.0/gcc/config/arm/arm_mve.h
*** gcc-12.3.0/gcc/config/arm/arm_mve.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/arm/arm_mve.h	Thu Jun 20 08:08:06 2024
*************** __arm_vabdq_m_u16 (uint16x8_t __inactive
*** 9675,9716 ****
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, int __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_sv16qi (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, int __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_sv4si (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, int __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_sv8hi (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, int __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_uv16qi (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, int __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_uv4si (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, int __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_uv8hi (__inactive, __a, __b, __p);
  }
--- 9675,9716 ----
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_sv16qi (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_sv4si (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_sv8hi (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_uv16qi (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_uv4si (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_uv8hi (__inactive, __a, __b, __p);
  }
*************** __extension__ extern __inline int32x4_t
*** 16055,16061 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vadcq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
    int32x4_t __res = __builtin_mve_vadcq_sv4si (__a, __b);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
--- 16055,16061 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vadcq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29));
    int32x4_t __res = __builtin_mve_vadcq_sv4si (__a, __b);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
*************** __extension__ extern __inline uint32x4_t
*** 16065,16071 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vadcq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
    uint32x4_t __res = __builtin_mve_vadcq_uv4si (__a, __b);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
--- 16065,16071 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vadcq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29));
    uint32x4_t __res = __builtin_mve_vadcq_uv4si (__a, __b);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
*************** __extension__ extern __inline int32x4_t
*** 16075,16081 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vadcq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
    int32x4_t __res = __builtin_mve_vadcq_m_sv4si (__inactive, __a, __b, __p);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
--- 16075,16081 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vadcq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29));
    int32x4_t __res = __builtin_mve_vadcq_m_sv4si (__inactive, __a, __b, __p);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
*************** __extension__ extern __inline uint32x4_t
*** 16085,16091 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vadcq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
    uint32x4_t __res =  __builtin_mve_vadcq_m_uv4si (__inactive, __a, __b, __p);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
--- 16085,16091 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vadcq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29));
    uint32x4_t __res =  __builtin_mve_vadcq_m_uv4si (__inactive, __a, __b, __p);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
*************** __extension__ extern __inline int32x4_t
*** 16131,16137 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vsbcq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
    int32x4_t __res = __builtin_mve_vsbcq_sv4si (__a, __b);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
--- 16131,16137 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vsbcq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29));
    int32x4_t __res = __builtin_mve_vsbcq_sv4si (__a, __b);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
*************** __extension__ extern __inline uint32x4_t
*** 16141,16147 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vsbcq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
    uint32x4_t __res =  __builtin_mve_vsbcq_uv4si (__a, __b);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
--- 16141,16147 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vsbcq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29));
    uint32x4_t __res =  __builtin_mve_vsbcq_uv4si (__a, __b);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
*************** __extension__ extern __inline int32x4_t
*** 16151,16157 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vsbcq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
    int32x4_t __res = __builtin_mve_vsbcq_m_sv4si (__inactive, __a, __b, __p);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
--- 16151,16157 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vsbcq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29));
    int32x4_t __res = __builtin_mve_vsbcq_m_sv4si (__inactive, __a, __b, __p);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
*************** __extension__ extern __inline uint32x4_t
*** 16161,16167 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vsbcq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
    uint32x4_t __res = __builtin_mve_vsbcq_m_uv4si (__inactive, __a, __b, __p);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
--- 16161,16167 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vsbcq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29));
    uint32x4_t __res = __builtin_mve_vsbcq_m_uv4si (__inactive, __a, __b, __p);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
*************** __extension__ extern __inline void
*** 16171,16184 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_u8 (uint8_t * __addr, uint8x16_t __value, mve_pred16_t __p)
  {
!   return vstrbq_p_u8 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_s8 (int8_t * __addr, int8x16_t __value, mve_pred16_t __p)
  {
!   return vstrbq_p_s8 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
--- 16171,16184 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_u8 (uint8_t * __addr, uint8x16_t __value, mve_pred16_t __p)
  {
!   return __arm_vstrbq_p_u8 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_s8 (int8_t * __addr, int8x16_t __value, mve_pred16_t __p)
  {
!   return __arm_vstrbq_p_s8 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
*************** __extension__ extern __inline uint8x16_t
*** 16203,16216 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_u8 (uint8_t const *__base, mve_pred16_t __p)
  {
!   return vldrbq_z_u8 ( __base, __p);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_s8 (int8_t const *__base, mve_pred16_t __p)
  {
!   return vldrbq_z_s8 ( __base, __p);
  }
  
  __extension__ extern __inline int8x16x2_t
--- 16203,16216 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_u8 (uint8_t const *__base, mve_pred16_t __p)
  {
!   return __arm_vldrbq_z_u8 ( __base, __p);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_s8 (int8_t const *__base, mve_pred16_t __p)
  {
!   return __arm_vldrbq_z_s8 ( __base, __p);
  }
  
  __extension__ extern __inline int8x16x2_t
*************** __extension__ extern __inline void
*** 16253,16266 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_u16 (uint16_t * __addr, uint16x8_t __value, mve_pred16_t __p)
  {
!   return vstrhq_p_u16 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_s16 (int16_t * __addr, int16x8_t __value, mve_pred16_t __p)
  {
!   return vstrhq_p_s16 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
--- 16253,16266 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_u16 (uint16_t * __addr, uint16x8_t __value, mve_pred16_t __p)
  {
!   return __arm_vstrhq_p_u16 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_s16 (int16_t * __addr, int16x8_t __value, mve_pred16_t __p)
  {
!   return __arm_vstrhq_p_s16 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
*************** __extension__ extern __inline uint16x8_t
*** 16285,16298 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_u16 (uint16_t const *__base, mve_pred16_t __p)
  {
!   return vldrhq_z_u16 ( __base, __p);
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_s16 (int16_t const *__base, mve_pred16_t __p)
  {
!   return vldrhq_z_s16 ( __base, __p);
  }
  
  __extension__ extern __inline int16x8x2_t
--- 16285,16298 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_u16 (uint16_t const *__base, mve_pred16_t __p)
  {
!   return __arm_vldrhq_z_u16 ( __base, __p);
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_s16 (int16_t const *__base, mve_pred16_t __p)
  {
!   return __arm_vldrhq_z_s16 ( __base, __p);
  }
  
  __extension__ extern __inline int16x8x2_t
*************** __extension__ extern __inline void
*** 16335,16348 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_u32 (uint32_t * __addr, uint32x4_t __value, mve_pred16_t __p)
  {
!   return vstrwq_p_u32 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_s32 (int32_t * __addr, int32x4_t __value, mve_pred16_t __p)
  {
!   return vstrwq_p_s32 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
--- 16335,16348 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_u32 (uint32_t * __addr, uint32x4_t __value, mve_pred16_t __p)
  {
!   return __arm_vstrwq_p_u32 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_s32 (int32_t * __addr, int32x4_t __value, mve_pred16_t __p)
  {
!   return __arm_vstrwq_p_s32 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
*************** __extension__ extern __inline uint32x4_t
*** 16367,16380 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_u32 (uint32_t const *__base, mve_pred16_t __p)
  {
!   return vldrwq_z_u32 ( __base, __p);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_s32 (int32_t const *__base, mve_pred16_t __p)
  {
!   return vldrwq_z_s32 ( __base, __p);
  }
  
  __extension__ extern __inline int32x4x2_t
--- 16367,16380 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_u32 (uint32_t const *__base, mve_pred16_t __p)
  {
!   return __arm_vldrwq_z_u32 ( __base, __p);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_s32 (int32_t const *__base, mve_pred16_t __p)
  {
!   return __arm_vldrwq_z_s32 ( __base, __p);
  }
  
  __extension__ extern __inline int32x4x2_t
*************** __extension__ extern __inline float16x8_
*** 19837,19843 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_f16 (float16_t const *__base, mve_pred16_t __p)
  {
!   return vldrhq_z_f16 (__base, __p);
  }
  
  __extension__ extern __inline void
--- 19837,19843 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_f16 (float16_t const *__base, mve_pred16_t __p)
  {
!   return __arm_vldrhq_z_f16 (__base, __p);
  }
  
  __extension__ extern __inline void
*************** __extension__ extern __inline void
*** 19853,19859 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_f16 (float16_t * __addr, float16x8_t __value, mve_pred16_t __p)
  {
!   return vstrhq_p_f16 (__addr, __value, __p);
  }
  
  __extension__ extern __inline float32x4x4_t
--- 19853,19859 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_f16 (float16_t * __addr, float16x8_t __value, mve_pred16_t __p)
  {
!   return __arm_vstrhq_p_f16 (__addr, __value, __p);
  }
  
  __extension__ extern __inline float32x4x4_t
*************** __extension__ extern __inline float32x4_
*** 19878,19884 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_f32 (float32_t const *__base, mve_pred16_t __p)
  {
!   return vldrwq_z_f32 (__base, __p);
  }
  
  __extension__ extern __inline void
--- 19878,19884 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_f32 (float32_t const *__base, mve_pred16_t __p)
  {
!   return __arm_vldrwq_z_f32 (__base, __p);
  }
  
  __extension__ extern __inline void
*************** __extension__ extern __inline void
*** 19894,19900 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_f32 (float32_t * __addr, float32x4_t __value, mve_pred16_t __p)
  {
!   return vstrwq_p_f32 (__addr, __value, __p);
  }
  
  __extension__ extern __inline float16x8_t
--- 19894,19900 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_f32 (float32_t * __addr, float32x4_t __value, mve_pred16_t __p)
  {
!   return __arm_vstrwq_p_f32 (__addr, __value, __p);
  }
  
  __extension__ extern __inline float16x8_t
*************** __arm_vabdq_m (uint16x8_t __inactive, ui
*** 26417,26458 ****
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (int8x16_t __inactive, int8x16_t __a, int __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_s8 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (int32x4_t __inactive, int32x4_t __a, int __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_s32 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (int16x8_t __inactive, int16x8_t __a, int __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_s16 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (uint8x16_t __inactive, uint8x16_t __a, int __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_u8 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (uint32x4_t __inactive, uint32x4_t __a, int __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_u32 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (uint16x8_t __inactive, uint16x8_t __a, int __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_u16 (__inactive, __a, __b, __p);
  }
--- 26417,26458 ----
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_s8 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_s32 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_s16 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_u8 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_u32 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_u16 (__inactive, __a, __b, __p);
  }
*************** enum {
*** 35582,35594 ****
  	short: __ARM_mve_type_int_n, \
  	int: __ARM_mve_type_int_n, \
  	long: __ARM_mve_type_int_n, \
- 	double: __ARM_mve_type_fp_n, \
  	long long: __ARM_mve_type_int_n, \
  	unsigned char: __ARM_mve_type_int_n, \
  	unsigned short: __ARM_mve_type_int_n, \
  	unsigned int: __ARM_mve_type_int_n, \
  	unsigned long: __ARM_mve_type_int_n, \
  	unsigned long long: __ARM_mve_type_int_n, \
  	default: __ARM_mve_unsupported_type))
  #else
  #define __ARM_mve_typeid(x) _Generic(x, \
--- 35582,35610 ----
  	short: __ARM_mve_type_int_n, \
  	int: __ARM_mve_type_int_n, \
  	long: __ARM_mve_type_int_n, \
  	long long: __ARM_mve_type_int_n, \
+ 	_Float16: __ARM_mve_type_fp_n, \
+ 	__fp16: __ARM_mve_type_fp_n, \
+ 	float: __ARM_mve_type_fp_n, \
+ 	double: __ARM_mve_type_fp_n, \
  	unsigned char: __ARM_mve_type_int_n, \
  	unsigned short: __ARM_mve_type_int_n, \
  	unsigned int: __ARM_mve_type_int_n, \
  	unsigned long: __ARM_mve_type_int_n, \
  	unsigned long long: __ARM_mve_type_int_n, \
+ 	signed char*: __ARM_mve_type_int8_t_ptr, \
+ 	short*: __ARM_mve_type_int16_t_ptr, \
+ 	int*: __ARM_mve_type_int32_t_ptr, \
+ 	long*: __ARM_mve_type_int32_t_ptr, \
+ 	long long*: __ARM_mve_type_int64_t_ptr, \
+ 	_Float16*: __ARM_mve_type_float16_t_ptr, \
+ 	__fp16*: __ARM_mve_type_float16_t_ptr, \
+ 	float*: __ARM_mve_type_float32_t_ptr, \
+ 	unsigned char*: __ARM_mve_type_uint8_t_ptr, \
+ 	unsigned short*: __ARM_mve_type_uint16_t_ptr, \
+ 	unsigned int*: __ARM_mve_type_uint32_t_ptr, \
+ 	unsigned long*: __ARM_mve_type_uint32_t_ptr, \
+ 	unsigned long long*: __ARM_mve_type_uint64_t_ptr, \
  	default: __ARM_mve_unsupported_type))
  #else
  #define __ARM_mve_typeid(x) _Generic(x, \
*************** enum {
*** 35647,35676 ****
  	unsigned int: __ARM_mve_type_int_n, \
  	unsigned long: __ARM_mve_type_int_n, \
  	unsigned long long: __ARM_mve_type_int_n, \
  	default: __ARM_mve_unsupported_type))
  #endif /* MVE Floating point.  */
  
  extern void *__ARM_undef;
  #define __ARM_mve_coerce(param, type) \
      _Generic(param, type: param, default: *(type *)__ARM_undef)
! #define __ARM_mve_coerce1(param, type) \
!     _Generic(param, type: param, const type: param, default: *(type *)__ARM_undef)
! #define __ARM_mve_coerce2(param, type) \
!     _Generic(param, type: param, float16_t: param, float32_t: param, default: *(type *)__ARM_undef)
  
  #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point.  */
  
  #define __arm_vst4q(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce(__p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce(__p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce(__p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce(__p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x4_t]: __arm_vst4q_f16 (__ARM_mve_coerce(__p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x4_t]: __arm_vst4q_f32 (__ARM_mve_coerce(__p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x4_t)));})
  
  #define __arm_vrndxq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 35663,35729 ----
  	unsigned int: __ARM_mve_type_int_n, \
  	unsigned long: __ARM_mve_type_int_n, \
  	unsigned long long: __ARM_mve_type_int_n, \
+ 	signed char*: __ARM_mve_type_int8_t_ptr, \
+ 	short*: __ARM_mve_type_int16_t_ptr, \
+ 	int*: __ARM_mve_type_int32_t_ptr, \
+ 	long*: __ARM_mve_type_int32_t_ptr, \
+ 	long long*: __ARM_mve_type_int64_t_ptr, \
+ 	unsigned char*: __ARM_mve_type_uint8_t_ptr, \
+ 	unsigned short*: __ARM_mve_type_uint16_t_ptr, \
+ 	unsigned int*: __ARM_mve_type_uint32_t_ptr, \
+ 	unsigned long*: __ARM_mve_type_uint32_t_ptr, \
+ 	unsigned long long*: __ARM_mve_type_uint64_t_ptr, \
  	default: __ARM_mve_unsupported_type))
  #endif /* MVE Floating point.  */
  
  extern void *__ARM_undef;
  #define __ARM_mve_coerce(param, type) \
      _Generic(param, type: param, default: *(type *)__ARM_undef)
! #define __ARM_mve_coerce_i_scalar(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, int8_t: param, int16_t: param, int32_t: param, int64_t: param, uint8_t: param, uint16_t: param, uint32_t: param, uint64_t: param, default: *(type *)__ARM_undef))
! 
! #define __ARM_mve_coerce_s8_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, signed char*: param, default: *(type *)__ARM_undef))
! #define __ARM_mve_coerce_u8_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, unsigned char*: param, default: *(type *)__ARM_undef))
! 
! #define __ARM_mve_coerce_s16_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, short*: param, default: *(type *)__ARM_undef))
! #define __ARM_mve_coerce_u16_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, unsigned short*: param, default: *(type *)__ARM_undef))
! 
! #define __ARM_mve_coerce_s32_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, int*: param, long*: param, default: *(type *)__ARM_undef))
! #define __ARM_mve_coerce_u32_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, unsigned int*: param, unsigned long*: param, default: *(type *)__ARM_undef))
! 
! #define __ARM_mve_coerce_s64_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, long long*: param, default: *(type *)__ARM_undef))
! #define __ARM_mve_coerce_u64_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, unsigned long long*: param, default: *(type *)__ARM_undef))
! 
! #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point.  */
! #define __ARM_mve_coerce_f_scalar(param, type) \
!     _Generic(param, type: param, const type: param, __fp16: param, default: _Generic (param, _Float16: param, float16_t: param, float32_t: param, default: *(type *)__ARM_undef))
! #define __ARM_mve_coerce_f16_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, __fp16*: param, _Float16*: param, default: *(type *)__ARM_undef))
! #define __ARM_mve_coerce_f32_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, float*: param, default: *(type *)__ARM_undef))
! #endif
  
  #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point.  */
  
  #define __arm_vst4q(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce_s16_ptr(__p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce_u16_ptr(__p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x4_t]: __arm_vst4q_f16 (__ARM_mve_coerce_f16_ptr(__p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x4_t]: __arm_vst4q_f32 (__ARM_mve_coerce_f32_ptr(__p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x4_t)));})
  
  #define __arm_vrndxq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 35847,35852 ****
--- 35900,35909 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vorrq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vorrq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vorrq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vorrq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vorrq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vorrq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vorrq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vorrq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vorrq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
  
*************** extern void *__ARM_undef;
*** 35871,35886 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_f16 (__ARM_mve_coerce(p0, float16x8_t), __ARM_mve_coerce(p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_f32 (__ARM_mve_coerce(p0, float32x4_t), __ARM_mve_coerce(p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));})
  
  #define __arm_vandq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 35928,35943 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));})
  
  #define __arm_vandq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 35897,35906 ****
  #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce1 (__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce1 (__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce1 (__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce1 (__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 35954,35963 ----
  #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 35925,35938 ****
  #define __arm_vmulq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 35982,35995 ----
  #define __arm_vmulq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 35957,35970 ****
  #define __arm_vcmpeqq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpeqq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpeqq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpeqq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 36014,36027 ----
  #define __arm_vcmpeqq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpeqq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpeqq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpeqq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 35995,36010 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpeqq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpeqq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2));})
  
  #define __arm_vcmpgtq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 36052,36067 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpeqq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpeqq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2));})
  
  #define __arm_vcmpgtq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36012,36024 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgtq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgtq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));})
  
  #define __arm_vcmpleq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 36069,36081 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgtq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgtq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));})
  
  #define __arm_vcmpleq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36028,36038 ****
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpleq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpleq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));})
  
  #define __arm_vcmpltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 36085,36095 ----
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpleq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpleq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));})
  
  #define __arm_vcmpltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36040,36064 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpltq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpltq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));})
  
  #define __arm_vcmpneq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 36097,36121 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpltq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpltq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));})
  
  #define __arm_vcmpneq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 36113,36120 ****
  #define __arm_vmaxnmavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vmaxnmq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 36170,36177 ----
  #define __arm_vmaxnmavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vmaxnmq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36125,36138 ****
  #define __arm_vmaxnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vmaxnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vminnmaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 36182,36195 ----
  #define __arm_vmaxnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vmaxnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vminnmaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36143,36150 ****
  #define __arm_vminnmavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vbrsrq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 36200,36207 ----
  #define __arm_vminnmavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vbrsrq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 36166,36179 ****
  #define __arm_vsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 36223,36236 ----
  #define __arm_vsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 36186,36193 ****
  #define __arm_vminnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vshlq_r(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 36243,36250 ----
  #define __arm_vminnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vshlq_r(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 36242,36253 ****
  #define __arm_vrshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 36299,36310 ----
  #define __arm_vrshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 36278,36289 ****
  #define __arm_vqsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 36335,36346 ----
  #define __arm_vqsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 36334,36345 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
  
  #define __arm_vqrdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 36391,36402 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vqrdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36347,36355 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
  
  #define __arm_vmlaldavxq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 36404,36412 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vmlaldavxq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36382,36389 ****
  #define __arm_vqdmulltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
  
--- 36439,36446 ----
  #define __arm_vqdmulltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
  
*************** extern void *__ARM_undef;
*** 36396,36412 ****
  #define __arm_vqdmullbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
  
  #define __arm_vqdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
--- 36453,36469 ----
  #define __arm_vqdmullbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
  
  #define __arm_vqdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
*************** extern void *__ARM_undef;
*** 36414,36425 ****
  #define __arm_vqaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 36471,36482 ----
  #define __arm_vqaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 36452,36463 ****
  #define __arm_vhaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 36509,36520 ----
  #define __arm_vhaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 36482,36493 ****
  #define __arm_vhsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 36539,36550 ----
  #define __arm_vhsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 36630,36641 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
  
  #define __arm_vsriq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 36687,36698 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vsriq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36714,36757 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
! 	    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));})
  
  #define __arm_vqdmlashq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
! 	    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));})
  
  #define __arm_vqrdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));})
  
  #define __arm_vmlasq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
  
  #define __arm_vqdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));})
  
  #define __arm_vqrdmladhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 36771,36814 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
! 	    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vqdmlashq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
! 	    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vqrdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vmlasq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vqdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vqrdmladhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36941,36951 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgtq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgtq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
--- 36998,37008 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgtq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgtq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
*************** extern void *__ARM_undef;
*** 36957,36967 ****
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpleq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpleq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2));})
  
  #define __arm_vcmpltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37014,37024 ----
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpleq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpleq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2));})
  
  #define __arm_vcmpltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36971,36981 ****
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpltq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpltq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2));})
  
  #define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37028,37038 ----
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpltq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpltq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2));})
  
  #define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36988,37001 ****
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpneq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpneq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpneq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2));})
  
  #define __arm_vcvtbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37045,37058 ----
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpneq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpneq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpneq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2));})
  
  #define __arm_vcvtbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 37049,37056 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmaq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmaq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vfmaq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vfmaq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t)));})
  
--- 37106,37113 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmaq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmaq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vfmaq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vfmaq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t)));})
  
*************** extern void *__ARM_undef;
*** 37065,37072 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmasq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmasq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double)));})
  
  #define __arm_vmaxnmaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37122,37129 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmasq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmasq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double)));})
  
  #define __arm_vmaxnmaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 37089,37102 ****
  #define __arm_vmaxnmavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_p_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_p_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vmaxnmvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_p_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_p_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vminnmaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37146,37159 ----
  #define __arm_vmaxnmavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_p_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_p_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vmaxnmvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_p_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_p_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vminnmaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 37107,37120 ****
  #define __arm_vminnmavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_p_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_p_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vminnmvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_p_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_p_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vrndnq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37164,37177 ----
  #define __arm_vminnmavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_p_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_p_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vminnmvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_p_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_p_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vrndnq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 37176,37188 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgeq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgeq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));})
  
  #define __arm_vrshrnbq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37233,37245 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgeq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgeq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));})
  
  #define __arm_vrshrnbq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 37283,37293 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgeq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgeq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
--- 37340,37350 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgeq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgeq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
*************** extern void *__ARM_undef;
*** 37316,37329 ****
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));})
  
  #define __arm_vandq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37373,37386 ----
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));})
  
  #define __arm_vandq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 37464,37478 ****
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vfmaq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vfmaq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmaq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmaq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));})
  
  #define __arm_vfmasq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmasq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmasq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));})
  
  #define __arm_vfmsq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37521,37535 ----
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vfmaq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vfmaq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmaq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmaq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));})
  
  #define __arm_vfmasq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmasq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmasq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));})
  
  #define __arm_vfmsq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 37507,37520 ****
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmulq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmulq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));})
  
  #define __arm_vornq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37564,37577 ----
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmulq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmulq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));})
  
  #define __arm_vornq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 37541,37554 ****
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vsubq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vsubq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));})
  
  #define __arm_vorrq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37598,37611 ----
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vsubq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vsubq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));})
  
  #define __arm_vorrq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 37565,37800 ****
  
  #define __arm_vld1q(p0) (\
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_u32 (__ARM_mve_coerce1(p0, uint32_t *)), \
!   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld1q_f16 (__ARM_mve_coerce1(p0, float16_t *)), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld1q_f32 (__ARM_mve_coerce1(p0, float32_t *))))
  
  #define __arm_vld1q_z(p0,p1) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce1(p0, int8_t *), p1), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce1(p0, int16_t *), p1), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce1(p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce1(p0, uint8_t *), p1), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1), \
!   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld1q_z_f16 (__ARM_mve_coerce1(p0, float16_t *), p1), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld1q_z_f32 (__ARM_mve_coerce1(p0, float32_t *), p1)))
  
  #define __arm_vld2q(p0) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce1(p0, uint32_t *)), \
!   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld2q_f16 (__ARM_mve_coerce1(p0, float16_t *)), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld2q_f32 (__ARM_mve_coerce1(p0, float32_t *))))
  
  #define __arm_vld4q(p0) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce1(p0, uint32_t *)), \
!   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld4q_f16 (__ARM_mve_coerce1(p0, float16_t *)), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld4q_f32 (__ARM_mve_coerce1(p0, float32_t *))))
  
  #define __arm_vldrhq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));})
  
  #define __arm_vldrhq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));})
  
  #define __arm_vldrhq_gather_shifted_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));})
  
  #define __arm_vldrhq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));})
  
  #define __arm_vldrwq_gather_offset(p0,p1) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce1(p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_f32 (__ARM_mve_coerce1(p0, float32_t *), p1)))
  
  #define __arm_vldrwq_gather_offset_z(p0,p1,p2) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce1(p0, int32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_z_f32 (__ARM_mve_coerce1(p0, float32_t *), p1, p2)))
  
  #define __arm_vldrwq_gather_shifted_offset(p0,p1) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce1(p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_f32 (__ARM_mve_coerce1(p0, float32_t *), p1)))
  
  #define __arm_vldrwq_gather_shifted_offset_z(p0,p1,p2) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(p0, int32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_f32 (__ARM_mve_coerce1(p0, float32_t *), p1, p2)))
  
  #define __arm_vst1q_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vst1q_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vst1q_p_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vst2q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x2_t]: __arm_vst2q_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x2_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x2_t]: __arm_vst2q_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x2_t)));})
  
  #define __arm_vst1q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vst1q_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vst1q_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vstrhq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t)));})
  
  #define __arm_vstrhq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2));})
  
  #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
  
  #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
  
  #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
  
  #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
  
  #define __arm_vstrwq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_p_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vstrwq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
  
  #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
  
  #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
  
  #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
  
  #define __arm_vstrwq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
--- 37622,37857 ----
  
  #define __arm_vld1q(p0) (\
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)), \
!   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld1q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *)), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld1q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *))))
  
  #define __arm_vld1q_z(p0,p1) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), p1), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), p1), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), p1), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1), \
!   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld1q_z_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), p1), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld1q_z_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1)))
  
  #define __arm_vld2q(p0) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)), \
!   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld2q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *)), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld2q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *))))
  
  #define __arm_vld4q(p0) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)), \
!   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld4q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *)), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld4q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *))))
  
  #define __arm_vldrhq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));})
  
  #define __arm_vldrhq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));})
  
  #define __arm_vldrhq_gather_shifted_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));})
  
  #define __arm_vldrhq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));})
  
  #define __arm_vldrwq_gather_offset(p0,p1) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1)))
  
  #define __arm_vldrwq_gather_offset_z(p0,p1,p2) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_z_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1, p2)))
  
  #define __arm_vldrwq_gather_shifted_offset(p0,p1) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1)))
  
  #define __arm_vldrwq_gather_shifted_offset_z(p0,p1,p2) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1, p2)))
  
  #define __arm_vst1q_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vst1q_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vst1q_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vst2q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x2_t]: __arm_vst2q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x2_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x2_t]: __arm_vst2q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x2_t)));})
  
  #define __arm_vst1q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vst1q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vst1q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vstrhq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t)));})
  
  #define __arm_vstrhq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2));})
  
  #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
  
  #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
  
  #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
  
  #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
  
  #define __arm_vstrwq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vstrwq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
  
  #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
  
  #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
  
  #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
  
  #define __arm_vstrwq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
*************** extern void *__ARM_undef;
*** 37811,37854 ****
  #define __arm_vstrwq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_f32 (__ARM_mve_coerce(__p0, float32_t *), p1, __ARM_mve_coerce(__p2, float32x4_t)));})
  
  #define __arm_vstrwq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_p_f32 (__ARM_mve_coerce(__p0, float32_t *), p1, __ARM_mve_coerce(__p2, float32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));})
  
  #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));})
  
  #define __arm_vuninitializedq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 37868,37911 ----
  #define __arm_vstrwq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_f32 (__ARM_mve_coerce_f32_ptr(__p0, float32_t *), p1, __ARM_mve_coerce(__p2, float32x4_t)));})
  
  #define __arm_vstrwq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_p_f32 (__ARM_mve_coerce_f32_ptr(__p0, float32_t *), p1, __ARM_mve_coerce(__p2, float32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));})
  
  #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));})
  
  #define __arm_vuninitializedq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 38021,38039 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));})
  
  #define __arm_vandq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
--- 38078,38096 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));})
  
  #define __arm_vandq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
*************** extern void *__ARM_undef;
*** 38156,38174 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmulq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmulq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));})
  
  #define __arm_vnegq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
--- 38213,38231 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmulq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmulq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));})
  
  #define __arm_vnegq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
*************** extern void *__ARM_undef;
*** 38254,38263 ****
  #define __arm_vsubq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vsubq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vsubq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));})
  
  #define __arm_vcmulq_rot90_x(p1,p2,p3)  ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
--- 38311,38332 ----
  #define __arm_vsubq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsubq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsubq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vsubq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vsubq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));})
  
  #define __arm_vcmulq_rot90_x(p1,p2,p3)  ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
*************** extern void *__ARM_undef;
*** 38281,38296 ****
  #define __arm_vsetq_lane(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int64x2_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint64x2_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vsetq_lane_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vsetq_lane_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #else /* MVE Integer.  */
  
--- 38350,38365 ----
  #define __arm_vsetq_lane(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int64x2_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint64x2_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vsetq_lane_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vsetq_lane_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #else /* MVE Integer.  */
  
*************** extern void *__ARM_undef;
*** 38306,38317 ****
  
  #define __arm_vst4q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)));})
  
  #define __arm_vabsq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 38375,38386 ----
  
  #define __arm_vst4q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)));})
  
  #define __arm_vabsq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 38408,38419 ****
  #define __arm_vcmpneq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 38477,38488 ----
  #define __arm_vcmpneq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 38440,38451 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsubq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsubq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));})
  
  #define __arm_vshlq_r(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 38509,38520 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsubq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsubq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vshlq_r(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 38459,38470 ****
  #define __arm_vrshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 38528,38539 ----
  #define __arm_vrshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 38495,38506 ****
  #define __arm_vqsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 38564,38575 ----
  #define __arm_vqsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 38569,38580 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
  
  #define __arm_vqrdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 38638,38649 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vqrdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 38582,38597 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
  
  #define __arm_vqdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
--- 38651,38666 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vqdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
*************** extern void *__ARM_undef;
*** 38599,38610 ****
  #define __arm_vqaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 38668,38679 ----
  #define __arm_vqaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 38620,38626 ****
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vorrq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vorrq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vorrq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vorrq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vornq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 38689,38699 ----
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vorrq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vorrq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vorrq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vorrq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vorrq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vorrq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vorrq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vorrq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vornq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 38635,38646 ****
  #define __arm_vmulq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 38708,38719 ----
  #define __arm_vmulq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 38715,38726 ****
  #define __arm_vhsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 38788,38799 ----
  #define __arm_vhsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 38745,38756 ****
  #define __arm_vhaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 38818,38829 ----
  #define __arm_vhaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 38800,38809 ****
  #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce1 (__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce1 (__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce1 (__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce1 (__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 38873,38882 ----
  #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 38820,38831 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int)));})
  
  #define __arm_vandq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 38893,38904 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vandq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 38856,38867 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));})
  
  #define __arm_vqmovntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 38929,38940 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vqmovntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 38942,38957 ****
  #define __arm_vqdmulltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
  
  #define __arm_vqdmullbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
  
--- 39015,39030 ----
  #define __arm_vqdmulltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
  
  #define __arm_vqdmullbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
  
*************** extern void *__ARM_undef;
*** 38961,38969 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
  
  #define __arm_vcmpgtq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 39034,39042 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vcmpgtq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 38971,38979 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
  
  #define __arm_vcmpleq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 39044,39052 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vcmpleq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 38981,38989 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpleq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpleq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
  
  #define __arm_vcmpltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 39054,39062 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpleq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpleq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vcmpltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 38991,39010 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
  
  #define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpneq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
--- 39064,39083 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpneq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
*************** extern void *__ARM_undef;
*** 39029,39040 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2));})
  
  #define __arm_vbicq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 39102,39113 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));})
  
  #define __arm_vbicq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 39144,39168 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));})
  
  #define __arm_vqdmlashq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));})
  
  #define __arm_vqrdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));})
  
  #define __arm_vqrdmladhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 39217,39241 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vqdmlashq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vqrdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vqrdmladhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 39225,39233 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));})
  
  #define __arm_vdupq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 39298,39353 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));})
! 
! 
! #define __arm_vcmpgtq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
!   __typeof(p1) __p1 = (p1); \
!   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));})
! 
! #define __arm_vcmpleq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
!   __typeof(p1) __p1 = (p1); \
!   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpleq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpleq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));})
! 
! #define __arm_vcmpltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
!   __typeof(p1) __p1 = (p1); \
!   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));})
! 
! #define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
!   __typeof(p1) __p1 = (p1); \
!   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpneq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpneq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpneq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));})
  
  #define __arm_vdupq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 39250,39272 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
  
  #define __arm_vmlasq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
  
  #define __arm_vnegq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 39370,39392 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vmlasq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vnegq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 39291,39299 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));})
  
  #define __arm_vqdmlsdhq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 39411,39419 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vqdmlsdhq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 39456,39467 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
--- 39576,39587 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
*************** extern void *__ARM_undef;
*** 39561,39572 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_p_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_p_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vornq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 39681,39692 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_p_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_p_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_p_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vornq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 39594,39605 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
--- 39714,39725 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
*************** extern void *__ARM_undef;
*** 39611,39622 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
--- 39731,39742 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
*************** extern void *__ARM_undef;
*** 39631,39642 ****
  
  #define __arm_vldrbq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vstrwq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
--- 39751,39762 ----
  
  #define __arm_vldrbq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vstrwq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
*************** extern void *__ARM_undef;
*** 39645,39788 ****
  
  #define __arm_vld1q(p0) (\
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_u32 (__ARM_mve_coerce1(p0, uint32_t *))))
  
  #define __arm_vldrhq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vldrhq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vldrhq_gather_shifted_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vldrhq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vldrwq_gather_offset(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1));})
  
  #define __arm_vldrwq_gather_offset_z(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vldrwq_gather_shifted_offset(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1));})
  
  #define __arm_vldrwq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vst1q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vst1q_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vst2q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)));})
  
  #define __arm_vstrhq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vstrhq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  
  #define __arm_vstrwq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vstrwq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vstrdq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
--- 39765,39908 ----
  
  #define __arm_vld1q(p0) (\
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *))))
  
  #define __arm_vldrhq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vldrhq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vldrhq_gather_shifted_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vldrhq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vldrwq_gather_offset(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));})
  
  #define __arm_vldrwq_gather_offset_z(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vldrwq_gather_shifted_offset(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));})
  
  #define __arm_vldrwq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vst1q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vst1q_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vst2q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)));})
  
  #define __arm_vstrhq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vstrhq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  
  #define __arm_vstrwq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vstrwq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vstrdq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
*************** extern void *__ARM_undef;
*** 39797,39854 ****
  #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrwq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vuninitializedq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 39917,39974 ----
  #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrwq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vuninitializedq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 39953,39967 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));})
  
  #define __arm_vcaddq_rot270_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
--- 40073,40087 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vcaddq_rot270_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
*************** extern void *__ARM_undef;
*** 40055,40069 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));})
  
  #define __arm_vnegq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
--- 40175,40189 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vnegq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
*************** extern void *__ARM_undef;
*** 40147,40175 ****
    int (*)[__ARM_mve_type_uint32x4_t]: __arm_vbrsrq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
  
  #define __arm_vld1q_z(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce1(p0, int8_t *), p1), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce1(p0, int16_t *), p1), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce1(p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce1(p0, uint8_t *), p1), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1)))
  
  #define __arm_vld2q(p0) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce1(p0, uint32_t *))))
  
  
  #define __arm_vld4q(p0) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce1(p0, uint32_t *))))
  
  #define __arm_vgetq_lane(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 40267,40311 ----
    int (*)[__ARM_mve_type_uint32x4_t]: __arm_vbrsrq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
  
  #define __arm_vld1q_z(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), p1), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), p1), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), p1), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1)))
  
  #define __arm_vld2q(p0) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *))))
  
  
  #define __arm_vld4q(p0) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *))))
! 
! #define __arm_vsubq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
!   __typeof(p2) __p2 = (p2); \
!   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsubq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsubq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vgetq_lane(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 40185,40198 ****
  #define __arm_vsetq_lane(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int64x2_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint64x2_t), p2));})
  
  #endif /* MVE Integer.  */
  
--- 40321,40334 ----
  #define __arm_vsetq_lane(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int64x2_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint64x2_t), p2));})
  
  #endif /* MVE Integer.  */
  
*************** extern void *__ARM_undef;
*** 40303,40364 ****
  #define __arm_vdwdupq_x_u8(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u8 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_vdwdupq_x_u16(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u16 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_vdwdupq_x_u32(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u32 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_viwdupq_x_u8(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u8 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_viwdupq_x_u16(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u16 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_viwdupq_x_u32(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u32 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_vidupq_x_u8(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u8 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vddupq_x_u8(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u8 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vidupq_x_u16(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u16 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vddupq_x_u16(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u16 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vidupq_x_u32(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u32 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vddupq_x_u32(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u32 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vshrq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
--- 40439,40500 ----
  #define __arm_vdwdupq_x_u8(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u8 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_vdwdupq_x_u16(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u16 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_vdwdupq_x_u32(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u32 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_viwdupq_x_u8(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u8 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_viwdupq_x_u16(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u16 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_viwdupq_x_u32(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u32 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_vidupq_x_u8(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u8 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vddupq_x_u8(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u8 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vidupq_x_u16(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u16 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vddupq_x_u16(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u16 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vidupq_x_u32(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u32 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vddupq_x_u32(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u32 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vshrq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
*************** extern void *__ARM_undef;
*** 40372,40383 ****
  #define __arm_vhaddq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u8( __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u16( __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u32( __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
--- 40508,40519 ----
  #define __arm_vhaddq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u8( __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u16( __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u32( __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
*************** extern void *__ARM_undef;
*** 40402,40413 ****
  #define __arm_vhsubq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
--- 40538,40549 ----
  #define __arm_vhsubq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
*************** extern void *__ARM_undef;
*** 40447,40466 ****
    int (*)[__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_base_wb_u64 (p0, p1, __ARM_mve_coerce(__p2, uint64x2_t)));})
  
  #define __arm_vldrdq_gather_offset(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_s64 (__ARM_mve_coerce1(p0, int64_t *), p1), \
!   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1)))
  
  #define __arm_vldrdq_gather_offset_z(p0,p1,p2) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_z_s64 (__ARM_mve_coerce1(p0, int64_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_z_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1, p2)))
  
  #define __arm_vldrdq_gather_shifted_offset(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_s64 (__ARM_mve_coerce1(p0, int64_t *), p1), \
!   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1)))
  
  #define __arm_vldrdq_gather_shifted_offset_z(p0,p1,p2) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_s64 (__ARM_mve_coerce1(p0, int64_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1, p2)))
  
  #define __arm_vadciq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 40583,40602 ----
    int (*)[__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_base_wb_u64 (p0, p1, __ARM_mve_coerce(__p2, uint64x2_t)));})
  
  #define __arm_vldrdq_gather_offset(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1), \
!   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1)))
  
  #define __arm_vldrdq_gather_offset_z(p0,p1,p2) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_z_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_z_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1, p2)))
  
  #define __arm_vldrdq_gather_shifted_offset(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1), \
!   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1)))
  
  #define __arm_vldrdq_gather_shifted_offset_z(p0,p1,p2) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1, p2)))
  
  #define __arm_vadciq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 40516,40551 ****
  
  #define __arm_vldrbq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_s8 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_s16 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_s32 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_u8 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_u16 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_u32 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vqrdmlahq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));})
  
  #define __arm_vqrdmlashq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));})
  
  #define __arm_vqdmlashq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));})
  
  #define __arm_vqrshlq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 40652,40687 ----
  
  #define __arm_vldrbq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_s16 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_s32 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_u16 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_u32 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vqrdmlahq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vqrdmlashq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vqdmlashq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vqrshlq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 40646,40657 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
--- 40782,40793 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
*************** extern void *__ARM_undef;
*** 40666,40674 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));})
  
  #define __arm_vqrdmlsdhxq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 40802,40810 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vqrdmlsdhxq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 40794,40810 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaq_p_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavaq_p_u16 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavaq_p_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vmlaldavaxq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaxq_p_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaxq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
  
  #define __arm_vmlsldavaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 40930,40946 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavaq_p_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vmlaldavaxq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaxq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaxq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
  
  #define __arm_vmlsldavaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 40874,40883 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmvnq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmvnq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmvnq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce1(__p1, int) , p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce1(__p1, int) , p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce1(__p1, int) , p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce1(__p1, int) , p2));})
  
  #define __arm_vorrq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 41010,41019 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmvnq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmvnq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmvnq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int) , p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int) , p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int) , p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int) , p2));})
  
  #define __arm_vorrq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 40943,40954 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
--- 41079,41090 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
*************** extern void *__ARM_undef;
*** 40982,40993 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vhsubq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vhsubq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vhsubq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));})
  
  #define __arm_vmaxq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 41118,41129 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vhsubq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vhsubq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vhsubq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vmaxq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 41015,41037 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));})
  
  #define __arm_vmlasq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));})
  
  #define __arm_vmulhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 41151,41173 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vmlasq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vmulhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 41077,41088 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
--- 41213,41224 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
*************** extern void *__ARM_undef;
*** 41094,41110 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));})
  
  #define __arm_vqdmulhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
--- 41230,41246 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vqdmulhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
*************** extern void *__ARM_undef;
*** 41115,41129 ****
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_m_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_m_n_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));})
  
  #define __arm_vqdmulltq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_m_n_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_m_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
  
--- 41251,41265 ----
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_m_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_m_n_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vqdmulltq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_m_n_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_m_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
  
*************** extern void *__ARM_undef;
*** 41189,41197 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaxq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaxq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaxq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
  
  #define __arm_vmullbq_poly_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 41325,41333 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaxq_p_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaxq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaxq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
  
  #define __arm_vmullbq_poly_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 41202,41213 ****
  
  #define __arm_vldrbq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8(__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16(__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32(__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8(__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16(__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32(__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vidupq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
--- 41338,41349 ----
  
  #define __arm_vldrbq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8(__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16(__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32(__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8(__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16(__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32(__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vidupq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 41215,41223 ****
   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), (uint32_t) __p1, p2, p3), \
   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (uint32_t) __p1, p2, p3), \
   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (uint32_t) __p1, p2, p3), \
!  int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \
!  int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \
!  int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vddupq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
--- 41351,41359 ----
   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), (uint32_t) __p1, p2, p3), \
   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (uint32_t) __p1, p2, p3), \
   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (uint32_t) __p1, p2, p3), \
!  int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \
!  int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \
!  int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vddupq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 41225,41313 ****
   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), (uint32_t) __p1, p2, p3), \
   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (uint32_t) __p1, p2, p3), \
   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (uint32_t) __p1, p2, p3), \
!  int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \
!  int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \
!  int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vidupq_u16(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u16 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1));})
  
  #define __arm_vidupq_u32(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u32 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1));})
  
  #define __arm_vidupq_u8(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u8 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1));})
  
  #define __arm_vddupq_u16(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u16 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1));})
  
  #define __arm_vddupq_u32(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u32 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1));})
  
  #define __arm_vddupq_u8(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u8 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1));})
  
  #define __arm_viwdupq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_viwdupq_u16(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u16 (__ARM_mve_coerce(__p0, uint32_t), p1, (const int) p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1, (const int) p2));})
  
  #define __arm_viwdupq_u32(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u32 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));})
  
  #define __arm_viwdupq_u8(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u8 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vdwdupq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_vdwdupq_u16(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u16 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vdwdupq_u32(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u32 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vdwdupq_u8(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u8 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vshlcq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 41361,41449 ----
   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), (uint32_t) __p1, p2, p3), \
   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (uint32_t) __p1, p2, p3), \
   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (uint32_t) __p1, p2, p3), \
!  int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \
!  int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \
!  int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vidupq_u16(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u16 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));})
  
  #define __arm_vidupq_u32(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u32 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));})
  
  #define __arm_vidupq_u8(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u8 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));})
  
  #define __arm_vddupq_u16(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u16 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));})
  
  #define __arm_vddupq_u32(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u32 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));})
  
  #define __arm_vddupq_u8(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u8 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));})
  
  #define __arm_viwdupq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_viwdupq_u16(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u16 (__ARM_mve_coerce_i_scalar(__p0, int), p1, (const int) p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, (const int) p2));})
  
  #define __arm_viwdupq_u32(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u32 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));})
  
  #define __arm_viwdupq_u8(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u8 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vdwdupq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_vdwdupq_u16(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u16 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vdwdupq_u32(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u32 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vdwdupq_u8(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u8 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vshlcq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 41343,41356 ****
  #define __arm_vaddlvaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddlvaq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddlvaq_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vaddlvaq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddlvaq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddlvaq_p_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vaddlvq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 41479,41492 ----
  #define __arm_vaddlvaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddlvaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddlvaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vaddlvaq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddlvaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddlvaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vaddlvq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 41365,41386 ****
  #define __arm_vaddvaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vaddvaq_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vaddvaq_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddvaq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vaddvaq_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vaddvaq_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddvaq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vaddvaq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vaddvaq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vaddvaq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddvaq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vaddvaq_p_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vaddvaq_p_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddvaq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vaddvq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 41501,41522 ----
  #define __arm_vaddvaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vaddvaq_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vaddvaq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddvaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vaddvaq_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vaddvaq_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddvaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vaddvaq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vaddvaq_p_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vaddvaq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddvaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vaddvaq_p_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vaddvaq_p_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddvaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vaddvq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 41406,41414 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpcsq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpcsq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpcsq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));})
  
  #define __arm_vcmpcsq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 41542,41550 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpcsq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpcsq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpcsq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vcmpcsq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 41416,41424 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpcsq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpcsq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpcsq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2));})
  
  #define __arm_vcmphiq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 41552,41560 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpcsq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpcsq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpcsq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));})
  
  #define __arm_vcmphiq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 41426,41441 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmphiq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmphiq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmphiq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));})
  
  #define __arm_vcmphiq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmphiq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmphiq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmphiq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
--- 41562,41577 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmphiq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmphiq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmphiq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vcmphiq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmphiq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmphiq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmphiq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
*************** extern void *__ARM_undef;
*** 41532,41565 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vmladavaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_p_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_p_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vmladavaxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaxq_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaxq_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaxq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaxq_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaxq_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaxq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vmladavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 41668,41701 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vmladavaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_p_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_p_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_p_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vmladavaxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaxq_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaxq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaxq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaxq_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaxq_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaxq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vmladavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 41602,41618 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaq_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavaq_u16 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavaq_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vmlaldavaxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaxq_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaxq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
  
  #define __arm_vmlaldavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 41738,41754 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavaq_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vmlaldavaxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaxq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaxq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
  
  #define __arm_vmlaldavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 41776,41797 ****
  
  #define __arm_vstrbq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_s16 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_s32 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_u16 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_u32 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vstrbq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_p_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_p_s16 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_p_s32 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_p_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_p_u16 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_p_u32 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vstrdq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
--- 41912,41933 ----
  
  #define __arm_vstrbq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_s16 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_s32 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_u16 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_u32 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vstrbq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_p_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_p_s16 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_p_s32 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_p_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_p_u16 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_p_u32 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vstrdq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
*************** extern void *__ARM_undef;
*** 41807,41867 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhaq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhaq_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vrmlaldavhaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhaq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhaq_p_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrbq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_s16 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_s32 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_u16 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_u32 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrbq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_p_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_p_s16 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_p_s32 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_p_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_p_u16 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_p_u32 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrdq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_p_s64 (__ARM_mve_coerce(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \
!   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_p_u64 (__ARM_mve_coerce(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));})
  
  #define __arm_vstrdq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_s64 (__ARM_mve_coerce(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t)), \
!   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_u64 (__ARM_mve_coerce(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t)));})
  
  #define __arm_vstrdq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_s64 (__ARM_mve_coerce(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \
!   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_u64 (__ARM_mve_coerce(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));})
  
  #define __arm_vstrdq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_s64 (__ARM_mve_coerce(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t)), \
!   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_u64 (__ARM_mve_coerce(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t)));})
  
  #endif /* __cplusplus  */
  #endif /* __ARM_FEATURE_MVE  */
--- 41943,42003 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vrmlaldavhaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrbq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_s16 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_s32 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_u16 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_u32 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrbq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_p_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_p_s16 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_p_s32 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_p_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_p_u16 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_p_u32 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrdq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_p_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \
!   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_p_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));})
  
  #define __arm_vstrdq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t)), \
!   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t)));})
  
  #define __arm_vstrdq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \
!   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));})
  
  #define __arm_vstrdq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t)), \
!   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t)));})
  
  #endif /* __cplusplus  */
  #endif /* __ARM_FEATURE_MVE  */
diff -Nrcpad gcc-12.3.0/gcc/config/arm/constraints.md gcc-12.4.0/gcc/config/arm/constraints.md
*** gcc-12.3.0/gcc/config/arm/constraints.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/arm/constraints.md	Thu Jun 20 08:08:06 2024
***************
*** 102,111 ****
         (match_test "TARGET_HAVE_MVE && ((ival == 1) || (ival == 2)
  				       || (ival == 4) || (ival == 8))")))
  
- ;; True if the immediate is multiple of 8 and in range of -/+ 1016 for MVE.
- (define_predicate "mve_vldrd_immediate"
-   (match_test "satisfies_constraint_Ri (op)"))
- 
  (define_register_constraint "t" "TARGET_32BIT ? VFP_LO_REGS : NO_REGS"
   "The VFP registers @code{s0}-@code{s31}.")
  
--- 102,107 ----
***************
*** 566,571 ****
--- 562,583 ----
   (match_code "symbol_ref")
  )
  
+ ;; True if the immediate is the range +/- 1016 and multiple of 8 for MVE.
+ (define_constraint "Ri"
+   "@internal In Thumb-2 state a constant is multiple of 8 and in range
+    of -/+ 1016 for MVE"
+   (and (match_code "const_int")
+        (match_test "TARGET_HAVE_MVE && (-1016 <= ival) && (ival <= 1016)
+ 		    && ((ival % 8) == 0)")))
+ 
+ ;; True if the immediate is multiple of 2 and in range of -/+ 252 for MVE.
+ (define_constraint "Rl"
+   "@internal In Thumb-2 state a constant is multiple of 2 and in range
+    of -/+ 252 for MVE"
+   (and (match_code "const_int")
+        (match_test "TARGET_HAVE_MVE && (-252 <= ival) && (ival <= 252)
+ 		    && ((ival % 2) == 0)")))
+ 
  (define_memory_constraint "Uz"
   "@internal
    A memory access that is accessible as an LDC/STC operand"
diff -Nrcpad gcc-12.3.0/gcc/config/arm/mve.md gcc-12.4.0/gcc/config/arm/mve.md
*** gcc-12.3.0/gcc/config/arm/mve.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/arm/mve.md	Thu Jun 20 08:08:06 2024
***************
*** 134,140 ****
  	 VRNDQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vrintzt.f%#<V_sz_elem> %q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 134,140 ----
  	 VRNDQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vrintzt.f%#<V_sz_elem>\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 232,238 ****
  	 VREV64Q_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vrev64.%#<V_sz_elem> %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 232,238 ----
  	 VREV64Q_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vrev64.%#<V_sz_elem>\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 245,251 ****
  	(neg:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vneg.f%#<V_sz_elem>  %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 245,251 ----
  	(neg:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vneg.f%#<V_sz_elem>\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 259,265 ****
  	 VDUPQ_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vdup.%#<V_sz_elem>   %q0, %1"
    [(set_attr "type" "mve_move")
  ])
  
--- 259,265 ----
  	 VDUPQ_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vdup.%#<V_sz_elem>\t%q0, %1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 272,278 ****
  	(abs:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vabs.f%#<V_sz_elem>  %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 272,278 ----
  	(abs:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vabs.f%#<V_sz_elem>\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 286,292 ****
  	 VREV32Q_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vrev32.16 %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  ;;
--- 286,292 ----
  	 VREV32Q_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vrev32.16\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  ;;
***************
*** 299,305 ****
  	 VCVTTQ_F32_F16))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtt.f32.f16 %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 299,305 ----
  	 VCVTTQ_F32_F16))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtt.f32.f16\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 313,319 ****
  	 VCVTBQ_F32_F16))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtb.f32.f16 %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 313,319 ----
  	 VCVTBQ_F32_F16))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtb.f32.f16\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 327,333 ****
  	 VCVTQ_TO_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvt.f%#<V_sz_elem>.<supf>%#<V_sz_elem>       %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 327,333 ----
  	 VCVTQ_TO_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvt.f%#<V_sz_elem>.<supf>%#<V_sz_elem>\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 341,347 ****
  	 VREV64Q))
    ]
    "TARGET_HAVE_MVE"
!   "vrev64.%#<V_sz_elem> %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 341,347 ----
  	 VREV64Q))
    ]
    "TARGET_HAVE_MVE"
!   "vrev64.%#<V_sz_elem>\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 355,361 ****
  	 VCVTQ_FROM_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvt.<supf>%#<V_sz_elem>.f%#<V_sz_elem>       %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  ;; [vqnegq_s])
--- 355,361 ----
  	 VCVTQ_FROM_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvt.<supf>%#<V_sz_elem>.f%#<V_sz_elem>\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  ;; [vqnegq_s])
***************
*** 367,373 ****
  	 VQNEGQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vqneg.s%#<V_sz_elem> %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 367,373 ----
  	 VQNEGQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vqneg.s%#<V_sz_elem>\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 381,387 ****
  	 VQABSQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vqabs.s%#<V_sz_elem> %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 381,387 ----
  	 VQABSQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vqabs.s%#<V_sz_elem>\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 394,400 ****
  	(neg:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE"
!   "vneg.s%#<V_sz_elem>  %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 394,400 ----
  	(neg:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE"
!   "vneg.s%#<V_sz_elem>\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 428,434 ****
  	 VDUPQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vdup.%#<V_sz_elem>   %q0, %1"
    [(set_attr "type" "mve_move")
  ])
  
--- 428,434 ----
  	 VDUPQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vdup.%#<V_sz_elem>\t%q0, %1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 441,447 ****
  	(clz:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE"
!   "vclz.i%#<V_sz_elem>  %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  (define_expand "mve_vclzq_u<mode>"
--- 441,447 ----
  	(clz:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE"
!   "vclz.i%#<V_sz_elem>\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  (define_expand "mve_vclzq_u<mode>"
***************
*** 462,468 ****
  	 VCLSQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vcls.s%#<V_sz_elem>  %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 462,468 ----
  	 VCLSQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vcls.s%#<V_sz_elem>\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 517,523 ****
  	 VMOVLTQ))
    ]
    "TARGET_HAVE_MVE"
!   "vmovlt.<supf>%#<V_sz_elem>   %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 517,523 ----
  	 VMOVLTQ))
    ]
    "TARGET_HAVE_MVE"
!   "vmovlt.<supf>%#<V_sz_elem>\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 531,537 ****
  	 VMOVLBQ))
    ]
    "TARGET_HAVE_MVE"
!   "vmovlb.<supf>%#<V_sz_elem>   %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 531,537 ----
  	 VMOVLBQ))
    ]
    "TARGET_HAVE_MVE"
!   "vmovlb.<supf>%#<V_sz_elem>\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 545,551 ****
  	 VCVTPQ))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtp.<supf>%#<V_sz_elem>.f%#<V_sz_elem>      %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 545,551 ----
  	 VCVTPQ))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtp.<supf>%#<V_sz_elem>.f%#<V_sz_elem>\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 559,565 ****
  	 VCVTNQ))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtn.<supf>%#<V_sz_elem>.f%#<V_sz_elem>      %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 559,565 ----
  	 VCVTNQ))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtn.<supf>%#<V_sz_elem>.f%#<V_sz_elem>\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 573,579 ****
  	 VCVTMQ))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtm.<supf>%#<V_sz_elem>.f%#<V_sz_elem>      %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 573,579 ----
  	 VCVTMQ))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtm.<supf>%#<V_sz_elem>.f%#<V_sz_elem>\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 587,593 ****
  	 VCVTAQ))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvta.<supf>%#<V_sz_elem>.f%#<V_sz_elem>      %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 587,593 ----
  	 VCVTAQ))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvta.<supf>%#<V_sz_elem>.f%#<V_sz_elem>\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 601,607 ****
  	 VMVNQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vmvn.i%#<V_sz_elem>  %q0, %1"
    [(set_attr "type" "mve_move")
  ])
  
--- 601,607 ----
  	 VMVNQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vmvn.i%#<V_sz_elem>\t%q0, %1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 615,621 ****
  	 VREV16Q))
    ]
    "TARGET_HAVE_MVE"
!   "vrev16.8 %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 615,621 ----
  	 VREV16Q))
    ]
    "TARGET_HAVE_MVE"
!   "vrev16.8\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 629,635 ****
  	 VADDLVQ))
    ]
    "TARGET_HAVE_MVE"
!   "vaddlv.<supf>32 %Q0, %R0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 629,635 ----
  	 VADDLVQ))
    ]
    "TARGET_HAVE_MVE"
!   "vaddlv.<supf>32\t%Q0, %R0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 643,649 ****
  	VCTPQ))
    ]
    "TARGET_HAVE_MVE"
!   "vctp.<mode1> %1"
    [(set_attr "type" "mve_move")
  ])
  
--- 643,649 ----
  	VCTPQ))
    ]
    "TARGET_HAVE_MVE"
!   "vctp.<mode1>\t%1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 672,678 ****
  	 VSUBQ_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vsub.f<V_sz_elem>  %q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
--- 672,678 ----
  	 VSUBQ_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vsub.f<V_sz_elem>\t%q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 687,693 ****
  	 VBRSRQ_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vbrsr.<V_sz_elem>  %q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
--- 687,693 ----
  	 VBRSRQ_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vbrsr.<V_sz_elem>\t%q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 716,722 ****
  	 VCREATEQ_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vmov %q0[2], %q0[0], %Q2, %Q1\;vmov %q0[3], %q0[1], %R2, %R1"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 716,722 ----
  	 VCREATEQ_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vmov %q0[2], %q0[0], %Q1, %Q2\;vmov %q0[3], %q0[1], %R1, %R2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 731,737 ****
  	 VCREATEQ))
    ]
    "TARGET_HAVE_MVE"
!   "vmov %q0[2], %q0[0], %Q2, %Q1\;vmov %q0[3], %q0[1], %R2, %R1"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 731,737 ----
  	 VCREATEQ))
    ]
    "TARGET_HAVE_MVE"
!   "vmov %q0[2], %q0[0], %Q1, %Q2\;vmov %q0[3], %q0[1], %R1, %R2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 810,816 ****
  	 VADDLVQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vaddlvt.<supf>32 %Q0, %R0, %q1"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 810,816 ----
  	 VADDLVQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vaddlvt.<supf>32\t%Q0, %R0, %q1"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 824,830 ****
  		    (match_operand:MVE_2 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE"
!   "vcmp.<mve_cmp_type>%#<V_sz_elem>  <mve_cmp_op>, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 824,830 ----
  		    (match_operand:MVE_2 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE"
!   "vcmp.<mve_cmp_type>%#<V_sz_elem>\t<mve_cmp_op>, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 873,879 ****
  	 VADDQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vadd.i%#<V_sz_elem>	%q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
--- 873,879 ----
  	 VADDQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vadd.i%#<V_sz_elem>\t%q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 888,894 ****
  	 VADDVAQ))
    ]
    "TARGET_HAVE_MVE"
!   "vaddva.<supf>%#<V_sz_elem>	%0, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 888,894 ----
  	 VADDVAQ))
    ]
    "TARGET_HAVE_MVE"
!   "vaddva.<supf>%#<V_sz_elem>\t%0, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 969,975 ****
  	 VBRSRQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vbrsr.%#<V_sz_elem>	%q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
--- 969,975 ----
  	 VBRSRQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vbrsr.%#<V_sz_elem>\t%q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 1828,1834 ****
  	 VADDLVAQ))
    ]
    "TARGET_HAVE_MVE"
!   "vaddlva.<supf>32 %Q0, %R0, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 1828,1834 ----
  	 VADDLVAQ))
    ]
    "TARGET_HAVE_MVE"
!   "vaddlva.<supf>32\t%Q0, %R0, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 1843,1849 ****
  	 VADDQ_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vadd.f%#<V_sz_elem>	%q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
--- 1843,1849 ----
  	 VADDQ_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vadd.f%#<V_sz_elem>\t%q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 1857,1863 ****
  		   (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vand %q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 1857,1863 ----
  		   (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vand\t%q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 1871,1877 ****
  			      (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vbic %q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 1871,1877 ----
  			      (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vbic\t%q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 1886,1892 ****
  	 VBICQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vbic.i%#<V_sz_elem>	%q0, %2"
    [(set_attr "type" "mve_move")
  ])
  
--- 1886,1892 ----
  	 VBICQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vbic.i%#<V_sz_elem>\t%q0, %2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 1960,1966 ****
  	 VCTPQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vctpt.<mode1> %1"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 1960,1966 ----
  	 VCTPQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vctpt.<mode1>\t%1"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 1975,1981 ****
  	 VCVTBQ_F16_F32))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtb.f16.f32 %q0, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 1975,1981 ----
  	 VCVTBQ_F16_F32))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtb.f16.f32\t%q0, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 1990,1996 ****
  	 VCVTTQ_F16_F32))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtt.f16.f32 %q0, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 1990,1996 ----
  	 VCVTTQ_F16_F32))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtt.f16.f32\t%q0, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2004,2010 ****
  		   (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "veor %q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 2004,2010 ----
  		   (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "veor\t%q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2152,2158 ****
  	 VMLALDAVXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlaldavx.s%#<V_sz_elem> %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 2152,2158 ----
  	 VMLALDAVXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlaldavx.s%#<V_sz_elem>\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2167,2173 ****
  	 VMLSLDAVQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlsldav.s%#<V_sz_elem> %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 2167,2173 ----
  	 VMLSLDAVQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlsldav.s%#<V_sz_elem>\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2182,2188 ****
  	 VMLSLDAVXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlsldavx.s%#<V_sz_elem> %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 2182,2188 ----
  	 VMLSLDAVXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlsldavx.s%#<V_sz_elem>\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2255,2261 ****
  		   (match_operand:MVE_0 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vorn %q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 2255,2261 ----
  		   (match_operand:MVE_0 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vorn\t%q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2269,2275 ****
  		   (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vorr %q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 2269,2275 ----
  		   (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vorr\t%q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2419,2425 ****
  	 VRMLALDAVHXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlaldavhx.s32 %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 2419,2425 ----
  	 VRMLALDAVHXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlaldavhx.s32\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2538,2544 ****
  	 VRMLALDAVHQ))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlaldavh.<supf>32 %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 2538,2544 ----
  	 VRMLALDAVHQ))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlaldavh.<supf>32\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2554,2560 ****
  	 VBICQ_M_N))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vbict.i%#<V_sz_elem>	%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
--- 2554,2560 ----
  	 VBICQ_M_N))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vbict.i%#<V_sz_elem>\t%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
***************
*** 2599,2605 ****
  	 VCVTQ_M_TO_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvtt.f%#<V_sz_elem>.<supf>%#<V_sz_elem>	 %q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
--- 2599,2605 ----
  	 VCVTQ_M_TO_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvtt.f%#<V_sz_elem>.<supf>%#<V_sz_elem>\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
***************
*** 2644,2650 ****
  	 VRMLALDAVHAQ))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlaldavha.<supf>32 %Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
--- 2644,2650 ----
  	 VRMLALDAVHAQ))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlaldavha.<supf>32\t%Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2707,2713 ****
  		   (match_dup 4)]
  	VSHLCQ))]
   "TARGET_HAVE_MVE"
!  "vshlc %q0, %1, %4")
  
  ;;
  ;; [vabsq_m_s])
--- 2707,2713 ----
  		   (match_dup 4)]
  	VSHLCQ))]
   "TARGET_HAVE_MVE"
!  "vshlc\t%q0, %1, %4")
  
  ;;
  ;; [vabsq_m_s])
***************
*** 3041,3047 ****
  	 VDUPQ_M_N))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vdupt.%#<V_sz_elem>	%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 3041,3047 ----
  	 VDUPQ_M_N))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vdupt.%#<V_sz_elem>\t%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 3265,3271 ****
  	 VMVNQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmvnt %q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 3265,3271 ----
  	 VMVNQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmvnt\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 3297,3303 ****
  	 VPSELQ))
    ]
    "TARGET_HAVE_MVE"
!   "vpsel %q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 3297,3303 ----
  	 VPSELQ))
    ]
    "TARGET_HAVE_MVE"
!   "vpsel\t%q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 3498,3504 ****
  ;;
  (define_insn "mve_vrev64q_m_<supf><mode>"
    [
!    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
  	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
  		       (match_operand:MVE_2 2 "s_register_operand" "w")
  		       (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
--- 3498,3504 ----
  ;;
  (define_insn "mve_vrev64q_m_<supf><mode>"
    [
!    (set (match_operand:MVE_2 0 "s_register_operand" "=&w")
  	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
  		       (match_operand:MVE_2 2 "s_register_operand" "w")
  		       (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
***************
*** 3712,3718 ****
  	 VADDLVAQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vaddlvat.<supf>32 %Q0, %R0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
--- 3712,3718 ----
  	 VADDLVAQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vaddlvat.<supf>32\t%Q0, %R0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
***************
*** 3922,3928 ****
  	 VCVTBQ_M_F16_F32))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvtbt.f16.f32 %q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 3922,3928 ----
  	 VCVTBQ_M_F16_F32))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvtbt.f16.f32\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 3938,3944 ****
  	 VCVTBQ_M_F32_F16))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvtbt.f32.f16 %q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 3938,3944 ----
  	 VCVTBQ_M_F32_F16))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvtbt.f32.f16\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 3954,3960 ****
  	 VCVTTQ_M_F16_F32))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvttt.f16.f32 %q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 3954,3960 ----
  	 VCVTTQ_M_F16_F32))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvttt.f16.f32\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 3970,3976 ****
  	 VCVTTQ_M_F32_F16))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvttt.f32.f16 %q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 3970,3976 ----
  	 VCVTTQ_M_F32_F16))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvttt.f32.f16\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 3986,3992 ****
  	 VDUPQ_M_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vdupt.%#<V_sz_elem>	%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 3986,3992 ----
  	 VDUPQ_M_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vdupt.%#<V_sz_elem>\t%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4158,4164 ****
  	 VMLALDAVAQ))
    ]
    "TARGET_HAVE_MVE"
!   "vmlaldava.<supf>%#<V_sz_elem> %Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
--- 4158,4164 ----
  	 VMLALDAVAQ))
    ]
    "TARGET_HAVE_MVE"
!   "vmlaldava.<supf>%#<V_sz_elem>\t%Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 4174,4180 ****
  	 VMLALDAVAXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlaldavax.s%#<V_sz_elem> %Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
--- 4174,4180 ----
  	 VMLALDAVAXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlaldavax.s%#<V_sz_elem>\t%Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 4190,4196 ****
  	 VMLALDAVQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmlaldavt.<supf>%#<V_sz_elem> %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4190,4196 ----
  	 VMLALDAVQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmlaldavt.<supf>%#<V_sz_elem>\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4221,4227 ****
  	 VMLSLDAVAQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlsldava.s%#<V_sz_elem> %Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
--- 4221,4227 ----
  	 VMLSLDAVAQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlsldava.s%#<V_sz_elem>\t%Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 4237,4243 ****
  	 VMLSLDAVAXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlsldavax.s%#<V_sz_elem> %Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
--- 4237,4243 ----
  	 VMLSLDAVAXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlsldavax.s%#<V_sz_elem>\t%Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 4253,4259 ****
  	 VMLSLDAVQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmlsldavt.s%#<V_sz_elem> %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4253,4259 ----
  	 VMLSLDAVQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmlsldavt.s%#<V_sz_elem>\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4269,4275 ****
  	 VMLSLDAVXQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmlsldavxt.s%#<V_sz_elem> %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
--- 4269,4275 ----
  	 VMLSLDAVXQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmlsldavxt.s%#<V_sz_elem>\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
***************
*** 4346,4352 ****
  	 VMVNQ_M_N))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmvnt.i%#<V_sz_elem>	%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
--- 4346,4352 ----
  	 VMVNQ_M_N))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmvnt.i%#<V_sz_elem>\t%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
***************
*** 4377,4383 ****
  	 VORRQ_M_N))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vorrt.i%#<V_sz_elem>	%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
--- 4377,4383 ----
  	 VORRQ_M_N))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vorrt.i%#<V_sz_elem>\t%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
***************
*** 4392,4398 ****
  	 VPSELQ_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpsel %q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 4392,4398 ----
  	 VPSELQ_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpsel\t%q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 4568,4574 ****
  	 VREV32Q_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vrev32t.16 %q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4568,4574 ----
  	 VREV32Q_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vrev32t.16\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4584,4590 ****
  	 VREV32Q_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrev32t.%#<V_sz_elem>	%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4584,4590 ----
  	 VREV32Q_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrev32t.%#<V_sz_elem>\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4593,4606 ****
  ;;
  (define_insn "mve_vrev64q_m_f<mode>"
    [
!    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
  	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
  		       (match_operand:MVE_0 2 "s_register_operand" "w")
  		       (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
  	 VREV64Q_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vrev64t.%#<V_sz_elem>	%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4593,4606 ----
  ;;
  (define_insn "mve_vrev64q_m_f<mode>"
    [
!    (set (match_operand:MVE_0 0 "s_register_operand" "=&w")
  	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
  		       (match_operand:MVE_0 2 "s_register_operand" "w")
  		       (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
  	 VREV64Q_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vrev64t.%#<V_sz_elem>\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4616,4622 ****
  	 VRMLALDAVHAXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlaldavhax.s32 %Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
--- 4616,4622 ----
  	 VRMLALDAVHAXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlaldavhax.s32\t%Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 4632,4638 ****
  	 VRMLALDAVHXQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrmlaldavhxt.s32 %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4632,4638 ----
  	 VRMLALDAVHXQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrmlaldavhxt.s32\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4648,4654 ****
  	 VRMLSLDAVHAXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlsldavhax.s32 %Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
--- 4648,4654 ----
  	 VRMLSLDAVHAXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlsldavhax.s32\t%Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 4664,4670 ****
  	 VRMLSLDAVHQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrmlsldavht.s32 %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4664,4670 ----
  	 VRMLSLDAVHQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrmlsldavht.s32\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4680,4686 ****
  	 VRMLSLDAVHXQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrmlsldavhxt.s32 %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4680,4686 ----
  	 VRMLSLDAVHXQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrmlsldavhxt.s32\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4905,4911 ****
  	 VREV16Q_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrev16t.8 %q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4905,4911 ----
  	 VREV16Q_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrev16t.8\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4937,4943 ****
  	 VRMLALDAVHQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrmlaldavht.<supf>32 %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4937,4943 ----
  	 VRMLALDAVHQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrmlaldavht.<supf>32\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4953,4959 ****
  	 VRMLSLDAVHAQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlsldavha.s32 %Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
--- 4953,4959 ----
  	 VRMLSLDAVHAQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlsldavha.s32\t%Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 4972,4978 ****
    "TARGET_HAVE_MVE"
    "vpst\;vabavt.<supf>%#<V_sz_elem>\t%0, %q2, %q3"
    [(set_attr "type" "mve_move")
! ])
  
  ;;
  ;; [vqshluq_m_n_s])
--- 4972,4978 ----
    "TARGET_HAVE_MVE"
    "vpst\;vabavt.<supf>%#<V_sz_elem>\t%0, %q2, %q3"
    [(set_attr "type" "mve_move")
!    (set_attr "length" "8")])
  
  ;;
  ;; [vqshluq_m_n_s])
***************
*** 4988,4994 ****
    ]
    "TARGET_HAVE_MVE"
    "vpst\n\tvqshlut.s%#<V_sz_elem>\t%q0, %q2, %3"
!   [(set_attr "type" "mve_move")])
  
  ;;
  ;; [vshlq_m_s, vshlq_m_u])
--- 4988,4995 ----
    ]
    "TARGET_HAVE_MVE"
    "vpst\n\tvqshlut.s%#<V_sz_elem>\t%q0, %q2, %3"
!   [(set_attr "type" "mve_move")
!    (set_attr "length" "8")])
  
  ;;
  ;; [vshlq_m_s, vshlq_m_u])
***************
*** 5004,5010 ****
    ]
    "TARGET_HAVE_MVE"
    "vpst\;vshlt.<supf>%#<V_sz_elem>\t%q0, %q2, %q3"
!   [(set_attr "type" "mve_move")])
  
  ;;
  ;; [vsriq_m_n_s, vsriq_m_n_u])
--- 5005,5012 ----
    ]
    "TARGET_HAVE_MVE"
    "vpst\;vshlt.<supf>%#<V_sz_elem>\t%q0, %q2, %q3"
!   [(set_attr "type" "mve_move")
!    (set_attr "length" "8")])
  
  ;;
  ;; [vsriq_m_n_s, vsriq_m_n_u])
***************
*** 5020,5026 ****
    ]
    "TARGET_HAVE_MVE"
    "vpst\;vsrit.%#<V_sz_elem>\t%q0, %q2, %3"
!   [(set_attr "type" "mve_move")])
  
  ;;
  ;; [vsubq_m_u, vsubq_m_s])
--- 5022,5029 ----
    ]
    "TARGET_HAVE_MVE"
    "vpst\;vsrit.%#<V_sz_elem>\t%q0, %q2, %3"
!   [(set_attr "type" "mve_move")
!    (set_attr "length" "8")])
  
  ;;
  ;; [vsubq_m_u, vsubq_m_s])
***************
*** 5036,5042 ****
    ]
    "TARGET_HAVE_MVE"
    "vpst\;vsubt.i%#<V_sz_elem>\t%q0, %q2, %q3"
!   [(set_attr "type" "mve_move")])
  
  ;;
  ;; [vcvtq_m_n_to_f_u, vcvtq_m_n_to_f_s])
--- 5039,5046 ----
    ]
    "TARGET_HAVE_MVE"
    "vpst\;vsubt.i%#<V_sz_elem>\t%q0, %q2, %q3"
!   [(set_attr "type" "mve_move")
!    (set_attr "length" "8")])
  
  ;;
  ;; [vcvtq_m_n_to_f_u, vcvtq_m_n_to_f_s])
***************
*** 5118,5124 ****
  	 VANDQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vandt %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 5122,5128 ----
  	 VANDQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vandt\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 5135,5141 ****
  	 VBICQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vbict %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 5139,5145 ----
  	 VBICQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vbict\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 5203,5209 ****
  	 VEORQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;veort %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 5207,5213 ----
  	 VEORQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;veort\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 5458,5464 ****
  	 VORNQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vornt %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 5462,5468 ----
  	 VORNQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vornt\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 5475,5481 ****
  	 VORRQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vorrt %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 5479,5485 ----
  	 VORRQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vorrt\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 6121,6127 ****
  	 VMLALDAVAXQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmlaldavaxt.<supf>%#<V_sz_elem> %Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 6125,6131 ----
  	 VMLALDAVAXQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmlaldavaxt.<supf>%#<V_sz_elem>\t%Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 6647,6653 ****
  	 VANDQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vandt %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 6651,6657 ----
  	 VANDQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vandt\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 6664,6670 ****
  	 VBICQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vbict %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 6668,6674 ----
  	 VBICQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vbict\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 6868,6874 ****
  	 VEORQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;veort %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 6872,6878 ----
  	 VEORQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;veort\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 7021,7027 ****
  	 VORNQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vornt %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 7025,7031 ----
  	 VORNQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vornt\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 7038,7044 ****
  	 VORRQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vorrt %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 7042,7048 ----
  	 VORRQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vorrt\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 7265,7279 ****
  }
    [(set_attr "length" "8")])
  
- ;;
- ;; [vstrbq_p_s vstrbq_p_u]
- ;;
  (define_insn "mve_vstrbq_p_<supf><mode>"
    [(set (match_operand:<MVE_B_ELEM> 0 "mve_memory_operand" "=Ux")
! 	(unspec:<MVE_B_ELEM> [(match_operand:MVE_2 1 "s_register_operand" "w")
! 			      (match_operand:<MVE_VPRED> 2 "vpr_register_operand" "Up")]
! 	 VSTRBQ))
!   ]
    "TARGET_HAVE_MVE"
  {
     rtx ops[2];
--- 7269,7281 ----
  }
    [(set_attr "length" "8")])
  
  (define_insn "mve_vstrbq_p_<supf><mode>"
    [(set (match_operand:<MVE_B_ELEM> 0 "mve_memory_operand" "=Ux")
! 	(unspec:<MVE_B_ELEM>
! 	 [(match_operand:MVE_2 1 "s_register_operand" "w")
! 	  (match_operand:<MVE_VPRED> 2 "vpr_register_operand" "Up")
! 	  (match_dup 0)]
! 	 VSTRBQ))]
    "TARGET_HAVE_MVE"
  {
     rtx ops[2];
***************
*** 8072,8081 ****
  ;;
  (define_insn "mve_vstrhq_p_fv8hf"
    [(set (match_operand:V8HI 0 "mve_memory_operand" "=Ux")
! 	(unspec:V8HI [(match_operand:V8HF 1 "s_register_operand" "w")
! 		      (match_operand:V8BI 2 "vpr_register_operand" "Up")]
! 	 VSTRHQ_F))
!   ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
  {
     rtx ops[2];
--- 8074,8084 ----
  ;;
  (define_insn "mve_vstrhq_p_fv8hf"
    [(set (match_operand:V8HI 0 "mve_memory_operand" "=Ux")
! 	(unspec:V8HI
! 	 [(match_operand:V8HF 1 "s_register_operand" "w")
! 	  (match_operand:V8BI 2 "vpr_register_operand" "Up")
! 	  (match_dup 0)]
! 	 VSTRHQ_F))]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
  {
     rtx ops[2];
***************
*** 8092,8099 ****
  ;;
  (define_insn "mve_vstrhq_p_<supf><mode>"
    [(set (match_operand:<MVE_H_ELEM> 0 "mve_memory_operand" "=Ux")
! 	(unspec:<MVE_H_ELEM> [(match_operand:MVE_6 1 "s_register_operand" "w")
! 			      (match_operand:<MVE_VPRED> 2 "vpr_register_operand" "Up")]
  	 VSTRHQ))
    ]
    "TARGET_HAVE_MVE"
--- 8095,8104 ----
  ;;
  (define_insn "mve_vstrhq_p_<supf><mode>"
    [(set (match_operand:<MVE_H_ELEM> 0 "mve_memory_operand" "=Ux")
! 	(unspec:<MVE_H_ELEM>
! 	 [(match_operand:MVE_6 1 "s_register_operand" "w")
! 	  (match_operand:<MVE_VPRED> 2 "vpr_register_operand" "Up")
! 	  (match_dup 0)]
  	 VSTRHQ))
    ]
    "TARGET_HAVE_MVE"
***************
*** 8271,8280 ****
  ;;
  (define_insn "mve_vstrwq_p_fv4sf"
    [(set (match_operand:V4SI 0 "mve_memory_operand" "=Ux")
! 	(unspec:V4SI [(match_operand:V4SF 1 "s_register_operand" "w")
! 		      (match_operand:<MVE_VPRED> 2 "vpr_register_operand" "Up")]
! 	 VSTRWQ_F))
!   ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
  {
     rtx ops[2];
--- 8276,8286 ----
  ;;
  (define_insn "mve_vstrwq_p_fv4sf"
    [(set (match_operand:V4SI 0 "mve_memory_operand" "=Ux")
! 	(unspec:V4SI
! 	 [(match_operand:V4SF 1 "s_register_operand" "w")
! 	  (match_operand:<MVE_VPRED> 2 "vpr_register_operand" "Up")
! 	  (match_dup 0)]
! 	 VSTRWQ_F))]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
  {
     rtx ops[2];
***************
*** 8291,8300 ****
  ;;
  (define_insn "mve_vstrwq_p_<supf>v4si"
    [(set (match_operand:V4SI 0 "mve_memory_operand" "=Ux")
! 	(unspec:V4SI [(match_operand:V4SI 1 "s_register_operand" "w")
! 		      (match_operand:V4BI 2 "vpr_register_operand" "Up")]
! 	 VSTRWQ))
!   ]
    "TARGET_HAVE_MVE"
  {
     rtx ops[2];
--- 8297,8307 ----
  ;;
  (define_insn "mve_vstrwq_p_<supf>v4si"
    [(set (match_operand:V4SI 0 "mve_memory_operand" "=Ux")
! 	(unspec:V4SI
! 	 [(match_operand:V4SI 1 "s_register_operand" "w")
! 	  (match_operand:V4BI 2 "vpr_register_operand" "Up")
! 	  (match_dup 0)]
! 	 VSTRWQ))]
    "TARGET_HAVE_MVE"
  {
     rtx ops[2];
***************
*** 8478,8484 ****
  	   (match_operand:HI 3 "vpr_register_operand" "Up")]
  	  VSTRDSSOQ))]
    "TARGET_HAVE_MVE"
!   "vpst\;vstrdt.64\t%q2, [%0, %q1, UXTW #3]"
    [(set_attr "length" "8")])
  
  ;;
--- 8485,8491 ----
  	   (match_operand:HI 3 "vpr_register_operand" "Up")]
  	  VSTRDSSOQ))]
    "TARGET_HAVE_MVE"
!   "vpst\;vstrdt.64\t%q2, [%0, %q1, uxtw #3]"
    [(set_attr "length" "8")])
  
  ;;
***************
*** 8507,8513 ****
  	   (match_operand:V2DI 2 "s_register_operand" "w")]
  	  VSTRDSSOQ))]
    "TARGET_HAVE_MVE"
!   "vstrd.64\t%q2, [%0, %q1, UXTW #3]"
    [(set_attr "length" "4")])
  
  ;;
--- 8514,8520 ----
  	   (match_operand:V2DI 2 "s_register_operand" "w")]
  	  VSTRDSSOQ))]
    "TARGET_HAVE_MVE"
!   "vstrd.64\t%q2, [%0, %q1, uxtw #3]"
    [(set_attr "length" "4")])
  
  ;;
***************
*** 8923,8929 ****
  		    (match_operand:MVE_2 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE"
!   "vadd.i%#<V_sz_elem>  %q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 8930,8936 ----
  		    (match_operand:MVE_2 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE"
!   "vadd.i%#<V_sz_elem>\t%q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 8937,8943 ****
  		    (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vadd.f%#<V_sz_elem> %q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 8944,8950 ----
  		    (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vadd.f%#<V_sz_elem>\t%q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 9038,9044 ****
         (minus:SI (match_dup 2)
  		 (match_operand:SI 4 "immediate_operand" "i")))]
   "TARGET_HAVE_MVE"
!  "vddup.u%#<V_sz_elem>  %q0, %1, %3")
  
  ;;
  ;; [vddupq_m_n_u])
--- 9045,9051 ----
         (minus:SI (match_dup 2)
  		 (match_operand:SI 4 "immediate_operand" "i")))]
   "TARGET_HAVE_MVE"
!  "vddup.u%#<V_sz_elem>\t%q0, %1, %3")
  
  ;;
  ;; [vddupq_m_n_u])
***************
*** 9074,9080 ****
         (minus:SI (match_dup 3)
  		 (match_operand:SI 6 "immediate_operand" "i")))]
   "TARGET_HAVE_MVE"
!  "vpst\;\tvddupt.u%#<V_sz_elem>\t%q0, %2, %4"
   [(set_attr "length""8")])
  
  ;;
--- 9081,9087 ----
         (minus:SI (match_dup 3)
  		 (match_operand:SI 6 "immediate_operand" "i")))]
   "TARGET_HAVE_MVE"
!  "vpst\;vddupt.u%#<V_sz_elem>\t%q0, %2, %4"
   [(set_attr "length""8")])
  
  ;;
***************
*** 9190,9196 ****
  	 VDWDUPQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;\tvdwdupt.u%#<V_sz_elem>\t%q2, %3, %R4, %5"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 9197,9203 ----
  	 VDWDUPQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vdwdupt.u%#<V_sz_elem>\t%q2, %3, %R4, %5"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 9345,9351 ****
  		[(match_operand:V4SI 1 "s_register_operand" "0")
  		 (match_operand:SI 2 "mve_vldrd_immediate" "Ri")
  		 (match_operand:V4SI 3 "s_register_operand" "w")
! 		 (match_operand:V4BI 4 "vpr_register_operand")]
  	VSTRWSBWBQ))
     (set (match_operand:V4SI 0 "s_register_operand" "=w")
  	(unspec:V4SI [(match_dup 1) (match_dup 2)]
--- 9352,9358 ----
  		[(match_operand:V4SI 1 "s_register_operand" "0")
  		 (match_operand:SI 2 "mve_vldrd_immediate" "Ri")
  		 (match_operand:V4SI 3 "s_register_operand" "w")
! 		 (match_operand:V4BI 4 "vpr_register_operand" "Up")]
  	VSTRWSBWBQ))
     (set (match_operand:V4SI 0 "s_register_operand" "=w")
  	(unspec:V4SI [(match_dup 1) (match_dup 2)]
***************
*** 9394,9402 ****
   [(set (mem:BLK (scratch))
         (unspec:BLK
  		[(match_operand:V4SI 1 "s_register_operand" "0")
! 		 (match_operand:SI 2 "mve_vldrd_immediate" "Ri")
  		 (match_operand:V4SF 3 "s_register_operand" "w")
! 		 (match_operand:V4BI 4 "vpr_register_operand")]
  	VSTRWQSBWB_F))
     (set (match_operand:V4SI 0 "s_register_operand" "=w")
  	(unspec:V4SI [(match_dup 1) (match_dup 2)]
--- 9401,9409 ----
   [(set (mem:BLK (scratch))
         (unspec:BLK
  		[(match_operand:V4SI 1 "s_register_operand" "0")
! 		 (match_operand:SI 2 "mve_vstrw_immediate" "Rl")
  		 (match_operand:V4SF 3 "s_register_operand" "w")
! 		 (match_operand:V4BI 4 "vpr_register_operand" "Up")]
  	VSTRWQSBWB_F))
     (set (match_operand:V4SI 0 "s_register_operand" "=w")
  	(unspec:V4SI [(match_dup 1) (match_dup 2)]
***************
*** 9408,9414 ****
     ops[0] = operands[1];
     ops[1] = operands[2];
     ops[2] = operands[3];
!    output_asm_insn ("vpst\;\tvstrwt.u32\t%q2, [%q0, %1]!",ops);
     return "";
  }
    [(set_attr "length" "8")])
--- 9415,9421 ----
     ops[0] = operands[1];
     ops[1] = operands[2];
     ops[2] = operands[3];
!    output_asm_insn ("vpst\;vstrwt.u32\t%q2, [%q0, %1]!",ops);
     return "";
  }
    [(set_attr "length" "8")])
***************
*** 9447,9453 ****
  		[(match_operand:V2DI 1 "s_register_operand" "0")
  		 (match_operand:SI 2 "mve_vldrd_immediate" "Ri")
  		 (match_operand:V2DI 3 "s_register_operand" "w")
! 		 (match_operand:HI 4 "vpr_register_operand")]
  	 VSTRDSBWBQ))
     (set (match_operand:V2DI 0 "s_register_operand" "=w")
  	(unspec:V2DI [(match_dup 1) (match_dup 2)]
--- 9454,9460 ----
  		[(match_operand:V2DI 1 "s_register_operand" "0")
  		 (match_operand:SI 2 "mve_vldrd_immediate" "Ri")
  		 (match_operand:V2DI 3 "s_register_operand" "w")
! 		 (match_operand:HI 4 "vpr_register_operand" "Up")]
  	 VSTRDSBWBQ))
     (set (match_operand:V2DI 0 "s_register_operand" "=w")
  	(unspec:V2DI [(match_dup 1) (match_dup 2)]
***************
*** 9459,9465 ****
     ops[0] = operands[1];
     ops[1] = operands[2];
     ops[2] = operands[3];
!    output_asm_insn ("vpst;vstrdt.u64\t%q2, [%q0, %1]!",ops);
     return "";
  }
    [(set_attr "length" "8")])
--- 9466,9472 ----
     ops[0] = operands[1];
     ops[1] = operands[2];
     ops[2] = operands[3];
!    output_asm_insn ("vpst\;vstrdt.u64\t%q2, [%q0, %1]!",ops);
     return "";
  }
    [(set_attr "length" "8")])
***************
*** 9768,9774 ****
  
  (define_insn "get_fpscr_nzcvqc"
   [(set (match_operand:SI 0 "register_operand" "=r")
!    (unspec:SI [(reg:SI VFPCC_REGNUM)] UNSPEC_GET_FPSCR_NZCVQC))]
   "TARGET_HAVE_MVE"
   "vmrs\\t%0, FPSCR_nzcvqc"
    [(set_attr "type" "mve_move")])
--- 9775,9781 ----
  
  (define_insn "get_fpscr_nzcvqc"
   [(set (match_operand:SI 0 "register_operand" "=r")
!    (unspec_volatile:SI [(reg:SI VFPCC_REGNUM)] UNSPEC_GET_FPSCR_NZCVQC))]
   "TARGET_HAVE_MVE"
   "vmrs\\t%0, FPSCR_nzcvqc"
    [(set_attr "type" "mve_move")])
diff -Nrcpad gcc-12.3.0/gcc/config/arm/neon.md gcc-12.4.0/gcc/config/arm/neon.md
*** gcc-12.3.0/gcc/config/arm/neon.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/arm/neon.md	Thu Jun 20 08:08:06 2024
***************
*** 504,514 ****
     Enabled with -funsafe-math-optimizations -freciprocal-math
     and disabled for -Os since it increases code size .  */
  
! (define_expand "div<mode>3"
    [(set (match_operand:VCVTF 0 "s_register_operand")
          (div:VCVTF (match_operand:VCVTF 1 "s_register_operand")
  		  (match_operand:VCVTF 2 "s_register_operand")))]
!   "TARGET_NEON && !optimize_size
     && flag_reciprocal_math"
    {
      rtx rec = gen_reg_rtx (<MODE>mode);
--- 504,514 ----
     Enabled with -funsafe-math-optimizations -freciprocal-math
     and disabled for -Os since it increases code size .  */
  
! (define_expand "div<VCVTF:mode>3"
    [(set (match_operand:VCVTF 0 "s_register_operand")
          (div:VCVTF (match_operand:VCVTF 1 "s_register_operand")
  		  (match_operand:VCVTF 2 "s_register_operand")))]
!   "ARM_HAVE_NEON_<MODE>_ARITH && !optimize_size
     && flag_reciprocal_math"
    {
      rtx rec = gen_reg_rtx (<MODE>mode);
diff -Nrcpad gcc-12.3.0/gcc/config/arm/predicates.md gcc-12.4.0/gcc/config/arm/predicates.md
*** gcc-12.3.0/gcc/config/arm/predicates.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/arm/predicates.md	Thu Jun 20 08:08:06 2024
***************
*** 73,85 ****
  (define_predicate "mve_imm_selective_upto_8"
    (match_test "satisfies_constraint_Rg (op)"))
  
! ;; True if the immediate is the range +/- 1016 and multiple of 8 for MVE.
! (define_constraint "Ri"
!   "@internal In Thumb-2 state a constant is multiple of 8 and in range
!    of -/+ 1016 for MVE"
!   (and (match_code "const_int")
!        (match_test "TARGET_HAVE_MVE && (-1016 <= ival) && (ival <= 1016)
! 		    && ((ival % 8) == 0)")))
  
  ; Predicate for stack protector guard's address in
  ; stack_protect_combined_set_insn and stack_protect_combined_test_insn patterns
--- 73,85 ----
  (define_predicate "mve_imm_selective_upto_8"
    (match_test "satisfies_constraint_Rg (op)"))
  
! ;; True if the immediate is multiple of 8 and in range of -/+ 1016 for MVE.
! (define_predicate "mve_vldrd_immediate"
!   (match_test "satisfies_constraint_Ri (op)"))
! 
! ;; True if the immediate is multiple of 2 and in range of -/+ 252 for MVE.
! (define_predicate "mve_vstrw_immediate"
!   (match_test "satisfies_constraint_Rl (op)"))
  
  ; Predicate for stack protector guard's address in
  ; stack_protect_combined_set_insn and stack_protect_combined_test_insn patterns
diff -Nrcpad gcc-12.3.0/gcc/config/arm/vfp.md gcc-12.4.0/gcc/config/arm/vfp.md
*** gcc-12.3.0/gcc/config/arm/vfp.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/arm/vfp.md	Thu Jun 20 08:08:06 2024
***************
*** 105,113 ****
      case 8:
        return "vmov%?.f32\t%0, %1\t%@ int";
      case 9:
!       return "vmsr%?\t P0, %1\t@ movhi";
      case 10:
!       return "vmrs%?\t %0, P0\t@ movhi";
      default:
        gcc_unreachable ();
      }
--- 105,113 ----
      case 8:
        return "vmov%?.f32\t%0, %1\t%@ int";
      case 9:
!       return "vmsr%?\tp0, %1\t@ movhi";
      case 10:
!       return "vmrs%?\t%0, p0\t@ movhi";
      default:
        gcc_unreachable ();
      }
***************
*** 209,217 ****
      case 8:
        return "vmov%?.f32\t%0, %1\t%@ int";
      case 9:
!       return "vmsr%?\t P0, %1\t%@ movhi";
      case 10:
!       return "vmrs%?\t%0, P0\t%@ movhi";
      default:
        gcc_unreachable ();
      }
--- 209,217 ----
      case 8:
        return "vmov%?.f32\t%0, %1\t%@ int";
      case 9:
!       return "vmsr%?\tp0, %1\t%@ movhi";
      case 10:
!       return "vmrs%?\t%0, p0\t%@ movhi";
      default:
        gcc_unreachable ();
      }
***************
*** 312,320 ****
      case 12: case 13:
        return output_move_vfp (operands);
      case 14:
!       return \"vmsr\\t P0, %1\";
      case 15:
!       return \"vmrs\\t %0, P0\";
      case 16:
        return \"mcr\\tp10, 7, %1, cr1, cr0, 0\\t @SET_FPSCR\";
      case 17:
--- 312,320 ----
      case 12: case 13:
        return output_move_vfp (operands);
      case 14:
!       return \"vmsr\\tp0, %1\";
      case 15:
!       return \"vmrs\\t%0, p0\";
      case 16:
        return \"mcr\\tp10, 7, %1, cr1, cr0, 0\\t @SET_FPSCR\";
      case 17:
***************
*** 2138,2144 ****
  (define_insn_and_split "no_literal_pool_df_immediate"
    [(set (match_operand:DF 0 "s_register_operand" "=w")
  	(match_operand:DF 1 "const_double_operand" "F"))
!    (clobber (match_operand:DF 2 "s_register_operand" "=r"))]
    "arm_disable_literal_pool
     && TARGET_VFP_BASE
     && !arm_const_double_rtx (operands[1])
--- 2138,2144 ----
  (define_insn_and_split "no_literal_pool_df_immediate"
    [(set (match_operand:DF 0 "s_register_operand" "=w")
  	(match_operand:DF 1 "const_double_operand" "F"))
!    (clobber (match_operand:DI 2 "s_register_operand" "=r"))]
    "arm_disable_literal_pool
     && TARGET_VFP_BASE
     && !arm_const_double_rtx (operands[1])
***************
*** 2153,2160 ****
    unsigned HOST_WIDE_INT ival = zext_hwi (buf[order], 32);
    ival |= (zext_hwi (buf[1 - order], 32) << 32);
    rtx cst = gen_int_mode (ival, DImode);
!   emit_move_insn (simplify_gen_subreg (DImode, operands[2], DFmode, 0), cst);
!   emit_move_insn (operands[0], operands[2]);
    DONE;
  }
  )
--- 2153,2161 ----
    unsigned HOST_WIDE_INT ival = zext_hwi (buf[order], 32);
    ival |= (zext_hwi (buf[1 - order], 32) << 32);
    rtx cst = gen_int_mode (ival, DImode);
!   emit_move_insn (operands[2], cst);
!   emit_move_insn (operands[0],
! 		  simplify_gen_subreg (DFmode, operands[2], DImode, 0));
    DONE;
  }
  )
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr-arch.h gcc-12.4.0/gcc/config/avr/avr-arch.h
*** gcc-12.3.0/gcc/config/avr/avr-arch.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr-arch.h	Thu Jun 20 08:08:06 2024
*************** typedef struct
*** 195,200 ****
--- 195,201 ----
  
  extern const avr_arch_t avr_arch_types[];
  extern const avr_arch_t *avr_arch;
+ extern const avr_arch_t *avr_get_parch (const char *mcu);
  
  extern const avr_mcu_t avr_mcu_types[];
  
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr-devices.cc gcc-12.4.0/gcc/config/avr/avr-devices.cc
*** gcc-12.3.0/gcc/config/avr/avr-devices.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr-devices.cc	Thu Jun 20 08:08:06 2024
*************** avr_inform_core_architectures (void)
*** 153,156 ****
--- 153,172 ----
    free (archs);
  }
  
+ 
+ /* When MCU names a core arch like "avr5", then return a pointer to the
+    respective entry in avr_arch_types[].  Otherwise, return NULL.  */
+ 
+ const avr_arch_t *
+ avr_get_parch (const char *mcu)
+ {
+   for (size_t i = 0; i < ARRAY_SIZE (avr_arch_types); ++i)
+     {
+       if (strcmp (mcu, avr_arch_types[i].name) == 0)
+ 	return & avr_arch_types[i];
+     }
+ 
+   return NULL;
+ }
+ 
  #endif // IN_GEN_AVR_MMCU_TEXI
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr-dimode.md gcc-12.4.0/gcc/config/avr/avr-dimode.md
*** gcc-12.3.0/gcc/config/avr/avr-dimode.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr-dimode.md	Thu Jun 20 08:08:06 2024
***************
*** 455,466 ****
  (define_expand "cbranch<mode>4"
    [(set (pc)
          (if_then_else (match_operator 0 "ordered_comparison_operator"
!                         [(match_operand:ALL8 1 "register_operand"  "")
!                          (match_operand:ALL8 2 "nonmemory_operand" "")])
!          (label_ref (match_operand 3 "" ""))
!          (pc)))]
    "avr_have_dimode"
     {
      rtx acc_a = gen_rtx_REG (<MODE>mode, ACC_A);
  
      avr_fix_inputs (operands, 1 << 2, regmask (<MODE>mode, ACC_A));
--- 455,472 ----
  (define_expand "cbranch<mode>4"
    [(set (pc)
          (if_then_else (match_operator 0 "ordered_comparison_operator"
!                         [(match_operand:ALL8 1 "register_operand")
!                          (match_operand:ALL8 2 "nonmemory_operand")])
!                       (label_ref (match_operand 3))
!                       (pc)))]
    "avr_have_dimode"
     {
+     int icode = (int) GET_CODE (operands[0]);
+ 
+     targetm.canonicalize_comparison (&icode, &operands[1], &operands[2], false);
+     operands[0] = gen_rtx_fmt_ee ((enum rtx_code) icode,
+                                   VOIDmode, operands[1], operands[2]);
+ 
      rtx acc_a = gen_rtx_REG (<MODE>mode, ACC_A);
  
      avr_fix_inputs (operands, 1 << 2, regmask (<MODE>mode, ACC_A));
***************
*** 490,497 ****
          (if_then_else (match_operator 0 "ordered_comparison_operator"
                          [(reg:ALL8 ACC_A)
                           (reg:ALL8 ACC_B)])
!          (label_ref (match_operand 1 "" ""))
!          (pc)))]
    "avr_have_dimode"
    "#"
    "&& reload_completed"
--- 496,503 ----
          (if_then_else (match_operator 0 "ordered_comparison_operator"
                          [(reg:ALL8 ACC_A)
                           (reg:ALL8 ACC_B)])
!                       (label_ref (match_operand 1))
!                       (pc)))]
    "avr_have_dimode"
    "#"
    "&& reload_completed"
***************
*** 544,551 ****
          (if_then_else (match_operator 0 "ordered_comparison_operator"
                          [(reg:ALL8 ACC_A)
                           (match_operand:ALL8 1 "const_operand" "n Ynn")])
!          (label_ref (match_operand 2 "" ""))
!          (pc)))
     (clobber (match_scratch:QI 3 "=&d"))]
    "avr_have_dimode
     && !s8_operand (operands[1], VOIDmode)"
--- 550,557 ----
          (if_then_else (match_operator 0 "ordered_comparison_operator"
                          [(reg:ALL8 ACC_A)
                           (match_operand:ALL8 1 "const_operand" "n Ynn")])
!                       (label_ref (match_operand 2 "" ""))
!                       (pc)))
     (clobber (match_scratch:QI 3 "=&d"))]
    "avr_have_dimode
     && !s8_operand (operands[1], VOIDmode)"
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr-mcus.def gcc-12.4.0/gcc/config/avr/avr-mcus.def
*** gcc-12.3.0/gcc/config/avr/avr-mcus.def	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr-mcus.def	Thu Jun 20 08:08:06 2024
*************** AVR_MCU ("attiny167",        ARCH_AVR35,
*** 138,146 ****
  AVR_MCU ("attiny1634",       ARCH_AVR35, AVR_ISA_NONE, "__AVR_ATtiny1634__",       0x0100, 0x0, 0x4000, 0)
  /* Enhanced, <= 8K.  */
  AVR_MCU ("avr4",             ARCH_AVR4, AVR_ISA_NONE,  NULL,                       0x0060, 0x0, 0x2000, 0)
  AVR_MCU ("ata6285",          ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATA6285__",          0x0100, 0x0, 0x2000, 0)
  AVR_MCU ("ata6286",          ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATA6286__",          0x0100, 0x0, 0x2000, 0)
! AVR_MCU ("ata6289",          ARCH_AVR4, AVR_ISA_NONE, "__AVR_ATA6289__",           0x0100, 0x0, 0x2000, 0)
  AVR_MCU ("ata6612c",         ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATA6612C__",         0x0100, 0x0, 0x2000, 0)
  AVR_MCU ("atmega8",          ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATmega8__",          0x0060, 0x0, 0x2000, 0)
  AVR_MCU ("atmega8a",         ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATmega8A__",         0x0060, 0x0, 0x2000, 0)
--- 138,147 ----
  AVR_MCU ("attiny1634",       ARCH_AVR35, AVR_ISA_NONE, "__AVR_ATtiny1634__",       0x0100, 0x0, 0x4000, 0)
  /* Enhanced, <= 8K.  */
  AVR_MCU ("avr4",             ARCH_AVR4, AVR_ISA_NONE,  NULL,                       0x0060, 0x0, 0x2000, 0)
+ AVR_MCU ("ata5795",          ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATA5795__",          0x0100, 0x0, 0x2000, 0)
  AVR_MCU ("ata6285",          ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATA6285__",          0x0100, 0x0, 0x2000, 0)
  AVR_MCU ("ata6286",          ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATA6286__",          0x0100, 0x0, 0x2000, 0)
! AVR_MCU ("ata6289",          ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATA6289__",          0x0100, 0x0, 0x2000, 0)
  AVR_MCU ("ata6612c",         ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATA6612C__",         0x0100, 0x0, 0x2000, 0)
  AVR_MCU ("atmega8",          ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATmega8__",          0x0060, 0x0, 0x2000, 0)
  AVR_MCU ("atmega8a",         ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATmega8A__",         0x0060, 0x0, 0x2000, 0)
*************** AVR_MCU ("at90pwm3b",        ARCH_AVR4,
*** 165,177 ****
  AVR_MCU ("at90pwm81",        ARCH_AVR4, AVR_ISA_NONE,  "__AVR_AT90PWM81__",        0x0100, 0x0, 0x2000, 0)
  /* Enhanced, > 8K, <= 64K.  */
  AVR_MCU ("avr5",             ARCH_AVR5, AVR_ISA_NONE, NULL,                        0x0060, 0x0, 0x4000, 0)
! AVR_MCU ("ata5702m322",      ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5702M322__",       0x0200, 0x0, 0x10000, 0)
  AVR_MCU ("ata5782",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5782__",           0x0200, 0x8000, 0xd000, 0)
  AVR_MCU ("ata5790",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5790__",           0x0100, 0x0, 0x4000, 0)
  AVR_MCU ("ata5790n",         ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5790N__",          0x0100, 0x0, 0x4000, 0)
  AVR_MCU ("ata5791",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5791__",           0x0100, 0x0, 0x4000, 0)
- AVR_MCU ("ata5795",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5795__",           0x0100, 0x0, 0x2000, 0)
  AVR_MCU ("ata5831",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5831__",           0x0200, 0x8000, 0xd000, 0)
  AVR_MCU ("ata6613c",         ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA6613C__",          0x0100, 0x0, 0x4000, 0)
  AVR_MCU ("ata6614q",         ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA6614Q__",          0x0100, 0x0, 0x8000, 0)
  AVR_MCU ("ata8210",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA8210__",           0x0200, 0x8000, 0xd000, 0)
--- 166,180 ----
  AVR_MCU ("at90pwm81",        ARCH_AVR4, AVR_ISA_NONE,  "__AVR_AT90PWM81__",        0x0100, 0x0, 0x2000, 0)
  /* Enhanced, > 8K, <= 64K.  */
  AVR_MCU ("avr5",             ARCH_AVR5, AVR_ISA_NONE, NULL,                        0x0060, 0x0, 0x4000, 0)
! AVR_MCU ("ata5700m322",      ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5700M322__",       0x0200, 0x8000, 0x10000, 0)
! AVR_MCU ("ata5702m322",      ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5702M322__",       0x0200, 0x8000, 0x10000, 0)
  AVR_MCU ("ata5782",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5782__",           0x0200, 0x8000, 0xd000, 0)
+ AVR_MCU ("ata5787",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5787__",           0x0200, 0x8000, 0xd200, 0)
  AVR_MCU ("ata5790",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5790__",           0x0100, 0x0, 0x4000, 0)
  AVR_MCU ("ata5790n",         ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5790N__",          0x0100, 0x0, 0x4000, 0)
  AVR_MCU ("ata5791",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5791__",           0x0100, 0x0, 0x4000, 0)
  AVR_MCU ("ata5831",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5831__",           0x0200, 0x8000, 0xd000, 0)
+ AVR_MCU ("ata5835",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5835__",           0x0200, 0x8000, 0xd200, 0)
  AVR_MCU ("ata6613c",         ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA6613C__",          0x0100, 0x0, 0x4000, 0)
  AVR_MCU ("ata6614q",         ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA6614Q__",          0x0100, 0x0, 0x8000, 0)
  AVR_MCU ("ata8210",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA8210__",           0x0200, 0x8000, 0xd000, 0)
*************** AVR_MCU ("atmega2560",       ARCH_AVR6,
*** 291,297 ****
  AVR_MCU ("atmega2561",       ARCH_AVR6, AVR_ISA_NONE, "__AVR_ATmega2561__",        0x0200, 0x0, 0x40000, 0)
  AVR_MCU ("atmega256rfr2",    ARCH_AVR6, AVR_ISA_NONE, "__AVR_ATmega256RFR2__",     0x0200, 0x0, 0x40000, 0)
  AVR_MCU ("atmega2564rfr2",   ARCH_AVR6, AVR_ISA_NONE, "__AVR_ATmega2564RFR2__",    0x0200, 0x0, 0x40000, 0)
! /* Xmega, 16K <= Flash < 64K, RAM <= 64K */
  AVR_MCU ("avrxmega2",        ARCH_AVRXMEGA2, AVR_ISA_NONE, NULL,                   0x2000, 0x0, 0x9000, 0)
  AVR_MCU ("atxmega8e5",       ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_ATxmega8E5__",   0x2000, 0x0, 0x2800, 0)
  AVR_MCU ("atxmega16a4",      ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_ATxmega16A4__",  0x2000, 0x0, 0x5000, 0)
--- 294,300 ----
  AVR_MCU ("atmega2561",       ARCH_AVR6, AVR_ISA_NONE, "__AVR_ATmega2561__",        0x0200, 0x0, 0x40000, 0)
  AVR_MCU ("atmega256rfr2",    ARCH_AVR6, AVR_ISA_NONE, "__AVR_ATmega256RFR2__",     0x0200, 0x0, 0x40000, 0)
  AVR_MCU ("atmega2564rfr2",   ARCH_AVR6, AVR_ISA_NONE, "__AVR_ATmega2564RFR2__",    0x0200, 0x0, 0x40000, 0)
! /* Xmega, 16K <= Flash <= 64K, RAM <= 64K */
  AVR_MCU ("avrxmega2",        ARCH_AVRXMEGA2, AVR_ISA_NONE, NULL,                   0x2000, 0x0, 0x9000, 0)
  AVR_MCU ("atxmega8e5",       ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_ATxmega8E5__",   0x2000, 0x0, 0x2800, 0)
  AVR_MCU ("atxmega16a4",      ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_ATxmega16A4__",  0x2000, 0x0, 0x5000, 0)
*************** AVR_MCU ("atxmega16c4",      ARCH_AVRXME
*** 306,311 ****
--- 309,331 ----
  AVR_MCU ("atxmega32a4u",     ARCH_AVRXMEGA2, AVR_ISA_RMW,  "__AVR_ATxmega32A4U__", 0x2000, 0x0, 0x9000, 0)
  AVR_MCU ("atxmega32c4",      ARCH_AVRXMEGA2, AVR_ISA_RMW,  "__AVR_ATxmega32C4__",  0x2000, 0x0, 0x9000, 0)
  AVR_MCU ("atxmega32e5",      ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_ATxmega32E5__",  0x2000, 0x0, 0x9000, 0)
+ AVR_MCU ("avr64da28",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DA28__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64da32",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DA32__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64da48",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DA48__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64da64",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DA64__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64db28",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DB28__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64db32",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DB32__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64db48",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DB48__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64db64",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DB64__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64dd14",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DD14__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64dd20",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DD20__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64dd28",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DD28__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64dd32",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DD32__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64du28",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DU28__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64du32",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DU32__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64ea28",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64EA28__",    0x6800, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64ea32",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64EA32__",    0x6800, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64ea48",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64EA48__",    0x6800, 0x0, 0x10000, 0)
  /* Xmega, Flash + RAM < 64K, flash visible in RAM address space */
  AVR_MCU ("avrxmega3",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  NULL,                  0x3f00, 0x0, 0x8000, 0)
  AVR_MCU ("attiny202",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny202__",   0x3f80, 0x0, 0x800,  0x8000)
*************** AVR_MCU ("attiny214",        ARCH_AVRXME
*** 324,329 ****
--- 344,350 ----
  AVR_MCU ("attiny412",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny412__",   0x3f00, 0x0, 0x1000, 0x8000)
  AVR_MCU ("attiny414",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny414__",   0x3f00, 0x0, 0x1000, 0x8000)
  AVR_MCU ("attiny416",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny416__",   0x3f00, 0x0, 0x1000, 0x8000)
+ AVR_MCU ("attiny416auto",    ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny416AUTO__", 0x3f00, 0x0, 0x1000, 0x8000)
  AVR_MCU ("attiny417",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny417__",   0x3f00, 0x0, 0x1000, 0x8000)
  AVR_MCU ("attiny814",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny814__",   0x3e00, 0x0, 0x2000, 0x8000)
  AVR_MCU ("attiny816",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny816__",   0x3e00, 0x0, 0x2000, 0x8000)
*************** AVR_MCU ("attiny1617",       ARCH_AVRXME
*** 334,347 ****
  AVR_MCU ("attiny3214",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny3214__",  0x3800, 0x0, 0x8000, 0x8000)
  AVR_MCU ("attiny3216",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny3216__",  0x3800, 0x0, 0x8000, 0x8000)
  AVR_MCU ("attiny3217",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny3217__",  0x3800, 0x0, 0x8000, 0x8000)
  AVR_MCU ("atmega808",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATmega808__",   0x3c00, 0x0, 0x2000, 0x4000)
  AVR_MCU ("atmega809",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATmega809__",   0x3c00, 0x0, 0x2000, 0x4000)
  AVR_MCU ("atmega1608",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega1608__",  0x3800, 0x0, 0x4000, 0x4000)
  AVR_MCU ("atmega1609",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega1609__",  0x3800, 0x0, 0x4000, 0x4000)
! AVR_MCU ("atmega3208",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega3208__",  0x3800, 0x0, 0x8000, 0x4000)
! AVR_MCU ("atmega3209",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega3209__",  0x3800, 0x0, 0x8000, 0x4000)
  AVR_MCU ("atmega4808",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega4808__",  0x2800, 0x0, 0xc000, 0x4000)
  AVR_MCU ("atmega4809",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega4809__",  0x2800, 0x0, 0xc000, 0x4000)
  /* Xmega, 64K < Flash <= 128K, RAM <= 64K */
  AVR_MCU ("avrxmega4",        ARCH_AVRXMEGA4, AVR_ISA_NONE, NULL,                   0x2000, 0x0, 0x11000, 0)
  AVR_MCU ("atxmega64a3",      ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_ATxmega64A3__",  0x2000, 0x0, 0x11000, 0)
--- 355,412 ----
  AVR_MCU ("attiny3214",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny3214__",  0x3800, 0x0, 0x8000, 0x8000)
  AVR_MCU ("attiny3216",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny3216__",  0x3800, 0x0, 0x8000, 0x8000)
  AVR_MCU ("attiny3217",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny3217__",  0x3800, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("attiny424",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny424__",   0x3e00, 0x0, 0x1000, 0x8000)
+ AVR_MCU ("attiny426",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny426__",   0x3e00, 0x0, 0x1000, 0x8000)
+ AVR_MCU ("attiny427",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny427__",   0x3e00, 0x0, 0x1000, 0x8000)
+ AVR_MCU ("attiny824",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny824__",   0x3c00, 0x0, 0x2000, 0x8000)
+ AVR_MCU ("attiny826",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny826__",   0x3c00, 0x0, 0x2000, 0x8000)
+ AVR_MCU ("attiny827",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny827__",   0x3c00, 0x0, 0x2000, 0x8000)
+ AVR_MCU ("attiny1624",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny1624__",  0x3800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("attiny1626",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny1626__",  0x3800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("attiny1627",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny1627__",  0x3800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("attiny3224",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny3224__",  0x3400, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("attiny3226",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny3226__",  0x3400, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("attiny3227",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny3227__",  0x3400, 0x0, 0x8000, 0x8000)
  AVR_MCU ("atmega808",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATmega808__",   0x3c00, 0x0, 0x2000, 0x4000)
  AVR_MCU ("atmega809",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATmega809__",   0x3c00, 0x0, 0x2000, 0x4000)
  AVR_MCU ("atmega1608",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega1608__",  0x3800, 0x0, 0x4000, 0x4000)
  AVR_MCU ("atmega1609",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega1609__",  0x3800, 0x0, 0x4000, 0x4000)
! AVR_MCU ("atmega3208",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega3208__",  0x3000, 0x0, 0x8000, 0x4000)
! AVR_MCU ("atmega3209",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega3209__",  0x3000, 0x0, 0x8000, 0x4000)
  AVR_MCU ("atmega4808",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega4808__",  0x2800, 0x0, 0xc000, 0x4000)
  AVR_MCU ("atmega4809",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega4809__",  0x2800, 0x0, 0xc000, 0x4000)
+ AVR_MCU ("avr16dd14",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16DD14__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16dd20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16DD20__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16dd28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16DD28__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16dd32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16DD32__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16du14",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16DU14__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16du20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16DU20__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16du28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16DU28__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16du32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16DU32__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr32da28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DA28__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32da32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DA32__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32da48",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DA48__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32db28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DB28__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32db32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DB32__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32db48",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DB48__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32dd14",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DD14__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32dd20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DD20__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32dd28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DD28__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32dd32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DD32__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32du14",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DU14__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32du20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DU20__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32du28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DU28__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32du32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DU32__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr16eb14",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EB14__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16eb20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EB20__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16eb28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EB28__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16eb32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EB32__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16ea28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EA28__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16ea32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EA32__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16ea48",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EA48__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr32ea28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32EA28__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32ea32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32EA32__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32ea48",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32EA48__",   0x7000, 0x0, 0x8000, 0x8000)
  /* Xmega, 64K < Flash <= 128K, RAM <= 64K */
  AVR_MCU ("avrxmega4",        ARCH_AVRXMEGA4, AVR_ISA_NONE, NULL,                   0x2000, 0x0, 0x11000, 0)
  AVR_MCU ("atxmega64a3",      ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_ATxmega64A3__",  0x2000, 0x0, 0x11000, 0)
*************** AVR_MCU ("atxmega64b1",      ARCH_AVRXME
*** 352,357 ****
--- 417,430 ----
  AVR_MCU ("atxmega64b3",      ARCH_AVRXMEGA4, AVR_ISA_RMW,  "__AVR_ATxmega64B3__",  0x2000, 0x0, 0x11000, 0)
  AVR_MCU ("atxmega64c3",      ARCH_AVRXMEGA4, AVR_ISA_RMW,  "__AVR_ATxmega64C3__",  0x2000, 0x0, 0x11000, 0)
  AVR_MCU ("atxmega64d4",      ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_ATxmega64D4__",  0x2000, 0x0, 0x11000, 0)
+ AVR_MCU ("avr128da28",       ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DA28__",   0x4000, 0x0, 0x20000, 0)
+ AVR_MCU ("avr128da32",       ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DA32__",   0x4000, 0x0, 0x20000, 0)
+ AVR_MCU ("avr128da48",       ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DA48__",   0x4000, 0x0, 0x20000, 0)
+ AVR_MCU ("avr128da64",       ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DA64__",   0x4000, 0x0, 0x20000, 0)
+ AVR_MCU ("avr128db28",       ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DB28__",   0x4000, 0x0, 0x20000, 0)
+ AVR_MCU ("avr128db32",       ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DB32__",   0x4000, 0x0, 0x20000, 0)
+ AVR_MCU ("avr128db48",       ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DB48__",   0x4000, 0x0, 0x20000, 0)
+ AVR_MCU ("avr128db64",       ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DB64__",   0x4000, 0x0, 0x20000, 0)
  /* Xmega, 64K < Flash <= 128K, RAM > 64K */
  AVR_MCU ("avrxmega5",        ARCH_AVRXMEGA5, AVR_ISA_NONE, NULL,                   0x2000, 0x0, 0x11000, 0)
  AVR_MCU ("atxmega64a1",      ARCH_AVRXMEGA5, AVR_ISA_NONE, "__AVR_ATxmega64A1__",  0x2000, 0x0, 0x11000, 0)
*************** AVR_MCU ("attiny4",          ARCH_AVRTIN
*** 388,393 ****
--- 461,468 ----
  AVR_MCU ("attiny5",          ARCH_AVRTINY, AVR_ISA_LDS,  "__AVR_ATtiny5__",        0x0040, 0x0, 0x200, 0)
  AVR_MCU ("attiny9",          ARCH_AVRTINY, AVR_ISA_LDS,  "__AVR_ATtiny9__",        0x0040, 0x0, 0x400, 0)
  AVR_MCU ("attiny10",         ARCH_AVRTINY, AVR_ISA_LDS,  "__AVR_ATtiny10__",       0x0040, 0x0, 0x400, 0)
+ AVR_MCU ("attiny102",        ARCH_AVRTINY, AVR_ISA_LDS,  "__AVR_ATtiny102__",      0x0040, 0x0, 0x400, 0)
+ AVR_MCU ("attiny104",        ARCH_AVRTINY, AVR_ISA_LDS,  "__AVR_ATtiny104__",      0x0040, 0x0, 0x400, 0)
  AVR_MCU ("attiny20",         ARCH_AVRTINY, AVR_ISA_LDS,  "__AVR_ATtiny20__",       0x0040, 0x0, 0x800, 0)
  AVR_MCU ("attiny40",         ARCH_AVRTINY, AVR_ISA_NONE, "__AVR_ATtiny40__",       0x0040, 0x0, 0x1000, 0)
  /* Assembler only.  */
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr-passes.def gcc-12.4.0/gcc/config/avr/avr-passes.def
*** gcc-12.3.0/gcc/config/avr/avr-passes.def	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr-passes.def	Thu Jun 20 08:08:06 2024
*************** INSERT_PASS_BEFORE (pass_free_cfg, 1, av
*** 43,45 ****
--- 43,65 ----
     insns withaout any insns in between.  */
  
  INSERT_PASS_AFTER (pass_expand, 1, avr_pass_casesi);
+ 
+ /* If-else decision trees generated for switch / case may produce sequences
+    like
+ 
+       SREG = compare (reg, val);
+ 	  if (SREG == 0)  goto label1;
+       SREG = compare (reg, 1 + val);
+ 	  if (SREG >= 0)  goto label2;
+ 
+    which can be optimized to
+ 
+       SREG = compare (reg, val);
+ 	  if (SREG == 0)  goto label1;
+ 	  if (SREG >= 0)  goto label2;
+ 
+    The optimal place for such a pass would be directly after expand, but
+    it's not possible for a jump insn to target more than one code label.
+    Hence, run a mini pass right before split2 which introduces REG_CC.  */
+ 
+ INSERT_PASS_BEFORE (pass_split_after_reload, 1, avr_pass_ifelse);
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr-protos.h gcc-12.4.0/gcc/config/avr/avr-protos.h
*** gcc-12.3.0/gcc/config/avr/avr-protos.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr-protos.h	Thu Jun 20 08:08:06 2024
*************** extern const char *ret_cond_branch (rtx
*** 58,63 ****
--- 58,65 ----
  extern const char *avr_out_movpsi (rtx_insn *, rtx*, int*);
  extern const char *avr_out_sign_extend (rtx_insn *, rtx*, int*);
  extern const char *avr_out_insert_notbit (rtx_insn *, rtx*, rtx, int*);
+ extern const char *avr_out_plus_set_ZN (rtx*, int*);
+ extern const char *avr_out_cmp_ext (rtx*, enum rtx_code, int*);
  
  extern const char *ashlqi3_out (rtx_insn *insn, rtx operands[], int *len);
  extern const char *ashlhi3_out (rtx_insn *insn, rtx operands[], int *len);
*************** extern int jump_over_one_insn_p (rtx_ins
*** 112,119 ****
  
  extern void avr_final_prescan_insn (rtx_insn *insn, rtx *operand,
  				    int num_operands);
- extern int avr_simplify_comparison_p (machine_mode mode,
- 				      RTX_CODE op, rtx x);
  extern RTX_CODE avr_normalize_condition (RTX_CODE condition);
  extern void out_shift_with_cnt (const char *templ, rtx_insn *insn,
  				rtx operands[], int *len, int t_len);
--- 114,119 ----
*************** extern rtx tmp_reg_rtx;
*** 145,150 ****
--- 145,151 ----
  extern rtx zero_reg_rtx;
  extern rtx all_regs_rtx[32];
  extern rtx rampz_rtx;
+ extern rtx cc_reg_rtx;
  
  #endif /* RTX_CODE */
  
*************** class rtl_opt_pass;
*** 160,165 ****
--- 161,167 ----
  extern rtl_opt_pass *make_avr_pass_pre_proep (gcc::context *);
  extern rtl_opt_pass *make_avr_pass_recompute_notes (gcc::context *);
  extern rtl_opt_pass *make_avr_pass_casesi (gcc::context *);
+ extern rtl_opt_pass *make_avr_pass_ifelse (gcc::context *);
  
  /* From avr-log.cc */
  
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr.cc gcc-12.4.0/gcc/config/avr/avr.cc
*** gcc-12.3.0/gcc/config/avr/avr.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr.cc	Thu Jun 20 08:08:06 2024
*************** public:
*** 359,364 ****
--- 359,399 ----
    }
  }; // avr_pass_casesi
  
+ 
+ static const pass_data avr_pass_data_ifelse =
+ {
+   RTL_PASS,      // type
+   "",            // name (will be patched)
+   OPTGROUP_NONE, // optinfo_flags
+   TV_DF_SCAN,    // tv_id
+   0,             // properties_required
+   0,             // properties_provided
+   0,             // properties_destroyed
+   0,             // todo_flags_start
+   TODO_df_finish | TODO_df_verify // todo_flags_finish
+ };
+ 
+ class avr_pass_ifelse : public rtl_opt_pass
+ {
+ public:
+   avr_pass_ifelse (gcc::context *ctxt, const char *name)
+     : rtl_opt_pass (avr_pass_data_ifelse, ctxt)
+   {
+     this->name = name;
+   }
+ 
+   void avr_rest_of_handle_ifelse (function*);
+ 
+   virtual bool gate (function*) { return optimize > 0; }
+ 
+   virtual unsigned int execute (function *func)
+   {
+     avr_rest_of_handle_ifelse (func);
+ 
+     return 0;
+   }
+ }; // avr_pass_ifelse
+ 
  } // anon namespace
  
  rtl_opt_pass*
*************** make_avr_pass_casesi (gcc::context *ctxt
*** 373,378 ****
--- 408,419 ----
    return new avr_pass_casesi (ctxt, "avr-casesi");
  }
  
+ rtl_opt_pass*
+ make_avr_pass_ifelse (gcc::context *ctxt)
+ {
+   return new avr_pass_ifelse (ctxt, "avr-ifelse");
+ }
+ 
  
  /* Make one parallel insn with all the patterns from insns i[0]..i[5].  */
  
*************** avr_pass_casesi::avr_rest_of_handle_case
*** 686,691 ****
--- 727,1030 ----
  }
  
  
+ /* A helper for the next method.  Suppose we have two conditional branches
+ 
+       if (reg <cond1> xval1) goto label1;
+       if (reg <cond2> xval2) goto label2;
+ 
+    If the second comparison is redundant and there is a code <cond> such
+    that the sequence can be performed as
+ 
+       REG_CC = compare (reg, xval1);
+       if (REG_CC <cond1> 0)  goto label1;
+       if (REG_CC <cond> 0)   goto label2;
+ 
+    then return <cond>.  Otherwise, return UNKNOWN.
+    xval1 and xval2 are CONST_INT, and mode is the scalar int mode in which
+    the comparison will be carried out.  reverse_cond1 can be set to reverse
+    condition cond1.  This is useful if the second comparison does not follow
+    the first one, but is located after label1 like in:
+ 
+       if (reg <cond1> xval1) goto label1;
+       ...
+       label1:
+       if (reg <cond2> xval2) goto label2;  */
+ 
+ static enum rtx_code
+ avr_redundant_compare (enum rtx_code cond1, rtx xval1,
+ 		       enum rtx_code cond2, rtx xval2,
+ 		       machine_mode mode, bool reverse_cond1)
+ {
+   HOST_WIDE_INT ival1 = INTVAL (xval1);
+   HOST_WIDE_INT ival2 = INTVAL (xval2);
+ 
+   unsigned HOST_WIDE_INT mask = GET_MODE_MASK (mode);
+   unsigned HOST_WIDE_INT uval1 = mask & UINTVAL (xval1);
+   unsigned HOST_WIDE_INT uval2 = mask & UINTVAL (xval2);
+ 
+   if (reverse_cond1)
+     cond1 = reverse_condition (cond1);
+ 
+   if (cond1 == EQ)
+     {
+       ////////////////////////////////////////////////
+       // A sequence like
+       //    if (reg == val)  goto label1;
+       //    if (reg > val)   goto label2;
+       // can be re-written using the same, simple comparison like in:
+       //    REG_CC = compare (reg, val)
+       //    if (REG_CC == 0)  goto label1;
+       //    if (REG_CC >= 0)  goto label2;
+       if (ival1 == ival2
+ 	  && (cond2 == GT || cond2 == GTU))
+ 	return avr_normalize_condition (cond2);
+ 
+       // Similar, but the input sequence is like
+       //    if (reg == val)  goto label1;
+       //    if (reg >= val)  goto label2;
+       if (ival1 == ival2
+ 	  && (cond2 == GE || cond2 == GEU))
+ 	return cond2;
+ 
+       // Similar, but the input sequence is like
+       //    if (reg == val)      goto label1;
+       //    if (reg >= val + 1)  goto label2;
+       if ((cond2 == GE && ival2 == 1 + ival1)
+ 	  || (cond2 == GEU && uval2 == 1 + uval1))
+ 	return cond2;
+ 
+       // Similar, but the input sequence is like
+       //    if (reg == val)      goto label1;
+       //    if (reg >  val - 1)  goto label2;
+       if ((cond2 == GT && ival2 == ival1 - 1)
+ 	  || (cond2 == GTU && uval2 == uval1 - 1))
+ 	return avr_normalize_condition (cond2);
+ 
+       /////////////////////////////////////////////////////////
+       // A sequence like
+       //    if (reg == val)      goto label1;
+       //    if (reg < 1 + val)   goto label2;
+       // can be re-written as
+       //    REG_CC = compare (reg, val)
+       //    if (REG_CC == 0)  goto label1;
+       //    if (REG_CC < 0)   goto label2;
+       if ((cond2 == LT && ival2 == 1 + ival1)
+ 	  || (cond2 == LTU && uval2 == 1 + uval1))
+ 	return cond2;
+ 
+       // Similar, but with an input sequence like
+       //    if (reg == val)   goto label1;
+       //    if (reg <= val)   goto label2;
+       if (ival1 == ival2
+ 	  && (cond2 == LE || cond2 == LEU))
+ 	return avr_normalize_condition (cond2);
+ 
+       // Similar, but with an input sequence like
+       //    if (reg == val)  goto label1;
+       //    if (reg < val)   goto label2;
+       if (ival1 == ival2
+ 	  && (cond2 == LT || cond2 == LTU))
+ 	return cond2;
+ 
+       // Similar, but with an input sequence like
+       //    if (reg == val)      goto label1;
+       //    if (reg <= val - 1)  goto label2;
+       if ((cond2 == LE && ival2 == ival1 - 1)
+ 	  || (cond2 == LEU && uval2 == uval1 - 1))
+ 	return avr_normalize_condition (cond2);
+ 
+     } // cond1 == EQ
+ 
+   return UNKNOWN;
+ }
+ 
+ 
+ /* If-else decision trees generated for switch / case may produce sequences
+    like
+ 
+       SREG = compare (reg, val);
+ 	  if (SREG == 0)  goto label1;
+       SREG = compare (reg, 1 + val);
+ 	  if (SREG >= 0)  goto label2;
+ 
+    which can be optimized to
+ 
+       SREG = compare (reg, val);
+ 	  if (SREG == 0)  goto label1;
+ 	  if (SREG >= 0)  goto label2;
+ 
+    The optimal place for such a pass would be directly after expand, but
+    it's not possible for a jump insn to target more than one code label.
+    Hence, run a mini pass right before split2 which introduces REG_CC.  */
+ 
+ void
+ avr_pass_ifelse::avr_rest_of_handle_ifelse (function*)
+ {
+   rtx_insn *next_insn;
+ 
+   for (rtx_insn *insn = get_insns(); insn; insn = next_insn)
+     {
+       next_insn = next_nonnote_nondebug_insn (insn);
+ 
+       if (! next_insn)
+ 	break;
+ 
+       // Search for two cbranch insns.  The first one is a cbranch.
+       // Filter for "cbranch<mode>4_insn" with mode in QI, HI, PSI, SI.
+ 
+       if (! JUMP_P (insn))
+ 	continue;
+ 
+       int icode1 = recog_memoized (insn);
+ 
+       if (icode1 != CODE_FOR_cbranchqi4_insn
+ 	  && icode1 != CODE_FOR_cbranchhi4_insn
+ 	  && icode1 != CODE_FOR_cbranchpsi4_insn
+ 	  && icode1 != CODE_FOR_cbranchsi4_insn)
+ 	continue;
+ 
+       rtx_jump_insn *insn1 = as_a<rtx_jump_insn *> (insn);
+       rtx_jump_insn *insn2 = nullptr;
+       bool follow_label1 = false;
+ 
+       // Extract the operands of the first insn:
+       // $0 = comparison operator ($1, $2)
+       // $1 = reg
+       // $2 = reg or const_int
+       // $3 = code_label
+       // $4 = optional SCRATCH for HI, PSI, SI cases.
+ 
+       const auto &op = recog_data.operand;
+ 
+       extract_insn (insn1);
+       rtx xop1[5] = { op[0], op[1], op[2], op[3], op[4] };
+       int n_operands = recog_data.n_operands;
+ 
+       // For now, we can optimize cbranches that follow an EQ cbranch,
+       // and cbranches that follow the label of a NE cbranch.
+ 
+       if (GET_CODE (xop1[0]) == EQ
+ 	  && JUMP_P (next_insn)
+ 	  && recog_memoized (next_insn) == icode1)
+ 	{
+ 	  // The 2nd cbranch insn follows insn1, i.e. is located in the
+ 	  // fallthrough path of insn1.
+ 
+ 	  insn2 = as_a<rtx_jump_insn *> (next_insn);
+ 	}
+       else if (GET_CODE (xop1[0]) == NE)
+ 	{
+ 	  // insn1 might branch to a label followed by a cbranch.
+ 
+ 	  rtx target1 = JUMP_LABEL (insn1);
+ 	  rtx_insn *code_label1 = JUMP_LABEL_AS_INSN (insn1);
+ 	  rtx_insn *next = next_nonnote_nondebug_insn (code_label1);
+ 	  rtx_insn *barrier = prev_nonnote_nondebug_insn (code_label1);
+ 
+ 	  if (// Target label of insn1 is used exactly once and
+ 	      // is not a fallthru, i.e. is preceded by a barrier.
+ 	      LABEL_NUSES (target1) == 1
+ 	      && barrier
+ 	      && BARRIER_P (barrier)
+ 	      // Following the target label is a cbranch of the same kind.
+ 	      && next
+ 	      && JUMP_P (next)
+ 	      && recog_memoized (next) == icode1)
+ 	    {
+ 	      follow_label1 = true;
+ 	      insn2 = as_a<rtx_jump_insn *> (next);
+ 	    }
+ 	}
+ 
+       if (! insn2)
+ 	continue;
+ 
+       // Also extract operands of insn2, and filter for REG + CONST_INT
+       // comparsons against the same register.
+ 
+       extract_insn (insn2);
+       rtx xop2[5] = { op[0], op[1], op[2], op[3], op[4] };
+ 
+       if (! rtx_equal_p (xop1[1], xop2[1])
+ 	  || ! CONST_INT_P (xop1[2])
+ 	  || ! CONST_INT_P (xop2[2]))
+ 	continue;
+ 
+       machine_mode mode = GET_MODE (xop1[1]);
+       enum rtx_code code1 = GET_CODE (xop1[0]);
+       enum rtx_code code2 = GET_CODE (xop2[0]);
+ 
+       code2 = avr_redundant_compare (code1, xop1[2], code2, xop2[2],
+ 				     mode, follow_label1);
+       if (code2 == UNKNOWN)
+ 	continue;
+ 
+       //////////////////////////////////////////////////////
+       // Found a replacement.
+ 
+       if (dump_file)
+ 	{
+ 	  fprintf (dump_file, "\n;; Found chain of jump_insn %d and"
+ 		   " jump_insn %d, follow_label1=%d:\n",
+ 		   INSN_UID (insn1), INSN_UID (insn2), follow_label1);
+ 	  print_rtl_single (dump_file, PATTERN (insn1));
+ 	  print_rtl_single (dump_file, PATTERN (insn2));
+ 	}
+ 
+       if (! follow_label1)
+ 	next_insn = next_nonnote_nondebug_insn (insn2);
+ 
+       // Pop the new branch conditions and the new comparison.
+       // Prematurely split into compare + branch so that we can drop
+       // the 2nd comparison.  The following pass, split2, splits all
+       // insns for REG_CC, and it should still work as usual even when
+       // there are already some REG_CC insns around.
+ 
+       rtx xcond1 = gen_rtx_fmt_ee (code1, VOIDmode, cc_reg_rtx, const0_rtx);
+       rtx xcond2 = gen_rtx_fmt_ee (code2, VOIDmode, cc_reg_rtx, const0_rtx);
+       rtx xpat1 = gen_branch (xop1[3], xcond1);
+       rtx xpat2 = gen_branch (xop2[3], xcond2);
+       rtx xcompare = NULL_RTX;
+ 
+       if (mode == QImode)
+ 	{
+ 	  gcc_assert (n_operands == 4);
+ 	  xcompare = gen_cmpqi3 (xop1[1], xop1[2]);
+ 	}
+       else
+ 	{
+ 	  gcc_assert (n_operands == 5);
+ 	  rtx (*gen_cmp)(rtx,rtx,rtx)
+ 	    = mode == HImode  ? gen_gen_comparehi
+ 	    : mode == PSImode ? gen_gen_comparepsi
+ 	    : gen_gen_comparesi; // SImode
+ 	  xcompare = gen_cmp (xop1[1], xop1[2], xop1[4]);
+ 	}
+ 
+       // Emit that stuff.
+ 
+       rtx_insn *cmp = emit_insn_before (xcompare, insn1);
+       rtx_jump_insn *branch1 = emit_jump_insn_before (xpat1, insn1);
+       rtx_jump_insn *branch2 = emit_jump_insn_before (xpat2, insn2);
+ 
+       JUMP_LABEL (branch1) = xop1[3];
+       JUMP_LABEL (branch2) = xop2[3];
+       // delete_insn() decrements LABEL_NUSES when deleting a JUMP_INSN, but
+       // when we pop a new JUMP_INSN, do it by hand.
+       ++LABEL_NUSES (xop1[3]);
+       ++LABEL_NUSES (xop2[3]);
+ 
+       delete_insn (insn1);
+       delete_insn (insn2);
+ 
+       // As a side effect, also recog the new insns.
+       gcc_assert (valid_insn_p (cmp));
+       gcc_assert (valid_insn_p (branch1));
+       gcc_assert (valid_insn_p (branch2));
+     } // loop insns
+ }
+ 
+ 
  /* Set `avr_arch' as specified by `-mmcu='.
     Return true on success.  */
  
*************** avr_option_override (void)
*** 756,761 ****
--- 1095,1110 ----
        flag_omit_frame_pointer = 0;
      }
  
+   /* Disable flag_delete_null_pointer_checks if zero is a valid address. */
+   if (targetm.addr_space.zero_address_valid (ADDR_SPACE_GENERIC))
+     flag_delete_null_pointer_checks = 0;
+ 
+   /* PR ipa/92606: Inter-procedural analysis optimizes data across
+      address-spaces and PROGMEM.  As of v14, the PROGMEM part is
+      still not fixed (and there is still no target hook as proposed
+      in PR92932).  Just disable respective bogus optimization.  */
+   flag_ipa_icf_variables = 0;
+ 
    if (flag_pic == 1)
      warning (OPT_fpic, "%<-fpic%> is not supported");
    if (flag_pic == 2)
*************** avr_no_gccisr_function_p (tree func)
*** 1019,1024 ****
--- 1368,1386 ----
    return avr_lookup_function_attribute1 (func, "no_gccisr");
  }
  
+ 
+ /* Implement `TARGET_CAN_INLINE_P'.  */
+ /* Some options like -mgas_isr_prologues depend on optimization level,
+    and the inliner might think that due to different options, inlining
+    is not permitted; see PR104327.  */
+ 
+ static bool
+ avr_can_inline_p (tree /* caller */, tree /* callee */)
+ {
+   // No restrictions whatsoever.
+   return true;
+ }
+ 
  /* Implement `TARGET_SET_CURRENT_FUNCTION'.  */
  /* Sanity cheching for above function attributes.  */
  
*************** avr_asm_final_postscan_insn (FILE *strea
*** 3173,3200 ****
  }
  
  
- /* Return 0 if undefined, 1 if always true or always false.  */
- 
- int
- avr_simplify_comparison_p (machine_mode mode, RTX_CODE op, rtx x)
- {
-   unsigned int max = (mode == QImode ? 0xff :
-                       mode == HImode ? 0xffff :
-                       mode == PSImode ? 0xffffff :
-                       mode == SImode ? 0xffffffff : 0);
-   if (max && op && CONST_INT_P (x))
-     {
-       if (unsigned_condition (op) != op)
-         max >>= 1;
- 
-       if (max != (INTVAL (x) & max)
-           && INTVAL (x) != 0xff)
-         return 1;
-     }
-   return 0;
- }
- 
- 
  /* Worker function for `FUNCTION_ARG_REGNO_P'.  */
  /* Returns nonzero if REGNO is the number of a hard
     register in which function arguments are sometimes passed.  */
--- 3535,3540 ----
*************** avr_frame_pointer_required_p (void)
*** 5677,5705 ****
            || get_frame_size () > 0);
  }
  
! /* Returns the condition of compare insn INSN, or UNKNOWN.  */
  
  static RTX_CODE
  compare_condition (rtx_insn *insn)
  {
!   rtx_insn *next = next_real_insn (insn);
  
!   if (next && JUMP_P (next))
      {
!       rtx pat = PATTERN (next);
!       if (GET_CODE (pat) == PARALLEL)
!         pat = XVECEXP (pat, 0, 0);
!       rtx src = SET_SRC (pat);
! 
!       if (IF_THEN_ELSE == GET_CODE (src))
!         return GET_CODE (XEXP (src, 0));
      }
  
    return UNKNOWN;
  }
  
  
! /* Returns true iff INSN is a tst insn that only tests the sign.  */
  
  static bool
  compare_sign_p (rtx_insn *insn)
--- 6017,6052 ----
            || get_frame_size () > 0);
  }
  
! 
! /* Returns the condition of the branch following INSN, where INSN is some
!    comparison.  If the next insn is not a branch or the condition code set
!    by INSN might be used by more insns than the next one, return UNKNOWN.
!    For now, just look at the next insn, which misses some opportunities like
!    following jumps.  */
  
  static RTX_CODE
  compare_condition (rtx_insn *insn)
  {
!   rtx set;
!   rtx_insn *next = next_real_nondebug_insn (insn);
  
!   if (next
!       && JUMP_P (next)
!       // If SREG does not die in the next insn, it is used in more than one
!       // branch.  This can happen due to pass .avr-ifelse optimizations.
!       && dead_or_set_regno_p (next, REG_CC)
!       // Branches are (set (pc) (if_then_else (COND (...)))).
!       && (set = single_set (next))
!       && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
      {
!       return GET_CODE (XEXP (SET_SRC (set), 0));
      }
  
    return UNKNOWN;
  }
  
  
! /* Returns true if INSN is a tst insn that only tests the sign.  */
  
  static bool
  compare_sign_p (rtx_insn *insn)
*************** compare_sign_p (rtx_insn *insn)
*** 5709,5731 ****
  }
  
  
! /* Returns true iff the next insn is a JUMP_INSN with a condition
!    that needs to be swapped (GT, GTU, LE, LEU).  */
  
  static bool
! compare_diff_p (rtx_insn *insn)
  {
    RTX_CODE cond = compare_condition (insn);
!   return (cond == GT || cond == GTU || cond == LE || cond == LEU) ? cond : 0;
  }
  
- /* Returns true iff INSN is a compare insn with the EQ or NE condition.  */
  
! static bool
! compare_eq_p (rtx_insn *insn)
  {
!   RTX_CODE cond = compare_condition (insn);
!   return (cond == EQ || cond == NE);
  }
  
  
--- 6056,6150 ----
  }
  
  
! /* Returns true if INSN is a compare insn with the EQ or NE condition.  */
  
  static bool
! compare_eq_p (rtx_insn *insn)
  {
    RTX_CODE cond = compare_condition (insn);
!   return (cond == EQ || cond == NE);
  }
  
  
! /* Implement `TARGET_CANONICALIZE_COMPARISON'.  */
! /* Basically tries to convert "difficult" comparisons like GT[U]
!    and LE[U] to simple ones.  Some asymmetric comparisons can be
!    transformed to EQ or NE against zero.  */
! 
! static void
! avr_canonicalize_comparison (int *icode, rtx *op0, rtx *op1, bool op0_fixed)
  {
!   enum rtx_code code = (enum rtx_code) *icode;
!   machine_mode mode = GET_MODE (*op0);
! 
!   bool signed_p = code == GT || code == LE;
!   bool unsigned_p = code == GTU || code == LEU;
!   bool difficult_p = signed_p || unsigned_p;
! 
!   if (// Only do integers and fixed-points.
!       (! SCALAR_INT_MODE_P (mode)
!        && ! ALL_SCALAR_FIXED_POINT_MODE_P (mode))
!       // Only do comparisons against a register.
!       || ! register_operand (*op0, mode))
!     return;
! 
!   // Canonicalize "difficult" reg-reg comparisons.
! 
!   if (! op0_fixed
!       && difficult_p
!       && register_operand (*op1, mode))
!     {
!       std::swap (*op0, *op1);
!       *icode = (int) swap_condition (code);
!       return;
!     }
! 
!   // Canonicalize comparisons against compile-time constants.
! 
!   if (CONST_INT_P (*op1)
!       || CONST_FIXED_P (*op1))
!     {
!       // INT_MODE of the same size.
!       scalar_int_mode imode = int_mode_for_mode (mode).require ();
! 
!       unsigned HOST_WIDE_INT mask = GET_MODE_MASK (imode);
!       unsigned HOST_WIDE_INT maxval = signed_p ? mask >> 1 : mask;
! 
!       // Convert value *op1 to imode.
!       rtx xval = simplify_gen_subreg (imode, *op1, mode, 0);
! 
!       // Canonicalize difficult comparisons against const.
!       if (difficult_p
! 	  && (UINTVAL (xval) & mask) != maxval)
! 	{
! 	  // Convert *op0 > *op1  to *op0 >= 1 + *op1.
! 	  // Convert *op0 <= *op1 to *op0 <  1 + *op1.
! 	  xval = simplify_binary_operation (PLUS, imode, xval, const1_rtx);
! 
! 	  // Convert value back to its original mode.
! 	  *op1 = simplify_gen_subreg (mode, xval, imode, 0);
! 
! 	  // Map  >  to  >=  and  <=  to  <.
! 	  *icode = (int) avr_normalize_condition (code);
! 
! 	  return;
! 	}
! 
!       // Some asymmetric comparisons can be turned into EQ or NE.
!       if (code == LTU && xval == const1_rtx)
! 	{
! 	  *icode = (int) EQ;
! 	  *op1 = CONST0_RTX (mode);
! 	  return;
! 	}
! 
!       if (code == GEU && xval == const1_rtx)
! 	{
! 	  *icode = (int) NE;
! 	  *op1 = CONST0_RTX (mode);
! 	  return;
! 	}
!     }
  }
  
  
*************** avr_out_tstsi (rtx_insn *insn, rtx *op,
*** 6018,6023 ****
--- 6437,6504 ----
  }
  
  
+ /* Output a comparison of a zero- or sign-extended register against a
+    plain register.  CODE is SIGN_EXTEND or ZERO_EXTEND.  Return "".
+ 
+    PLEN != 0: Set *PLEN to the code length in words. Don't output anything.
+    PLEN == 0: Print instructions.  */
+ 
+ const char*
+ avr_out_cmp_ext (rtx xop[], enum rtx_code code, int *plen)
+ {
+   // The smaller reg is the one that's to be extended.  Get its index as z.
+   int z = GET_MODE_SIZE (GET_MODE (xop[1])) < GET_MODE_SIZE (GET_MODE (xop[0]));
+   rtx zreg = xop[z];
+   rtx reg = xop[1 - z];
+   machine_mode mode = GET_MODE (reg);
+   machine_mode zmode = GET_MODE (zreg);
+   rtx zex;
+ 
+   if (plen)
+     *plen = 0;
+ 
+   // zex holds the extended bytes above zreg.  This is 0 for ZERO_EXTEND,
+   // and 0 or -1 for SIGN_EXTEND.
+ 
+   if (code == SIGN_EXTEND)
+     {
+       // Sign-extend the high-byte of zreg to tmp_reg.
+       int zmsb = GET_MODE_SIZE (zmode) - 1;
+       rtx xzmsb = simplify_gen_subreg (QImode, zreg, zmode, zmsb);
+ 
+       avr_asm_len ("mov __tmp_reg__,%0" CR_TAB
+ 		   "rol __tmp_reg__"    CR_TAB
+ 		   "sbc __tmp_reg__,__tmp_reg__", &xzmsb, plen, 3);
+       zex = tmp_reg_rtx;
+     }
+   else if (code == ZERO_EXTEND)
+     {
+       zex = zero_reg_rtx;
+     }
+   else
+     gcc_unreachable();
+ 
+   // Now output n_bytes bytes of the very comparison.
+ 
+   int n_bytes = GET_MODE_SIZE (mode);
+ 
+   avr_asm_len ("cp %0,%1", xop, plen, 1);
+ 
+   for (int b = 1; b < n_bytes; ++b)
+     {
+       rtx regs[2];
+       regs[1 - z] = simplify_gen_subreg (QImode, reg, mode, b);
+       regs[z] = (b < GET_MODE_SIZE (zmode)
+ 		 ? simplify_gen_subreg (QImode, zreg, zmode, b)
+ 		 : zex);
+ 
+       avr_asm_len ("cpc %0,%1", regs, plen, 1);
+     }
+ 
+   return "";
+ }
+ 
+ 
  /* Generate asm equivalent for various shifts.  This only handles cases
     that are not already carefully hand-optimized in ?sh??i3_out.
  
*************** avr_out_plus (rtx insn, rtx *xop, int *p
*** 8160,8165 ****
--- 8641,8762 ----
  }
  
  
+ /* Output an instruction sequence for addition of REG in XOP[0] and CONST_INT
+    in XOP[1] in such a way that SREG.Z and SREG.N are set according to the
+    result.  XOP[2] might be a d-regs clobber register.  If XOP[2] is SCRATCH,
+    then the addition can be performed without a clobber reg.  Return "".
+ 
+    If PLEN == NULL, then output the instructions.
+    If PLEN != NULL, then set *PLEN to the length of the sequence in words. */
+ 
+ const char*
+ avr_out_plus_set_ZN (rtx *xop, int *plen)
+ {
+   if (plen)
+     *plen = 0;
+ 
+   // Register to compare and value to compare against.
+   rtx xreg = xop[0];
+   rtx xval = xop[1];
+ 
+   machine_mode mode = GET_MODE (xreg);
+ 
+   // Number of bytes to operate on.
+   int n_bytes = GET_MODE_SIZE (mode);
+ 
+   if (n_bytes == 1)
+     {
+       if (INTVAL (xval) == 1)
+ 	return avr_asm_len ("inc %0", xop, plen, 1);
+ 
+       if (INTVAL (xval) == -1)
+ 	return avr_asm_len ("dec %0", xop, plen, 1);
+     }
+ 
+   if (n_bytes == 2
+       && test_hard_reg_class (ADDW_REGS, xreg)
+       && IN_RANGE (INTVAL (xval), 1, 63))
+     {
+       // Add 16-bit value in [1..63] to a w register.
+       return avr_asm_len ("adiw %0, %1", xop, plen, 1);
+     }
+ 
+   // Addition won't work; subtract the negative of XVAL instead.
+   xval = simplify_unary_operation (NEG, mode, xval, mode);
+ 
+   // Value (0..0xff) held in clobber register xop[2] or -1 if unknown.
+   int clobber_val = -1;
+ 
+   // [0] = Current sub-register.
+   // [1] = Current partial xval.
+   // [2] = 8-bit clobber d-register or SCRATCH.
+   rtx op[3];
+   op[2] = xop[2];
+ 
+   // Work byte-wise from LSB to MSB.  The lower two bytes might be
+   // SBIW'ed in one go.
+   for (int i = 0; i < n_bytes; ++i)
+     {
+       op[0] = simplify_gen_subreg (QImode, xreg, mode, i);
+ 
+       if (i == 0
+ 	  && n_bytes >= 2
+ 	  && test_hard_reg_class (ADDW_REGS, op[0]))
+ 	{
+ 	  op[1] = simplify_gen_subreg (HImode, xval, mode, 0);
+ 	  if (IN_RANGE (INTVAL (op[1]), 0, 63))
+ 	    {
+ 	      // SBIW can handle the lower 16 bits.
+ 	      avr_asm_len ("sbiw %0, %1", op, plen, 1);
+ 
+ 	      // Next byte has already been handled: Skip it.
+ 	      ++i;
+ 	      continue;
+ 	    }
+ 	}
+ 
+       op[1] = simplify_gen_subreg (QImode, xval, mode, i);
+ 
+       if (test_hard_reg_class (LD_REGS, op[0]))
+ 	{
+ 	  // d-regs can subtract immediates.
+ 	  avr_asm_len (i == 0
+ 		       ? "subi %0, %1"
+ 		       : "sbci %0, %1", op, plen, 1);
+ 	}
+       else
+ 	{
+ 	  int val8 = 0xff & INTVAL (op[1]);
+ 	  if (val8 == 0)
+ 	    {
+ 	      // Any register can subtract 0.
+ 	      avr_asm_len (i == 0
+ 			   ? "sub %0, __zero_reg__"
+ 			   : "sbc %0, __zero_reg__", op, plen, 1);
+ 	    }
+ 	  else
+ 	    {
+ 	      // Use d-register to hold partial xval.
+ 
+ 	      if (val8 != clobber_val)
+ 		{
+ 		  // Load partial xval to QI clobber reg and memoize for later.
+ 		  gcc_assert (REG_P (op[2]));
+ 		  avr_asm_len ("ldi %2, %1", op, plen, 1);
+ 		  clobber_val = val8;
+ 		}
+ 
+ 	      avr_asm_len (i == 0
+ 			   ? "sub %0, %2"
+ 			   : "sbc %0, %2", op, plen, 1);
+ 	    }
+ 	}
+     } // Loop bytes.
+ 
+   return "";
+ }
+ 
+ 
  /* Output bit operation (IOR, AND, XOR) with register XOP[0] and compile
     time constant XOP[2]:
  
*************** avr_adjust_insn_length (rtx_insn *insn,
*** 9291,9296 ****
--- 9888,9895 ----
      case ADJUST_LEN_TSTSI: avr_out_tstsi (insn, op, &len); break;
      case ADJUST_LEN_COMPARE: avr_out_compare (insn, op, &len); break;
      case ADJUST_LEN_COMPARE64: avr_out_compare64 (insn, op, &len); break;
+     case ADJUST_LEN_CMP_UEXT: avr_out_cmp_ext (op, ZERO_EXTEND, &len); break;
+     case ADJUST_LEN_CMP_SEXT: avr_out_cmp_ext (op, SIGN_EXTEND, &len); break;
  
      case ADJUST_LEN_LSHRQI: lshrqi3_out (insn, op, &len); break;
      case ADJUST_LEN_LSHRHI: lshrhi3_out (insn, op, &len); break;
*************** avr_adjust_insn_length (rtx_insn *insn,
*** 9311,9316 ****
--- 9910,9916 ----
      case ADJUST_LEN_CALL: len = AVR_HAVE_JMP_CALL ? 2 : 1; break;
  
      case ADJUST_LEN_INSERT_BITS: avr_out_insert_bits (op, &len); break;
+     case ADJUST_LEN_ADD_SET_ZN: avr_out_plus_set_ZN (op, &len); break;
  
      case ADJUST_LEN_INSV_NOTBIT:
        avr_out_insert_notbit (insn, op, NULL_RTX, &len);
*************** avr_handle_addr_attribute (tree *node, t
*** 9640,9645 ****
--- 10240,10249 ----
  			   int flags ATTRIBUTE_UNUSED, bool *no_add)
  {
    bool io_p = startswith (IDENTIFIER_POINTER (name), "io");
+   HOST_WIDE_INT io_start = avr_arch->sfr_offset;
+   HOST_WIDE_INT io_end = strcmp (IDENTIFIER_POINTER (name), "io_low") == 0
+     ? io_start + 0x1f
+     : io_start + 0x3f;
    location_t loc = DECL_SOURCE_LOCATION (*node);
  
    if (!VAR_P (*node))
*************** avr_handle_addr_attribute (tree *node, t
*** 9663,9674 ****
  	}
        else if (io_p
  	       && (!tree_fits_shwi_p (arg)
! 		   || !(strcmp (IDENTIFIER_POINTER (name), "io_low") == 0
! 			? low_io_address_operand : io_address_operand)
! 			 (GEN_INT (TREE_INT_CST_LOW (arg)), QImode)))
  	{
! 	  warning_at (loc, OPT_Wattributes, "%qE attribute address "
! 		      "out of range", name);
  	  *no_add = true;
  	}
        else
--- 10267,10276 ----
  	}
        else if (io_p
  	       && (!tree_fits_shwi_p (arg)
! 		   || ! IN_RANGE (TREE_INT_CST_LOW (arg), io_start, io_end)))
  	{
! 	  warning_at (loc, OPT_Wattributes, "%qE attribute address out of range"
! 		      " 0x%x%s0x%x", name, (int) io_start, "...", (int) io_end);
  	  *no_add = true;
  	}
        else
*************** avr_handle_addr_attribute (tree *node, t
*** 9694,9699 ****
--- 10296,10307 ----
      warning_at (loc, OPT_Wattributes, "%qE attribute on non-volatile variable",
  		name);
  
+   // Optimizers must not draw any conclusions from "static int addr;" etc.
+   // because the contents of `addr' are not given by its initializer but
+   // by the contents at the address as specified by the attribute.
+   if (VAR_P (*node) && ! *no_add)
+     TREE_THIS_VOLATILE (*node) = 1;
+ 
    return NULL_TREE;
  }
  
*************** avr_eval_addr_attrib (rtx x)
*** 9711,9717 ****
  	  attr = lookup_attribute ("io", DECL_ATTRIBUTES (decl));
            if (!attr || !TREE_VALUE (attr))
              attr = lookup_attribute ("io_low", DECL_ATTRIBUTES (decl));
- 	  gcc_assert (attr);
  	}
        if (!attr || !TREE_VALUE (attr))
  	attr = lookup_attribute ("address", DECL_ATTRIBUTES (decl));
--- 10319,10324 ----
*************** avr_pgm_check_var_decl (tree node)
*** 9958,9963 ****
--- 10565,10581 ----
  static void
  avr_insert_attributes (tree node, tree *attributes)
  {
+   if (VAR_P (node)
+       && ! TREE_STATIC (node)
+       && ! DECL_EXTERNAL (node))
+     {
+       const char *names[] = { "io", "io_low", "address", NULL };
+       for (const char **p = names; *p; ++p)
+ 	if (lookup_attribute (*p, *attributes))
+ 	  error ("variable %q+D with attribute %qs must be located in "
+ 		 "static storage", node, *p);
+     }
+ 
    avr_pgm_check_var_decl (node);
  
    if (TARGET_MAIN_IS_OS_TASK
*************** avr_insert_attributes (tree node, tree *
*** 10018,10054 ****
  /* Track need of __do_clear_bss.  */
  
  void
! avr_asm_output_aligned_decl_common (FILE * stream,
!                                     tree decl,
!                                     const char *name,
!                                     unsigned HOST_WIDE_INT size,
!                                     unsigned int align, bool local_p)
  {
-   rtx mem = decl == NULL_TREE ? NULL_RTX : DECL_RTL (decl);
-   rtx symbol;
- 
-   if (mem != NULL_RTX && MEM_P (mem)
-       && SYMBOL_REF_P ((symbol = XEXP (mem, 0)))
-       && (SYMBOL_REF_FLAGS (symbol) & (SYMBOL_FLAG_IO | SYMBOL_FLAG_ADDRESS)))
-     {
-       if (!local_p)
- 	{
- 	  fprintf (stream, "\t.globl\t");
- 	  assemble_name (stream, name);
- 	  fprintf (stream, "\n");
- 	}
-       if (SYMBOL_REF_FLAGS (symbol) & SYMBOL_FLAG_ADDRESS)
- 	{
- 	  assemble_name (stream, name);
- 	  fprintf (stream, " = %ld\n",
- 		   (long) INTVAL (avr_eval_addr_attrib (symbol)));
- 	}
-       else if (local_p)
- 	error_at (DECL_SOURCE_LOCATION (decl),
- 		  "static IO declaration for %q+D needs an address", decl);
-       return;
-     }
- 
    /* __gnu_lto_slim is just a marker for the linker injected by toplev.cc.
       There is no need to trigger __do_clear_bss code for them.  */
  
--- 10636,10646 ----
  /* Track need of __do_clear_bss.  */
  
  void
! avr_asm_output_aligned_decl_common (FILE *stream, tree /* decl */,
! 				    const char *name,
! 				    unsigned HOST_WIDE_INT size,
! 				    unsigned int align, bool local_p)
  {
    /* __gnu_lto_slim is just a marker for the linker injected by toplev.cc.
       There is no need to trigger __do_clear_bss code for them.  */
  
*************** avr_asm_output_aligned_decl_common (FILE
*** 10061,10066 ****
--- 10653,10661 ----
      ASM_OUTPUT_ALIGNED_COMMON (stream, name, size, align);
  }
  
+ 
+ /* Implement `ASM_OUTPUT_ALIGNED_BSS'.  */
+ 
  void
  avr_asm_asm_output_aligned_bss (FILE *file, tree decl, const char *name,
  				unsigned HOST_WIDE_INT size, int align,
*************** avr_asm_asm_output_aligned_bss (FILE *fi
*** 10068,10087 ****
  				  (FILE *, tree, const char *,
  				   unsigned HOST_WIDE_INT, int))
  {
!   rtx mem = decl == NULL_TREE ? NULL_RTX : DECL_RTL (decl);
!   rtx symbol;
  
!   if (mem != NULL_RTX && MEM_P (mem)
!       && SYMBOL_REF_P ((symbol = XEXP (mem, 0)))
!       && (SYMBOL_REF_FLAGS (symbol) & (SYMBOL_FLAG_IO | SYMBOL_FLAG_ADDRESS)))
!     {
!       if (!(SYMBOL_REF_FLAGS (symbol) & SYMBOL_FLAG_ADDRESS))
! 	error_at (DECL_SOURCE_LOCATION (decl),
! 		  "IO definition for %q+D needs an address", decl);
!       avr_asm_output_aligned_decl_common (file, decl, name, size, align, false);
!     }
!   else
!     default_func (file, decl, name, size, align);
  }
  
  
--- 10663,10672 ----
  				  (FILE *, tree, const char *,
  				   unsigned HOST_WIDE_INT, int))
  {
!   if (!startswith (name, "__gnu_lto"))
!     avr_need_clear_bss_p = true;
  
!   default_func (file, decl, name, size, align);
  }
  
  
*************** avr_output_progmem_section_asm_op (const
*** 10120,10125 ****
--- 10705,10762 ----
  }
  
  
+ /* A noswitch section callback to output symbol definitions for
+    attributes "io", "io_low" and "address".  */
+ 
+ static bool
+ avr_output_addr_attrib (tree decl, const char *name,
+ 			unsigned HOST_WIDE_INT /* size */,
+ 			unsigned HOST_WIDE_INT /* align */)
+ {
+   gcc_assert (DECL_RTL_SET_P (decl));
+ 
+   FILE *stream = asm_out_file;
+   bool local_p = ! DECL_WEAK (decl) && ! TREE_PUBLIC (decl);
+   rtx symbol, mem = DECL_RTL (decl);
+ 
+   if (mem != NULL_RTX && MEM_P (mem)
+       && SYMBOL_REF_P ((symbol = XEXP (mem, 0)))
+       && (SYMBOL_REF_FLAGS (symbol) & (SYMBOL_FLAG_IO | SYMBOL_FLAG_ADDRESS)))
+     {
+       if (! local_p)
+ 	{
+ 	  fprintf (stream, "\t%s\t", DECL_WEAK (decl) ? ".weak" : ".globl");
+ 	  assemble_name (stream, name);
+ 	  fprintf (stream, "\n");
+ 	}
+ 
+       if (SYMBOL_REF_FLAGS (symbol) & SYMBOL_FLAG_ADDRESS)
+ 	{
+ 	  assemble_name (stream, name);
+ 	  fprintf (stream, " = %ld\n",
+ 		   (long) INTVAL (avr_eval_addr_attrib (symbol)));
+ 	}
+       else if (local_p)
+ 	{
+ 	  const char *names[] = { "io", "io_low", "address", NULL };
+ 	  for (const char **p = names; *p; ++p)
+ 	    if (lookup_attribute (*p, DECL_ATTRIBUTES (decl)))
+ 	      {
+ 		error ("static attribute %qs declaration for %q+D needs an "
+ 		       "address", *p, decl);
+ 		break;
+ 	      }
+ 	}
+ 
+       return true;
+     }
+ 
+   gcc_unreachable();
+ 
+   return false;
+ }
+ 
+ 
  /* Implement `TARGET_ASM_INIT_SECTIONS'.  */
  
  static void
*************** avr_asm_init_sections (void)
*** 10135,10140 ****
--- 10772,10778 ----
      readonly_data_section->unnamed.callback = avr_output_data_section_asm_op;
    data_section->unnamed.callback = avr_output_data_section_asm_op;
    bss_section->unnamed.callback = avr_output_bss_section_asm_op;
+   tls_comm_section->noswitch.callback = avr_output_addr_attrib;
  }
  
  
*************** avr_encode_section_info (tree decl, rtx
*** 10311,10325 ****
  
        tree io_low_attr = lookup_attribute ("io_low", attr);
        tree io_attr = lookup_attribute ("io", attr);
  
        if (io_low_attr
  	  && TREE_VALUE (io_low_attr) && TREE_VALUE (TREE_VALUE (io_low_attr)))
! 	addr_attr = io_attr;
        else if (io_attr
  	       && TREE_VALUE (io_attr) && TREE_VALUE (TREE_VALUE (io_attr)))
  	addr_attr = io_attr;
        else
! 	addr_attr = lookup_attribute ("address", attr);
        if (io_low_attr
  	  || (io_attr && addr_attr
                && low_io_address_operand
--- 10949,10965 ----
  
        tree io_low_attr = lookup_attribute ("io_low", attr);
        tree io_attr = lookup_attribute ("io", attr);
+       tree address_attr = lookup_attribute ("address", attr);
  
        if (io_low_attr
  	  && TREE_VALUE (io_low_attr) && TREE_VALUE (TREE_VALUE (io_low_attr)))
! 	addr_attr = io_low_attr;
        else if (io_attr
  	       && TREE_VALUE (io_attr) && TREE_VALUE (TREE_VALUE (io_attr)))
  	addr_attr = io_attr;
        else
! 	addr_attr = address_attr;
! 
        if (io_low_attr
  	  || (io_attr && addr_attr
                && low_io_address_operand
*************** avr_encode_section_info (tree decl, rtx
*** 10334,10339 ****
--- 10974,11009 ----
  	 don't use the exact value for constant propagation.  */
        if (addr_attr && !DECL_EXTERNAL (decl))
  	SYMBOL_REF_FLAGS (sym) |= SYMBOL_FLAG_ADDRESS;
+ 
+       if (io_attr || io_low_attr || address_attr)
+ 	{
+ 	  if (DECL_INITIAL (decl))
+ 	    {
+ 	      /* Initializers are not yet parsed in TARGET_INSERT_ATTRIBUTES,
+ 		 hence deny initializers now.  The values of symbols with an
+ 		 address attribute are determined by the attribute, not by
+ 		 some initializer.  */
+ 
+ 	      error ("variable %q+D with attribute %qs must not have an "
+ 		     "initializer", decl,
+ 		     io_low_attr ? "io_low" : io_attr ? "io" : "address");
+ 	    }
+ 	  else
+ 	    {
+ 	      /* PR112952: The only way to output a variable declaration in a
+ 		 custom manner is by means of a noswitch section callback.
+ 		 There are only three noswitch sections: comm_section,
+ 		 lcomm_section and tls_comm_section.  And there is no way to
+ 		 wire a custom noswitch section to a decl.  As lcomm_section
+ 		 is bypassed with -fdata-sections -fno-common, there is no
+ 		 other way than making use of tls_comm_section.  As we are
+ 		 using that section anyway, also use it in the public case.  */
+ 
+ 	      DECL_COMMON (decl) = 1;
+ 	      set_decl_section_name (decl, (const char*) nullptr);
+ 	      set_decl_tls_model (decl, (tls_model) 2);
+ 	    }
+ 	}
      }
  
    if (AVR_TINY
*************** avr_mul_highpart_cost (rtx x, int)
*** 10607,10612 ****
--- 11277,11334 ----
  }
  
  
+ /* Return the expected cost of a conditional branch like
+    (set (pc)
+ 	(if_then_else (X)
+ 		      (label_ref *)
+ 		      (pc)))
+    where X is some comparison operator.  */
+ 
+ static int
+ avr_cbranch_cost (rtx x)
+ {
+   bool difficult_p = difficult_comparison_operator (x, VOIDmode);
+ 
+   if (reload_completed)
+     {
+       // After reload, we basically just have plain branches.
+       return COSTS_N_INSNS (1 + difficult_p);
+     }
+ 
+   rtx xreg = XEXP (x, 0);
+   rtx xval = XEXP (x, 1);
+   machine_mode mode = GET_MODE (xreg);
+   if (mode == VOIDmode)
+     mode = GET_MODE (xval);
+   int size = GET_MODE_SIZE (mode);
+ 
+   if (GET_CODE (xreg) == ZERO_EXTEND
+       || GET_CODE (xval) == ZERO_EXTEND)
+     {
+       // *cbranch<HISI:mode>.<code><QIPSI:mode>.0/1, code = zero_extend.
+       return COSTS_N_INSNS (size + 1);
+     }
+ 
+   if (GET_CODE (xreg) == SIGN_EXTEND
+       || GET_CODE (xval) == SIGN_EXTEND)
+     {
+       // *cbranch<HISI:mode>.<code><QIPSI:mode>.0/1, code = sign_extend.
+       // Make it a bit cheaper than it actually is (less reg pressure).
+       return COSTS_N_INSNS (size + 1 + 1);
+     }
+ 
+   bool reg_p = register_operand (xreg, mode);
+   bool reg_or_0_p = reg_or_0_operand (xval, mode);
+ 
+   return COSTS_N_INSNS (size
+ 			// For the branch
+ 			+ 1 + difficult_p
+ 			// Combine might propagate constants other than zero
+ 			// into the 2nd operand.  Make that more expensive.
+ 			+ 1 * (!reg_p || !reg_or_0_p));
+ }
+ 
+ 
  /* Mutually recursive subroutine of avr_rtx_cost for calculating the
     cost of an RTX operand given its context.  X is the rtx of the
     operand, MODE is its mode, and OUTER is the rtx_code of this
*************** avr_rtx_costs_1 (rtx x, machine_mode mod
*** 10844,10849 ****
--- 11566,11580 ----
              *total += COSTS_N_INSNS (1);
            return true;
          }
+       if (IOR == code
+           && AND == GET_CODE (XEXP (x, 0))
+           && AND == GET_CODE (XEXP (x, 1))
+           && single_zero_operand (XEXP (XEXP (x, 0), 1), mode))
+         {
+           // Open-coded bit transfer.
+           *total = COSTS_N_INSNS (2);
+           return true;
+         }
        *total = COSTS_N_INSNS (GET_MODE_SIZE (mode));
        *total += avr_operand_rtx_cost (XEXP (x, 0), mode, code, 0, speed);
        if (!CONST_INT_P (XEXP (x, 1)))
*************** avr_rtx_costs_1 (rtx x, machine_mode mod
*** 11490,11495 ****
--- 12221,12235 ----
          }
        break;
  
+     case IF_THEN_ELSE:
+       if (outer_code == SET
+ 	  && XEXP (x, 2) == pc_rtx
+ 	  && ordered_comparison_operator (XEXP (x, 0), VOIDmode))
+ 	{
+ 	  *total = avr_cbranch_cost (XEXP (x, 0));
+ 	  return true;
+ 	}
+ 
      default:
        break;
      }
*************** avr_rtx_costs (rtx x, machine_mode mode,
*** 11515,11520 ****
--- 12255,12306 ----
  }
  
  
+ /* Implement `TARGET_INSN_COST'.  */
+ /* For some insns, it is not enough to look at the cost of the SET_SRC.
+    In that case, have a look at the entire insn, e.g. during insn combine.  */
+ 
+ static int
+ avr_insn_cost (rtx_insn *insn, bool speed)
+ {
+   const int unknown_cost = -1;
+   int cost = unknown_cost;
+ 
+   rtx set = single_set (insn);
+ 
+   if (set
+       && ZERO_EXTRACT == GET_CODE (SET_DEST (set)))
+     {
+       // Try find anything that would flip the extracted bit.
+       bool not_bit_p = false;
+ 
+       subrtx_iterator::array_type array;
+       FOR_EACH_SUBRTX (iter, array, SET_SRC (set), NONCONST)
+ 	{
+ 	  enum rtx_code code = GET_CODE (*iter);
+ 	  not_bit_p |= code == NOT || code == XOR || code == GE;
+ 	}
+ 
+       // Don't go too deep into the analysis.  In almost all cases,
+       // using BLD/BST is the best we can do for single-bit moves,
+       // even considering CSE.
+       cost = COSTS_N_INSNS (2 + not_bit_p);
+     }
+ 
+   if (cost != unknown_cost)
+     {
+       if (avr_log.rtx_costs)
+ 	avr_edump ("\n%? (%s) insn_cost=%d\n%r\n",
+ 		   speed ? "speed" : "size", cost, insn);
+       return cost;
+     }
+ 
+   // Resort to what rtlanal.cc::insn_cost() implements as a default
+   // when targetm.insn_cost() is not implemented.
+ 
+   return pattern_cost (PATTERN (insn), speed);
+ }
+ 
+ 
  /* Implement `TARGET_ADDRESS_COST'.  */
  
  static int
*************** avr_normalize_condition (RTX_CODE condit
*** 11602,11882 ****
      }
  }
  
- /* Helper function for `avr_reorg'.  */
- 
- static rtx
- avr_compare_pattern (rtx_insn *insn)
- {
-   rtx pattern = single_set (insn);
- 
-   if (pattern
-       && NONJUMP_INSN_P (insn)
-       && REG_P (SET_DEST (pattern))
-       && REGNO (SET_DEST (pattern)) == REG_CC
-       && GET_CODE (SET_SRC (pattern)) == COMPARE)
-     {
-       machine_mode mode0 = GET_MODE (XEXP (SET_SRC (pattern), 0));
-       machine_mode mode1 = GET_MODE (XEXP (SET_SRC (pattern), 1));
- 
-       /* The 64-bit comparisons have fixed operands ACC_A and ACC_B.
-          They must not be swapped, thus skip them.  */
- 
-       if ((mode0 == VOIDmode || GET_MODE_SIZE (mode0) <= 4)
-           && (mode1 == VOIDmode || GET_MODE_SIZE (mode1) <= 4))
-         return pattern;
-     }
- 
-   return NULL_RTX;
- }
- 
- /* Helper function for `avr_reorg'.  */
- 
- /* Expansion of switch/case decision trees leads to code like
- 
-        REG_CC = compare (Reg, Num)
-        if (REG_CC == 0)
-          goto L1
- 
-        REG_CC = compare (Reg, Num)
-        if (REG_CC > 0)
-          goto L2
- 
-    The second comparison is superfluous and can be deleted.
-    The second jump condition can be transformed from a
-    "difficult" one to a "simple" one because "REG_CC > 0" and
-    "REG_CC >= 0" will have the same effect here.
- 
-    This function relies on the way switch/case is being expaned
-    as binary decision tree.  For example code see PR 49903.
- 
-    Return TRUE if optimization performed.
-    Return FALSE if nothing changed.
- 
-    INSN1 is a comparison, i.e. avr_compare_pattern != 0.
- 
-    We don't want to do this in text peephole because it is
-    tedious to work out jump offsets there and the second comparison
-    might have been transormed by `avr_reorg'.
- 
-    RTL peephole won't do because peephole2 does not scan across
-    basic blocks.  */
- 
- static bool
- avr_reorg_remove_redundant_compare (rtx_insn *insn1)
- {
-   rtx comp1, ifelse1, xcond1;
-   rtx_insn *branch1;
-   rtx comp2, ifelse2, xcond2;
-   rtx_insn *branch2, *insn2;
-   enum rtx_code code;
-   rtx_insn *jump;
-   rtx target, cond;
- 
-   /* Look out for:  compare1 - branch1 - compare2 - branch2  */
- 
-   branch1 = next_nonnote_nondebug_insn (insn1);
-   if (!branch1 || !JUMP_P (branch1))
-     return false;
- 
-   insn2 = next_nonnote_nondebug_insn (branch1);
-   if (!insn2 || !avr_compare_pattern (insn2))
-     return false;
- 
-   branch2 = next_nonnote_nondebug_insn (insn2);
-   if (!branch2 || !JUMP_P (branch2))
-     return false;
- 
-   comp1 = avr_compare_pattern (insn1);
-   comp2 = avr_compare_pattern (insn2);
-   xcond1 = single_set (branch1);
-   xcond2 = single_set (branch2);
- 
-   if (!comp1 || !comp2
-       || !rtx_equal_p (comp1, comp2)
-       || !xcond1 || SET_DEST (xcond1) != pc_rtx
-       || !xcond2 || SET_DEST (xcond2) != pc_rtx
-       || IF_THEN_ELSE != GET_CODE (SET_SRC (xcond1))
-       || IF_THEN_ELSE != GET_CODE (SET_SRC (xcond2)))
-     {
-       return false;
-     }
- 
-   comp1 = SET_SRC (comp1);
-   ifelse1 = SET_SRC (xcond1);
-   ifelse2 = SET_SRC (xcond2);
- 
-   /* comp<n> is COMPARE now and ifelse<n> is IF_THEN_ELSE.  */
- 
-   if (EQ != GET_CODE (XEXP (ifelse1, 0))
-       || !REG_P (XEXP (comp1, 0))
-       || !CONST_INT_P (XEXP (comp1, 1))
-       || XEXP (ifelse1, 2) != pc_rtx
-       || XEXP (ifelse2, 2) != pc_rtx
-       || LABEL_REF != GET_CODE (XEXP (ifelse1, 1))
-       || LABEL_REF != GET_CODE (XEXP (ifelse2, 1))
-       || !COMPARISON_P (XEXP (ifelse2, 0))
-       || REG_CC != REGNO (XEXP (XEXP (ifelse1, 0), 0))
-       || REG_CC != REGNO (XEXP (XEXP (ifelse2, 0), 0))
-       || const0_rtx != XEXP (XEXP (ifelse1, 0), 1)
-       || const0_rtx != XEXP (XEXP (ifelse2, 0), 1))
-     {
-       return false;
-     }
- 
-   /* We filtered the insn sequence to look like
- 
-         (set (reg:CC cc)
-              (compare (reg:M N)
-                       (const_int VAL)))
-         (set (pc)
-              (if_then_else (eq (reg:CC cc)
-                                (const_int 0))
-                            (label_ref L1)
-                            (pc)))
- 
-         (set (reg:CC cc)
-              (compare (reg:M N)
-                       (const_int VAL)))
-         (set (pc)
-              (if_then_else (CODE (reg:CC cc)
-                                  (const_int 0))
-                            (label_ref L2)
-                            (pc)))
-   */
- 
-   code = GET_CODE (XEXP (ifelse2, 0));
- 
-   /* Map GT/GTU to GE/GEU which is easier for AVR.
-      The first two instructions compare/branch on EQ
-      so we may replace the difficult
- 
-         if (x == VAL)   goto L1;
-         if (x > VAL)    goto L2;
- 
-      with easy
- 
-          if (x == VAL)   goto L1;
-          if (x >= VAL)   goto L2;
- 
-      Similarly, replace LE/LEU by LT/LTU.  */
- 
-   switch (code)
-     {
-     case EQ:
-     case LT:  case LTU:
-     case GE:  case GEU:
-       break;
- 
-     case LE:  case LEU:
-     case GT:  case GTU:
-       code = avr_normalize_condition (code);
-       break;
- 
-     default:
-       return false;
-     }
- 
-   /* Wrap the branches into UNSPECs so they won't be changed or
-      optimized in the remainder.  */
- 
-   target = XEXP (XEXP (ifelse1, 1), 0);
-   cond = XEXP (ifelse1, 0);
-   jump = emit_jump_insn_after (gen_branch_unspec (target, cond), insn1);
- 
-   JUMP_LABEL (jump) = JUMP_LABEL (branch1);
- 
-   target = XEXP (XEXP (ifelse2, 1), 0);
-   cond = gen_rtx_fmt_ee (code, VOIDmode, cc_reg_rtx, const0_rtx);
-   jump = emit_jump_insn_after (gen_branch_unspec (target, cond), insn2);
- 
-   JUMP_LABEL (jump) = JUMP_LABEL (branch2);
- 
-   /* The comparisons in insn1 and insn2 are exactly the same;
-      insn2 is superfluous so delete it.  */
- 
-   delete_insn (insn2);
-   delete_insn (branch1);
-   delete_insn (branch2);
- 
-   return true;
- }
- 
- 
- /* Implement `TARGET_MACHINE_DEPENDENT_REORG'.  */
- /* Optimize conditional jumps.  */
- 
- static void
- avr_reorg (void)
- {
-   rtx_insn *insn = get_insns();
- 
-   for (insn = next_real_insn (insn); insn; insn = next_real_insn (insn))
-     {
-       rtx pattern = avr_compare_pattern (insn);
- 
-       if (!pattern)
-         continue;
- 
-       if (optimize
-           && avr_reorg_remove_redundant_compare (insn))
-         {
-           continue;
-         }
- 
-       if (compare_diff_p (insn))
- 	{
-           /* Now we work under compare insn with difficult branch.  */
- 
- 	  rtx_insn *next = next_real_insn (insn);
-           rtx pat = PATTERN (next);
-           if (GET_CODE (pat) == PARALLEL)
-             pat = XVECEXP (pat, 0, 0);
- 
-           pattern = SET_SRC (pattern);
- 
-           if (true_regnum (XEXP (pattern, 0)) >= 0
-               && true_regnum (XEXP (pattern, 1)) >= 0)
-             {
-               rtx x = XEXP (pattern, 0);
-               rtx src = SET_SRC (pat);
-               rtx t = XEXP (src, 0);
-               PUT_CODE (t, swap_condition (GET_CODE (t)));
-               XEXP (pattern, 0) = XEXP (pattern, 1);
-               XEXP (pattern, 1) = x;
-               INSN_CODE (next) = -1;
-             }
-           else if (true_regnum (XEXP (pattern, 0)) >= 0
-                    && XEXP (pattern, 1) == const0_rtx)
-             {
-               /* This is a tst insn, we can reverse it.  */
-               rtx src = SET_SRC (pat);
-               rtx t = XEXP (src, 0);
- 
-               PUT_CODE (t, swap_condition (GET_CODE (t)));
-               XEXP (pattern, 1) = XEXP (pattern, 0);
-               XEXP (pattern, 0) = const0_rtx;
-               INSN_CODE (next) = -1;
-               INSN_CODE (insn) = -1;
-             }
-           else if (true_regnum (XEXP (pattern, 0)) >= 0
-                    && CONST_INT_P (XEXP (pattern, 1)))
-             {
-               rtx x = XEXP (pattern, 1);
-               rtx src = SET_SRC (pat);
-               rtx t = XEXP (src, 0);
-               machine_mode mode = GET_MODE (XEXP (pattern, 0));
- 
-               if (avr_simplify_comparison_p (mode, GET_CODE (t), x))
-                 {
-                   XEXP (pattern, 1) = gen_int_mode (INTVAL (x) + 1, mode);
-                   PUT_CODE (t, avr_normalize_condition (GET_CODE (t)));
-                   INSN_CODE (next) = -1;
-                   INSN_CODE (insn) = -1;
-                 }
-             }
-         }
-     }
- }
  
  /* Returns register number for function return value.*/
  
--- 12388,12393 ----
*************** avr_float_lib_compare_returns_bool (mach
*** 14572,14577 ****
--- 15083,15090 ----
  #undef  TARGET_ASM_FINAL_POSTSCAN_INSN
  #define TARGET_ASM_FINAL_POSTSCAN_INSN avr_asm_final_postscan_insn
  
+ #undef  TARGET_INSN_COST
+ #define TARGET_INSN_COST avr_insn_cost
  #undef  TARGET_REGISTER_MOVE_COST
  #define TARGET_REGISTER_MOVE_COST avr_register_move_cost
  #undef  TARGET_MEMORY_MOVE_COST
*************** avr_float_lib_compare_returns_bool (mach
*** 14580,14587 ****
  #define TARGET_RTX_COSTS avr_rtx_costs
  #undef  TARGET_ADDRESS_COST
  #define TARGET_ADDRESS_COST avr_address_cost
- #undef  TARGET_MACHINE_DEPENDENT_REORG
- #define TARGET_MACHINE_DEPENDENT_REORG avr_reorg
  #undef  TARGET_FUNCTION_ARG
  #define TARGET_FUNCTION_ARG avr_function_arg
  #undef  TARGET_FUNCTION_ARG_ADVANCE
--- 15093,15098 ----
*************** avr_float_lib_compare_returns_bool (mach
*** 14711,14716 ****
--- 15222,15233 ----
  #undef  TARGET_MD_ASM_ADJUST
  #define TARGET_MD_ASM_ADJUST avr_md_asm_adjust
  
+ #undef  TARGET_CAN_INLINE_P
+ #define TARGET_CAN_INLINE_P avr_can_inline_p
+ 
+ #undef  TARGET_CANONICALIZE_COMPARISON
+ #define TARGET_CANONICALIZE_COMPARISON avr_canonicalize_comparison
+ 
  struct gcc_target targetm = TARGET_INITIALIZER;
  
  
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr.h gcc-12.4.0/gcc/config/avr/avr.h
*** gcc-12.3.0/gcc/config/avr/avr.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr.h	Thu Jun 20 08:08:06 2024
*************** typedef struct avr_args
*** 500,508 ****
--- 500,510 ----
  
  extern const char *avr_devicespecs_file (int, const char**);
  extern const char *avr_double_lib (int, const char**);
+ extern const char *avr_no_devlib (int, const char**);
  
  #define EXTRA_SPEC_FUNCTIONS                            \
    { "double-lib", avr_double_lib },                     \
+   { "no-devlib", avr_no_devlib },                       \
    { "device-specs-file", avr_devicespecs_file },
  
  /* Driver self specs has lmited functionality w.r.t. '%s' for dynamic specs.
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr.md gcc-12.4.0/gcc/config/avr/avr.md
*** gcc-12.3.0/gcc/config/avr/avr.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr.md	Thu Jun 20 08:08:06 2024
***************
*** 77,83 ****
     UNSPEC_FMULS
     UNSPEC_FMULSU
     UNSPEC_COPYSIGN
-    UNSPEC_IDENTITY
     UNSPEC_INSERT_BITS
     UNSPEC_ROUND
     ])
--- 77,82 ----
***************
*** 165,170 ****
--- 164,170 ----
     ashlsi, ashrsi, lshrsi,
     ashlpsi, ashrpsi, lshrpsi,
     insert_bits, insv_notbit, insv_notbit_0, insv_notbit_7,
+    add_set_ZN, cmp_uext, cmp_sext,
     no"
    (const_string "no"))
  
***************
*** 251,261 ****
--- 251,273 ----
  (define_mode_iterator QIHI2 [QI HI])
  (define_mode_iterator QISI  [QI HI PSI SI])
  (define_mode_iterator QIDI  [QI HI PSI SI DI])
+ (define_mode_iterator QIPSI [QI HI PSI])
  (define_mode_iterator HISI  [HI PSI SI])
  
+ ;; Ordered integral and fixed-point modes of specific sizes.
  (define_mode_iterator ALL1 [QI QQ UQQ])
  (define_mode_iterator ALL2 [HI HQ UHQ HA UHA])
  (define_mode_iterator ALL4 [SI SQ USQ SA USA])
+ (define_mode_iterator ALL234 [HI SI PSI
+                               HQ UHQ HA UHA
+                               SQ USQ SA USA])
+ 
+ ;; Ordered signed integral and signed fixed-point modes of specific sizes.
+ (define_mode_iterator ALLs1 [QI QQ])
+ (define_mode_iterator ALLs2 [HI HQ HA])
+ (define_mode_iterator ALLs4 [SI SQ SA])
+ (define_mode_iterator ALLs234 [HI SI PSI
+                                HQ HA SQ SA])
  
  ;; All supported move-modes
  (define_mode_iterator MOVMODE [QI QQ UQQ
***************
*** 273,287 ****
                                 SQ USQ SA USA])
  
  ;; Define code iterators
! ;; Define two incarnations so that we can build the cross product.
  (define_code_iterator any_extend  [sign_extend zero_extend])
  (define_code_iterator any_extend2 [sign_extend zero_extend])
  (define_code_iterator any_extract [sign_extract zero_extract])
  (define_code_iterator any_shiftrt [lshiftrt ashiftrt])
  
  (define_code_iterator bitop [xor ior and])
  (define_code_iterator xior [xor ior])
  (define_code_iterator eqne [eq ne])
  
  (define_code_iterator ss_addsub [ss_plus ss_minus])
  (define_code_iterator us_addsub [us_plus us_minus])
--- 285,301 ----
                                 SQ USQ SA USA])
  
  ;; Define code iterators
! ;; Define two incarnations so that we can build the cartesian product.
  (define_code_iterator any_extend  [sign_extend zero_extend])
  (define_code_iterator any_extend2 [sign_extend zero_extend])
  (define_code_iterator any_extract [sign_extract zero_extract])
  (define_code_iterator any_shiftrt [lshiftrt ashiftrt])
  
+ (define_code_iterator piaop [plus ior and])
  (define_code_iterator bitop [xor ior and])
  (define_code_iterator xior [xor ior])
  (define_code_iterator eqne [eq ne])
+ (define_code_iterator gelt [ge lt])
  
  (define_code_iterator ss_addsub [ss_plus ss_minus])
  (define_code_iterator us_addsub [us_plus us_minus])
***************
*** 309,314 ****
--- 323,332 ----
    [(ss_minus "") (us_minus "")
     (ss_plus "%") (us_plus "%")])
  
+ (define_code_attr gelt_eqne
+   [(ge "eq")
+    (lt "ne")])
+ 
  ;; Map RTX code to its standard insn name
  (define_code_attr code_stdname
    [(ashift   "ashl")
***************
*** 1529,1537 ****
    "#"
    "&& reload_completed"
    [(parallel [(set (match_dup 0)
!                    (plus:HI
!                      (zero_extend:HI (match_dup 1))
!                      (zero_extend:HI (match_dup 2))))
                (clobber (reg:CC REG_CC))])])
  
  
--- 1547,1554 ----
    "#"
    "&& reload_completed"
    [(parallel [(set (match_dup 0)
!                    (plus:HI (zero_extend:HI (match_dup 1))
!                             (zero_extend:HI (match_dup 2))))
                (clobber (reg:CC REG_CC))])])
  
  
***************
*** 2152,2158 ****
  (define_expand "mulqi3_call"
    [(set (reg:QI 24) (match_operand:QI 1 "register_operand" ""))
     (set (reg:QI 22) (match_operand:QI 2 "register_operand" ""))
!    (parallel [(set (reg:QI 24) (mult:QI (reg:QI 24) (reg:QI 22)))
                (clobber (reg:QI 22))])
     (set (match_operand:QI 0 "register_operand" "") (reg:QI 24))]
    ""
--- 2169,2176 ----
  (define_expand "mulqi3_call"
    [(set (reg:QI 24) (match_operand:QI 1 "register_operand" ""))
     (set (reg:QI 22) (match_operand:QI 2 "register_operand" ""))
!    (parallel [(set (reg:QI 24)
!                    (mult:QI (reg:QI 24) (reg:QI 22)))
                (clobber (reg:QI 22))])
     (set (match_operand:QI 0 "register_operand" "") (reg:QI 24))]
    ""
***************
*** 2166,2177 ****
    "!AVR_HAVE_MUL"
    "#"
    "&& reload_completed"
!   [(parallel [(set (reg:QI 24) (mult:QI (reg:QI 24) (reg:QI 22)))
                (clobber (reg:QI 22))
                (clobber (reg:CC REG_CC))])])
  
  (define_insn "*mulqi3_call"
!   [(set (reg:QI 24) (mult:QI (reg:QI 24) (reg:QI 22)))
     (clobber (reg:QI 22))
     (clobber (reg:CC REG_CC))]
    "!AVR_HAVE_MUL && reload_completed"
--- 2184,2197 ----
    "!AVR_HAVE_MUL"
    "#"
    "&& reload_completed"
!   [(parallel [(set (reg:QI 24)
!                    (mult:QI (reg:QI 24) (reg:QI 22)))
                (clobber (reg:QI 22))
                (clobber (reg:CC REG_CC))])])
  
  (define_insn "*mulqi3_call"
!   [(set (reg:QI 24)
!         (mult:QI (reg:QI 24) (reg:QI 22)))
     (clobber (reg:QI 22))
     (clobber (reg:CC REG_CC))]
    "!AVR_HAVE_MUL && reload_completed"
***************
*** 2307,2313 ****
    [(set (match_operand:PSI 0 "register_operand"                         "=r")
          (plus:PSI (lshiftrt:PSI (match_operand:PSI 1 "register_operand"  "r")
                                  (const_int 23))
!                  (match_operand:PSI 2 "register_operand"                 "0")))
     (clobber (reg:CC REG_CC))]
    "reload_completed"
    "mov __tmp_reg__,%C1\;lsl __tmp_reg__
--- 2327,2333 ----
    [(set (match_operand:PSI 0 "register_operand"                         "=r")
          (plus:PSI (lshiftrt:PSI (match_operand:PSI 1 "register_operand"  "r")
                                  (const_int 23))
!                   (match_operand:PSI 2 "register_operand"                "0")))
     (clobber (reg:CC REG_CC))]
    "reload_completed"
    "mov __tmp_reg__,%C1\;lsl __tmp_reg__
***************
*** 2433,2439 ****
    [(set (match_operand:HI 0 "register_operand"                         "=r")
          (mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" "a"))
                   (zero_extend:HI (match_operand:QI 2 "register_operand" "a"))))
!     (clobber (reg:CC REG_CC))]
    "AVR_HAVE_MUL && reload_completed"
    "mulsu %1,%2
  	movw %0,r0
--- 2453,2459 ----
    [(set (match_operand:HI 0 "register_operand"                         "=r")
          (mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" "a"))
                   (zero_extend:HI (match_operand:QI 2 "register_operand" "a"))))
!    (clobber (reg:CC REG_CC))]
    "AVR_HAVE_MUL && reload_completed"
    "mulsu %1,%2
  	movw %0,r0
***************
*** 3088,3094 ****
    [(parallel [(set (match_dup 0)
                     (mult:HI (zero_extend:HI (match_dup 1))
                              (match_dup 2)))
!                (clobber (reg:CC REG_CC))])])
  
  (define_insn "*muluqihi3"
    [(set (match_operand:HI 0 "register_operand"                        "=&r")
--- 3108,3114 ----
    [(parallel [(set (match_dup 0)
                     (mult:HI (zero_extend:HI (match_dup 1))
                              (match_dup 2)))
!               (clobber (reg:CC REG_CC))])])
  
  (define_insn "*muluqihi3"
    [(set (match_operand:HI 0 "register_operand"                        "=&r")
***************
*** 3706,3722 ****
  ;;    CSE has problems to operate on hard regs.
  ;;
  (define_insn_and_split "divmodqi4"
!   [(set (match_operand:QI 0 "pseudo_register_operand" "")
!         (div:QI (match_operand:QI 1 "pseudo_register_operand" "")
!                 (match_operand:QI 2 "pseudo_register_operand" "")))
!    (set (match_operand:QI 3 "pseudo_register_operand" "")
          (mod:QI (match_dup 1) (match_dup 2)))
     (clobber (reg:QI 22))
     (clobber (reg:QI 23))
     (clobber (reg:QI 24))
     (clobber (reg:QI 25))]
    ""
!   "this divmodqi4 pattern should have been splitted;"
    ""
    [(set (reg:QI 24) (match_dup 1))
     (set (reg:QI 22) (match_dup 2))
--- 3726,3742 ----
  ;;    CSE has problems to operate on hard regs.
  ;;
  (define_insn_and_split "divmodqi4"
!   [(set (match_operand:QI 0 "pseudo_register_operand")
!         (div:QI (match_operand:QI 1 "pseudo_register_operand")
!                 (match_operand:QI 2 "pseudo_register_operand")))
!    (set (match_operand:QI 3 "pseudo_register_operand")
          (mod:QI (match_dup 1) (match_dup 2)))
     (clobber (reg:QI 22))
     (clobber (reg:QI 23))
     (clobber (reg:QI 24))
     (clobber (reg:QI 25))]
    ""
!   { gcc_unreachable(); }
    ""
    [(set (reg:QI 24) (match_dup 1))
     (set (reg:QI 22) (match_dup 2))
***************
*** 3752,3768 ****
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "udivmodqi4"
!  [(set (match_operand:QI 0 "pseudo_register_operand" "")
!        (udiv:QI (match_operand:QI 1 "pseudo_register_operand" "")
!                 (match_operand:QI 2 "pseudo_register_operand" "")))
!        (set (match_operand:QI 3 "pseudo_register_operand" "")
!             (umod:QI (match_dup 1) (match_dup 2)))
!        (clobber (reg:QI 22))
!        (clobber (reg:QI 23))
!        (clobber (reg:QI 24))
!        (clobber (reg:QI 25))]
    ""
!   "this udivmodqi4 pattern should have been splitted;"
    ""
    [(set (reg:QI 24) (match_dup 1))
     (set (reg:QI 22) (match_dup 2))
--- 3772,3788 ----
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "udivmodqi4"
!  [(set (match_operand:QI 0 "pseudo_register_operand")
!        (udiv:QI (match_operand:QI 1 "pseudo_register_operand")
!                 (match_operand:QI 2 "pseudo_register_operand")))
!   (set (match_operand:QI 3 "pseudo_register_operand")
!        (umod:QI (match_dup 1) (match_dup 2)))
!   (clobber (reg:QI 22))
!   (clobber (reg:QI 23))
!   (clobber (reg:QI 24))
!   (clobber (reg:QI 25))]
    ""
!   { gcc_unreachable(); }
    ""
    [(set (reg:QI 24) (match_dup 1))
     (set (reg:QI 22) (match_dup 2))
***************
*** 3794,3810 ****
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "divmodhi4"
!   [(set (match_operand:HI 0 "pseudo_register_operand" "")
!         (div:HI (match_operand:HI 1 "pseudo_register_operand" "")
!                 (match_operand:HI 2 "pseudo_register_operand" "")))
!    (set (match_operand:HI 3 "pseudo_register_operand" "")
          (mod:HI (match_dup 1) (match_dup 2)))
     (clobber (reg:QI 21))
     (clobber (reg:HI 22))
     (clobber (reg:HI 24))
     (clobber (reg:HI 26))]
    ""
!   "this should have been splitted;"
    ""
    [(set (reg:HI 24) (match_dup 1))
     (set (reg:HI 22) (match_dup 2))
--- 3814,3830 ----
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "divmodhi4"
!   [(set (match_operand:HI 0 "pseudo_register_operand")
!         (div:HI (match_operand:HI 1 "pseudo_register_operand")
!                 (match_operand:HI 2 "pseudo_register_operand")))
!    (set (match_operand:HI 3 "pseudo_register_operand")
          (mod:HI (match_dup 1) (match_dup 2)))
     (clobber (reg:QI 21))
     (clobber (reg:HI 22))
     (clobber (reg:HI 24))
     (clobber (reg:HI 26))]
    ""
!   { gcc_unreachable(); }
    ""
    [(set (reg:HI 24) (match_dup 1))
     (set (reg:HI 22) (match_dup 2))
***************
*** 3840,3856 ****
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "udivmodhi4"
!   [(set (match_operand:HI 0 "pseudo_register_operand" "")
!         (udiv:HI (match_operand:HI 1 "pseudo_register_operand" "")
!                  (match_operand:HI 2 "pseudo_register_operand" "")))
!    (set (match_operand:HI 3 "pseudo_register_operand" "")
          (umod:HI (match_dup 1) (match_dup 2)))
     (clobber (reg:QI 21))
     (clobber (reg:HI 22))
     (clobber (reg:HI 24))
     (clobber (reg:HI 26))]
    ""
!   "this udivmodhi4 pattern should have been splitted.;"
    ""
    [(set (reg:HI 24) (match_dup 1))
     (set (reg:HI 22) (match_dup 2))
--- 3860,3876 ----
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "udivmodhi4"
!   [(set (match_operand:HI 0 "pseudo_register_operand")
!         (udiv:HI (match_operand:HI 1 "pseudo_register_operand")
!                  (match_operand:HI 2 "pseudo_register_operand")))
!    (set (match_operand:HI 3 "pseudo_register_operand")
          (umod:HI (match_dup 1) (match_dup 2)))
     (clobber (reg:QI 21))
     (clobber (reg:HI 22))
     (clobber (reg:HI 24))
     (clobber (reg:HI 26))]
    ""
!   { gcc_unreachable(); }
    ""
    [(set (reg:HI 24) (match_dup 1))
     (set (reg:HI 22) (match_dup 2))
***************
*** 3925,3931 ****
    [(parallel [(set (match_dup 0)
                     (mult:PSI (zero_extend:PSI (match_dup 1))
                               (zero_extend:PSI (match_dup 2))))
!                (clobber (reg:CC REG_CC))])])
  
  (define_insn "*umulqihipsi3"
    [(set (match_operand:PSI 0 "register_operand"                         "=&r")
--- 3945,3951 ----
    [(parallel [(set (match_dup 0)
                     (mult:PSI (zero_extend:PSI (match_dup 1))
                               (zero_extend:PSI (match_dup 2))))
!               (clobber (reg:CC REG_CC))])])
  
  (define_insn "*umulqihipsi3"
    [(set (match_operand:PSI 0 "register_operand"                         "=&r")
***************
*** 4091,4104 ****
  ;; implementation works the other way round.
  
  (define_insn_and_split "divmodpsi4"
!   [(parallel [(set (match_operand:PSI 0 "pseudo_register_operand" "")
!                    (div:PSI (match_operand:PSI 1 "pseudo_register_operand" "")
!                             (match_operand:PSI 2 "pseudo_register_operand" "")))
!               (set (match_operand:PSI 3 "pseudo_register_operand" "")
!                    (mod:PSI (match_dup 1)
!                             (match_dup 2)))
!               (clobber (reg:DI 18))
!               (clobber (reg:QI 26))])]
    ""
    { gcc_unreachable(); }
    ""
--- 4111,4124 ----
  ;; implementation works the other way round.
  
  (define_insn_and_split "divmodpsi4"
!   [(set (match_operand:PSI 0 "pseudo_register_operand")
!         (div:PSI (match_operand:PSI 1 "pseudo_register_operand")
!                  (match_operand:PSI 2 "pseudo_register_operand")))
!    (set (match_operand:PSI 3 "pseudo_register_operand")
!         (mod:PSI (match_dup 1)
!                  (match_dup 2)))
!    (clobber (reg:DI 18))
!    (clobber (reg:QI 26))]
    ""
    { gcc_unreachable(); }
    ""
***************
*** 4140,4153 ****
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "udivmodpsi4"
!   [(parallel [(set (match_operand:PSI 0 "pseudo_register_operand" "")
!                    (udiv:PSI (match_operand:PSI 1 "pseudo_register_operand" "")
!                              (match_operand:PSI 2 "pseudo_register_operand" "")))
!               (set (match_operand:PSI 3 "pseudo_register_operand" "")
!                    (umod:PSI (match_dup 1)
!                              (match_dup 2)))
!               (clobber (reg:DI 18))
!               (clobber (reg:QI 26))])]
    ""
    { gcc_unreachable(); }
    ""
--- 4160,4173 ----
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "udivmodpsi4"
!   [(set (match_operand:PSI 0 "pseudo_register_operand")
!         (udiv:PSI (match_operand:PSI 1 "pseudo_register_operand")
!                   (match_operand:PSI 2 "pseudo_register_operand")))
!    (set (match_operand:PSI 3 "pseudo_register_operand")
!         (umod:PSI (match_dup 1)
!                   (match_dup 2)))
!    (clobber (reg:DI 18))
!    (clobber (reg:QI 26))]
    ""
    { gcc_unreachable(); }
    ""
***************
*** 4191,4207 ****
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  
  (define_insn_and_split "divmodsi4"
!   [(parallel [(set (match_operand:SI 0 "pseudo_register_operand" "")
!                    (div:SI (match_operand:SI 1 "pseudo_register_operand" "")
!                            (match_operand:SI 2 "pseudo_register_operand" "")))
!               (set (match_operand:SI 3 "pseudo_register_operand" "")
!                    (mod:SI (match_dup 1) (match_dup 2)))
!               (clobber (reg:SI 18))
!               (clobber (reg:SI 22))
!               (clobber (reg:HI 26))
!               (clobber (reg:HI 30))])]
    ""
!   "this divmodsi4 pattern should have been splitted;"
    ""
    [(set (reg:SI 22) (match_dup 1))
     (set (reg:SI 18) (match_dup 2))
--- 4211,4228 ----
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  
  (define_insn_and_split "divmodsi4"
!   [(set (match_operand:SI 0 "pseudo_register_operand")
!         (div:SI (match_operand:SI 1 "pseudo_register_operand")
!                 (match_operand:SI 2 "pseudo_register_operand")))
!    (set (match_operand:SI 3 "pseudo_register_operand")
!         (mod:SI (match_dup 1)
! 	        (match_dup 2)))
!    (clobber (reg:SI 18))
!    (clobber (reg:SI 22))
!    (clobber (reg:HI 26))
!    (clobber (reg:HI 30))]
    ""
!   { gcc_unreachable(); }
    ""
    [(set (reg:SI 22) (match_dup 1))
     (set (reg:SI 18) (match_dup 2))
***************
*** 4237,4253 ****
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "udivmodsi4"
!   [(parallel [(set (match_operand:SI 0 "pseudo_register_operand" "")
!                    (udiv:SI (match_operand:SI 1 "pseudo_register_operand" "")
!                            (match_operand:SI 2 "pseudo_register_operand" "")))
!               (set (match_operand:SI 3 "pseudo_register_operand" "")
!                    (umod:SI (match_dup 1) (match_dup 2)))
!               (clobber (reg:SI 18))
!               (clobber (reg:SI 22))
!               (clobber (reg:HI 26))
!               (clobber (reg:HI 30))])]
    ""
!   "this udivmodsi4 pattern should have been splitted;"
    ""
    [(set (reg:SI 22) (match_dup 1))
     (set (reg:SI 18) (match_dup 2))
--- 4258,4275 ----
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "udivmodsi4"
!   [(set (match_operand:SI 0 "pseudo_register_operand")
!         (udiv:SI (match_operand:SI 1 "pseudo_register_operand")
!                  (match_operand:SI 2 "pseudo_register_operand")))
!    (set (match_operand:SI 3 "pseudo_register_operand")
!         (umod:SI (match_dup 1)
!                  (match_dup 2)))
!    (clobber (reg:SI 18))
!    (clobber (reg:SI 22))
!    (clobber (reg:HI 26))
!    (clobber (reg:HI 30))]
    ""
!   { gcc_unreachable(); }
    ""
    [(set (reg:SI 22) (match_dup 1))
     (set (reg:SI 18) (match_dup 2))
***************
*** 4712,4718 ****
    [(parallel [(set (match_operand:HISI 0 "register_operand")
                     (bitop:HISI (match_dup 0)
                                 (match_operand:HISI 1 "register_operand")))
!               (clobber (scratch:QI))])]
    "optimize
     && reload_completed"
    [(const_int 1)]
--- 4734,4741 ----
    [(parallel [(set (match_operand:HISI 0 "register_operand")
                     (bitop:HISI (match_dup 0)
                                 (match_operand:HISI 1 "register_operand")))
!               (clobber (scratch:QI))
!               (clobber (reg:CC REG_CC))])]
    "optimize
     && reload_completed"
    [(const_int 1)]
***************
*** 4726,4731 ****
--- 4749,4791 ----
      DONE;
    })
  
+ ;; If  $0 = $0 <op> const  requires a QI scratch, and d-reg $1 dies after
+ ;; the first insn, then we can replace
+ ;;    $0 = $1
+ ;;    $0 = $0 <op> const
+ ;; by
+ ;;    $1 = $1 <op> const
+ ;;    $0 = $1
+ ;; This transorms constraint alternative "r,0,n,&d" of the first operation
+ ;; to alternative "d,0,n,X".
+ ;; "*addhi3_clobber"  "*addpsi3"  "*addsi3"
+ ;; "*addhq3"  "*adduhq3"  "*addha3"  "*adduha3"
+ ;; "*addsq3"  "*addusq3"  "*addsa3"  "*addusa3"
+ ;; "*iorhi3"  "*iorpsi3"  "*iorsi3"
+ ;; "*andhi3"  "*andpsi3"  "*andsi3"
+ (define_peephole2
+   [(parallel [(set (match_operand:ORDERED234 0 "register_operand")
+                    (match_operand:ORDERED234 1 "d_register_operand"))
+               (clobber (reg:CC REG_CC))])
+    (parallel [(set (match_dup 0)
+                    (piaop:ORDERED234 (match_dup 0)
+                                      (match_operand:ORDERED234 2 "const_operand")))
+               ; A d-reg as scratch tells that this insn is expensive, and
+               ; that $0 is not a d-register: l-reg or something like SI:14 etc.
+               (clobber (match_operand:QI 3 "d_register_operand"))
+               (clobber (reg:CC REG_CC))])]
+   "peep2_reg_dead_p (1, operands[1])"
+   [(parallel [(set (match_dup 1)
+                    (piaop:ORDERED234 (match_dup 1)
+                                      (match_dup 2)))
+               (clobber (scratch:QI))
+               (clobber (reg:CC REG_CC))])
+    ; Unfortunately, the following insn misses a REG_DEAD note for $1,
+    ; so this peep2 works only once.
+    (parallel [(set (match_dup 0)
+                    (match_dup 1))
+               (clobber (reg:CC REG_CC))])])
+ 
  
  ;; swap swap swap swap swap swap swap swap swap swap swap swap swap swap swap
  ;; swap
***************
*** 5684,5690 ****
  ;; "lshrha3"  "lshruha3"
  (define_insn_and_split "lshr<mode>3"
    [(set (match_operand:ALL2 0 "register_operand"                "=r,r,r,r,r,r,r")
!         (lshiftrt:ALL2 (match_operand:ALL2 1 "register_operand"    "0,0,0,r,0,0,0")
                         (match_operand:QI 2 "nop_general_operand" "r,L,P,O,K,n,Qm")))]
    ""
    "#"
--- 5744,5750 ----
  ;; "lshrha3"  "lshruha3"
  (define_insn_and_split "lshr<mode>3"
    [(set (match_operand:ALL2 0 "register_operand"                "=r,r,r,r,r,r,r")
!         (lshiftrt:ALL2 (match_operand:ALL2 1 "register_operand"  "0,0,0,r,0,0,0")
                         (match_operand:QI 2 "nop_general_operand" "r,L,P,O,K,n,Qm")))]
    ""
    "#"
***************
*** 5696,5702 ****
  
  (define_insn "*lshr<mode>3"
    [(set (match_operand:ALL2 0 "register_operand"                "=r,r,r,r,r,r,r")
!         (lshiftrt:ALL2 (match_operand:ALL2 1 "register_operand"    "0,0,0,r,0,0,0")
                         (match_operand:QI 2 "nop_general_operand" "r,L,P,O,K,n,Qm")))
     (clobber (reg:CC REG_CC))]
    "reload_completed"
--- 5756,5762 ----
  
  (define_insn "*lshr<mode>3"
    [(set (match_operand:ALL2 0 "register_operand"                "=r,r,r,r,r,r,r")
!         (lshiftrt:ALL2 (match_operand:ALL2 1 "register_operand"  "0,0,0,r,0,0,0")
                         (match_operand:QI 2 "nop_general_operand" "r,L,P,O,K,n,Qm")))
     (clobber (reg:CC REG_CC))]
    "reload_completed"
***************
*** 6449,6528 ****
  ;;<=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=>
  ;; compare
  
! ; Optimize negated tests into reverse compare if overflow is undefined.
! (define_insn "*negated_tstqi"
!   [(set (reg:CC REG_CC)
!         (compare:CC (neg:QI (match_operand:QI 0 "register_operand" "r"))
!                  (const_int 0)))]
!   "reload_completed && !flag_wrapv && !flag_trapv"
!   "cp __zero_reg__,%0"
!   [(set_attr "length" "1")])
! 
! (define_insn "*reversed_tstqi"
    [(set (reg:CC REG_CC)
!         (compare:CC (const_int 0)
!                  (match_operand:QI 0 "register_operand" "r")))]
    "reload_completed"
!   "cp __zero_reg__,%0"
! [(set_attr "length" "2")])
  
- (define_insn "*negated_tsthi"
-   [(set (reg:CC REG_CC)
-         (compare:CC (neg:HI (match_operand:HI 0 "register_operand" "r"))
-                  (const_int 0)))]
-   "reload_completed && !flag_wrapv && !flag_trapv"
-   "cp __zero_reg__,%A0
- 	cpc __zero_reg__,%B0"
- [(set_attr "length" "2")])
  
! ;; Leave here the clobber used by the cmphi pattern for simplicity, even
! ;; though it is unused, because this pattern is synthesized by avr_reorg.
! (define_insn "*reversed_tsthi"
    [(set (reg:CC REG_CC)
!         (compare:CC (const_int 0)
!                  (match_operand:HI 0 "register_operand" "r")))
!    (clobber (match_scratch:QI 1 "=X"))]
    "reload_completed"
!   "cp __zero_reg__,%A0
! 	cpc __zero_reg__,%B0"
! [(set_attr "length" "2")])
  
- (define_insn "*negated_tstpsi"
-   [(set (reg:CC REG_CC)
-         (compare:CC (neg:PSI (match_operand:PSI 0 "register_operand" "r"))
-                  (const_int 0)))]
-   "reload_completed && !flag_wrapv && !flag_trapv"
-   "cp __zero_reg__,%A0\;cpc __zero_reg__,%B0\;cpc __zero_reg__,%C0"
-   [(set_attr "length" "3")])
  
! (define_insn "*reversed_tstpsi"
    [(set (reg:CC REG_CC)
          (compare:CC (const_int 0)
!                  (match_operand:PSI 0 "register_operand" "r")))
!    (clobber (match_scratch:QI 1 "=X"))]
    "reload_completed"
    "cp __zero_reg__,%A0\;cpc __zero_reg__,%B0\;cpc __zero_reg__,%C0"
    [(set_attr "length" "3")])
  
- (define_insn "*negated_tstsi"
-   [(set (reg:CC REG_CC)
-         (compare:CC (neg:SI (match_operand:SI 0 "register_operand" "r"))
-                  (const_int 0)))]
-   "reload_completed && !flag_wrapv && !flag_trapv"
-   "cp __zero_reg__,%A0
- 	cpc __zero_reg__,%B0
- 	cpc __zero_reg__,%C0
- 	cpc __zero_reg__,%D0"
-   [(set_attr "length" "4")])
  
! ;; "*reversed_tstsi"
! ;; "*reversed_tstsq" "*reversed_tstusq"
! ;; "*reversed_tstsa" "*reversed_tstusa"
! (define_insn "*reversed_tst<mode>"
    [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:ALL4 0 "const0_operand"   "Y00")
!                  (match_operand:ALL4 1 "register_operand" "r")))
!    (clobber (match_scratch:QI 2 "=X"))]
    "reload_completed"
    "cp __zero_reg__,%A1
  	cpc __zero_reg__,%B1
--- 6509,6549 ----
  ;;<=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=>
  ;; compare
  
! ;; "*swapped_tstqi"  "*swapped_tstqq"
! (define_insn "*swapped_tst<mode>"
    [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:ALLs1 0 "const0_operand"   "Y00")
!                     (match_operand:ALLs1 1 "register_operand" "r")))]
    "reload_completed"
!   "cp __zero_reg__,%1"
! [(set_attr "length" "1")])
  
  
! ;; "*swapped_tsthi"  "*swapped_tsthq"  "*swapped_tstha"
! (define_insn "*swapped_tst<mode>"
    [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:ALLs2 0 "const0_operand"   "Y00")
!                     (match_operand:ALLs2 1 "register_operand" "r")))]
    "reload_completed"
!   "cp __zero_reg__,%A1
! 	cpc __zero_reg__,%B1"
!   [(set_attr "length" "2")])
  
  
! (define_insn "*swapped_tstpsi"
    [(set (reg:CC REG_CC)
          (compare:CC (const_int 0)
!                     (match_operand:PSI 0 "register_operand" "r")))]
    "reload_completed"
    "cp __zero_reg__,%A0\;cpc __zero_reg__,%B0\;cpc __zero_reg__,%C0"
    [(set_attr "length" "3")])
  
  
! ;; "*swapped_tstsi"  "*swapped_tstsq"  "*swapped_tstsa"
! (define_insn "*swapped_tst<mode>"
    [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:ALLs4 0 "const0_operand"   "Y00")
!                     (match_operand:ALLs4 1 "register_operand" "r")))]
    "reload_completed"
    "cp __zero_reg__,%A1
  	cpc __zero_reg__,%B1
***************
*** 6536,6573 ****
  (define_insn "cmp<mode>3"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:ALL1 0 "register_operand"  "r  ,r,d")
!                  (match_operand:ALL1 1 "nonmemory_operand" "Y00,r,i")))]
    "reload_completed"
    "@
! 	tst %0
  	cp %0,%1
  	cpi %0,lo8(%1)"
    [(set_attr "length" "1,1,1")])
  
- (define_insn "*cmpqi_sign_extend"
-   [(set (reg:CC REG_CC)
-         (compare:CC (sign_extend:HI (match_operand:QI 0 "register_operand" "d"))
-                  (match_operand:HI 1 "s8_operand"                       "n")))]
-   "reload_completed"
-   "cpi %0,lo8(%1)"
-   [(set_attr "length" "1")])
- 
  
! (define_insn "*cmphi.zero-extend.0"
    [(set (reg:CC REG_CC)
!         (compare:CC (zero_extend:HI (match_operand:QI 0 "register_operand" "r"))
!                  (match_operand:HI 1 "register_operand" "r")))]
!   "reload_completed"
!   "cp %0,%A1\;cpc __zero_reg__,%B1"
!   [(set_attr "length" "2")])
  
! (define_insn "*cmphi.zero-extend.1"
    [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:HI 0 "register_operand" "r")
!                  (zero_extend:HI (match_operand:QI 1 "register_operand" "r"))))]
!   "reload_completed"
!   "cp %A0,%1\;cpc %B0,__zero_reg__"
!   [(set_attr "length" "2")])
  
  ;; "cmphi3"
  ;; "cmphq3" "cmpuhq3"
--- 6557,6596 ----
  (define_insn "cmp<mode>3"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:ALL1 0 "register_operand"  "r  ,r,d")
!                     (match_operand:ALL1 1 "nonmemory_operand" "Y00,r,i")))]
    "reload_completed"
    "@
! 	cp %0, __zero_reg__
  	cp %0,%1
  	cpi %0,lo8(%1)"
    [(set_attr "length" "1,1,1")])
  
  
! ;; May be generated by "*cbranch<HISI:mode>.<code><QIPSI:mode>.0/1".
! (define_insn "*cmp<HISI:mode>.<code><QIPSI:mode>.0"
    [(set (reg:CC REG_CC)
!         (compare:CC (any_extend:HISI (match_operand:QIPSI 0 "register_operand" "r"))
!                     (match_operand:HISI 1 "register_operand" "r")))]
!   "reload_completed
!    && GET_MODE_SIZE (<HISI:MODE>mode) > GET_MODE_SIZE (<QIPSI:MODE>mode)"
!   {
!     return avr_out_cmp_ext (operands, <CODE>, nullptr);
!   }
!   [(set_attr "adjust_len" "cmp_<extend_su>ext")])
  
! ;; Swapped version of the above.
! ;; May be generated by "*cbranch<HISI:mode>.<code><QIPSI:mode>.0/1".
! (define_insn "*cmp<HISI:mode>.<code><QIPSI:mode>.1"
    [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:HISI 0 "register_operand" "r")
!                     (any_extend:HISI (match_operand:QIPSI 1 "register_operand" "r"))))]
!   "reload_completed
!    && GET_MODE_SIZE (<HISI:MODE>mode) > GET_MODE_SIZE (<QIPSI:MODE>mode)"
!   {
!     return avr_out_cmp_ext (operands, <CODE>, nullptr);
!   }
!   [(set_attr "adjust_len" "cmp_<extend_su>ext")])
! 
  
  ;; "cmphi3"
  ;; "cmphq3" "cmpuhq3"
***************
*** 6575,6582 ****
  (define_insn "cmp<mode>3"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:ALL2 0 "register_operand"  "!w  ,r  ,r,d ,r  ,d,r")
!                  (match_operand:ALL2 1 "nonmemory_operand"  "Y00,Y00,r,s ,s  ,M,n Ynn")))
!    (clobber (match_scratch:QI 2                            "=X  ,X  ,X,&d,&d ,X,&d"))]
    "reload_completed"
    {
      switch (which_alternative)
--- 6598,6605 ----
  (define_insn "cmp<mode>3"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:ALL2 0 "register_operand"  "!w  ,r  ,r,d ,r  ,d,r")
!                     (match_operand:ALL2 1 "nonmemory_operand"  "Y00,Y00,r,s ,s  ,M,n Ynn")))
!    (clobber (match_scratch:QI 2                               "=X  ,X  ,X,&d,&d ,X,&d"))]
    "reload_completed"
    {
      switch (which_alternative)
***************
*** 6603,6616 ****
  
      return avr_out_compare (insn, operands, NULL);
    }
!   [(set_attr "length" "1,2,2,3,4,2,4")
     (set_attr "adjust_len" "tsthi,tsthi,*,*,*,compare,compare")])
  
  (define_insn "*cmppsi"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:PSI 0 "register_operand"  "r,r,d ,r  ,d,r")
!                  (match_operand:PSI 1 "nonmemory_operand" "L,r,s ,s  ,M,n")))
!    (clobber (match_scratch:QI 2                          "=X,X,&d,&d ,X,&d"))]
    "reload_completed"
    {
      switch (which_alternative)
--- 6626,6639 ----
  
      return avr_out_compare (insn, operands, NULL);
    }
!   [(set_attr "length" "2,2,2,3,4,2,4")
     (set_attr "adjust_len" "tsthi,tsthi,*,*,*,compare,compare")])
  
  (define_insn "*cmppsi"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:PSI 0 "register_operand"  "r,r,d ,r  ,d,r")
!                     (match_operand:PSI 1 "nonmemory_operand" "L,r,s ,s  ,M,n")))
!    (clobber (match_scratch:QI 2                             "=X,X,&d,&d ,X,&d"))]
    "reload_completed"
    {
      switch (which_alternative)
***************
*** 6641,6648 ****
  (define_insn "*cmp<mode>"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:ALL4 0 "register_operand"  "r  ,r ,d,r ,r")
!                  (match_operand:ALL4 1 "nonmemory_operand" "Y00,r ,M,M ,n Ynn")))
!    (clobber (match_scratch:QI 2                           "=X  ,X ,X,&d,&d"))]
    "reload_completed"
    {
      if (0 == which_alternative)
--- 6664,6671 ----
  (define_insn "*cmp<mode>"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:ALL4 0 "register_operand"  "r  ,r ,d,r ,r")
!                     (match_operand:ALL4 1 "nonmemory_operand" "Y00,r ,M,M ,n Ynn")))
!    (clobber (match_scratch:QI 2                              "=X  ,X ,X,&d,&d"))]
    "reload_completed"
    {
      if (0 == which_alternative)
***************
*** 6656,6661 ****
--- 6679,6691 ----
     (set_attr "adjust_len" "tstsi,*,compare,compare,compare")])
  
  
+ ;; A helper for avr_pass_ifelse::avr_rest_of_handle_ifelse().
+ (define_expand "gen_compare<mode>"
+   [(parallel [(set (reg:CC REG_CC)
+                    (compare:CC (match_operand:HISI 0 "register_operand")
+                                (match_operand:HISI 1 "const_int_operand")))
+               (clobber (match_operand:QI 2 "scratch_operand"))])])
+ 
  ;; ----------------------------------------------------------------------
  ;; JUMP INSTRUCTIONS
  ;; ----------------------------------------------------------------------
***************
*** 6664,6716 ****
  (define_expand "cbranch<mode>4"
    [(set (pc)
          (if_then_else (match_operator 0 "ordered_comparison_operator"
!                         [(match_operand:ALL1 1 "register_operand" "")
!                          (match_operand:ALL1 2 "nonmemory_operand" "")])
!          (label_ref (match_operand 3 "" ""))
!          (pc)))])
  
  (define_expand "cbranch<mode>4"
    [(parallel
       [(set (pc)
!            (if_then_else
!              (match_operator 0 "ordered_comparison_operator"
!                [(match_operand:ORDERED234 1 "register_operand" "")
!                 (match_operand:ORDERED234 2 "nonmemory_operand" "")])
!              (label_ref (match_operand 3 "" ""))
!              (pc)))
!       (clobber (match_scratch:QI 4 ""))])])
  
! ;; "*cbranchqi4"
! ;; "*cbranchqq4"  "*cbranchuqq4"
! (define_insn_and_split "*cbranch<mode>4"
    [(set (pc)
          (if_then_else (match_operator 0 "ordered_comparison_operator"
!                         [(match_operand:ALL1 1 "register_operand" "r  ,r,d")
                           (match_operand:ALL1 2 "nonmemory_operand" "Y00,r,i")])
!          (label_ref (match_operand 3 "" ""))
!          (pc)))]
     ""
     "#"
     "reload_completed"
     [(set (reg:CC REG_CC)
!                     (compare:CC (match_dup 1) (match_dup 2)))
      (set (pc)
           (if_then_else (match_op_dup 0
                           [(reg:CC REG_CC) (const_int 0)])
                         (label_ref (match_dup 3))
!                        (pc)))]
!    "")
  
! ;; "*cbranchsi4"  "*cbranchsq4"  "*cbranchusq4"  "*cbranchsa4"  "*cbranchusa4"
! (define_insn_and_split "*cbranch<mode>4"
    [(set (pc)
!            (if_then_else
!              (match_operator 0 "ordered_comparison_operator"
!                [(match_operand:ALL4 1 "register_operand" "r  ,r ,d,r ,r")
!                 (match_operand:ALL4 2 "nonmemory_operand" "Y00,r ,M,M ,n Ynn")])
!              (label_ref (match_operand 3 "" ""))
!              (pc)))
!    (clobber (match_scratch:QI 4 "=X  ,X ,X,&d,&d"))]
     ""
     "#"
     "reload_completed"
--- 6694,6760 ----
  (define_expand "cbranch<mode>4"
    [(set (pc)
          (if_then_else (match_operator 0 "ordered_comparison_operator"
!                         [(match_operand:ALL1 1 "register_operand")
!                          (match_operand:ALL1 2 "nonmemory_operand")])
!                       (label_ref (match_operand 3))
!                       (pc)))]
!   ""
!   {
!     int icode = (int) GET_CODE (operands[0]);
! 
!     targetm.canonicalize_comparison (&icode, &operands[1], &operands[2], false);
!     PUT_CODE (operands[0], (enum rtx_code) icode);
!   })
  
  (define_expand "cbranch<mode>4"
    [(parallel
       [(set (pc)
!            (if_then_else (match_operator 0 "ordered_comparison_operator"
!                            [(match_operand:ALL234 1 "register_operand")
!                             (match_operand:ALL234 2 "nonmemory_operand")])
!                          (label_ref (match_operand 3))
!                          (pc)))
!       (clobber (match_scratch:QI 4))])]
!   ""
!   {
!     int icode = (int) GET_CODE (operands[0]);
  
!     targetm.canonicalize_comparison (&icode, &operands[1], &operands[2], false);
!     PUT_CODE (operands[0], (enum rtx_code) icode);
!   })
! 
! 
! ;; "cbranchqi4_insn"
! ;; "cbranchqq4_insn"  "cbranchuqq4_insn"
! (define_insn_and_split "cbranch<mode>4_insn"
    [(set (pc)
          (if_then_else (match_operator 0 "ordered_comparison_operator"
!                         [(match_operand:ALL1 1 "register_operand"  "r  ,r,d")
                           (match_operand:ALL1 2 "nonmemory_operand" "Y00,r,i")])
!                       (label_ref (match_operand 3))
!                       (pc)))]
     ""
     "#"
     "reload_completed"
     [(set (reg:CC REG_CC)
!          (compare:CC (match_dup 1) (match_dup 2)))
      (set (pc)
           (if_then_else (match_op_dup 0
                           [(reg:CC REG_CC) (const_int 0)])
                         (label_ref (match_dup 3))
!                        (pc)))])
  
! ;; "cbranchsi4_insn"
! ;; "cbranchsq4_insn"  "cbranchusq4_insn"  "cbranchsa4_insn"  "cbranchusa4_insn"
! (define_insn_and_split "cbranch<mode>4_insn"
    [(set (pc)
!         (if_then_else
!          (match_operator 0 "ordered_comparison_operator"
!            [(match_operand:ALL4 1 "register_operand"  "r  ,r,d,r ,r")
!             (match_operand:ALL4 2 "nonmemory_operand" "Y00,r,M,M ,n Ynn")])
!          (label_ref (match_operand 3))
!          (pc)))
!    (clobber (match_scratch:QI 4                      "=X  ,X,X,&d,&d"))]
     ""
     "#"
     "reload_completed"
***************
*** 6721,6739 ****
           (if_then_else (match_op_dup 0
                           [(reg:CC REG_CC) (const_int 0)])
                         (label_ref (match_dup 3))
!                        (pc)))]
!    "")
  
! ;; "*cbranchpsi4"
! (define_insn_and_split "*cbranchpsi4"
    [(set (pc)
!            (if_then_else
!              (match_operator 0 "ordered_comparison_operator"
!                [(match_operand:PSI 1 "register_operand" "r,r,d ,r  ,d,r")
!                 (match_operand:PSI 2 "nonmemory_operand" "L,r,s ,s  ,M,n")])
!              (label_ref (match_operand 3 "" ""))
!              (pc)))
!    (clobber (match_scratch:QI 4 "=X,X,&d,&d ,X,&d"))]
     ""
     "#"
     "reload_completed"
--- 6765,6782 ----
           (if_then_else (match_op_dup 0
                           [(reg:CC REG_CC) (const_int 0)])
                         (label_ref (match_dup 3))
!                        (pc)))])
  
! ;; "cbranchpsi4_insn"
! (define_insn_and_split "cbranchpsi4_insn"
    [(set (pc)
!         (if_then_else
!          (match_operator 0 "ordered_comparison_operator"
!            [(match_operand:PSI 1 "register_operand"  "r,r,d ,r ,d,r")
!             (match_operand:PSI 2 "nonmemory_operand" "L,r,s ,s ,M,n")])
!          (label_ref (match_operand 3))
!          (pc)))
!    (clobber (match_scratch:QI 4                     "=X,X,&d,&d,X,&d"))]
     ""
     "#"
     "reload_completed"
***************
*** 6744,6762 ****
           (if_then_else (match_op_dup 0
                           [(reg:CC REG_CC) (const_int 0)])
                         (label_ref (match_dup 3))
!                        (pc)))]
!    "")
  
! ;; "*cbranchhi4"  "*cbranchhq4"  "*cbranchuhq4"  "*cbranchha4"  "*cbranchuha4"
! (define_insn_and_split "*cbranch<mode>4"
    [(set (pc)
!            (if_then_else
!              (match_operator 0 "ordered_comparison_operator"
!                [(match_operand:ALL2 1 "register_operand" "!w  ,r  ,r,d ,r  ,d,r")
!                 (match_operand:ALL2 2 "nonmemory_operand" "Y00,Y00,r,s ,s  ,M,n Ynn")])
!              (label_ref (match_operand 3 "" ""))
!              (pc)))
!    (clobber (match_scratch:QI 4 "=X  ,X  ,X,&d,&d ,X,&d"))]
     ""
     "#"
     "reload_completed"
--- 6787,6805 ----
           (if_then_else (match_op_dup 0
                           [(reg:CC REG_CC) (const_int 0)])
                         (label_ref (match_dup 3))
!                        (pc)))])
  
! ;; "cbranchhi4_insn"
! ;; "cbranchhq4_insn"  "cbranchuhq4_insn"  "cbranchha4_insn"  "cbranchuha4_insn"
! (define_insn_and_split "cbranch<mode>4_insn"
    [(set (pc)
!         (if_then_else
!          (match_operator 0 "ordered_comparison_operator"
!            [(match_operand:ALL2 1 "register_operand" "!w  ,r  ,r,d ,r ,d,r")
!             (match_operand:ALL2 2 "nonmemory_operand" "Y00,Y00,r,s ,s ,M,n Ynn")])
!          (label_ref (match_operand 3))
!          (pc)))
!    (clobber (match_scratch:QI 4                      "=X  ,X  ,X,&d,&d,X,&d"))]
     ""
     "#"
     "reload_completed"
***************
*** 6767,6774 ****
           (if_then_else (match_op_dup 0
                           [(reg:CC REG_CC) (const_int 0)])
                         (label_ref (match_dup 3))
!                        (pc)))]
!    "")
  
  ;; Test a single bit in a QI/HI/SImode register.
  ;; Combine will create zero extract patterns for single bit tests.
--- 6810,6880 ----
           (if_then_else (match_op_dup 0
                           [(reg:CC REG_CC) (const_int 0)])
                         (label_ref (match_dup 3))
!                        (pc)))])
! 
! ;; Combiner pattern to compare sign- or zero-extended register against
! ;; a wider register, like comparing uint8_t against uint16_t.
! (define_insn_and_split "*cbranch<HISI:mode>.<code><QIPSI:mode>.0"
!   [(set (pc)
!         (if_then_else (match_operator 0 "ordered_comparison_operator"
!                         [(any_extend:HISI (match_operand:QIPSI 1 "register_operand" "r"))
!                          (match_operand:HISI 2 "register_operand" "r")])
!                       (label_ref (match_operand 3))
!                       (pc)))]
!   "optimize
!    && GET_MODE_SIZE (<HISI:MODE>mode) > GET_MODE_SIZE (<QIPSI:MODE>mode)"
!   "#"
!   "&& reload_completed"
!   [; "*cmp<HISI:mode>.<code><QIPSI:mode>.0"
!    (set (reg:CC REG_CC)
!         (compare:CC (match_dup 1)
!                     (match_dup 2)))
!    ; "branch"
!    (set (pc)
!         (if_then_else (match_op_dup 0 [(reg:CC REG_CC)
!                                        (const_int 0)])
!                       (label_ref (match_dup 3))
!                       (pc)))]
!   {
!     operands[1] = gen_rtx_<CODE> (<HISI:MODE>mode, operands[1]);
!     if (difficult_comparison_operator (operands[0], VOIDmode))
!       {
!         PUT_CODE (operands[0], swap_condition (GET_CODE (operands[0])));
!         std::swap (operands[1], operands[2]);
!       }
!   })
! 
! ;; Same combiner pattern, but with swapped operands.
! (define_insn_and_split "*cbranch<HISI:mode>.<code><QIPSI:mode>.0"
!   [(set (pc)
!         (if_then_else (match_operator 0 "ordered_comparison_operator"
!                         [(match_operand:HISI 1 "register_operand" "r")
!                          (any_extend:HISI (match_operand:QIPSI 2 "register_operand" "r"))])
!                       (label_ref (match_operand 3))
!                       (pc)))]
!   "optimize
!    && GET_MODE_SIZE (<HISI:MODE>mode) > GET_MODE_SIZE (<QIPSI:MODE>mode)"
!   "#"
!   "&& reload_completed"
!   [; "*cmp<HISI:mode>.<code><QIPSI:mode>.0"
!    (set (reg:CC REG_CC)
!         (compare:CC (match_dup 1)
!                     (match_dup 2)))
!    ; "branch"
!    (set (pc)
!         (if_then_else (match_op_dup 0 [(reg:CC REG_CC)
!                                        (const_int 0)])
!                       (label_ref (match_dup 3))
!                       (pc)))]
!   {
!     operands[2] = gen_rtx_<CODE> (<HISI:MODE>mode, operands[2]);
!     if (difficult_comparison_operator (operands[0], VOIDmode))
!       {
!         PUT_CODE (operands[0], swap_condition (GET_CODE (operands[0])));
!         std::swap (operands[1], operands[2]);
!       }
!   })
! 
  
  ;; Test a single bit in a QI/HI/SImode register.
  ;; Combine will create zero extract patterns for single bit tests.
***************
*** 6842,6855 ****
    "#"
    "&& reload_completed"
    [(parallel [(set (pc)
!                    (if_then_else
!                    (match_op_dup 0
!                                  [(and:QISI
!                                    (match_dup 1)
!                                    (match_dup 2))
!                                   (const_int 0)])
!                    (label_ref (match_dup 3))
!                    (pc)))
                (clobber (reg:CC REG_CC))])])
  
  (define_insn "*sbrx_and_branch<mode>"
--- 6948,6958 ----
    "#"
    "&& reload_completed"
    [(parallel [(set (pc)
!                    (if_then_else (match_op_dup 0 [(and:QISI (match_dup 1)
!                                                             (match_dup 2))
!                                                   (const_int 0)])
!                                  (label_ref (match_dup 3))
!                                  (pc)))
                (clobber (reg:CC REG_CC))])])
  
  (define_insn "*sbrx_and_branch<mode>"
***************
*** 6878,7040 ****
                                      (const_int 2)
                                      (const_int 4))))])
  
- ;; Convert sign tests to bit 7/15/31 tests that match the above insns.
- (define_peephole2
-   [(set (reg:CC REG_CC) (compare:CC (match_operand:QI 0 "register_operand" "")
-                        (const_int 0)))
-    (parallel [(set (pc) (if_then_else (ge (reg:CC REG_CC) (const_int 0))
-                                       (label_ref (match_operand 1 "" ""))
-                                       (pc)))
-               (clobber (reg:CC REG_CC))])]
-   ""
-   [(parallel [(set (pc) (if_then_else (eq (zero_extract:HI (match_dup 0)
-                                                            (const_int 1)
-                                                            (const_int 7))
-                                           (const_int 0))
-                                       (label_ref (match_dup 1))
-                                       (pc)))
-               (clobber (reg:CC REG_CC))])])
- 
- (define_peephole2
-   [(set (reg:CC REG_CC) (compare:CC (match_operand:QI 0 "register_operand" "")
-                        (const_int 0)))
-    (parallel [(set (pc) (if_then_else (lt (reg:CC REG_CC) (const_int 0))
-                                       (label_ref (match_operand 1 "" ""))
-                                       (pc)))
-               (clobber (reg:CC REG_CC))])]
-   ""
-   [(parallel [(set (pc) (if_then_else (ne (zero_extract:HI (match_dup 0)
-                                                            (const_int 1)
-                                                            (const_int 7))
-                                           (const_int 0))
-                                       (label_ref (match_dup 1))
-                                       (pc)))
-               (clobber (reg:CC REG_CC))])])
- 
- (define_peephole2
-   [(parallel [(set (reg:CC REG_CC) (compare:CC (match_operand:HI 0 "register_operand" "")
-                                   (const_int 0)))
-               (clobber (match_operand:HI 2 ""))])
-    (parallel [(set (pc) (if_then_else (ge (reg:CC REG_CC) (const_int 0))
-                                       (label_ref (match_operand 1 "" ""))
-                                       (pc)))
-               (clobber (reg:CC REG_CC))])]
-   ""
-   [(parallel [(set (pc) (if_then_else (eq (and:HI (match_dup 0) (const_int -32768))
-                                           (const_int 0))
-                                       (label_ref (match_dup 1))
-                                       (pc)))
-               (clobber (reg:CC REG_CC))])])
  
! (define_peephole2
!   [(parallel [(set (reg:CC REG_CC) (compare:CC (match_operand:HI 0 "register_operand" "")
!                                   (const_int 0)))
!               (clobber (match_operand:HI 2 ""))])
!    (parallel [(set (pc) (if_then_else (lt (reg:CC REG_CC) (const_int 0))
!                                       (label_ref (match_operand 1 "" ""))
!                                       (pc)))
                (clobber (reg:CC REG_CC))])]
!   ""
!   [(parallel [(set (pc) (if_then_else (ne (and:HI (match_dup 0) (const_int -32768))
!                                           (const_int 0))
!                                       (label_ref (match_dup 1))
!                                       (pc)))
!               (clobber (reg:CC REG_CC))])])
  
! (define_peephole2
!   [(parallel [(set (reg:CC REG_CC) (compare:CC (match_operand:SI 0 "register_operand" "")
!                                   (const_int 0)))
!               (clobber (match_operand:SI 2 ""))])
!    (parallel [(set (pc) (if_then_else (ge (reg:CC REG_CC) (const_int 0))
!                                       (label_ref (match_operand 1 "" ""))
!                                       (pc)))
!               (clobber (reg:CC REG_CC))])]
!   ""
!   [(parallel [(set (pc) (if_then_else (eq (and:SI (match_dup 0) (match_dup 2))
!                                           (const_int 0))
!                                       (label_ref (match_dup 1))
!                                       (pc)))
                (clobber (reg:CC REG_CC))])]
!   "operands[2] = gen_int_mode (-2147483647 - 1, SImode);")
  
- (define_peephole2
-   [(parallel [(set (reg:CC REG_CC) (compare:CC (match_operand:SI 0 "register_operand" "")
-                                   (const_int 0)))
-               (clobber (match_operand:SI 2 ""))])
-    (parallel [(set (pc) (if_then_else (lt (reg:CC REG_CC) (const_int 0))
-                                       (label_ref (match_operand 1 "" ""))
-                                       (pc)))
-               (clobber (reg:CC REG_CC))])]
-   ""
-   [(parallel [(set (pc) (if_then_else (ne (and:SI (match_dup 0) (match_dup 2))
-                                           (const_int 0))
-                                       (label_ref (match_dup 1))
-                                       (pc)))
-               (clobber (reg:CC REG_CC))])]
-   "operands[2] = gen_int_mode (-2147483647 - 1, SImode);")
  
  ;; ************************************************************************
  ;; Implementation of conditional jumps here.
  ;;  Compare with 0 (test) jumps
  ;; ************************************************************************
  
! (define_insn_and_split "branch"
    [(set (pc)
          (if_then_else (match_operator 1 "simple_comparison_operator"
!                                       [(reg:CC REG_CC)
!                                        (const_int 0)])
!                       (label_ref (match_operand 0 "" ""))
                        (pc)))]
    "reload_completed"
-   "#"
-   "&& reload_completed"
-   [(parallel [(set (pc)
-                    (if_then_else (match_op_dup 1
-                                                [(reg:CC REG_CC)
-                                                 (const_int 0)])
-                                  (label_ref (match_dup 0))
-                                  (pc)))
-               (clobber (reg:CC REG_CC))])])
- 
- (define_insn "*branch"
-   [(set (pc)
-         (if_then_else (match_operator 1 "simple_comparison_operator"
-                                       [(reg:CC REG_CC)
-                                        (const_int 0)])
-                       (label_ref (match_operand 0 "" ""))
-                       (pc)))
-    (clobber (reg:CC REG_CC))]
-   "reload_completed"
-   {
-     return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 0);
-   }
-   [(set_attr "type" "branch")])
- 
- 
- ;; Same as above but wrap SET_SRC so that this branch won't be transformed
- ;; or optimized in the remainder.
- 
- (define_insn "branch_unspec"
-   [(set (pc)
-         (unspec [(if_then_else (match_operator 1 "simple_comparison_operator"
-                                                [(reg:CC REG_CC)
-                                                 (const_int 0)])
-                                (label_ref (match_operand 0 "" ""))
-                                (pc))
-                  ] UNSPEC_IDENTITY))
-    (clobber (reg:CC REG_CC))]
-   "reload_completed"
    {
      return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 0);
    }
    [(set_attr "type" "branch")])
  
- ;; ****************************************************************
- ;; AVR does not have following conditional jumps: LE,LEU,GT,GTU.
- ;; Convert them all to proper jumps.
- ;; ****************************************************************/
  
! (define_insn_and_split "difficult_branch"
    [(set (pc)
          (if_then_else (match_operator 1 "difficult_comparison_operator"
                          [(reg:CC REG_CC)
--- 6981,7057 ----
                                      (const_int 2)
                                      (const_int 4))))])
  
  
! ;; Convert sign tests to bit 7 tests that match the above insns.
! (define_peephole2 ; "*sbrx_branch<mode>"
!   [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:ALLs1 0 "register_operand")
!                     (match_operand:ALLs1 1 "const0_operand")))
!    (set (pc)
!         (if_then_else (gelt (reg:CC REG_CC)
!                             (const_int 0))
!                       (label_ref (match_operand 2))
!                       (pc)))]
!   "peep2_regno_dead_p (2, REG_CC)"
!   [(parallel [(set (pc)
!                    (if_then_else (<gelt_eqne> (zero_extract:HI (match_dup 0)
!                                                                (const_int 1)
!                                                                (match_dup 1))
!                                               (const_int 0))
!                                  (label_ref (match_dup 2))
!                                  (pc)))
                (clobber (reg:CC REG_CC))])]
!   {
!     operands[0] = avr_to_int_mode (operands[0]);
!     operands[1] = GEN_INT (GET_MODE_BITSIZE (<MODE>mode) - 1);
!   })
  
! ;; Convert sign tests to bit 15/23/31 tests that match the above insns.
! (define_peephole2 ; "*sbrx_branch<mode>"
!   [(parallel [(set (reg:CC REG_CC)
!                    (compare:CC (match_operand:ALLs234 0 "register_operand")
!                                (match_operand:ALLs234 1 "const0_operand")))
!               (clobber (match_operand:QI 3 "scratch_operand"))])
!    (set (pc)
!         (if_then_else (gelt (reg:CC REG_CC)
!                             (const_int 0))
!                       (label_ref (match_operand 2))
!                       (pc)))]
!   "peep2_regno_dead_p (2, REG_CC)"
!   [(parallel [(set (pc)
!                    (if_then_else (<gelt_eqne> (zero_extract:HI (match_dup 0)
!                                                                (const_int 1)
!                                                                (match_dup 1))
!                                               (const_int 0))
!                                  (label_ref (match_dup 2))
!                                  (pc)))
                (clobber (reg:CC REG_CC))])]
!   {
!     operands[0] = avr_to_int_mode (operands[0]);
!     operands[1] = GEN_INT (GET_MODE_BITSIZE (<MODE>mode) - 1);
!   })
  
  
  ;; ************************************************************************
  ;; Implementation of conditional jumps here.
  ;;  Compare with 0 (test) jumps
  ;; ************************************************************************
  
! (define_insn "branch"
    [(set (pc)
          (if_then_else (match_operator 1 "simple_comparison_operator"
!                         [(reg:CC REG_CC)
!                          (const_int 0)])
!                       (label_ref (match_operand 0))
                        (pc)))]
    "reload_completed"
    {
      return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 0);
    }
    [(set_attr "type" "branch")])
  
  
! (define_insn "difficult_branch"
    [(set (pc)
          (if_then_else (match_operator 1 "difficult_comparison_operator"
                          [(reg:CC REG_CC)
***************
*** 7042,7136 ****
                        (label_ref (match_operand 0 "" ""))
                        (pc)))]
    "reload_completed"
-   "#"
-   "&& reload_completed"
-   [(parallel [(set (pc)
-                    (if_then_else (match_op_dup 1
-                                    [(reg:CC REG_CC)
-                                     (const_int 0)])
-                                  (label_ref (match_dup 0))
-                                  (pc)))
-               (clobber (reg:CC REG_CC))])])
- 
- (define_insn "*difficult_branch"
-   [(set (pc)
-         (if_then_else (match_operator 1 "difficult_comparison_operator"
-                         [(reg:CC REG_CC)
-                          (const_int 0)])
-                       (label_ref (match_operand 0 "" ""))
-                       (pc)))
-    (clobber (reg:CC REG_CC))]
-   "reload_completed"
    {
      return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 0);
    }
    [(set_attr "type" "branch1")])
  
- ;; revers branch
- 
- (define_insn_and_split "rvbranch"
-   [(set (pc)
-         (if_then_else (match_operator 1 "simple_comparison_operator"
-                                       [(reg:CC REG_CC)
-                                        (const_int 0)])
-                       (pc)
-                       (label_ref (match_operand 0 "" ""))))]
-   "reload_completed"
-   "#"
-   "&& reload_completed"
-   [(parallel [(set (pc)
-                    (if_then_else (match_op_dup 1
-                                                [(reg:CC REG_CC)
-                                                 (const_int 0)])
-                                  (pc)
-                                  (label_ref (match_dup 0))))
-               (clobber (reg:CC REG_CC))])])
- 
- (define_insn "*rvbranch"
-   [(set (pc)
-         (if_then_else (match_operator 1 "simple_comparison_operator"
-                                       [(reg:CC REG_CC)
-                                        (const_int 0)])
-                       (pc)
-                       (label_ref (match_operand 0 "" ""))))
-    (clobber (reg:CC REG_CC))]
-   "reload_completed"
-   {
-     return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 1);
-   }
-   [(set_attr "type" "branch1")])
- 
- (define_insn_and_split "difficult_rvbranch"
-   [(set (pc)
-         (if_then_else (match_operator 1 "difficult_comparison_operator"
-                                       [(reg:CC REG_CC)
-                                        (const_int 0)])
-                       (pc)
-                       (label_ref (match_operand 0 "" ""))))]
-   "reload_completed"
-   "#"
-   "&& reload_completed"
-   [(parallel [(set (pc)
-                    (if_then_else (match_op_dup 1
-                                                [(reg:CC REG_CC)
-                                                 (const_int 0)])
-                                  (pc)
-                                  (label_ref (match_dup 0))))
-               (clobber (reg:CC REG_CC))])])
- 
- (define_insn "*difficult_rvbranch"
-   [(set (pc)
-         (if_then_else (match_operator 1 "difficult_comparison_operator"
-                                       [(reg:CC REG_CC)
-                                        (const_int 0)])
-                       (pc)
-                       (label_ref (match_operand 0 "" ""))))
-    (clobber (reg:CC REG_CC))]
-   "reload_completed"
-   {
-     return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 1);
-   }
-   [(set_attr "type" "branch")])
  
  ;; **************************************************************************
  ;; Unconditional and other jump instructions.
--- 7059,7069 ----
***************
*** 7656,7670 ****
                (clobber (reg:CC REG_CC))])
     (parallel [(set (reg:CC REG_CC)
                     (compare:CC (match_dup 0)
!                             (const_int -1)))
!               (clobber (match_operand:QI 1 "d_register_operand" ""))])
!    (parallel [(set (pc)
!                    (if_then_else (eqne (reg:CC REG_CC)
!                                        (const_int 0))
!                                  (label_ref (match_operand 2 "" ""))
!                                  (pc)))
!               (clobber (reg:CC REG_CC))])]
!   ""
    {
      const char *op;
      int jump_mode;
--- 7589,7602 ----
                (clobber (reg:CC REG_CC))])
     (parallel [(set (reg:CC REG_CC)
                     (compare:CC (match_dup 0)
!                                (const_int -1)))
!               (clobber (match_operand:QI 1 "scratch_or_d_register_operand"))])
!    (set (pc)
!         (if_then_else (eqne (reg:CC REG_CC)
!                             (const_int 0))
!                       (label_ref (match_operand 2))
!                       (pc)))]
!   "dead_or_set_regno_p (insn, REG_CC)"
    {
      const char *op;
      int jump_mode;
***************
*** 7700,7714 ****
                (clobber (reg:CC REG_CC))])
     (parallel [(set (reg:CC REG_CC)
                     (compare:CC (match_dup 0)
!                             (const_int -1)))
                (clobber (match_operand:QI 1 "d_register_operand" ""))])
!    (parallel [(set (pc)
!                    (if_then_else (eqne (reg:CC REG_CC)
!                                        (const_int 0))
!                                  (label_ref (match_operand 2 "" ""))
!                                  (pc)))
!               (clobber (reg:CC REG_CC))])]
!   ""
    {
      const char *op;
      int jump_mode;
--- 7632,7645 ----
                (clobber (reg:CC REG_CC))])
     (parallel [(set (reg:CC REG_CC)
                     (compare:CC (match_dup 0)
!                                (const_int -1)))
                (clobber (match_operand:QI 1 "d_register_operand" ""))])
!    (set (pc)
!         (if_then_else (eqne (reg:CC REG_CC)
!                             (const_int 0))
!                       (label_ref (match_operand 2))
!                       (pc)))]
!   "dead_or_set_regno_p (insn, REG_CC)"
    {
      const char *op;
      int jump_mode;
***************
*** 7742,7756 ****
                (clobber (reg:CC REG_CC))])
     (parallel [(set (reg:CC REG_CC)
                     (compare:CC (match_dup 0)
!                             (const_int -1)))
!               (clobber (match_operand:QI 1 "d_register_operand" ""))])
!    (parallel [(set (pc)
!                    (if_then_else (eqne (reg:CC REG_CC)
!                                        (const_int 0))
!                                  (label_ref (match_operand 2 "" ""))
!                                  (pc)))
!               (clobber (reg:CC REG_CC))])]
!   ""
    {
      const char *op;
      int jump_mode;
--- 7673,7686 ----
                (clobber (reg:CC REG_CC))])
     (parallel [(set (reg:CC REG_CC)
                     (compare:CC (match_dup 0)
!                                (const_int -1)))
!               (clobber (match_operand:QI 1 "scratch_or_d_register_operand"))])
!    (set (pc)
!         (if_then_else (eqne (reg:CC REG_CC)
!                             (const_int 0))
!                       (label_ref (match_operand 2))
!                       (pc)))]
!   "dead_or_set_regno_p (insn, REG_CC)"
    {
      const char *op;
      int jump_mode;
***************
*** 7784,7798 ****
                (clobber (reg:CC REG_CC))])
     (parallel [(set (reg:CC REG_CC)
                     (compare:CC (match_dup 0)
!                             (const_int -1)))
                (clobber (match_operand:QI 1 "d_register_operand" ""))])
!    (parallel [(set (pc)
!                    (if_then_else (eqne (reg:CC REG_CC)
!                                        (const_int 0))
!                                  (label_ref (match_operand 2 "" ""))
!                                  (pc)))
!               (clobber (reg:CC REG_CC))])]
!   ""
    {
      const char *op;
      int jump_mode;
--- 7714,7727 ----
                (clobber (reg:CC REG_CC))])
     (parallel [(set (reg:CC REG_CC)
                     (compare:CC (match_dup 0)
!                                (const_int -1)))
                (clobber (match_operand:QI 1 "d_register_operand" ""))])
!    (set (pc)
!         (if_then_else (eqne (reg:CC REG_CC)
!                             (const_int 0))
!                       (label_ref (match_operand 2))
!                       (pc)))]
!   "dead_or_set_regno_p (insn, REG_CC)"
    {
      const char *op;
      int jump_mode;
***************
*** 7822,7835 ****
                (clobber (reg:CC REG_CC))])
     (set (reg:CC REG_CC)
          (compare:CC (match_dup 0)
!                  (const_int -1)))
!    (parallel [(set (pc)
!                    (if_then_else (eqne (reg:CC REG_CC)
!                                        (const_int 0))
!                                  (label_ref (match_operand 1 "" ""))
!                                  (pc)))
!               (clobber (reg:CC REG_CC))])]
!   ""
    {
      const char *op;
      int jump_mode;
--- 7751,7763 ----
                (clobber (reg:CC REG_CC))])
     (set (reg:CC REG_CC)
          (compare:CC (match_dup 0)
!                     (const_int -1)))
!    (set (pc)
!         (if_then_else (eqne (reg:CC REG_CC)
!                             (const_int 0))
!                       (label_ref (match_operand 1))
!                       (pc)))]
!   "dead_or_set_regno_p (insn, REG_CC)"
    {
      const char *op;
      int jump_mode;
***************
*** 7855,7868 ****
  (define_peephole ; "*cpse.eq"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:ALL1 1 "register_operand" "r,r")
!                  (match_operand:ALL1 2 "reg_or_0_operand" "r,Y00")))
!    (parallel [(set (pc)
!                    (if_then_else (eq (reg:CC REG_CC)
!                                      (const_int 0))
!                                  (label_ref (match_operand 0 "" ""))
!                                  (pc)))
!               (clobber (reg:CC REG_CC))])]
!   "jump_over_one_insn_p (insn, operands[0])"
    "@
  	cpse %1,%2
  	cpse %1,__zero_reg__")
--- 7783,7796 ----
  (define_peephole ; "*cpse.eq"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:ALL1 1 "register_operand" "r,r")
!                     (match_operand:ALL1 2 "reg_or_0_operand" "r,Y00")))
!    (set (pc)
!         (if_then_else (eq (reg:CC REG_CC)
!                           (const_int 0))
!                       (label_ref (match_operand 0))
!                       (pc)))]
!   "jump_over_one_insn_p (insn, operands[0])
!    && dead_or_set_regno_p (insn, REG_CC)"
    "@
  	cpse %1,%2
  	cpse %1,__zero_reg__")
***************
*** 7890,7905 ****
  
  (define_peephole ; "*cpse.ne"
    [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:ALL1 1 "register_operand" "")
!                  (match_operand:ALL1 2 "reg_or_0_operand" "")))
!    (parallel [(set (pc)
!                    (if_then_else (ne (reg:CC REG_CC)
!                                      (const_int 0))
!                                  (label_ref (match_operand 0 "" ""))
!                                  (pc)))
!               (clobber (reg:CC REG_CC))])]
!   "!AVR_HAVE_JMP_CALL
!    || !TARGET_SKIP_BUG"
    {
      if (operands[2] == CONST0_RTX (<MODE>mode))
        operands[2] = zero_reg_rtx;
--- 7818,7833 ----
  
  (define_peephole ; "*cpse.ne"
    [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:ALL1 1 "register_operand")
!                     (match_operand:ALL1 2 "reg_or_0_operand")))
!    (set (pc)
!         (if_then_else (ne (reg:CC REG_CC)
!                           (const_int 0))
!                       (label_ref (match_operand 0))
!                       (pc)))]
!   "(!AVR_HAVE_JMP_CALL
!     || !TARGET_SKIP_BUG)
!    && dead_or_set_regno_p (insn, REG_CC)"
    {
      if (operands[2] == CONST0_RTX (<MODE>mode))
        operands[2] = zero_reg_rtx;
***************
*** 8094,8100 ****
                                  (const_int 1)]
                                 UNSPECV_DELAY_CYCLES)
                (set (match_dup 1)
!                (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
                (clobber (match_dup 2))
                (clobber (reg:CC REG_CC))])])
  
--- 8022,8028 ----
                                  (const_int 1)]
                                 UNSPECV_DELAY_CYCLES)
                (set (match_dup 1)
!                    (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
                (clobber (match_dup 2))
                (clobber (reg:CC REG_CC))])])
  
***************
*** 8126,8132 ****
                                  (const_int 2)]
                                 UNSPECV_DELAY_CYCLES)
                (set (match_dup 1)
!                (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
                (clobber (match_dup 2))
                (clobber (reg:CC REG_CC))])]
    ""
--- 8054,8060 ----
                                  (const_int 2)]
                                 UNSPECV_DELAY_CYCLES)
                (set (match_dup 1)
!                    (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
                (clobber (match_dup 2))
                (clobber (reg:CC REG_CC))])]
    ""
***************
*** 8163,8169 ****
                                  (const_int 3)]
                                 UNSPECV_DELAY_CYCLES)
                (set (match_dup 1)
!                (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
                (clobber (match_dup 2))
                (clobber (match_dup 3))
                (clobber (match_dup 4))
--- 8091,8097 ----
                                  (const_int 3)]
                                 UNSPECV_DELAY_CYCLES)
                (set (match_dup 1)
!                    (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
                (clobber (match_dup 2))
                (clobber (match_dup 3))
                (clobber (match_dup 4))
***************
*** 8206,8212 ****
                                  (const_int 4)]
                                 UNSPECV_DELAY_CYCLES)
                (set (match_dup 1)
!                (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
                (clobber (match_dup 2))
                (clobber (match_dup 3))
                (clobber (match_dup 4))
--- 8134,8140 ----
                                  (const_int 4)]
                                 UNSPECV_DELAY_CYCLES)
                (set (match_dup 1)
!                    (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
                (clobber (match_dup 2))
                (clobber (match_dup 3))
                (clobber (match_dup 4))
***************
*** 9095,9110 ****
    "bst %3,0\;bld %0,%4"
    [(set_attr "length" "2")])
  
! ;; Move bit $3.0 into bit $0.0.
! ;; For bit 0, combiner generates slightly different pattern.
! (define_insn "*movbitqi.0"
!   [(set (match_operand:QI 0 "register_operand"                     "=r")
!         (ior:QI (and:QI (match_operand:QI 1 "register_operand"      "0")
!                         (match_operand:QI 2 "single_zero_operand"   "n"))
!                 (and:QI (match_operand:QI 3 "register_operand"      "r")
!                         (const_int 1))))]
!   "0 == exact_log2 (~INTVAL(operands[2]) & GET_MODE_MASK (QImode))"
!   "bst %3,0\;bld %0,0"
    [(set_attr "length" "2")])
  
  ;; Move bit $2.0 into bit $0.7.
--- 9023,9042 ----
    "bst %3,0\;bld %0,%4"
    [(set_attr "length" "2")])
  
! ;; Move bit $3.x into bit $0.x.
! (define_insn "*movbit<mode>.0-6"
!   [(set (match_operand:QISI 0 "register_operand"                       "=r")
!         (ior:QISI (and:QISI (match_operand:QISI 1 "register_operand"    "0")
!                             (match_operand:QISI 2 "single_zero_operand" "n"))
!                   (and:QISI (match_operand:QISI 3 "register_operand"    "r")
!                             (match_operand:QISI 4 "single_one_operand"  "n"))))]
!   "GET_MODE_MASK(<MODE>mode)
!    == (GET_MODE_MASK(<MODE>mode) & (INTVAL(operands[2]) ^ INTVAL(operands[4])))"
!   {
!     auto bitmask = GET_MODE_MASK (<MODE>mode) & UINTVAL (operands[4]);
!     operands[4] = GEN_INT (exact_log2 (bitmask));
!     return "bst %T3%T4" CR_TAB "bld %T0%T4";
!   }
    [(set_attr "length" "2")])
  
  ;; Move bit $2.0 into bit $0.7.
***************
*** 9489,9494 ****
--- 9421,9678 ----
                (clobber (reg:CC REG_CC))])])
  
  
+ ;; Try optimize decrement-and-branch.  When we have an addition followed
+ ;; by a comparison of the result against zero, we can output the addition
+ ;; in such a way that SREG.N and SREG.Z are set according to the result.
+ 
+ ;; { -1, +1 } for QImode, otherwise the empty set.
+ (define_mode_attr p1m1 [(QI "N P")
+                         (HI "Yxx") (PSI "Yxx") (SI "Yxx")])
+ 
+ ;; FIXME: reload1.cc::do_output_reload() does not support output reloads
+ ;; for JUMP_INSNs, hence letting combine doing decrement-and-branch like
+ ;; the following might run into ICE.  Doing reloads by hand is too painful...
+ ;
+ ; (define_insn_and_split "*add.for.eqne.<mode>.cbranch"
+ ;   [(set (pc)
+ ;         (if_then_else (eqne (match_operand:QISI 1 "register_operand"  "0")
+ ;                             (match_operand:QISI 2 "const_int_operand" "n"))
+ ;                       (label_ref (match_operand 4))
+ ;                       (pc)))
+ ;    (set (match_operand:QISI 0 "register_operand" "=r")
+ ;         (plus:QISI (match_dup 1)
+ ;                    (match_operand:QISI 3 "const_int_operand" "n")))]
+ ;   ;; No clobber for now as combine might not have one handy.
+ ;   ;; We pop a scatch in split1.
+ ;   "!reload_completed
+ ;    && const0_rtx == simplify_binary_operation (PLUS, <MODE>mode,
+ ;                                                operands[2], operands[3])"
+ ;   { gcc_unreachable(); }
+ ;   "&& 1"
+ ;   [(parallel [(set (pc)
+ ;                    (if_then_else (eqne (match_dup 1)
+ ;                                        (match_dup 2))
+ ;                                  (label_ref (match_dup 4))
+ ;                                  (pc)))
+ ;               (set (match_dup 0)
+ ;                    (plus:QISI (match_dup 1)
+ ;                               (match_dup 3)))
+ ;               (clobber (scratch:QI))])])
+ ;
+ ;; ...Hence, stick with RTL peepholes for now.  Unfortunately, there is no
+ ;; canonical form, and if reload shuffles registers around, we might miss
+ ;; opportunities to match a decrement-and-branch.
+ ;; doloop_end doesn't reload either, so doloop_end also won't work.
+ 
+ (define_expand "gen_add_for_<code>_<mode>"
+   ; "*add.for.eqne.<mode>"
+   [(parallel [(set (reg:CC REG_CC)
+                    (compare:CC (plus:QISI (match_operand:QISI 0 "register_operand")
+                                           (match_operand:QISI 1 "const_int_operand"))
+                                (const_int 0)))
+               (set (match_dup 0)
+                    (plus:QISI (match_dup 0)
+                               (match_dup 1)))
+               (clobber (match_operand:QI 3))])
+    ; "branch"
+    (set (pc)
+         (if_then_else (eqne (reg:CC REG_CC)
+                             (const_int 0))
+                       (label_ref (match_dup 2))
+                       (pc)))])
+ 
+ 
+ ;; 1/3: A version without clobber: d-reg or 8-bit adds +/-1.
+ (define_peephole2
+   [(parallel [(set (match_operand:QISI 0 "register_operand")
+                    (plus:QISI (match_dup 0)
+                               (match_operand:QISI 1 "const_int_operand")))
+               (clobber (reg:CC REG_CC))])
+    (set (reg:CC REG_CC)
+         (compare:CC (match_dup 0)
+                     (const_int 0)))
+    (set (pc)
+         (if_then_else (eqne (reg:CC REG_CC)
+                             (const_int 0))
+                       (label_ref (match_operand 2))
+                       (pc)))]
+   "peep2_regno_dead_p (3, REG_CC)
+    && (d_register_operand (operands[0], <MODE>mode)
+        || (<MODE>mode == QImode
+            && (INTVAL (operands[1]) == 1
+                || INTVAL (operands[1]) == -1)))"
+   [(scratch)]
+   {
+     emit (gen_gen_add_for_<code>_<mode> (operands[0], operands[1], operands[2],
+           gen_rtx_SCRATCH (QImode)));
+     DONE;
+   })
+ 
+ ;; 2/3: A version with clobber from the insn.
+ (define_peephole2
+   [(parallel [(set (match_operand:QISI 0 "register_operand")
+                    (plus:QISI (match_dup 0)
+                               (match_operand:QISI 1 "const_int_operand")))
+               (clobber (match_operand:QI 3 "scratch_or_d_register_operand"))
+               (clobber (reg:CC REG_CC))])
+    (parallel [(set (reg:CC REG_CC)
+                    (compare:CC (match_dup 0)
+                                (const_int 0)))
+               (clobber (match_operand:QI 4 "scratch_or_d_register_operand"))])
+    (set (pc)
+         (if_then_else (eqne (reg:CC REG_CC)
+                             (const_int 0))
+                       (label_ref (match_operand 2))
+                       (pc)))]
+   "peep2_regno_dead_p (3, REG_CC)"
+   [(scratch)]
+   {
+     rtx scratch = REG_P (operands[3]) ? operands[3] : operands[4];
+ 
+     // We need either a d-register or a scratch register to clobber.
+     if (! REG_P (scratch)
+         && ! d_register_operand (operands[0], <MODE>mode)
+         && ! (QImode == <MODE>mode
+               && (INTVAL (operands[1]) == 1
+                   || INTVAL (operands[1]) == -1)))
+       {
+         FAIL;
+       }
+     emit (gen_gen_add_for_<code>_<mode> (operands[0], operands[1], operands[2],
+           scratch));
+     DONE;
+   })
+ 
+ ;; 3/3 A version with a clobber from peephole2.
+ (define_peephole2
+   [(match_scratch:QI 3 "d")
+    (parallel [(set (match_operand:QISI 0 "register_operand")
+                    (plus:QISI (match_dup 0)
+                               (match_operand:QISI 1 "const_int_operand")))
+               (clobber (reg:CC REG_CC))])
+    (set (reg:CC REG_CC)
+         (compare:CC (match_dup 0)
+                     (const_int 0)))
+    (set (pc)
+         (if_then_else (eqne (reg:CC REG_CC)
+                             (const_int 0))
+                       (label_ref (match_operand 2))
+                       (pc)))]
+   "peep2_regno_dead_p (3, REG_CC)"
+   [(scratch)]
+   {
+     emit (gen_gen_add_for_<code>_<mode> (operands[0], operands[1], operands[2],
+           operands[3]));
+     DONE;
+   })
+ 
+ ;; Result of the above three peepholes is an addition that also
+ ;; performs an EQ or NE comparison (of the result) against zero.
+ ;; FIXME: Using (match_dup 0) instead of operands[3/4] makes rnregs
+ ;; barf in regrename.cc::merge_overlapping_regs().  For now, use the
+ ;; fix from PR50788: Constrain as "0".
+ (define_insn "*add.for.eqne.<mode>"
+   [(set (reg:CC REG_CC)
+         (compare:CC
+          (plus:QISI (match_operand:QISI 3 "register_operand"  "0,0     ,0")
+                     (match_operand:QISI 1 "const_int_operand" "n,<p1m1>,n"))
+          (const_int 0)))
+    (set (match_operand:QISI 0 "register_operand"             "=d,*r    ,r")
+         (plus:QISI (match_operand:QISI 4 "register_operand"   "0,0     ,0")
+                    (match_dup 1)))
+    (clobber (match_scratch:QI 2                              "=X,X     ,&d"))]
+   "reload_completed"
+   {
+     return avr_out_plus_set_ZN (operands, nullptr);
+   }
+   [(set_attr "adjust_len" "add_set_ZN")])
+ 
+ 
+ ;; Swapping both comparison and branch condition.  This can turn difficult
+ ;; branches to easy ones.  And in some cases, a comparison against one can
+ ;; be turned into a comparison against zero.
+ 
+ (define_peephole2 ; "*swapped_tst<mode>"
+   [(parallel [(set (reg:CC REG_CC)
+                    (compare:CC (match_operand:ALLs234 1 "register_operand")
+                                (match_operand:ALLs234 2 "const_operand")))
+               (clobber (match_operand:QI 3 "scratch_operand"))])
+    (set (pc)
+         (if_then_else (match_operator 0 "ordered_comparison_operator"
+                         [(reg:CC REG_CC)
+                          (const_int 0)])
+                       (label_ref (match_operand 4))
+                       (pc)))]
+   "peep2_regno_dead_p (2, REG_CC)"
+   [(set (reg:CC REG_CC)
+         (compare:CC (match_dup 2)
+                     (match_dup 1)))
+    ; "branch"
+    (set (pc)
+         (if_then_else (match_op_dup 0 [(reg:CC REG_CC)
+                                        (const_int 0)])
+                       (label_ref (match_dup 4))
+                       (pc)))]
+   {
+     rtx xval = avr_to_int_mode (operands[2]);
+     enum rtx_code code = GET_CODE (operands[0]);
+ 
+     if (code == GT && xval == const0_rtx)
+       code = LT;
+     else if (code == GE && xval == const1_rtx)
+       code = LT;
+     else if (code == LE && xval == const0_rtx)
+       code = GE;
+     else if (code == LT && xval == const1_rtx)
+       code = GE;
+     else
+       FAIL;
+ 
+     operands[2] = CONST0_RTX (<MODE>mode);
+     PUT_CODE (operands[0], code);
+   })
+ 
+ ;; Same, but for 8-bit modes which have no scratch reg.
+ (define_peephole2 ; "*swapped_tst<mode>"
+   [(set (reg:CC REG_CC)
+         (compare:CC (match_operand:ALLs1 1 "register_operand")
+                     (match_operand:ALLs1 2 "const_operand")))
+    (set (pc)
+         (if_then_else (match_operator 0 "ordered_comparison_operator"
+                         [(reg:CC REG_CC)
+                          (const_int 0)])
+                       (label_ref (match_operand 4))
+                       (pc)))]
+   "peep2_regno_dead_p (2, REG_CC)"
+   [(set (reg:CC REG_CC)
+         (compare:CC (match_dup 2)
+                     (match_dup 1)))
+    ; "branch"
+    (set (pc)
+         (if_then_else (match_op_dup 0 [(reg:CC REG_CC)
+                                        (const_int 0)])
+                       (label_ref (match_dup 4))
+                       (pc)))]
+   {
+     rtx xval = avr_to_int_mode (operands[2]);
+     enum rtx_code code = GET_CODE (operands[0]);
+ 
+     if (code == GT && xval == const0_rtx)
+       code = LT;
+     else if (code == GE && xval == const1_rtx)
+       code = LT;
+     else if (code == LE && xval == const0_rtx)
+       code = GE;
+     else if (code == LT && xval == const1_rtx)
+       code = GE;
+     else
+       FAIL;
+ 
+     operands[2] = CONST0_RTX (<MODE>mode);
+     PUT_CODE (operands[0], code);
+   })
+ 
+ 
  (define_expand "extzv"
    [(set (match_operand:QI 0 "register_operand" "")
          (zero_extract:QI (match_operand:QI 1 "register_operand"  "")
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr.opt gcc-12.4.0/gcc/config/avr/avr.opt
*** gcc-12.3.0/gcc/config/avr/avr.opt	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr.opt	Thu Jun 20 08:08:06 2024
*************** Target RejectNegative Joined Var(avr_mmc
*** 27,33 ****
  -mmcu=MCU	Select the target MCU.
  
  mgas-isr-prologues
! Target Var(avr_gasisr_prologues) UInteger Init(0)
  Allow usage of __gcc_isr pseudo instructions in ISR prologues and epilogues.
  
  mn-flash=
--- 27,33 ----
  -mmcu=MCU	Select the target MCU.
  
  mgas-isr-prologues
! Target Var(avr_gasisr_prologues) UInteger Init(0) Optimization
  Allow usage of __gcc_isr pseudo instructions in ISR prologues and epilogues.
  
  mn-flash=
*************** Target RejectNegative Mask(NO_INTERRUPTS
*** 61,71 ****
  Change the stack pointer without disabling interrupts.
  
  mbranch-cost=
! Target Joined RejectNegative UInteger Var(avr_branch_cost) Init(0)
  Set the branch costs for conditional branch instructions.  Reasonable values are small, non-negative integers.  The default branch cost is 0.
  
  mmain-is-OS_task
! Target Mask(MAIN_IS_OS_TASK)
  Treat main as if it had attribute OS_task.
  
  morder1
--- 61,71 ----
  Change the stack pointer without disabling interrupts.
  
  mbranch-cost=
! Target Joined RejectNegative UInteger Var(avr_branch_cost) Init(0) Optimization
  Set the branch costs for conditional branch instructions.  Reasonable values are small, non-negative integers.  The default branch cost is 0.
  
  mmain-is-OS_task
! Target Mask(MAIN_IS_OS_TASK) Optimization
  Treat main as if it had attribute OS_task.
  
  morder1
*************** Target Mask(ABSDATA)
*** 116,126 ****
  Assume that all data in static storage can be accessed by LDS / STS.  This option is only useful for reduced Tiny devices.
  
  mdouble=
! Target Joined RejectNegative Var(avr_double) Init(0) Enum(avr_bits_e)
  -mdouble=<BITS>	Use <BITS> bits wide double type.
  
  mlong-double=
! Target Joined RejectNegative Var(avr_long_double) Init(0) Enum(avr_bits_e)
  -mlong-double=<BITS>	Use <BITS> bits wide long double type.
  
  nodevicelib
--- 116,126 ----
  Assume that all data in static storage can be accessed by LDS / STS.  This option is only useful for reduced Tiny devices.
  
  mdouble=
! Target Joined RejectNegative Var(avr_double) Init(0) Enum(avr_bits_e) Save
  -mdouble=<BITS>	Use <BITS> bits wide double type.
  
  mlong-double=
! Target Joined RejectNegative Var(avr_long_double) Init(0) Enum(avr_bits_e) Save
  -mlong-double=<BITS>	Use <BITS> bits wide long double type.
  
  nodevicelib
diff -Nrcpad gcc-12.3.0/gcc/config/avr/constraints.md gcc-12.4.0/gcc/config/avr/constraints.md
*** gcc-12.3.0/gcc/config/avr/constraints.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/constraints.md	Thu Jun 20 08:08:06 2024
***************
*** 245,250 ****
--- 245,255 ----
  	    (match_test "INTVAL (avr_to_int_mode (op)) == -2"))
         (match_test "satisfies_constraint_Cm2 (op)")))
  
+ ;; Constraint that's the empty set.  Useful with mode and code iterators.
+ (define_constraint "Yxx"
+   "A constraints that is always false"
+   (match_test "false"))
+ 
  (define_constraint "Yx2"
    "Fixed-point or integer constant not in the range @minus{}2 @dots{} 2"
    (and (ior (match_code "const_int")
diff -Nrcpad gcc-12.3.0/gcc/config/avr/driver-avr.cc gcc-12.4.0/gcc/config/avr/driver-avr.cc
*** gcc-12.3.0/gcc/config/avr/driver-avr.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/driver-avr.cc	Thu Jun 20 08:08:06 2024
*************** avr_devicespecs_file (int argc, const ch
*** 103,111 ****
        }
  
    return concat ("%{!nodevicespecs:-specs=device-specs", dir_separator_str,
! 				 "specs-", mmcu, "%s} %<nodevicespecs"
  #if defined (WITH_AVRLIBC)
!                  " %{mmcu=avr*:" X_NODEVLIB "} %{!mmcu=*:" X_NODEVLIB "}",
  #else
                   " " X_NODEVLIB,
  #endif
--- 103,116 ----
        }
  
    return concat ("%{!nodevicespecs:-specs=device-specs", dir_separator_str,
! 		 "specs-", mmcu, "%s} %<nodevicespecs"
  #if defined (WITH_AVRLIBC)
! 		 // Return X_NODEVLIB when we are compiling for a core.  As
! 		 // there are devices like AVR128DA32, a simple mmcu=avr* to
! 		 // discriminate between cores and devices ceased to work,
! 		 // hence use spec function no-devlib=avr_no_devlib from below.
! 		 // See also PR107201.
! 		 " %{mmcu=avr*:%:no-devlib(avr%*)} %{!mmcu=*:" X_NODEVLIB "}",
  #else
                   " " X_NODEVLIB,
  #endif
*************** avr_devicespecs_file (int argc, const ch
*** 113,122 ****
  }
  
  
  /* Re-build the -mdouble= and -mlong-double= options.  This is needed
     because these options are not independent of each other.  */
  
! const char*
  avr_double_lib (int argc, const char **argv)
  {
  #if defined (WITH_DOUBLE64)
--- 118,143 ----
  }
  
  
+ /* Return X_NODEVLIB when ARGV[] contains a core like "avr5",
+    otherwise return "".  */
+ 
+ const char *
+ avr_no_devlib (int argc, const char **argv)
+ {
+   for (int i = 0; i < argc; ++i)
+     {
+       if (avr_get_parch (argv[i]))
+ 	return X_NODEVLIB;
+     }
+ 
+   return "";
+ }
+ 
+ 
  /* Re-build the -mdouble= and -mlong-double= options.  This is needed
     because these options are not independent of each other.  */
  
! const char *
  avr_double_lib (int argc, const char **argv)
  {
  #if defined (WITH_DOUBLE64)
diff -Nrcpad gcc-12.3.0/gcc/config/avr/predicates.md gcc-12.4.0/gcc/config/avr/predicates.md
*** gcc-12.3.0/gcc/config/avr/predicates.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/predicates.md	Thu Jun 20 08:08:06 2024
***************
*** 27,32 ****
--- 27,37 ----
    (and (match_code "reg")
         (match_test "REGNO (op) >= 16 && REGNO (op) <= 31")))
  
+ (define_predicate "scratch_or_d_register_operand"
+   (ior (match_operand 0 "d_register_operand")
+        (and (match_code ("scratch"))
+             (match_operand 0 "scratch_operand"))))
+ 
  (define_predicate "even_register_operand"
    (and (match_code "reg")
         (and (match_test "REGNO (op) <= 31")
diff -Nrcpad gcc-12.3.0/gcc/config/darwin-protos.h gcc-12.4.0/gcc/config/darwin-protos.h
*** gcc-12.3.0/gcc/config/darwin-protos.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/darwin-protos.h	Thu Jun 20 08:08:06 2024
*************** extern void darwin_patch_builtins (void)
*** 129,132 ****
--- 129,143 ----
  extern void darwin_rename_builtins (void);
  extern bool darwin_libc_has_function (enum function_class fn_class, tree);
  
+ /* For this port, there are several possible sources for external toolchain
+    components (e.g. as, ld, dsymutil) and we have to alter the allowable
+    output in response to which version and source is in use.  */
+ enum darwin_external_toolchain {
+   DET_UNKNOWN=0,
+   CCTOOLS,
+   DWARFUTILS,
+   LLVM,
+   CLANG
+ };
+ 
  #endif /* CONFIG_DARWIN_PROTOS_H */
diff -Nrcpad gcc-12.3.0/gcc/config/darwin-sections.def gcc-12.4.0/gcc/config/darwin-sections.def
*** gcc-12.3.0/gcc/config/darwin-sections.def	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/darwin-sections.def	Thu Jun 20 08:08:06 2024
*************** DEF_SECTION (mod_init_section, 0, ".mod_
*** 98,103 ****
--- 98,105 ----
  DEF_SECTION (mod_term_section, 0, ".mod_term_func", 0)
  DEF_SECTION (constructor_section, 0, ".constructor", 0)
  DEF_SECTION (destructor_section, 0, ".destructor", 0)
+ DEF_SECTION (static_init_section, SECTION_CODE,
+ 	     ".section\t__TEXT,__StaticInit,regular,pure_instructions", 0)
  
  /* Objective-C ABI=0 (Original version) sections.  */
  DEF_SECTION (objc_class_section, 0, ".objc_class", 1)
*************** DEF_SECTION (machopic_picsymbol_stub3_se
*** 157,163 ****
  
  /* Exception-related.  */
  DEF_SECTION (darwin_exception_section, SECTION_NO_ANCHOR,
! 	     ".section __DATA,__gcc_except_tab", 0)
  DEF_SECTION (darwin_eh_frame_section, SECTION_NO_ANCHOR,
  	     ".section " EH_FRAME_SECTION_NAME ",__eh_frame"
  	     EH_FRAME_SECTION_ATTR, 0)
--- 159,165 ----
  
  /* Exception-related.  */
  DEF_SECTION (darwin_exception_section, SECTION_NO_ANCHOR,
! 	     ".section __TEXT,__gcc_except_tab", 0)
  DEF_SECTION (darwin_eh_frame_section, SECTION_NO_ANCHOR,
  	     ".section " EH_FRAME_SECTION_NAME ",__eh_frame"
  	     EH_FRAME_SECTION_ATTR, 0)
diff -Nrcpad gcc-12.3.0/gcc/config/darwin.cc gcc-12.4.0/gcc/config/darwin.cc
*** gcc-12.3.0/gcc/config/darwin.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/darwin.cc	Thu Jun 20 08:08:06 2024
*************** static bool ld_needs_eh_markers = false;
*** 114,119 ****
--- 114,132 ----
  /* Emit a section-start symbol for mod init and term sections.  */
  static bool ld_init_term_start_labels = false;
  
+ /* The source and version of dsymutil in use.  */
+ #ifndef DSYMUTIL_VERSION
+ # warning Darwin toolchain without a defined dsymutil.
+ # define DSYMUTIL_VERSION DET_UNKNOWN,0,0,0
+ #endif
+ 
+ struct {
+   darwin_external_toolchain kind; /* cctools, llvm, clang etc.  */
+   int major; /* version number.  */
+   int minor;
+   int tiny;
+ } dsymutil_version = {DSYMUTIL_VERSION};
+ 
  /* Section names.  */
  section * darwin_sections[NUM_DARWIN_SECTIONS];
  
*************** darwin_objc1_section (tree decl ATTRIBUT
*** 1586,1592 ****
    else if (startswith (p, "V1_CEXT"))
      return darwin_sections[objc1_class_ext_section];
  
!   else if (startswith (p, "V2_CSTR"))
      return darwin_sections[objc_constant_string_object_section];
  
    return base;
--- 1599,1605 ----
    else if (startswith (p, "V1_CEXT"))
      return darwin_sections[objc1_class_ext_section];
  
!   else if (startswith (p, "V1_CSTR"))
      return darwin_sections[objc_constant_string_object_section];
  
    return base;
*************** machopic_select_section (tree decl,
*** 1679,1685 ****
  	    base_section = darwin_sections[zobj_data_section];
  	}
        else if (ro)
! 	base_section = darwin_sections[const_data_section];
        else
  	base_section = data_section;
        break;
--- 1692,1707 ----
  	    base_section = darwin_sections[zobj_data_section];
  	}
        else if (ro)
! 	{
! 	  if (VAR_P (decl) && TREE_TYPE (decl)
! 	      && TREE_CODE (TREE_TYPE (decl)) == RECORD_TYPE
! 	      && DECL_NAME (decl)
! 	      && strncmp (IDENTIFIER_POINTER (DECL_NAME (decl)),
! 			  "__anon_cfstring", 15) == 0)
! 	   base_section = darwin_sections[cfstring_constant_object_section];
! 	  else
! 	    base_section = darwin_sections[const_data_section];
! 	}
        else
  	base_section = data_section;
        break;
*************** machopic_select_section (tree decl,
*** 1721,1727 ****
  	return base_section; /* GNU runtime is happy with it all in one pot.  */
      }
  
!   /* b) Constant string objects.  */
    if (TREE_CODE (decl) == CONSTRUCTOR
        && TREE_TYPE (decl)
        && TREE_CODE (TREE_TYPE (decl)) == RECORD_TYPE
--- 1743,1749 ----
  	return base_section; /* GNU runtime is happy with it all in one pot.  */
      }
  
!   /* b) Constructors for constant NSstring [but not CFString] objects.  */
    if (TREE_CODE (decl) == CONSTRUCTOR
        && TREE_TYPE (decl)
        && TREE_CODE (TREE_TYPE (decl)) == RECORD_TYPE
*************** machopic_select_section (tree decl,
*** 1744,1750 ****
  	    return darwin_sections[objc_string_object_section];
  	}
        else if (!strcmp (IDENTIFIER_POINTER (name), "__builtin_CFString"))
! 	return darwin_sections[cfstring_constant_object_section];
        else
  	return base_section;
      }
--- 1766,1776 ----
  	    return darwin_sections[objc_string_object_section];
  	}
        else if (!strcmp (IDENTIFIER_POINTER (name), "__builtin_CFString"))
! 	{
! 	  /* We should have handled __anon_cfstrings above.  */
! 	  gcc_checking_assert (0);
! 	  return darwin_sections[cfstring_constant_object_section];
! 	}
        else
  	return base_section;
      }
*************** darwin_label_is_anonymous_local_objc_nam
*** 1936,1941 ****
--- 1962,1969 ----
      }
    else if (startswith ((const char *)p, "ClassMethods"))
      return false;
+   else if (startswith ((const char *)p, "ClassProtocols"))
+     return false;
    else if (startswith ((const char *)p, "Instance"))
      {
        if (p[8] == 'I' || p[8] == 'M')
*************** darwin_emit_except_table_label (FILE *fi
*** 2230,2235 ****
--- 2258,2264 ----
  {
    char section_start_label[30];
  
+   fputs ("\t.p2align\t2\n", file);
    ASM_GENERATE_INTERNAL_LABEL (section_start_label, "GCC_except_table",
  			       except_table_label_num++);
    ASM_OUTPUT_LABEL (file, section_start_label);
*************** darwin_asm_output_dwarf_offset (FILE *fi
*** 3018,3024 ****
  void
  darwin_file_start (void)
  {
!   /* Nothing to do.  */
  }
  
  /* Called for the TARGET_ASM_FILE_END hook.
--- 3047,3081 ----
  void
  darwin_file_start (void)
  {
! #ifdef HAVE_AS_MMACOSX_VERSION_MIN_OPTION
!   /* This should not happen with a well-formed command line, but the user could
!      invoke cc1* directly without it.  */
!   if (!darwin_macosx_version_min)
!     return;
!   /* This assumes that the version passed has been validated in the driver.  */
!   unsigned maj, min, tiny;
!   int count = sscanf (darwin_macosx_version_min, "%u.%u.%u", &maj, &min, &tiny);
!   if (count < 0)
!     return;
!   if (count < 3)
!     tiny = 0;
!   if (count < 2)
!     min = 0;
!   const char *directive;
! #ifdef HAVE_AS_MACOS_BUILD_VERSION
!   /* We only handle macos, so far.  */
!   if (generating_for_darwin_version >= 18)
!     directive = "build_version macos, ";
!   else
! #endif
!     directive = "macosx_version_min ";
!   if (count > 2 && tiny != 0)
!     fprintf (asm_out_file, "\t.%s %u, %u, %u\n", directive, maj, min, tiny);
!   else if (count > 1)
!     fprintf (asm_out_file, "\t.%s %u, %u\n", directive, maj, min);
!   else
!      fprintf (asm_out_file, "\t.%s %u, 0\n", directive, maj);
! #endif
  }
  
  /* Called for the TARGET_ASM_FILE_END hook.
*************** darwin_override_options (void)
*** 3240,3246 ****
    /* Keep track of which (major) version we're generating code for.  */
    if (darwin_macosx_version_min)
      {
!       if (strverscmp (darwin_macosx_version_min, "10.7") >= 0)
  	generating_for_darwin_version = 11;
        else if (strverscmp (darwin_macosx_version_min, "10.6") >= 0)
  	generating_for_darwin_version = 10;
--- 3297,3307 ----
    /* Keep track of which (major) version we're generating code for.  */
    if (darwin_macosx_version_min)
      {
!       if (strverscmp (darwin_macosx_version_min, "10.14") >= 0)
! 	generating_for_darwin_version = 18;
!       else if (strverscmp (darwin_macosx_version_min, "10.8") >= 0)
! 	generating_for_darwin_version = 12;
!       else if (strverscmp (darwin_macosx_version_min, "10.7") >= 0)
  	generating_for_darwin_version = 11;
        else if (strverscmp (darwin_macosx_version_min, "10.6") >= 0)
  	generating_for_darwin_version = 10;
*************** darwin_override_options (void)
*** 3315,3328 ****
  		  global_options.x_flag_objc_abi);
      }
  
-   /* Don't emit DWARF3/4 unless specifically selected.  This is a
-      workaround for tool bugs.  */
-   if (!OPTION_SET_P (dwarf_strict))
-     dwarf_strict = 1;
    if (!OPTION_SET_P (dwarf_version))
!     dwarf_version = 2;
  
!   if (OPTION_SET_P (dwarf_split_debug_info))
      {
        inform (input_location,
  	      "%<-gsplit-dwarf%> is not supported on this platform, ignored");
--- 3376,3396 ----
  		  global_options.x_flag_objc_abi);
      }
  
    if (!OPTION_SET_P (dwarf_version))
!     {
!       /* External toolchains based on LLVM or clang 7+ have support for
! 	 dwarf-4.  */
!       if ((dsymutil_version.kind == LLVM && dsymutil_version.major >= 7)
! 	  || (dsymutil_version.kind == CLANG && dsymutil_version.major >= 700))
! 	dwarf_version = 4;
!       else if (dsymutil_version.kind == DWARFUTILS
! 	       && dsymutil_version.major >= 121)
! 	dwarf_version = 3;  /* From XC 6.4.  */
!       else
! 	dwarf_version = 2;  /* Older cannot safely exceed dwarf-2.  */
!     }
  
!   if (OPTION_SET_P (dwarf_split_debug_info) && dwarf_split_debug_info)
      {
        inform (input_location,
  	      "%<-gsplit-dwarf%> is not supported on this platform, ignored");
*************** darwin_override_options (void)
*** 3330,3335 ****
--- 3398,3421 ----
        OPTION_SET_P (dwarf_split_debug_info) = 0;
      }
  
+   /* Cases where dsymutil will exclude files with .macinfo sections; we are
+      better off forcing the debug level to 2 than completely excluding the
+      files.  If strict dwarf is set, then emit the macinfo anyway.  */
+   if (debug_info_level == DINFO_LEVEL_VERBOSE
+       && (!OPTION_SET_P (dwarf_strict) || dwarf_strict == 0)
+       && ((dsymutil_version.kind == CLANG && dsymutil_version.major >= 1500)
+ 	  || (dsymutil_version.kind == LLVM && dsymutil_version.major >= 15)))
+     {
+       inform (input_location,
+ 	      "%<-g3%> is not supported by the debug linker in use (set to 2)");
+       debug_info_level = DINFO_LEVEL_NORMAL;
+     }
+ 
+   /* Limit DWARF to the chosen version, the linker and debug linker might not
+      be able to consume newer structures.  */
+   if (!OPTION_SET_P (dwarf_strict))
+     dwarf_strict = 1;
+ 
    /* Do not allow unwind tables to be generated by default for m32.
       fnon-call-exceptions will override this, regardless of what we do.  */
    if (generating_for_darwin_version < 10
*************** darwin_override_options (void)
*** 3398,3405 ****
        && dwarf_debuginfo_p ())
      flag_var_tracking_uninit = flag_var_tracking;
  
!   /* Final check on PCI options; for Darwin these are not dependent on the PIE
!      ones, although PIE does require PIC to support it.  */
    if (MACHO_DYNAMIC_NO_PIC_P)
      {
        if (flag_pic)
--- 3484,3500 ----
        && dwarf_debuginfo_p ())
      flag_var_tracking_uninit = flag_var_tracking;
  
!   if (OPTION_SET_P (flag_pie) && flag_pie)
!     {
!       /* This is a little complicated, to match Xcode tools.
! 	 For Darwin, PIE requires PIC codegen, but otherwise is only a link-
! 	 time change.  For almost all Darwin, we do not report __PIE__; the
! 	 exception is Darwin12-17 and for 32b only.  */
!       flag_pie = generating_for_darwin_version >= 12 && !TARGET_64BIT ? 2 : 0;
!       flag_pic = 2; /* We always set this.  */
!     }
! 
!   /* Final check on PIC options.  */
    if (MACHO_DYNAMIC_NO_PIC_P)
      {
        if (flag_pic)
*************** darwin_patch_builtins (void)
*** 3504,3509 ****
--- 3599,3627 ----
  }
  #endif
  
+ void
+ darwin_rename_builtins (void)
+ {
+ }
+ 
+ /* Implementation for the TARGET_LIBC_HAS_FUNCTION hook.  */
+ 
+ bool
+ darwin_libc_has_function (enum function_class fn_class,
+ 			  tree type ATTRIBUTE_UNUSED)
+ {
+   if (fn_class == function_sincos && darwin_macosx_version_min)
+     return (strverscmp (darwin_macosx_version_min, "10.9") >= 0);
+ #if DARWIN_PPC && SUPPORT_DARWIN_LEGACY
+   if (fn_class == function_c99_math_complex
+       || fn_class == function_c99_misc)
+     return (TARGET_64BIT
+ 	    || (darwin_macosx_version_min &&
+ 		strverscmp (darwin_macosx_version_min, "10.3") >= 0));
+ #endif
+   return default_libc_has_function (fn_class, type);
+ }
+ 
  /*  CFStrings implementation.  */
  static GTY(()) tree cfstring_class_reference = NULL_TREE;
  static GTY(()) tree cfstring_type_node = NULL_TREE;
*************** typedef struct GTY ((for_user)) cfstring
*** 3521,3527 ****
    /* The string literal.  */
    tree literal;
    /* The resulting constant CFString.  */
!   tree constructor;
  } cfstring_descriptor;
  
  struct cfstring_hasher : ggc_ptr_hash<cfstring_descriptor>
--- 3639,3645 ----
    /* The string literal.  */
    tree literal;
    /* The resulting constant CFString.  */
!   tree ccf_str;
  } cfstring_descriptor;
  
  struct cfstring_hasher : ggc_ptr_hash<cfstring_descriptor>
*************** darwin_init_cfstring_builtins (unsigned
*** 3596,3602 ****
    /* Make a lang-specific section - dup_lang_specific_decl makes a new node
       in place of the existing, which may be NULL.  */
    DECL_LANG_SPECIFIC (cfsfun) = NULL;
!   (*lang_hooks.dup_lang_specific_decl) (cfsfun);
    set_decl_built_in_function (cfsfun, BUILT_IN_MD, darwin_builtin_cfstring);
    lang_hooks.builtin_function (cfsfun);
  
--- 3714,3720 ----
    /* Make a lang-specific section - dup_lang_specific_decl makes a new node
       in place of the existing, which may be NULL.  */
    DECL_LANG_SPECIFIC (cfsfun) = NULL;
!   lang_hooks.dup_lang_specific_decl (cfsfun);
    set_decl_built_in_function (cfsfun, BUILT_IN_MD, darwin_builtin_cfstring);
    lang_hooks.builtin_function (cfsfun);
  
*************** darwin_init_cfstring_builtins (unsigned
*** 3607,3613 ****
  
    TREE_PUBLIC (cfstring_class_reference) = 1;
    DECL_ARTIFICIAL (cfstring_class_reference) = 1;
!   (*lang_hooks.decls.pushdecl) (cfstring_class_reference);
    DECL_EXTERNAL (cfstring_class_reference) = 1;
    rest_of_decl_compilation (cfstring_class_reference, 0, 0);
  
--- 3725,3731 ----
  
    TREE_PUBLIC (cfstring_class_reference) = 1;
    DECL_ARTIFICIAL (cfstring_class_reference) = 1;
!   lang_hooks.decls.pushdecl (cfstring_class_reference);
    DECL_EXTERNAL (cfstring_class_reference) = 1;
    rest_of_decl_compilation (cfstring_class_reference, 0, 0);
  
*************** darwin_fold_builtin (tree fndecl, int n_
*** 3644,3672 ****
    return NULL_TREE;
  }
  
- void
- darwin_rename_builtins (void)
- {
- }
- 
- /* Implementation for the TARGET_LIBC_HAS_FUNCTION hook.  */
- 
- bool
- darwin_libc_has_function (enum function_class fn_class,
- 			  tree type ATTRIBUTE_UNUSED)
- {
-   if (fn_class == function_sincos && darwin_macosx_version_min)
-     return (strverscmp (darwin_macosx_version_min, "10.9") >= 0);
- #if DARWIN_PPC && SUPPORT_DARWIN_LEGACY
-   if (fn_class == function_c99_math_complex
-       || fn_class == function_c99_misc)
-     return (TARGET_64BIT
- 	    || (darwin_macosx_version_min &&
- 		strverscmp (darwin_macosx_version_min, "10.3") >= 0));
- #endif
-   return default_libc_has_function (fn_class, type);
- }
- 
  hashval_t
  cfstring_hasher::hash (cfstring_descriptor *ptr)
  {
--- 3762,3767 ----
*************** darwin_build_constant_cfstring (tree str
*** 3764,3792 ****
  			     build_int_cst (TREE_TYPE (field), length));
  
        constructor = build_constructor (ccfstring_type_node, v);
!       TREE_READONLY (constructor) = 1;
!       TREE_CONSTANT (constructor) = 1;
!       TREE_STATIC (constructor) = 1;
  
!       /* Fromage: The C++ flavor of 'build_unary_op' expects constructor nodes
! 	 to have the TREE_HAS_CONSTRUCTOR (...) bit set.  However, this file is
! 	 being built without any knowledge of C++ tree accessors; hence, we shall
! 	 use the generic accessor that TREE_HAS_CONSTRUCTOR actually maps to!  */
        if (darwin_running_cxx)
  	TREE_LANG_FLAG_4 (constructor) = 1;  /* TREE_HAS_CONSTRUCTOR  */
  
        /* Create an anonymous global variable for this CFString.  */
!       var = build_decl (input_location, CONST_DECL,
  			NULL, TREE_TYPE (constructor));
!       DECL_ARTIFICIAL (var) = 1;
!       TREE_STATIC (var) = 1;
        DECL_INITIAL (var) = constructor;
!       /* FIXME: This should use a translation_unit_decl to indicate file scope.  */
        DECL_CONTEXT (var) = NULL_TREE;
!       desc->constructor = var;
      }
  
!   addr = build1 (ADDR_EXPR, pccfstring_type_node, desc->constructor);
    TREE_CONSTANT (addr) = 1;
  
    return addr;
--- 3859,3895 ----
  			     build_int_cst (TREE_TYPE (field), length));
  
        constructor = build_constructor (ccfstring_type_node, v);
!       TREE_READONLY (constructor) = true;
!       TREE_CONSTANT (constructor) = true;
!       TREE_STATIC (constructor) = true;
  
!       /* This file is being built without any knowledge of C++ tree accessors;
! 	 hence, we shall use the generic accessor to set TREE_HAS_CONSTRUCTOR.
! 	 ??? Is this actually used any more? */
        if (darwin_running_cxx)
  	TREE_LANG_FLAG_4 (constructor) = 1;  /* TREE_HAS_CONSTRUCTOR  */
  
        /* Create an anonymous global variable for this CFString.  */
!       var = build_decl (input_location, VAR_DECL,
  			NULL, TREE_TYPE (constructor));
!       char *name = xasprintf ("__anon_cfstring.%u", DECL_UID (var));
!       DECL_NAME (var) = get_identifier (name);
!       free (name);
!       DECL_ARTIFICIAL (var) = true;
!       TREE_STATIC (var) = true;
!       TREE_READONLY (var) = true;
!       TREE_CONSTANT (var) = true;
        DECL_INITIAL (var) = constructor;
!       /* global namespace.  */
        DECL_CONTEXT (var) = NULL_TREE;
!       DECL_INITIAL (var) = constructor;
!       DECL_USER_ALIGN (var) = 1;
!       lang_hooks.decls.pushdecl (var);
!       rest_of_decl_compilation (var, 1, 0);
!       desc->ccf_str = var;
      }
  
!   addr = build1 (ADDR_EXPR, pccfstring_type_node, desc->ccf_str);
    TREE_CONSTANT (addr) = 1;
  
    return addr;
*************** darwin_function_section (tree decl, enum
*** 3851,3861 ****
    if (decl && DECL_SECTION_NAME (decl) != NULL)
      return get_named_section (decl, NULL, 0);
  
!   /* We always put unlikely executed stuff in the cold section.  */
    if (freq == NODE_FREQUENCY_UNLIKELY_EXECUTED)
      return (use_coal) ? darwin_sections[text_cold_coal_section]
  		      : darwin_sections[text_cold_section];
  
    /* If we have LTO *and* feedback information, then let LTO handle
       the function ordering, it makes a better job (for normal, hot,
       startup and exit - hence the bailout for cold above).  */
--- 3954,3975 ----
    if (decl && DECL_SECTION_NAME (decl) != NULL)
      return get_named_section (decl, NULL, 0);
  
!   /* We always put unlikely executed stuff in the cold section; we have to put
!      this ahead of the global init section, since partitioning within a section
!      breaks some assumptions made in the DWARF handling.  */
    if (freq == NODE_FREQUENCY_UNLIKELY_EXECUTED)
      return (use_coal) ? darwin_sections[text_cold_coal_section]
  		      : darwin_sections[text_cold_section];
  
+   /* Intercept functions in global init; these are placed in separate sections.
+      FIXME: there should be some neater way to do this, FIXME we should be able
+      to partition within a section.  */
+   if (DECL_NAME (decl)
+       && (startswith (IDENTIFIER_POINTER (DECL_NAME (decl)), "_GLOBAL__sub_I")
+ 	  || startswith (IDENTIFIER_POINTER (DECL_NAME (decl)),
+ 			 "__static_initialization_and_destruction")))
+     return  darwin_sections[static_init_section];
+ 
    /* If we have LTO *and* feedback information, then let LTO handle
       the function ordering, it makes a better job (for normal, hot,
       startup and exit - hence the bailout for cold above).  */
diff -Nrcpad gcc-12.3.0/gcc/config/darwin.h gcc-12.4.0/gcc/config/darwin.h
*** gcc-12.3.0/gcc/config/darwin.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/darwin.h	Thu Jun 20 08:08:06 2024
*************** extern GTY(()) int darwin_ms_struct;
*** 133,142 ****
     cases where these driver opts are used multiple times, or to control
     operations on more than one command (e.g. dynamiclib).  These are handled
     specially and we then add %<xxxx specs for the commands that _don't_ need
!    them.  NOTE: the order of 'shared' and 'dynamiclib' is significant, hence
!    they are placed out of alphabetical order at the start.  Likewise, we keep
!    a couple of cases where a negative option originally appeared after the
!    positive alternate, potentially overriding it.
     When we report an error with %e, it seems necessary to strip the option
     before doing so, otherwise it survives to the cc1 command line (%e doesn't
     appear to abort the program before this).
--- 133,141 ----
     cases where these driver opts are used multiple times, or to control
     operations on more than one command (e.g. dynamiclib).  These are handled
     specially and we then add %<xxxx specs for the commands that _don't_ need
!    them.
!    We keep a couple of cases where a negative option originally appeared after
!    the positive alternate, potentially overriding it.
     When we report an error with %e, it seems necessary to strip the option
     before doing so, otherwise it survives to the cc1 command line (%e doesn't
     appear to abort the program before this).
*************** extern GTY(()) int darwin_ms_struct;
*** 147,155 ****
  
  #undef SUBTARGET_DRIVER_SELF_SPECS
  #define SUBTARGET_DRIVER_SELF_SPECS					\
!   "%{shared:%{!dynamiclib:-dynamiclib}} %<shared",			\
!   "%{static:%{dynamic|dynamiclib:%econflicting code generation switches}}",\
!   "%{dynamiclib:-Xlinker -dylib \
       %{allowable_client*:-Xlinker -allowable_client -Xlinker %*} \
         %<allowable_client* \
       %{bundle_loader*: %<bundle_loader* \
--- 146,154 ----
  
  #undef SUBTARGET_DRIVER_SELF_SPECS
  #define SUBTARGET_DRIVER_SELF_SPECS					\
!   "%{static|fapple-kext|mkernel:%{shared|dynamic|dynamiclib: \
!      %econflicting code generation switches}}",\
!   "%{shared|dynamiclib:-Xlinker -dylib \
       %{allowable_client*:-Xlinker -allowable_client -Xlinker %*} \
         %<allowable_client* \
       %{bundle_loader*: %<bundle_loader* \
*************** extern GTY(()) int darwin_ms_struct;
*** 167,174 ****
         %e-keep_private_externs not allowed with -dynamiclib} \
       %{private_bundle: %<private_bundle \
         %e-private_bundle not allowed with -dynamiclib} \
!     }",									\
!   "%{!dynamiclib: \
       %{bundle_loader*:-Xlinker -bundle_loader -Xlinker %*} \
         %<bundle_loader* \
       %{client_name*:-Xlinker -client_name -Xlinker %*} \
--- 166,173 ----
         %e-keep_private_externs not allowed with -dynamiclib} \
       %{private_bundle: %<private_bundle \
         %e-private_bundle not allowed with -dynamiclib} \
!     }",							\
!   "%{!dynamiclib:%{!shared: \
       %{bundle_loader*:-Xlinker -bundle_loader -Xlinker %*} \
         %<bundle_loader* \
       %{client_name*:-Xlinker -client_name -Xlinker %*} \
*************** extern GTY(()) int darwin_ms_struct;
*** 183,195 ****
         %<keep_private_externs \
       %{private_bundle:-Xlinker -private_bundle} \
         %<private_bundle \
!     }",									\
    "%{all_load:-Xlinker -all_load} %<all_load",				\
    "%{arch_errors_fatal:-Xlinker -arch_errors_fatal} \
      %<arch_errors_fatal",						\
    "%{bind_at_load:-Xlinker -bind_at_load} %<bind_at_load",		\
!   "%{bundle:%{!dynamiclib:-Xlinker -bundle; \
!               :%e-bundle not allowed with -dynamiclib}}",	\
    "%{dead_strip:-Xlinker -dead_strip} %<dead_strip",			\
    "%{dylib_file*:-Xlinker -dylib_file -Xlinker %*} %<dylib_file*",	\
    "%{dylinker:-Xlinker -dylinker} %<dylinker",				\
--- 182,195 ----
         %<keep_private_externs \
       %{private_bundle:-Xlinker -private_bundle} \
         %<private_bundle \
!     }}",									\
    "%{all_load:-Xlinker -all_load} %<all_load",				\
    "%{arch_errors_fatal:-Xlinker -arch_errors_fatal} \
      %<arch_errors_fatal",						\
    "%{bind_at_load:-Xlinker -bind_at_load} %<bind_at_load",		\
!   "%{bundle:%{!dynamiclib:%{!shared: -Xlinker -bundle; \
! 			    :%e-bundle not allowed with -shared}; \
! 	      :%e-bundle not allowed with -dynamiclib}}",		\
    "%{dead_strip:-Xlinker -dead_strip} %<dead_strip",			\
    "%{dylib_file*:-Xlinker -dylib_file -Xlinker %*} %<dylib_file*",	\
    "%{dylinker:-Xlinker -dylinker} %<dylinker",				\
*************** extern GTY(()) int darwin_ms_struct;
*** 277,282 ****
--- 277,290 ----
  #define DARWIN_RDYNAMIC "%{rdynamic:%nrdynamic is not supported}"
  #endif
  
+ #if LD64_HAS_PLATFORM_VERSION
+ #define DARWIN_PLATFORM_ID \
+   "%{mmacosx-version-min=*: -platform_version macos %* 0.0} "
+ #else
+ #define DARWIN_PLATFORM_ID \
+   "%{mmacosx-version-min=*:-macosx_version_min %*} "
+ #endif
+ 
  /* Code built with mdynamic-no-pic does not support PIE/PIC, so  we disallow
     these combinations; we also ensure that the no_pie option is passed to
     ld64 on system versions that default to PIE when mdynamic-no-pic is given.
*************** extern GTY(()) int darwin_ms_struct;
*** 294,300 ****
     %:version-compare(>= 10.7 mmacosx-version-min= -no_pie) }"
  
  #define DARWIN_CC1_SPEC							\
!   "%<dynamic %<dynamiclib %<force_cpusubtype_ALL "
  
  #define SUBSUBTARGET_OVERRIDE_OPTIONS					\
    do {									\
--- 302,308 ----
     %:version-compare(>= 10.7 mmacosx-version-min= -no_pie) }"
  
  #define DARWIN_CC1_SPEC							\
!   "%<dynamic %<force_cpusubtype_ALL %<multiply_defined* %<dynamiclib"
  
  #define SUBSUBTARGET_OVERRIDE_OPTIONS					\
    do {									\
*************** extern GTY(()) int darwin_ms_struct;
*** 352,363 ****
      LINK_PLUGIN_SPEC \
      "%{flto*:%<fcompare-debug*} \
       %{flto} %{fno-lto} %{flto=*} \
!     %l " LINK_COMPRESS_DEBUG_SPEC \
     "%X %{s} %{t} %{Z} %{u*} \
      %{e*} %{r} \
      %{o*}%{!o:-o a.out} \
      %{!r:%{!nostdlib:%{!nostartfiles:%S}}} \
!     %{L*} %(link_libgcc) %o \
      %{!r:%{!nostdlib:%{!nodefaultlibs:\
        %{fprofile-arcs|fprofile-generate*|coverage:-lgcov} \
        %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1): \
--- 360,375 ----
      LINK_PLUGIN_SPEC \
      "%{flto*:%<fcompare-debug*} \
       %{flto} %{fno-lto} %{flto=*} \
!     %l " \
!     DARWIN_PLATFORM_ID \
!     LINK_COMPRESS_DEBUG_SPEC \
     "%X %{s} %{t} %{Z} %{u*} \
      %{e*} %{r} \
      %{o*}%{!o:-o a.out} \
      %{!r:%{!nostdlib:%{!nostartfiles:%S}}} \
!     %{L*} %(link_libgcc) \
!     %{!r:%{!nostdlib:%{!nodefaultlibs: " DARWIN_WEAK_CRTS "}}} \
!     %o \
      %{!r:%{!nostdlib:%{!nodefaultlibs:\
        %{fprofile-arcs|fprofile-generate*|coverage:-lgcov} \
        %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1): \
*************** extern GTY(()) int darwin_ms_struct;
*** 371,385 ****
        %(link_ssp) \
        %:version-compare(>< 10.6 10.7 mmacosx-version-min= -ld10-uwfef) \
        %(link_gcc_c_sequence) \
!       %{!nodefaultexport:%{dylib|dynamiclib|bundle: \
! 	%:version-compare(>= 10.11 asm_macosx_version_min= -U) \
! 	%:version-compare(>= 10.11 asm_macosx_version_min= ___emutls_get_address) \
! 	%:version-compare(>= 10.11 asm_macosx_version_min= -exported_symbol) \
! 	%:version-compare(>= 10.11 asm_macosx_version_min= ___emutls_get_address) \
! 	%:version-compare(>= 10.11 asm_macosx_version_min= -U) \
! 	%:version-compare(>= 10.11 asm_macosx_version_min= ___emutls_register_common) \
! 	%:version-compare(>= 10.11 asm_macosx_version_min= -exported_symbol) \
! 	%:version-compare(>= 10.11 asm_macosx_version_min= ___emutls_register_common) \
        }} \
      }}}\
      %{!r:%{!nostdlib:%{!nostartfiles:%E}}} %{T*} %{F*} "\
--- 383,397 ----
        %(link_ssp) \
        %:version-compare(>< 10.6 10.7 mmacosx-version-min= -ld10-uwfef) \
        %(link_gcc_c_sequence) \
!       %{!nodefaultexport: \
! 	%{%:version-compare(>= 10.11 asm_macosx_version_min= -U): \
! 	   ___emutls_get_address -exported_symbol ___emutls_get_address \
! 	  -U ___emutls_register_common \
! 	  -exported_symbol ___emutls_register_common \
! 	  -U ___gcc_nested_func_ptr_created \
! 	  -exported_symbol ___gcc_nested_func_ptr_created \
! 	  -U ___gcc_nested_func_ptr_deleted \
! 	  -exported_symbol ___gcc_nested_func_ptr_deleted \
        }} \
      }}}\
      %{!r:%{!nostdlib:%{!nostartfiles:%E}}} %{T*} %{F*} "\
*************** extern GTY(()) int darwin_ms_struct;
*** 449,456 ****
     %{force_cpusubtype_ALL:-arch %(darwin_arch)} \
     %{!force_cpusubtype_ALL:-arch %(darwin_subarch)} "\
     LINK_SYSROOT_SPEC \
!   "%{mmacosx-version-min=*:-macosx_version_min %*} \
!    %{!multiply_defined*:%{shared-libgcc: \
       %:version-compare(< 10.5 mmacosx-version-min= -multiply_defined) \
       %:version-compare(< 10.5 mmacosx-version-min= suppress) }} \
     %{sectalign*} %{sectcreate*} %{sectobjectsymbols*}  %{sectorder*} \
--- 461,467 ----
     %{force_cpusubtype_ALL:-arch %(darwin_arch)} \
     %{!force_cpusubtype_ALL:-arch %(darwin_subarch)} "\
     LINK_SYSROOT_SPEC \
!    "%{!multiply_defined*:%{shared-libgcc: \
       %:version-compare(< 10.5 mmacosx-version-min= -multiply_defined) \
       %:version-compare(< 10.5 mmacosx-version-min= suppress) }} \
     %{sectalign*} %{sectcreate*} %{sectobjectsymbols*}  %{sectorder*} \
*************** extern GTY(()) int darwin_ms_struct;
*** 506,528 ****
  #undef REAL_LIBGCC_SPEC
  #define REAL_LIBGCC_SPEC \
  "%{static-libgcc|static:						  \
!     %:version-compare(!> 10.6 mmacosx-version-min= -lgcc_eh)		  \
!     %:version-compare(>= 10.6 mmacosx-version-min= -lemutls_w);		  \
     shared-libgcc|fexceptions|fobjc-exceptions|fgnu-runtime:		  \
      %:version-compare(!> 10.11 mmacosx-version-min= -lgcc_s.1.1)	  \
-     %:version-compare(>= 10.11 mmacosx-version-min= -lemutls_w)		  \
      %:version-compare(!> 10.3.9 mmacosx-version-min= -lgcc_eh)		  \
      %:version-compare(>< 10.3.9 10.5 mmacosx-version-min= -lgcc_s.10.4)   \
!     %:version-compare(>< 10.5 10.6 mmacosx-version-min= -lgcc_s.10.5);	  \
!    : -lemutls_w								  \
    } -lgcc "
  
  /* We specify crt0.o as -lcrt0.o so that ld will search the library path.  */
  
  #undef  STARTFILE_SPEC
  #define STARTFILE_SPEC							    \
! "%{dynamiclib: %(darwin_dylib1) %{fgnu-tm: -lcrttms.o}}			   \
!  %{!dynamiclib:%{bundle:%(darwin_bundle1)}				    \
       %{!bundle:%{pg:%{static:-lgcrt0.o}					    \
                       %{!static:%{object:-lgcrt0.o}			    \
                                 %{!object:%{preload:-lgcrt0.o}		    \
--- 517,544 ----
  #undef REAL_LIBGCC_SPEC
  #define REAL_LIBGCC_SPEC \
  "%{static-libgcc|static:						  \
!     %:version-compare(!> 10.6 mmacosx-version-min= -lgcc_eh);		  \
     shared-libgcc|fexceptions|fobjc-exceptions|fgnu-runtime:		  \
      %:version-compare(!> 10.11 mmacosx-version-min= -lgcc_s.1.1)	  \
      %:version-compare(!> 10.3.9 mmacosx-version-min= -lgcc_eh)		  \
      %:version-compare(>< 10.3.9 10.5 mmacosx-version-min= -lgcc_s.10.4)   \
!     %:version-compare(>< 10.5 10.6 mmacosx-version-min= -lgcc_s.10.5)	  \
    } -lgcc "
  
+ #define DARWIN_WEAK_CRTS \
+ "%{static-libgcc|static:						  \
+    %:version-compare(>= 10.6 mmacosx-version-min= -lemutls_w) ; \
+    shared-libgcc|fexceptions|fobjc-exceptions|fgnu-runtime: \
+      %:version-compare(>= 10.11 mmacosx-version-min= -lemutls_w) ; \
+    : -lemutls_w \
+   }"
+ 
  /* We specify crt0.o as -lcrt0.o so that ld will search the library path.  */
  
  #undef  STARTFILE_SPEC
  #define STARTFILE_SPEC							    \
! "%{dynamiclib|shared: %(darwin_dylib1) %{fgnu-tm: -lcrttms.o}}		   \
!  %{!dynamiclib:%{!shared:%{bundle:%(darwin_bundle1)}			    \
       %{!bundle:%{pg:%{static:-lgcrt0.o}					    \
                       %{!static:%{object:-lgcrt0.o}			    \
                                 %{!object:%{preload:-lgcrt0.o}		    \
*************** extern GTY(()) int darwin_ms_struct;
*** 533,540 ****
                        %{!static:%{object:-lcrt0.o}			    \
                                  %{!object:%{preload:-lcrt0.o}		    \
                                    %{!preload: %(darwin_crt1)		    \
! 					      %(darwin_crt2)}}}}}}	    \
!  %(darwin_crt3) %<dynamiclib "
  
  /* We want a destructor last in the list.  */
  #define TM_DESTRUCTOR "%{fgnu-tm: -lcrttme.o}"
--- 549,556 ----
                        %{!static:%{object:-lcrt0.o}			    \
                                  %{!object:%{preload:-lcrt0.o}		    \
                                    %{!preload: %(darwin_crt1)		    \
! 					      %(darwin_crt2)}}}}}}}	    \
!  %(darwin_crt3) "
  
  /* We want a destructor last in the list.  */
  #define TM_DESTRUCTOR "%{fgnu-tm: -lcrttme.o}"
*************** int darwin_label_is_anonymous_local_objc
*** 844,850 ****
         else if (xname[0] == '+' || xname[0] == '-')			     \
           fprintf (FILE, "\"%s\"", xname);				     \
         else if (darwin_label_is_anonymous_local_objc_name (xname))	     \
!          fprintf (FILE, "L%s", xname);					     \
         else if (xname[0] != '"' && name_needs_quotes (xname))		     \
  	 asm_fprintf (FILE, "\"%U%s\"", xname);				     \
         else								     \
--- 860,868 ----
         else if (xname[0] == '+' || xname[0] == '-')			     \
           fprintf (FILE, "\"%s\"", xname);				     \
         else if (darwin_label_is_anonymous_local_objc_name (xname))	     \
! 	fprintf (FILE, "%c%s", flag_next_runtime ? 'L' : 'l', xname);	     \
!        else if (strncmp (xname, "__anon_cfstring", 15) == 0)		     \
! 	fprintf (FILE, "L%s", xname);					     \
         else if (xname[0] != '"' && name_needs_quotes (xname))		     \
  	 asm_fprintf (FILE, "\"%U%s\"", xname);				     \
         else								     \
*************** enum machopic_addr_class {
*** 1103,1109 ****
  
  #undef ASM_PREFERRED_EH_DATA_FORMAT
  #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL)  \
!   (((CODE) == 2 && (GLOBAL) == 1) \
     ? (DW_EH_PE_pcrel | DW_EH_PE_indirect | DW_EH_PE_sdata4) : \
       ((CODE) == 1 || (GLOBAL) == 0) ? DW_EH_PE_pcrel : DW_EH_PE_absptr)
  
--- 1121,1127 ----
  
  #undef ASM_PREFERRED_EH_DATA_FORMAT
  #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL)  \
!   (((CODE) == 2 && (GLOBAL) == 1) || ((CODE) == 0 && (GLOBAL) == 1) \
     ? (DW_EH_PE_pcrel | DW_EH_PE_indirect | DW_EH_PE_sdata4) : \
       ((CODE) == 1 || (GLOBAL) == 0) ? DW_EH_PE_pcrel : DW_EH_PE_absptr)
  
diff -Nrcpad gcc-12.3.0/gcc/config/darwin.opt gcc-12.4.0/gcc/config/darwin.opt
*** gcc-12.3.0/gcc/config/darwin.opt	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/darwin.opt	Thu Jun 20 08:08:06 2024
*************** fapple-kext
*** 33,38 ****
--- 33,42 ----
  Target C++ Var(flag_apple_kext)
  Generate code for darwin loadable kernel extensions.
  
+ fconstant-cfstrings
+ ObjC ObjC++ Alias(mconstant-cfstrings)
+ Generate compile-time CFString objects.
+ 
  iframework
  Target RejectNegative C ObjC C++ ObjC++ Joined Separate
  -iframework <dir>	Add <dir> to the end of the system framework include path.
diff -Nrcpad gcc-12.3.0/gcc/config/i386/amxtileintrin.h gcc-12.4.0/gcc/config/i386/amxtileintrin.h
*** gcc-12.3.0/gcc/config/i386/amxtileintrin.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/amxtileintrin.h	Thu Jun 20 08:08:06 2024
*************** extern __inline void
*** 39,52 ****
  __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  _tile_loadconfig (const void *__config)
  {
!   __asm__ volatile ("ldtilecfg\t%X0" :: "m" (*((const void **)__config)));
  }
  
  extern __inline void
  __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  _tile_storeconfig (void *__config)
  {
!   __asm__ volatile ("sttilecfg\t%X0" : "=m" (*((void **)__config)));
  }
  
  extern __inline void
--- 39,52 ----
  __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  _tile_loadconfig (const void *__config)
  {
!   __builtin_ia32_ldtilecfg (__config);
  }
  
  extern __inline void
  __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  _tile_storeconfig (void *__config)
  {
!   __builtin_ia32_sttilecfg (__config);
  }
  
  extern __inline void
diff -Nrcpad gcc-12.3.0/gcc/config/i386/cygwin.h gcc-12.4.0/gcc/config/i386/cygwin.h
*** gcc-12.3.0/gcc/config/i386/cygwin.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/cygwin.h	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 57,63 ****
  
  #undef ENDFILE_SPEC
  #define ENDFILE_SPEC \
!   "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s}\
     %{!shared:%:if-exists(default-manifest.o%s)}\
     %{fvtable-verify=none:%s; \
      fvtable-verify=preinit:vtv_end.o%s; \
--- 57,63 ----
  
  #undef ENDFILE_SPEC
  #define ENDFILE_SPEC \
!   "%{mdaz-ftz:crtfastmath.o%s;Ofast|ffast-math|funsafe-math-optimizations:%{!mno-daz-ftz:crtfastmath.o%s}} \
     %{!shared:%:if-exists(default-manifest.o%s)}\
     %{fvtable-verify=none:%s; \
      fvtable-verify=preinit:vtv_end.o%s; \
diff -Nrcpad gcc-12.3.0/gcc/config/i386/darwin.h gcc-12.4.0/gcc/config/i386/darwin.h
*** gcc-12.3.0/gcc/config/i386/darwin.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/darwin.h	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 110,116 ****
  
  #undef ENDFILE_SPEC
  #define ENDFILE_SPEC \
!   "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s} \
     %{mpc32:crtprec32.o%s} \
     %{mpc64:crtprec64.o%s} \
     %{mpc80:crtprec80.o%s}" TM_DESTRUCTOR
--- 110,116 ----
  
  #undef ENDFILE_SPEC
  #define ENDFILE_SPEC \
!   "%{mdaz-ftz:crtfastmath.o%s;Ofast|ffast-math|funsafe-math-optimizations:%{!mno-daz-ftz:crtfastmath.o%s}} \
     %{mpc32:crtprec32.o%s} \
     %{mpc64:crtprec64.o%s} \
     %{mpc80:crtprec80.o%s}" TM_DESTRUCTOR
diff -Nrcpad gcc-12.3.0/gcc/config/i386/gnu-user-common.h gcc-12.4.0/gcc/config/i386/gnu-user-common.h
*** gcc-12.3.0/gcc/config/i386/gnu-user-common.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/gnu-user-common.h	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 47,53 ****
  
  /* Similar to standard GNU userspace, but adding -ffast-math support.  */
  #define GNU_USER_TARGET_MATHFILE_SPEC \
!   "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s} \
     %{mpc32:crtprec32.o%s} \
     %{mpc64:crtprec64.o%s} \
     %{mpc80:crtprec80.o%s}"
--- 47,53 ----
  
  /* Similar to standard GNU userspace, but adding -ffast-math support.  */
  #define GNU_USER_TARGET_MATHFILE_SPEC \
!   "%{mdaz-ftz:crtfastmath.o%s;Ofast|ffast-math|funsafe-math-optimizations:%{!mno-daz-ftz:crtfastmath.o%s}} \
     %{mpc32:crtprec32.o%s} \
     %{mpc64:crtprec64.o%s} \
     %{mpc80:crtprec80.o%s}"
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386-builtin.def gcc-12.4.0/gcc/config/i386/i386-builtin.def
*** gcc-12.3.0/gcc/config/i386/i386-builtin.def	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386-builtin.def	Thu Jun 20 08:08:06 2024
*************** BDESC (OPTION_MASK_ISA_XSAVES | OPTION_M
*** 126,131 ****
--- 126,135 ----
  BDESC (OPTION_MASK_ISA_XSAVES | OPTION_MASK_ISA_64BIT, 0, CODE_FOR_nothing, "__builtin_ia32_xrstors64", IX86_BUILTIN_XRSTORS64, UNKNOWN, (int) VOID_FTYPE_PVOID_INT64)
  BDESC (OPTION_MASK_ISA_XSAVEC | OPTION_MASK_ISA_64BIT, 0, CODE_FOR_nothing, "__builtin_ia32_xsavec64", IX86_BUILTIN_XSAVEC64, UNKNOWN, (int) VOID_FTYPE_PVOID_INT64)
  
+ /* LDFILECFG and STFILECFG.  */
+ BDESC (OPTION_MASK_ISA_64BIT, OPTION_MASK_ISA2_AMX_TILE, CODE_FOR_nothing, "__builtin_ia32_ldtilecfg", IX86_BUILTIN_LDTILECFG, UNKNOWN, (int) VOID_FTYPE_PCVOID)
+ BDESC (OPTION_MASK_ISA_64BIT, OPTION_MASK_ISA2_AMX_TILE, CODE_FOR_nothing, "__builtin_ia32_sttilecfg", IX86_BUILTIN_STTILECFG, UNKNOWN, (int) VOID_FTYPE_PVOID)
+ 
  /* SSE */
  BDESC (OPTION_MASK_ISA_SSE, 0, CODE_FOR_movv4sf_internal, "__builtin_ia32_storeups", IX86_BUILTIN_STOREUPS, UNKNOWN, (int) VOID_FTYPE_PFLOAT_V4SF)
  BDESC (OPTION_MASK_ISA_SSE, 0, CODE_FOR_sse_movntv4sf, "__builtin_ia32_movntps", IX86_BUILTIN_MOVNTPS, UNKNOWN, (int) VOID_FTYPE_PFLOAT_V4SF)
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386-builtins.cc gcc-12.4.0/gcc/config/i386/i386-builtins.cc
*** gcc-12.3.0/gcc/config/i386/i386-builtins.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386-builtins.cc	Thu Jun 20 08:08:06 2024
*************** ix86_vectorize_builtin_gather (const_tre
*** 1790,1796 ****
  	  ? !TARGET_USE_GATHER_2PARTS
  	  : (known_eq (TYPE_VECTOR_SUBPARTS (mem_vectype), 4u)
  	     ? !TARGET_USE_GATHER_4PARTS
! 	     : !TARGET_USE_GATHER)))
      return NULL_TREE;
  
    if ((TREE_CODE (index_type) != INTEGER_TYPE
--- 1790,1796 ----
  	  ? !TARGET_USE_GATHER_2PARTS
  	  : (known_eq (TYPE_VECTOR_SUBPARTS (mem_vectype), 4u)
  	     ? !TARGET_USE_GATHER_4PARTS
! 	     : !TARGET_USE_GATHER_8PARTS)))
      return NULL_TREE;
  
    if ((TREE_CODE (index_type) != INTEGER_TYPE
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386-expand.cc gcc-12.4.0/gcc/config/i386/i386-expand.cc
*** gcc-12.3.0/gcc/config/i386/i386-expand.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386-expand.cc	Thu Jun 20 08:08:06 2024
*************** ix86_expand_move (machine_mode mode, rtx
*** 350,355 ****
--- 350,372 ----
  
      default:
        break;
+ 
+     case SUBREG:
+       /* As not all values in XFmode are representable in real_value,
+ 	 we might be called with unfoldable SUBREGs of constants.  */
+       if (mode == XFmode
+ 	  && CONSTANT_P (SUBREG_REG (op1))
+ 	  && can_create_pseudo_p ())
+ 	{
+ 	  machine_mode imode = GET_MODE (SUBREG_REG (op1));
+ 	  rtx r = force_const_mem (imode, SUBREG_REG (op1));
+ 	  if (r)
+ 	    r = validize_mem (r);
+ 	  else
+ 	    r = force_reg (imode, SUBREG_REG (op1));
+ 	  op1 = simplify_gen_subreg (mode, r, imode, SUBREG_BYTE (op1));
+ 	}
+       break;
      }
  
    if ((flag_pic || MACHOPIC_INDIRECT)
*************** ix86_expand_builtin (tree exp, rtx targe
*** 13275,13280 ****
--- 13292,13316 ----
  	emit_insn (pat);
        return 0;
  
+     case IX86_BUILTIN_LDTILECFG:
+     case IX86_BUILTIN_STTILECFG:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       op0 = expand_normal (arg0);
+ 
+       if (!address_operand (op0, VOIDmode))
+ 	{
+ 	  op0 = convert_memory_address (Pmode, op0);
+ 	  op0 = copy_addr_to_reg (op0);
+ 	}
+       op0 = gen_rtx_MEM (XImode, op0);
+       if (fcode == IX86_BUILTIN_LDTILECFG)
+ 	icode = CODE_FOR_ldtilecfg;
+       else
+ 	icode = CODE_FOR_sttilecfg;
+       pat = GEN_FCN (icode) (op0);
+       emit_insn (pat);
+       return 0;
+ 
      case IX86_BUILTIN_LLWPCB:
        arg0 = CALL_EXPR_ARG (exp, 0);
        op0 = expand_normal (arg0);
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386-features.cc gcc-12.4.0/gcc/config/i386/i386-features.cc
*** gcc-12.3.0/gcc/config/i386/i386-features.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386-features.cc	Thu Jun 20 08:08:06 2024
*************** general_scalar_chain::convert_op (rtx *o
*** 871,890 ****
      }
    else if (MEM_P (*op))
      {
        rtx tmp = gen_reg_rtx (GET_MODE (*op));
  
!       /* Handle movabs.  */
        if (!memory_operand (*op, GET_MODE (*op)))
  	{
  	  rtx tmp2 = gen_reg_rtx (GET_MODE (*op));
  
- 	  emit_insn_before (gen_rtx_SET (tmp2, *op), insn);
  	  *op = tmp2;
  	}
  
!       emit_insn_before (gen_rtx_SET (gen_rtx_SUBREG (vmode, tmp, 0),
! 				     gen_gpr_to_xmm_move_src (vmode, *op)),
! 			insn);
        *op = gen_rtx_SUBREG (vmode, tmp, 0);
  
        if (dump_file)
--- 871,906 ----
      }
    else if (MEM_P (*op))
      {
+       rtx_insn* eh_insn, *movabs = NULL;
        rtx tmp = gen_reg_rtx (GET_MODE (*op));
  
!       /* Emit MOVABS to load from a 64-bit absolute address to a GPR.  */
        if (!memory_operand (*op, GET_MODE (*op)))
  	{
  	  rtx tmp2 = gen_reg_rtx (GET_MODE (*op));
+ 	  movabs = emit_insn_before (gen_rtx_SET (tmp2, *op), insn);
  
  	  *op = tmp2;
  	}
  
!       eh_insn
! 	= emit_insn_before (gen_rtx_SET (gen_rtx_SUBREG (vmode, tmp, 0),
! 					 gen_gpr_to_xmm_move_src (vmode, *op)),
! 			    insn);
! 
!       if (cfun->can_throw_non_call_exceptions)
! 	{
! 	  /* Handle REG_EH_REGION note.  */
! 	  rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
! 	  if (note)
! 	    {
! 	      if (movabs)
! 		eh_insn = movabs;
! 	      control_flow_insns.safe_push (eh_insn);
! 	      add_reg_note (eh_insn, REG_EH_REGION, XEXP (note, 0));
! 	    }
! 	}
! 
        *op = gen_rtx_SUBREG (vmode, tmp, 0);
  
        if (dump_file)
*************** convert_scalars_to_vector (bool timode_p
*** 1681,1686 ****
--- 1697,1703 ----
  {
    basic_block bb;
    int converted_insns = 0;
+   auto_vec<rtx_insn *> control_flow_insns;
  
    bitmap_obstack_initialize (NULL);
    const machine_mode cand_mode[3] = { SImode, DImode, TImode };
*************** convert_scalars_to_vector (bool timode_p
*** 1759,1764 ****
--- 1776,1786 ----
  	    fprintf (dump_file, "Chain #%d conversion is not profitable\n",
  		     chain->chain_id);
  
+ 	rtx_insn* iter_insn;
+ 	unsigned int ii;
+ 	FOR_EACH_VEC_ELT (chain->control_flow_insns, ii, iter_insn)
+ 	  control_flow_insns.safe_push (iter_insn);
+ 
  	delete chain;
        }
  
*************** convert_scalars_to_vector (bool timode_p
*** 1826,1831 ****
--- 1848,1871 ----
  		  DECL_INCOMING_RTL (parm) = gen_rtx_SUBREG (TImode, r, 0);
  	      }
  	  }
+ 
+       if (!control_flow_insns.is_empty ())
+ 	{
+ 	  free_dominance_info (CDI_DOMINATORS);
+ 
+ 	  unsigned int i;
+ 	  rtx_insn* insn;
+ 	  FOR_EACH_VEC_ELT (control_flow_insns, i, insn)
+ 	    if (control_flow_insn_p (insn))
+ 	      {
+ 		/* Split the block after insn.  There will be a fallthru
+ 		   edge, which is OK so we keep it.  We have to create
+ 		   the exception edges ourselves.  */
+ 		bb = BLOCK_FOR_INSN (insn);
+ 		split_block (bb, insn);
+ 		rtl_make_eh_edge (NULL, bb, BB_END (bb));
+ 	      }
+ 	}
      }
  
    return 0;
*************** public:
*** 1875,1882 ****
    /* opt_pass methods: */
    virtual bool gate (function *)
      {
!       return TARGET_AVX && TARGET_VZEROUPPER
! 	&& flag_expensive_optimizations && !optimize_size;
      }
  
    virtual unsigned int execute (function *)
--- 1915,1921 ----
    /* opt_pass methods: */
    virtual bool gate (function *)
      {
!       return TARGET_AVX && TARGET_VZEROUPPER;
      }
  
    virtual unsigned int execute (function *)
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386-features.h gcc-12.4.0/gcc/config/i386/i386-features.h
*** gcc-12.3.0/gcc/config/i386/i386-features.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386-features.h	Thu Jun 20 08:08:06 2024
*************** class scalar_chain
*** 147,152 ****
--- 147,153 ----
    bitmap defs;
    /* Registers used in both vector and sclar modes.  */
    bitmap defs_conv;
+   auto_vec<rtx_insn *> control_flow_insns;
  
    void build (bitmap candidates, unsigned insn_uid);
    virtual int compute_convert_gain () = 0;
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386-options.cc gcc-12.4.0/gcc/config/i386/i386-options.cc
*** gcc-12.3.0/gcc/config/i386/i386-options.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386-options.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 137,142 ****
--- 137,147 ----
  #define m_GOLDMONT_PLUS (HOST_WIDE_INT_1U<<PROCESSOR_GOLDMONT_PLUS)
  #define m_TREMONT (HOST_WIDE_INT_1U<<PROCESSOR_TREMONT)
  #define m_INTEL (HOST_WIDE_INT_1U<<PROCESSOR_INTEL)
+ /* Gather Data Sampling / CVE-2022-40982 / INTEL-SA-00828.
+    Software mitigation.  */
+ #define m_GDS (m_SKYLAKE | m_SKYLAKE_AVX512 | m_CANNONLAKE \
+ 	       | m_ICELAKE_CLIENT | m_ICELAKE_SERVER | m_CASCADELAKE \
+ 	       | m_TIGERLAKE | m_COOPERLAKE | m_ROCKETLAKE)
  
  #define m_GEODE (HOST_WIDE_INT_1U<<PROCESSOR_GEODE)
  #define m_K6 (HOST_WIDE_INT_1U<<PROCESSOR_K6)
*************** ix86_valid_target_attribute_tree (tree f
*** 1378,1384 ****
        if (option_strings[IX86_FUNCTION_SPECIFIC_TUNE])
  	opts->x_ix86_tune_string
  	  = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_TUNE]);
!       else if (orig_tune_defaulted)
  	opts->x_ix86_tune_string = NULL;
  
        /* If fpmath= is not set, and we now have sse2 on 32-bit, use it.  */
--- 1383,1393 ----
        if (option_strings[IX86_FUNCTION_SPECIFIC_TUNE])
  	opts->x_ix86_tune_string
  	  = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_TUNE]);
!       /* If we have explicit arch string and no tune string specified, set
! 	 tune_string to NULL and later it will be overriden by arch_string
! 	 so target clones can get proper optimization.  */
!       else if (option_strings[IX86_FUNCTION_SPECIFIC_ARCH]
! 	       || orig_tune_defaulted)
  	opts->x_ix86_tune_string = NULL;
  
        /* If fpmath= is not set, and we now have sse2 on 32-bit, use it.  */
*************** parse_mtune_ctrl_str (struct gcc_options
*** 1696,1715 ****
            curr_feature_string++;
            clear = true;
          }
!       for (i = 0; i < X86_TUNE_LAST; i++)
!         {
!           if (!strcmp (curr_feature_string, ix86_tune_feature_names[i]))
!             {
!               ix86_tune_features[i] = !clear;
!               if (dump)
!                 fprintf (stderr, "Explicitly %s feature %s\n",
!                          clear ? "clear" : "set", ix86_tune_feature_names[i]);
!               break;
!             }
!         }
!       if (i == X86_TUNE_LAST)
! 	error ("unknown parameter to option %<-mtune-ctrl%>: %s",
! 	       clear ? curr_feature_string - 1 : curr_feature_string);
        curr_feature_string = next_feature_string;
      }
    while (curr_feature_string);
--- 1705,1750 ----
            curr_feature_string++;
            clear = true;
          }
! 
!       if (!strcmp (curr_feature_string, "use_gather"))
! 	{
! 	  ix86_tune_features[X86_TUNE_USE_GATHER_2PARTS] = !clear;
! 	  ix86_tune_features[X86_TUNE_USE_GATHER_4PARTS] = !clear;
! 	  ix86_tune_features[X86_TUNE_USE_GATHER_8PARTS] = !clear;
! 	  if (dump)
! 	    fprintf (stderr, "Explicitly %s features use_gather_2parts,"
! 		     " use_gather_4parts, use_gather_8parts\n",
! 		     clear ? "clear" : "set");
! 
! 	}
!       else if (!strcmp (curr_feature_string, "use_scatter"))
! 	{
! 	  ix86_tune_features[X86_TUNE_USE_SCATTER_2PARTS] = !clear;
! 	  ix86_tune_features[X86_TUNE_USE_SCATTER_4PARTS] = !clear;
! 	  ix86_tune_features[X86_TUNE_USE_SCATTER_8PARTS] = !clear;
! 	  if (dump)
! 	    fprintf (stderr, "Explicitly %s features use_scatter_2parts,"
! 		     " use_scatter_4parts, use_scatter_8parts\n",
! 		     clear ? "clear" : "set");
! 	}
!       else
! 	{
! 	  for (i = 0; i < X86_TUNE_LAST; i++)
! 	    {
! 	      if (!strcmp (curr_feature_string, ix86_tune_feature_names[i]))
! 		{
! 		  ix86_tune_features[i] = !clear;
! 		  if (dump)
! 		    fprintf (stderr, "Explicitly %s feature %s\n",
! 			     clear ? "clear" : "set", ix86_tune_feature_names[i]);
! 		  break;
! 		}
! 	    }
! 
! 	  if (i == X86_TUNE_LAST)
! 	    error ("unknown parameter to option %<-mtune-ctrl%>: %s",
! 		   clear ? curr_feature_string - 1 : curr_feature_string);
! 	}
        curr_feature_string = next_feature_string;
      }
    while (curr_feature_string);
*************** ix86_option_override_internal (bool main
*** 2676,2682 ****
      sorry ("%<-mcall-ms2sysv-xlogues%> isn%'t currently supported with SEH");
  
    if (!(opts_set->x_target_flags & MASK_VZEROUPPER)
!       && TARGET_EMIT_VZEROUPPER)
      opts->x_target_flags |= MASK_VZEROUPPER;
    if (!(opts_set->x_target_flags & MASK_STV))
      opts->x_target_flags |= MASK_STV;
--- 2711,2719 ----
      sorry ("%<-mcall-ms2sysv-xlogues%> isn%'t currently supported with SEH");
  
    if (!(opts_set->x_target_flags & MASK_VZEROUPPER)
!       && TARGET_EMIT_VZEROUPPER
!       && flag_expensive_optimizations
!       && !optimize_size)
      opts->x_target_flags |= MASK_VZEROUPPER;
    if (!(opts_set->x_target_flags & MASK_STV))
      opts->x_target_flags |= MASK_STV;
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386.cc gcc-12.4.0/gcc/config/i386/i386.cc
*** gcc-12.3.0/gcc/config/i386/i386.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386.cc	Thu Jun 20 08:08:06 2024
*************** ix86_elim_entry_set_got (rtx reg)
*** 8268,8277 ****
        rtx pat = PATTERN (c_insn);
        if (GET_CODE (pat) == PARALLEL)
  	{
! 	  rtx vec = XVECEXP (pat, 0, 0);
! 	  if (GET_CODE (vec) == SET
! 	      && XINT (XEXP (vec, 1), 1) == UNSPEC_SET_GOT
! 	      && REGNO (XEXP (vec, 0)) == REGNO (reg))
  	    delete_insn (c_insn);
  	}
      }
--- 8268,8278 ----
        rtx pat = PATTERN (c_insn);
        if (GET_CODE (pat) == PARALLEL)
  	{
! 	  rtx set = XVECEXP (pat, 0, 0);
! 	  if (GET_CODE (set) == SET
! 	      && GET_CODE (SET_SRC (set)) == UNSPEC
! 	      && XINT (SET_SRC (set), 1) == UNSPEC_SET_GOT
! 	      && REGNO (SET_DEST (set)) == REGNO (reg))
  	    delete_insn (c_insn);
  	}
      }
*************** output_pic_addr_const (FILE *file, rtx x
*** 12238,12245 ****
        assemble_name (asm_out_file, buf);
        break;
  
!     case CONST_INT:
!       fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
        break;
  
      case CONST:
--- 12239,12246 ----
        assemble_name (asm_out_file, buf);
        break;
  
!     CASE_CONST_SCALAR_INT:
!       output_addr_const (file, x);
        break;
  
      case CONST:
*************** ix86_avx_u128_mode_needed (rtx_insn *ins
*** 14416,14423 ****
  	 modes wider than 256 bits.  It's only safe to issue a
  	 vzeroupper if all SSE registers are clobbered.  */
        const function_abi &abi = insn_callee_abi (insn);
!       if (!hard_reg_set_subset_p (reg_class_contents[SSE_REGS],
! 				  abi.mode_clobbers (V4DImode)))
  	return AVX_U128_ANY;
  
        return AVX_U128_CLEAN;
--- 14417,14428 ----
  	 modes wider than 256 bits.  It's only safe to issue a
  	 vzeroupper if all SSE registers are clobbered.  */
        const function_abi &abi = insn_callee_abi (insn);
!       /* Should be safe to issue an vzeroupper before sibling_call_p.
! 	 Also there not mode_exit for sibling_call, so there could be
! 	 missing vzeroupper for that.  */
!       if (!(SIBLING_CALL_P (insn)
! 	    || hard_reg_set_subset_p (reg_class_contents[SSE_REGS],
! 				      abi.mode_clobbers (V4DImode))))
  	return AVX_U128_ANY;
  
        return AVX_U128_CLEAN;
*************** ix86_avx_u128_mode_after (int mode, rtx_
*** 14555,14561 ****
        bool avx_upper_reg_found = false;
        note_stores (insn, ix86_check_avx_upper_stores, &avx_upper_reg_found);
  
!       return avx_upper_reg_found ? AVX_U128_DIRTY : AVX_U128_CLEAN;
      }
  
    /* Otherwise, return current mode.  Remember that if insn
--- 14560,14578 ----
        bool avx_upper_reg_found = false;
        note_stores (insn, ix86_check_avx_upper_stores, &avx_upper_reg_found);
  
!       if (avx_upper_reg_found)
! 	return AVX_U128_DIRTY;
! 
!       /* If the function desn't clobber any sse registers or only clobber
! 	 128-bit part, Then vzeroupper isn't issued before the function exit.
! 	 the status not CLEAN but ANY after the function.  */
!       const function_abi &abi = insn_callee_abi (insn);
!       if (!(SIBLING_CALL_P (insn)
! 	    || hard_reg_set_subset_p (reg_class_contents[SSE_REGS],
! 				      abi.mode_clobbers (V4DImode))))
! 	return AVX_U128_ANY;
! 
!       return  AVX_U128_CLEAN;
      }
  
    /* Otherwise, return current mode.  Remember that if insn
*************** ix86_gimple_fold_builtin (gimple_stmt_it
*** 18396,18403 ****
  	      tree itype = GET_MODE_INNER (TYPE_MODE (type)) == E_SFmode
  		? intSI_type_node : intDI_type_node;
  	      type = get_same_sized_vectype (itype, type);
- 	      arg2 = gimple_build (&stmts, VIEW_CONVERT_EXPR, type, arg2);
  	    }
  	  tree zero_vec = build_zero_cst (type);
  	  tree cmp_type = truth_type_for (type);
  	  tree cmp = gimple_build (&stmts, LT_EXPR, cmp_type, arg2, zero_vec);
--- 18413,18422 ----
  	      tree itype = GET_MODE_INNER (TYPE_MODE (type)) == E_SFmode
  		? intSI_type_node : intDI_type_node;
  	      type = get_same_sized_vectype (itype, type);
  	    }
+ 	  else
+ 	    type = signed_type_for (type);
+ 	  arg2 = gimple_build (&stmts, VIEW_CONVERT_EXPR, type, arg2);
  	  tree zero_vec = build_zero_cst (type);
  	  tree cmp_type = truth_type_for (type);
  	  tree cmp = gimple_build (&stmts, LT_EXPR, cmp_type, arg2, zero_vec);
*************** ix86_vectorize_builtin_scatter (const_tr
*** 18935,18941 ****
        ? !TARGET_USE_SCATTER_2PARTS
        : (known_eq (TYPE_VECTOR_SUBPARTS (vectype), 4u)
  	 ? !TARGET_USE_SCATTER_4PARTS
! 	 : !TARGET_USE_SCATTER))
      return NULL_TREE;
  
    if ((TREE_CODE (index_type) != INTEGER_TYPE
--- 18954,18960 ----
        ? !TARGET_USE_SCATTER_2PARTS
        : (known_eq (TYPE_VECTOR_SUBPARTS (vectype), 4u)
  	 ? !TARGET_USE_SCATTER_4PARTS
! 	 : !TARGET_USE_SCATTER_8PARTS))
      return NULL_TREE;
  
    if ((TREE_CODE (index_type) != INTEGER_TYPE
*************** x86_function_profiler (FILE *file, int l
*** 21513,21519 ****
    if (TARGET_64BIT)
      {
  #ifndef NO_PROFILE_COUNTERS
!       fprintf (file, "\tleaq\t%sP%d(%%rip),%%r11\n", LPREFIX, labelno);
  #endif
  
        if (!TARGET_PECOFF)
--- 21532,21541 ----
    if (TARGET_64BIT)
      {
  #ifndef NO_PROFILE_COUNTERS
!       if (ASSEMBLER_DIALECT == ASM_INTEL)
! 	fprintf (file, "\tlea\tr11, %sP%d[rip]\n", LPREFIX, labelno);
!       else
! 	fprintf (file, "\tleaq\t%sP%d(%%rip), %%r11\n", LPREFIX, labelno);
  #endif
  
        if (!TARGET_PECOFF)
*************** x86_function_profiler (FILE *file, int l
*** 21524,21535 ****
  	      /* NB: R10 is caller-saved.  Although it can be used as a
  		 static chain register, it is preserved when calling
  		 mcount for nested functions.  */
! 	      fprintf (file, "1:\tmovabsq\t$%s, %%r10\n\tcall\t*%%r10\n",
! 		       mcount_name);
  	      break;
  	    case CM_LARGE_PIC:
  #ifdef NO_PROFILE_COUNTERS
! 	      fprintf (file, "1:\tmovabsq\t$_GLOBAL_OFFSET_TABLE_-1b, %%r11\n");
  	      fprintf (file, "\tleaq\t1b(%%rip), %%r10\n");
  	      fprintf (file, "\taddq\t%%r11, %%r10\n");
  	      fprintf (file, "\tmovabsq\t$%s@PLTOFF, %%r11\n", mcount_name);
--- 21546,21574 ----
  	      /* NB: R10 is caller-saved.  Although it can be used as a
  		 static chain register, it is preserved when calling
  		 mcount for nested functions.  */
! 	      if (ASSEMBLER_DIALECT == ASM_INTEL)
! 		fprintf (file, "1:\tmovabs\tr10, OFFSET FLAT:%s\n"
! 			       "\tcall\tr10\n", mcount_name);
! 	      else
! 		fprintf (file, "1:\tmovabsq\t$%s, %%r10\n\tcall\t*%%r10\n",
! 			 mcount_name);
  	      break;
  	    case CM_LARGE_PIC:
  #ifdef NO_PROFILE_COUNTERS
! 	      if (ASSEMBLER_DIALECT == ASM_INTEL)
! 		{
! 		  fprintf (file, "1:movabs\tr11, "
! 				 "OFFSET FLAT:_GLOBAL_OFFSET_TABLE_-1b\n");
! 		  fprintf (file, "\tlea\tr10, 1b[rip]\n");
! 		  fprintf (file, "\tadd\tr10, r11\n");
! 		  fprintf (file, "\tmovabs\tr11, OFFSET FLAT:%s@PLTOFF\n",
! 			   mcount_name);
! 		  fprintf (file, "\tadd\tr10, r11\n");
! 		  fprintf (file, "\tcall\tr10\n");
! 		  break;
! 		}
! 	      fprintf (file,
! 		       "1:\tmovabsq\t$_GLOBAL_OFFSET_TABLE_-1b, %%r11\n");
  	      fprintf (file, "\tleaq\t1b(%%rip), %%r10\n");
  	      fprintf (file, "\taddq\t%%r11, %%r10\n");
  	      fprintf (file, "\tmovabsq\t$%s@PLTOFF, %%r11\n", mcount_name);
*************** x86_function_profiler (FILE *file, int l
*** 21541,21547 ****
  	      break;
  	    case CM_SMALL_PIC:
  	    case CM_MEDIUM_PIC:
! 	      fprintf (file, "1:\tcall\t*%s@GOTPCREL(%%rip)\n", mcount_name);
  	      break;
  	    default:
  	      x86_print_call_or_nop (file, mcount_name);
--- 21580,21590 ----
  	      break;
  	    case CM_SMALL_PIC:
  	    case CM_MEDIUM_PIC:
! 	      if (ASSEMBLER_DIALECT == ASM_INTEL)
! 		fprintf (file, "1:\tcall\t[QWORD PTR %s@GOTPCREL[rip]]\n",
! 			 mcount_name);
! 	      else
! 		fprintf (file, "1:\tcall\t*%s@GOTPCREL(%%rip)\n", mcount_name);
  	      break;
  	    default:
  	      x86_print_call_or_nop (file, mcount_name);
*************** x86_function_profiler (FILE *file, int l
*** 21554,21576 ****
    else if (flag_pic)
      {
  #ifndef NO_PROFILE_COUNTERS
!       fprintf (file, "\tleal\t%sP%d@GOTOFF(%%ebx),%%" PROFILE_COUNT_REGISTER "\n",
! 	       LPREFIX, labelno);
  #endif
!       fprintf (file, "1:\tcall\t*%s@GOT(%%ebx)\n", mcount_name);
      }
    else
      {
  #ifndef NO_PROFILE_COUNTERS
!       fprintf (file, "\tmovl\t$%sP%d,%%" PROFILE_COUNT_REGISTER "\n",
! 	       LPREFIX, labelno);
  #endif
        x86_print_call_or_nop (file, mcount_name);
      }
  
    if (flag_record_mcount
! 	|| lookup_attribute ("fentry_section",
!                                 DECL_ATTRIBUTES (current_function_decl)))
      {
        const char *sname = "__mcount_loc";
  
--- 21597,21633 ----
    else if (flag_pic)
      {
  #ifndef NO_PROFILE_COUNTERS
!       if (ASSEMBLER_DIALECT == ASM_INTEL)
! 	fprintf (file,
! 		 "\tlea\t" PROFILE_COUNT_REGISTER ", %sP%d@GOTOFF[ebx]\n",
! 		 LPREFIX, labelno);
!       else
! 	fprintf (file,
! 		 "\tleal\t%sP%d@GOTOFF(%%ebx), %%" PROFILE_COUNT_REGISTER "\n",
! 		 LPREFIX, labelno);
  #endif
!       if (ASSEMBLER_DIALECT == ASM_INTEL)
! 	fprintf (file, "1:\tcall\t[DWORD PTR %s@GOT[ebx]]\n", mcount_name);
!       else
! 	fprintf (file, "1:\tcall\t*%s@GOT(%%ebx)\n", mcount_name);
      }
    else
      {
  #ifndef NO_PROFILE_COUNTERS
!       if (ASSEMBLER_DIALECT == ASM_INTEL)
! 	fprintf (file,
! 		 "\tmov\t" PROFILE_COUNT_REGISTER ", OFFSET FLAT:%sP%d\n",
! 		 LPREFIX, labelno);
!       else
! 	fprintf (file, "\tmovl\t$%sP%d, %%" PROFILE_COUNT_REGISTER "\n",
! 		 LPREFIX, labelno);
  #endif
        x86_print_call_or_nop (file, mcount_name);
      }
  
    if (flag_record_mcount
!       || lookup_attribute ("fentry_section",
! 			   DECL_ATTRIBUTES (current_function_decl)))
      {
        const char *sname = "__mcount_loc";
  
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386.h gcc-12.4.0/gcc/config/i386/i386.h
*** gcc-12.3.0/gcc/config/i386/i386.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386.h	Thu Jun 20 08:08:06 2024
*************** extern unsigned char ix86_tune_features[
*** 398,407 ****
  	ix86_tune_features[X86_TUNE_USE_GATHER_4PARTS]
  #define TARGET_USE_SCATTER_4PARTS \
  	ix86_tune_features[X86_TUNE_USE_SCATTER_4PARTS]
! #define TARGET_USE_GATHER \
! 	ix86_tune_features[X86_TUNE_USE_GATHER]
! #define TARGET_USE_SCATTER \
! 	ix86_tune_features[X86_TUNE_USE_SCATTER]
  #define TARGET_FUSE_CMP_AND_BRANCH_32 \
  	ix86_tune_features[X86_TUNE_FUSE_CMP_AND_BRANCH_32]
  #define TARGET_FUSE_CMP_AND_BRANCH_64 \
--- 398,407 ----
  	ix86_tune_features[X86_TUNE_USE_GATHER_4PARTS]
  #define TARGET_USE_SCATTER_4PARTS \
  	ix86_tune_features[X86_TUNE_USE_SCATTER_4PARTS]
! #define TARGET_USE_GATHER_8PARTS \
! 	ix86_tune_features[X86_TUNE_USE_GATHER_8PARTS]
! #define TARGET_USE_SCATTER_8PARTS \
! 	ix86_tune_features[X86_TUNE_USE_SCATTER_8PARTS]
  #define TARGET_FUSE_CMP_AND_BRANCH_32 \
  	ix86_tune_features[X86_TUNE_FUSE_CMP_AND_BRANCH_32]
  #define TARGET_FUSE_CMP_AND_BRANCH_64 \
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386.md gcc-12.4.0/gcc/config/i386/i386.md
*** gcc-12.3.0/gcc/config/i386/i386.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386.md	Thu Jun 20 08:08:06 2024
***************
*** 329,334 ****
--- 329,338 ----
  
    ;; For HRESET support
    UNSPECV_HRESET
+ 
+   ;; For AMX-TILE
+   UNSPECV_LDTILECFG
+   UNSPECV_STTILECFG
  ])
  
  ;; Constants to represent rounding modes in the ROUND instruction
***************
*** 2398,2404 ****
  	      (clobber (reg:CC FLAGS_REG))])]
  {
    int shift = ctz_hwi (UINTVAL (operands[1]));
!   operands[1] = gen_int_mode (UINTVAL (operands[1]) >> shift, DImode);
    operands[2] = gen_int_mode (shift, QImode);
  })
  
--- 2402,2411 ----
  	      (clobber (reg:CC FLAGS_REG))])]
  {
    int shift = ctz_hwi (UINTVAL (operands[1]));
!   rtx op1 = gen_int_mode (UINTVAL (operands[1]) >> shift, DImode);
!   if (ix86_endbr_immediate_operand (op1, VOIDmode))
!     FAIL;
!   operands[1] = op1;
    operands[2] = gen_int_mode (shift, QImode);
  })
  
***************
*** 3582,3590 ****
  ;; Possible store forwarding (partial memory) stall in alternatives 4, 6 and 7.
  (define_insn "*movdf_internal"
    [(set (match_operand:DF 0 "nonimmediate_operand"
!     "=Yf*f,m   ,Yf*f,?r ,!o,?*r ,!o,!o,?r,?m,?r,?r,v,v,v,m,*x,*x,*x,m ,r ,v,r  ,o ,r  ,m")
  	(match_operand:DF 1 "general_operand"
!     "Yf*fm,Yf*f,G   ,roF,r ,*roF,*r,F ,rm,rC,C ,F ,C,v,m,v,C ,*x,m ,*x,v,r ,roF,rF,rmF,rC"))]
    "!(MEM_P (operands[0]) && MEM_P (operands[1]))
     && (lra_in_progress || reload_completed
         || !CONST_DOUBLE_P (operands[1])
--- 3589,3597 ----
  ;; Possible store forwarding (partial memory) stall in alternatives 4, 6 and 7.
  (define_insn "*movdf_internal"
    [(set (match_operand:DF 0 "nonimmediate_operand"
!     "=Yf*f,m   ,Yf*f,?r ,!o,?*r ,!o,!o,?r,?m,?r,?r,v,v,v,m,*x,*x,*x,m ,?r,?v,r  ,o ,r  ,m")
  	(match_operand:DF 1 "general_operand"
!     "Yf*fm,Yf*f,G   ,roF,r ,*roF,*r,F ,rm,rC,C ,F ,C,v,m,v,C ,*x,m ,*x, v, r,roF,rF,rmF,rC"))]
    "!(MEM_P (operands[0]) && MEM_P (operands[1]))
     && (lra_in_progress || reload_completed
         || !CONST_DOUBLE_P (operands[1])
***************
*** 14160,14166 ****
  			   (const_int 1)
  			   (and:SI
  			     (match_operand:SI 2 "register_operand")
! 			     (match_operand 3 "const_int_operand")))])
  		      (label_ref (match_operand 4))
  		      (pc)))
     (clobber (reg:CC FLAGS_REG))]
--- 14167,14174 ----
  			   (const_int 1)
  			   (and:SI
  			     (match_operand:SI 2 "register_operand")
! 			     (match_operand 3 "const_int_operand")))
! 			 (const_int 0)])
  		      (label_ref (match_operand 4))
  		      (pc)))
     (clobber (reg:CC FLAGS_REG))]
***************
*** 17066,17073 ****
    "! TARGET_POPCNT"
  {
    rtx scratch = gen_reg_rtx (QImode);
  
!   emit_insn (gen_parityhi2_cmp (operands[1]));
  
    ix86_expand_setcc (scratch, ORDERED,
  		     gen_rtx_REG (CCmode, FLAGS_REG), const0_rtx);
--- 17074,17083 ----
    "! TARGET_POPCNT"
  {
    rtx scratch = gen_reg_rtx (QImode);
+   rtx tmp = gen_reg_rtx (HImode);
  
!   emit_move_insn (tmp, operands[1]);
!   emit_insn (gen_parityhi2_cmp (tmp));
  
    ix86_expand_setcc (scratch, ORDERED,
  		     gen_rtx_REG (CCmode, FLAGS_REG), const0_rtx);
***************
*** 23986,23991 ****
--- 23996,24021 ----
    DONE;
  })
  
+ (define_insn "ldtilecfg"
+   [(unspec_volatile [(match_operand:XI 0 "memory_operand" "m")]
+             UNSPECV_LDTILECFG)]
+   "TARGET_AMX_TILE"
+   "ldtilecfg\t%0"
+   [(set_attr "type" "other")
+    (set_attr "prefix" "maybe_evex")
+    (set_attr "memory" "load")
+    (set_attr "mode" "XI")])
+ 
+ (define_insn "sttilecfg"
+   [(set (match_operand:XI 0 "memory_operand" "=m")
+         (unspec_volatile:XI [(const_int 0)] UNSPECV_STTILECFG))]
+   "TARGET_AMX_TILE"
+   "sttilecfg\t%0"
+   [(set_attr "type" "other")
+    (set_attr "prefix" "maybe_evex")
+    (set_attr "memory" "store")
+    (set_attr "mode" "XI")])
+ 
  (include "mmx.md")
  (include "sse.md")
  (include "sync.md")
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386.opt gcc-12.4.0/gcc/config/i386/i386.opt
*** gcc-12.3.0/gcc/config/i386/i386.opt	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386.opt	Thu Jun 20 08:08:06 2024
*************** mpc80
*** 420,425 ****
--- 420,429 ----
  Target RejectNegative
  Set 80387 floating-point precision to 80-bit.
  
+ mdaz-ftz
+ Target
+ Set the FTZ and DAZ Flags.
+ 
  mpreferred-stack-boundary=
  Target RejectNegative Joined UInteger Var(ix86_preferred_stack_boundary_arg)
  Attempt to keep stack aligned to this power of 2.
*************** Do not use GOT to access external symbol
*** 1214,1216 ****
--- 1218,1228 ----
  -param=x86-stlf-window-ninsns=
  Target Joined UInteger Var(x86_stlf_window_ninsns) Init(64) Param
  Instructions number above which STFL stall penalty can be compensated.
+ 
+ mgather
+ Target Alias(mtune-ctrl=, use_gather, ^use_gather)
+ Enable vectorization for gather instruction.
+ 
+ mscatter
+ Target Alias(mtune-ctrl=, use_scatter, ^use_scatter)
+ Enable vectorization for scatter instruction.
diff -Nrcpad gcc-12.3.0/gcc/config/i386/mingw32.h gcc-12.4.0/gcc/config/i386/mingw32.h
*** gcc-12.3.0/gcc/config/i386/mingw32.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/mingw32.h	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 197,203 ****
  
  #undef ENDFILE_SPEC
  #define ENDFILE_SPEC \
!   "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s} \
     %{!shared:%:if-exists(default-manifest.o%s)}\
     %{fvtable-verify=none:%s; \
      fvtable-verify=preinit:vtv_end.o%s; \
--- 197,203 ----
  
  #undef ENDFILE_SPEC
  #define ENDFILE_SPEC \
!   "%{mdaz-ftz:crtfastmath.o%s;Ofast|ffast-math|funsafe-math-optimizations:%{!mno-daz-ftz:crtfastmath.o%s}} \
     %{!shared:%:if-exists(default-manifest.o%s)}\
     %{fvtable-verify=none:%s; \
      fvtable-verify=preinit:vtv_end.o%s; \
diff -Nrcpad gcc-12.3.0/gcc/config/i386/mmx.md gcc-12.4.0/gcc/config/i386/mmx.md
*** gcc-12.3.0/gcc/config/i386/mmx.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/mmx.md	Thu Jun 20 08:08:06 2024
***************
*** 1211,1217 ****
  	    (match_operand:V2SF 1 "register_operand") 0)
  	  (match_dup 2)))]
    "TARGET_MMX_WITH_SSE"
!   "operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (V2SFmode)-1);")
  
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  ;;
--- 1211,1220 ----
  	    (match_operand:V2SF 1 "register_operand") 0)
  	  (match_dup 2)))]
    "TARGET_MMX_WITH_SSE"
! {
!   operands[1] = force_reg (V2SFmode, operands[1]);
!   operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (V2SFmode)-1);
! })
  
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  ;;
diff -Nrcpad gcc-12.3.0/gcc/config/i386/sse.md gcc-12.4.0/gcc/config/i386/sse.md
*** gcc-12.3.0/gcc/config/i386/sse.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/sse.md	Thu Jun 20 08:08:06 2024
***************
*** 1411,1422 ****
  })
  
  (define_insn "*<avx512>_load<mode>_mask"
!   [(set (match_operand:VI12_AVX512VL 0 "register_operand" "=v")
! 	(vec_merge:VI12_AVX512VL
! 	  (unspec:VI12_AVX512VL
! 	    [(match_operand:VI12_AVX512VL 1 "memory_operand" "m")]
  	    UNSPEC_MASKLOAD)
! 	  (match_operand:VI12_AVX512VL 2 "nonimm_or_0_operand" "0C")
  	  (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")))]
    "TARGET_AVX512BW"
    "vmovdqu<ssescalarsize>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"
--- 1411,1422 ----
  })
  
  (define_insn "*<avx512>_load<mode>_mask"
!   [(set (match_operand:VI12HF_AVX512VL 0 "register_operand" "=v")
! 	(vec_merge:VI12HF_AVX512VL
! 	  (unspec:VI12HF_AVX512VL
! 	    [(match_operand:VI12HF_AVX512VL 1 "memory_operand" "m")]
  	    UNSPEC_MASKLOAD)
! 	  (match_operand:VI12HF_AVX512VL 2 "nonimm_or_0_operand" "0C")
  	  (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")))]
    "TARGET_AVX512BW"
    "vmovdqu<ssescalarsize>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"
***************
*** 1425,1433 ****
     (set_attr "mode" "<sseinsnmode>")])
  
  (define_insn_and_split "*<avx512>_load<mode>"
!   [(set (match_operand:VI12_AVX512VL 0 "register_operand" "=v")
! 	(unspec:VI12_AVX512VL
! 	  [(match_operand:VI12_AVX512VL 1 "memory_operand" "m")]
  	  UNSPEC_MASKLOAD))]
    "TARGET_AVX512BW"
    "#"
--- 1425,1433 ----
     (set_attr "mode" "<sseinsnmode>")])
  
  (define_insn_and_split "*<avx512>_load<mode>"
!   [(set (match_operand:VI12HF_AVX512VL 0 "register_operand" "=v")
! 	(unspec:VI12HF_AVX512VL
! 	  [(match_operand:VI12HF_AVX512VL 1 "memory_operand" "m")]
  	  UNSPEC_MASKLOAD))]
    "TARGET_AVX512BW"
    "#"
***************
*** 1554,1560 ****
     (set_attr "prefix" "evex")
     (set_attr "mode" "<sseinsnmode>")])
  
! (define_insn "<avx512>_store<mode>_mask"
    [(set (match_operand:V48_AVX512VL 0 "memory_operand" "=m")
  	(vec_merge:V48_AVX512VL
  	  (match_operand:V48_AVX512VL 1 "register_operand" "v")
--- 1554,1560 ----
     (set_attr "prefix" "evex")
     (set_attr "mode" "<sseinsnmode>")])
  
! (define_insn "*<avx512>_store<mode>_mask"
    [(set (match_operand:V48_AVX512VL 0 "memory_operand" "=m")
  	(vec_merge:V48_AVX512VL
  	  (match_operand:V48_AVX512VL 1 "register_operand" "v")
***************
*** 1582,1588 ****
     (set_attr "memory" "store")
     (set_attr "mode" "<sseinsnmode>")])
  
! (define_insn "<avx512>_store<mode>_mask"
    [(set (match_operand:VI12HF_AVX512VL 0 "memory_operand" "=m")
  	(vec_merge:VI12HF_AVX512VL
  	  (match_operand:VI12HF_AVX512VL 1 "register_operand" "v")
--- 1582,1588 ----
     (set_attr "memory" "store")
     (set_attr "mode" "<sseinsnmode>")])
  
! (define_insn "*<avx512>_store<mode>_mask"
    [(set (match_operand:VI12HF_AVX512VL 0 "memory_operand" "=m")
  	(vec_merge:VI12HF_AVX512VL
  	  (match_operand:VI12HF_AVX512VL 1 "register_operand" "v")
***************
*** 4848,4854 ****
  	    (match_operand:VF1_AVX2 1 "register_operand") 0)
  	  (match_dup 2)))]
    "TARGET_SSE2"
!   "operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (<MODE>mode)-1);")
  
  ;; Also define scalar versions.  These are used for abs, neg, and
  ;; conditional move.  Using subregs into vector modes causes register
--- 4848,4857 ----
  	    (match_operand:VF1_AVX2 1 "register_operand") 0)
  	  (match_dup 2)))]
    "TARGET_SSE2"
! {
!   operands[1] = force_reg (<MODE>mode, operands[1]);
!   operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (<MODE>mode)-1);
! })
  
  ;; Also define scalar versions.  These are used for abs, neg, and
  ;; conditional move.  Using subregs into vector modes causes register
***************
*** 6318,6323 ****
--- 6321,6334 ----
  	[(UNSPEC_COMPLEX_FMA_PAIR "fmaddc")
  	 (UNSPEC_COMPLEX_FCMA_PAIR "fcmaddc")])
  
+ (define_int_attr int_comm
+ 	[(UNSPEC_COMPLEX_FMA "")
+ 	 (UNSPEC_COMPLEX_FMA_PAIR "")
+ 	 (UNSPEC_COMPLEX_FCMA "")
+ 	 (UNSPEC_COMPLEX_FCMA_PAIR "")
+ 	 (UNSPEC_COMPLEX_FMUL "%")
+ 	 (UNSPEC_COMPLEX_FCMUL "")])
+ 
  (define_int_attr conj_op
  	[(UNSPEC_COMPLEX_FMA "")
  	 (UNSPEC_COMPLEX_FCMA "_conj")
***************
*** 6431,6437 ****
  (define_insn "fma_<complexopname>_<mode><sdc_maskz_name><round_name>"
    [(set (match_operand:VF_AVX512FP16VL 0 "register_operand" "=&v")
  	(unspec:VF_AVX512FP16VL
! 	  [(match_operand:VF_AVX512FP16VL 1 "<round_nimm_predicate>" "%v")
  	   (match_operand:VF_AVX512FP16VL 2 "<round_nimm_predicate>" "<round_constraint>")
  	   (match_operand:VF_AVX512FP16VL 3 "<round_nimm_predicate>" "0")]
  	   UNSPEC_COMPLEX_F_C_MA))]
--- 6442,6448 ----
  (define_insn "fma_<complexopname>_<mode><sdc_maskz_name><round_name>"
    [(set (match_operand:VF_AVX512FP16VL 0 "register_operand" "=&v")
  	(unspec:VF_AVX512FP16VL
! 	  [(match_operand:VF_AVX512FP16VL 1 "<round_nimm_predicate>" "<int_comm>v")
  	   (match_operand:VF_AVX512FP16VL 2 "<round_nimm_predicate>" "<round_constraint>")
  	   (match_operand:VF_AVX512FP16VL 3 "<round_nimm_predicate>" "0")]
  	   UNSPEC_COMPLEX_F_C_MA))]
***************
*** 6495,6501 ****
  (define_insn "fma_<complexpairopname>_<mode>_pair"
   [(set (match_operand:VF1_AVX512VL 0 "register_operand" "=&v")
         (unspec:VF1_AVX512VL
! 	 [(match_operand:VF1_AVX512VL 1 "vector_operand" "%v")
  	  (match_operand:VF1_AVX512VL 2 "bcst_vector_operand" "vmBr")
  	  (match_operand:VF1_AVX512VL 3 "vector_operand" "0")]
  	  UNSPEC_COMPLEX_F_C_MA_PAIR))]
--- 6506,6512 ----
  (define_insn "fma_<complexpairopname>_<mode>_pair"
   [(set (match_operand:VF1_AVX512VL 0 "register_operand" "=&v")
         (unspec:VF1_AVX512VL
! 	 [(match_operand:VF1_AVX512VL 1 "vector_operand" "<int_comm>v")
  	  (match_operand:VF1_AVX512VL 2 "bcst_vector_operand" "vmBr")
  	  (match_operand:VF1_AVX512VL 3 "vector_operand" "0")]
  	  UNSPEC_COMPLEX_F_C_MA_PAIR))]
***************
*** 6562,6568 ****
    [(set (match_operand:VF_AVX512FP16VL 0 "register_operand" "=&v")
  	(vec_merge:VF_AVX512FP16VL
  	  (unspec:VF_AVX512FP16VL
! 	    [(match_operand:VF_AVX512FP16VL 1 "nonimmediate_operand" "%v")
  	     (match_operand:VF_AVX512FP16VL 2 "nonimmediate_operand" "<round_constraint>")
  	     (match_operand:VF_AVX512FP16VL 3 "register_operand" "0")]
  	     UNSPEC_COMPLEX_F_C_MA)
--- 6573,6579 ----
    [(set (match_operand:VF_AVX512FP16VL 0 "register_operand" "=&v")
  	(vec_merge:VF_AVX512FP16VL
  	  (unspec:VF_AVX512FP16VL
! 	    [(match_operand:VF_AVX512FP16VL 1 "nonimmediate_operand" "<int_comm>v")
  	     (match_operand:VF_AVX512FP16VL 2 "nonimmediate_operand" "<round_constraint>")
  	     (match_operand:VF_AVX512FP16VL 3 "register_operand" "0")]
  	     UNSPEC_COMPLEX_F_C_MA)
***************
*** 6586,6592 ****
  (define_insn "<avx512>_<complexopname>_<mode><maskc_name><round_name>"
    [(set (match_operand:VF_AVX512FP16VL 0 "register_operand" "=&v")
  	  (unspec:VF_AVX512FP16VL
! 	    [(match_operand:VF_AVX512FP16VL 1 "nonimmediate_operand" "%v")
  	     (match_operand:VF_AVX512FP16VL 2 "nonimmediate_operand" "<round_constraint>")]
  	     UNSPEC_COMPLEX_F_C_MUL))]
    "TARGET_AVX512FP16 && <round_mode512bit_condition>"
--- 6597,6603 ----
  (define_insn "<avx512>_<complexopname>_<mode><maskc_name><round_name>"
    [(set (match_operand:VF_AVX512FP16VL 0 "register_operand" "=&v")
  	  (unspec:VF_AVX512FP16VL
! 	    [(match_operand:VF_AVX512FP16VL 1 "nonimmediate_operand" "<int_comm>v")
  	     (match_operand:VF_AVX512FP16VL 2 "nonimmediate_operand" "<round_constraint>")]
  	     UNSPEC_COMPLEX_F_C_MUL))]
    "TARGET_AVX512FP16 && <round_mode512bit_condition>"
***************
*** 16350,16356 ****
  	     (match_dup 4))]
  	     UNSPEC_BLENDV))]
  {
!   if (INTVAL (operands[5]) == 1)
      std::swap (operands[1], operands[2]);
    operands[3] = gen_lowpart (<MODE>mode, operands[3]);
  })
--- 16361,16367 ----
  	     (match_dup 4))]
  	     UNSPEC_BLENDV))]
  {
!   if (INTVAL (operands[5]) == 5)
      std::swap (operands[1], operands[2]);
    operands[3] = gen_lowpart (<MODE>mode, operands[3]);
  })
***************
*** 16380,16386 ****
  	     (match_dup 4))]
  	     UNSPEC_BLENDV))]
  {
!   if (INTVAL (operands[5]) == 1)
      std::swap (operands[1], operands[2]);
  })
  
--- 16391,16397 ----
  	     (match_dup 4))]
  	     UNSPEC_BLENDV))]
  {
!   if (INTVAL (operands[5]) == 5)
      std::swap (operands[1], operands[2]);
  })
  
***************
*** 25973,25989 ****
    "TARGET_AVX")
  
  (define_expand "maskload<mode><avx512fmaskmodelower>"
!   [(set (match_operand:V48H_AVX512VL 0 "register_operand")
! 	(vec_merge:V48H_AVX512VL
! 	  (match_operand:V48H_AVX512VL 1 "memory_operand")
  	  (match_dup 0)
  	  (match_operand:<avx512fmaskmode> 2 "register_operand")))]
    "TARGET_AVX512F")
  
  (define_expand "maskload<mode><avx512fmaskmodelower>"
!   [(set (match_operand:VI12_AVX512VL 0 "register_operand")
! 	(vec_merge:VI12_AVX512VL
! 	  (match_operand:VI12_AVX512VL 1 "memory_operand")
  	  (match_dup 0)
  	  (match_operand:<avx512fmaskmode> 2 "register_operand")))]
    "TARGET_AVX512BW")
--- 25984,26004 ----
    "TARGET_AVX")
  
  (define_expand "maskload<mode><avx512fmaskmodelower>"
!   [(set (match_operand:V48_AVX512VL 0 "register_operand")
! 	(vec_merge:V48_AVX512VL
! 	  (unspec:V48_AVX512VL
! 	    [(match_operand:V48_AVX512VL 1 "memory_operand")]
! 	    UNSPEC_MASKLOAD)
  	  (match_dup 0)
  	  (match_operand:<avx512fmaskmode> 2 "register_operand")))]
    "TARGET_AVX512F")
  
  (define_expand "maskload<mode><avx512fmaskmodelower>"
!   [(set (match_operand:VI12HF_AVX512VL 0 "register_operand")
! 	(vec_merge:VI12HF_AVX512VL
! 	  (unspec:VI12HF_AVX512VL
! 	    [(match_operand:VI12HF_AVX512VL 1 "memory_operand")]
! 	    UNSPEC_MASKLOAD)
  	  (match_dup 0)
  	  (match_operand:<avx512fmaskmode> 2 "register_operand")))]
    "TARGET_AVX512BW")
***************
*** 25998,26018 ****
    "TARGET_AVX")
  
  (define_expand "maskstore<mode><avx512fmaskmodelower>"
!   [(set (match_operand:V48H_AVX512VL 0 "memory_operand")
! 	(vec_merge:V48H_AVX512VL
! 	  (match_operand:V48H_AVX512VL 1 "register_operand")
! 	  (match_dup 0)
! 	  (match_operand:<avx512fmaskmode> 2 "register_operand")))]
    "TARGET_AVX512F")
  
  (define_expand "maskstore<mode><avx512fmaskmodelower>"
!   [(set (match_operand:VI12_AVX512VL 0 "memory_operand")
! 	(vec_merge:VI12_AVX512VL
! 	  (match_operand:VI12_AVX512VL 1 "register_operand")
! 	  (match_dup 0)
! 	  (match_operand:<avx512fmaskmode> 2 "register_operand")))]
    "TARGET_AVX512BW")
  
  (define_expand "cbranch<mode>4"
    [(set (reg:CC FLAGS_REG)
  	(compare:CC (match_operand:VI48_AVX 1 "register_operand")
--- 26013,26078 ----
    "TARGET_AVX")
  
  (define_expand "maskstore<mode><avx512fmaskmodelower>"
!   [(set (match_operand:V48_AVX512VL 0 "memory_operand")
! 	(unspec:V48_AVX512VL
! 	  [(match_operand:V48_AVX512VL 1 "register_operand")
! 	   (match_dup 0)
! 	   (match_operand:<avx512fmaskmode> 2 "register_operand")]
! 	  UNSPEC_MASKMOV))]
    "TARGET_AVX512F")
  
  (define_expand "maskstore<mode><avx512fmaskmodelower>"
!   [(set (match_operand:VI12HF_AVX512VL 0 "memory_operand")
! 	(unspec:VI12HF_AVX512VL
! 	  [(match_operand:VI12HF_AVX512VL 1 "register_operand")
! 	   (match_dup 0)
! 	   (match_operand:<avx512fmaskmode> 2 "register_operand")]
! 	  UNSPEC_MASKMOV))]
    "TARGET_AVX512BW")
  
+ (define_insn "<avx512>_store<mode>_mask"
+   [(set (match_operand:V48_AVX512VL 0 "memory_operand" "=m")
+ 	(unspec:V48_AVX512VL
+ 	  [(match_operand:V48_AVX512VL 1 "register_operand" "v")
+ 	   (match_dup 0)
+ 	   (match_operand:<avx512fmaskmode> 2 "register_operand" "Yk")]
+ 	  UNSPEC_MASKMOV))]
+   "TARGET_AVX512F"
+ {
+   if (FLOAT_MODE_P (GET_MODE_INNER (<MODE>mode)))
+     {
+       if (misaligned_operand (operands[0], <MODE>mode))
+ 	return "vmovu<ssemodesuffix>\t{%1, %0%{%2%}|%0%{%2%}, %1}";
+       else
+ 	return "vmova<ssemodesuffix>\t{%1, %0%{%2%}|%0%{%2%}, %1}";
+     }
+   else
+     {
+       if (misaligned_operand (operands[0], <MODE>mode))
+ 	return "vmovdqu<ssescalarsize>\t{%1, %0%{%2%}|%0%{%2%}, %1}";
+       else
+ 	return "vmovdqa<ssescalarsize>\t{%1, %0%{%2%}|%0%{%2%}, %1}";
+     }
+ }
+   [(set_attr "type" "ssemov")
+    (set_attr "prefix" "evex")
+    (set_attr "memory" "store")
+    (set_attr "mode" "<sseinsnmode>")])
+ 
+ (define_insn "<avx512>_store<mode>_mask"
+   [(set (match_operand:VI12HF_AVX512VL 0 "memory_operand" "=m")
+ 	(unspec:VI12HF_AVX512VL
+ 	  [(match_operand:VI12HF_AVX512VL 1 "register_operand" "v")
+ 	   (match_dup 0)
+ 	   (match_operand:<avx512fmaskmode> 2 "register_operand" "Yk")]
+ 	   UNSPEC_MASKMOV))]
+   "TARGET_AVX512BW"
+   "vmovdqu<ssescalarsize>\t{%1, %0%{%2%}|%0%{%2%}, %1}"
+   [(set_attr "type" "ssemov")
+    (set_attr "prefix" "evex")
+    (set_attr "memory" "store")
+    (set_attr "mode" "<sseinsnmode>")])
+ 
  (define_expand "cbranch<mode>4"
    [(set (reg:CC FLAGS_REG)
  	(compare:CC (match_operand:VI48_AVX 1 "register_operand")
diff -Nrcpad gcc-12.3.0/gcc/config/i386/x86-tune.def gcc-12.4.0/gcc/config/i386/x86-tune.def
*** gcc-12.3.0/gcc/config/i386/x86-tune.def	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/x86-tune.def	Thu Jun 20 08:08:06 2024
*************** DEF_TUNE (X86_TUNE_AVOID_4BYTE_PREFIXES,
*** 467,473 ****
  /* X86_TUNE_USE_GATHER_2PARTS: Use gather instructions for vectors with 2
     elements.  */
  DEF_TUNE (X86_TUNE_USE_GATHER_2PARTS, "use_gather_2parts",
! 	  ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER3 | m_ZNVER4 | m_ALDERLAKE | m_GENERIC))
  
  /* X86_TUNE_USE_SCATTER_2PARTS: Use scater instructions for vectors with 2
     elements.  */
--- 467,474 ----
  /* X86_TUNE_USE_GATHER_2PARTS: Use gather instructions for vectors with 2
     elements.  */
  DEF_TUNE (X86_TUNE_USE_GATHER_2PARTS, "use_gather_2parts",
! 	  ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER3 | m_ZNVER4 | m_ALDERLAKE
! 	    | m_GENERIC | m_GDS))
  
  /* X86_TUNE_USE_SCATTER_2PARTS: Use scater instructions for vectors with 2
     elements.  */
*************** DEF_TUNE (X86_TUNE_USE_SCATTER_2PARTS, "
*** 477,483 ****
  /* X86_TUNE_USE_GATHER_4PARTS: Use gather instructions for vectors with 4
     elements.  */
  DEF_TUNE (X86_TUNE_USE_GATHER_4PARTS, "use_gather_4parts",
! 	  ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER3 | m_ZNVER4 |  m_ALDERLAKE | m_GENERIC))
  
  /* X86_TUNE_USE_SCATTER_4PARTS: Use scater instructions for vectors with 4
     elements.  */
--- 478,485 ----
  /* X86_TUNE_USE_GATHER_4PARTS: Use gather instructions for vectors with 4
     elements.  */
  DEF_TUNE (X86_TUNE_USE_GATHER_4PARTS, "use_gather_4parts",
! 	  ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER3 | m_ZNVER4 | m_ALDERLAKE
! 	    | m_GENERIC | m_GDS))
  
  /* X86_TUNE_USE_SCATTER_4PARTS: Use scater instructions for vectors with 4
     elements.  */
*************** DEF_TUNE (X86_TUNE_USE_SCATTER_4PARTS, "
*** 486,497 ****
  
  /* X86_TUNE_USE_GATHER: Use gather instructions for vectors with 8 or more
     elements.  */
! DEF_TUNE (X86_TUNE_USE_GATHER, "use_gather",
! 	  ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER4 | m_ALDERLAKE | m_GENERIC))
  
  /* X86_TUNE_USE_SCATTER: Use scater instructions for vectors with 8 or more
     elements.  */
! DEF_TUNE (X86_TUNE_USE_SCATTER, "use_scatter",
  	  ~(m_ZNVER4))
  
  /* X86_TUNE_AVOID_128FMA_CHAINS: Avoid creating loops with tight 128bit or
--- 488,500 ----
  
  /* X86_TUNE_USE_GATHER: Use gather instructions for vectors with 8 or more
     elements.  */
! DEF_TUNE (X86_TUNE_USE_GATHER_8PARTS, "use_gather_8parts",
! 	  ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER4 | m_ALDERLAKE
! 	    | m_GENERIC | m_GDS))
  
  /* X86_TUNE_USE_SCATTER: Use scater instructions for vectors with 8 or more
     elements.  */
! DEF_TUNE (X86_TUNE_USE_SCATTER_8PARTS, "use_scatter_8parts",
  	  ~(m_ZNVER4))
  
  /* X86_TUNE_AVOID_128FMA_CHAINS: Avoid creating loops with tight 128bit or
*************** DEF_TUNE (X86_TUNE_AVOID_128FMA_CHAINS,
*** 501,507 ****
  /* X86_TUNE_AVOID_256FMA_CHAINS: Avoid creating loops with tight 256bit or
     smaller FMA chain.  */
  DEF_TUNE (X86_TUNE_AVOID_256FMA_CHAINS, "avoid_fma256_chains", m_ZNVER2 | m_ZNVER3
! 	  | m_ALDERLAKE | m_SAPPHIRERAPIDS)
  
  /* X86_TUNE_AVOID_512FMA_CHAINS: Avoid creating loops with tight 512bit or
     smaller FMA chain.  */
--- 504,510 ----
  /* X86_TUNE_AVOID_256FMA_CHAINS: Avoid creating loops with tight 256bit or
     smaller FMA chain.  */
  DEF_TUNE (X86_TUNE_AVOID_256FMA_CHAINS, "avoid_fma256_chains", m_ZNVER2 | m_ZNVER3
! 	  | m_ALDERLAKE | m_SAPPHIRERAPIDS | m_GENERIC | m_ZNVER4)
  
  /* X86_TUNE_AVOID_512FMA_CHAINS: Avoid creating loops with tight 512bit or
     smaller FMA chain.  */
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/genopts/loongarch.opt.in gcc-12.4.0/gcc/config/loongarch/genopts/loongarch.opt.in
*** gcc-12.3.0/gcc/config/loongarch/genopts/loongarch.opt.in	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/genopts/loongarch.opt.in	Thu Jun 20 08:08:06 2024
*************** EnumValue
*** 58,64 ****
  Enum(isa_ext_fpu) String(@@STR_ISA_EXT_FPU64@@) Value(ISA_EXT_FPU64)
  
  m@@OPTSTR_ISA_EXT_FPU@@=
! Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN)
  -m@@OPTSTR_ISA_EXT_FPU@@=FPU	Generate code for the given FPU.
  
  m@@OPTSTR_ISA_EXT_FPU@@=@@STR_ISA_EXT_FPU0@@
--- 58,64 ----
  Enum(isa_ext_fpu) String(@@STR_ISA_EXT_FPU64@@) Value(ISA_EXT_FPU64)
  
  m@@OPTSTR_ISA_EXT_FPU@@=
! Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) Save
  -m@@OPTSTR_ISA_EXT_FPU@@=FPU	Generate code for the given FPU.
  
  m@@OPTSTR_ISA_EXT_FPU@@=@@STR_ISA_EXT_FPU0@@
*************** EnumValue
*** 92,102 ****
  Enum(cpu_type) String(@@STR_CPU_LA464@@) Value(CPU_LA464)
  
  m@@OPTSTR_ARCH@@=
! Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN)
  -m@@OPTSTR_ARCH@@=PROCESSOR	Generate code for the given PROCESSOR ISA.
  
  m@@OPTSTR_TUNE@@=
! Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN)
  -m@@OPTSTR_TUNE@@=PROCESSOR	Generate optimized code for PROCESSOR.
  
  
--- 92,102 ----
  Enum(cpu_type) String(@@STR_CPU_LA464@@) Value(CPU_LA464)
  
  m@@OPTSTR_ARCH@@=
! Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) Save
  -m@@OPTSTR_ARCH@@=PROCESSOR	Generate code for the given PROCESSOR ISA.
  
  m@@OPTSTR_TUNE@@=
! Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) Save
  -m@@OPTSTR_TUNE@@=PROCESSOR	Generate optimized code for PROCESSOR.
  
  
*************** int la_opt_abi_ext = M_OPTION_NOT_SEEN
*** 127,157 ****
  
  
  mbranch-cost=
! Target RejectNegative Joined UInteger Var(loongarch_branch_cost)
  -mbranch-cost=COST	Set the cost of branches to roughly COST instructions.
  
  mcheck-zero-division
! Target Mask(CHECK_ZERO_DIV)
  Trap on integer divide by zero.
  
  mcond-move-int
! Target Var(TARGET_COND_MOVE_INT) Init(1)
  Conditional moves for integral are enabled.
  
  mcond-move-float
! Target Var(TARGET_COND_MOVE_FLOAT) Init(1)
  Conditional moves for float are enabled.
  
  mmemcpy
! Target Mask(MEMCPY)
  Prevent optimizing block moves, which is also the default behavior of -Os.
  
  mstrict-align
! Target Var(TARGET_STRICT_ALIGN) Init(0)
  Do not generate unaligned memory accesses.
  
  mmax-inline-memcpy-size=
! Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024)
  -mmax-inline-memcpy-size=SIZE	Set the max size of memcpy to inline, default is 1024.
  
  ; The code model option names for -mcmodel.
--- 127,157 ----
  
  
  mbranch-cost=
! Target RejectNegative Joined UInteger Var(loongarch_branch_cost) Save
  -mbranch-cost=COST	Set the cost of branches to roughly COST instructions.
  
  mcheck-zero-division
! Target Mask(CHECK_ZERO_DIV) Save
  Trap on integer divide by zero.
  
  mcond-move-int
! Target Var(TARGET_COND_MOVE_INT) Init(1) Save
  Conditional moves for integral are enabled.
  
  mcond-move-float
! Target Var(TARGET_COND_MOVE_FLOAT) Init(1) Save
  Conditional moves for float are enabled.
  
  mmemcpy
! Target Mask(MEMCPY) Save
  Prevent optimizing block moves, which is also the default behavior of -Os.
  
  mstrict-align
! Target Var(TARGET_STRICT_ALIGN) Init(0) Save
  Do not generate unaligned memory accesses.
  
  mmax-inline-memcpy-size=
! Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) Save
  -mmax-inline-memcpy-size=SIZE	Set the max size of memcpy to inline, default is 1024.
  
  ; The code model option names for -mcmodel.
*************** EnumValue
*** 175,179 ****
  Enum(cmodel) String(@@STR_CMODEL_EXTREME@@) Value(CMODEL_EXTREME)
  
  mcmodel=
! Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL)
  Specify the code model.
--- 175,188 ----
  Enum(cmodel) String(@@STR_CMODEL_EXTREME@@) Value(CMODEL_EXTREME)
  
  mcmodel=
! Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Save
  Specify the code model.
+ 
+ mrelax
+ Target Var(loongarch_mrelax) Init(HAVE_AS_MRELAX_OPTION && HAVE_AS_COND_BRANCH_RELAXATION)
+ Take advantage of linker relaxations to reduce the number of instructions
+ required to materialize symbol addresses.
+ 
+ mpass-mrelax-to-as
+ Target Var(loongarch_pass_mrelax_to_as) Init(HAVE_AS_MRELAX_OPTION)
+ Pass -mrelax or -mno-relax option to the assembler.
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/gnu-user.h gcc-12.4.0/gcc/config/loongarch/gnu-user.h
*** gcc-12.3.0/gcc/config/loongarch/gnu-user.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/gnu-user.h	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 33,48 ****
  #define GLIBC_DYNAMIC_LINKER \
    "/lib" ABI_GRLEN_SPEC "/ld-linux-loongarch-" ABI_SPEC ".so.1"
  
  #undef MUSL_DYNAMIC_LINKER
  #define MUSL_DYNAMIC_LINKER \
!   "/lib" ABI_GRLEN_SPEC "/ld-musl-loongarch-" ABI_SPEC ".so.1"
  
  #undef GNU_USER_TARGET_LINK_SPEC
  #define GNU_USER_TARGET_LINK_SPEC \
    "%{G*} %{shared} -m " GNU_USER_LINK_EMULATION \
    "%{!shared: %{static} %{!static: %{rdynamic:-export-dynamic} " \
!   "-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}"
! 
  
  /* Similar to standard Linux, but adding -ffast-math support.  */
  #undef GNU_USER_TARGET_MATHFILE_SPEC
--- 33,53 ----
  #define GLIBC_DYNAMIC_LINKER \
    "/lib" ABI_GRLEN_SPEC "/ld-linux-loongarch-" ABI_SPEC ".so.1"
  
+ #define MUSL_ABI_SPEC \
+   "%{mabi=lp64d:}" \
+   "%{mabi=lp64f:-sp}" \
+   "%{mabi=lp64s:-sf}"
+ 
  #undef MUSL_DYNAMIC_LINKER
  #define MUSL_DYNAMIC_LINKER \
!   "/lib/ld-musl-loongarch" ABI_GRLEN_SPEC MUSL_ABI_SPEC ".so.1"
  
  #undef GNU_USER_TARGET_LINK_SPEC
  #define GNU_USER_TARGET_LINK_SPEC \
    "%{G*} %{shared} -m " GNU_USER_LINK_EMULATION \
    "%{!shared: %{static} %{!static: %{rdynamic:-export-dynamic} " \
!   "-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" \
!   "%{mno-relax: --no-relax}"
  
  /* Similar to standard Linux, but adding -ffast-math support.  */
  #undef GNU_USER_TARGET_MATHFILE_SPEC
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/loongarch-opts.cc gcc-12.4.0/gcc/config/loongarch/loongarch-opts.cc
*** gcc-12.3.0/gcc/config/loongarch/loongarch-opts.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/loongarch-opts.cc	Thu Jun 20 08:08:06 2024
*************** multilib_enabled_abi_list ()
*** 575,577 ****
--- 575,599 ----
  
    return XOBFINISH (&msg_obstack, const char *);
  }
+ 
+ /* option status feedback for "gcc --help=target -Q" */
+ void
+ loongarch_update_gcc_opt_status (struct loongarch_target *target,
+ 				 struct gcc_options *opts,
+ 				 struct gcc_options *opts_set)
+ {
+   (void) opts_set;
+ 
+   /* status of -mabi */
+   opts->x_la_opt_abi_base = target->abi.base;
+ 
+   /* status of -march and -mtune */
+   opts->x_la_opt_cpu_arch = target->cpu_arch;
+   opts->x_la_opt_cpu_tune = target->cpu_tune;
+ 
+   /* status of -mcmodel */
+   opts->x_la_opt_cmodel = target->cmodel;
+ 
+   /* status of -mfpu */
+   opts->x_la_opt_fpu = target->isa.fpu;
+ }
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/loongarch-opts.h gcc-12.4.0/gcc/config/loongarch/loongarch-opts.h
*** gcc-12.3.0/gcc/config/loongarch/loongarch-opts.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/loongarch-opts.h	Thu Jun 20 08:08:06 2024
*************** loongarch_config_target (struct loongarc
*** 39,44 ****
--- 39,50 ----
  			 int opt_arch, int opt_tune, int opt_fpu,
  			 int opt_abi_base, int opt_abi_ext,
  			 int opt_cmodel, int follow_multilib_list);
+ 
+ /* option status feedback for "gcc --help=target -Q" */
+ void
+ loongarch_update_gcc_opt_status (struct loongarch_target *target,
+ 				 struct gcc_options *opts,
+ 				 struct gcc_options *opts_set);
  #endif
  
  
*************** loongarch_config_target (struct loongarc
*** 87,90 ****
--- 93,108 ----
     while -m[no]-memcpy imposes a global constraint.  */
  #define TARGET_DO_OPTIMIZE_BLOCK_MOVE_P  loongarch_do_optimize_block_move_p()
  
+ #ifndef HAVE_AS_MRELAX_OPTION
+ #define HAVE_AS_MRELAX_OPTION 0
+ #endif
+ 
+ #ifndef HAVE_AS_COND_BRANCH_RELAXATION
+ #define HAVE_AS_COND_BRANCH_RELAXATION 0
+ #endif
+ 
+ #ifndef HAVE_AS_TLS
+ #define HAVE_AS_TLS 0
+ #endif
+ 
  #endif /* LOONGARCH_OPTS_H */
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/loongarch-protos.h gcc-12.4.0/gcc/config/loongarch/loongarch-protos.h
*** gcc-12.3.0/gcc/config/loongarch/loongarch-protos.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/loongarch-protos.h	Thu Jun 20 08:08:06 2024
*************** enum loongarch_symbol_type {
*** 47,53 ****
  extern rtx loongarch_emit_move (rtx, rtx);
  extern HOST_WIDE_INT loongarch_initial_elimination_offset (int, int);
  extern void loongarch_expand_prologue (void);
! extern void loongarch_expand_epilogue (bool);
  extern bool loongarch_can_use_return_insn (void);
  
  extern bool loongarch_symbolic_constant_p (rtx, enum loongarch_symbol_type *);
--- 47,53 ----
  extern rtx loongarch_emit_move (rtx, rtx);
  extern HOST_WIDE_INT loongarch_initial_elimination_offset (int, int);
  extern void loongarch_expand_prologue (void);
! extern void loongarch_expand_epilogue (int);
  extern bool loongarch_can_use_return_insn (void);
  
  extern bool loongarch_symbolic_constant_p (rtx, enum loongarch_symbol_type *);
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/loongarch.cc gcc-12.4.0/gcc/config/loongarch/loongarch.cc
*** gcc-12.3.0/gcc/config/loongarch/loongarch.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/loongarch.cc	Thu Jun 20 08:08:06 2024
*************** loongarch_save_restore_reg (machine_mode
*** 1008,1014 ****
  
  static void
  loongarch_for_each_saved_reg (HOST_WIDE_INT sp_offset,
! 			      loongarch_save_restore_fn fn)
  {
    HOST_WIDE_INT offset;
  
--- 1008,1015 ----
  
  static void
  loongarch_for_each_saved_reg (HOST_WIDE_INT sp_offset,
! 			      loongarch_save_restore_fn fn,
! 			      bool skip_eh_data_regs_p)
  {
    HOST_WIDE_INT offset;
  
*************** loongarch_for_each_saved_reg (HOST_WIDE_
*** 1017,1023 ****
    for (int regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++)
      if (BITSET_P (cfun->machine->frame.mask, regno - GP_REG_FIRST))
        {
! 	loongarch_save_restore_reg (word_mode, regno, offset, fn);
  	offset -= UNITS_PER_WORD;
        }
  
--- 1018,1032 ----
    for (int regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++)
      if (BITSET_P (cfun->machine->frame.mask, regno - GP_REG_FIRST))
        {
! 	/* Special care needs to be taken for $r4-$r7 (EH_RETURN_DATA_REGNO)
! 	   when returning normally from a function that calls
! 	   __builtin_eh_return.  In this case, these registers are saved but
! 	   should not be restored, or the return value may be clobbered.  */
! 
! 	if (!(skip_eh_data_regs_p
! 	      && GP_ARG_FIRST <= regno && regno < GP_ARG_FIRST + 4))
! 	  loongarch_save_restore_reg (word_mode, regno, offset, fn);
! 
  	offset -= UNITS_PER_WORD;
        }
  
*************** loongarch_first_stack_step (struct loong
*** 1098,1104 ****
  static void
  loongarch_emit_stack_tie (void)
  {
!   emit_insn (gen_stack_tie (Pmode, stack_pointer_rtx, hard_frame_pointer_rtx));
  }
  
  #define PROBE_INTERVAL (1 << STACK_CHECK_PROBE_INTERVAL_EXP)
--- 1107,1115 ----
  static void
  loongarch_emit_stack_tie (void)
  {
!   emit_insn (gen_stack_tie (Pmode, stack_pointer_rtx,
! 			    frame_pointer_needed ? hard_frame_pointer_rtx
! 			    : stack_pointer_rtx));
  }
  
  #define PROBE_INTERVAL (1 << STACK_CHECK_PROBE_INTERVAL_EXP)
*************** loongarch_expand_prologue (void)
*** 1287,1293 ****
  			    GEN_INT (-step1));
        RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
        size -= step1;
!       loongarch_for_each_saved_reg (size, loongarch_save_reg);
      }
  
  
--- 1298,1304 ----
  			    GEN_INT (-step1));
        RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
        size -= step1;
!       loongarch_for_each_saved_reg (size, loongarch_save_reg, false);
      }
  
  
*************** loongarch_can_use_return_insn (void)
*** 1334,1344 ****
    return reload_completed && cfun->machine->frame.total_size == 0;
  }
  
! /* Expand an "epilogue" or "sibcall_epilogue" pattern; SIBCALL_P
!    says which.  */
  
  void
! loongarch_expand_epilogue (bool sibcall_p)
  {
    /* Split the frame into two.  STEP1 is the amount of stack we should
       deallocate before restoring the registers.  STEP2 is the amount we
--- 1345,1357 ----
    return reload_completed && cfun->machine->frame.total_size == 0;
  }
  
! /* Expand function epilogue using the following insn patterns:
!    "epilogue"	      (style == NORMAL_RETURN)
!    "sibcall_epilogue" (style == SIBCALL_RETURN)
!    "eh_return"	      (style == EXCEPTION_RETURN) */
  
  void
! loongarch_expand_epilogue (int style)
  {
    /* Split the frame into two.  STEP1 is the amount of stack we should
       deallocate before restoring the registers.  STEP2 is the amount we
*************** loongarch_expand_epilogue (bool sibcall_
*** 1355,1361 ****
    bool need_barrier_p
      = (get_frame_size () + cfun->machine->frame.arg_pointer_offset) != 0;
  
!   if (!sibcall_p && loongarch_can_use_return_insn ())
      {
        emit_jump_insn (gen_return ());
        return;
--- 1368,1375 ----
    bool need_barrier_p
      = (get_frame_size () + cfun->machine->frame.arg_pointer_offset) != 0;
  
!   /* Handle simple returns.  */
!   if (style == NORMAL_RETURN && loongarch_can_use_return_insn ())
      {
        emit_jump_insn (gen_return ());
        return;
*************** loongarch_expand_epilogue (bool sibcall_
*** 1431,1437 ****
  
    /* Restore the registers.  */
    loongarch_for_each_saved_reg (frame->total_size - step2,
! 				loongarch_restore_reg);
  
    if (need_barrier_p)
      loongarch_emit_stack_tie ();
--- 1445,1453 ----
  
    /* Restore the registers.  */
    loongarch_for_each_saved_reg (frame->total_size - step2,
! 				loongarch_restore_reg,
! 				crtl->calls_eh_return
! 				&& style != EXCEPTION_RETURN);
  
    if (need_barrier_p)
      loongarch_emit_stack_tie ();
*************** loongarch_expand_epilogue (bool sibcall_
*** 1452,1462 ****
      }
  
    /* Add in the __builtin_eh_return stack adjustment.  */
!   if (crtl->calls_eh_return)
      emit_insn (gen_add3_insn (stack_pointer_rtx, stack_pointer_rtx,
  			      EH_RETURN_STACKADJ_RTX));
  
!   if (!sibcall_p)
      emit_jump_insn (gen_simple_return_internal (ra));
  }
  
--- 1468,1479 ----
      }
  
    /* Add in the __builtin_eh_return stack adjustment.  */
!   if (crtl->calls_eh_return && style == EXCEPTION_RETURN)
      emit_insn (gen_add3_insn (stack_pointer_rtx, stack_pointer_rtx,
  			      EH_RETURN_STACKADJ_RTX));
  
!   /* Emit return unless doing sibcall.  */
!   if (style != SIBCALL_RETURN)
      emit_jump_insn (gen_simple_return_internal (ra));
  }
  
*************** loongarch_memmodel_needs_rel_acq_fence (
*** 4319,4345 ****
      }
  }
  
! /* Return true if a FENCE should be emitted to before a memory access to
!    implement the release portion of memory model MODEL.  */
  
  static bool
! loongarch_memmodel_needs_release_fence (enum memmodel model)
  {
!   switch (model)
      {
      case MEMMODEL_ACQ_REL:
      case MEMMODEL_SEQ_CST:
-     case MEMMODEL_SYNC_SEQ_CST:
-     case MEMMODEL_RELEASE:
-     case MEMMODEL_SYNC_RELEASE:
        return true;
  
-     case MEMMODEL_ACQUIRE:
-     case MEMMODEL_CONSUME:
-     case MEMMODEL_SYNC_ACQUIRE:
      case MEMMODEL_RELAXED:
        return false;
  
      default:
        gcc_unreachable ();
      }
--- 4336,4362 ----
      }
  }
  
! /* Return true if a FENCE should be emitted after a failed CAS to
!    implement the acquire semantic of failure_memorder.  */
  
  static bool
! loongarch_cas_failure_memorder_needs_acquire (enum memmodel model)
  {
!   switch (memmodel_base (model))
      {
+     case MEMMODEL_ACQUIRE:
      case MEMMODEL_ACQ_REL:
      case MEMMODEL_SEQ_CST:
        return true;
  
      case MEMMODEL_RELAXED:
+     case MEMMODEL_RELEASE:
        return false;
  
+     /* MEMMODEL_CONSUME is deliberately not handled because it's always
+        replaced by MEMMODEL_ACQUIRE as at now.  If you see an ICE caused by
+        MEMMODEL_CONSUME, read the change (re)introducing it carefully and
+        decide what to do.  See PR 59448 and get_memmodel in builtins.cc.  */
      default:
        gcc_unreachable ();
      }
*************** loongarch_memmodel_needs_release_fence (
*** 4366,4372 ****
     'V'	Print exact log2 of CONST_INT OP element 0 of a replicated
  	  CONST_VECTOR in decimal.
     'A'	Print a _DB suffix if the memory model requires a release.
!    'G'	Print a DBAR insn if the memory model requires a release.
     'i'	Print i if the operand is not a register.  */
  
  static void
--- 4383,4390 ----
     'V'	Print exact log2 of CONST_INT OP element 0 of a replicated
  	  CONST_VECTOR in decimal.
     'A'	Print a _DB suffix if the memory model requires a release.
!    'G'	Print a DBAR insn for CAS failure (with an acquire semantic if
! 	needed, otherwise a simple load-load barrier).
     'i'	Print i if the operand is not a register.  */
  
  static void
*************** loongarch_print_operand (FILE *file, rtx
*** 4487,4494 ****
        break;
  
      case 'G':
!       if (loongarch_memmodel_needs_release_fence ((enum memmodel) INTVAL (op)))
! 	fputs ("dbar\t0", file);
        break;
  
      case 'i':
--- 4505,4515 ----
        break;
  
      case 'G':
!       if (loongarch_cas_failure_memorder_needs_acquire (
! 	    memmodel_from_int (INTVAL (op))))
! 	fputs ("dbar\t0b10100", file);
!       else
! 	fputs ("dbar\t0x700", file);
        break;
  
      case 'i':
*************** loongarch_init_machine_status (void)
*** 5496,5502 ****
  }
  
  static void
! loongarch_option_override_internal (struct gcc_options *opts)
  {
    int i, regno, mode;
  
--- 5517,5524 ----
  }
  
  static void
! loongarch_option_override_internal (struct gcc_options *opts,
! 				    struct gcc_options *opts_set)
  {
    int i, regno, mode;
  
*************** loongarch_option_override_internal (stru
*** 5508,5513 ****
--- 5530,5537 ----
  			   la_opt_cpu_arch, la_opt_cpu_tune, la_opt_fpu,
  			   la_opt_abi_base, la_opt_abi_ext, la_opt_cmodel, 0);
  
+   loongarch_update_gcc_opt_status (&la_target, opts, opts_set);
+ 
    if (TARGET_ABI_LP64)
      flag_pcc_struct_return = 0;
  
*************** loongarch_option_override_internal (stru
*** 5570,5576 ****
  static void
  loongarch_option_override (void)
  {
!   loongarch_option_override_internal (&global_options);
  }
  
  /* Implement TARGET_CONDITIONAL_REGISTER_USAGE.  */
--- 5594,5623 ----
  static void
  loongarch_option_override (void)
  {
!   loongarch_option_override_internal (&global_options, &global_options_set);
! }
! 
! /* Implement TARGET_OPTION_SAVE.  */
! static void
! loongarch_option_save (struct cl_target_option *,
! 		       struct gcc_options *opts,
! 		       struct gcc_options *opts_set)
! {
!   loongarch_update_gcc_opt_status (&la_target, opts, opts_set);
! }
! 
! /* Implement TARGET_OPTION_RESTORE.  */
! static void
! loongarch_option_restore (struct gcc_options *,
! 			  struct gcc_options *,
! 			  struct cl_target_option *ptr)
! {
!   la_target.cpu_arch = ptr->x_la_opt_cpu_arch;
!   la_target.cpu_tune = ptr->x_la_opt_cpu_tune;
! 
!   la_target.isa.fpu = ptr->x_la_opt_fpu;
! 
!   la_target.cmodel = ptr->x_la_opt_cmodel;
  }
  
  /* Implement TARGET_CONDITIONAL_REGISTER_USAGE.  */
*************** loongarch_starting_frame_offset (void)
*** 5792,5797 ****
--- 5839,5848 ----
  
  #undef TARGET_OPTION_OVERRIDE
  #define TARGET_OPTION_OVERRIDE loongarch_option_override
+ #define TARGET_OPTION_SAVE loongarch_option_save
+ #undef TARGET_OPTION_RESTORE
+ #define TARGET_OPTION_RESTORE loongarch_option_restore
+ 
  
  #undef TARGET_LEGITIMIZE_ADDRESS
  #define TARGET_LEGITIMIZE_ADDRESS loongarch_legitimize_address
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/loongarch.h gcc-12.4.0/gcc/config/loongarch/loongarch.h
*** gcc-12.3.0/gcc/config/loongarch/loongarch.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/loongarch.h	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 69,76 ****
  #define SUBTARGET_ASM_SPEC ""
  #endif
  
  #undef ASM_SPEC
! #define ASM_SPEC "%{mabi=*} %{subtarget_asm_spec}"
  
  /* Extra switches sometimes passed to the linker.  */
  
--- 69,91 ----
  #define SUBTARGET_ASM_SPEC ""
  #endif
  
+ #if HAVE_AS_MRELAX_OPTION && HAVE_AS_COND_BRANCH_RELAXATION
+ #define ASM_MRELAX_DEFAULT "%{!mrelax:%{!mno-relax:-mrelax}}"
+ #else
+ #define ASM_MRELAX_DEFAULT "%{!mrelax:%{!mno-relax:-mno-relax}}"
+ #endif
+ 
+ #if HAVE_AS_MRELAX_OPTION
+ #define ASM_MRELAX_SPEC \
+   "%{!mno-pass-mrelax-to-as:%{mrelax} %{mno-relax} " ASM_MRELAX_DEFAULT "}"
+ #else
+ #define ASM_MRELAX_SPEC \
+   "%{mpass-mrelax-to-as:%{mrelax} %{mno-relax} " ASM_MRELAX_DEFAULT "}"
+ #endif
+ 
  #undef ASM_SPEC
! #define ASM_SPEC \
!   "%{mabi=*} " ASM_MRELAX_SPEC " %(subtarget_asm_spec)"
  
  /* Extra switches sometimes passed to the linker.  */
  
*************** typedef struct {
*** 978,988 ****
  
  #define ASM_OUTPUT_ALIGN(STREAM, LOG) fprintf (STREAM, "\t.align\t%d\n", (LOG))
  
- /* "nop" instruction 54525952 (andi $r0,$r0,0) is
-    used for padding.  */
- #define ASM_OUTPUT_ALIGN_WITH_NOP(STREAM, LOG) \
-   fprintf (STREAM, "\t.align\t%d,54525952,4\n", (LOG))
- 
  /* This is how to output an assembler line to advance the location
     counter by SIZE bytes.  */
  
--- 993,998 ----
*************** struct GTY (()) machine_function
*** 1148,1150 ****
--- 1158,1165 ----
    (TARGET_HARD_FLOAT_ABI ? (TARGET_DOUBLE_FLOAT_ABI ? 8 : 4) : 0)
  
  #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN)
+ 
+ /* LoongArch maintains ICache/DCache coherency by hardware,
+    we just need "ibar" to avoid instruction hazard here.  */
+ #undef  CLEAR_INSN_CACHE
+ #define CLEAR_INSN_CACHE(beg, end) __builtin_loongarch_ibar (0)
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/loongarch.md gcc-12.4.0/gcc/config/loongarch/loongarch.md
*** gcc-12.3.0/gcc/config/loongarch/loongarch.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/loongarch.md	Thu Jun 20 08:08:06 2024
***************
*** 93,102 ****
--- 93,108 ----
  
  (define_constants
    [(RETURN_ADDR_REGNUM		1)
+    (TP_REGNUM			2)
     (T0_REGNUM			12)
     (T1_REGNUM			13)
     (S0_REGNUM			23)
  
+    ;; Return path styles
+    (NORMAL_RETURN		0)
+    (SIBCALL_RETURN		1)
+    (EXCEPTION_RETURN		2)
+ 
     ;; PIC long branch sequences are never longer than 100 bytes.
     (MAX_PIC_BRANCH_LENGTH	100)
  ])
***************
*** 2622,2627 ****
--- 2628,2637 ----
  }
    [(set_attr "type" "branch")])
  
+ ;; Micro-architecture unconditionally treats a "jr $ra" as "return from subroutine",
+ ;; non-returning indirect jumps through $ra would interfere with both subroutine
+ ;; return prediction and the more general indirect branch prediction.
+ 
  (define_expand "indirect_jump"
    [(set (pc) (match_operand 0 "register_operand"))]
    ""
***************
*** 2632,2638 ****
  })
  
  (define_insn "@indirect_jump<mode>"
!   [(set (pc) (match_operand:P 0 "register_operand" "r"))]
    ""
    "jr\t%0"
    [(set_attr "type" "jump")
--- 2642,2648 ----
  })
  
  (define_insn "@indirect_jump<mode>"
!   [(set (pc) (match_operand:P 0 "register_operand" "e"))]
    ""
    "jr\t%0"
    [(set_attr "type" "jump")
***************
*** 2655,2661 ****
  
  (define_insn "@tablejump<mode>"
    [(set (pc)
! 	(match_operand:P 0 "register_operand" "r"))
     (use (label_ref (match_operand 1 "" "")))]
    ""
    "jr\t%0"
--- 2665,2671 ----
  
  (define_insn "@tablejump<mode>"
    [(set (pc)
! 	(match_operand:P 0 "register_operand" "e"))
     (use (label_ref (match_operand 1 "" "")))]
    ""
    "jr\t%0"
***************
*** 2710,2716 ****
    [(const_int 2)]
    ""
  {
!   loongarch_expand_epilogue (false);
    DONE;
  })
  
--- 2720,2726 ----
    [(const_int 2)]
    ""
  {
!   loongarch_expand_epilogue (NORMAL_RETURN);
    DONE;
  })
  
***************
*** 2718,2724 ****
    [(const_int 2)]
    ""
  {
!   loongarch_expand_epilogue (true);
    DONE;
  })
  
--- 2728,2734 ----
    [(const_int 2)]
    ""
  {
!   loongarch_expand_epilogue (SIBCALL_RETURN);
    DONE;
  })
  
***************
*** 2775,2780 ****
--- 2785,2804 ----
      emit_insn (gen_eh_set_ra_di (operands[0]));
    else
      emit_insn (gen_eh_set_ra_si (operands[0]));
+ 
+   emit_jump_insn (gen_eh_return_internal ());
+   emit_barrier ();
+   DONE;
+ })
+ 
+ (define_insn_and_split "eh_return_internal"
+   [(eh_return)]
+   ""
+   "#"
+   "epilogue_completed"
+   [(const_int 0)]
+ {
+   loongarch_expand_epilogue (EXCEPTION_RETURN);
    DONE;
  })
  
***************
*** 3291,3296 ****
--- 3315,3326 ----
    [(set_attr "length" "0")
     (set_attr "type" "ghost")])
  
+ ;; Named pattern for expanding thread pointer reference.
+ (define_expand "get_thread_pointer<mode>"
+   [(set (match_operand:P 0 "register_operand" "=r")
+ 	(reg:P TP_REGNUM))]
+   "HAVE_AS_TLS"
+   {})
  
  (define_split
    [(match_operand 0 "small_data_pattern")]
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/loongarch.opt gcc-12.4.0/gcc/config/loongarch/loongarch.opt
*** gcc-12.3.0/gcc/config/loongarch/loongarch.opt	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/loongarch.opt	Thu Jun 20 08:08:06 2024
*************** EnumValue
*** 65,71 ****
  Enum(isa_ext_fpu) String(64) Value(ISA_EXT_FPU64)
  
  mfpu=
! Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN)
  -mfpu=FPU	Generate code for the given FPU.
  
  mfpu=0
--- 65,71 ----
  Enum(isa_ext_fpu) String(64) Value(ISA_EXT_FPU64)
  
  mfpu=
! Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) Save
  -mfpu=FPU	Generate code for the given FPU.
  
  mfpu=0
*************** EnumValue
*** 99,109 ****
  Enum(cpu_type) String(la464) Value(CPU_LA464)
  
  march=
! Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN)
  -march=PROCESSOR	Generate code for the given PROCESSOR ISA.
  
  mtune=
! Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN)
  -mtune=PROCESSOR	Generate optimized code for PROCESSOR.
  
  
--- 99,109 ----
  Enum(cpu_type) String(la464) Value(CPU_LA464)
  
  march=
! Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) Save
  -march=PROCESSOR	Generate code for the given PROCESSOR ISA.
  
  mtune=
! Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) Save
  -mtune=PROCESSOR	Generate optimized code for PROCESSOR.
  
  
*************** int la_opt_abi_ext = M_OPTION_NOT_SEEN
*** 134,164 ****
  
  
  mbranch-cost=
! Target RejectNegative Joined UInteger Var(loongarch_branch_cost)
  -mbranch-cost=COST	Set the cost of branches to roughly COST instructions.
  
  mcheck-zero-division
! Target Mask(CHECK_ZERO_DIV)
  Trap on integer divide by zero.
  
  mcond-move-int
! Target Var(TARGET_COND_MOVE_INT) Init(1)
  Conditional moves for integral are enabled.
  
  mcond-move-float
! Target Var(TARGET_COND_MOVE_FLOAT) Init(1)
  Conditional moves for float are enabled.
  
  mmemcpy
! Target Mask(MEMCPY)
  Prevent optimizing block moves, which is also the default behavior of -Os.
  
  mstrict-align
! Target Var(TARGET_STRICT_ALIGN) Init(0)
  Do not generate unaligned memory accesses.
  
  mmax-inline-memcpy-size=
! Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024)
  -mmax-inline-memcpy-size=SIZE	Set the max size of memcpy to inline, default is 1024.
  
  ; The code model option names for -mcmodel.
--- 134,164 ----
  
  
  mbranch-cost=
! Target RejectNegative Joined UInteger Var(loongarch_branch_cost) Save
  -mbranch-cost=COST	Set the cost of branches to roughly COST instructions.
  
  mcheck-zero-division
! Target Mask(CHECK_ZERO_DIV) Save
  Trap on integer divide by zero.
  
  mcond-move-int
! Target Var(TARGET_COND_MOVE_INT) Init(1) Save
  Conditional moves for integral are enabled.
  
  mcond-move-float
! Target Var(TARGET_COND_MOVE_FLOAT) Init(1) Save
  Conditional moves for float are enabled.
  
  mmemcpy
! Target Mask(MEMCPY) Save
  Prevent optimizing block moves, which is also the default behavior of -Os.
  
  mstrict-align
! Target Var(TARGET_STRICT_ALIGN) Init(0) Save
  Do not generate unaligned memory accesses.
  
  mmax-inline-memcpy-size=
! Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) Save
  -mmax-inline-memcpy-size=SIZE	Set the max size of memcpy to inline, default is 1024.
  
  ; The code model option names for -mcmodel.
*************** EnumValue
*** 182,186 ****
  Enum(cmodel) String(extreme) Value(CMODEL_EXTREME)
  
  mcmodel=
! Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL)
  Specify the code model.
--- 182,195 ----
  Enum(cmodel) String(extreme) Value(CMODEL_EXTREME)
  
  mcmodel=
! Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Save
  Specify the code model.
+ 
+ mrelax
+ Target Var(loongarch_mrelax) Init(HAVE_AS_MRELAX_OPTION && HAVE_AS_COND_BRANCH_RELAXATION)
+ Take advantage of linker relaxations to reduce the number of instructions
+ required to materialize symbol addresses.
+ 
+ mpass-mrelax-to-as
+ Target Var(loongarch_pass_mrelax_to_as) Init(HAVE_AS_MRELAX_OPTION)
+ Pass -mrelax or -mno-relax option to the assembler.
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/sync.md gcc-12.4.0/gcc/config/loongarch/sync.md
*** gcc-12.3.0/gcc/config/loongarch/sync.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/sync.md	Thu Jun 20 08:08:06 2024
***************
*** 129,147 ****
     (clobber (match_scratch:GPR 6 "=&r"))]
    ""
  {
!   return "%G5\\n\\t"
! 	 "1:\\n\\t"
! 	 "ll.<amo>\\t%0,%1\\n\\t"
! 	 "bne\\t%0,%z2,2f\\n\\t"
! 	 "or%i3\\t%6,$zero,%3\\n\\t"
! 	 "sc.<amo>\\t%6,%1\\n\\t"
! 	 "beq\\t$zero,%6,1b\\n\\t"
! 	 "b\\t3f\\n\\t"
! 	 "2:\\n\\t"
! 	 "dbar\\t0x700\\n\\t"
! 	 "3:\\n\\t";
  }
!   [(set (attr "length") (const_int 32))])
  
  (define_expand "atomic_compare_and_swap<mode>"
    [(match_operand:SI 0 "register_operand" "")   ;; bool output
--- 129,170 ----
     (clobber (match_scratch:GPR 6 "=&r"))]
    ""
  {
!   output_asm_insn ("1:", operands);
!   output_asm_insn ("ll.<amo>\t%0,%1", operands);
! 
!   /* Like the test case atomic-cas-int.C, in loongarch64, O1 and higher, the
!      return value of the val_without_const_folding will not be truncated and
!      will be passed directly to the function compare_exchange_strong.
!      However, the instruction 'bne' does not distinguish between 32-bit and
!      64-bit operations.  so if the upper 32 bits of the register are not
!      extended by the 32nd bit symbol, then the comparison may not be valid
!      here.  This will affect the result of the operation.  */
! 
!   if (TARGET_64BIT && REG_P (operands[2])
!       && GET_MODE (operands[2]) == SImode)
!     {
!       output_asm_insn ("addi.w\t%6,%2,0", operands);
!       output_asm_insn ("bne\t%0,%6,2f", operands);
!     }
!   else
!     output_asm_insn ("bne\t%0,%z2,2f", operands);
! 
!   output_asm_insn ("or%i3\t%6,$zero,%3", operands);
!   output_asm_insn ("sc.<amo>\t%6,%1", operands);
!   output_asm_insn ("beqz\t%6,1b", operands);
!   output_asm_insn ("b\t3f", operands);
!   output_asm_insn ("2:", operands);
!   output_asm_insn ("%G5", operands);
!   output_asm_insn ("3:", operands);
! 
!   return "";
  }
!   [(set (attr "length")
!      (if_then_else
! 	(and (match_test "GET_MODE (operands[2]) == SImode")
! 	     (match_test "REG_P (operands[2])"))
! 	(const_int 32)
! 	(const_int 28)))])
  
  (define_expand "atomic_compare_and_swap<mode>"
    [(match_operand:SI 0 "register_operand" "")   ;; bool output
***************
*** 234,241 ****
     (clobber (match_scratch:GPR 7 "=&r"))]
    ""
  {
!   return "%G6\\n\\t"
! 	 "1:\\n\\t"
  	 "ll.<amo>\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%2\\n\\t"
  	 "bne\\t%7,%z4,2f\\n\\t"
--- 257,263 ----
     (clobber (match_scratch:GPR 7 "=&r"))]
    ""
  {
!   return "1:\\n\\t"
  	 "ll.<amo>\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%2\\n\\t"
  	 "bne\\t%7,%z4,2f\\n\\t"
***************
*** 245,254 ****
  	 "beq\\t$zero,%7,1b\\n\\t"
  	 "b\\t3f\\n\\t"
  	 "2:\\n\\t"
! 	 "dbar\\t0x700\\n\\t"
  	 "3:\\n\\t";
  }
!   [(set (attr "length") (const_int 40))])
  
  (define_expand "atomic_compare_and_swap<mode>"
    [(match_operand:SI 0 "register_operand" "")   ;; bool output
--- 267,276 ----
  	 "beq\\t$zero,%7,1b\\n\\t"
  	 "b\\t3f\\n\\t"
  	 "2:\\n\\t"
! 	 "%G6\\n\\t"
  	 "3:\\n\\t";
  }
!   [(set (attr "length") (const_int 36))])
  
  (define_expand "atomic_compare_and_swap<mode>"
    [(match_operand:SI 0 "register_operand" "")   ;; bool output
***************
*** 303,310 ****
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "%G6\\n\\t"
! 	 "1:\\n\\t"
  	 "ll.<amo>\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "add.w\\t%8,%0,%z5\\n\\t"
--- 325,331 ----
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "1:\\n\\t"
  	 "ll.<amo>\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "add.w\\t%8,%0,%z5\\n\\t"
***************
*** 314,320 ****
  	 "beq\\t$zero,%7,1b";
  }
  
!   [(set (attr "length") (const_int 32))])
  
  (define_insn "atomic_cas_value_sub_7_<mode>"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
--- 335,341 ----
  	 "beq\\t$zero,%7,1b";
  }
  
!   [(set (attr "length") (const_int 28))])
  
  (define_insn "atomic_cas_value_sub_7_<mode>"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
***************
*** 330,337 ****
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "%G6\\n\\t"
! 	 "1:\\n\\t"
  	 "ll.<amo>\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "sub.w\\t%8,%0,%z5\\n\\t"
--- 351,357 ----
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "1:\\n\\t"
  	 "ll.<amo>\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "sub.w\\t%8,%0,%z5\\n\\t"
***************
*** 340,346 ****
  	 "sc.<amo>\\t%7,%1\\n\\t"
  	 "beq\\t$zero,%7,1b";
  }
!   [(set (attr "length") (const_int 32))])
  
  (define_insn "atomic_cas_value_and_7_<mode>"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
--- 360,366 ----
  	 "sc.<amo>\\t%7,%1\\n\\t"
  	 "beq\\t$zero,%7,1b";
  }
!   [(set (attr "length") (const_int 28))])
  
  (define_insn "atomic_cas_value_and_7_<mode>"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
***************
*** 356,363 ****
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "%G6\\n\\t"
! 	 "1:\\n\\t"
  	 "ll.<amo>\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "and\\t%8,%0,%z5\\n\\t"
--- 376,382 ----
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "1:\\n\\t"
  	 "ll.<amo>\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "and\\t%8,%0,%z5\\n\\t"
***************
*** 366,372 ****
  	 "sc.<amo>\\t%7,%1\\n\\t"
  	 "beq\\t$zero,%7,1b";
  }
!   [(set (attr "length") (const_int 32))])
  
  (define_insn "atomic_cas_value_xor_7_<mode>"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
--- 385,391 ----
  	 "sc.<amo>\\t%7,%1\\n\\t"
  	 "beq\\t$zero,%7,1b";
  }
!   [(set (attr "length") (const_int 28))])
  
  (define_insn "atomic_cas_value_xor_7_<mode>"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
***************
*** 382,389 ****
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "%G6\\n\\t"
! 	 "1:\\n\\t"
  	 "ll.<amo>\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "xor\\t%8,%0,%z5\\n\\t"
--- 401,407 ----
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "1:\\n\\t"
  	 "ll.<amo>\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "xor\\t%8,%0,%z5\\n\\t"
***************
*** 393,399 ****
  	 "beq\\t$zero,%7,1b";
  }
  
!   [(set (attr "length") (const_int 32))])
  
  (define_insn "atomic_cas_value_or_7_<mode>"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
--- 411,417 ----
  	 "beq\\t$zero,%7,1b";
  }
  
!   [(set (attr "length") (const_int 28))])
  
  (define_insn "atomic_cas_value_or_7_<mode>"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
***************
*** 409,416 ****
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "%G6\\n\\t"
! 	 "1:\\n\\t"
  	 "ll.<amo>\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "or\\t%8,%0,%z5\\n\\t"
--- 427,433 ----
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "1:\\n\\t"
  	 "ll.<amo>\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "or\\t%8,%0,%z5\\n\\t"
***************
*** 420,426 ****
  	 "beq\\t$zero,%7,1b";
  }
  
!   [(set (attr "length") (const_int 32))])
  
  (define_insn "atomic_cas_value_nand_7_<mode>"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
--- 437,443 ----
  	 "beq\\t$zero,%7,1b";
  }
  
!   [(set (attr "length") (const_int 28))])
  
  (define_insn "atomic_cas_value_nand_7_<mode>"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
***************
*** 436,443 ****
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "%G6\\n\\t"
! 	 "1:\\n\\t"
  	 "ll.<amo>\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "and\\t%8,%0,%z5\\n\\t"
--- 453,459 ----
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "1:\\n\\t"
  	 "ll.<amo>\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "and\\t%8,%0,%z5\\n\\t"
***************
*** 446,452 ****
  	 "sc.<amo>\\t%7,%1\\n\\t"
  	 "beq\\t$zero,%7,1b";
  }
!   [(set (attr "length") (const_int 32))])
  
  (define_insn "atomic_cas_value_exchange_7_<mode>"
    [(set (match_operand:GPR 0 "register_operand" "=&r")
--- 462,468 ----
  	 "sc.<amo>\\t%7,%1\\n\\t"
  	 "beq\\t$zero,%7,1b";
  }
!   [(set (attr "length") (const_int 28))])
  
  (define_insn "atomic_cas_value_exchange_7_<mode>"
    [(set (match_operand:GPR 0 "register_operand" "=&r")
***************
*** 461,468 ****
     (clobber (match_scratch:GPR 7 "=&r"))]
    ""
  {
!   return "%G6\\n\\t"
! 	 "1:\\n\\t"
  	 "ll.<amo>\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%z3\\n\\t"
  	 "or%i5\\t%7,%7,%5\\n\\t"
--- 477,483 ----
     (clobber (match_scratch:GPR 7 "=&r"))]
    ""
  {
!   return "1:\\n\\t"
  	 "ll.<amo>\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%z3\\n\\t"
  	 "or%i5\\t%7,%7,%5\\n\\t"
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/t-loongarch gcc-12.4.0/gcc/config/loongarch/t-loongarch
*** gcc-12.3.0/gcc/config/loongarch/t-loongarch	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/t-loongarch	Thu Jun 20 08:08:06 2024
***************
*** 16,21 ****
--- 16,25 ----
  # along with GCC; see the file COPYING3.  If not see
  # <http://www.gnu.org/licenses/>.
  
+ TM_H += $(srcdir)/config/loongarch/loongarch-driver.h
+ OPTIONS_H_EXTRA += $(srcdir)/config/loongarch/loongarch-def.h \
+ 		   $(srcdir)/config/loongarch/loongarch-tune.h
+ 
  # Canonical target triplet from config.gcc
  LA_MULTIARCH_TRIPLET = $(patsubst LA_MULTIARCH_TRIPLET=%,%,$\
  $(filter LA_MULTIARCH_TRIPLET=%,$(tm_defines)))
diff -Nrcpad gcc-12.3.0/gcc/config/mips/mips-msa.md gcc-12.4.0/gcc/config/mips/mips-msa.md
*** gcc-12.3.0/gcc/config/mips/mips-msa.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/mips/mips-msa.md	Thu Jun 20 08:08:06 2024
***************
*** 231,236 ****
--- 231,240 ----
     (V4SI  "uimm5")
     (V2DI  "uimm6")])
  
+ ;; The index of sign bit in FP vector elements.
+ (define_mode_attr elmsgnbit [(V2DF "63") (V4DF "63")
+ 			     (V4SF "31") (V8SF "31")])
+ 
  (define_expand "vec_init<mode><unitmode>"
    [(match_operand:MSA 0 "register_operand")
     (match_operand:MSA 1 "")]
***************
*** 597,605 ****
  })
  
  (define_expand "neg<mode>2"
!   [(set (match_operand:MSA 0 "register_operand")
! 	(minus:MSA (match_dup 2)
! 		   (match_operand:MSA 1 "register_operand")))]
    "ISA_HAS_MSA"
  {
    rtx reg = gen_reg_rtx (<MODE>mode);
--- 601,609 ----
  })
  
  (define_expand "neg<mode>2"
!   [(set (match_operand:IMSA 0 "register_operand")
! 	(minus:IMSA (match_dup 2)
! 		   (match_operand:IMSA 1 "register_operand")))]
    "ISA_HAS_MSA"
  {
    rtx reg = gen_reg_rtx (<MODE>mode);
***************
*** 607,612 ****
--- 611,624 ----
    operands[2] = reg;
  })
  
+ (define_insn "neg<mode>2"
+   [(set (match_operand:FMSA 0 "register_operand" "=f")
+ 	(neg:FMSA (match_operand:FMSA 1 "register_operand" "f")))]
+   "ISA_HAS_MSA"
+   "bnegi.<msafmt>\t%w0,%w1,<elmsgnbit>"
+   [(set_attr "type" "simd_bit")
+    (set_attr "mode" "<MODE>")])
+ 
  (define_expand "msa_ldi<mode>"
    [(match_operand:IMSA 0 "register_operand")
     (match_operand 1 "const_imm10_operand")]
diff -Nrcpad gcc-12.3.0/gcc/config/mips/mips.cc gcc-12.4.0/gcc/config/mips/mips.cc
*** gcc-12.3.0/gcc/config/mips/mips.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/mips/mips.cc	Thu Jun 20 08:08:06 2024
*************** mips_emit_call_insn (rtx pattern, rtx or
*** 3140,3145 ****
--- 3140,3148 ----
      {
        rtx post_call_tmp_reg = gen_rtx_REG (word_mode, POST_CALL_TMP_REG);
        clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), post_call_tmp_reg);
+       clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS16_PIC_TEMP);
+       clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn),
+ 			MIPS_PROLOGUE_TEMP (word_mode));
      }
  
    return insn;
*************** mips16_gp_pseudo_reg (void)
*** 3236,3242 ****
        rtx set = gen_load_const_gp (cfun->machine->mips16_gp_pseudo_rtx);
        rtx_insn *insn = emit_insn_after (set, scan);
        INSN_LOCATION (insn) = 0;
! 
        pop_topmost_sequence ();
      }
  
--- 3239,3251 ----
        rtx set = gen_load_const_gp (cfun->machine->mips16_gp_pseudo_rtx);
        rtx_insn *insn = emit_insn_after (set, scan);
        INSN_LOCATION (insn) = 0;
!       /* NewABI support hasn't been implement.  NewABI should generate RTL
! 	 sequence instead of ASM sequence directly.  */
!       if (mips_current_loadgp_style () == LOADGP_OLDABI)
! 	{
! 	  emit_clobber (MIPS16_PIC_TEMP);
! 	  emit_clobber (MIPS_PROLOGUE_TEMP (Pmode));
! 	}
        pop_topmost_sequence ();
      }
  
diff -Nrcpad gcc-12.3.0/gcc/config/pa/pa.cc gcc-12.4.0/gcc/config/pa/pa.cc
*** gcc-12.3.0/gcc/config/pa/pa.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/pa/pa.cc	Thu Jun 20 08:08:06 2024
*************** pa_asm_trampoline_template (FILE *f)
*** 10400,10406 ****
  	  fputs ("\tldw		0(%r22),%r21\n", f);
  	  fputs ("\tldw		4(%r22),%r19\n", f);
  	  fputs ("\tbve		(%r21)\n", f);
! 	  fputs ("\tldw		52(%r1),%r29\n", f);
  	  fputs ("\t.word	0\n", f);
  	  fputs ("\t.word	0\n", f);
  	  fputs ("\t.word	0\n", f);
--- 10400,10406 ----
  	  fputs ("\tldw		0(%r22),%r21\n", f);
  	  fputs ("\tldw		4(%r22),%r19\n", f);
  	  fputs ("\tbve		(%r21)\n", f);
! 	  fputs ("\tldw		52(%r20),%r29\n", f);
  	  fputs ("\t.word	0\n", f);
  	  fputs ("\t.word	0\n", f);
  	  fputs ("\t.word	0\n", f);
diff -Nrcpad gcc-12.3.0/gcc/config/pa/pa.md gcc-12.4.0/gcc/config/pa/pa.md
*** gcc-12.3.0/gcc/config/pa/pa.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/pa/pa.md	Thu Jun 20 08:08:06 2024
*************** add,l %2,%3,%3\;bv,n %%r0(%3)"
*** 10488,10500 ****
  (define_insn "atomic_storedi_1"
    [(set (mem:DI (match_operand:SI 0 "register_operand" "r,r"))
          (match_operand:DI 1 "reg_or_0_operand" "M,r"))
!    (clobber (match_scratch:DI 2 "=X,f"))]
    "!TARGET_64BIT && !TARGET_SOFT_FLOAT"
    "@
!    {fstds|fstd} %%fr0,0(%0)
     {stws|stw} %1,-16(%%sp)\n\t{stws|stw} %R1,-12(%%sp)\n\t{fldds|fldd} -16(%%sp),%2\n\t{fstds|fstd} %2,0(%0)"
    [(set_attr "type" "move,move")
!    (set_attr "length" "4,16")])
  
  ;; PA 2.0 hardware supports out-of-order execution of loads and stores, so
  ;; we need memory barriers to enforce program order for memory references
--- 10488,10500 ----
  (define_insn "atomic_storedi_1"
    [(set (mem:DI (match_operand:SI 0 "register_operand" "r,r"))
          (match_operand:DI 1 "reg_or_0_operand" "M,r"))
!    (clobber (match_scratch:DI 2 "=f,f"))]
    "!TARGET_64BIT && !TARGET_SOFT_FLOAT"
    "@
!    fcpy,dbl %%fr0,%2\n\t{fstds|fstd} %2,0(%0)
     {stws|stw} %1,-16(%%sp)\n\t{stws|stw} %R1,-12(%%sp)\n\t{fldds|fldd} -16(%%sp),%2\n\t{fstds|fstd} %2,0(%0)"
    [(set_attr "type" "move,move")
!    (set_attr "length" "8,16")])
  
  ;; PA 2.0 hardware supports out-of-order execution of loads and stores, so
  ;; we need memory barriers to enforce program order for memory references
diff -Nrcpad gcc-12.3.0/gcc/config/riscv/riscv.cc gcc-12.4.0/gcc/config/riscv/riscv.cc
*** gcc-12.3.0/gcc/config/riscv/riscv.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/riscv/riscv.cc	Thu Jun 20 08:08:06 2024
*************** riscv_asan_shadow_offset (void)
*** 5600,5608 ****
    /* We only have libsanitizer support for RV64 at present.
  
       This number must match kRiscv*_ShadowOffset* in the file
!      libsanitizer/asan/asan_mapping.h which is currently 1<<29 for rv64,
!      even though 1<<36 makes more sense.  */
!   return TARGET_64BIT ? (HOST_WIDE_INT_1 << 29) : 0;
  }
  
  /* Initialize the GCC target structure.  */
--- 5600,5607 ----
    /* We only have libsanitizer support for RV64 at present.
  
       This number must match kRiscv*_ShadowOffset* in the file
!      libsanitizer/asan/asan_mapping.h.  */
!   return TARGET_64BIT ? HOST_WIDE_INT_UC (0xd55550000) : 0;
  }
  
  /* Initialize the GCC target structure.  */
diff -Nrcpad gcc-12.3.0/gcc/config/riscv/sync.md gcc-12.4.0/gcc/config/riscv/sync.md
*** gcc-12.3.0/gcc/config/riscv/sync.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/riscv/sync.md	Thu Jun 20 08:08:06 2024
***************
*** 129,134 ****
--- 129,143 ----
     (match_operand:SI 7 "const_int_operand" "")] ;; mod_f
    "TARGET_ATOMIC"
  {
+   if (word_mode != <MODE>mode && operands[3] != const0_rtx)
+     {
+       /* We don't have SI mode compare on RV64, so we need to make sure expected
+ 	 value is sign-extended.  */
+       rtx tmp0 = gen_reg_rtx (word_mode);
+       emit_insn (gen_extend_insn (tmp0, operands[3], word_mode, <MODE>mode, 0));
+       operands[3] = simplify_gen_subreg (<MODE>mode, tmp0, word_mode, 0);
+     }
+ 
    emit_insn (gen_atomic_cas_value_strong<mode> (operands[1], operands[2],
  						operands[3], operands[4],
  						operands[6], operands[7]));
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/altivec.md gcc-12.4.0/gcc/config/rs6000/altivec.md
*** gcc-12.3.0/gcc/config/rs6000/altivec.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/altivec.md	Thu Jun 20 08:08:06 2024
***************
*** 385,398 ****
  
  (define_insn_and_split "sldoi_to_mov<mode>"
    [(set (match_operand:VM 0 "altivec_register_operand")
! 	(unspec:VM [(match_operand:VM 1 "easy_vector_constant")
  	            (match_dup 1)
  		    (match_operand:QI 2 "u5bit_cint_operand")]
  		    UNSPEC_VSLDOI))]
!   "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode) && can_create_pseudo_p ()"
    "#"
    "&& 1"
!   [(set (match_dup 0) (match_dup 1))])
  
  (define_insn "get_vrsave_internal"
    [(set (match_operand:SI 0 "register_operand" "=r")
--- 385,406 ----
  
  (define_insn_and_split "sldoi_to_mov<mode>"
    [(set (match_operand:VM 0 "altivec_register_operand")
! 	(unspec:VM [(match_operand:VM 1 "const_vector_each_byte_same")
  	            (match_dup 1)
  		    (match_operand:QI 2 "u5bit_cint_operand")]
  		    UNSPEC_VSLDOI))]
!   "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode) && can_create_pseudo_p ()"
    "#"
    "&& 1"
!   [(set (match_dup 0) (match_dup 1))]
!   "{
!      if (!easy_vector_constant (operands[1], <MODE>mode))
!        {
! 	 rtx dest = gen_reg_rtx (<MODE>mode);
! 	 emit_move_insn (dest, operands[1]);
! 	 operands[1] = dest;
!        }
!   }")
  
  (define_insn "get_vrsave_internal"
    [(set (match_operand:SI 0 "register_operand" "=r")
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/darwin.h gcc-12.4.0/gcc/config/rs6000/darwin.h
*** gcc-12.3.0/gcc/config/rs6000/darwin.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/darwin.h	Thu Jun 20 08:08:06 2024
***************
*** 98,104 ****
     Include libmx when targeting Darwin 7.0 and above, but before libSystem,
     since the functions are actually in libSystem but for 7.x compatibility
     we want them to be looked for in libmx first.
!    Include libSystemStubs when compiling against 10.3 - 10.5 SDKs (we assume
     this is the case when targetting these) - but not for 64-bit long double.
     Don't do either for m64, the library is either a dummy or non-existent.
  */
--- 98,104 ----
     Include libmx when targeting Darwin 7.0 and above, but before libSystem,
     since the functions are actually in libSystem but for 7.x compatibility
     we want them to be looked for in libmx first.
!    Include libSystemStubs when compiling against 10.3 - 10.6 SDKs (we assume
     this is the case when targetting these) - but not for 64-bit long double.
     Don't do either for m64, the library is either a dummy or non-existent.
  */
***************
*** 107,114 ****
  #define LIB_SPEC \
  "%{!static:								\
    %{!m64:%{!mlong-double-64:						\
!     %{pg:%:version-compare(>< 10.3 10.5 mmacosx-version-min= -lSystemStubs_profile)} \
!     %{!pg:%:version-compare(>< 10.3 10.5 mmacosx-version-min= -lSystemStubs)} \
       %:version-compare(>< 10.3 10.4 mmacosx-version-min= -lmx)}}	\
    -lSystem								\
  }"
--- 107,114 ----
  #define LIB_SPEC \
  "%{!static:								\
    %{!m64:%{!mlong-double-64:						\
!     %{pg:%:version-compare(>< 10.3 10.7 mmacosx-version-min= -lSystemStubs_profile)} \
!     %{!pg:%:version-compare(>< 10.3 10.7 mmacosx-version-min= -lSystemStubs)} \
       %:version-compare(>< 10.3 10.4 mmacosx-version-min= -lmx)}}	\
    -lSystem								\
  }"
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/fusion.md gcc-12.4.0/gcc/config/rs6000/fusion.md
*** gcc-12.3.0/gcc/config/rs6000/fusion.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/fusion.md	Thu Jun 20 08:08:06 2024
***************
*** 22,28 ****
  ;; load mode is DI result mode is clobber compare mode is CC extend is none
  (define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
                      (match_operand:DI 3 "const_m1_to_1_operand" "n")))
     (clobber (match_scratch:DI 0 "=r"))]
    "(TARGET_P10_FUSION)"
--- 22,28 ----
  ;; load mode is DI result mode is clobber compare mode is CC extend is none
  (define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:DI 1 "non_update_memory_operand" "YZ")
                      (match_operand:DI 3 "const_m1_to_1_operand" "n")))
     (clobber (match_scratch:DI 0 "=r"))]
    "(TARGET_P10_FUSION)"
***************
*** 43,49 ****
  ;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
  (define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
    [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
!         (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
                         (match_operand:DI 3 "const_0_to_1_operand" "n")))
     (clobber (match_scratch:DI 0 "=r"))]
    "(TARGET_P10_FUSION)"
--- 43,49 ----
  ;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
  (define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
    [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
!         (compare:CCUNS (match_operand:DI 1 "non_update_memory_operand" "YZ")
                         (match_operand:DI 3 "const_0_to_1_operand" "n")))
     (clobber (match_scratch:DI 0 "=r"))]
    "(TARGET_P10_FUSION)"
***************
*** 64,70 ****
  ;; load mode is DI result mode is DI compare mode is CC extend is none
  (define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
                      (match_operand:DI 3 "const_m1_to_1_operand" "n")))
     (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
    "(TARGET_P10_FUSION)"
--- 64,70 ----
  ;; load mode is DI result mode is DI compare mode is CC extend is none
  (define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:DI 1 "non_update_memory_operand" "YZ")
                      (match_operand:DI 3 "const_m1_to_1_operand" "n")))
     (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
    "(TARGET_P10_FUSION)"
***************
*** 85,91 ****
  ;; load mode is DI result mode is DI compare mode is CCUNS extend is none
  (define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
    [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
!         (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
                         (match_operand:DI 3 "const_0_to_1_operand" "n")))
     (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
    "(TARGET_P10_FUSION)"
--- 85,91 ----
  ;; load mode is DI result mode is DI compare mode is CCUNS extend is none
  (define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
    [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
!         (compare:CCUNS (match_operand:DI 1 "non_update_memory_operand" "YZ")
                         (match_operand:DI 3 "const_0_to_1_operand" "n")))
     (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
    "(TARGET_P10_FUSION)"
***************
*** 104,120 ****
  
  ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
  ;; load mode is SI result mode is clobber compare mode is CC extend is none
! (define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
                      (match_operand:SI 3 "const_m1_to_1_operand" "n")))
     (clobber (match_scratch:SI 0 "=r"))]
    "(TARGET_P10_FUSION)"
!   "lwa%X1 %0,%1\;cmpdi %2,%0,%3"
    "&& reload_completed
     && (cc_reg_not_cr0_operand (operands[2], CCmode)
         || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
!                                       SImode, NON_PREFIXED_DS))"
    [(set (match_dup 0) (match_dup 1))
     (set (match_dup 2)
          (compare:CC (match_dup 0) (match_dup 3)))]
--- 104,120 ----
  
  ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
  ;; load mode is SI result mode is clobber compare mode is CC extend is none
! (define_insn_and_split "*lwz_cmpwi_cr0_SI_clobber_CC_none"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:SI 1 "non_update_memory_operand" "m")
                      (match_operand:SI 3 "const_m1_to_1_operand" "n")))
     (clobber (match_scratch:SI 0 "=r"))]
    "(TARGET_P10_FUSION)"
!   "lwz%X1 %0,%1\;cmpwi %2,%0,%3"
    "&& reload_completed
     && (cc_reg_not_cr0_operand (operands[2], CCmode)
         || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
!                                       SImode, NON_PREFIXED_D))"
    [(set (match_dup 0) (match_dup 1))
     (set (match_dup 2)
          (compare:CC (match_dup 0) (match_dup 3)))]
***************
*** 146,162 ****
  
  ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
  ;; load mode is SI result mode is SI compare mode is CC extend is none
! (define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
                      (match_operand:SI 3 "const_m1_to_1_operand" "n")))
     (set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
    "(TARGET_P10_FUSION)"
!   "lwa%X1 %0,%1\;cmpdi %2,%0,%3"
    "&& reload_completed
     && (cc_reg_not_cr0_operand (operands[2], CCmode)
         || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
!                                       SImode, NON_PREFIXED_DS))"
    [(set (match_dup 0) (match_dup 1))
     (set (match_dup 2)
          (compare:CC (match_dup 0) (match_dup 3)))]
--- 146,162 ----
  
  ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
  ;; load mode is SI result mode is SI compare mode is CC extend is none
! (define_insn_and_split "*lwz_cmpwi_cr0_SI_SI_CC_none"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:SI 1 "non_update_memory_operand" "m")
                      (match_operand:SI 3 "const_m1_to_1_operand" "n")))
     (set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
    "(TARGET_P10_FUSION)"
!   "lwz%X1 %0,%1\;cmpwi %2,%0,%3"
    "&& reload_completed
     && (cc_reg_not_cr0_operand (operands[2], CCmode)
         || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
!                                       SImode, NON_PREFIXED_D))"
    [(set (match_dup 0) (match_dup 1))
     (set (match_dup 2)
          (compare:CC (match_dup 0) (match_dup 3)))]
***************
*** 190,196 ****
  ;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
  (define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
                      (match_operand:SI 3 "const_m1_to_1_operand" "n")))
     (set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
    "(TARGET_P10_FUSION)"
--- 190,196 ----
  ;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
  (define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:SI 1 "non_update_memory_operand" "YZ")
                      (match_operand:SI 3 "const_m1_to_1_operand" "n")))
     (set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
    "(TARGET_P10_FUSION)"
***************
*** 205,210 ****
--- 205,211 ----
    ""
    [(set_attr "type" "fused_load_cmpi")
     (set_attr "cost" "8")
+    (set_attr "sign_extend" "yes")
     (set_attr "length" "8")])
  
  ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/genfusion.pl gcc-12.4.0/gcc/config/rs6000/genfusion.pl
*** gcc-12.3.0/gcc/config/rs6000/genfusion.pl	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/genfusion.pl	Thu Jun 20 08:08:06 2024
*************** sub mode_to_ldst_char
*** 53,144 ****
      return '?';
  }
  
  sub gen_ld_cmpi_p10
  {
!     my ($lmode, $ldst, $clobbermode, $result, $cmpl, $echr, $constpred,
! 	$mempred, $ccmode, $np, $extend, $resultmode);
!   LMODE: foreach $lmode ('DI','SI','HI','QI') {
!       $ldst = mode_to_ldst_char($lmode);
!       $clobbermode = $lmode;
!       # For clobber, we need a SI/DI reg in case we
!       # split because we have to sign/zero extend.
!       if ($lmode eq 'HI' || $lmode eq 'QI') { $clobbermode = "GPR"; }
!     RESULT: foreach $result ('clobber', $lmode,  "EXT".$lmode) {
! 	# EXTDI does not exist, and we cannot directly produce HI/QI results.
! 	next RESULT if $result eq "EXTDI" || $result eq "HI" || $result eq "QI";
! 	# Don't allow EXTQI because that would allow HI result which we can't do.
! 	$result = "GPR" if $result eq "EXTQI";
!       CCMODE: foreach $ccmode ('CC','CCUNS') {
! 	  $np = "NON_PREFIXED_D";
! 	  $mempred = "non_update_memory_operand";
! 	  if ( $ccmode eq 'CC' ) {
! 	      next CCMODE if $lmode eq 'QI';
! 	      if ( $lmode eq 'DI' || $lmode eq 'SI' ) {
! 		  # ld and lwa are both DS-FORM.
! 		  $np = "NON_PREFIXED_DS";
! 		  $mempred = "ds_form_mem_operand";
! 	      }
! 	      $cmpl = "";
! 	      $echr = "a";
! 	      $constpred = "const_m1_to_1_operand";
! 	  } else {
! 	      if ( $lmode eq 'DI' ) {
! 		  # ld is DS-form, but lwz is not.
! 		  $np = "NON_PREFIXED_DS";
! 		  $mempred = "ds_form_mem_operand";
! 	      }
! 	      $cmpl = "l";
! 	      $echr = "z";
! 	      $constpred = "const_0_to_1_operand";
! 	  }
! 	  if ($lmode eq 'DI') { $echr = ""; }
! 	  if ($result =~ m/^EXT/ || $result eq 'GPR' || $clobbermode eq 'GPR') {
! 	      # We always need extension if result > lmode.
! 	      if ( $ccmode eq 'CC' ) {
! 		  $extend = "sign";
! 	      } else {
! 		  $extend = "zero";
! 	      }
! 	  } else {
! 	      # Result of SI/DI does not need sign extension.
! 	      $extend = "none";
! 	  }
! 	  print ";; load-cmpi fusion pattern generated by gen_ld_cmpi_p10\n";
! 	  print ";; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend\n";
  
! 	  print "(define_insn_and_split \"*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}\"\n";
! 	  print "  [(set (match_operand:${ccmode} 2 \"cc_reg_operand\" \"=x\")\n";
! 	  print "        (compare:${ccmode} (match_operand:${lmode} 1 \"${mempred}\" \"m\")\n";
! 	  if ($ccmode eq 'CCUNS') { print "   "; }
! 	  print "                    (match_operand:${lmode} 3 \"${constpred}\" \"n\")))\n";
! 	  if ($result eq 'clobber') {
! 	      print "   (clobber (match_scratch:${clobbermode} 0 \"=r\"))]\n";
! 	  } elsif ($result eq $lmode) {
! 	      print "   (set (match_operand:${result} 0 \"gpc_reg_operand\" \"=r\") (match_dup 1))]\n";
! 	  } else {
! 	      print "   (set (match_operand:${result} 0 \"gpc_reg_operand\" \"=r\") (${extend}_extend:${result} (match_dup 1)))]\n";
! 	  }
! 	  print "  \"(TARGET_P10_FUSION)\"\n";
! 	  print "  \"l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}di %2,%0,%3\"\n";
! 	  print "  \"&& reload_completed\n";
! 	  print "   && (cc_reg_not_cr0_operand (operands[2], CCmode)\n";
! 	  print "       || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),\n";
! 	  print "                                      ${lmode}mode, ${np}))\"\n";
  
! 	  if ($extend eq "none") {
! 	      print "  [(set (match_dup 0) (match_dup 1))\n";
! 	  } else {
! 	      $resultmode = $result;
! 	      if ( $result eq 'clobber' ) { $resultmode = $clobbermode }
! 	      print "  [(set (match_dup 0) (${extend}_extend:${resultmode} (match_dup 1)))\n";
! 	  }
! 	  print "   (set (match_dup 2)\n";
! 	  print "        (compare:${ccmode} (match_dup 0) (match_dup 3)))]\n";
! 	  print "  \"\"\n";
! 	  print "  [(set_attr \"type\" \"fused_load_cmpi\")\n";
! 	  print "   (set_attr \"cost\" \"8\")\n";
! 	  print "   (set_attr \"length\" \"8\")])\n";
! 	  print "\n";
        }
      }
    }
--- 53,188 ----
      return '?';
  }
  
+ sub gen_ld_cmpi_p10_one
+ {
+   my ($lmode, $result, $ccmode) = @_;
+ 
+   my $np = "NON_PREFIXED_D";
+   my $mempred = "non_update_memory_operand";
+   my $extend;
+ 
+   # We need to special case lwa.  The prefixed_load_p function in rs6000.cc
+   # (which determines if a load instruction is prefixed) uses the fact that the
+   # register mode is different from the memory mode, and that the sign_extend
+   # attribute is set to use DS-form rules for the address instead of D-form.
+   # If the register size is the same, prefixed_load_p assumes we are doing a
+   # lwz.  We change to use an lwz and word compare if we don't need to sign
+   # extend the SImode value.  Otherwise if we need the value, we need to
+   # make sure the insn is marked as ds-form.
+   my $cmp_size_char = ($lmode eq "SI"
+ 		       && $ccmode eq "CC"
+ 		       && $result !~ /^EXT|^DI$/) ? "w" : "d";
+ 
+   if ($ccmode eq "CC") {
+     # ld and lwa are both DS-FORM.
+     ($lmode eq "DI") and $np = "NON_PREFIXED_DS";
+     ($lmode eq "SI" && $cmp_size_char eq "d") and $np = "NON_PREFIXED_DS";
+   } else {
+     if ($lmode eq "DI") {
+       # ld is DS-form, but lwz is not.
+       $np = "NON_PREFIXED_DS";
+     }
+   }
+ 
+   my $cmpl = ($ccmode eq "CC") ? "" : "l";
+   my $echr = ($ccmode eq "CC" && $cmp_size_char eq "d") ? "a" : "z";
+   if ($lmode eq "DI") { $echr = ""; }
+   my $constpred = ($ccmode eq "CC") ? "const_m1_to_1_operand"
+   				    : "const_0_to_1_operand";
+ 
+   # For clobber, we need a SI/DI reg in case we
+   # split because we have to sign/zero extend.
+   my $clobbermode = ($lmode =~ /^[QH]I$/) ? "GPR" : $lmode;
+   if ($result =~ /^EXT/ || $result eq "GPR" || $clobbermode eq "GPR") {
+     # We always need extension if result > lmode.
+     $extend = ($ccmode eq "CC") ? "sign" : "zero";
+   } else {
+     # Result of SI/DI does not need sign extension.
+     $extend = "none";
+   }
+ 
+   my $ldst = mode_to_ldst_char($lmode);
+ 
+   # DS-form addresses need YZ, and not m.
+   my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m";
+   print <<HERE;
+ ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
+ ;; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend
+ (define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}${cmp_size_char}i_cr0_${lmode}_${result}_${ccmode}_${extend}"
+   [(set (match_operand:${ccmode} 2 "cc_reg_operand" "=x")
+         (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "${constraint}")
+ HERE
+   print "   " if $ccmode eq "CCUNS";
+ print <<HERE;
+                     (match_operand:${lmode} 3 "${constpred}" "n")))
+ HERE
+ 
+   if ($result eq "clobber") {
+     print <<HERE;
+    (clobber (match_scratch:${clobbermode} 0 "=r"))]
+ HERE
+   } elsif ($result eq $lmode) {
+     print <<HERE;
+    (set (match_operand:${result} 0 "gpc_reg_operand" "=r") (match_dup 1))]
+ HERE
+   } else {
+     print <<HERE;
+    (set (match_operand:${result} 0 "gpc_reg_operand" "=r") (${extend}_extend:${result} (match_dup 1)))]
+ HERE
+   }
+ 
+   print <<HERE;
+   "(TARGET_P10_FUSION)"
+   "l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}${cmp_size_char}i %2,%0,%3"
+   "&& reload_completed
+    && (cc_reg_not_cr0_operand (operands[2], CCmode)
+        || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
+                                       ${lmode}mode, ${np}))"
+ HERE
+ 
+   if ($extend eq "none") {
+     print "  [(set (match_dup 0) (match_dup 1))\n";
+   } elsif ($result eq "clobber") {
+     print "  [(set (match_dup 0) (${extend}_extend:${clobbermode} (match_dup 1)))\n";
+   } else {
+     print "  [(set (match_dup 0) (${extend}_extend:${result} (match_dup 1)))\n";
+   }
+ 
+   print <<HERE;
+    (set (match_dup 2)
+         (compare:${ccmode} (match_dup 0) (match_dup 3)))]
+   ""
+   [(set_attr "type" "fused_load_cmpi")
+    (set_attr "cost" "8")
+ HERE
+ 
+   if ($lmode eq "SI" && $ccmode eq "CC" && $cmp_size_char eq "d") {
+     # prefixed_load_p needs the sign_extend attribute to validate lwa as a
+     # DS-form instruction instead of D-form.
+     print "   (set_attr \"sign_extend\" \"yes\")\n";
+   }
+ 
+   print <<HERE
+    (set_attr "length" "8")])
+ 
+ HERE
+ }
+ 
  sub gen_ld_cmpi_p10
  {
!   foreach my $lmode (qw/DI SI HI QI/) {
!     foreach my $result ("clobber", $lmode,  "EXT$lmode") {
!       # EXTDI does not exist, and we cannot directly produce HI/QI results.
!       next if $result =~ /^(QI|HI|EXTDI)$/;
  
!       # Don't allow EXTQI because that would allow HI result which we can't do.
!       $result = "GPR" if $result eq "EXTQI";
  
!       foreach my $ccmode (qw/CC CCUNS/) {
! 	# We do not have signed single-byte loads.
! 	next if ($lmode eq "QI" and $ccmode eq "CC");
! 
! 	gen_ld_cmpi_p10_one($lmode, $result, $ccmode);
        }
      }
    }
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/mma.md gcc-12.4.0/gcc/config/rs6000/mma.md
*** gcc-12.3.0/gcc/config/rs6000/mma.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/mma.md	Thu Jun 20 08:08:06 2024
***************
*** 293,300 ****
  })
  
  (define_insn_and_split "*movoo"
!   [(set (match_operand:OO 0 "nonimmediate_operand" "=wa,m,wa")
! 	(match_operand:OO 1 "input_operand" "m,wa,wa"))]
    "TARGET_MMA
     && (gpc_reg_operand (operands[0], OOmode)
         || gpc_reg_operand (operands[1], OOmode))"
--- 293,300 ----
  })
  
  (define_insn_and_split "*movoo"
!   [(set (match_operand:OO 0 "nonimmediate_operand" "=wa,ZwO,wa")
! 	(match_operand:OO 1 "input_operand" "ZwO,wa,wa"))]
    "TARGET_MMA
     && (gpc_reg_operand (operands[0], OOmode)
         || gpc_reg_operand (operands[1], OOmode))"
***************
*** 340,347 ****
  })
  
  (define_insn_and_split "*movxo"
!   [(set (match_operand:XO 0 "nonimmediate_operand" "=d,m,d")
! 	(match_operand:XO 1 "input_operand" "m,d,d"))]
    "TARGET_MMA
     && (gpc_reg_operand (operands[0], XOmode)
         || gpc_reg_operand (operands[1], XOmode))"
--- 340,347 ----
  })
  
  (define_insn_and_split "*movxo"
!   [(set (match_operand:XO 0 "nonimmediate_operand" "=d,ZwO,d")
! 	(match_operand:XO 1 "input_operand" "ZwO,d,d"))]
    "TARGET_MMA
     && (gpc_reg_operand (operands[0], XOmode)
         || gpc_reg_operand (operands[1], XOmode))"
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/predicates.md gcc-12.4.0/gcc/config/rs6000/predicates.md
*** gcc-12.3.0/gcc/config/rs6000/predicates.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/predicates.md	Thu Jun 20 08:08:06 2024
***************
*** 798,803 ****
--- 798,840 ----
  	    (and (match_test "easy_altivec_constant (op, mode)")
  		 (match_test "vspltis_shifted (op) != 0")))))
  
+ ;; Return true if this is a vector constant and each byte in
+ ;; it is the same.
+ (define_predicate "const_vector_each_byte_same"
+   (match_code "const_vector")
+ {
+   rtx elt;
+   if (!const_vec_duplicate_p (op, &elt))
+     return false;
+ 
+   machine_mode emode = GET_MODE_INNER (mode);
+   unsigned HOST_WIDE_INT eval;
+   if (CONST_INT_P (elt))
+     eval = INTVAL (elt);
+   else if (CONST_DOUBLE_AS_FLOAT_P (elt))
+     {
+       gcc_assert (emode == SFmode || emode == DFmode);
+       long l[2];
+       real_to_target (l, CONST_DOUBLE_REAL_VALUE (elt), emode);
+       /* real_to_target puts 32-bit pieces in each long.  */
+       eval = zext_hwi (l[0], 32);
+       eval |= zext_hwi (l[1], 32) << 32;
+     }
+   else
+     return false;
+ 
+   unsigned int esize = GET_MODE_SIZE (emode);
+   unsigned char byte0 = eval & 0xff;
+   for (unsigned int i = 1; i < esize; i++)
+     {
+       eval >>= BITS_PER_UNIT;
+       if (byte0 != (eval & 0xff))
+ 	return false;
+     }
+ 
+   return true;
+ })
+ 
  ;; Return 1 if operand is a vector int register or is either a vector constant
  ;; of all 0 bits of a vector constant of all 1 bits.
  (define_predicate "vector_int_reg_or_same_bit"
***************
*** 876,882 ****
  (define_predicate "vsx_quad_dform_memory_operand"
    (match_code "mem")
  {
!   if (!TARGET_P9_VECTOR || !MEM_P (op) || GET_MODE_SIZE (mode) != 16)
      return false;
  
    return quad_address_p (XEXP (op, 0), mode, false);
--- 913,919 ----
  (define_predicate "vsx_quad_dform_memory_operand"
    (match_code "mem")
  {
!   if (!TARGET_P9_VECTOR)
      return false;
  
    return quad_address_p (XEXP (op, 0), mode, false);
***************
*** 1088,1107 ****
    return INTVAL (offset) % 4 == 0;
  })
  
- ;; Return 1 if the operand is a memory operand that has a valid address for
- ;; a DS-form instruction. I.e. the address has to be either just a register,
- ;; or register + const where the two low order bits of const are zero.
- (define_predicate "ds_form_mem_operand"
-   (match_code "subreg,mem")
- {
-   if (!any_memory_operand (op, mode))
-     return false;
- 
-   rtx addr = XEXP (op, 0);
- 
-   return address_to_insn_form (addr, mode, NON_PREFIXED_DS) == INSN_FORM_DS;
- })
- 
  ;; Return 1 if the operand, used inside a MEM, is a SYMBOL_REF.
  (define_predicate "symbol_ref_operand"
    (and (match_code "symbol_ref")
--- 1125,1130 ----
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000-builtin.cc gcc-12.4.0/gcc/config/rs6000/rs6000-builtin.cc
*** gcc-12.3.0/gcc/config/rs6000/rs6000-builtin.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000-builtin.cc	Thu Jun 20 08:08:06 2024
*************** rs6000_builtin_is_supported (enum rs6000
*** 168,174 ****
      case ENB_P7_64:
        return TARGET_POPCNTD && TARGET_POWERPC64;
      case ENB_P8:
!       return TARGET_DIRECT_MOVE;
      case ENB_P8V:
        return TARGET_P8_VECTOR;
      case ENB_P9:
--- 168,174 ----
      case ENB_P7_64:
        return TARGET_POPCNTD && TARGET_POWERPC64;
      case ENB_P8:
!       return TARGET_POWER8;
      case ENB_P8V:
        return TARGET_P8_VECTOR;
      case ENB_P9:
*************** rs6000_init_builtins (void)
*** 869,875 ****
  	    continue;
  	  if (e == ENB_MMA && !TARGET_MMA)
  	    continue;
! 	  tree fntype = rs6000_builtin_info[i].fntype;
  	  tree t = TREE_TYPE (fntype);
  	  fprintf (stderr, "%s %s (", rs6000_type_string (t),
  		   rs6000_builtin_info[i].bifname);
--- 869,875 ----
  	    continue;
  	  if (e == ENB_MMA && !TARGET_MMA)
  	    continue;
! 	  tree fntype = rs6000_builtin_info_fntype[i];
  	  tree t = TREE_TYPE (fntype);
  	  fprintf (stderr, "%s %s (", rs6000_type_string (t),
  		   rs6000_builtin_info[i].bifname);
*************** rs6000_gimple_fold_builtin (gimple_stmt_
*** 1920,1926 ****
  	tree lhs_type = TREE_TYPE (lhs);
  	/* In GIMPLE the type of the MEM_REF specifies the alignment.  The
  	  required alignment (power) is 4 bytes regardless of data type.  */
! 	tree align_ltype = build_aligned_type (lhs_type, 4);
  	/* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'.  Create
  	   the tree using the value from arg0.  The resulting type will match
  	   the type of arg1.  */
--- 1920,1926 ----
  	tree lhs_type = TREE_TYPE (lhs);
  	/* In GIMPLE the type of the MEM_REF specifies the alignment.  The
  	  required alignment (power) is 4 bytes regardless of data type.  */
! 	tree align_ltype = build_aligned_type (lhs_type, 32);
  	/* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'.  Create
  	   the tree using the value from arg0.  The resulting type will match
  	   the type of arg1.  */
*************** rs6000_gimple_fold_builtin (gimple_stmt_
*** 1964,1970 ****
  	tree arg2_type = ptr_type_node;
  	/* In GIMPLE the type of the MEM_REF specifies the alignment.  The
  	   required alignment (power) is 4 bytes regardless of data type.  */
! 	tree align_stype = build_aligned_type (arg0_type, 4);
  	/* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'.  Create
  	   the tree using the value from arg1.  */
  	gimple_seq stmts = NULL;
--- 1964,1970 ----
  	tree arg2_type = ptr_type_node;
  	/* In GIMPLE the type of the MEM_REF specifies the alignment.  The
  	   required alignment (power) is 4 bytes regardless of data type.  */
! 	tree align_stype = build_aligned_type (arg0_type, 32);
  	/* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'.  Create
  	   the tree using the value from arg1.  */
  	gimple_seq stmts = NULL;
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000-builtins.def gcc-12.4.0/gcc/config/rs6000/rs6000-builtins.def
*** gcc-12.3.0/gcc/config/rs6000/rs6000-builtins.def	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000-builtins.def	Thu Jun 20 08:08:06 2024
***************
*** 2008,2013 ****
--- 2008,2020 ----
    const vsll __builtin_vsx_xxspltd_2di (vsll, const int<1>);
      XXSPLTD_V2DI vsx_xxspltd_v2di {}
  
+   const vsq __builtin_pack_vector_int128 (unsigned long long, \
+                                           unsigned long long);
+     PACK_V1TI packv1ti {}
+ 
+   const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>);
+     UNPACK_V1TI unpackv1ti {}
+ 
  
  ; Power7 builtins (ISA 2.06).
  [power7]
***************
*** 2029,2044 ****
    const unsigned int __builtin_divweu (unsigned int, unsigned int);
      DIVWEU diveu_si {}
  
-   const vsq __builtin_pack_vector_int128 (unsigned long long, \
-                                           unsigned long long);
-     PACK_V1TI packv1ti {}
- 
    void __builtin_ppc_speculation_barrier ();
      SPECBARR speculation_barrier {}
  
-   const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>);
-     UNPACK_V1TI unpackv1ti {}
- 
  
  ; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing).
  [power7-64]
--- 2036,2044 ----
***************
*** 2796,2801 ****
--- 2796,2814 ----
    const vsi __builtin_vsx_xxbrw_v4si (vsi);
      XXBRW_V4SI p9_xxbrw_v4si {}
  
+   const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
+     VSCEQPEQ xscmpexpqp_eq_kf {}
+ 
+   const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128);
+     VSCEQPGT xscmpexpqp_gt_kf {}
+ 
+   const signed int __builtin_vsx_scalar_cmp_exp_qp_lt (_Float128, _Float128);
+     VSCEQPLT xscmpexpqp_lt_kf {}
+ 
+   const signed int \
+       __builtin_vsx_scalar_cmp_exp_qp_unordered (_Float128, _Float128);
+     VSCEQPUO xscmpexpqp_unordered_kf {}
+ 
  
  ; Miscellaneous P9 functions
  [power9]
***************
*** 2878,2896 ****
    fpmath _Float128 __builtin_mulf128_round_to_odd (_Float128, _Float128);
      MULF128_ODD mulkf3_odd {}
  
-   const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
-     VSCEQPEQ xscmpexpqp_eq_kf {}
- 
-   const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128);
-     VSCEQPGT xscmpexpqp_gt_kf {}
- 
-   const signed int __builtin_vsx_scalar_cmp_exp_qp_lt (_Float128, _Float128);
-     VSCEQPLT xscmpexpqp_lt_kf {}
- 
-   const signed int \
-       __builtin_vsx_scalar_cmp_exp_qp_unordered (_Float128, _Float128);
-     VSCEQPUO xscmpexpqp_unordered_kf {}
- 
    fpmath _Float128 __builtin_sqrtf128_round_to_odd (_Float128);
      SQRTF128_ODD sqrtkf2_odd {}
  
--- 2891,2896 ----
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000-c.cc gcc-12.4.0/gcc/config/rs6000/rs6000-c.cc
*** gcc-12.3.0/gcc/config/rs6000/rs6000-c.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000-c.cc	Thu Jun 20 08:08:06 2024
*************** rs6000_target_modify_macros (bool define
*** 432,450 ****
      rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6");
    if ((flags & OPTION_MASK_POPCNTD) != 0)
      rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7");
!   /* Note that the OPTION_MASK_DIRECT_MOVE flag is automatically
!      turned on in the following condition:
!      1. TARGET_P8_VECTOR is enabled and OPTION_MASK_DIRECT_MOVE is not
!         explicitly disabled.
!         Hereafter, the OPTION_MASK_DIRECT_MOVE flag is considered to
!         have been turned on explicitly.
!      Note that the OPTION_MASK_DIRECT_MOVE flag is automatically
!      turned off in any of the following conditions:
!      1. TARGET_HARD_FLOAT, TARGET_ALTIVEC, or TARGET_VSX is explicitly
! 	disabled and OPTION_MASK_DIRECT_MOVE was not explicitly
! 	enabled.
!      2. TARGET_VSX is off.  */
!   if ((flags & OPTION_MASK_DIRECT_MOVE) != 0)
      rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR8");
    if ((flags & OPTION_MASK_MODULO) != 0)
      rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9");
--- 432,438 ----
      rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6");
    if ((flags & OPTION_MASK_POPCNTD) != 0)
      rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7");
!   if ((flags & OPTION_MASK_POWER8) != 0)
      rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR8");
    if ((flags & OPTION_MASK_MODULO) != 0)
      rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9");
*************** resolve_vec_step (resolution *res, vec<t
*** 1675,1708 ****
     UNSUPPORTED_BUILTIN to true.  If we don't match, return error_mark_node
     and leave UNSUPPORTED_BUILTIN alone.  */
  
! tree
! find_instance (bool *unsupported_builtin, ovlddata **instance,
  	       rs6000_gen_builtins instance_code,
  	       rs6000_gen_builtins fcode,
  	       tree *types, tree *args)
  {
!   while (*instance && (*instance)->bifid != instance_code)
!     *instance = (*instance)->next;
  
!   ovlddata *inst = *instance;
!   gcc_assert (inst != NULL);
    /* It is possible for an instance to require a data type that isn't
!      defined on this target, in which case inst->fntype will be NULL.  */
!   if (!inst->fntype)
      return error_mark_node;
!   tree fntype = rs6000_builtin_info[inst->bifid].fntype;
    tree parmtype0 = TREE_VALUE (TYPE_ARG_TYPES (fntype));
    tree parmtype1 = TREE_VALUE (TREE_CHAIN (TYPE_ARG_TYPES (fntype)));
  
    if (rs6000_builtin_type_compatible (types[0], parmtype0)
        && rs6000_builtin_type_compatible (types[1], parmtype1))
      {
!       if (rs6000_builtin_decl (inst->bifid, false) != error_mark_node
! 	  && rs6000_builtin_is_supported (inst->bifid))
  	{
! 	  tree ret_type = TREE_TYPE (inst->fntype);
  	  return altivec_build_resolved_builtin (args, 2, fntype, ret_type,
! 						 inst->bifid, fcode);
  	}
        else
  	*unsupported_builtin = true;
--- 1663,1699 ----
     UNSUPPORTED_BUILTIN to true.  If we don't match, return error_mark_node
     and leave UNSUPPORTED_BUILTIN alone.  */
  
! static tree
! find_instance (bool *unsupported_builtin, int *instance,
  	       rs6000_gen_builtins instance_code,
  	       rs6000_gen_builtins fcode,
  	       tree *types, tree *args)
  {
!   while (*instance != -1
! 	 && rs6000_instance_info[*instance].bifid != instance_code)
!     *instance = rs6000_instance_info[*instance].next;
  
!   int inst = *instance;
!   gcc_assert (inst != -1);
    /* It is possible for an instance to require a data type that isn't
!      defined on this target, in which case rs6000_instance_info_fntype[inst]
!      will be NULL.  */
!   if (!rs6000_instance_info_fntype[inst])
      return error_mark_node;
!   rs6000_gen_builtins bifid = rs6000_instance_info[inst].bifid;
!   tree fntype = rs6000_builtin_info_fntype[bifid];
    tree parmtype0 = TREE_VALUE (TYPE_ARG_TYPES (fntype));
    tree parmtype1 = TREE_VALUE (TREE_CHAIN (TYPE_ARG_TYPES (fntype)));
  
    if (rs6000_builtin_type_compatible (types[0], parmtype0)
        && rs6000_builtin_type_compatible (types[1], parmtype1))
      {
!       if (rs6000_builtin_decl (bifid, false) != error_mark_node
! 	  && rs6000_builtin_is_supported (bifid))
  	{
! 	  tree ret_type = TREE_TYPE (rs6000_instance_info_fntype[inst]);
  	  return altivec_build_resolved_builtin (args, 2, fntype, ret_type,
! 						 bifid, fcode);
  	}
        else
  	*unsupported_builtin = true;
*************** altivec_resolve_overloaded_builtin (loca
*** 1885,1895 ****
    bool unsupported_builtin = false;
    rs6000_gen_builtins instance_code;
    bool supported = false;
!   ovlddata *instance = rs6000_overload_info[adj_fcode].first_instance;
!   gcc_assert (instance != NULL);
  
    /* Functions with no arguments can have only one overloaded instance.  */
!   gcc_assert (nargs > 0 || !instance->next);
  
    /* Standard overload processing involves determining whether an instance
       exists that is type-compatible with the overloaded function call.  In
--- 1876,1886 ----
    bool unsupported_builtin = false;
    rs6000_gen_builtins instance_code;
    bool supported = false;
!   int instance = rs6000_overload_info[adj_fcode].first_instance;
!   gcc_assert (instance != -1);
  
    /* Functions with no arguments can have only one overloaded instance.  */
!   gcc_assert (nargs > 0 || rs6000_instance_info[instance].next == -1);
  
    /* Standard overload processing involves determining whether an instance
       exists that is type-compatible with the overloaded function call.  In
*************** altivec_resolve_overloaded_builtin (loca
*** 1963,1978 ****
        /* Standard overload processing.  Look for an instance with compatible
  	 parameter types.  If it is supported in the current context, resolve
  	 the overloaded call to that instance.  */
!       for (; instance != NULL; instance = instance->next)
  	{
  	  /* It is possible for an instance to require a data type that isn't
! 	     defined on this target, in which case instance->fntype will be
  	     NULL.  */
! 	  if (!instance->fntype)
  	    continue;
  
  	  bool mismatch = false;
! 	  tree nextparm = TYPE_ARG_TYPES (instance->fntype);
  
  	  for (unsigned int arg_i = 0;
  	       arg_i < nargs && nextparm != NULL;
--- 1954,1971 ----
        /* Standard overload processing.  Look for an instance with compatible
  	 parameter types.  If it is supported in the current context, resolve
  	 the overloaded call to that instance.  */
!       for (; instance != -1; instance = rs6000_instance_info[instance].next)
  	{
+ 	  tree fntype = rs6000_instance_info_fntype[instance];
+ 	  rs6000_gen_builtins bifid = rs6000_instance_info[instance].bifid;
  	  /* It is possible for an instance to require a data type that isn't
! 	     defined on this target, in which case fntype will be
  	     NULL.  */
! 	  if (!fntype)
  	    continue;
  
  	  bool mismatch = false;
! 	  tree nextparm = TYPE_ARG_TYPES (fntype);
  
  	  for (unsigned int arg_i = 0;
  	       arg_i < nargs && nextparm != NULL;
*************** altivec_resolve_overloaded_builtin (loca
*** 1990,2004 ****
  	  if (mismatch)
  	    continue;
  
! 	  supported = rs6000_builtin_is_supported (instance->bifid);
! 	  if (rs6000_builtin_decl (instance->bifid, false) != error_mark_node
  	      && supported)
  	    {
! 	      tree fntype = rs6000_builtin_info[instance->bifid].fntype;
! 	      tree ret_type = TREE_TYPE (instance->fntype);
  	      return altivec_build_resolved_builtin (args, nargs, fntype,
! 						     ret_type, instance->bifid,
! 						     fcode);
  	    }
  	  else
  	    {
--- 1983,1996 ----
  	  if (mismatch)
  	    continue;
  
! 	  supported = rs6000_builtin_is_supported (bifid);
! 	  if (rs6000_builtin_decl (bifid, false) != error_mark_node
  	      && supported)
  	    {
! 	      tree ret_type = TREE_TYPE (fntype);
! 	      fntype = rs6000_builtin_info_fntype[bifid];
  	      return altivec_build_resolved_builtin (args, nargs, fntype,
! 						     ret_type, bifid, fcode);
  	    }
  	  else
  	    {
*************** altivec_resolve_overloaded_builtin (loca
*** 2015,2026 ****
  	{
  	  /* Indicate that the instantiation of the overloaded builtin
  	     name is not available with the target flags in effect.  */
! 	  rs6000_gen_builtins fcode = (rs6000_gen_builtins) instance->bifid;
  	  rs6000_invalid_builtin (fcode);
  	  /* Provide clarity of the relationship between the overload
  	     and the instantiation.  */
! 	  const char *internal_name
! 	    = rs6000_builtin_info[instance->bifid].bifname;
  	  rich_location richloc (line_table, input_location);
  	  inform (&richloc,
  		  "overloaded builtin %qs is implemented by builtin %qs",
--- 2007,2018 ----
  	{
  	  /* Indicate that the instantiation of the overloaded builtin
  	     name is not available with the target flags in effect.  */
! 	  rs6000_gen_builtins bifid = rs6000_instance_info[instance].bifid;
! 	  rs6000_gen_builtins fcode = (rs6000_gen_builtins) bifid;
  	  rs6000_invalid_builtin (fcode);
  	  /* Provide clarity of the relationship between the overload
  	     and the instantiation.  */
! 	  const char *internal_name = rs6000_builtin_info[bifid].bifname;
  	  rich_location richloc (line_table, input_location);
  	  inform (&richloc,
  		  "overloaded builtin %qs is implemented by builtin %qs",
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000-cpus.def gcc-12.4.0/gcc/config/rs6000/rs6000-cpus.def
*** gcc-12.3.0/gcc/config/rs6000/rs6000-cpus.def	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000-cpus.def	Thu Jun 20 08:08:06 2024
***************
*** 47,55 ****
     fusion here, instead set it in rs6000.cc if we are tuning for a power8
     system.  */
  #define ISA_2_7_MASKS_SERVER	(ISA_2_6_MASKS_SERVER			\
  				 | OPTION_MASK_P8_VECTOR		\
  				 | OPTION_MASK_CRYPTO			\
- 				 | OPTION_MASK_DIRECT_MOVE		\
  				 | OPTION_MASK_EFFICIENT_UNALIGNED_VSX	\
  				 | OPTION_MASK_QUAD_MEMORY		\
  				 | OPTION_MASK_QUAD_MEMORY_ATOMIC)
--- 47,55 ----
     fusion here, instead set it in rs6000.cc if we are tuning for a power8
     system.  */
  #define ISA_2_7_MASKS_SERVER	(ISA_2_6_MASKS_SERVER			\
+ 				 | OPTION_MASK_POWER8			\
  				 | OPTION_MASK_P8_VECTOR		\
  				 | OPTION_MASK_CRYPTO			\
  				 | OPTION_MASK_EFFICIENT_UNALIGNED_VSX	\
  				 | OPTION_MASK_QUAD_MEMORY		\
  				 | OPTION_MASK_QUAD_MEMORY_ATOMIC)
***************
*** 94,100 ****
  /* Flags that need to be turned off if -mno-power8-vector.  */
  #define OTHER_P8_VECTOR_MASKS	(OTHER_P9_VECTOR_MASKS			\
  				 | OPTION_MASK_P9_VECTOR		\
- 				 | OPTION_MASK_DIRECT_MOVE		\
  				 | OPTION_MASK_CRYPTO)
  
  /* Flags that need to be turned off if -mno-vsx.  */
--- 94,99 ----
***************
*** 125,131 ****
  				 | OPTION_MASK_CMPB			\
  				 | OPTION_MASK_CRYPTO			\
  				 | OPTION_MASK_DFP			\
- 				 | OPTION_MASK_DIRECT_MOVE		\
  				 | OPTION_MASK_DLMZB			\
  				 | OPTION_MASK_EFFICIENT_UNALIGNED_VSX	\
  				 | OPTION_MASK_FLOAT128_HW		\
--- 124,129 ----
***************
*** 140,145 ****
--- 138,144 ----
  				 | OPTION_MASK_MODULO			\
  				 | OPTION_MASK_MULHW			\
  				 | OPTION_MASK_NO_UPDATE		\
+ 				 | OPTION_MASK_POWER8			\
  				 | OPTION_MASK_P8_FUSION		\
  				 | OPTION_MASK_P8_VECTOR		\
  				 | OPTION_MASK_P9_MINMAX		\
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000-gen-builtins.cc gcc-12.4.0/gcc/config/rs6000/rs6000-gen-builtins.cc
*** gcc-12.3.0/gcc/config/rs6000/rs6000-gen-builtins.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000-gen-builtins.cc	Thu Jun 20 08:08:06 2024
*************** write_decls (void)
*** 2261,2280 ****
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file, "#define PPC_MAXRESTROPNDS 3\n");
!   fprintf (header_file, "struct GTY(()) bifdata\n");
    fprintf (header_file, "{\n");
!   fprintf (header_file, "  const char *GTY((skip(\"\"))) bifname;\n");
!   fprintf (header_file, "  bif_enable GTY((skip(\"\"))) enable;\n");
!   fprintf (header_file, "  tree fntype;\n");
!   fprintf (header_file, "  insn_code GTY((skip(\"\"))) icode;\n");
!   fprintf (header_file, "  int  nargs;\n");
!   fprintf (header_file, "  int  bifattrs;\n");
!   fprintf (header_file, "  int  restr_opnd[PPC_MAXRESTROPNDS];\n");
!   fprintf (header_file, "  restriction GTY((skip(\"\"))) restr[PPC_MAXRESTROPNDS];\n");
!   fprintf (header_file, "  int  restr_val1[PPC_MAXRESTROPNDS];\n");
!   fprintf (header_file, "  int  restr_val2[PPC_MAXRESTROPNDS];\n");
!   fprintf (header_file, "  const char *GTY((skip(\"\"))) attr_string;\n");
!   fprintf (header_file, "  rs6000_gen_builtins GTY((skip(\"\"))) assoc_bif;\n");
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file, "#define bif_init_bit\t\t(0x00000001)\n");
--- 2261,2279 ----
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file, "#define PPC_MAXRESTROPNDS 3\n");
!   fprintf (header_file, "struct bifdata\n");
    fprintf (header_file, "{\n");
!   fprintf (header_file, "  const char *bifname;\n");
!   fprintf (header_file, "  bif_enable enable;\n");
!   fprintf (header_file, "  insn_code icode;\n");
!   fprintf (header_file, "  int nargs;\n");
!   fprintf (header_file, "  int bifattrs;\n");
!   fprintf (header_file, "  int restr_opnd[PPC_MAXRESTROPNDS];\n");
!   fprintf (header_file, "  restriction restr[PPC_MAXRESTROPNDS];\n");
!   fprintf (header_file, "  int restr_val1[PPC_MAXRESTROPNDS];\n");
!   fprintf (header_file, "  int restr_val2[PPC_MAXRESTROPNDS];\n");
!   fprintf (header_file, "  const char *attr_string;\n");
!   fprintf (header_file, "  rs6000_gen_builtins assoc_bif;\n");
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file, "#define bif_init_bit\t\t(0x00000001)\n");
*************** write_decls (void)
*** 2353,2376 ****
    fprintf (header_file, "\n");
  
    fprintf (header_file,
! 	   "extern GTY(()) bifdata rs6000_builtin_info[RS6000_BIF_MAX];\n\n");
  
!   fprintf (header_file, "struct GTY(()) ovlddata\n");
    fprintf (header_file, "{\n");
!   fprintf (header_file, "  const char *GTY((skip(\"\"))) bifname;\n");
!   fprintf (header_file, "  rs6000_gen_builtins GTY((skip(\"\"))) bifid;\n");
!   fprintf (header_file, "  tree fntype;\n");
!   fprintf (header_file, "  ovlddata *GTY((skip(\"\"))) next;\n");
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file, "struct ovldrecord\n");
    fprintf (header_file, "{\n");
    fprintf (header_file, "  const char *ovld_name;\n");
!   fprintf (header_file, "  ovlddata *first_instance;\n");
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file,
! 	   "extern GTY(()) ovlddata rs6000_instance_info[RS6000_INST_MAX];\n");
    fprintf (header_file, "extern ovldrecord rs6000_overload_info[];\n\n");
  
    fprintf (header_file, "extern void rs6000_init_generated_builtins ();\n\n");
--- 2352,2379 ----
    fprintf (header_file, "\n");
  
    fprintf (header_file,
! 	   "extern bifdata rs6000_builtin_info[RS6000_BIF_MAX];\n\n");
  
!   fprintf (header_file,
! 	   "extern GTY(()) tree rs6000_builtin_info_fntype[RS6000_BIF_MAX];\n\n");
! 
!   fprintf (header_file, "struct ovlddata\n");
    fprintf (header_file, "{\n");
!   fprintf (header_file, "  const char *bifname;\n");
!   fprintf (header_file, "  rs6000_gen_builtins bifid;\n");
!   fprintf (header_file, "  int next;\n");
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file, "struct ovldrecord\n");
    fprintf (header_file, "{\n");
    fprintf (header_file, "  const char *ovld_name;\n");
!   fprintf (header_file, "  int first_instance;\n");
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file,
! 	   "extern ovlddata rs6000_instance_info[RS6000_INST_MAX];\n");
!   fprintf (header_file, "extern GTY(()) tree "
! 	   "rs6000_instance_info_fntype[RS6000_INST_MAX];\n");
    fprintf (header_file, "extern ovldrecord rs6000_overload_info[];\n\n");
  
    fprintf (header_file, "extern void rs6000_init_generated_builtins ();\n\n");
*************** write_bif_static_init (void)
*** 2481,2487 ****
    fprintf (init_file, "bifdata rs6000_builtin_info[RS6000_BIF_MAX] =\n");
    fprintf (init_file, "  {\n");
    fprintf (init_file, "    { /* RS6000_BIF_NONE: */\n");
!   fprintf (init_file, "      \"\", ENB_ALWAYS, 0, CODE_FOR_nothing, 0,\n");
    fprintf (init_file, "      0, {0, 0, 0}, {RES_NONE, RES_NONE, RES_NONE},\n");
    fprintf (init_file, "      {0, 0, 0}, {0, 0, 0}, \"\", RS6000_BIF_NONE\n");
    fprintf (init_file, "    },\n");
--- 2484,2490 ----
    fprintf (init_file, "bifdata rs6000_builtin_info[RS6000_BIF_MAX] =\n");
    fprintf (init_file, "  {\n");
    fprintf (init_file, "    { /* RS6000_BIF_NONE: */\n");
!   fprintf (init_file, "      \"\", ENB_ALWAYS, CODE_FOR_nothing, 0,\n");
    fprintf (init_file, "      0, {0, 0, 0}, {RES_NONE, RES_NONE, RES_NONE},\n");
    fprintf (init_file, "      {0, 0, 0}, {0, 0, 0}, \"\", RS6000_BIF_NONE\n");
    fprintf (init_file, "    },\n");
*************** write_bif_static_init (void)
*** 2493,2500 ****
  	       bifp->proto.bifname);
        fprintf (init_file, "      /* enable*/\t%s,\n",
  	       enable_string[bifp->stanza]);
-       /* Type must be instantiated at run time.  */
-       fprintf (init_file, "      /* fntype */\t0,\n");
        fprintf (init_file, "      /* icode */\tCODE_FOR_%s,\n",
  	       bifp->patname);
        fprintf (init_file, "      /* nargs */\t%d,\n",
--- 2496,2501 ----
*************** write_bif_static_init (void)
*** 2586,2591 ****
--- 2587,2594 ----
        fprintf (init_file, "    },\n");
      }
    fprintf (init_file, "  };\n\n");
+ 
+   fprintf (init_file, "tree rs6000_builtin_info_fntype[RS6000_BIF_MAX];\n\n");
  }
  
  /* Write the decls and initializers for rs6000_overload_info[] and
*************** write_ovld_static_init (void)
*** 2598,2604 ****
  	   "- RS6000_OVLD_NONE] =\n");
    fprintf (init_file, "  {\n");
    fprintf (init_file, "    { /* RS6000_OVLD_NONE: */\n");
!   fprintf (init_file, "      \"\", NULL\n");
    fprintf (init_file, "    },\n");
    for (int i = 0; i <= curr_ovld_stanza; i++)
      {
--- 2601,2607 ----
  	   "- RS6000_OVLD_NONE] =\n");
    fprintf (init_file, "  {\n");
    fprintf (init_file, "    { /* RS6000_OVLD_NONE: */\n");
!   fprintf (init_file, "      \"\", -1\n");
    fprintf (init_file, "    },\n");
    for (int i = 0; i <= curr_ovld_stanza; i++)
      {
*************** write_ovld_static_init (void)
*** 2607,2613 ****
        fprintf (init_file, "      /* ovld_name */\t\"%s\",\n",
  	       ovld_stanzas[i].intern_name);
        /* First-instance must currently be instantiated at run time.  */
!       fprintf (init_file, "      /* first_instance */\tNULL\n");
        fprintf (init_file, "    },\n");
      }
    fprintf (init_file, "  };\n\n");
--- 2610,2616 ----
        fprintf (init_file, "      /* ovld_name */\t\"%s\",\n",
  	       ovld_stanzas[i].intern_name);
        /* First-instance must currently be instantiated at run time.  */
!       fprintf (init_file, "      /* first_instance */\t-1\n");
        fprintf (init_file, "    },\n");
      }
    fprintf (init_file, "  };\n\n");
*************** write_ovld_static_init (void)
*** 2615,2621 ****
    fprintf (init_file, "ovlddata rs6000_instance_info[RS6000_INST_MAX] =\n");
    fprintf (init_file, "  {\n");
    fprintf (init_file, "    { /* RS6000_INST_NONE: */\n");
!   fprintf (init_file, "      \"\", RS6000_BIF_NONE, NULL_TREE, NULL\n");
    fprintf (init_file, "    },\n");
    for (int i = 0; i <= curr_ovld; i++)
      {
--- 2618,2624 ----
    fprintf (init_file, "ovlddata rs6000_instance_info[RS6000_INST_MAX] =\n");
    fprintf (init_file, "  {\n");
    fprintf (init_file, "    { /* RS6000_INST_NONE: */\n");
!   fprintf (init_file, "      \"\", RS6000_BIF_NONE, -1\n");
    fprintf (init_file, "    },\n");
    for (int i = 0; i <= curr_ovld; i++)
      {
*************** write_ovld_static_init (void)
*** 2625,2643 ****
  	       ovlds[i].proto.bifname);
        fprintf (init_file, "      /* bifid */\tRS6000_BIF_%s,\n",
  	       ovlds[i].bif_id_name);
-       /* Type must be instantiated at run time.  */
-       fprintf (init_file, "      /* fntype */\t0,\n");
        fprintf (init_file, "      /* next */\t");
        if (i < curr_ovld
  	  && !strcmp (ovlds[i+1].proto.bifname, ovlds[i].proto.bifname))
  	fprintf (init_file,
! 		 "&rs6000_instance_info[RS6000_INST_%s]\n",
  		 ovlds[i+1].ovld_id_name);
        else
! 	fprintf (init_file, "NULL\n");
        fprintf (init_file, "    },\n");
      }
    fprintf (init_file, "  };\n\n");
  }
  
  /* Write code to initialize the built-in function table.  */
--- 2628,2647 ----
  	       ovlds[i].proto.bifname);
        fprintf (init_file, "      /* bifid */\tRS6000_BIF_%s,\n",
  	       ovlds[i].bif_id_name);
        fprintf (init_file, "      /* next */\t");
        if (i < curr_ovld
  	  && !strcmp (ovlds[i+1].proto.bifname, ovlds[i].proto.bifname))
  	fprintf (init_file,
! 		 "RS6000_INST_%s\n",
  		 ovlds[i+1].ovld_id_name);
        else
! 	fprintf (init_file, "-1\n");
        fprintf (init_file, "    },\n");
      }
    fprintf (init_file, "  };\n\n");
+ 
+   fprintf (init_file,
+ 	   "tree rs6000_instance_info_fntype[RS6000_INST_MAX];\n\n");
  }
  
  /* Write code to initialize the built-in function table.  */
*************** write_init_bif_table (void)
*** 2647,2653 ****
    for (int i = 0; i <= curr_bif; i++)
      {
        fprintf (init_file,
! 	       "  rs6000_builtin_info[RS6000_BIF_%s].fntype"
  	       "\n    = %s;\n",
  	       bifs[i].idname, bifs[i].fndecl);
  
--- 2651,2657 ----
    for (int i = 0; i <= curr_bif; i++)
      {
        fprintf (init_file,
! 	       "  rs6000_builtin_info_fntype[RS6000_BIF_%s]"
  	       "\n    = %s;\n",
  	       bifs[i].idname, bifs[i].fndecl);
  
*************** write_init_ovld_table (void)
*** 2736,2742 ****
    for (int i = 0; i <= curr_ovld; i++)
      {
        fprintf (init_file,
! 	       "  rs6000_instance_info[RS6000_INST_%s].fntype"
  	       "\n    = %s;\n",
  	       ovlds[i].ovld_id_name, ovlds[i].fndecl);
  
--- 2740,2746 ----
    for (int i = 0; i <= curr_ovld; i++)
      {
        fprintf (init_file,
! 	       "  rs6000_instance_info_fntype[RS6000_INST_%s]"
  	       "\n    = %s;\n",
  	       ovlds[i].ovld_id_name, ovlds[i].fndecl);
  
*************** write_init_ovld_table (void)
*** 2793,2799 ****
  		   ".first_instance\n",
  		   stanza->stanza_id);
  	  fprintf (init_file,
! 		   "    = &rs6000_instance_info[RS6000_INST_%s];\n\n",
  		   ovlds[i].ovld_id_name);
  	}
      }
--- 2797,2803 ----
  		   ".first_instance\n",
  		   stanza->stanza_id);
  	  fprintf (init_file,
! 		   "    = RS6000_INST_%s;\n\n",
  		   ovlds[i].ovld_id_name);
  	}
      }
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000-string.cc gcc-12.4.0/gcc/config/rs6000/rs6000-string.cc
*** gcc-12.3.0/gcc/config/rs6000/rs6000-string.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000-string.cc	Thu Jun 20 08:08:06 2024
*************** expand_block_move (rtx operands[], bool
*** 2811,2821 ****
  	  gen_func.mov = gen_vsx_movv2di_64bit;
  	}
        else if (TARGET_BLOCK_OPS_UNALIGNED_VSX
! 	       && TARGET_POWER10 && bytes < 16
  	       && orig_bytes > 16
! 	       && !(bytes == 1 || bytes == 2
! 		    || bytes == 4 || bytes == 8)
! 	       && (align >= 128 || !STRICT_ALIGNMENT))
  	{
  	  /* Only use lxvl/stxvl if it could replace multiple ordinary
  	     loads+stores.  Also don't use it unless we likely already
--- 2811,2827 ----
  	  gen_func.mov = gen_vsx_movv2di_64bit;
  	}
        else if (TARGET_BLOCK_OPS_UNALIGNED_VSX
! 	       /* Only use lxvl/stxvl on 64bit POWER10.  */
! 	       && TARGET_POWER10
! 	       && TARGET_64BIT
! 	       && bytes < 16
  	       && orig_bytes > 16
! 	       && !(bytes == 1
! 		    || bytes == 2
! 		    || bytes == 4
! 		    || bytes == 8)
! 	       && (align >= 128
! 		   || !STRICT_ALIGNMENT))
  	{
  	  /* Only use lxvl/stxvl if it could replace multiple ordinary
  	     loads+stores.  Also don't use it unless we likely already
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000.cc gcc-12.4.0/gcc/config/rs6000/rs6000.cc
*** gcc-12.3.0/gcc/config/rs6000/rs6000.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000.cc	Thu Jun 20 08:08:06 2024
*************** rs6000_option_override_internal (bool gl
*** 3826,3836 ****
  		 "-mmultiple");
      }
  
!   /* If little-endian, default to -mstrict-align on older processors.
!      Testing for direct_move matches power8 and later.  */
    if (!BYTES_BIG_ENDIAN
        && !(processor_target_table[tune_index].target_enable
! 	   & OPTION_MASK_DIRECT_MOVE))
      rs6000_isa_flags |= ~rs6000_isa_flags_explicit & OPTION_MASK_STRICT_ALIGN;
  
    /* Add some warnings for VSX.  */
--- 3826,3835 ----
  		 "-mmultiple");
      }
  
!   /* If little-endian, default to -mstrict-align on older processors.  */
    if (!BYTES_BIG_ENDIAN
        && !(processor_target_table[tune_index].target_enable
! 	   & OPTION_MASK_POWER8))
      rs6000_isa_flags |= ~rs6000_isa_flags_explicit & OPTION_MASK_STRICT_ALIGN;
  
    /* Add some warnings for VSX.  */
*************** rs6000_option_override_internal (bool gl
*** 3872,3879 ****
        && (rs6000_isa_flags_explicit & (OPTION_MASK_SOFT_FLOAT
  				       | OPTION_MASK_ALTIVEC
  				       | OPTION_MASK_VSX)) != 0)
!     rs6000_isa_flags &= ~((OPTION_MASK_P8_VECTOR | OPTION_MASK_CRYPTO
! 			   | OPTION_MASK_DIRECT_MOVE)
  		         & ~rs6000_isa_flags_explicit);
  
    if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)
--- 3871,3877 ----
        && (rs6000_isa_flags_explicit & (OPTION_MASK_SOFT_FLOAT
  				       | OPTION_MASK_ALTIVEC
  				       | OPTION_MASK_VSX)) != 0)
!     rs6000_isa_flags &= ~((OPTION_MASK_P8_VECTOR | OPTION_MASK_CRYPTO)
  		         & ~rs6000_isa_flags_explicit);
  
    if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)
*************** rs6000_option_override_internal (bool gl
*** 3917,3923 ****
        else
  	rs6000_isa_flags |= ISA_3_0_MASKS_SERVER;
      }
!   else if (TARGET_P8_VECTOR || TARGET_DIRECT_MOVE || TARGET_CRYPTO)
      rs6000_isa_flags |= (ISA_2_7_MASKS_SERVER & ~ignore_masks);
    else if (TARGET_VSX)
      rs6000_isa_flags |= (ISA_2_6_MASKS_SERVER & ~ignore_masks);
--- 3915,3921 ----
        else
  	rs6000_isa_flags |= ISA_3_0_MASKS_SERVER;
      }
!   else if (TARGET_P8_VECTOR || TARGET_POWER8 || TARGET_CRYPTO)
      rs6000_isa_flags |= (ISA_2_7_MASKS_SERVER & ~ignore_masks);
    else if (TARGET_VSX)
      rs6000_isa_flags |= (ISA_2_6_MASKS_SERVER & ~ignore_masks);
*************** rs6000_option_override_internal (bool gl
*** 3958,3970 ****
        rs6000_isa_flags &= ~OPTION_MASK_FPRND;
      }
  
-   if (TARGET_DIRECT_MOVE && !TARGET_VSX)
-     {
-       if (rs6000_isa_flags_explicit & OPTION_MASK_DIRECT_MOVE)
- 	error ("%qs requires %qs", "-mdirect-move", "-mvsx");
-       rs6000_isa_flags &= ~OPTION_MASK_DIRECT_MOVE;
-     }
- 
    if (TARGET_P8_VECTOR && !TARGET_ALTIVEC)
      {
        if (rs6000_isa_flags_explicit & OPTION_MASK_P8_VECTOR)
--- 3956,3961 ----
*************** darwin_rs6000_special_round_type_align (
*** 8128,8134 ****
        type = TREE_TYPE (type);
    } while (AGGREGATE_TYPE_P (type));
  
!   if (! AGGREGATE_TYPE_P (type) && type != error_mark_node)
      align = MAX (align, TYPE_ALIGN (type));
  
    return align;
--- 8119,8126 ----
        type = TREE_TYPE (type);
    } while (AGGREGATE_TYPE_P (type));
  
!   if (type != error_mark_node && ! AGGREGATE_TYPE_P (type)
!       && ! TYPE_PACKED (type) && maximum_field_alignment == 0)
      align = MAX (align, TYPE_ALIGN (type));
  
    return align;
*************** output_toc (FILE *file, rtx x, int label
*** 17116,17122 ****
        if (DECIMAL_FLOAT_MODE_P (GET_MODE (x)))
  	REAL_VALUE_TO_TARGET_DECIMAL128 (*CONST_DOUBLE_REAL_VALUE (x), k);
        else
! 	REAL_VALUE_TO_TARGET_LONG_DOUBLE (*CONST_DOUBLE_REAL_VALUE (x), k);
  
        if (TARGET_64BIT)
  	{
--- 17108,17114 ----
        if (DECIMAL_FLOAT_MODE_P (GET_MODE (x)))
  	REAL_VALUE_TO_TARGET_DECIMAL128 (*CONST_DOUBLE_REAL_VALUE (x), k);
        else
! 	real_to_target (k, CONST_DOUBLE_REAL_VALUE (x), GET_MODE (x));
  
        if (TARGET_64BIT)
  	{
*************** rs6000_rtx_costs (rtx x, machine_mode mo
*** 21906,21912 ****
  	    *total = rs6000_cost->divsi;
  	}
        /* Add in shift and subtract for MOD unless we have a mod instruction. */
!       if (!TARGET_MODULO && (code == MOD || code == UMOD))
  	*total += COSTS_N_INSNS (2);
        return false;
  
--- 21898,21906 ----
  	    *total = rs6000_cost->divsi;
  	}
        /* Add in shift and subtract for MOD unless we have a mod instruction. */
!       if ((!TARGET_MODULO
! 	   || (RS6000_DISABLE_SCALAR_MODULO && SCALAR_INT_MODE_P (mode)))
! 	 && (code == MOD || code == UMOD))
  	*total += COSTS_N_INSNS (2);
        return false;
  
*************** static struct rs6000_opt_mask const rs60
*** 23954,23960 ****
  								false, true  },
    { "cmpb",			OPTION_MASK_CMPB,		false, true  },
    { "crypto",			OPTION_MASK_CRYPTO,		false, true  },
!   { "direct-move",		OPTION_MASK_DIRECT_MOVE,	false, true  },
    { "dlmzb",			OPTION_MASK_DLMZB,		false, true  },
    { "efficient-unaligned-vsx",	OPTION_MASK_EFFICIENT_UNALIGNED_VSX,
  								false, true  },
--- 23948,23954 ----
  								false, true  },
    { "cmpb",			OPTION_MASK_CMPB,		false, true  },
    { "crypto",			OPTION_MASK_CRYPTO,		false, true  },
!   { "direct-move",		0,				false, true  },
    { "dlmzb",			OPTION_MASK_DLMZB,		false, true  },
    { "efficient-unaligned-vsx",	OPTION_MASK_EFFICIENT_UNALIGNED_VSX,
  								false, true  },
*************** rs6000_need_ipa_fn_target_info (const_tr
*** 25250,25264 ****
  static bool
  rs6000_update_ipa_fn_target_info (unsigned int &info, const gimple *stmt)
  {
    /* Assume inline asm can use any instruction features.  */
    if (gimple_code (stmt) == GIMPLE_ASM)
      {
!       /* Should set any bits we concerned, for now OPTION_MASK_HTM is
! 	 the only bit we care about.  */
!       info |= RS6000_FN_TARGET_INFO_HTM;
        return false;
      }
!   else if (gimple_code (stmt) == GIMPLE_CALL)
      {
        tree fndecl = gimple_call_fndecl (stmt);
        if (fndecl && fndecl_built_in_p (fndecl, BUILT_IN_MD))
--- 25244,25264 ----
  static bool
  rs6000_update_ipa_fn_target_info (unsigned int &info, const gimple *stmt)
  {
+ #ifndef HAVE_AS_POWER10_HTM
    /* Assume inline asm can use any instruction features.  */
    if (gimple_code (stmt) == GIMPLE_ASM)
      {
!       const char *asm_str = gimple_asm_string (as_a<const gasm *> (stmt));
!       /* Ignore empty inline asm string.  */
!       if (strlen (asm_str) > 0)
! 	/* Should set any bits we concerned, for now OPTION_MASK_HTM is
! 	   the only bit we care about.  */
! 	info |= RS6000_FN_TARGET_INFO_HTM;
        return false;
      }
! #endif
! 
!   if (gimple_code (stmt) == GIMPLE_CALL)
      {
        tree fndecl = gimple_call_fndecl (stmt);
        if (fndecl && fndecl_built_in_p (fndecl, BUILT_IN_MD))
*************** rs6000_can_inline_p (tree caller, tree c
*** 25286,25334 ****
    tree caller_tree = DECL_FUNCTION_SPECIFIC_TARGET (caller);
    tree callee_tree = DECL_FUNCTION_SPECIFIC_TARGET (callee);
  
!   /* If the callee has no option attributes, then it is ok to inline.  */
    if (!callee_tree)
!     ret = true;
  
!   else
!     {
!       HOST_WIDE_INT caller_isa;
!       struct cl_target_option *callee_opts = TREE_TARGET_OPTION (callee_tree);
!       HOST_WIDE_INT callee_isa = callee_opts->x_rs6000_isa_flags;
!       HOST_WIDE_INT explicit_isa = callee_opts->x_rs6000_isa_flags_explicit;
  
!       /* If the caller has option attributes, then use them.
! 	 Otherwise, use the command line options.  */
!       if (caller_tree)
! 	caller_isa = TREE_TARGET_OPTION (caller_tree)->x_rs6000_isa_flags;
!       else
! 	caller_isa = rs6000_isa_flags;
  
!       cgraph_node *callee_node = cgraph_node::get (callee);
!       if (ipa_fn_summaries && ipa_fn_summaries->get (callee_node) != NULL)
  	{
! 	  unsigned int info = ipa_fn_summaries->get (callee_node)->target_info;
! 	  if ((info & RS6000_FN_TARGET_INFO_HTM) == 0)
! 	    {
! 	      callee_isa &= ~OPTION_MASK_HTM;
! 	      explicit_isa &= ~OPTION_MASK_HTM;
! 	    }
  	}
  
!       /* Ignore -mpower8-fusion and -mpower10-fusion options for inlining
! 	 purposes.  */
!       callee_isa &= ~(OPTION_MASK_P8_FUSION | OPTION_MASK_P10_FUSION);
!       explicit_isa &= ~(OPTION_MASK_P8_FUSION | OPTION_MASK_P10_FUSION);
  
!       /* The callee's options must be a subset of the caller's options, i.e.
! 	 a vsx function may inline an altivec function, but a no-vsx function
! 	 must not inline a vsx function.  However, for those options that the
! 	 callee has explicitly enabled or disabled, then we must enforce that
! 	 the callee's and caller's options match exactly; see PR70010.  */
!       if (((caller_isa & callee_isa) == callee_isa)
! 	  && (caller_isa & explicit_isa) == (callee_isa & explicit_isa))
! 	ret = true;
!     }
  
    if (TARGET_DEBUG_TARGET)
      fprintf (stderr, "rs6000_can_inline_p:, caller %s, callee %s, %s inline\n",
--- 25286,25329 ----
    tree caller_tree = DECL_FUNCTION_SPECIFIC_TARGET (caller);
    tree callee_tree = DECL_FUNCTION_SPECIFIC_TARGET (callee);
  
!   /* If the caller/callee has option attributes, then use them.
!      Otherwise, use the command line options.  */
    if (!callee_tree)
!     callee_tree = target_option_default_node;
!   if (!caller_tree)
!     caller_tree = target_option_default_node;
  
!   struct cl_target_option *callee_opts = TREE_TARGET_OPTION (callee_tree);
!   struct cl_target_option *caller_opts = TREE_TARGET_OPTION (caller_tree);
  
!   HOST_WIDE_INT callee_isa = callee_opts->x_rs6000_isa_flags;
!   HOST_WIDE_INT caller_isa = caller_opts->x_rs6000_isa_flags;
!   HOST_WIDE_INT explicit_isa = callee_opts->x_rs6000_isa_flags_explicit;
  
!   cgraph_node *callee_node = cgraph_node::get (callee);
!   if (ipa_fn_summaries && ipa_fn_summaries->get (callee_node) != NULL)
!     {
!       unsigned int info = ipa_fn_summaries->get (callee_node)->target_info;
!       if ((info & RS6000_FN_TARGET_INFO_HTM) == 0)
  	{
! 	  callee_isa &= ~OPTION_MASK_HTM;
! 	  explicit_isa &= ~OPTION_MASK_HTM;
  	}
+     }
  
!   /* Ignore -mpower8-fusion and -mpower10-fusion options for inlining
!      purposes.  */
!   callee_isa &= ~(OPTION_MASK_P8_FUSION | OPTION_MASK_P10_FUSION);
!   explicit_isa &= ~(OPTION_MASK_P8_FUSION | OPTION_MASK_P10_FUSION);
  
!   /* The callee's options must be a subset of the caller's options, i.e.
!      a vsx function may inline an altivec function, but a no-vsx function
!      must not inline a vsx function.  However, for those options that the
!      callee has explicitly enabled or disabled, then we must enforce that
!      the callee's and caller's options match exactly; see PR70010.  */
!   if (((caller_isa & callee_isa) == callee_isa)
!       && (caller_isa & explicit_isa) == (callee_isa & explicit_isa))
!     ret = true;
  
    if (TARGET_DEBUG_TARGET)
      fprintf (stderr, "rs6000_can_inline_p:, caller %s, callee %s, %s inline\n",
*************** vec_const_128bit_to_bytes (rtx op,
*** 28603,28609 ****
  
    info->all_words_same
      = (info->words[0] == info->words[1]
-        && info->words[0] == info->words[1]
         && info->words[0] == info->words[2]
         && info->words[0] == info->words[3]);
  
--- 28598,28603 ----
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000.h gcc-12.4.0/gcc/config/rs6000/rs6000.h
*** gcc-12.3.0/gcc/config/rs6000/rs6000.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000.h	Thu Jun 20 08:08:06 2024
*************** extern int rs6000_vector_align[];
*** 471,476 ****
--- 471,478 ----
  #define TARGET_EXTSWSLI	(TARGET_MODULO && TARGET_POWERPC64)
  #define TARGET_MADDLD	TARGET_MODULO
  
+ /* TARGET_DIRECT_MOVE is redundant to TARGET_P8_VECTOR, so alias it to that.  */
+ #define TARGET_DIRECT_MOVE	TARGET_P8_VECTOR
  #define TARGET_XSCVDPSPN	(TARGET_DIRECT_MOVE || TARGET_P8_VECTOR)
  #define TARGET_XSCVSPDPN	(TARGET_DIRECT_MOVE || TARGET_P8_VECTOR)
  #define TARGET_VADDUQM		(TARGET_P8_VECTOR && TARGET_POWERPC64)
*************** extern int rs6000_vector_align[];
*** 492,498 ****
     memory support.  */
  #define TARGET_SYNC_HI_QI	(TARGET_QUAD_MEMORY			\
  				 || TARGET_QUAD_MEMORY_ATOMIC		\
! 				 || TARGET_DIRECT_MOVE)
  
  #define TARGET_SYNC_TI		TARGET_QUAD_MEMORY_ATOMIC
  
--- 494,500 ----
     memory support.  */
  #define TARGET_SYNC_HI_QI	(TARGET_QUAD_MEMORY			\
  				 || TARGET_QUAD_MEMORY_ATOMIC		\
! 				 || TARGET_POWER8)
  
  #define TARGET_SYNC_TI		TARGET_QUAD_MEMORY_ATOMIC
  
*************** while (0)
*** 2632,2634 ****
--- 2634,2642 ----
         rs6000_asm_output_opcode (STREAM);				\
      }									\
    while (0)
+ 
+ /* Disable generation of scalar modulo instructions due to performance issues
+    with certain input values.  This can be removed in the future when the
+    issues have been resolved.  */
+ #define RS6000_DISABLE_SCALAR_MODULO 1
+ 
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000.md gcc-12.4.0/gcc/config/rs6000/rs6000.md
*** gcc-12.3.0/gcc/config/rs6000/rs6000.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000.md	Thu Jun 20 08:08:06 2024
***************
*** 287,293 ****
  ;; Whether this insn has a prefixed form and a non-prefixed form.
  (define_attr "maybe_prefixed" "no,yes"
    (if_then_else (eq_attr "type" "load,fpload,vecload,store,fpstore,vecstore,
!   				 integer,add")
  		(const_string "yes")
  		(const_string "no")))
  
--- 287,293 ----
  ;; Whether this insn has a prefixed form and a non-prefixed form.
  (define_attr "maybe_prefixed" "no,yes"
    (if_then_else (eq_attr "type" "load,fpload,vecload,store,fpstore,vecstore,
!   				 integer,add,fused_load_cmpi")
  		(const_string "yes")
  		(const_string "no")))
  
***************
*** 302,308 ****
  	      (eq_attr "maybe_prefixed" "no"))
  	 (const_string "no")
  
! 	 (eq_attr "type" "load,fpload,vecload")
  	 (if_then_else (match_test "prefixed_load_p (insn)")
  		       (const_string "yes")
  		       (const_string "no"))
--- 302,308 ----
  	      (eq_attr "maybe_prefixed" "no"))
  	 (const_string "no")
  
! 	 (eq_attr "type" "load,fpload,vecload,fused_load_cmpi")
  	 (if_then_else (match_test "prefixed_load_p (insn)")
  		       (const_string "yes")
  		       (const_string "no"))
***************
*** 354,360 ****
    (const (symbol_ref "(enum attr_cpu) rs6000_tune")))
  
  ;; The ISA we implement.
! (define_attr "isa" "any,p5,p6,p7,p7v,p8v,p9,p9v,p9kf,p9tf,p10"
    (const_string "any"))
  
  ;; Is this alternative enabled for the current CPU/ISA/etc.?
--- 354,360 ----
    (const (symbol_ref "(enum attr_cpu) rs6000_tune")))
  
  ;; The ISA we implement.
! (define_attr "isa" "any,p5,p6,p7,p7v,p8,p8v,p9,p9v,p9kf,p9tf,p10"
    (const_string "any"))
  
  ;; Is this alternative enabled for the current CPU/ISA/etc.?
***************
*** 379,384 ****
--- 379,388 ----
  	  (match_test "TARGET_VSX"))
       (const_int 1)
  
+      (and (eq_attr "isa" "p8")
+ 	  (match_test "TARGET_POWER8"))
+      (const_int 1)
+ 
       (and (eq_attr "isa" "p8v")
  	  (match_test "TARGET_P8_VECTOR"))
       (const_int 1)
***************
*** 3359,3364 ****
--- 3363,3379 ----
  	FAIL;
  
        operands[2] = force_reg (<MODE>mode, operands[2]);
+ 
+       if (RS6000_DISABLE_SCALAR_MODULO)
+ 	{
+ 	  temp1 = gen_reg_rtx (<MODE>mode);
+ 	  temp2 = gen_reg_rtx (<MODE>mode);
+ 
+ 	  emit_insn (gen_div<mode>3 (temp1, operands[1], operands[2]));
+ 	  emit_insn (gen_mul<mode>3 (temp2, temp1, operands[2]));
+ 	  emit_insn (gen_sub<mode>3 (operands[0], operands[1], temp2));
+ 	  DONE;
+ 	}
      }
    else
      {
***************
*** 3378,3394 ****
    [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
          (mod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")
  		 (match_operand:GPR 2 "gpc_reg_operand" "r")))]
!   "TARGET_MODULO"
    "mods<wd> %0,%1,%2"
    [(set_attr "type" "div")
     (set_attr "size" "<bits>")])
  
  
! (define_insn "umod<mode>3"
    [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
          (umod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")
  		  (match_operand:GPR 2 "gpc_reg_operand" "r")))]
!   "TARGET_MODULO"
    "modu<wd> %0,%1,%2"
    [(set_attr "type" "div")
     (set_attr "size" "<bits>")])
--- 3393,3428 ----
    [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
          (mod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")
  		 (match_operand:GPR 2 "gpc_reg_operand" "r")))]
!   "TARGET_MODULO && !RS6000_DISABLE_SCALAR_MODULO"
    "mods<wd> %0,%1,%2"
    [(set_attr "type" "div")
     (set_attr "size" "<bits>")])
  
+ ;; This define_expand can be removed when RS6000_DISABLE_SCALAR_MODULO is
+ ;; removed.
+ (define_expand "umod<mode>3"
+   [(set (match_operand:GPR 0 "gpc_reg_operand")
+ 	(umod:GPR (match_operand:GPR 1 "gpc_reg_operand")
+ 		  (match_operand:GPR 2 "gpc_reg_operand")))]
+   "TARGET_MODULO"
+ {
+   if (RS6000_DISABLE_SCALAR_MODULO)
+     {
+       rtx temp1 = gen_reg_rtx (<MODE>mode);
+       rtx temp2 = gen_reg_rtx (<MODE>mode);
  
!       emit_insn (gen_udiv<mode>3 (temp1, operands[1], operands[2]));
!       emit_insn (gen_mul<mode>3 (temp2, temp1, operands[2]));
!       emit_insn (gen_sub<mode>3 (operands[0], operands[1], temp2));
!       DONE;
!     }
! })
! 
! (define_insn "*umod<mode>3"
    [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
          (umod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")
  		  (match_operand:GPR 2 "gpc_reg_operand" "r")))]
!   "TARGET_MODULO && !RS6000_DISABLE_SCALAR_MODULO"
    "modu<wd> %0,%1,%2"
    [(set_attr "type" "div")
     (set_attr "size" "<bits>")])
***************
*** 3445,3451 ****
    [(set (match_operand:TI 0 "altivec_register_operand" "=v")
  	(umod:TI (match_operand:TI 1 "altivec_register_operand" "v")
  		 (match_operand:TI 2 "altivec_register_operand" "v")))]
!   "TARGET_POWER10 && TARGET_POWERPC64"
    "vmoduq %0,%1,%2"
    [(set_attr "type" "vecdiv")
     (set_attr "size" "128")])
--- 3479,3485 ----
    [(set (match_operand:TI 0 "altivec_register_operand" "=v")
  	(umod:TI (match_operand:TI 1 "altivec_register_operand" "v")
  		 (match_operand:TI 2 "altivec_register_operand" "v")))]
!   "TARGET_POWER10 && TARGET_POWERPC64 && !RS6000_DISABLE_SCALAR_MODULO"
    "vmoduq %0,%1,%2"
    [(set_attr "type" "vecdiv")
     (set_attr "size" "128")])
***************
*** 3454,3460 ****
    [(set (match_operand:TI 0 "altivec_register_operand" "=v")
  	(mod:TI (match_operand:TI 1 "altivec_register_operand" "v")
  		(match_operand:TI 2 "altivec_register_operand" "v")))]
!   "TARGET_POWER10 && TARGET_POWERPC64"
    "vmodsq %0,%1,%2"
    [(set_attr "type" "vecdiv")
     (set_attr "size" "128")])
--- 3488,3494 ----
    [(set (match_operand:TI 0 "altivec_register_operand" "=v")
  	(mod:TI (match_operand:TI 1 "altivec_register_operand" "v")
  		(match_operand:TI 2 "altivec_register_operand" "v")))]
!   "TARGET_POWER10 && TARGET_POWERPC64 && !RS6000_DISABLE_SCALAR_MODULO"
    "vmodsq %0,%1,%2"
    [(set_attr "type" "vecdiv")
     (set_attr "size" "128")])
***************
*** 12215,12247 ****
    DONE;
  })
  
- (define_insn "stack_protect_setsi"
-   [(set (match_operand:SI 0 "memory_operand" "=m")
- 	(unspec:SI [(match_operand:SI 1 "memory_operand" "m")] UNSPEC_SP_SET))
-    (set (match_scratch:SI 2 "=&r") (const_int 0))]
-   "TARGET_32BIT"
-   "lwz%U1%X1 %2,%1\;stw%U0%X0 %2,%0\;li %2,0"
-   [(set_attr "type" "three")
-    (set_attr "length" "12")])
- 
  ;; We can't use the prefixed attribute here because there are two memory
  ;; instructions.  We can't split the insn due to the fact that this operation
  ;; needs to be done in one piece.
! (define_insn "stack_protect_setdi"
!   [(set (match_operand:DI 0 "memory_operand" "=Y")
! 	(unspec:DI [(match_operand:DI 1 "memory_operand" "Y")] UNSPEC_SP_SET))
!    (set (match_scratch:DI 2 "=&r") (const_int 0))]
!   "TARGET_64BIT"
  {
!   if (prefixed_memory (operands[1], DImode))
!     output_asm_insn ("pld %2,%1", operands);
    else
!     output_asm_insn ("ld%U1%X1 %2,%1", operands);
  
!   if (prefixed_memory (operands[0], DImode))
!     output_asm_insn ("pstd %2,%0", operands);
    else
!     output_asm_insn ("std%U0%X0 %2,%0", operands);
  
    return "li %2,0";
  }
--- 12249,12274 ----
    DONE;
  })
  
  ;; We can't use the prefixed attribute here because there are two memory
  ;; instructions.  We can't split the insn due to the fact that this operation
  ;; needs to be done in one piece.
! (define_insn "stack_protect_set<mode>"
!   [(set (match_operand:P 0 "memory_operand" "=YZ")
! 	(unspec:P [(match_operand:P 1 "memory_operand" "YZ")] UNSPEC_SP_SET))
!    (set (match_scratch:P 2 "=&r") (const_int 0))]
!   ""
  {
!   if (prefixed_memory (operands[1], <MODE>mode))
!     /* Prefixed load only supports D-form but no update and X-form.  */
!     output_asm_insn ("p<ptrload> %2,%1", operands);
    else
!     output_asm_insn ("<ptrload>%U1%X1 %2,%1", operands);
  
!   if (prefixed_memory (operands[0], <MODE>mode))
!     /* Prefixed store only supports D-form but no update and X-form.  */
!     output_asm_insn ("pst<wd> %2,%0", operands);
    else
!     output_asm_insn ("st<wd>%U0%X0 %2,%0", operands);
  
    return "li %2,0";
  }
***************
*** 12287,12331 ****
    DONE;
  })
  
- (define_insn "stack_protect_testsi"
-   [(set (match_operand:CCEQ 0 "cc_reg_operand" "=x,?y")
-         (unspec:CCEQ [(match_operand:SI 1 "memory_operand" "m,m")
- 		      (match_operand:SI 2 "memory_operand" "m,m")]
- 		     UNSPEC_SP_TEST))
-    (set (match_scratch:SI 4 "=r,r") (const_int 0))
-    (clobber (match_scratch:SI 3 "=&r,&r"))]
-   "TARGET_32BIT"
-   "@
-    lwz%U1%X1 %3,%1\;lwz%U2%X2 %4,%2\;xor. %3,%3,%4\;li %4,0
-    lwz%U1%X1 %3,%1\;lwz%U2%X2 %4,%2\;cmplw %0,%3,%4\;li %3,0\;li %4,0"
-   [(set_attr "length" "16,20")])
- 
  ;; We can't use the prefixed attribute here because there are two memory
  ;; instructions.  We can't split the insn due to the fact that this operation
  ;; needs to be done in one piece.
! (define_insn "stack_protect_testdi"
    [(set (match_operand:CCEQ 0 "cc_reg_operand" "=x,?y")
!         (unspec:CCEQ [(match_operand:DI 1 "memory_operand" "Y,Y")
! 		      (match_operand:DI 2 "memory_operand" "Y,Y")]
  		     UNSPEC_SP_TEST))
!    (set (match_scratch:DI 4 "=r,r") (const_int 0))
!    (clobber (match_scratch:DI 3 "=&r,&r"))]
!   "TARGET_64BIT"
  {
!   if (prefixed_memory (operands[1], DImode))
!     output_asm_insn ("pld %3,%1", operands);
    else
!     output_asm_insn ("ld%U1%X1 %3,%1", operands);
  
!   if (prefixed_memory (operands[2], DImode))
!     output_asm_insn ("pld %4,%2", operands);
    else
!     output_asm_insn ("ld%U2%X2 %4,%2", operands);
  
    if (which_alternative == 0)
      output_asm_insn ("xor. %3,%3,%4", operands);
    else
!     output_asm_insn ("cmpld %0,%3,%4\;li %3,0", operands);
  
    return "li %4,0";
  }
--- 12314,12346 ----
    DONE;
  })
  
  ;; We can't use the prefixed attribute here because there are two memory
  ;; instructions.  We can't split the insn due to the fact that this operation
  ;; needs to be done in one piece.
! (define_insn "stack_protect_test<mode>"
    [(set (match_operand:CCEQ 0 "cc_reg_operand" "=x,?y")
!         (unspec:CCEQ [(match_operand:P 1 "memory_operand" "YZ,YZ")
! 		      (match_operand:P 2 "memory_operand" "YZ,YZ")]
  		     UNSPEC_SP_TEST))
!    (set (match_scratch:P 4 "=r,r") (const_int 0))
!    (clobber (match_scratch:P 3 "=&r,&r"))]
!   ""
  {
!   if (prefixed_memory (operands[1], <MODE>mode))
!     /* Prefixed load only supports D-form but no update and X-form.  */
!     output_asm_insn ("p<ptrload> %3,%1", operands);
    else
!     output_asm_insn ("<ptrload>%U1%X1 %3,%1", operands);
  
!   if (prefixed_memory (operands[2], <MODE>mode))
!     output_asm_insn ("p<ptrload> %4,%2", operands);
    else
!     output_asm_insn ("<ptrload>%U2%X2 %4,%2", operands);
  
    if (which_alternative == 0)
      output_asm_insn ("xor. %3,%3,%4", operands);
    else
!     output_asm_insn ("cmpl<wd> %0,%3,%4\;li %3,0", operands);
  
    return "li %4,0";
  }
***************
*** 14052,14058 ****
       AIX does not support the dcbtstt and dcbtt extended mnemonics.
       The AIX assembler does not support the three operand form of dcbt
       and dcbtst on Power 7 (-mpwr7).  */
!   int inst_select = INTVAL (operands[2]) || !TARGET_DIRECT_MOVE;
  
    if (REG_P (operands[0]))
      {
--- 14067,14073 ----
       AIX does not support the dcbtstt and dcbtt extended mnemonics.
       The AIX assembler does not support the three operand form of dcbt
       and dcbtst on Power 7 (-mpwr7).  */
!   int inst_select = INTVAL (operands[2]) || !TARGET_POWER8;
  
    if (REG_P (operands[0]))
      {
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000.opt gcc-12.4.0/gcc/config/rs6000/rs6000.opt
*** gcc-12.3.0/gcc/config/rs6000/rs6000.opt	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000.opt	Thu Jun 20 08:08:06 2024
*************** Save the TOC in the prologue for indirec
*** 474,479 ****
--- 474,483 ----
  mvsx-timode
  Target RejectNegative Undocumented Ignore
  
+ ;; This option exists only to create its MASK.  It is not intended for users.
+ mpower8-internal
+ Target Undocumented Mask(POWER8) Var(rs6000_isa_flags) Warn(Do not use %<-mpower8-internal%>; use %<-mcpu=power8%> instead)
+ 
  mpower8-fusion
  Target Mask(P8_FUSION) Var(rs6000_isa_flags)
  Fuse certain integer operations together for better performance on power8.
*************** Target Mask(CRYPTO) Var(rs6000_isa_flags
*** 495,501 ****
  Use ISA 2.07 Category:Vector.AES and Category:Vector.SHA2 instructions.
  
  mdirect-move
! Target Undocumented Mask(DIRECT_MOVE) Var(rs6000_isa_flags) WarnRemoved
  
  mhtm
  Target Mask(HTM) Var(rs6000_isa_flags)
--- 499,505 ----
  Use ISA 2.07 Category:Vector.AES and Category:Vector.SHA2 instructions.
  
  mdirect-move
! Target Undocumented WarnRemoved
  
  mhtm
  Target Mask(HTM) Var(rs6000_isa_flags)
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/vsx.md gcc-12.4.0/gcc/config/rs6000/vsx.md
*** gcc-12.3.0/gcc/config/rs6000/vsx.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/vsx.md	Thu Jun 20 08:08:06 2024
***************
*** 2018,2039 ****
    "x<VSv>tsqrt<sd>p %0,%x1"
    [(set_attr "type" "<VStype_simple>")])
  
! ;; Fused vector multiply/add instructions. Support the classical Altivec
! ;; versions of fma, which allows the target to be a separate register from the
! ;; 3 inputs.  Under VSX, the target must be either the addend or the first
! ;; multiply.
! 
  (define_insn "*vsx_fmav4sf4"
!   [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa,wa,v")
  	(fma:V4SF
! 	  (match_operand:V4SF 1 "vsx_register_operand" "%wa,wa,v")
! 	  (match_operand:V4SF 2 "vsx_register_operand" "wa,0,v")
! 	  (match_operand:V4SF 3 "vsx_register_operand" "0,wa,v")))]
    "VECTOR_UNIT_VSX_P (V4SFmode)"
    "@
     xvmaddasp %x0,%x1,%x2
!    xvmaddmsp %x0,%x1,%x3
!    vmaddfp %0,%1,%2,%3"
    [(set_attr "type" "vecfloat")])
  
  (define_insn "*vsx_fmav2df4"
--- 2018,2037 ----
    "x<VSv>tsqrt<sd>p %0,%x1"
    [(set_attr "type" "<VStype_simple>")])
  
! ;; Fused vector multiply/add instructions. Do not generate the Altivec versions
! ;; of fma (vmaddfp and vnmsubfp).  These instructions allows the target to be a
! ;; separate register from the 3 inputs, but they have different rounding
! ;; behaviors than the VSX instructions.
  (define_insn "*vsx_fmav4sf4"
!   [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa,wa")
  	(fma:V4SF
! 	  (match_operand:V4SF 1 "vsx_register_operand" "%wa,wa")
! 	  (match_operand:V4SF 2 "vsx_register_operand" "wa,0")
! 	  (match_operand:V4SF 3 "vsx_register_operand" "0,wa")))]
    "VECTOR_UNIT_VSX_P (V4SFmode)"
    "@
     xvmaddasp %x0,%x1,%x2
!    xvmaddmsp %x0,%x1,%x3"
    [(set_attr "type" "vecfloat")])
  
  (define_insn "*vsx_fmav2df4"
***************
*** 2075,2092 ****
    [(set_attr "type" "<VStype_mul>")])
  
  (define_insn "*vsx_nfmsv4sf4"
!   [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa,wa,v")
  	(neg:V4SF
  	 (fma:V4SF
! 	   (match_operand:V4SF 1 "vsx_register_operand" "%wa,wa,v")
! 	   (match_operand:V4SF 2 "vsx_register_operand" "wa,0,v")
  	   (neg:V4SF
! 	     (match_operand:V4SF 3 "vsx_register_operand" "0,wa,v")))))]
    "VECTOR_UNIT_VSX_P (V4SFmode)"
    "@
     xvnmsubasp %x0,%x1,%x2
!    xvnmsubmsp %x0,%x1,%x3
!    vnmsubfp %0,%1,%2,%3"
    [(set_attr "type" "vecfloat")])
  
  (define_insn "*vsx_nfmsv2df4"
--- 2073,2089 ----
    [(set_attr "type" "<VStype_mul>")])
  
  (define_insn "*vsx_nfmsv4sf4"
!   [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa,wa")
  	(neg:V4SF
  	 (fma:V4SF
! 	   (match_operand:V4SF 1 "vsx_register_operand" "%wa,wa")
! 	   (match_operand:V4SF 2 "vsx_register_operand" "wa,0")
  	   (neg:V4SF
! 	     (match_operand:V4SF 3 "vsx_register_operand" "0,wa")))))]
    "VECTOR_UNIT_VSX_P (V4SFmode)"
    "@
     xvnmsubasp %x0,%x1,%x2
!    xvnmsubmsp %x0,%x1,%x3"
    [(set_attr "type" "vecfloat")])
  
  (define_insn "*vsx_nfmsv2df4"
***************
*** 4565,4572 ****
    rtx op1 = operands[1];
    if (MEM_P (op1))
      operands[1] = rs6000_force_indexed_or_indirect_mem (op1);
!   else if (!REG_P (op1))
!     op1 = force_reg (<VSX_D:VS_scalar>mode, op1);
  })
  
  (define_insn "vsx_splat_<mode>_reg"
--- 4562,4569 ----
    rtx op1 = operands[1];
    if (MEM_P (op1))
      operands[1] = rs6000_force_indexed_or_indirect_mem (op1);
!   else
!     operands[1] = force_reg (<VSX_D:VS_scalar>mode, op1);
  })
  
  (define_insn "vsx_splat_<mode>_reg"
***************
*** 6560,6566 ****
  		      (match_operand:QI 4 "u8bit_cint_operand" "n")]
  		     UNSPEC_XXEVAL))]
     "TARGET_POWER10"
!    "xxeval %0,%1,%2,%3,%4"
     [(set_attr "type" "vecperm")
      (set_attr "prefixed" "yes")])
  
--- 6557,6563 ----
  		      (match_operand:QI 4 "u8bit_cint_operand" "n")]
  		     UNSPEC_XXEVAL))]
     "TARGET_POWER10"
!    "xxeval %x0,%x1,%x2,%x3,%4"
     [(set_attr "type" "vecperm")
      (set_attr "prefixed" "yes")])
  
diff -Nrcpad gcc-12.3.0/gcc/config/sh/sh.cc gcc-12.4.0/gcc/config/sh/sh.cc
*** gcc-12.3.0/gcc/config/sh/sh.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/sh/sh.cc	Thu Jun 20 08:08:06 2024
*************** sh_insn_operands_modified_between_p (rtx
*** 11766,11772 ****
  bool
  sh_is_nott_insn (const rtx_insn* i)
  {
!   return i != NULL && GET_CODE (PATTERN (i)) == SET
  	 && t_reg_operand (XEXP (PATTERN (i), 0), VOIDmode)
  	 && negt_reg_operand (XEXP (PATTERN (i), 1), VOIDmode);
  }
--- 11766,11773 ----
  bool
  sh_is_nott_insn (const rtx_insn* i)
  {
!   return i != NULL_RTX && PATTERN (i) != NULL_RTX
! 	 && GET_CODE (PATTERN (i)) == SET
  	 && t_reg_operand (XEXP (PATTERN (i), 0), VOIDmode)
  	 && negt_reg_operand (XEXP (PATTERN (i), 1), VOIDmode);
  }
diff -Nrcpad gcc-12.3.0/gcc/config/sh/sh.md gcc-12.4.0/gcc/config/sh/sh.md
*** gcc-12.3.0/gcc/config/sh/sh.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/sh/sh.md	Thu Jun 20 08:08:06 2024
***************
*** 842,848 ****
    if (SUBREG_P (reg))
      reg = SUBREG_REG (reg);
    gcc_assert (REG_P (reg));
!   if (find_regno_note (curr_insn, REG_DEAD, REGNO (reg)) != NULL_RTX)
      FAIL;
  
    /* FIXME: Maybe also search the predecessor basic blocks to catch
--- 842,848 ----
    if (SUBREG_P (reg))
      reg = SUBREG_REG (reg);
    gcc_assert (REG_P (reg));
!   if (find_regno_note (curr_insn, REG_DEAD, REGNO (reg)) == NULL_RTX)
      FAIL;
  
    /* FIXME: Maybe also search the predecessor basic blocks to catch
***************
*** 10680,10685 ****
--- 10680,10724 ----
     && peep2_reg_dead_p (2, operands[1]) && peep2_reg_dead_p (3, operands[0])"
    [(const_int 0)]
  {
+   if (MEM_P (operands[3]) && reg_overlap_mentioned_p (operands[0], operands[3]))
+     {
+       // Take care when the eliminated operand[0] register is part of
+       // the destination memory address.
+       rtx addr = XEXP (operands[3], 0);
+ 
+       if (REG_P (addr))
+ 	operands[3] = replace_equiv_address (operands[3], operands[1]);
+ 
+       else if (GET_CODE (addr) == PLUS && REG_P (XEXP (addr, 0))
+ 	       && CONST_INT_P (XEXP (addr, 1))
+ 	       && REGNO (operands[0]) == REGNO (XEXP (addr, 0)))
+ 	operands[3] = replace_equiv_address (operands[3],
+ 			    gen_rtx_PLUS (SImode, operands[1], XEXP (addr, 1)));
+ 
+       else if (GET_CODE (addr) == PLUS && REG_P (XEXP (addr, 0))
+ 	       && REG_P (XEXP (addr, 1)))
+         {
+           // register + register address  @(R0, Rn)
+           // can change only the Rn in the address, not R0.
+           if (REGNO (operands[0]) == REGNO (XEXP (addr, 0))
+ 	      && REGNO (XEXP (addr, 0)) != 0)
+ 	    {
+ 	      operands[3] = replace_equiv_address (operands[3],
+ 			    gen_rtx_PLUS (SImode, operands[1], XEXP (addr, 1)));
+ 	    }
+           else if (REGNO (operands[0]) == REGNO (XEXP (addr, 1))
+ 		   && REGNO (XEXP (addr, 1)) != 0)
+             {
+ 	      operands[3] = replace_equiv_address (operands[3],
+ 			    gen_rtx_PLUS (SImode, XEXP (addr, 0), operands[1]));
+             }
+           else
+             FAIL;
+         }
+       else
+         FAIL;
+     }
+ 
    emit_insn (gen_addsi3 (operands[1], operands[1], operands[2]));
    sh_peephole_emit_move_insn (operands[3], operands[1]);
  })
diff -Nrcpad gcc-12.3.0/gcc/config/sh/sh_treg_combine.cc gcc-12.4.0/gcc/config/sh/sh_treg_combine.cc
*** gcc-12.3.0/gcc/config/sh/sh_treg_combine.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/sh/sh_treg_combine.cc	Thu Jun 20 08:08:06 2024
*************** sh_treg_combine::record_set_of_reg (rtx
*** 732,738 ****
  	}
        else if (REG_P (new_entry.cstore.set_src ()))
  	{
! 	  // If it's a reg-reg copy follow the copied reg.
  	  new_entry.cstore_reg_reg_copies.push_back (new_entry.cstore);
  	  reg = new_entry.cstore.set_src ();
  	  i = new_entry.cstore.insn;
--- 732,745 ----
  	}
        else if (REG_P (new_entry.cstore.set_src ()))
  	{
! 	  // If it's a reg-reg copy follow the copied reg, but ignore
! 	  // nop copies of the reg onto itself.
! 	  if (REGNO (new_entry.cstore.set_src ()) == REGNO (reg))
! 	    {
! 	      i = prev_nonnote_nondebug_insn_bb (i);
! 	      continue;
! 	    }
! 
  	  new_entry.cstore_reg_reg_copies.push_back (new_entry.cstore);
  	  reg = new_entry.cstore.set_src ();
  	  i = new_entry.cstore.insn;
diff -Nrcpad gcc-12.3.0/gcc/config/vax/vax.cc gcc-12.4.0/gcc/config/vax/vax.cc
*** gcc-12.3.0/gcc/config/vax/vax.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/vax/vax.cc	Thu Jun 20 08:08:06 2024
*************** nonindexed_address_p (rtx x, bool strict
*** 1833,1839 ****
  }
  
  /* True if PROD is either a reg times size of mode MODE and MODE is less
!    than or equal 8 bytes, or just a reg if MODE is one byte.  */
  
  static bool
  index_term_p (rtx prod, machine_mode mode, bool strict)
--- 1833,1841 ----
  }
  
  /* True if PROD is either a reg times size of mode MODE and MODE is less
!    than or equal 8 bytes, or just a reg if MODE is one byte.  For a MULT
!    RTX we accept its operands in either order, however ASHIFT is not
!    commutative, so in that case reg has to be the left operand.  */
  
  static bool
  index_term_p (rtx prod, machine_mode mode, bool strict)
*************** index_term_p (rtx prod, machine_mode mod
*** 1852,1859 ****
    xfoo0 = XEXP (prod, 0);
    xfoo1 = XEXP (prod, 1);
  
!   if (CONST_INT_P (xfoo0)
!       && GET_MODE_SIZE (mode) == (log_p ? 1 << INTVAL (xfoo0) : INTVAL (xfoo0))
        && INDEX_REGISTER_P (xfoo1, strict))
      return true;
  
--- 1854,1862 ----
    xfoo0 = XEXP (prod, 0);
    xfoo1 = XEXP (prod, 1);
  
!   if (!log_p
!       && CONST_INT_P (xfoo0)
!       && GET_MODE_SIZE (mode) == INTVAL (xfoo0)
        && INDEX_REGISTER_P (xfoo1, strict))
      return true;
  
diff -Nrcpad gcc-12.3.0/gcc/config.in gcc-12.4.0/gcc/config.in
*** gcc-12.3.0/gcc/config.in	Mon May  8 12:15:24 2023
--- gcc-12.4.0/gcc/config.in	Thu Jun 20 08:10:28 2024
***************
*** 367,372 ****
--- 367,378 ----
  #endif
  
  
+ /* Define if your assembler supports conditional branch relaxation. */
+ #ifndef USED_FOR_TARGET
+ #undef HAVE_AS_COND_BRANCH_RELAXATION
+ #endif
+ 
+ 
  /* Define if your assembler supports the --debug-prefix-map option. */
  #ifndef USED_FOR_TARGET
  #undef HAVE_AS_DEBUG_PREFIX_MAP
***************
*** 598,603 ****
--- 604,615 ----
  #endif
  
  
+ /* Define if your macOS assembler supports .build_version directives */
+ #ifndef USED_FOR_TARGET
+ #undef HAVE_AS_MACOS_BUILD_VERSION
+ #endif
+ 
+ 
  /* Define if the assembler understands -march=rv*_zifencei. */
  #ifndef USED_FOR_TARGET
  #undef HAVE_AS_MARCH_ZIFENCEI
***************
*** 630,635 ****
--- 642,653 ----
  #endif
  
  
+ /* Define if your assembler supports -mrelax option. */
+ #ifndef USED_FOR_TARGET
+ #undef HAVE_AS_MRELAX_OPTION
+ #endif
+ 
+ 
  /* Define if your assembler supports .mspabi_attribute. */
  #ifndef USED_FOR_TARGET
  #undef HAVE_AS_MSPABI_ATTRIBUTE
***************
*** 672,677 ****
--- 690,701 ----
  #endif
  
  
+ /* Define if your assembler supports htm insns on power10. */
+ #ifndef USED_FOR_TARGET
+ #undef HAVE_AS_POWER10_HTM
+ #endif
+ 
+ 
  /* Define if your assembler supports .ref */
  #ifndef USED_FOR_TARGET
  #undef HAVE_AS_REF
***************
*** 2208,2213 ****
--- 2232,2243 ----
  #endif
  
  
+ /* Define which stat syscall is able to handle 64bit indodes. */
+ #ifndef USED_FOR_TARGET
+ #undef HOST_STAT_FOR_64BIT_INODES
+ #endif
+ 
+ 
  /* Define as const if the declaration of iconv() needs const. */
  #ifndef USED_FOR_TARGET
  #undef ICONV_CONST
diff -Nrcpad gcc-12.3.0/gcc/configure gcc-12.4.0/gcc/configure
*** gcc-12.3.0/gcc/configure	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/configure	Thu Jun 20 08:10:28 2024
*************** gcc_gxx_libcxx_include_dir=
*** 3750,3780 ****
  if test "${with_gxx_libcxx_include_dir+set}" = set; then :
    withval=$with_gxx_libcxx_include_dir; case "${withval}" in
  yes)	as_fn_error $? "bad value ${withval} given for libc++ include directory" "$LINENO" 5 ;;
- no)	;;
  *)	gcc_gxx_libcxx_include_dir=$with_gxx_libcxx_include_dir ;;
  esac
  fi
  
  
  # If both --with-sysroot and --with-gxx-libcxx-include-dir are passed, we
  # check to see if the latter starts with the former and, upon success, compute
  # gcc_gxx_libcxx_include_dir as relative to the sysroot.
  gcc_gxx_libcxx_include_dir_add_sysroot=0
! 
  if test x${gcc_gxx_libcxx_include_dir} != x; then
  
! $as_echo "#define ENABLE_STDLIB_OPTION 1" >>confdefs.h
  
- else
-   $as_echo "#define ENABLE_STDLIB_OPTION 0" >>confdefs.h
  
! fi
! # ??? This logic must match libstdc++-v3/acinclude.m4:GLIBCXX_EXPORT_INSTALL_INFO.
  if test x${gcc_gxx_libcxx_include_dir} = x; then
    if test x${enable_version_specific_runtime_libs} = xyes; then
!     gcc_gxx_libcxx_include_dir='${libsubdir}/libc++_include/c++/v1'
    else
-     libcxx_incdir='libc++_include/c++/$(version)/v1'
      if test x$host != x$target; then
         libcxx_incdir="$target_alias/$libcxx_incdir"
      fi
--- 3750,3803 ----
  if test "${with_gxx_libcxx_include_dir+set}" = set; then :
    withval=$with_gxx_libcxx_include_dir; case "${withval}" in
  yes)	as_fn_error $? "bad value ${withval} given for libc++ include directory" "$LINENO" 5 ;;
  *)	gcc_gxx_libcxx_include_dir=$with_gxx_libcxx_include_dir ;;
  esac
  fi
  
  
+ # --with-gxx-libcxx-include-dir controls the enabling of the -stdlib option.
+ # if --with-gxx-libcxx-include-dir is 'no' we disable the stdlib option.
+ # if --with-gxx-libcxx-include-dir is unset we enable the stdlib option
+ # based on the platform (to be available on platform versions where it is the
+ # default for the system tools). We also use a default path within the compiler
+ # install tree.
+ # Otherwise, we use the path provided and enable the stdlib option.
  # If both --with-sysroot and --with-gxx-libcxx-include-dir are passed, we
  # check to see if the latter starts with the former and, upon success, compute
  # gcc_gxx_libcxx_include_dir as relative to the sysroot.
  gcc_gxx_libcxx_include_dir_add_sysroot=0
! gcc_enable_stdlib_opt=0
  if test x${gcc_gxx_libcxx_include_dir} != x; then
+   if test x${gcc_gxx_libcxx_include_dir} = xno; then
+     # set defaults for the dir, but the option is disabled anyway.
+     gcc_gxx_libcxx_include_dir=
+   else
+     gcc_enable_stdlib_opt=1
+   fi
+ else
+   case $target in
+     *-darwin1[1-9]* | *-darwin2*)
+        # Default this on for Darwin versions which default to libcxx,
+        # and embed the path in the compiler install so that we get a
+        # self-contained toolchain.
+        gcc_enable_stdlib_opt=1
+        ;;
+     *) ;;
+   esac
+ fi
  
! cat >>confdefs.h <<_ACEOF
! #define ENABLE_STDLIB_OPTION $gcc_enable_stdlib_opt
! _ACEOF
  
  
! # Sysroot behaviour as for gxx-include-dir
  if test x${gcc_gxx_libcxx_include_dir} = x; then
+   # default path,embedded in the compiler tree.
+   libcxx_incdir='include/c++/v1'
    if test x${enable_version_specific_runtime_libs} = xyes; then
!     gcc_gxx_libcxx_include_dir='${libsubdir}/$libcxx_incdir'
    else
      if test x$host != x$target; then
         libcxx_incdir="$target_alias/$libcxx_incdir"
      fi
*************** else
*** 19668,19674 ****
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 19671 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
--- 19691,19697 ----
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 19694 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
*************** else
*** 19774,19780 ****
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 19777 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
--- 19797,19803 ----
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 19800 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
*************** $as_echo "#define HAVE_AS_MMACOSX_VERSIO
*** 26102,26107 ****
--- 26125,26163 ----
  
  fi
  
+     if test x$gcc_cv_as_mmacosx_version_min = "xyes"; then
+        { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for .build_version" >&5
+ $as_echo_n "checking assembler for .build_version... " >&6; }
+ if ${gcc_cv_as_darwin_build_version+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+   gcc_cv_as_darwin_build_version=no
+   if test x$gcc_cv_as != x; then
+     $as_echo ' .build_version macos, 10, 14 sdk_version 10, 14' > conftest.s
+     if { ac_try='$gcc_cv_as $gcc_cv_as_flags -mmacosx-version-min=10.14 -o conftest.o conftest.s >&5'
+   { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
+   (eval $ac_try) 2>&5
+   ac_status=$?
+   $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+   test $ac_status = 0; }; }
+     then
+ 	gcc_cv_as_darwin_build_version=yes
+     else
+       echo "configure: failed program was" >&5
+       cat conftest.s >&5
+     fi
+     rm -f conftest.o conftest.s
+   fi
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_darwin_build_version" >&5
+ $as_echo "$gcc_cv_as_darwin_build_version" >&6; }
+ if test $gcc_cv_as_darwin_build_version = yes; then
+ 
+ $as_echo "#define HAVE_AS_MACOS_BUILD_VERSION 1" >>confdefs.h
+ 
+ fi
+ 
+     fi
      ;;
  esac
  
*************** fi
*** 27963,27968 ****
--- 28019,28067 ----
  
  
      case $target in
+       *-*-aix*) conftest_s='	.machine "pwr10"
+ 	.csect .text[PR]
+ 	tend. 0';;
+       *-*-darwin*) conftest_s='	.text
+ 	tend. 0';;
+       *) conftest_s='	.machine power10
+ 	.text
+ 	tend. 0';;
+     esac
+ 
+     { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for htm support on Power10" >&5
+ $as_echo_n "checking assembler for htm support on Power10... " >&6; }
+ if ${gcc_cv_as_power10_htm+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+   gcc_cv_as_power10_htm=no
+   if test x$gcc_cv_as != x; then
+     $as_echo "$conftest_s" > conftest.s
+     if { ac_try='$gcc_cv_as $gcc_cv_as_flags  -o conftest.o conftest.s >&5'
+   { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
+   (eval $ac_try) 2>&5
+   ac_status=$?
+   $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+   test $ac_status = 0; }; }
+     then
+ 	gcc_cv_as_power10_htm=yes
+     else
+       echo "configure: failed program was" >&5
+       cat conftest.s >&5
+     fi
+     rm -f conftest.o conftest.s
+   fi
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_power10_htm" >&5
+ $as_echo "$gcc_cv_as_power10_htm" >&6; }
+ if test $gcc_cv_as_power10_htm = yes; then
+ 
+ $as_echo "#define HAVE_AS_POWER10_HTM 1" >>confdefs.h
+ 
+ fi
+ 
+ 
+     case $target in
        *-*-aix*) conftest_s='	.csect .text[PR]
  LCF..0:
  	addis 11,30,_GLOBAL_OFFSET_TABLE_-LCF..0@ha';;
*************** if test $gcc_cv_as_loongarch_dtprelword
*** 28828,28833 ****
--- 28927,28998 ----
  $as_echo "#define HAVE_AS_DTPRELWORD 1" >>confdefs.h
  
  fi
+     { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for -mrelax option" >&5
+ $as_echo_n "checking assembler for -mrelax option... " >&6; }
+ if ${gcc_cv_as_loongarch_relax+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+   gcc_cv_as_loongarch_relax=no
+   if test x$gcc_cv_as != x; then
+     $as_echo '.text' > conftest.s
+     if { ac_try='$gcc_cv_as $gcc_cv_as_flags -mrelax -o conftest.o conftest.s >&5'
+   { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
+   (eval $ac_try) 2>&5
+   ac_status=$?
+   $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+   test $ac_status = 0; }; }
+     then
+ 	gcc_cv_as_loongarch_relax=yes
+     else
+       echo "configure: failed program was" >&5
+       cat conftest.s >&5
+     fi
+     rm -f conftest.o conftest.s
+   fi
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_loongarch_relax" >&5
+ $as_echo "$gcc_cv_as_loongarch_relax" >&6; }
+ if test $gcc_cv_as_loongarch_relax = yes; then
+ 
+ $as_echo "#define HAVE_AS_MRELAX_OPTION 1" >>confdefs.h
+ 
+ fi
+ 
+     { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for conditional branch relaxation support" >&5
+ $as_echo_n "checking assembler for conditional branch relaxation support... " >&6; }
+ if ${gcc_cv_as_loongarch_cond_branch_relax+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+   gcc_cv_as_loongarch_cond_branch_relax=no
+   if test x$gcc_cv_as != x; then
+     $as_echo 'a:
+        .rept 32769
+        nop
+        .endr
+        beq $a0,$a1,a' > conftest.s
+     if { ac_try='$gcc_cv_as $gcc_cv_as_flags --fatal-warnings -o conftest.o conftest.s >&5'
+   { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
+   (eval $ac_try) 2>&5
+   ac_status=$?
+   $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+   test $ac_status = 0; }; }
+     then
+ 	gcc_cv_as_loongarch_cond_branch_relax=yes
+     else
+       echo "configure: failed program was" >&5
+       cat conftest.s >&5
+     fi
+     rm -f conftest.o conftest.s
+   fi
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_loongarch_cond_branch_relax" >&5
+ $as_echo "$gcc_cv_as_loongarch_cond_branch_relax" >&6; }
+ if test $gcc_cv_as_loongarch_cond_branch_relax = yes; then
+ 
+ $as_echo "#define HAVE_AS_COND_BRANCH_RELAXATION 1" >>confdefs.h
+ 
+ fi
+ 
      ;;
      s390*-*-*)
      { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for .gnu_attribute support" >&5
*************** $as_echo "$gcc_cv_ld64_major" >&6; }
*** 30720,30726 ****
      { $as_echo "$as_me:${as_lineno-$LINENO}: checking linker version" >&5
  $as_echo_n "checking linker version... " >&6; }
      if test x"${gcc_cv_ld64_version}" = x; then
!       gcc_cv_ld64_version=`$gcc_cv_ld -v 2>&1 | grep ld64 | sed s/.*ld64-// | awk '{print $1}'`
      fi
      { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_ld64_version" >&5
  $as_echo "$gcc_cv_ld64_version" >&6; }
--- 30885,30892 ----
      { $as_echo "$as_me:${as_lineno-$LINENO}: checking linker version" >&5
  $as_echo_n "checking linker version... " >&6; }
      if test x"${gcc_cv_ld64_version}" = x; then
!       gcc_cv_ld64_version=`$gcc_cv_ld -v 2>&1 | $EGREP 'ld64|dyld' \
!       | sed -e 's/.*ld64-//' -e 's/.*dyld-//'| awk '{print $1}'`
      fi
      { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_ld64_version" >&5
  $as_echo "$gcc_cv_ld64_version" >&6; }
*************** $as_echo_n "checking dsymutil version \"
*** 30790,30796 ****
        dsymutil_kind=LLVM
        dsymutil_vers=`echo $dsymutil_temp | sed 's/.*LLVM\ version\ \([0-9\.]*\).*/\1/'`
      else
!       dsymutil_kind=UNKNOWN
        dsymutil_vers="0.0"
      fi
      dsymutil_major=`expr "$dsymutil_vers" : '\([0-9]*\)'`
--- 30956,30962 ----
        dsymutil_kind=LLVM
        dsymutil_vers=`echo $dsymutil_temp | sed 's/.*LLVM\ version\ \([0-9\.]*\).*/\1/'`
      else
!       dsymutil_kind=DET_UNKNOWN
        dsymutil_vers="0.0"
      fi
      dsymutil_major=`expr "$dsymutil_vers" : '\([0-9]*\)'`
diff -Nrcpad gcc-12.3.0/gcc/configure.ac gcc-12.4.0/gcc/configure.ac
*** gcc-12.3.0/gcc/configure.ac	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/configure.ac	Thu Jun 20 08:08:06 2024
*************** AC_ARG_WITH(gxx-libcxx-include-dir,
*** 236,262 ****
                  [specifies directory to find libc++ header files])],
  [case "${withval}" in
  yes)	AC_MSG_ERROR(bad value ${withval} given for libc++ include directory) ;;
- no)	;;
  *)	gcc_gxx_libcxx_include_dir=$with_gxx_libcxx_include_dir ;;
  esac])
  
  # If both --with-sysroot and --with-gxx-libcxx-include-dir are passed, we
  # check to see if the latter starts with the former and, upon success, compute
  # gcc_gxx_libcxx_include_dir as relative to the sysroot.
  gcc_gxx_libcxx_include_dir_add_sysroot=0
! 
  if test x${gcc_gxx_libcxx_include_dir} != x; then
!   AC_DEFINE(ENABLE_STDLIB_OPTION, 1,
!             [Define if the -stdlib= option should be enabled.])
  else
!   AC_DEFINE(ENABLE_STDLIB_OPTION, 0)
  fi
! # ??? This logic must match libstdc++-v3/acinclude.m4:GLIBCXX_EXPORT_INSTALL_INFO.
  if test x${gcc_gxx_libcxx_include_dir} = x; then
    if test x${enable_version_specific_runtime_libs} = xyes; then
!     gcc_gxx_libcxx_include_dir='${libsubdir}/libc++_include/c++/v1'
    else
-     libcxx_incdir='libc++_include/c++/$(version)/v1'
      if test x$host != x$target; then
         libcxx_incdir="$target_alias/$libcxx_incdir"
      fi
--- 236,284 ----
                  [specifies directory to find libc++ header files])],
  [case "${withval}" in
  yes)	AC_MSG_ERROR(bad value ${withval} given for libc++ include directory) ;;
  *)	gcc_gxx_libcxx_include_dir=$with_gxx_libcxx_include_dir ;;
  esac])
  
+ # --with-gxx-libcxx-include-dir controls the enabling of the -stdlib option.
+ # if --with-gxx-libcxx-include-dir is 'no' we disable the stdlib option.
+ # if --with-gxx-libcxx-include-dir is unset we enable the stdlib option
+ # based on the platform (to be available on platform versions where it is the
+ # default for the system tools). We also use a default path within the compiler
+ # install tree.
+ # Otherwise, we use the path provided and enable the stdlib option.
  # If both --with-sysroot and --with-gxx-libcxx-include-dir are passed, we
  # check to see if the latter starts with the former and, upon success, compute
  # gcc_gxx_libcxx_include_dir as relative to the sysroot.
  gcc_gxx_libcxx_include_dir_add_sysroot=0
! gcc_enable_stdlib_opt=0
  if test x${gcc_gxx_libcxx_include_dir} != x; then
!   if test x${gcc_gxx_libcxx_include_dir} = xno; then
!     # set defaults for the dir, but the option is disabled anyway.
!     gcc_gxx_libcxx_include_dir=
!   else
!     gcc_enable_stdlib_opt=1
!   fi
  else
!   case $target in
!     *-darwin1[[1-9]]* | *-darwin2*)
!        # Default this on for Darwin versions which default to libcxx,
!        # and embed the path in the compiler install so that we get a
!        # self-contained toolchain.
!        gcc_enable_stdlib_opt=1
!        ;;
!     *) ;;
!   esac
  fi
! AC_DEFINE_UNQUOTED(ENABLE_STDLIB_OPTION, $gcc_enable_stdlib_opt,
!           [Define if the -stdlib= option should be enabled.])
! 
! # Sysroot behaviour as for gxx-include-dir
  if test x${gcc_gxx_libcxx_include_dir} = x; then
+   # default path,embedded in the compiler tree.
+   libcxx_incdir='include/c++/v1'
    if test x${enable_version_specific_runtime_libs} = xyes; then
!     gcc_gxx_libcxx_include_dir='${libsubdir}/$libcxx_incdir'
    else
      if test x$host != x$target; then
         libcxx_incdir="$target_alias/$libcxx_incdir"
      fi
*************** case "$target_os" in
*** 4309,4315 ****
        gcc_cv_as_mmacosx_version_min,
        [-mmacosx-version-min=10.1], [.text],,
        [AC_DEFINE(HAVE_AS_MMACOSX_VERSION_MIN_OPTION, 1,
! 	[Define if your Mac OS X assembler supports the -mmacos-version-min option.])])
      ;;
  esac
  
--- 4331,4345 ----
        gcc_cv_as_mmacosx_version_min,
        [-mmacosx-version-min=10.1], [.text],,
        [AC_DEFINE(HAVE_AS_MMACOSX_VERSION_MIN_OPTION, 1,
! 	[Define if your macOS assembler supports the -mmacos-version-min option.])])
!     if test x$gcc_cv_as_mmacosx_version_min = "xyes"; then
!        gcc_GAS_CHECK_FEATURE([.build_version],
!            gcc_cv_as_darwin_build_version,
!            [-mmacosx-version-min=10.14],
!            [ .build_version macos, 10, 14 sdk_version 10, 14],,
!       [AC_DEFINE(HAVE_AS_MACOS_BUILD_VERSION, 1,
! 	[Define if your macOS assembler supports .build_version directives])])
!     fi
      ;;
  esac
  
*************** gd:
*** 5033,5038 ****
--- 5063,5085 ----
  	  [Define if your assembler supports mfcr field.])])
  
      case $target in
+       *-*-aix*) conftest_s='	.machine "pwr10"
+ 	.csect .text[[PR]]
+ 	tend. 0';;
+       *-*-darwin*) conftest_s='	.text
+ 	tend. 0';;
+       *) conftest_s='	.machine power10
+ 	.text
+ 	tend. 0';;
+     esac
+ 
+     gcc_GAS_CHECK_FEATURE([htm support on Power10],
+       gcc_cv_as_power10_htm,,
+       [$conftest_s],,
+       [AC_DEFINE(HAVE_AS_POWER10_HTM, 1,
+ 	  [Define if your assembler supports htm insns on power10.])])
+ 
+     case $target in
        *-*-aix*) conftest_s='	.csect .text[[PR]]
  LCF..0:
  	addis 11,30,_GLOBAL_OFFSET_TABLE_-LCF..0@ha';;
*************** x:
*** 5319,5324 ****
--- 5366,5385 ----
  	.dtprelword x+0x8000],,
        [AC_DEFINE(HAVE_AS_DTPRELWORD, 1,
  	  [Define if your assembler supports .dtprelword.])])
+     gcc_GAS_CHECK_FEATURE([-mrelax option], gcc_cv_as_loongarch_relax,
+       [-mrelax], [.text],,
+       [AC_DEFINE(HAVE_AS_MRELAX_OPTION, 1,
+ 		[Define if your assembler supports -mrelax option.])])
+     gcc_GAS_CHECK_FEATURE([conditional branch relaxation support],
+       gcc_cv_as_loongarch_cond_branch_relax,
+       [--fatal-warnings],
+       [a:
+        .rept 32769
+        nop
+        .endr
+        beq $a0,$a1,a],,
+       [AC_DEFINE(HAVE_AS_COND_BRANCH_RELAXATION, 1,
+ 		[Define if your assembler supports conditional branch relaxation.])])
      ;;
      s390*-*-*)
      gcc_GAS_CHECK_FEATURE([.gnu_attribute support],
*************** if test x"$ld64_flag" = x"yes"; then
*** 6353,6359 ****
      # If the version was not specified, try to find it.
      AC_MSG_CHECKING(linker version)
      if test x"${gcc_cv_ld64_version}" = x; then
!       gcc_cv_ld64_version=`$gcc_cv_ld -v 2>&1 | grep ld64 | sed s/.*ld64-// | awk '{print $1}'`
      fi
      AC_MSG_RESULT($gcc_cv_ld64_version)
  
--- 6414,6421 ----
      # If the version was not specified, try to find it.
      AC_MSG_CHECKING(linker version)
      if test x"${gcc_cv_ld64_version}" = x; then
!       gcc_cv_ld64_version=`$gcc_cv_ld -v 2>&1 | $EGREP 'ld64|dyld' \
!       | sed -e 's/.*ld64-//' -e 's/.*dyld-//'| awk '{print $1}'`
      fi
      AC_MSG_RESULT($gcc_cv_ld64_version)
  
*************** if test x"$dsymutil_flag" = x"yes"; then
*** 6407,6413 ****
        dsymutil_kind=LLVM
        dsymutil_vers=`echo $dsymutil_temp | sed 's/.*LLVM\ version\ \([[0-9\.]]*\).*/\1/'`
      else
!       dsymutil_kind=UNKNOWN
        dsymutil_vers="0.0"
      fi
      dsymutil_major=`expr "$dsymutil_vers" : '\([[0-9]]*\)'`
--- 6469,6475 ----
        dsymutil_kind=LLVM
        dsymutil_vers=`echo $dsymutil_temp | sed 's/.*LLVM\ version\ \([[0-9\.]]*\).*/\1/'`
      else
!       dsymutil_kind=DET_UNKNOWN
        dsymutil_vers="0.0"
      fi
      dsymutil_major=`expr "$dsymutil_vers" : '\([[0-9]]*\)'`
diff -Nrcpad gcc-12.3.0/gcc/cp/ChangeLog gcc-12.4.0/gcc/cp/ChangeLog
*** gcc-12.3.0/gcc/cp/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/cp/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,348 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-12  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/114691
+ 	* semantics.cc (simplify_loop_decl_cond): Use cp_build_unary_op with
+ 	TRUTH_NOT_EXPR on ANNOTATE_EXPR argument (if any) rather than
+ 	ANNOTATE_EXPR itself.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/114580
+ 	* semantics.cc (finish_if_stmt_cond): Call
+ 	maybe_warn_for_constant_evaluated with IF_STMT_CONSTEXPR_P (if_stmt)
+ 	as the second argument, rather than true/false depending on if
+ 	it is if constexpr with non-dependent constant expression with
+ 	bool type.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/114572
+ 	* cp-gimplify.cc (cxx_omp_clause_apply_fn): Call build_cplus_new
+ 	on build_call_a result if it has class type.
+ 
+ 2024-05-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-28  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/100667
+ 	* semantics.cc (same_type_ref_bind_p): New.
+ 	(finish_trait_expr): Use it.
+ 
+ 2024-05-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	* pt.cc (tsubst_copy_and_build): Move ANNOTATE_EXPR out of
+ 	fallthrough path.
+ 
+ 2024-05-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-09-22  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/111529
+ 	* parser.cc (cp_parser_lambda_declarator_opt): Don't suggest
+ 	-std=c++14 for lambda templates.
+ 	* pt.cc (tsubst_expr): Move ANNOTATE_EXPR handling...
+ 	(tsubst_copy_and_build): ...here.
+ 
+ 2024-05-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-25  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/113598
+ 	* init.cc (build_vec_init): Don't use {} for PMF.
+ 
+ 2024-05-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-02  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/114561
+ 	PR c++/114562
+ 	* call.cc (convert_like_internal): Avoid adding qualification
+ 	conversion in direct reference binding.
+ 
+ 2024-05-08  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	Backported from master:
+ 	2024-05-07  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	PR c++/89224
+ 	* constexpr.cc (cxx_eval_array_reference): Compare main variants
+ 	for the vector/array types instead of the types directly.
+ 
+ 2024-04-12  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2022-12-23  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* g++spec.cc (lang_specific_driver): Preserve -static-libstdc++ in
+ 	the driver command line for targets without -Bstatic/dynamic support
+ 	in their static linker.
+ 
+ 2024-02-06  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-06  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/107291
+ 	* method.cc (early_check_defaulted_comparison): Fail if not friend.
+ 
+ 2024-02-05  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-05  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/111286
+ 	* tree.cc (rvalue): Don't drop cv-quals from an array.
+ 
+ 2024-02-02  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-02  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/110084
+ 	* pt.cc (tsubst_function_decl): Only check a function defaulted
+ 	outside the class if the class is complete.
+ 
+ 2024-02-01  Marek Polacek  <polacek@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-01  Marek Polacek  <polacek@redhat.com>
+ 
+ 	PR c++/112437
+ 	* typeck.cc (treat_lvalue_as_rvalue_p): Bail out on sk_namespace in
+ 	the move on throw of parms loop.
+ 
+ 2024-01-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/113347
+ 	* semantics.cc (finalize_nrv_r): Handle null
+ 	current_retval_sentinel.
+ 
+ 2024-01-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-12-20  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/103185
+ 	* typeck.cc (cp_build_array_ref): Handle swapped operands.
+ 
+ 2024-01-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-12-20  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/113088
+ 	PR c++/33799
+ 	* except.cc (maybe_splice_retval_cleanup): Handle an empty block.
+ 
+ 2024-01-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-08-31  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/92407
+ 	* cp-tree.h (struct language_function): Add backward_goto.
+ 	* decl.cc (check_goto): Set it.
+ 	* typeck.cc (check_return_expr): Prevent NRV if set.
+ 
+ 2024-01-15  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-15  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/109899
+ 	* init.cc (build_vec_delete_1): Assume expr_noexcept_p returns
+ 	false in a template context.
+ 
+ 2023-12-24  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-09-22  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/111485
+ 	* pt.cc (is_compatible_template_arg): New parameter 'args'.
+ 	Add the outer template arguments 'args' to 'new_args'.
+ 	(convert_template_argument): Pass 'args' to
+ 	is_compatible_template_arg.
+ 
+ 2023-12-20  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-04-25  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/108975
+ 	* pt.cc (value_dependent_expression_p) <case VAR_DECL>:
+ 	Suppress conservative early exit for reference variables
+ 	when DECL_HAS_VALUE_EXPR_P.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-12-08  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR sanitizer/112727
+ 	* cp-gimplify.cc (cp_fold): If SAVE_EXPR has been previously
+ 	folded, unshare_expr what is returned.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-12-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/112795
+ 	* parser.cc (cp_parser_pragma_unroll): Use fold_non_dependent_expr
+ 	instead of maybe_constant_value.
+ 
+ 2023-11-27  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-16  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/111703
+ 	PR c++/107939
+ 	* constexpr.cc (potential_constant_expression_1) <case CALL_EXPR>:
+ 	Fix FUNCTION_POINTER_TYPE_P test.
+ 
+ 2023-11-27  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-15  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/111703
+ 	PR c++/112269
+ 	* constexpr.cc (potential_constant_expression_1) <case VAR_DECL>:
+ 	Only consider var_in_maybe_constexpr_fn if 'now' is false.
+ 	<case INDIRECT_REF>: Likewise.
+ 
+ 2023-11-17  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/112301
+ 	PR c++/102191
+ 	PR c++/33799
+ 	* except.cc (maybe_splice_retval_cleanup): Clear
+ 	current_retval_sentinel when destroying retval.
+ 	* semantics.cc (nrv_data): Add in_nrv_cleanup.
+ 	(finalize_nrv): Set it.
+ 	(finalize_nrv_r): Fix handling of throwing cleanups.
+ 
+ 2023-11-17  Jason Merrill  <jason@redhat.com>
+ 
+ 	* semantics.cc (finalize_nrv_r): [RETURN_EXPR]: Only replace the
+ 	INIT_EXPR.
+ 
+ 2023-11-17  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/33799
+ 	* except.cc (maybe_splice_retval_cleanup): Change
+ 	recognition of function body and try scopes.
+ 	* semantics.cc (do_poplevel): Call it after poplevel.
+ 	(at_try_scope): New.
+ 	* cp-tree.h (maybe_splice_retval_cleanup): Adjust.
+ 
+ 2023-08-11  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/106310
+ 	* parser.cc (cp_parser_template_name): Skip non-member
+ 	lookup after the template keyword.
+ 	(cp_parser_lookup_name): Pass down template_keyword_p.
+ 
+ 2023-08-11  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/106890
+ 	PR c++/109666
+ 	* name-lookup.cc (maybe_push_to_top_level)
+ 	(maybe_pop_from_top_level): Split out...
+ 	* pt.cc (instantiate_body): ...from here.
+ 	* init.cc (maybe_instantiate_nsdmi_init): Use them.
+ 	* name-lookup.h: Declare them..
+ 
+ 2023-08-11  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/108099
+ 	* decl.cc (grokdeclarator): Don't clear typedef_decl after 'unsigned
+ 	typedef' pedwarn.  Use c_common_signed_or_unsigned_type.  Also
+ 	handle 'signed typedef'.
+ 
+ 2023-08-07  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-05-09  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/109761
+ 	* parser.cc (cp_parser_class_specifier): Don't pass a class
+ 	context to noexcept_override_late_checks.
+ 	(noexcept_override_late_checks): Remove 'type' parameter
+ 	and use DECL_CONTEXT of 'fndecl' instead.
+ 
+ 2023-07-12  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-06-29  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/110468
+ 	* init.cc (maybe_instantiate_nsdmi_init): Mask out all
+ 	tsubst flags except for tf_warning_or_error.
+ 
+ 2023-05-17  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-05-17  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/109868
+ 	* init.cc (build_zero_init_1): Don't initialize zero-width bitfields.
+ 	For unions only initialize the first FIELD_DECL.
+ 
+ 2023-05-15  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/109241
+ 	* pt.cc (find_parameter_packs_r): Handle null TREE_BINFO.
+ 
+ 2023-05-09  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-04-01  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/109160
+ 	* cp-tree.h (do_auto_deduction): Add defaulted tmpl parameter.
+ 	* pt.cc (convert_template_argument): Pass 'in_decl' as 'tmpl' to
+ 	do_auto_deduction.
+ 	(tsubst_decl) <case VAR_/TYPE_DECL>: Pass 'tmpl' instead of 't' as
+ 	'in_decl' to coerce_template_parms.
+ 	(unify) <case TEMPLATE_PARM_INDEX>: Pass TPARMS_PRIMARY_TEMPLATE
+ 	as 'tmpl' to do_auto_deduction.
+ 	(do_auto_deduction): Document default arguments.  Rename local
+ 	variable 'tmpl' to 'ctmpl'.  Use 'tmpl' to obtain a full set of
+ 	template arguments for satisfaction in the adc_unify case.
+ 
+ 2023-05-09  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/106740
+ 	PR c++/105852
+ 	* decl.cc (duplicate_decls): Change non-templated friend
+ 	check to an assert.
+ 	* pt.cc	(tsubst_function_decl): Don't set DECL_TEMPLATE_INFO
+ 	on non-templated friends.
+ 	(tsubst_friend_function): Adjust.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/cp/call.cc gcc-12.4.0/gcc/cp/call.cc
*** gcc-12.3.0/gcc/cp/call.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/call.cc	Thu Jun 20 08:08:06 2024
*************** convert_like_internal (conversion *convs
*** 8135,8141 ****
        break;
      };
  
!   expr = convert_like (next_conversion (convs), expr, fn, argnum,
  		       convs->kind == ck_ref_bind
  		       ? issue_conversion_warnings : false,
  		       c_cast_p, complain & ~tf_no_cleanup);
--- 8135,8149 ----
        break;
      };
  
!   conversion *nc = next_conversion (convs);
!   if (convs->kind == ck_ref_bind && nc->kind == ck_qual
!       && !convs->need_temporary_p)
!     /* direct_reference_binding might have inserted a ck_qual under
!        this ck_ref_bind for the benefit of conversion sequence ranking.
!        Don't actually perform that conversion.  */
!     nc = next_conversion (nc);
! 
!   expr = convert_like (nc, expr, fn, argnum,
  		       convs->kind == ck_ref_bind
  		       ? issue_conversion_warnings : false,
  		       c_cast_p, complain & ~tf_no_cleanup);
*************** convert_like_internal (conversion *convs
*** 8216,8234 ****
        {
  	tree ref_type = totype;
  
- 	/* direct_reference_binding might have inserted a ck_qual under
- 	   this ck_ref_bind for the benefit of conversion sequence ranking.
- 	   Ignore the conversion; we'll create our own below.  */
- 	if (next_conversion (convs)->kind == ck_qual
- 	    && !convs->need_temporary_p)
- 	  {
- 	    gcc_assert (same_type_p (TREE_TYPE (expr),
- 				     next_conversion (convs)->type));
- 	    /* Strip the cast created by the ck_qual; cp_build_addr_expr
- 	       below expects an lvalue.  */
- 	    STRIP_NOPS (expr);
- 	  }
- 
  	if (convs->bad_p && !next_conversion (convs)->bad_p)
  	  {
  	    tree extype = TREE_TYPE (expr);
--- 8224,8229 ----
diff -Nrcpad gcc-12.3.0/gcc/cp/constexpr.cc gcc-12.4.0/gcc/cp/constexpr.cc
*** gcc-12.3.0/gcc/cp/constexpr.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/constexpr.cc	Thu Jun 20 08:08:06 2024
*************** cxx_eval_array_reference (const constexp
*** 3932,3938 ****
    if (!lval
        && TREE_CODE (ary) == VIEW_CONVERT_EXPR
        && VECTOR_TYPE_P (TREE_TYPE (TREE_OPERAND (ary, 0)))
!       && TREE_TYPE (t) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (ary, 0))))
      ary = TREE_OPERAND (ary, 0);
  
    tree oldidx = TREE_OPERAND (t, 1);
--- 3932,3939 ----
    if (!lval
        && TREE_CODE (ary) == VIEW_CONVERT_EXPR
        && VECTOR_TYPE_P (TREE_TYPE (TREE_OPERAND (ary, 0)))
!       && (TYPE_MAIN_VARIANT (TREE_TYPE (t))
! 	  == TYPE_MAIN_VARIANT (TREE_TYPE (TREE_TYPE (TREE_OPERAND (ary, 0))))))
      ary = TREE_OPERAND (ary, 0);
  
    tree oldidx = TREE_OPERAND (t, 1);
*************** potential_constant_expression_1 (tree t,
*** 8777,8783 ****
  	  }
  	else if (fun)
            {
! 	    if (RECUR (fun, FUNCTION_POINTER_TYPE_P (fun) ? rval : any))
  	      /* Might end up being a constant function pointer.  But it
  		 could also be a function object with constexpr op(), so
  		 we pass 'any' so that the underlying VAR_DECL is deemed
--- 8778,8789 ----
  	  }
  	else if (fun)
            {
! 	    if (TREE_TYPE (fun)
! 		&& FUNCTION_POINTER_TYPE_P (TREE_TYPE (fun)))
! 	      want_rval = rval;
! 	    else
! 	      want_rval = any;
! 	    if (RECUR (fun, want_rval))
  	      /* Might end up being a constant function pointer.  But it
  		 could also be a function object with constexpr op(), so
  		 we pass 'any' so that the underlying VAR_DECL is deemed
*************** potential_constant_expression_1 (tree t,
*** 8847,8853 ****
  	  return RECUR (DECL_VALUE_EXPR (t), rval);
  	}
        if (want_rval
! 	  && !var_in_maybe_constexpr_fn (t)
  	  && !type_dependent_expression_p (t)
  	  && !decl_maybe_constant_var_p (t)
  	  && (strict
--- 8853,8859 ----
  	  return RECUR (DECL_VALUE_EXPR (t), rval);
  	}
        if (want_rval
! 	  && (now || !var_in_maybe_constexpr_fn (t))
  	  && !type_dependent_expression_p (t)
  	  && !decl_maybe_constant_var_p (t)
  	  && (strict
*************** potential_constant_expression_1 (tree t,
*** 8956,8962 ****
          STRIP_NOPS (x);
          if (is_this_parameter (x) && !is_capture_proxy (x))
  	  {
! 	    if (!var_in_maybe_constexpr_fn (x))
  	      {
  		if (flags & tf_error)
  		  error_at (loc, "use of %<this%> in a constant expression");
--- 8962,8968 ----
          STRIP_NOPS (x);
          if (is_this_parameter (x) && !is_capture_proxy (x))
  	  {
! 	    if (now || !var_in_maybe_constexpr_fn (x))
  	      {
  		if (flags & tf_error)
  		  error_at (loc, "use of %<this%> in a constant expression");
diff -Nrcpad gcc-12.3.0/gcc/cp/cp-gimplify.cc gcc-12.4.0/gcc/cp/cp-gimplify.cc
*** gcc-12.3.0/gcc/cp/cp-gimplify.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/cp-gimplify.cc	Thu Jun 20 08:08:06 2024
*************** cxx_omp_clause_apply_fn (tree fn, tree a
*** 2038,2043 ****
--- 2038,2045 ----
  					   TREE_PURPOSE (parm), fn,
  					   i - is_method, tf_warning_or_error);
        t = build_call_a (fn, i, argarray);
+       if (MAYBE_CLASS_TYPE_P (TREE_TYPE (t)))
+ 	t = build_cplus_new (TREE_TYPE (t), t, tf_warning_or_error);
        t = fold_convert (void_type_node, t);
        t = fold_build_cleanup_point_expr (TREE_TYPE (t), t);
        append_to_statement_list (t, &ret);
*************** cxx_omp_clause_apply_fn (tree fn, tree a
*** 2071,2076 ****
--- 2073,2080 ----
  					   TREE_PURPOSE (parm), fn,
  					   i - is_method, tf_warning_or_error);
        t = build_call_a (fn, i, argarray);
+       if (MAYBE_CLASS_TYPE_P (TREE_TYPE (t)))
+ 	t = build_cplus_new (TREE_TYPE (t), t, tf_warning_or_error);
        t = fold_convert (void_type_node, t);
        return fold_build_cleanup_point_expr (TREE_TYPE (t), t);
      }
*************** cp_fold (tree x)
*** 2453,2459 ****
      fold_cache = hash_map<tree, tree>::create_ggc (101);
  
    if (tree *cached = fold_cache->get (x))
!     return *cached;
  
    uid_sensitive_constexpr_evaluation_checker c;
  
--- 2457,2470 ----
      fold_cache = hash_map<tree, tree>::create_ggc (101);
  
    if (tree *cached = fold_cache->get (x))
!     {
!       /* unshare_expr doesn't recurse into SAVE_EXPRs.  If SAVE_EXPR's
! 	 argument has been folded into a tree invariant, make sure it is
! 	 unshared.  See PR112727.  */
!       if (TREE_CODE (x) == SAVE_EXPR && *cached != x)
! 	return unshare_expr (*cached);
!       return *cached;
!     }
  
    uid_sensitive_constexpr_evaluation_checker c;
  
diff -Nrcpad gcc-12.3.0/gcc/cp/cp-tree.h gcc-12.4.0/gcc/cp/cp-tree.h
*** gcc-12.3.0/gcc/cp/cp-tree.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/cp-tree.h	Thu Jun 20 08:08:06 2024
*************** struct GTY(()) language_function {
*** 2077,2082 ****
--- 2077,2083 ----
  
    BOOL_BITFIELD invalid_constexpr : 1;
    BOOL_BITFIELD throwing_cleanup : 1;
+   BOOL_BITFIELD backward_goto : 1;
  
    hash_table<named_label_hash> *x_named_labels;
  
*************** extern tree begin_eh_spec_block			(void)
*** 7014,7020 ****
  extern void finish_eh_spec_block		(tree, tree);
  extern tree build_eh_type_type			(tree);
  extern tree cp_protect_cleanup_actions		(void);
! extern void maybe_splice_retval_cleanup		(tree);
  extern tree maybe_set_retval_sentinel		(void);
  
  extern tree template_parms_to_args		(tree);
--- 7015,7021 ----
  extern void finish_eh_spec_block		(tree, tree);
  extern tree build_eh_type_type			(tree);
  extern tree cp_protect_cleanup_actions		(void);
! extern void maybe_splice_retval_cleanup		(tree, bool);
  extern tree maybe_set_retval_sentinel		(void);
  
  extern tree template_parms_to_args		(tree);
*************** extern tree do_auto_deduction
*** 7295,7301 ****
                                                   auto_deduction_context
  						 = adc_unspecified,
  						 tree = NULL_TREE,
! 						 int = LOOKUP_NORMAL);
  extern tree type_uses_auto			(tree);
  extern tree type_uses_auto_or_concept		(tree);
  extern void append_type_to_template_for_access_check (tree, tree, tree,
--- 7296,7303 ----
                                                   auto_deduction_context
  						 = adc_unspecified,
  						 tree = NULL_TREE,
! 						 int = LOOKUP_NORMAL,
! 						 tree = NULL_TREE);
  extern tree type_uses_auto			(tree);
  extern tree type_uses_auto_or_concept		(tree);
  extern void append_type_to_template_for_access_check (tree, tree, tree,
diff -Nrcpad gcc-12.3.0/gcc/cp/decl.cc gcc-12.4.0/gcc/cp/decl.cc
*** gcc-12.3.0/gcc/cp/decl.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/decl.cc	Thu Jun 20 08:08:06 2024
*************** duplicate_decls (tree newdecl, tree oldd
*** 2666,2675 ****
  		  = TINFO_USED_TEMPLATE_ID (new_template_info);
  	    }
  
! 	  if (non_templated_friend_p (olddecl))
! 	    /* Don't copy tinfo from a non-templated friend (PR105761).  */;
! 	  else
! 	    DECL_TEMPLATE_INFO (newdecl) = DECL_TEMPLATE_INFO (olddecl);
  	}
  
        if (DECL_DECLARES_FUNCTION_P (newdecl))
--- 2666,2676 ----
  		  = TINFO_USED_TEMPLATE_ID (new_template_info);
  	    }
  
! 	  /* We don't want to copy template info from a non-templated friend
! 	     (PR105761), but these shouldn't have DECL_TEMPLATE_INFO now.  */
! 	  gcc_checking_assert (!DECL_TEMPLATE_INFO (olddecl)
! 			       || !non_templated_friend_p (olddecl));
! 	  DECL_TEMPLATE_INFO (newdecl) = DECL_TEMPLATE_INFO (olddecl);
  	}
  
        if (DECL_DECLARES_FUNCTION_P (newdecl))
*************** check_goto (tree decl)
*** 3649,3654 ****
--- 3650,3657 ----
        return;
      }
  
+   cp_function_chain->backward_goto = true;
+ 
    bool saw_catch = false, complained = false;
    int identified = 0;
    tree bad;
*************** grokdeclarator (const cp_declarator *dec
*** 12300,12310 ****
  	{
  	  if (typedef_decl)
  	    {
! 	      pedwarn (loc, OPT_Wpedantic, "%qs specified with %qT",
! 		       key, type);
  	      ok = !flag_pedantic_errors;
! 	      type = DECL_ORIGINAL_TYPE (typedef_decl);
! 	      typedef_decl = NULL_TREE;
  	    }
  	  else if (declspecs->decltype_p)
  	    error_at (loc, "%qs specified with %<decltype%>", key);
--- 12303,12316 ----
  	{
  	  if (typedef_decl)
  	    {
! 	      pedwarn (loc, OPT_Wpedantic,
! 		       "%qs specified with typedef-name %qD",
! 		       key, typedef_decl);
  	      ok = !flag_pedantic_errors;
! 	      /* PR108099: __int128_t comes from c_common_nodes_and_builtins,
! 		 and is not built as a typedef.  */
! 	      if (is_typedef_decl (typedef_decl))
! 		type = DECL_ORIGINAL_TYPE (typedef_decl);
  	    }
  	  else if (declspecs->decltype_p)
  	    error_at (loc, "%qs specified with %<decltype%>", key);
*************** grokdeclarator (const cp_declarator *dec
*** 12357,12363 ****
        else if (type == char_type_node)
  	type = unsigned_char_type_node;
        else if (typedef_decl)
! 	type = unsigned_type_for (type);
        else
  	type = unsigned_type_node;
      }
--- 12363,12369 ----
        else if (type == char_type_node)
  	type = unsigned_char_type_node;
        else if (typedef_decl)
! 	type = c_common_unsigned_type (type);
        else
  	type = unsigned_type_node;
      }
*************** grokdeclarator (const cp_declarator *dec
*** 12371,12376 ****
--- 12377,12384 ----
      type = long_integer_type_node;
    else if (short_p)
      type = short_integer_type_node;
+   else if (signed_p && typedef_decl)
+     type = c_common_signed_type (type);
  
    if (decl_spec_seq_has_spec_p (declspecs, ds_complex))
      {
diff -Nrcpad gcc-12.3.0/gcc/cp/except.cc gcc-12.4.0/gcc/cp/except.cc
*** gcc-12.3.0/gcc/cp/except.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/except.cc	Thu Jun 20 08:08:06 2024
*************** maybe_set_retval_sentinel ()
*** 1318,1338 ****
     on throw.  */
  
  void
! maybe_splice_retval_cleanup (tree compound_stmt)
  {
!   /* If we need a cleanup for the return value, add it in at the same level as
       pushdecl_outermost_localscope.  And also in try blocks.  */
!   const bool function_body
!     = (current_binding_level->level_chain
!        && current_binding_level->level_chain->kind == sk_function_parms
!       /* When we're processing a default argument, c_f_d may not have been
! 	 set.  */
!        && current_function_decl);
  
!   if ((function_body || current_binding_level->kind == sk_try)
!       && !DECL_CONSTRUCTOR_P (current_function_decl)
!       && !DECL_DESTRUCTOR_P (current_function_decl)
!       && current_retval_sentinel)
      {
        location_t loc = DECL_SOURCE_LOCATION (current_function_decl);
        tree_stmt_iterator iter = tsi_start (compound_stmt);
--- 1318,1337 ----
     on throw.  */
  
  void
! maybe_splice_retval_cleanup (tree compound_stmt, bool is_try)
  {
!   if (!current_function_decl || !cfun
!       || DECL_CONSTRUCTOR_P (current_function_decl)
!       || DECL_DESTRUCTOR_P (current_function_decl)
!       || !current_retval_sentinel)
!     return;
! 
!   /* if we need a cleanup for the return value, add it in at the same level as
       pushdecl_outermost_localscope.  And also in try blocks.  */
!   cp_binding_level *b = current_binding_level;
!   const bool function_body = b->kind == sk_function_parms;
  
!   if (function_body || is_try)
      {
        location_t loc = DECL_SOURCE_LOCATION (current_function_decl);
        tree_stmt_iterator iter = tsi_start (compound_stmt);
*************** maybe_splice_retval_cleanup (tree compou
*** 1346,1354 ****
  	}
  
        /* Skip past other decls, they can't contain a return.  */
!       while (TREE_CODE (tsi_stmt (iter)) == DECL_EXPR)
  	tsi_next (&iter);
!       gcc_assert (!tsi_end_p (iter));
  
        /* Wrap the rest of the STATEMENT_LIST in a CLEANUP_STMT.  */
        tree stmts = NULL_TREE;
--- 1345,1357 ----
  	}
  
        /* Skip past other decls, they can't contain a return.  */
!       while (!tsi_end_p (iter)
! 	     && TREE_CODE (tsi_stmt (iter)) == DECL_EXPR)
  	tsi_next (&iter);
! 
!       if (tsi_end_p (iter))
! 	/* Nothing to wrap.  */
! 	return;
  
        /* Wrap the rest of the STATEMENT_LIST in a CLEANUP_STMT.  */
        tree stmts = NULL_TREE;
*************** maybe_splice_retval_cleanup (tree compou
*** 1358,1363 ****
--- 1361,1374 ----
  	  tsi_delink (&iter);
  	}
        tree dtor = build_cleanup (retval);
+       if (!function_body)
+ 	{
+ 	  /* Clear the sentinel so we don't try to destroy the retval again on
+ 	     rethrow (c++/112301).  */
+ 	  tree clear = build2 (MODIFY_EXPR, boolean_type_node,
+ 			       current_retval_sentinel, boolean_false_node);
+ 	  dtor = build2 (COMPOUND_EXPR, void_type_node, clear, dtor);
+ 	}
        tree cond = build3 (COND_EXPR, void_type_node, current_retval_sentinel,
  			  dtor, void_node);
        tree cleanup = build_stmt (loc, CLEANUP_STMT,
diff -Nrcpad gcc-12.3.0/gcc/cp/g++spec.cc gcc-12.4.0/gcc/cp/g++spec.cc
*** gcc-12.3.0/gcc/cp/g++spec.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/g++spec.cc	Thu Jun 20 08:08:06 2024
*************** lang_specific_driver (struct cl_decoded_
*** 222,228 ****
--- 222,233 ----
  
  	case OPT_static_libstdc__:
  	  library = library >= 0 ? 2 : library;
+ #ifdef HAVE_LD_STATIC_DYNAMIC
+ 	  /* Remove -static-libstdc++ from the command only if target supports
+ 	     LD_STATIC_DYNAMIC.  When not supported, it is left in so that a
+ 	     back-end target can use outfile substitution.  */
  	  args[i] |= SKIPOPT;
+ #endif
  	  break;
  
  	case OPT_stdlib_:
diff -Nrcpad gcc-12.3.0/gcc/cp/init.cc gcc-12.4.0/gcc/cp/init.cc
*** gcc-12.3.0/gcc/cp/init.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/init.cc	Thu Jun 20 08:08:06 2024
*************** build_zero_init_1 (tree type, tree nelts
*** 189,203 ****
      init = build_zero_cst (type);
    else if (RECORD_OR_UNION_CODE_P (TREE_CODE (type)))
      {
!       tree field;
        vec<constructor_elt, va_gc> *v = NULL;
  
        /* Iterate over the fields, building initializations.  */
!       for (field = TYPE_FIELDS (type); field; field = DECL_CHAIN (field))
  	{
  	  if (TREE_CODE (field) != FIELD_DECL)
  	    continue;
  
  	  if (TREE_TYPE (field) == error_mark_node)
  	    continue;
  
--- 189,209 ----
      init = build_zero_cst (type);
    else if (RECORD_OR_UNION_CODE_P (TREE_CODE (type)))
      {
!       tree field, next;
        vec<constructor_elt, va_gc> *v = NULL;
  
        /* Iterate over the fields, building initializations.  */
!       for (field = TYPE_FIELDS (type); field; field = next)
  	{
+ 	  next = DECL_CHAIN (field);
+ 
  	  if (TREE_CODE (field) != FIELD_DECL)
  	    continue;
  
+ 	  /* For unions, only the first field is initialized.  */
+ 	  if (TREE_CODE (type) == UNION_TYPE)
+ 	    next = NULL_TREE;
+ 
  	  if (TREE_TYPE (field) == error_mark_node)
  	    continue;
  
*************** build_zero_init_1 (tree type, tree nelts
*** 212,217 ****
--- 218,228 ----
  		continue;
  	    }
  
+ 	  /* Don't add zero width bitfields.  */
+ 	  if (DECL_C_BIT_FIELD (field)
+ 	      && integer_zerop (DECL_SIZE (field)))
+ 	    continue;
+ 
  	  /* Note that for class types there will be FIELD_DECLs
  	     corresponding to base classes as well.  Thus, iterating
  	     over TYPE_FIELDs will result in correct initialization of
*************** build_zero_init_1 (tree type, tree nelts
*** 230,239 ****
  	      if (value)
  		CONSTRUCTOR_APPEND_ELT(v, field, value);
  	    }
- 
- 	  /* For unions, only the first field is initialized.  */
- 	  if (TREE_CODE (type) == UNION_TYPE)
- 	    break;
  	}
  
        /* Build a constructor to contain the initializations.  */
--- 241,246 ----
*************** maybe_instantiate_nsdmi_init (tree membe
*** 572,577 ****
--- 579,588 ----
    tree init = DECL_INITIAL (member);
    if (init && DECL_LANG_SPECIFIC (member) && DECL_TEMPLATE_INFO (member))
      {
+       /* Clear any special tsubst flags; the result of NSDMI instantiation
+ 	 should be independent of the substitution context.  */
+       complain &= tf_warning_or_error;
+ 
        init = DECL_INITIAL (DECL_TI_TEMPLATE (member));
        location_t expr_loc
  	= cp_expr_loc_or_loc (init, DECL_SOURCE_LOCATION (member));
*************** maybe_instantiate_nsdmi_init (tree membe
*** 599,613 ****
  	  bool pushed = false;
  	  tree ctx = DECL_CONTEXT (member);
  
! 	  processing_template_decl_sentinel ptds (/*reset*/false);
  	  if (!currently_open_class (ctx))
  	    {
- 	      if (!LOCAL_CLASS_P (ctx))
- 		push_to_top_level ();
- 	      else
- 		/* push_to_top_level would lose the necessary function context,
- 		   just reset processing_template_decl.  */
- 		processing_template_decl = 0;
  	      push_nested_class (ctx);
  	      push_deferring_access_checks (dk_no_deferred);
  	      pushed = true;
--- 610,618 ----
  	  bool pushed = false;
  	  tree ctx = DECL_CONTEXT (member);
  
! 	  bool push_to_top = maybe_push_to_top_level (member);
  	  if (!currently_open_class (ctx))
  	    {
  	      push_nested_class (ctx);
  	      push_deferring_access_checks (dk_no_deferred);
  	      pushed = true;
*************** maybe_instantiate_nsdmi_init (tree membe
*** 635,643 ****
  	    {
  	      pop_deferring_access_checks ();
  	      pop_nested_class ();
- 	      if (!LOCAL_CLASS_P (ctx))
- 		pop_from_top_level ();
  	    }
  
  	  input_location = sloc;
  	}
--- 640,647 ----
  	    {
  	      pop_deferring_access_checks ();
  	      pop_nested_class ();
  	    }
+ 	  maybe_pop_from_top_level (push_to_top);
  
  	  input_location = sloc;
  	}
*************** build_vec_delete_1 (location_t loc, tree
*** 4154,4160 ****
  
    /* If one destructor throws, keep trying to clean up the rest, unless we're
       already in a build_vec_init cleanup.  */
!   if (flag_exceptions && !in_cleanup && !expr_noexcept_p (tmp, tf_none))
      {
        loop = build2 (TRY_CATCH_EXPR, void_type_node, loop,
  		     unshare_expr (loop));
--- 4158,4165 ----
  
    /* If one destructor throws, keep trying to clean up the rest, unless we're
       already in a build_vec_init cleanup.  */
!   if (flag_exceptions && !in_cleanup && !processing_template_decl
!       && !expr_noexcept_p (tmp, tf_none))
      {
        loop = build2 (TRY_CATCH_EXPR, void_type_node, loop,
  		     unshare_expr (loop));
*************** build_vec_init (tree base, tree maxindex
*** 4755,4761 ****
  	 But for non-classes, that's the same as value-initialization.  */
        if (empty_list)
  	{
! 	  if (cxx_dialect >= cxx11 && AGGREGATE_TYPE_P (type))
  	    {
  	      init = build_constructor (init_list_type_node, NULL);
  	    }
--- 4760,4768 ----
  	 But for non-classes, that's the same as value-initialization.  */
        if (empty_list)
  	{
! 	  if (cxx_dialect >= cxx11
! 	      && (CLASS_TYPE_P (type)
! 		  || TREE_CODE (type) == ARRAY_TYPE))
  	    {
  	      init = build_constructor (init_list_type_node, NULL);
  	    }
diff -Nrcpad gcc-12.3.0/gcc/cp/method.cc gcc-12.4.0/gcc/cp/method.cc
*** gcc-12.3.0/gcc/cp/method.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/method.cc	Thu Jun 20 08:08:06 2024
*************** early_check_defaulted_comparison (tree f
*** 1222,1228 ****
  	  /* Defaulted outside the class body.  */
  	  ctx = TYPE_MAIN_VARIANT (parmtype);
  	  if (!is_friend (ctx, fn))
! 	    error_at (loc, "defaulted %qD is not a friend of %qT", fn, ctx);
  	}
        else if (!same_type_ignoring_top_level_qualifiers_p (parmtype, ctx))
  	saw_bad = true;
--- 1222,1232 ----
  	  /* Defaulted outside the class body.  */
  	  ctx = TYPE_MAIN_VARIANT (parmtype);
  	  if (!is_friend (ctx, fn))
! 	    {
! 	      error_at (loc, "defaulted %qD is not a friend of %qT", fn, ctx);
! 	      inform (location_of (ctx), "declared here");
! 	      ok = false;
! 	    }
  	}
        else if (!same_type_ignoring_top_level_qualifiers_p (parmtype, ctx))
  	saw_bad = true;
diff -Nrcpad gcc-12.3.0/gcc/cp/name-lookup.cc gcc-12.4.0/gcc/cp/name-lookup.cc
*** gcc-12.3.0/gcc/cp/name-lookup.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/name-lookup.cc	Thu Jun 20 08:08:06 2024
*************** pop_from_top_level (void)
*** 8451,8456 ****
--- 8451,8493 ----
    free_saved_scope = s;
  }
  
+ /* Like push_to_top_level, but not if D is function-local.  Returns whether we
+    did push to top.  */
+ 
+ bool
+ maybe_push_to_top_level (tree d)
+ {
+   /* Push if D isn't function-local, or is a lambda function, for which name
+      resolution is already done.  */
+   bool push_to_top
+     = !(current_function_decl
+ 	&& !LAMBDA_FUNCTION_P (d)
+ 	&& decl_function_context (d) == current_function_decl);
+ 
+   if (push_to_top)
+     push_to_top_level ();
+   else
+     {
+       gcc_assert (!processing_template_decl);
+       push_function_context ();
+       cp_unevaluated_operand = 0;
+       c_inhibit_evaluation_warnings = 0;
+     }
+ 
+   return push_to_top;
+ }
+ 
+ /* Return from whatever maybe_push_to_top_level did.  */
+ 
+ void
+ maybe_pop_from_top_level (bool push_to_top)
+ {
+   if (push_to_top)
+     pop_from_top_level ();
+   else
+     pop_function_context ();
+ }
+ 
  /* Push into the scope of the namespace NS, even if it is deeply
     nested within another namespace.  */
  
diff -Nrcpad gcc-12.3.0/gcc/cp/name-lookup.h gcc-12.4.0/gcc/cp/name-lookup.h
*** gcc-12.3.0/gcc/cp/name-lookup.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/name-lookup.h	Thu Jun 20 08:08:06 2024
*************** extern void push_nested_namespace (tree)
*** 468,473 ****
--- 468,475 ----
  extern void pop_nested_namespace (tree);
  extern void push_to_top_level (void);
  extern void pop_from_top_level (void);
+ extern bool maybe_push_to_top_level (tree);
+ extern void maybe_pop_from_top_level (bool);
  extern void push_using_decl_bindings (tree, tree);
  
  /* Lower level interface for modules. */
diff -Nrcpad gcc-12.3.0/gcc/cp/parser.cc gcc-12.4.0/gcc/cp/parser.cc
*** gcc-12.3.0/gcc/cp/parser.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/parser.cc	Thu Jun 20 08:08:06 2024
*************** static cp_token_cache *cp_token_cache_ne
*** 249,255 ****
  static tree cp_parser_late_noexcept_specifier
    (cp_parser *, tree);
  static void noexcept_override_late_checks
!   (tree, tree);
  
  static void cp_parser_initial_pragma
    (cp_token *);
--- 249,255 ----
  static tree cp_parser_late_noexcept_specifier
    (cp_parser *, tree);
  static void noexcept_override_late_checks
!   (tree);
  
  static void cp_parser_initial_pragma
    (cp_token *);
*************** static tree cp_parser_objc_struct_declar
*** 2660,2666 ****
  /* Utility Routines */
  
  static cp_expr cp_parser_lookup_name
!   (cp_parser *, tree, enum tag_types, bool, bool, bool, tree *, location_t);
  static tree cp_parser_lookup_name_simple
    (cp_parser *, tree, location_t);
  static tree cp_parser_maybe_treat_template_as_class
--- 2660,2666 ----
  /* Utility Routines */
  
  static cp_expr cp_parser_lookup_name
!   (cp_parser *, tree, enum tag_types, int, bool, bool, tree *, location_t);
  static tree cp_parser_lookup_name_simple
    (cp_parser *, tree, location_t);
  static tree cp_parser_maybe_treat_template_as_class
*************** cp_parser_lambda_declarator_opt (cp_pars
*** 11513,11523 ****
       an opening angle if present.  */
    if (cp_lexer_next_token_is (parser->lexer, CPP_LESS))
      {
!       if (cxx_dialect < cxx14)
! 	pedwarn (parser->lexer->next_token->location, OPT_Wc__14_extensions,
! 		 "lambda templates are only available with "
! 		 "%<-std=c++14%> or %<-std=gnu++14%>");
!       else if (pedantic && cxx_dialect < cxx20)
  	pedwarn (parser->lexer->next_token->location, OPT_Wc__20_extensions,
  		 "lambda templates are only available with "
  		 "%<-std=c++20%> or %<-std=gnu++20%>");
--- 11513,11520 ----
       an opening angle if present.  */
    if (cp_lexer_next_token_is (parser->lexer, CPP_LESS))
      {
!       if (cxx_dialect < cxx20
! 	  && (pedantic || cxx_dialect < cxx14))
  	pedwarn (parser->lexer->next_token->location, OPT_Wc__20_extensions,
  		 "lambda templates are only available with "
  		 "%<-std=c++20%> or %<-std=gnu++20%>");
*************** cp_parser_template_name (cp_parser* pars
*** 18590,18596 ****
    /* Look up the name.  */
    decl = cp_parser_lookup_name (parser, identifier,
  				tag_type,
! 				/*is_template=*/true,
  				/*is_namespace=*/false,
  				check_dependency_p,
  				/*ambiguous_decls=*/NULL,
--- 18587,18593 ----
    /* Look up the name.  */
    decl = cp_parser_lookup_name (parser, identifier,
  				tag_type,
! 				/*is_template=*/1 + template_keyword_p,
  				/*is_namespace=*/false,
  				check_dependency_p,
  				/*ambiguous_decls=*/NULL,
*************** cp_parser_class_specifier_1 (cp_parser*
*** 26151,26157 ****
  	  /* The finish_struct call above performed various override checking,
  	     but it skipped unparsed noexcept-specifier operands.  Now that we
  	     have resolved them, check again.  */
! 	  noexcept_override_late_checks (type, decl);
  
  	  /* Remove any member-function parameters from the symbol table.  */
  	  pop_injected_parms ();
--- 26148,26154 ----
  	  /* The finish_struct call above performed various override checking,
  	     but it skipped unparsed noexcept-specifier operands.  Now that we
  	     have resolved them, check again.  */
! 	  noexcept_override_late_checks (decl);
  
  	  /* Remove any member-function parameters from the symbol table.  */
  	  pop_injected_parms ();
*************** cp_parser_late_noexcept_specifier (cp_pa
*** 27876,27889 ****
  }
  
  /* Perform late checking of overriding function with respect to their
!    noexcept-specifiers.  TYPE is the class and FNDECL is the function
!    that potentially overrides some virtual function with the same
!    signature.  */
  
  static void
! noexcept_override_late_checks (tree type, tree fndecl)
  {
!   tree binfo = TYPE_BINFO (type);
    tree base_binfo;
  
    if (DECL_STATIC_FUNCTION_P (fndecl))
--- 27873,27885 ----
  }
  
  /* Perform late checking of overriding function with respect to their
!    noexcept-specifiers.  FNDECL is the member function that potentially
!    overrides some virtual function with the same signature.  */
  
  static void
! noexcept_override_late_checks (tree fndecl)
  {
!   tree binfo = TYPE_BINFO (DECL_CONTEXT (fndecl));
    tree base_binfo;
  
    if (DECL_STATIC_FUNCTION_P (fndecl))
*************** prefer_type_arg (tag_types tag_type)
*** 30389,30395 ****
     refer to types are ignored.
  
     If IS_TEMPLATE is TRUE, bindings that do not refer to templates are
!    ignored.
  
     If IS_NAMESPACE is TRUE, bindings that do not refer to namespaces
     are ignored.
--- 30385,30391 ----
     refer to types are ignored.
  
     If IS_TEMPLATE is TRUE, bindings that do not refer to templates are
!    ignored.  If IS_TEMPLATE IS 2, the 'template' keyword was specified.
  
     If IS_NAMESPACE is TRUE, bindings that do not refer to namespaces
     are ignored.
*************** prefer_type_arg (tag_types tag_type)
*** 30404,30410 ****
  static cp_expr
  cp_parser_lookup_name (cp_parser *parser, tree name,
  		       enum tag_types tag_type,
! 		       bool is_template,
  		       bool is_namespace,
  		       bool check_dependency,
  		       tree *ambiguous_decls,
--- 30400,30406 ----
  static cp_expr
  cp_parser_lookup_name (cp_parser *parser, tree name,
  		       enum tag_types tag_type,
! 		       int is_template,
  		       bool is_namespace,
  		       bool check_dependency,
  		       tree *ambiguous_decls,
*************** cp_parser_lookup_name (cp_parser *parser
*** 30589,30595 ****
        else
  	decl = NULL_TREE;
  
!       if (!decl)
  	/* Look it up in the enclosing context.  DR 141: When looking for a
  	   template-name after -> or ., only consider class templates.  */
  	decl = lookup_name (name, is_namespace ? LOOK_want::NAMESPACE
--- 30585,30598 ----
        else
  	decl = NULL_TREE;
  
!       /* If we didn't find a member and have dependent bases, the member lookup
! 	 is now dependent.  */
!       if (!dep && !decl && any_dependent_bases_p (object_type))
! 	dep = true;
! 
!       if (dep && is_template == 2)
! 	/* The template keyword specifies a dependent template.  */;
!       else if (!decl)
  	/* Look it up in the enclosing context.  DR 141: When looking for a
  	   template-name after -> or ., only consider class templates.  */
  	decl = lookup_name (name, is_namespace ? LOOK_want::NAMESPACE
*************** cp_parser_lookup_name (cp_parser *parser
*** 30602,30609 ****
  
        /* If we know we're looking for a type (e.g. A in p->A::x),
  	 mock up a typename.  */
!       if (!decl && object_type && tag_type != none_type
! 	  && dependentish_scope_p (object_type))
  	{
  	  tree type = build_typename_type (object_type, name, name,
  					   typename_type);
--- 30605,30611 ----
  
        /* If we know we're looking for a type (e.g. A in p->A::x),
  	 mock up a typename.  */
!       if (!decl && dep && tag_type != none_type)
  	{
  	  tree type = build_typename_type (object_type, name, name,
  					   typename_type);
*************** cp_parser_pragma_unroll (cp_parser *pars
*** 47664,47670 ****
    location_t location = cp_lexer_peek_token (parser->lexer)->location;
    tree expr = cp_parser_constant_expression (parser);
    unsigned short unroll;
!   expr = maybe_constant_value (expr);
    HOST_WIDE_INT lunroll = 0;
    if (!INTEGRAL_TYPE_P (TREE_TYPE (expr))
        || TREE_CODE (expr) != INTEGER_CST
--- 47666,47672 ----
    location_t location = cp_lexer_peek_token (parser->lexer)->location;
    tree expr = cp_parser_constant_expression (parser);
    unsigned short unroll;
!   expr = fold_non_dependent_expr (expr);
    HOST_WIDE_INT lunroll = 0;
    if (!INTEGRAL_TYPE_P (TREE_TYPE (expr))
        || TREE_CODE (expr) != INTEGER_CST
diff -Nrcpad gcc-12.3.0/gcc/cp/pt.cc gcc-12.4.0/gcc/cp/pt.cc
*** gcc-12.3.0/gcc/cp/pt.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/pt.cc	Thu Jun 20 08:08:06 2024
*************** find_parameter_packs_r (tree *tp, int *w
*** 4106,4115 ****
      case TAG_DEFN:
        t = TREE_TYPE (t);
        if (CLASS_TYPE_P (t))
! 	/* Local class, need to look through the whole definition.  */
! 	for (tree bb : BINFO_BASE_BINFOS (TYPE_BINFO (t)))
! 	  cp_walk_tree (&BINFO_TYPE (bb), &find_parameter_packs_r,
! 			ppd, ppd->visited);
        else
  	/* Enum, look at the values.  */
  	for (tree l = TYPE_VALUES (t); l; l = TREE_CHAIN (l))
--- 4106,4119 ----
      case TAG_DEFN:
        t = TREE_TYPE (t);
        if (CLASS_TYPE_P (t))
! 	{
! 	  /* Local class, need to look through the whole definition.
! 	     TYPE_BINFO might be unset for a partial instantiation.  */
! 	  if (TYPE_BINFO (t))
! 	    for (tree bb : BINFO_BASE_BINFOS (TYPE_BINFO (t)))
! 	      cp_walk_tree (&BINFO_TYPE (bb), &find_parameter_packs_r,
! 			    ppd, ppd->visited);
! 	}
        else
  	/* Enum, look at the values.  */
  	for (tree l = TYPE_VALUES (t); l; l = TREE_CHAIN (l))
*************** canonicalize_expr_argument (tree arg, ts
*** 8322,8328 ****
     constrained than the parameter.  */
  
  static bool
! is_compatible_template_arg (tree parm, tree arg)
  {
    tree parm_cons = get_constraints (parm);
  
--- 8326,8332 ----
     constrained than the parameter.  */
  
  static bool
! is_compatible_template_arg (tree parm, tree arg, tree args)
  {
    tree parm_cons = get_constraints (parm);
  
*************** is_compatible_template_arg (tree parm, t
*** 8343,8348 ****
--- 8347,8353 ----
      {
        tree aparms = DECL_INNERMOST_TEMPLATE_PARMS (arg);
        new_args = template_parms_level_to_args (aparms);
+       new_args = add_to_template_args (args, new_args);
        ++processing_template_decl;
        parm_cons = tsubst_constraint_info (parm_cons, new_args,
  					  tf_none, NULL_TREE);
*************** convert_template_argument (tree parm,
*** 8601,8607 ****
                // Check that the constraints are compatible before allowing the
                // substitution.
                if (val != error_mark_node)
!                 if (!is_compatible_template_arg (parm, arg))
                    {
  		    if (in_decl && (complain & tf_error))
                        {
--- 8606,8612 ----
                // Check that the constraints are compatible before allowing the
                // substitution.
                if (val != error_mark_node)
! 		if (!is_compatible_template_arg (parm, arg, args))
                    {
  		    if (in_decl && (complain & tf_error))
                        {
*************** convert_template_argument (tree parm,
*** 8636,8642 ****
        else if (tree a = type_uses_auto (t))
  	{
  	  t = do_auto_deduction (t, arg, a, complain, adc_unify, args,
! 				 LOOKUP_IMPLICIT);
  	  if (t == error_mark_node)
  	    return error_mark_node;
  	}
--- 8641,8647 ----
        else if (tree a = type_uses_auto (t))
  	{
  	  t = do_auto_deduction (t, arg, a, complain, adc_unify, args,
! 				 LOOKUP_IMPLICIT, /*tmpl=*/in_decl);
  	  if (t == error_mark_node)
  	    return error_mark_node;
  	}
*************** tsubst_friend_function (tree decl, tree
*** 11339,11347 ****
        tree new_friend_template_info = DECL_TEMPLATE_INFO (new_friend);
        tree new_friend_result_template_info = NULL_TREE;
        bool new_friend_is_defn =
! 	(DECL_INITIAL (DECL_TEMPLATE_RESULT
! 		       (template_for_substitution (new_friend)))
! 	 != NULL_TREE);
        tree not_tmpl = new_friend;
  
        if (TREE_CODE (new_friend) == TEMPLATE_DECL)
--- 11344,11353 ----
        tree new_friend_template_info = DECL_TEMPLATE_INFO (new_friend);
        tree new_friend_result_template_info = NULL_TREE;
        bool new_friend_is_defn =
! 	(new_friend_template_info
! 	 && (DECL_INITIAL (DECL_TEMPLATE_RESULT
! 			   (template_for_substitution (new_friend)))
! 	     != NULL_TREE));
        tree not_tmpl = new_friend;
  
        if (TREE_CODE (new_friend) == TEMPLATE_DECL)
*************** tsubst_function_decl (tree t, tree args,
*** 14175,14180 ****
--- 14181,14190 ----
  	  && !LAMBDA_FUNCTION_P (t))
  	return t;
  
+       /* A non-templated friend doesn't get DECL_TEMPLATE_INFO.  */
+       if (non_templated_friend_p (t))
+ 	goto friend_case;
+ 
        /* Calculate the most general template of which R is a
  	 specialization.  */
        gen_tmpl = most_general_template (DECL_TI_TEMPLATE (t));
*************** tsubst_function_decl (tree t, tree args,
*** 14220,14225 ****
--- 14230,14236 ----
  	 tsubst_friend_function, and we want only to create a
  	 new decl (R) with appropriate types so that we can call
  	 determine_specialization.  */
+     friend_case:
        gen_tmpl = NULL_TREE;
        argvec = NULL_TREE;
      }
*************** tsubst_function_decl (tree t, tree args,
*** 14415,14421 ****
        /* If this is an instantiation of a member template, clone it.
  	 If it isn't, that'll be handled by
  	 clone_constructors_and_destructors.  */
!       if (PRIMARY_TEMPLATE_P (gen_tmpl))
  	clone_cdtor (r, /*update_methods=*/false);
      }
    else if ((complain & tf_error) != 0
--- 14426,14432 ----
        /* If this is an instantiation of a member template, clone it.
  	 If it isn't, that'll be handled by
  	 clone_constructors_and_destructors.  */
!       if (gen_tmpl && PRIMARY_TEMPLATE_P (gen_tmpl))
  	clone_cdtor (r, /*update_methods=*/false);
      }
    else if ((complain & tf_error) != 0
*************** tsubst_function_decl (tree t, tree args,
*** 14433,14438 ****
--- 14444,14450 ----
      }
    determine_visibility (r);
    if (DECL_DEFAULTED_OUTSIDE_CLASS_P (r)
+       && COMPLETE_TYPE_P (DECL_CONTEXT (r))
        && !processing_template_decl)
      defaulted_late_check (r);
  
*************** tsubst_decl (tree t, tree args, tsubst_f
*** 15022,15028 ****
  		if (argvec != error_mark_node)
  		  argvec = (coerce_innermost_template_parms
  			    (DECL_TEMPLATE_PARMS (gen_tmpl),
! 			     argvec, t, complain,
  			     /*all*/true, /*defarg*/true));
  		if (argvec == error_mark_node)
  		  RETURN (error_mark_node);
--- 15034,15040 ----
  		if (argvec != error_mark_node)
  		  argvec = (coerce_innermost_template_parms
  			    (DECL_TEMPLATE_PARMS (gen_tmpl),
! 			     argvec, tmpl, complain,
  			     /*all*/true, /*defarg*/true));
  		if (argvec == error_mark_node)
  		  RETURN (error_mark_node);
*************** tsubst_expr (tree t, tree args, tsubst_f
*** 19604,19616 ****
  				    templated_operator_saved_lookups (t),
  				    complain));
  
-     case ANNOTATE_EXPR:
-       tmp = RECUR (TREE_OPERAND (t, 0));
-       RETURN (build3_loc (EXPR_LOCATION (t), ANNOTATE_EXPR,
- 			  TREE_TYPE (tmp), tmp,
- 			  RECUR (TREE_OPERAND (t, 1)),
- 			  RECUR (TREE_OPERAND (t, 2))));
- 
      case PREDICT_EXPR:
        RETURN (add_stmt (copy_node (t)));
  
--- 19616,19621 ----
*************** tsubst_copy_and_build (tree t,
*** 21530,21535 ****
--- 21535,21547 ----
  	 with constant operands.  */
        RETURN (t);
  
+     case ANNOTATE_EXPR:
+       op1 = RECUR (TREE_OPERAND (t, 0));
+       RETURN (build3_loc (EXPR_LOCATION (t), ANNOTATE_EXPR,
+ 			  TREE_TYPE (op1), op1,
+ 			  RECUR (TREE_OPERAND (t, 1)),
+ 			  RECUR (TREE_OPERAND (t, 2))));
+ 
      case NON_LVALUE_EXPR:
      case VIEW_CONVERT_EXPR:
        if (location_wrapper_p (t))
*************** unify (tree tparms, tree targs, tree par
*** 24449,24455 ****
  	  if (tree a = type_uses_auto (tparm))
  	    {
  	      tparm = do_auto_deduction (tparm, arg, a,
! 					 complain, adc_unify, targs);
  	      if (tparm == error_mark_node)
  		return 1;
  	    }
--- 24461,24469 ----
  	  if (tree a = type_uses_auto (tparm))
  	    {
  	      tparm = do_auto_deduction (tparm, arg, a,
! 					 complain, adc_unify, targs,
! 					 LOOKUP_NORMAL,
! 					 TPARMS_PRIMARY_TEMPLATE (tparms));
  	      if (tparm == error_mark_node)
  		return 1;
  	    }
*************** instantiate_body (tree pattern, tree arg
*** 26493,26512 ****
    if (current_function_decl)
      save_omp_privatization_clauses (omp_privatization_save);
  
!   bool push_to_top
!     = !(current_function_decl
! 	&& !LAMBDA_FUNCTION_P (d)
! 	&& decl_function_context (d) == current_function_decl);
! 
!   if (push_to_top)
!     push_to_top_level ();
!   else
!     {
!       gcc_assert (!processing_template_decl);
!       push_function_context ();
!       cp_unevaluated_operand = 0;
!       c_inhibit_evaluation_warnings = 0;
!     }
  
    if (VAR_P (d))
      {
--- 26507,26513 ----
    if (current_function_decl)
      save_omp_privatization_clauses (omp_privatization_save);
  
!   bool push_to_top = maybe_push_to_top_level (d);
  
    if (VAR_P (d))
      {
*************** instantiate_body (tree pattern, tree arg
*** 26619,26628 ****
    if (!nested_p)
      TI_PENDING_TEMPLATE_FLAG (DECL_TEMPLATE_INFO (d)) = 0;
  
!   if (push_to_top)
!     pop_from_top_level ();
!   else
!     pop_function_context ();
  
    if (current_function_decl)
      restore_omp_privatization_clauses (omp_privatization_save);
--- 26620,26626 ----
    if (!nested_p)
      TI_PENDING_TEMPLATE_FLAG (DECL_TEMPLATE_INFO (d)) = 0;
  
!   maybe_pop_from_top_level (push_to_top);
  
    if (current_function_decl)
      restore_omp_privatization_clauses (omp_privatization_save);
*************** value_dependent_expression_p (tree expre
*** 27644,27652 ****
      case VAR_DECL:
         /* A constant with literal type and is initialized
  	  with an expression that is value-dependent.  */
!       if (DECL_DEPENDENT_INIT_P (expression)
! 	  /* FIXME cp_finish_decl doesn't fold reference initializers.  */
! 	  || TYPE_REF_P (TREE_TYPE (expression)))
  	return true;
        if (DECL_HAS_VALUE_EXPR_P (expression))
  	{
--- 27642,27648 ----
      case VAR_DECL:
         /* A constant with literal type and is initialized
  	  with an expression that is value-dependent.  */
!       if (DECL_DEPENDENT_INIT_P (expression))
  	return true;
        if (DECL_HAS_VALUE_EXPR_P (expression))
  	{
*************** value_dependent_expression_p (tree expre
*** 27661,27666 ****
--- 27657,27665 ----
  		  && value_expr == error_mark_node))
  	    return true;
  	}
+       else if (TYPE_REF_P (TREE_TYPE (expression)))
+ 	/* FIXME cp_finish_decl doesn't fold reference initializers.  */
+ 	return true;
        return false;
  
      case DYNAMIC_CAST_EXPR:
*************** do_class_deduction (tree ptype, tree tmp
*** 30334,30346 ****
     adc_requirement contexts to communicate the necessary template arguments
     to satisfaction.  OUTER_TARGS is ignored in other contexts.
  
!    For partial-concept-ids, extra args may be appended to the list of deduced
!    template arguments prior to determining constraint satisfaction.  */
  
  tree
  do_auto_deduction (tree type, tree init, tree auto_node,
!                    tsubst_flags_t complain, auto_deduction_context context,
! 		   tree outer_targs, int flags)
  {
    if (init == error_mark_node)
      return error_mark_node;
--- 30333,30352 ----
     adc_requirement contexts to communicate the necessary template arguments
     to satisfaction.  OUTER_TARGS is ignored in other contexts.
  
!    Additionally for adc_unify contexts TMPL is the template for which TYPE
!    is a template parameter type.
! 
!    For partial-concept-ids, extra args from OUTER_TARGS, TMPL and the current
!    scope may be appended to the list of deduced template arguments prior to
!    determining constraint satisfaction as appropriate.  */
  
  tree
  do_auto_deduction (tree type, tree init, tree auto_node,
! 		   tsubst_flags_t complain /* = tf_warning_or_error */,
! 		   auto_deduction_context context /* = adc_unspecified */,
! 		   tree outer_targs /* = NULL_TREE */,
! 		   int flags /* = LOOKUP_NORMAL */,
! 		   tree tmpl /* = NULL_TREE */)
  {
    if (init == error_mark_node)
      return error_mark_node;
*************** do_auto_deduction (tree type, tree init,
*** 30359,30367 ****
       auto_node.  */
    complain &= ~tf_partial;
  
!   if (tree tmpl = CLASS_PLACEHOLDER_TEMPLATE (auto_node))
      /* C++17 class template argument deduction.  */
!     return do_class_deduction (type, tmpl, init, flags, complain);
  
    if (init == NULL_TREE || TREE_TYPE (init) == NULL_TREE)
      /* Nothing we can do with this, even in deduction context.  */
--- 30365,30373 ----
       auto_node.  */
    complain &= ~tf_partial;
  
!   if (tree ctmpl = CLASS_PLACEHOLDER_TEMPLATE (auto_node))
      /* C++17 class template argument deduction.  */
!     return do_class_deduction (type, ctmpl, init, flags, complain);
  
    if (init == NULL_TREE || TREE_TYPE (init) == NULL_TREE)
      /* Nothing we can do with this, even in deduction context.  */
*************** do_auto_deduction (tree type, tree init,
*** 30521,30527 ****
  		}
  	    }
  
!       tree full_targs = add_to_template_args (outer_targs, targs);
  
        /* HACK: Compensate for callers not always communicating all levels of
  	 outer template arguments by filling in the outermost missing levels
--- 30527,30536 ----
  		}
  	    }
  
!       tree full_targs = outer_targs;
!       if (context == adc_unify && tmpl)
! 	full_targs = add_outermost_template_args (tmpl, full_targs);
!       full_targs = add_to_template_args (full_targs, targs);
  
        /* HACK: Compensate for callers not always communicating all levels of
  	 outer template arguments by filling in the outermost missing levels
diff -Nrcpad gcc-12.3.0/gcc/cp/semantics.cc gcc-12.4.0/gcc/cp/semantics.cc
*** gcc-12.3.0/gcc/cp/semantics.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/semantics.cc	Thu Jun 20 08:08:06 2024
*************** set_cleanup_locs (tree stmts, location_t
*** 627,632 ****
--- 627,643 ----
        set_cleanup_locs (stmt, loc);
  }
  
+ /* True iff the innermost block scope is a try block.  */
+ 
+ static bool
+ at_try_scope ()
+ {
+   cp_binding_level *b = current_binding_level;
+   while (b && b->kind == sk_cleanup)
+     b = b->level_chain;
+   return b && b->kind == sk_try;
+ }
+ 
  /* Finish a scope.  */
  
  tree
*************** do_poplevel (tree stmt_list)
*** 634,644 ****
  {
    tree block = NULL;
  
!   maybe_splice_retval_cleanup (stmt_list);
  
    if (stmts_are_full_exprs_p ())
      block = poplevel (kept_level_p (), 1, 0);
  
    stmt_list = pop_stmt_list (stmt_list);
  
    /* input_location is the last token of the scope, usually a }.  */
--- 645,658 ----
  {
    tree block = NULL;
  
!   bool was_try = at_try_scope ();
  
    if (stmts_are_full_exprs_p ())
      block = poplevel (kept_level_p (), 1, 0);
  
+   /* This needs to come after poplevel merges sk_cleanup statement_lists.  */
+   maybe_splice_retval_cleanup (stmt_list, was_try);
+ 
    stmt_list = pop_stmt_list (stmt_list);
  
    /* input_location is the last token of the scope, usually a }.  */
*************** simplify_loop_decl_cond (tree *cond_p, t
*** 786,792 ****
    *cond_p = boolean_true_node;
  
    if_stmt = begin_if_stmt ();
!   cond = cp_build_unary_op (TRUTH_NOT_EXPR, cond, false, tf_warning_or_error);
    finish_if_stmt_cond (cond, if_stmt);
    finish_break_stmt ();
    finish_then_clause (if_stmt);
--- 800,810 ----
    *cond_p = boolean_true_node;
  
    if_stmt = begin_if_stmt ();
!   cond_p = &cond;
!   while (TREE_CODE (*cond_p) == ANNOTATE_EXPR)
!     cond_p = &TREE_OPERAND (*cond_p, 0);
!   *cond_p = cp_build_unary_op (TRUTH_NOT_EXPR, *cond_p, false,
! 			       tf_warning_or_error);
    finish_if_stmt_cond (cond, if_stmt);
    finish_break_stmt ();
    finish_then_clause (if_stmt);
*************** tree
*** 1012,1017 ****
--- 1030,1036 ----
  finish_if_stmt_cond (tree cond, tree if_stmt)
  {
    cond = maybe_convert_cond (cond);
+   maybe_warn_for_constant_evaluated (cond, IF_STMT_CONSTEXPR_P (if_stmt));
    if (IF_STMT_CONSTEXPR_P (if_stmt)
        && !type_dependent_expression_p (cond)
        && require_constant_expression (cond)
*************** finish_if_stmt_cond (tree cond, tree if_
*** 1020,1031 ****
  	 converted to bool.  */
        && TYPE_MAIN_VARIANT (TREE_TYPE (cond)) == boolean_type_node)
      {
-       maybe_warn_for_constant_evaluated (cond, /*constexpr_if=*/true);
        cond = instantiate_non_dependent_expr (cond);
        cond = cxx_constant_value (cond, NULL_TREE);
      }
-   else
-     maybe_warn_for_constant_evaluated (cond, /*constexpr_if=*/false);
    finish_cond (&IF_COND (if_stmt), cond);
    add_stmt (if_stmt);
    THEN_CLAUSE (if_stmt) = push_stmt_list ();
--- 1039,1047 ----
*************** public:
*** 4829,4834 ****
--- 4845,4851 ----
    tree var;
    tree result;
    hash_table<nofree_ptr_hash <tree_node> > visited;
+   bool in_nrv_cleanup;
  };
  
  /* Helper function for walk_tree, used by finalize_nrv below.  */
*************** finalize_nrv_r (tree* tp, int* walk_subt
*** 4845,4858 ****
      *walk_subtrees = 0;
    /* Change all returns to just refer to the RESULT_DECL; this is a nop,
       but differs from using NULL_TREE in that it indicates that we care
!      about the value of the RESULT_DECL.  */
    else if (TREE_CODE (*tp) == RETURN_EXPR)
!     TREE_OPERAND (*tp, 0) = dp->result;
    /* Change all cleanups for the NRV to only run when an exception is
       thrown.  */
    else if (TREE_CODE (*tp) == CLEANUP_STMT
  	   && CLEANUP_DECL (*tp) == dp->var)
!     CLEANUP_EH_ONLY (*tp) = 1;
    /* Replace the DECL_EXPR for the NRV with an initialization of the
       RESULT_DECL, if needed.  */
    else if (TREE_CODE (*tp) == DECL_EXPR
--- 4862,4912 ----
      *walk_subtrees = 0;
    /* Change all returns to just refer to the RESULT_DECL; this is a nop,
       but differs from using NULL_TREE in that it indicates that we care
!      about the value of the RESULT_DECL.  But preserve anything appended
!      by check_return_expr.  */
    else if (TREE_CODE (*tp) == RETURN_EXPR)
!     {
!       tree *p = &TREE_OPERAND (*tp, 0);
!       while (TREE_CODE (*p) == COMPOUND_EXPR)
! 	p = &TREE_OPERAND (*p, 0);
!       gcc_checking_assert (TREE_CODE (*p) == INIT_EXPR
! 			   && TREE_OPERAND (*p, 0) == dp->result);
!       *p = dp->result;
!     }
    /* Change all cleanups for the NRV to only run when an exception is
       thrown.  */
    else if (TREE_CODE (*tp) == CLEANUP_STMT
  	   && CLEANUP_DECL (*tp) == dp->var)
!     {
!       dp->in_nrv_cleanup = true;
!       cp_walk_tree (&CLEANUP_BODY (*tp), finalize_nrv_r, data, 0);
!       dp->in_nrv_cleanup = false;
!       cp_walk_tree (&CLEANUP_EXPR (*tp), finalize_nrv_r, data, 0);
!       *walk_subtrees = 0;
! 
!       CLEANUP_EH_ONLY (*tp) = true;
! 
!       /* If a cleanup might throw, we need to clear current_retval_sentinel on
! 	 the exception path so an outer cleanup added by
! 	 maybe_splice_retval_cleanup doesn't run.  */
!       if (current_retval_sentinel
! 	  && cp_function_chain->throwing_cleanup)
! 	{
! 	  tree clear = build2 (MODIFY_EXPR, boolean_type_node,
! 			       current_retval_sentinel,
! 			       boolean_false_node);
! 
! 	  /* We're already only on the EH path, just prepend it.  */
! 	  tree &exp = CLEANUP_EXPR (*tp);
! 	  exp = build2 (COMPOUND_EXPR, void_type_node, clear, exp);
! 	}
!     }
!   /* Disable maybe_splice_retval_cleanup within the NRV cleanup scope, we don't
!      want to destroy the retval before the variable goes out of scope.  */
!   else if (TREE_CODE (*tp) == CLEANUP_STMT
! 	   && dp->in_nrv_cleanup
! 	   && CLEANUP_DECL (*tp) == dp->result)
!     CLEANUP_EXPR (*tp) = void_node;
    /* Replace the DECL_EXPR for the NRV with an initialization of the
       RESULT_DECL, if needed.  */
    else if (TREE_CODE (*tp) == DECL_EXPR
*************** finalize_nrv (tree *tp, tree var, tree r
*** 4908,4913 ****
--- 4962,4968 ----
  
    data.var = var;
    data.result = result;
+   data.in_nrv_cleanup = false;
    cp_walk_tree (tp, finalize_nrv_r, &data, 0);
  }
  
*************** check_trait_type (tree type)
*** 11981,11986 ****
--- 12036,12073 ----
    return !!complete_type_or_else (strip_array_types (type), NULL_TREE);
  }
  
+ /* True iff the conversion (if any) would be a direct reference
+    binding, not requiring complete types.  This is LWG2939.  */
+ 
+ static bool
+ same_type_ref_bind_p (cp_trait_kind kind, tree type1, tree type2)
+ {
+   tree from, to;
+   switch (kind)
+     {
+       /* These put the target type first.  */
+     case CPTK_IS_CONSTRUCTIBLE:
+     case CPTK_IS_NOTHROW_CONSTRUCTIBLE:
+     case CPTK_IS_TRIVIALLY_CONSTRUCTIBLE:
+       to = type1;
+       from = type2;
+       break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ 
+   if (TREE_CODE (to) != REFERENCE_TYPE || !from)
+     return false;
+   if (TREE_CODE (from) == TREE_VEC && TREE_VEC_LENGTH (from) == 1)
+     from = TREE_VEC_ELT (from, 0);
+   else if (TREE_CODE (from) == TREE_LIST && !TREE_CHAIN (from))
+     from = TREE_VALUE (from);
+   return (TYPE_P (from)
+ 	  && (same_type_ignoring_top_level_qualifiers_p
+ 	      (non_reference (to), non_reference (from))));
+ }
+ 
  /* Process a trait expression.  */
  
  tree
*************** finish_trait_expr (location_t loc, cp_tr
*** 12030,12039 ****
      case CPTK_IS_CONSTRUCTIBLE:
        break;
  
-     case CPTK_IS_TRIVIALLY_ASSIGNABLE:
      case CPTK_IS_TRIVIALLY_CONSTRUCTIBLE:
-     case CPTK_IS_NOTHROW_ASSIGNABLE:
      case CPTK_IS_NOTHROW_CONSTRUCTIBLE:
        if (!check_trait_type (type1)
  	  || !check_trait_type (type2))
  	return error_mark_node;
--- 12117,12131 ----
      case CPTK_IS_CONSTRUCTIBLE:
        break;
  
      case CPTK_IS_TRIVIALLY_CONSTRUCTIBLE:
      case CPTK_IS_NOTHROW_CONSTRUCTIBLE:
+       /* Don't check completeness for direct reference binding.  */;
+       if (same_type_ref_bind_p (kind, type1, type2))
+ 	break;
+       gcc_fallthrough ();
+ 
+     case CPTK_IS_NOTHROW_ASSIGNABLE:
+     case CPTK_IS_TRIVIALLY_ASSIGNABLE:
        if (!check_trait_type (type1)
  	  || !check_trait_type (type2))
  	return error_mark_node;
diff -Nrcpad gcc-12.3.0/gcc/cp/tree.cc gcc-12.4.0/gcc/cp/tree.cc
*** gcc-12.3.0/gcc/cp/tree.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/tree.cc	Thu Jun 20 08:08:06 2024
*************** rvalue (tree expr)
*** 970,980 ****
  
    expr = mark_rvalue_use (expr);
  
!   /* [basic.lval]
! 
!      Non-class rvalues always have cv-unqualified types.  */
    type = TREE_TYPE (expr);
!   if (!CLASS_TYPE_P (type) && cv_qualified_p (type))
      type = cv_unqualified (type);
  
    /* We need to do this for rvalue refs as well to get the right answer
--- 970,981 ----
  
    expr = mark_rvalue_use (expr);
  
!   /* [expr.type]: "If a prvalue initially has the type "cv T", where T is a
!      cv-unqualified non-class, non-array type, the type of the expression is
!      adjusted to T prior to any further analysis.  */
    type = TREE_TYPE (expr);
!   if (!CLASS_TYPE_P (type) && TREE_CODE (type) != ARRAY_TYPE
!       && cv_qualified_p (type))
      type = cv_unqualified (type);
  
    /* We need to do this for rvalue refs as well to get the right answer
diff -Nrcpad gcc-12.3.0/gcc/cp/typeck.cc gcc-12.4.0/gcc/cp/typeck.cc
*** gcc-12.3.0/gcc/cp/typeck.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/typeck.cc	Thu Jun 20 08:08:06 2024
*************** cp_build_indirect_ref (location_t loc, t
*** 3775,3787 ****
     If INDEX is of some user-defined type, it must be converted to
     integer type.  Otherwise, to make a compatible PLUS_EXPR, it
     will inherit the type of the array, which will be some pointer type.
!    
     LOC is the location to use in building the array reference.  */
  
  tree
  cp_build_array_ref (location_t loc, tree array, tree idx,
  		    tsubst_flags_t complain)
  {
    tree ret;
  
    if (idx == 0)
--- 3775,3788 ----
     If INDEX is of some user-defined type, it must be converted to
     integer type.  Otherwise, to make a compatible PLUS_EXPR, it
     will inherit the type of the array, which will be some pointer type.
! 
     LOC is the location to use in building the array reference.  */
  
  tree
  cp_build_array_ref (location_t loc, tree array, tree idx,
  		    tsubst_flags_t complain)
  {
+   tree first = NULL_TREE;
    tree ret;
  
    if (idx == 0)
*************** cp_build_array_ref (location_t loc, tree
*** 3826,3831 ****
--- 3827,3840 ----
  
    bool non_lvalue = convert_vector_to_array_for_subscript (loc, &array, idx);
  
+   /* 0[array] */
+   if (TREE_CODE (TREE_TYPE (idx)) == ARRAY_TYPE)
+     {
+       std::swap (array, idx);
+       if (flag_strong_eval_order == 2 && TREE_SIDE_EFFECTS (array))
+ 	idx = first = save_expr (idx);
+     }
+ 
    if (TREE_CODE (TREE_TYPE (array)) == ARRAY_TYPE)
      {
        tree rval, type;
*************** cp_build_array_ref (location_t loc, tree
*** 3901,3915 ****
        protected_set_expr_location (ret, loc);
        if (non_lvalue)
  	ret = non_lvalue_loc (loc, ret);
        return ret;
      }
  
    {
      tree ar = cp_default_conversion (array, complain);
      tree ind = cp_default_conversion (idx, complain);
-     tree first = NULL_TREE;
  
!     if (flag_strong_eval_order == 2 && TREE_SIDE_EFFECTS (ind))
        ar = first = save_expr (ar);
  
      /* Put the integer in IND to simplify error checking.  */
--- 3910,3925 ----
        protected_set_expr_location (ret, loc);
        if (non_lvalue)
  	ret = non_lvalue_loc (loc, ret);
+       if (first)
+ 	ret = build2_loc (loc, COMPOUND_EXPR, TREE_TYPE (ret), first, ret);
        return ret;
      }
  
    {
      tree ar = cp_default_conversion (array, complain);
      tree ind = cp_default_conversion (idx, complain);
  
!     if (!first && flag_strong_eval_order == 2 && TREE_SIDE_EFFECTS (ind))
        ar = first = save_expr (ar);
  
      /* Put the integer in IND to simplify error checking.  */
*************** treat_lvalue_as_rvalue_p (tree expr, boo
*** 10352,10358 ****
        for (tree decl = b->names; decl; decl = TREE_CHAIN (decl))
  	if (decl == retval)
  	  return set_implicit_rvalue_p (move (expr));
!       if (b->kind == sk_function_parms || b->kind == sk_try)
  	return NULL_TREE;
      }
  }
--- 10362,10370 ----
        for (tree decl = b->names; decl; decl = TREE_CHAIN (decl))
  	if (decl == retval)
  	  return set_implicit_rvalue_p (move (expr));
!       if (b->kind == sk_function_parms
! 	  || b->kind == sk_try
! 	  || b->kind == sk_namespace)
  	return NULL_TREE;
      }
  }
*************** check_return_expr (tree retval, bool *no
*** 10678,10683 ****
--- 10690,10698 ----
    if (fn_returns_value_p && flag_elide_constructors)
      {
        if (named_return_value_okay_p
+ 	  /* The current NRV implementation breaks if a backward goto needs to
+ 	     destroy the object (PR92407).  */
+ 	  && !cp_function_chain->backward_goto
            && (current_function_return_value == NULL_TREE
  	      || current_function_return_value == bare_retval))
  	current_function_return_value = bare_retval;
diff -Nrcpad gcc-12.3.0/gcc/cprop.cc gcc-12.4.0/gcc/cprop.cc
*** gcc-12.3.0/gcc/cprop.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cprop.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 22,27 ****
--- 22,28 ----
  #include "coretypes.h"
  #include "backend.h"
  #include "rtl.h"
+ #include "rtlanal.h"
  #include "cfghooks.h"
  #include "df.h"
  #include "insn-config.h"
*************** try_replace_reg (rtx from, rtx to, rtx_i
*** 795,801 ****
        /* If we've failed perform the replacement, have a single SET to
  	 a REG destination and don't yet have a note, add a REG_EQUAL note
  	 to not lose information.  */
!       if (!success && note == 0 && set != 0 && REG_P (SET_DEST (set)))
  	note = set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
      }
  
--- 796,803 ----
        /* If we've failed perform the replacement, have a single SET to
  	 a REG destination and don't yet have a note, add a REG_EQUAL note
  	 to not lose information.  */
!       if (!success && note == 0 && set != 0 && REG_P (SET_DEST (set))
! 	  && !contains_paradoxical_subreg_p (SET_SRC (set)))
  	note = set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
      }
  
diff -Nrcpad gcc-12.3.0/gcc/d/ChangeLog gcc-12.4.0/gcc/d/ChangeLog
*** gcc-12.3.0/gcc/d/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/d/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,161 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-03-10  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2024-03-10  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/112285
+ 	PR d/112290
+ 	* d-target.cc (Target::preferPassByRef): Return true for all static
+ 	array and struct types.
+ 
+ 2024-03-03  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2024-03-03  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/114171
+ 	* d-codegen.cc (lower_struct_comparison): Keep alignment of original
+ 	type in reinterpret cast for comparison.
+ 
+ 2024-03-03  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2024-02-12  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/113758
+ 	* d-codegen.cc (d_build_call): Force a TARGET_EXPR when callee
+ 	destorys its arguments.
+ 	* decl.cc (DeclVisitor::visit (VarDeclaration *)): Set
+ 	SET_DECL_VALUE_EXPR on the temporary variable to make it a placeholder
+ 	for the TARGET_EXPR_SLOT.
+ 
+ 2024-03-03  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2024-02-12  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/113125
+ 	* types.cc (TypeVisitor::visit (TypeStruct *)): Generate TYPE_DECL and
+ 	apply UDAs to opaque struct declarations.
+ 
+ 2023-10-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2023-10-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/110712
+ 	* d-codegen.cc (d_build_call): Update call to convert_for_argument.
+ 	* d-convert.cc (is_valist_parameter_type): New function.
+ 	(check_valist_conversion): New function.
+ 	(convert_for_assignment): Update signature.  Add check whether
+ 	assigning va_list is permissible.
+ 	(convert_for_argument): Likewise.
+ 	* d-tree.h (convert_for_assignment): Update signature.
+ 	(convert_for_argument): Likewise.
+ 	* expr.cc (ExprVisitor::visit (AssignExp *)): Update call to
+ 	convert_for_assignment.
+ 
+ 2023-10-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2023-10-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/112270
+ 	* d-builtins.cc (d_build_d_type_nodes): Initialize d_bool_false_node,
+ 	d_bool_true_node.
+ 	* d-codegen.cc (build_array_struct_comparison): Use d_bool_false_node
+ 	instead of boolean_false_node.
+ 	* d-convert.cc (d_truthvalue_conversion): Use d_bool_false_node and
+ 	d_bool_true_node instead of boolean_false_node and boolean_true_node.
+ 	* d-tree.h (enum d_tree_index): Add DTI_BOOL_FALSE and DTI_BOOL_TRUE.
+ 	(d_bool_false_node): New macro.
+ 	(d_bool_true_node): New macro.
+ 	* modules.cc (build_dso_cdtor_fn): Use d_bool_false_node and
+ 	d_bool_true_node instead of boolean_false_node and boolean_true_node.
+ 	(register_moduleinfo): Use d_bool_type instead of boolean_type_node.
+ 
+ 2023-08-15  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/110959
+ 	* dmd/canthrow.d (Dsymbol_canThrow): Use foreachVar.
+ 	* dmd/declaration.d (TupleDeclaration::needThis): Likewise.
+ 	(TupleDeclaration::foreachVar): New function.
+ 	(VarDeclaration::setFieldOffset): Use foreachVar.
+ 	* dmd/dinterpret.d (Interpreter::visit (DeclarationExp)): Likewise.
+ 	* dmd/dsymbolsem.d (DsymbolSemanticVisitor::visit (VarDeclaration)):
+ 	Don't push tuple field members to the scope symbol table.
+ 	(determineFields): Handle pushing tuple field members here instead.
+ 	* dmd/dtoh.d (ToCppBuffer::visit (VarDeclaration)): Visit all tuple
+ 	fields.
+ 	(ToCppBuffer::visit (TupleDeclaration)): New function.
+ 	* dmd/expression.d (expandAliasThisTuples): Use foreachVar.
+ 	* dmd/foreachvar.d (VarWalker::visit (DeclarationExp)): Likewise.
+ 	* dmd/ob.d (genKill): Likewise.
+ 	(checkObErrors): Likewise.
+ 	* dmd/semantic2.d (Semantic2Visitor::visit (TupleDeclaration)): Visit
+ 	all tuple fields.
+ 
+ 2023-07-07  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2023-07-07  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/108842
+ 	* decl.cc (DeclVisitor::visit (VarDeclaration *)): Only emit scalar
+ 	manifest constants.
+ 	(get_symbol_decl): Don't generate CONST_DECL for non-scalar manifest
+ 	constants.
+ 	* imports.cc (ImportVisitor::visit (VarDeclaration *)): New method.
+ 
+ 2023-07-02  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2023-07-02  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/110516
+ 	* intrinsics.cc (expand_volatile_load): Set TREE_SIDE_EFFECTS on the
+ 	expanded expression.
+ 	(expand_volatile_store): Likewise.
+ 
+ 2023-07-01  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2023-07-01  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/110514
+ 	* decl.cc (get_symbol_decl): Set TREE_READONLY on certain kinds of
+ 	const and immutable variables.
+ 	* expr.cc (ExprVisitor::visit (ArrayLiteralExp *)): Set TREE_READONLY
+ 	on immutable dynamic array literals.
+ 
+ 2023-06-26  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2023-06-26  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/110359
+ 	* d-convert.cc (convert_for_rvalue): Only apply the @safe boolean
+ 	conversion to boolean fields of a union.
+ 	(convert_for_condition): Call convert_for_rvalue in the default case.
+ 
+ 2023-06-26  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2023-06-26  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/110113
+ 	* dmd/escape.d (checkMutableArguments): Always allocate new buffer for
+ 	computing escapeBy.
+ 
+ 2023-06-06  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	* dmd/MERGE: Merge upstream dmd 316b89f1e3.
+ 	* dmd/VERSION: Bump version to v2.100.2.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/d/d-builtins.cc gcc-12.4.0/gcc/d/d-builtins.cc
*** gcc-12.3.0/gcc/d/d-builtins.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/d-builtins.cc	Thu Jun 20 08:08:06 2024
*************** d_build_d_type_nodes (void)
*** 846,851 ****
--- 846,854 ----
    d_bool_type = make_unsigned_type (1);
    TREE_SET_CODE (d_bool_type, BOOLEAN_TYPE);
  
+   d_bool_false_node = TYPE_MIN_VALUE (d_bool_type);
+   d_bool_true_node = TYPE_MAX_VALUE (d_bool_type);
+ 
    char8_type_node = make_unsigned_type (8);
    TYPE_STRING_FLAG (char8_type_node) = 1;
  
diff -Nrcpad gcc-12.3.0/gcc/d/d-codegen.cc gcc-12.4.0/gcc/d/d-codegen.cc
*** gcc-12.3.0/gcc/d/d-codegen.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/d-codegen.cc	Thu Jun 20 08:08:06 2024
*************** lower_struct_comparison (tree_code code,
*** 996,1001 ****
--- 996,1002 ----
  	      if (tmode == NULL_TREE)
  		tmode = make_unsigned_type (GET_MODE_BITSIZE (mode.require ()));
  
+ 	      tmode = build_aligned_type (tmode, TYPE_ALIGN (stype));
  	      t1ref = build_vconvert (tmode, t1ref);
  	      t2ref = build_vconvert (tmode, t2ref);
  
*************** build_array_struct_comparison (tree_code
*** 1105,1111 ****
  	if (length == 0 || result OP 0) break;  */
    t = build_boolop (EQ_EXPR, length, d_convert (lentype, integer_zero_node));
    t = build_boolop (TRUTH_ORIF_EXPR, t, build_boolop (code, result,
! 						      boolean_false_node));
    t = build1 (EXIT_EXPR, void_type_node, t);
    add_stmt (t);
  
--- 1106,1112 ----
  	if (length == 0 || result OP 0) break;  */
    t = build_boolop (EQ_EXPR, length, d_convert (lentype, integer_zero_node));
    t = build_boolop (TRUTH_ORIF_EXPR, t, build_boolop (code, result,
! 						      d_bool_false_node));
    t = build1 (EXIT_EXPR, void_type_node, t);
    add_stmt (t);
  
*************** d_build_call (TypeFunction *tf, tree cal
*** 2197,2210 ****
        for (size_t i = 0; i < arguments->length; ++i)
  	{
  	  Expression *arg = (*arguments)[i];
! 	  tree targ = build_expr (arg);
  
  	  if (i - varargs < nparams && i >= varargs)
  	    {
  	      /* Actual arguments for declared formal arguments.  */
  	      Parameter *parg = tf->parameterList[i - varargs];
! 	      targ = convert_for_argument (targ, parg);
  	    }
  
  	  /* Don't pass empty aggregates by value.  */
  	  if (empty_aggregate_p (TREE_TYPE (targ)) && !TREE_ADDRESSABLE (targ)
--- 2198,2213 ----
        for (size_t i = 0; i < arguments->length; ++i)
  	{
  	  Expression *arg = (*arguments)[i];
! 	  tree targ;
  
  	  if (i - varargs < nparams && i >= varargs)
  	    {
  	      /* Actual arguments for declared formal arguments.  */
  	      Parameter *parg = tf->parameterList[i - varargs];
! 	      targ = convert_for_argument (arg, parg);
  	    }
+ 	  else
+ 	    targ = build_expr (arg);
  
  	  /* Don't pass empty aggregates by value.  */
  	  if (empty_aggregate_p (TREE_TYPE (targ)) && !TREE_ADDRESSABLE (targ)
*************** d_build_call (TypeFunction *tf, tree cal
*** 2220,2229 ****
  	      Type *t = arg->type->toBasetype ();
  	      StructDeclaration *sd = t->baseElemOf ()->isTypeStruct ()->sym;
  
! 	      /* Nested structs also have ADDRESSABLE set, but if the type has
! 		 neither a copy constructor nor a destructor available, then we
! 		 need to take care of copying its value before passing it.  */
! 	      if (arg->op == EXP::structLiteral || (!sd->postblit && !sd->dtor))
  		targ = force_target_expr (targ);
  
  	      targ = convert (build_reference_type (TREE_TYPE (targ)),
--- 2223,2239 ----
  	      Type *t = arg->type->toBasetype ();
  	      StructDeclaration *sd = t->baseElemOf ()->isTypeStruct ()->sym;
  
! 	      /* Need to take care of copying its value before passing the
! 		 argument in the following scenarios:
! 		 - The argument is a literal expression; a CONSTRUCTOR can't
! 		 have its address taken.
! 		 - The type has neither a copy constructor nor a destructor
! 		 available; nested structs also have ADDRESSABLE set.
! 		 - The ABI of the function expects the callee to destroy its
! 		 arguments; when the caller is handles destruction, then `targ'
! 		 has already been made into a temporary. */
! 	      if (arg->op == EXP::structLiteral || (!sd->postblit && !sd->dtor)
! 		  || target.isCalleeDestroyingArgs (tf))
  		targ = force_target_expr (targ);
  
  	      targ = convert (build_reference_type (TREE_TYPE (targ)),
diff -Nrcpad gcc-12.3.0/gcc/d/d-convert.cc gcc-12.4.0/gcc/d/d-convert.cc
*** gcc-12.3.0/gcc/d/d-convert.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/d-convert.cc	Thu Jun 20 08:08:06 2024
*************** d_truthvalue_conversion (tree expr)
*** 132,144 ****
        return expr;
  
      case INTEGER_CST:
!       return integer_zerop (expr) ? boolean_false_node
! 				  : boolean_true_node;
  
      case REAL_CST:
        return real_compare (NE_EXPR, &TREE_REAL_CST (expr), &dconst0)
! 	     ? boolean_true_node
! 	     : boolean_false_node;
  
      case ADDR_EXPR:
        /* If we are taking the address of a decl that can never be null,
--- 132,144 ----
        return expr;
  
      case INTEGER_CST:
!       return integer_zerop (expr) ? d_bool_false_node
! 				  : d_bool_true_node;
  
      case REAL_CST:
        return real_compare (NE_EXPR, &TREE_REAL_CST (expr), &dconst0)
! 	     ? d_bool_true_node
! 	     : d_bool_false_node;
  
      case ADDR_EXPR:
        /* If we are taking the address of a decl that can never be null,
*************** d_truthvalue_conversion (tree expr)
*** 148,154 ****
  	  warning (OPT_Waddress,
  		   "the address of %qD will always evaluate as %<true%>",
  		   TREE_OPERAND (expr, 0));
! 	  return boolean_true_node;
  	}
        break;
  
--- 148,154 ----
  	  warning (OPT_Waddress,
  		   "the address of %qD will always evaluate as %<true%>",
  		   TREE_OPERAND (expr, 0));
! 	  return d_bool_true_node;
  	}
        break;
  
*************** convert_expr (tree exp, Type *etype, Typ
*** 620,626 ****
    return result ? result : convert (build_ctype (totype), exp);
  }
  
! /* Return a TREE represenwation of EXPR, whose type has been converted from
   * ETYPE to TOTYPE, and is being used in an rvalue context.  */
  
  tree
--- 620,626 ----
    return result ? result : convert (build_ctype (totype), exp);
  }
  
! /* Return a TREE representation of EXPR, whose type has been converted from
   * ETYPE to TOTYPE, and is being used in an rvalue context.  */
  
  tree
*************** convert_for_rvalue (tree expr, Type *ety
*** 635,654 ****
      {
        /* If casting from bool, the result is either 0 or 1, any other value
  	 violates @safe code, so enforce that it is never invalid.  */
!       if (CONSTANT_CLASS_P (expr))
! 	result = d_truthvalue_conversion (expr);
!       else
  	{
! 	  /* Reinterpret the boolean as an integer and test the first bit.
! 	     The generated code should end up being equivalent to:
  		*cast(ubyte *)&expr & 1;  */
! 	  machine_mode bool_mode = TYPE_MODE (TREE_TYPE (expr));
! 	  tree mtype = lang_hooks.types.type_for_mode (bool_mode, 1);
! 	  result = fold_build2 (BIT_AND_EXPR, mtype,
! 				build_vconvert (mtype, expr),
! 				build_one_cst (mtype));
  	}
  
        result = convert (build_ctype (tbtype), result);
      }
  
--- 635,661 ----
      {
        /* If casting from bool, the result is either 0 or 1, any other value
  	 violates @safe code, so enforce that it is never invalid.  */
!       for (tree ref = expr; TREE_CODE (ref) == COMPONENT_REF;
! 	   ref = TREE_OPERAND (ref, 0))
  	{
! 	  /* If the expression is a field that's part of a union, reinterpret
! 	     the boolean as an integer and test the first bit.  The generated
! 	     code should end up being equivalent to:
  		*cast(ubyte *)&expr & 1;  */
! 	  if (TREE_CODE (TREE_TYPE (TREE_OPERAND (ref, 0))) == UNION_TYPE)
! 	    {
! 	      machine_mode bool_mode = TYPE_MODE (TREE_TYPE (expr));
! 	      tree mtype = lang_hooks.types.type_for_mode (bool_mode, 1);
! 	      result = fold_build2 (BIT_AND_EXPR, mtype,
! 				    build_vconvert (mtype, expr),
! 				    build_one_cst (mtype));
! 	      break;
! 	    }
  	}
  
+       if (result == NULL_TREE)
+ 	result = d_truthvalue_conversion (expr);
+ 
        result = convert (build_ctype (tbtype), result);
      }
  
*************** convert_for_rvalue (tree expr, Type *ety
*** 688,703 ****
    return result ? result : convert_expr (expr, etype, totype);
  }
  
  /* Apply semantics of assignment to a value of type TOTYPE to EXPR
!    (e.g., pointer = array -> pointer = &array[0])
  
     Return a TREE representation of EXPR implicitly converted to TOTYPE
     for use in assignment expressions MODIFY_EXPR, INIT_EXPR.  */
  
  tree
! convert_for_assignment (tree expr, Type *etype, Type *totype)
  {
!   Type *ebtype = etype->toBasetype ();
    Type *tbtype = totype->toBasetype ();
  
    /* Assuming this only has to handle converting a non Tsarray type to
--- 695,780 ----
    return result ? result : convert_expr (expr, etype, totype);
  }
  
+ /* Helper for convert_for_assigment and convert_for_argument.
+    Returns true if EXPR is a va_list static array parameter.  */
+ 
+ static bool
+ is_valist_parameter_type (Expression *expr)
+ {
+   Declaration *decl = NULL;
+ 
+   if (VarExp *ve = expr->isVarExp ())
+     decl = ve->var;
+   else if (SymOffExp *se = expr->isSymOffExp ())
+     decl = se->var;
+ 
+   if (decl != NULL && decl->isParameter () && valist_array_p (decl->type))
+     return true;
+ 
+   return false;
+ }
+ 
+ /* Helper for convert_for_assigment and convert_for_argument.
+    Report erroneous uses of assigning or passing a va_list parameter.  */
+ 
+ static void
+ check_valist_conversion (Expression *expr, Type *totype, bool in_assignment)
+ {
+   /* Parameter symbol and its converted type.  */
+   Declaration *decl = NULL;
+   /* Type of parameter when evaluated in the expression.  */
+   Type *type = NULL;
+ 
+   if (VarExp *ve = expr->isVarExp ())
+     {
+       decl = ve->var;
+       type = ve->var->type->nextOf ()->pointerTo ();
+     }
+   else if (SymOffExp *se = expr->isSymOffExp ())
+     {
+       decl = se->var;
+       type = se->var->type->nextOf ()->pointerTo ()->pointerTo ();
+     }
+ 
+   /* Should not be called unless is_valist_parameter_type also matched.  */
+   gcc_assert (decl != NULL && decl->isParameter ()
+ 	      && valist_array_p (decl->type));
+ 
+   /* OK if conversion between types is allowed.  */
+   if (type->implicitConvTo (totype) != MATCH::nomatch)
+     return;
+ 
+   if (in_assignment)
+     {
+       error_at (make_location_t (expr->loc), "cannot convert parameter %qs "
+ 		"from type %qs to type %qs in assignment",
+ 		expr->toChars(), type->toChars (), totype->toChars ());
+     }
+   else
+     {
+       error_at (make_location_t (expr->loc), "cannot convert parameter %qs "
+ 		"from type %qs to type %qs in argument passing",
+ 		expr->toChars(), type->toChars (), totype->toChars ());
+     }
+ 
+   inform (make_location_t (decl->loc), "parameters of type %<va_list%> "
+ 	  "{aka %qs} are decayed to pointer types, and require %<va_copy%> "
+ 	  "to be converted back into a static array type",
+ 	  decl->type->toChars ());
+ }
+ 
  /* Apply semantics of assignment to a value of type TOTYPE to EXPR
!    For example: `pointer = array' gets lowered to `pointer = &array[0]'.
!    If LITERALP is true, then EXPR is a value used in the initialization
!    of another literal.
  
     Return a TREE representation of EXPR implicitly converted to TOTYPE
     for use in assignment expressions MODIFY_EXPR, INIT_EXPR.  */
  
  tree
! convert_for_assignment (Expression *expr, Type *totype, bool literalp)
  {
!   Type *ebtype = expr->type->toBasetype ();
    Type *tbtype = totype->toBasetype ();
  
    /* Assuming this only has to handle converting a non Tsarray type to
*************** convert_for_assignment (tree expr, Type
*** 717,724 ****
  	      vec <constructor_elt, va_gc> *ce = NULL;
  	      tree index = build2 (RANGE_EXPR, build_ctype (Type::tsize_t),
  				   size_zero_node, size_int (count - 1));
! 	      tree value = convert_for_assignment (expr, etype, sa_type->next);
! 
  	      /* Can't use VAR_DECLs in CONSTRUCTORS.  */
  	      if (VAR_P (value))
  		{
--- 794,801 ----
  	      vec <constructor_elt, va_gc> *ce = NULL;
  	      tree index = build2 (RANGE_EXPR, build_ctype (Type::tsize_t),
  				   size_zero_node, size_int (count - 1));
! 	      tree value = convert_for_assignment (expr, sa_type->next,
! 						   literalp);
  	      /* Can't use VAR_DECLs in CONSTRUCTORS.  */
  	      if (VAR_P (value))
  		{
*************** convert_for_assignment (tree expr, Type
*** 739,776 ****
    if ((tbtype->ty == TY::Tsarray || tbtype->ty == TY::Tstruct)
        && ebtype->isintegral ())
      {
!       if (!integer_zerop (expr))
! 	gcc_unreachable ();
! 
!       return expr;
      }
  
!   return convert_for_rvalue (expr, etype, totype);
  }
  
  /* Return a TREE representation of EXPR converted to represent
     the parameter type ARG.  */
  
  tree
! convert_for_argument (tree expr, Parameter *arg)
  {
    /* Lazy arguments: expr should already be a delegate.  */
    if (arg->storageClass & STClazy)
!     return expr;
  
    if (valist_array_p (arg->type))
      {
!       /* Do nothing if the va_list has already been decayed to a pointer.  */
!       if (!POINTER_TYPE_P (TREE_TYPE (expr)))
! 	return build_address (expr);
!     }
!   else if (parameter_reference_p (arg))
!     {
!       /* Front-end shouldn't automatically take the address.  */
!       return convert (parameter_type (arg), build_address (expr));
      }
  
!   return expr;
  }
  
  /* Perform default promotions for data used in expressions.
--- 816,868 ----
    if ((tbtype->ty == TY::Tsarray || tbtype->ty == TY::Tstruct)
        && ebtype->isintegral ())
      {
!       tree ret = build_expr (expr, false, literalp);
!       gcc_assert (integer_zerop (ret));
!       return ret;
      }
  
!   /* Assigning a va_list by value or reference, check whether RHS is a parameter
!      that has has been lowered by declaration_type or parameter_type.  */
!   if (is_valist_parameter_type (expr))
!     check_valist_conversion (expr, totype, true);
! 
!   return convert_for_rvalue (build_expr (expr, false, literalp),
! 			     expr->type, totype);
  }
  
  /* Return a TREE representation of EXPR converted to represent
     the parameter type ARG.  */
  
  tree
! convert_for_argument (Expression *expr, Parameter *arg)
  {
+   tree targ = build_expr (expr);
+ 
    /* Lazy arguments: expr should already be a delegate.  */
    if (arg->storageClass & STClazy)
!     return targ;
  
+   /* Passing a va_list by value, check whether the target requires it to
+      be decayed to a pointer type.  */
    if (valist_array_p (arg->type))
      {
!       if (!POINTER_TYPE_P (TREE_TYPE (targ)))
! 	return build_address (targ);
! 
!       /* Do nothing if the va_list has already been converted.  */
!       return targ;
      }
  
!   /* Passing a va_list by reference, check if types are really compatible
!      after conversion from static array to pointer type.  */
!   if (is_valist_parameter_type (expr))
!     check_valist_conversion (expr, arg->type, false);
! 
!   /* Front-end shouldn't automatically take the address of `ref' parameters.  */
!   if (parameter_reference_p (arg))
!     return convert (parameter_type (arg), build_address (targ));
! 
!   return targ;
  }
  
  /* Perform default promotions for data used in expressions.
*************** convert_for_condition (tree expr, Type *
*** 845,851 ****
        break;
  
      default:
!       result = expr;
        break;
      }
  
--- 937,943 ----
        break;
  
      default:
!       result = convert_for_rvalue (expr, type, type);
        break;
      }
  
diff -Nrcpad gcc-12.3.0/gcc/d/d-target.cc gcc-12.4.0/gcc/d/d-target.cc
*** gcc-12.3.0/gcc/d/d-target.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/d-target.cc	Thu Jun 20 08:08:06 2024
*************** Target::supportsLinkerDirective (void) c
*** 586,616 ****
  }
  
  /* Decides whether an `in' parameter of the specified POD type PARAM_TYPE is to
!    be passed by reference or by valie.  This is used only when compiling with
     `-fpreview=in' enabled.  */
  
  bool
  Target::preferPassByRef (Type *param_type)
  {
!   if (param_type->size () == SIZE_INVALID)
      return false;
  
!   tree type = build_ctype (param_type);
! 
!   /* Prefer a `ref' if the type is an aggregate, and its size is greater than
!      its alignment.  */
!   if (AGGREGATE_TYPE_P (type)
!       && (!valid_constant_size_p (TYPE_SIZE_UNIT (type))
! 	  || compare_tree_int (TYPE_SIZE_UNIT (type), TYPE_ALIGN (type)) > 0))
!     return true;
! 
!   /* If the back-end is always going to pass this by invisible reference.  */
!   if (pass_by_reference (NULL, function_arg_info (type, true)))
!     return true;
! 
!   /* If returning the parameter means the caller will do RVO.  */
!   if (targetm.calls.return_in_memory (type, NULL_TREE))
!     return true;
! 
!   return false;
  }
--- 586,601 ----
  }
  
  /* Decides whether an `in' parameter of the specified POD type PARAM_TYPE is to
!    be passed by reference or by value.  This is used only when compiling with
     `-fpreview=in' enabled.  */
  
  bool
  Target::preferPassByRef (Type *param_type)
  {
!   /* See note in Target::isReturnOnStack.  */
!   Type *tb = param_type->toBasetype ();
!   if (tb->size () == SIZE_INVALID)
      return false;
  
!   return (tb->ty == TY::Tstruct || tb->ty == TY::Tsarray);
  }
diff -Nrcpad gcc-12.3.0/gcc/d/d-tree.h gcc-12.4.0/gcc/d/d-tree.h
*** gcc-12.3.0/gcc/d/d-tree.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/d-tree.h	Thu Jun 20 08:08:06 2024
*************** enum d_tree_index
*** 426,431 ****
--- 426,434 ----
    DTI_NULL_ARRAY,
    DTI_BOTTOM_TYPE,
  
+   DTI_BOOL_FALSE,
+   DTI_BOOL_TRUE,
+ 
    DTI_MAX
  };
  
*************** extern GTY(()) tree d_global_trees[DTI_M
*** 462,467 ****
--- 465,473 ----
  #define null_array_node			d_global_trees[DTI_NULL_ARRAY]
  /* The bottom type, referred to as `noreturn` in code.  */
  #define noreturn_type_node		d_global_trees[DTI_BOTTOM_TYPE]
+ /* D boolean values are always byte-sized, unlike boolean_type_node.  */
+ #define d_bool_false_node		d_global_trees[DTI_BOOL_FALSE]
+ #define d_bool_true_node		d_global_trees[DTI_BOOL_TRUE]
  
  /* A prefix for internal variables, which are not user-visible.  */
  #if !defined (NO_DOT_IN_LABEL)
*************** extern tree d_truthvalue_conversion (tre
*** 600,607 ****
  extern tree d_convert (tree, tree);
  extern tree convert_expr (tree, Type *, Type *);
  extern tree convert_for_rvalue (tree, Type *, Type *);
! extern tree convert_for_assignment (tree, Type *, Type *);
! extern tree convert_for_argument (tree, Parameter *);
  extern tree convert_for_condition (tree, Type *);
  extern tree d_array_convert (Expression *);
  extern tree d_array_convert (Type *, Expression *);
--- 606,613 ----
  extern tree d_convert (tree, tree);
  extern tree convert_expr (tree, Type *, Type *);
  extern tree convert_for_rvalue (tree, Type *, Type *);
! extern tree convert_for_assignment (Expression *, Type *, bool = false);
! extern tree convert_for_argument (Expression *, Parameter *);
  extern tree convert_for_condition (tree, Type *);
  extern tree d_array_convert (Expression *);
  extern tree d_array_convert (Type *, Expression *);
diff -Nrcpad gcc-12.3.0/gcc/d/decl.cc gcc-12.4.0/gcc/d/decl.cc
*** gcc-12.3.0/gcc/d/decl.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/decl.cc	Thu Jun 20 08:08:06 2024
*************** public:
*** 781,787 ****
        {
  	/* Do not store variables we cannot take the address of,
  	   but keep the values for purposes of debugging.  */
! 	if (!d->type->isscalar ())
  	  {
  	    tree decl = get_symbol_decl (d);
  	    d_pushdecl (decl);
--- 781,787 ----
        {
  	/* Do not store variables we cannot take the address of,
  	   but keep the values for purposes of debugging.  */
! 	if (d->type->isscalar () && !d->type->hasPointers ())
  	  {
  	    tree decl = get_symbol_decl (d);
  	    d_pushdecl (decl);
*************** public:
*** 855,864 ****
  	    /* Maybe put variable on list of things needing destruction.  */
  	    if (d->needsScopeDtor ())
  	      {
  		vec_safe_push (d_function_chain->vars_in_scope, decl);
  		/* Force a TARGET_EXPR to add the corresponding cleanup.  */
! 		exp = force_target_expr (compound_expr (exp, decl));
! 		TARGET_EXPR_CLEANUP (exp) = build_expr (d->edtor);
  	      }
  
  	    add_stmt (exp);
--- 855,882 ----
  	    /* Maybe put variable on list of things needing destruction.  */
  	    if (d->needsScopeDtor ())
  	      {
+ 		/* Rewrite: `decl = exp' => TARGET_EXPR(decl, exp, dtor).  */
  		vec_safe_push (d_function_chain->vars_in_scope, decl);
+ 
  		/* Force a TARGET_EXPR to add the corresponding cleanup.  */
! 		if (TREE_CODE (exp) != TARGET_EXPR)
! 		  {
! 		    if (VOID_TYPE_P (TREE_TYPE (exp)))
! 		      exp = compound_expr (exp, decl);
! 
! 		    exp = force_target_expr (exp);
! 		  }
! 
! 		TARGET_EXPR_CLEANUP (exp)
! 		  = compound_expr (TARGET_EXPR_CLEANUP (exp),
! 				   build_expr (d->edtor));
! 
! 		/* The decl is really an alias for the TARGET_EXPR slot.  */
! 		SET_DECL_VALUE_EXPR (decl, TARGET_EXPR_SLOT (exp));
! 		DECL_HAS_VALUE_EXPR_P (decl) = 1;
! 		/* This tells the gimplifier not to emit a clobber for the decl
! 		   as its lifetime ends when the slot gets cleaned up.  */
! 		TREE_ADDRESSABLE (decl) = 0;
  	      }
  
  	    add_stmt (exp);
*************** get_symbol_decl (Declaration *decl)
*** 1199,1204 ****
--- 1217,1236 ----
        return decl->csym;
      }
  
+   if (VarDeclaration *vd = decl->isVarDeclaration ())
+     {
+       /* CONST_DECL was initially intended for enumerals and may be used for
+ 	 scalars in general, but not for aggregates.  Here a non-constant
+ 	 value is generated anyway so as its value can be used.  */
+       if (!vd->canTakeAddressOf () && !vd->type->isscalar ())
+ 	{
+ 	  gcc_assert (vd->_init && !vd->_init->isVoidInitializer ());
+ 	  Expression *ie = initializerToExpression (vd->_init);
+ 	  decl->csym = build_expr (ie, false);
+ 	  return decl->csym;
+ 	}
+     }
+ 
    /* Build the tree for the symbol.  */
    FuncDeclaration *fd = decl->isFuncDeclaration ();
    if (fd)
*************** get_symbol_decl (Declaration *decl)
*** 1246,1269 ****
        if (vd->storage_class & STCextern)
  	DECL_EXTERNAL (decl->csym) = 1;
  
!       /* CONST_DECL was initially intended for enumerals and may be used for
! 	 scalars in general, but not for aggregates.  Here a non-constant
! 	 value is generated anyway so as the CONST_DECL only serves as a
! 	 placeholder for the value, however the DECL itself should never be
! 	 referenced in any generated code, or passed to the back-end.  */
!       if (vd->storage_class & STCmanifest)
  	{
  	  /* Cannot make an expression out of a void initializer.  */
! 	  if (vd->_init && !vd->_init->isVoidInitializer ())
! 	    {
! 	      Expression *ie = initializerToExpression (vd->_init);
  
! 	      if (!vd->type->isscalar ())
! 		DECL_INITIAL (decl->csym) = build_expr (ie, false);
! 	      else
! 		DECL_INITIAL (decl->csym) = build_expr (ie, true);
! 	    }
  	}
      }
  
    /* Set the declaration mangled identifier if static.  */
--- 1278,1307 ----
        if (vd->storage_class & STCextern)
  	DECL_EXTERNAL (decl->csym) = 1;
  
!       if (!vd->canTakeAddressOf ())
  	{
  	  /* Cannot make an expression out of a void initializer.  */
! 	  gcc_assert (vd->_init && !vd->_init->isVoidInitializer ());
! 	  /* Non-scalar manifest constants have already been dealt with.  */
! 	  gcc_assert (vd->type->isscalar ());
  
! 	  Expression *ie = initializerToExpression (vd->_init);
! 	  DECL_INITIAL (decl->csym) = build_expr (ie, true);
  	}
+ 
+       /* [type-qualifiers/const-and-immutable]
+ 
+ 	 `immutable` applies to data that cannot change. Immutable data values,
+ 	 once constructed, remain the same for the duration of the program's
+ 	 execution.  */
+       if (vd->isImmutable () && !vd->setInCtorOnly ())
+ 	TREE_READONLY (decl->csym) = 1;
+ 
+       /* `const` applies to data that cannot be changed by the const reference
+ 	 to that data. It may, however, be changed by another reference to that
+ 	 same data.  */
+       if (vd->isConst () && !vd->isDataseg ())
+ 	TREE_READONLY (decl->csym) = 1;
      }
  
    /* Set the declaration mangled identifier if static.  */
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/MERGE gcc-12.4.0/gcc/d/dmd/MERGE
*** gcc-12.3.0/gcc/d/dmd/MERGE	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/MERGE	Thu Jun 20 08:08:06 2024
***************
*** 1,4 ****
! 76e3b41375e3e1cb4dbca692b587d8e916c0b49f
  
  The first line of this file holds the git revision number of the last
  merge done from the dlang/dmd repository.
--- 1,4 ----
! 316b89f1e3dffcad488c26f56f58c8adfcb84b26
  
  The first line of this file holds the git revision number of the last
  merge done from the dlang/dmd repository.
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/VERSION gcc-12.4.0/gcc/d/dmd/VERSION
*** gcc-12.3.0/gcc/d/dmd/VERSION	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/VERSION	Thu Jun 20 08:08:06 2024
***************
*** 1 ****
! v2.100.1
--- 1 ----
! v2.100.2
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/canthrow.d gcc-12.4.0/gcc/d/dmd/canthrow.d
*** gcc-12.3.0/gcc/d/dmd/canthrow.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/canthrow.d	Thu Jun 20 08:08:06 2024
*************** private CT Dsymbol_canThrow(Dsymbol s, F
*** 270,287 ****
      }
      else if (auto td = s.isTupleDeclaration())
      {
!         for (size_t i = 0; i < td.objects.dim; i++)
!         {
!             RootObject o = (*td.objects)[i];
!             if (o.dyncast() == DYNCAST.expression)
!             {
!                 Expression eo = cast(Expression)o;
!                 if (auto se = eo.isDsymbolExp())
!                 {
!                     result |= Dsymbol_canThrow(se.s, func, mustNotThrow);
!                 }
!             }
!         }
      }
      return result;
  }
--- 270,276 ----
      }
      else if (auto td = s.isTupleDeclaration())
      {
!         td.foreachVar(&symbolDg);
      }
      return result;
  }
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/declaration.d gcc-12.4.0/gcc/d/dmd/declaration.d
*** gcc-12.3.0/gcc/d/dmd/declaration.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/declaration.d	Thu Jun 20 08:08:06 2024
*************** extern (C++) final class TupleDeclaratio
*** 656,678 ****
      override bool needThis()
      {
          //printf("TupleDeclaration::needThis(%s)\n", toChars());
!         for (size_t i = 0; i < objects.dim; i++)
          {
!             RootObject o = (*objects)[i];
!             if (o.dyncast() == DYNCAST.expression)
!             {
!                 Expression e = cast(Expression)o;
!                 if (DsymbolExp ve = e.isDsymbolExp())
!                 {
!                     Declaration d = ve.s.isDeclaration();
!                     if (d && d.needThis())
!                     {
!                         return true;
!                     }
!                 }
!             }
          }
!         return false;
      }
  
      override inout(TupleDeclaration) isTupleDeclaration() inout
--- 656,701 ----
      override bool needThis()
      {
          //printf("TupleDeclaration::needThis(%s)\n", toChars());
!         return isexp ? foreachVar((s) { return s.needThis(); }) != 0 : false;
!     }
! 
!     /***********************************************************
!      * Calls dg(Dsymbol) for each Dsymbol, which should be a VarDeclaration
!      * inside DsymbolExp (isexp == true).
!      * Params:
!      *    dg = delegate to call for each Dsymbol
!      */
!     extern (D) void foreachVar(scope void delegate(Dsymbol) dg)
!     {
!         assert(isexp);
!         foreach (o; *objects)
          {
!             if (auto e = o.isExpression())
!                 if (auto se = e.isDsymbolExp())
!                     dg(se.s);
          }
!     }
! 
!     /***********************************************************
!      * Calls dg(Dsymbol) for each Dsymbol, which should be a VarDeclaration
!      * inside DsymbolExp (isexp == true).
!      * If dg returns !=0, stops and returns that value else returns 0.
!      * Params:
!      *    dg = delegate to call for each Dsymbol
!      * Returns:
!      *    last value returned by dg()
!      */
!     extern (D) int foreachVar(scope int delegate(Dsymbol) dg)
!     {
!         assert(isexp);
!         foreach (o; *objects)
!         {
!             if (auto e = o.isExpression())
!                 if (auto se = e.isDsymbolExp())
!                     if(auto ret = dg(se.s))
!                         return ret;
!         }
!         return 0;
      }
  
      override inout(TupleDeclaration) isTupleDeclaration() inout
*************** extern (C++) class VarDeclaration : Decl
*** 1142,1156 ****
              // If this variable was really a tuple, set the offsets for the tuple fields
              TupleDeclaration v2 = aliassym.isTupleDeclaration();
              assert(v2);
!             for (size_t i = 0; i < v2.objects.dim; i++)
!             {
!                 RootObject o = (*v2.objects)[i];
!                 assert(o.dyncast() == DYNCAST.expression);
!                 Expression e = cast(Expression)o;
!                 assert(e.op == EXP.dSymbol);
!                 DsymbolExp se = e.isDsymbolExp();
!                 se.s.setFieldOffset(ad, fieldState, isunion);
!             }
              return;
          }
  
--- 1165,1171 ----
              // If this variable was really a tuple, set the offsets for the tuple fields
              TupleDeclaration v2 = aliassym.isTupleDeclaration();
              assert(v2);
!             v2.foreachVar((s) { s.setFieldOffset(ad, fieldState, isunion); });
              return;
          }
  
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/dinterpret.d gcc-12.4.0/gcc/d/dmd/dinterpret.d
*** gcc-12.3.0/gcc/d/dmd/dinterpret.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/dinterpret.d	Thu Jun 20 08:08:06 2024
*************** public:
*** 2291,2306 ****
                  result = null;
  
                  // Reserve stack space for all tuple members
!                 if (!td.objects)
!                     return;
!                 foreach (o; *td.objects)
                  {
!                     Expression ex = isExpression(o);
!                     DsymbolExp ds = ex ? ex.isDsymbolExp() : null;
!                     VarDeclaration v2 = ds ? ds.s.isVarDeclaration() : null;
                      assert(v2);
                      if (v2.isDataseg() && !v2.isCTFE())
!                         continue;
  
                      ctfeGlobals.stack.push(v2);
                      if (v2._init)
--- 2291,2302 ----
                  result = null;
  
                  // Reserve stack space for all tuple members
!                 td.foreachVar((s)
                  {
!                     VarDeclaration v2 = s.isVarDeclaration();
                      assert(v2);
                      if (v2.isDataseg() && !v2.isCTFE())
!                         return 0;
  
                      ctfeGlobals.stack.push(v2);
                      if (v2._init)
*************** public:
*** 2310,2316 ****
                          {
                              einit = interpretRegion(ie.exp, istate, goal);
                              if (exceptionOrCant(einit))
!                                 return;
                          }
                          else if (v2._init.isVoidInitializer())
                          {
--- 2306,2312 ----
                          {
                              einit = interpretRegion(ie.exp, istate, goal);
                              if (exceptionOrCant(einit))
!                                 return 1;
                          }
                          else if (v2._init.isVoidInitializer())
                          {
*************** public:
*** 2320,2330 ****
                          {
                              e.error("declaration `%s` is not yet implemented in CTFE", e.toChars());
                              result = CTFEExp.cantexp;
!                             return;
                          }
                          setValue(v2, einit);
                      }
!                 }
                  return;
              }
              if (v.isStatic())
--- 2316,2327 ----
                          {
                              e.error("declaration `%s` is not yet implemented in CTFE", e.toChars());
                              result = CTFEExp.cantexp;
!                             return 1;
                          }
                          setValue(v2, einit);
                      }
!                     return 0;
!                 });
                  return;
              }
              if (v.isStatic())
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/dsymbolsem.d gcc-12.4.0/gcc/d/dmd/dsymbolsem.d
*** gcc-12.3.0/gcc/d/dmd/dsymbolsem.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/dsymbolsem.d	Thu Jun 20 08:08:06 2024
*************** private extern(C++) final class DsymbolS
*** 650,656 ****
                  else
                      ti = dsym._init ? dsym._init.syntaxCopy() : null;
  
!                 StorageClass storage_class = STC.temp | STC.local | dsym.storage_class;
                  if ((dsym.storage_class & STC.parameter) && (arg.storageClass & STC.parameter))
                      storage_class |= arg.storageClass;
                  auto v = new VarDeclaration(dsym.loc, arg.type, id, ti, storage_class);
--- 650,656 ----
                  else
                      ti = dsym._init ? dsym._init.syntaxCopy() : null;
  
!                 StorageClass storage_class = STC.temp | dsym.storage_class;
                  if ((dsym.storage_class & STC.parameter) && (arg.storageClass & STC.parameter))
                      storage_class |= arg.storageClass;
                  auto v = new VarDeclaration(dsym.loc, arg.type, id, ti, storage_class);
*************** private extern(C++) final class DsymbolS
*** 659,672 ****
  
                  v.dsymbolSemantic(sc);
  
-                 if (sc.scopesym)
-                 {
-                     //printf("adding %s to %s\n", v.toChars(), sc.scopesym.toChars());
-                     if (sc.scopesym.members)
-                         // Note this prevents using foreach() over members, because the limits can change
-                         sc.scopesym.members.push(v);
-                 }
- 
                  Expression e = new DsymbolExp(dsym.loc, v);
                  (*exps)[i] = e;
              }
--- 659,664 ----
*************** bool determineFields(AggregateDeclaratio
*** 6819,6825 ****
              return 1;
  
          if (v.aliassym)
!             return 0;   // If this variable was really a tuple, skip it.
  
          if (v.storage_class & (STC.static_ | STC.extern_ | STC.tls | STC.gshared | STC.manifest | STC.ctfe | STC.templateparameter))
              return 0;
--- 6811,6822 ----
              return 1;
  
          if (v.aliassym)
!         {
!             // If this variable was really a tuple, process each element.
!             if (auto tup = v.aliassym.isTupleDeclaration())
!                 return tup.foreachVar(tv => tv.apply(&func, ad));
!             return 0;
!         }
  
          if (v.storage_class & (STC.static_ | STC.extern_ | STC.tls | STC.gshared | STC.manifest | STC.ctfe | STC.templateparameter))
              return 0;
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/dtoh.d gcc-12.4.0/gcc/d/dmd/dtoh.d
*** gcc-12.3.0/gcc/d/dmd/dtoh.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/dtoh.d	Thu Jun 20 08:08:06 2024
*************** public:
*** 877,883 ****
--- 877,887 ----
          // Tuple field are expanded into multiple VarDeclarations
          // (we'll visit them later)
          if (vd.type && vd.type.isTypeTuple())
+         {
+             assert(vd.aliassym);
+             vd.toAlias().accept(this);
              return;
+         }
  
          if (vd.originalType && vd.type == AST.Type.tsize_t)
              origType = vd.originalType;
*************** public:
*** 1667,1672 ****
--- 1671,1683 ----
          assert(false, "This node type should be handled in the EnumDeclaration");
      }
  
+     override void visit(AST.TupleDeclaration tup)
+     {
+         debug (Debug_DtoH) mixin(traceVisit!tup);
+ 
+         tup.foreachVar((s) { s.accept(this); });
+     }
+ 
      /**
       * Prints a member/parameter/variable declaration into `buf`.
       *
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/escape.d gcc-12.4.0/gcc/d/dmd/escape.d
*** gcc-12.3.0/gcc/d/dmd/escape.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/escape.d	Thu Jun 20 08:08:06 2024
*************** bool checkMutableArguments(Scope* sc, Fu
*** 77,98 ****
          bool isMutable;         // true if reference to mutable
      }
  
!     /* Store escapeBy as static data escapeByStorage so we can keep reusing the same
!      * arrays rather than reallocating them.
!      */
!     __gshared EscapeBy[] escapeByStorage;
!     auto escapeBy = escapeByStorage;
!     if (escapeBy.length < len)
!     {
!         auto newPtr = cast(EscapeBy*)mem.xrealloc(escapeBy.ptr, len * EscapeBy.sizeof);
!         // Clear the new section
!         memset(newPtr + escapeBy.length, 0, (len - escapeBy.length) * EscapeBy.sizeof);
!         escapeBy = newPtr[0 .. len];
!         escapeByStorage = escapeBy;
!     }
!     else
!         escapeBy = escapeBy[0 .. len];
! 
      const paramLength = tf.parameterList.length;
  
      // Fill in escapeBy[] with arguments[], ethis, and outerVars[]
--- 77,83 ----
          bool isMutable;         // true if reference to mutable
      }
  
!     auto escapeBy = new EscapeBy[len];
      const paramLength = tf.parameterList.length;
  
      // Fill in escapeBy[] with arguments[], ethis, and outerVars[]
*************** bool checkMutableArguments(Scope* sc, Fu
*** 212,224 ****
          escape(i, eb, false);
      }
  
-     /* Reset the arrays in escapeBy[] so we can reuse them next time through
-      */
-     foreach (ref eb; escapeBy)
-     {
-         eb.er.reset();
-     }
- 
      return errors;
  }
  
--- 197,202 ----
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/expression.d gcc-12.4.0/gcc/d/dmd/expression.d
*** gcc-12.3.0/gcc/d/dmd/expression.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/expression.d	Thu Jun 20 08:08:06 2024
*************** int expandAliasThisTuples(Expressions* e
*** 348,361 ****
          if (TupleDeclaration td = exp.isAliasThisTuple)
          {
              exps.remove(u);
!             foreach (i, o; *td.objects)
              {
!                 auto d = o.isExpression().isDsymbolExp().s.isDeclaration();
                  auto e = new DotVarExp(exp.loc, exp, d);
                  assert(d.type);
                  e.type = d.type;
                  exps.insert(u + i, e);
!             }
              version (none)
              {
                  printf("expansion ->\n");
--- 348,363 ----
          if (TupleDeclaration td = exp.isAliasThisTuple)
          {
              exps.remove(u);
!             size_t i;
!             td.foreachVar((s)
              {
!                 auto d = s.isDeclaration();
                  auto e = new DotVarExp(exp.loc, exp, d);
                  assert(d.type);
                  e.type = d.type;
                  exps.insert(u + i, e);
!                 ++i;
!             });
              version (none)
              {
                  printf("expansion ->\n");
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/foreachvar.d gcc-12.4.0/gcc/d/dmd/foreachvar.d
*** gcc-12.3.0/gcc/d/dmd/foreachvar.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/foreachvar.d	Thu Jun 20 08:08:06 2024
*************** void foreachVar(Expression e, void deleg
*** 75,93 ****
              if (!v)
                  return;
              if (TupleDeclaration td = v.toAlias().isTupleDeclaration())
!             {
!                 if (!td.objects)
!                     return;
!                 foreach (o; *td.objects)
!                 {
!                     Expression ex = isExpression(o);
!                     DsymbolExp s = ex ? ex.isDsymbolExp() : null;
!                     assert(s);
!                     VarDeclaration v2 = s.s.isVarDeclaration();
!                     assert(v2);
!                     dgVar(v2);
!                 }
!             }
              else
                  dgVar(v);
              Dsymbol s = v.toAlias();
--- 75,81 ----
              if (!v)
                  return;
              if (TupleDeclaration td = v.toAlias().isTupleDeclaration())
!                 td.foreachVar((s) { dgVar(s.isVarDeclaration()); });
              else
                  dgVar(v);
              Dsymbol s = v.toAlias();
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/ob.d gcc-12.4.0/gcc/d/dmd/ob.d
*** gcc-12.3.0/gcc/d/dmd/ob.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/ob.d	Thu Jun 20 08:08:06 2024
*************** void genKill(ref ObState obstate, ObNode
*** 1407,1422 ****
                      }
                      else if (auto td = s.isTupleDeclaration())
                      {
!                         foreach (o; *td.objects)
!                         {
!                             if (auto eo = o.isExpression())
!                             {
!                                 if (auto se = eo.isDsymbolExp())
!                                 {
!                                     Dsymbol_visit(se.s);
!                                 }
!                             }
!                         }
                      }
                  }
  
--- 1407,1413 ----
                      }
                      else if (auto td = s.isTupleDeclaration())
                      {
!                         td.foreachVar(&Dsymbol_visit);
                      }
                  }
  
*************** void checkObErrors(ref ObState obstate)
*** 2107,2122 ****
                      }
                      else if (auto td = s.isTupleDeclaration())
                      {
!                         foreach (o; *td.objects)
!                         {
!                             if (auto eo = o.isExpression())
!                             {
!                                 if (auto se = eo.isDsymbolExp())
!                                 {
!                                     Dsymbol_visit(se.s);
!                                 }
!                             }
!                         }
                      }
                  }
  
--- 2098,2104 ----
                      }
                      else if (auto td = s.isTupleDeclaration())
                      {
!                         td.foreachVar(&Dsymbol_visit);
                      }
                  }
  
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/semantic2.d gcc-12.4.0/gcc/d/dmd/semantic2.d
*** gcc-12.3.0/gcc/d/dmd/semantic2.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/semantic2.d	Thu Jun 20 08:08:06 2024
*************** private extern(C++) final class Semantic
*** 677,682 ****
--- 677,687 ----
      {
          visit(cast(AggregateDeclaration) cd);
      }
+ 
+     override void visit(TupleDeclaration td)
+     {
+         td.foreachVar((s) { s.accept(this); });
+     }
  }
  
  /**
diff -Nrcpad gcc-12.3.0/gcc/d/expr.cc gcc-12.4.0/gcc/d/expr.cc
*** gcc-12.3.0/gcc/d/expr.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/expr.cc	Thu Jun 20 08:08:06 2024
*************** public:
*** 1057,1064 ****
  	Declaration *decl = e->e1->isVarExp ()->var;
  	if (decl->storage_class & (STCout | STCref))
  	  {
! 	    tree t2 = convert_for_assignment (build_expr (e->e2),
! 					      e->e2->type, e->e1->type);
  	    tree t1 = build_expr (e->e1);
  	    /* Want reference to lhs, not indirect ref.  */
  	    t1 = TREE_OPERAND (t1, 0);
--- 1057,1063 ----
  	Declaration *decl = e->e1->isVarExp ()->var;
  	if (decl->storage_class & (STCout | STCref))
  	  {
! 	    tree t2 = convert_for_assignment (e->e2, e->e1->type);
  	    tree t1 = build_expr (e->e1);
  	    /* Want reference to lhs, not indirect ref.  */
  	    t1 = TREE_OPERAND (t1, 0);
*************** public:
*** 1078,1085 ****
      if (tb1->ty == TY::Tstruct)
        {
  	tree t1 = build_expr (e->e1);
! 	tree t2 = convert_for_assignment (build_expr (e->e2, false, true),
! 					  e->e2->type, e->e1->type);
  	StructDeclaration *sd = tb1->isTypeStruct ()->sym;
  
  	/* Look for struct = 0.  */
--- 1077,1083 ----
      if (tb1->ty == TY::Tstruct)
        {
  	tree t1 = build_expr (e->e1);
! 	tree t2 = convert_for_assignment (e->e2, e->e1->type, true);
  	StructDeclaration *sd = tb1->isTypeStruct ()->sym;
  
  	/* Look for struct = 0.  */
*************** public:
*** 1157,1164 ****
  	    || (e->op == EXP::blit || e->e1->type->size () == 0))
  	  {
  	    tree t1 = build_expr (e->e1);
! 	    tree t2 = convert_for_assignment (build_expr (e->e2),
! 					      e->e2->type, e->e1->type);
  
  	    this->result_ = build_assign (modifycode, t1, t2);
  	    return;
--- 1155,1161 ----
  	    || (e->op == EXP::blit || e->e1->type->size () == 0))
  	  {
  	    tree t1 = build_expr (e->e1);
! 	    tree t2 = convert_for_assignment (e->e2, e->e1->type);
  
  	    this->result_ = build_assign (modifycode, t1, t2);
  	    return;
*************** public:
*** 1192,1199 ****
  
      /* Simple assignment.  */
      tree t1 = build_expr (e->e1);
!     tree t2 = convert_for_assignment (build_expr (e->e2),
! 				      e->e2->type, e->e1->type);
  
      this->result_ = build_assign (modifycode, t1, t2);
    }
--- 1189,1195 ----
  
      /* Simple assignment.  */
      tree t1 = build_expr (e->e1);
!     tree t2 = convert_for_assignment (e->e2, e->e1->type);
  
      this->result_ = build_assign (modifycode, t1, t2);
    }
*************** public:
*** 2708,2713 ****
--- 2704,2713 ----
  	    if (tb->ty == TY::Tarray)
  	      ctor = d_array_value (type, size_int (e->elements->length), ctor);
  
+ 	    /* Immutable literals can be placed in rodata.  */
+ 	    if (tb->isImmutable ())
+ 	      TREE_READONLY (decl) = 1;
+ 
  	    d_pushdecl (decl);
  	    rest_of_decl_compilation (decl, 1, 0);
  	  }
diff -Nrcpad gcc-12.3.0/gcc/d/imports.cc gcc-12.4.0/gcc/d/imports.cc
*** gcc-12.3.0/gcc/d/imports.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/imports.cc	Thu Jun 20 08:08:06 2024
*************** public:
*** 127,132 ****
--- 127,141 ----
      this->result_ = this->make_import (TYPE_STUB_DECL (type));
    }
  
+   void visit (VarDeclaration *d)
+   {
+     /* Not all kinds of manifest constants create a CONST_DECL.  */
+     if (!d->canTakeAddressOf () && !d->type->isscalar ())
+       return;
+ 
+     visit ((Declaration *) d);
+   }
+ 
    /* For now, ignore importing other kinds of dsymbols.  */
    void visit (ScopeDsymbol *)
    {
diff -Nrcpad gcc-12.3.0/gcc/d/intrinsics.cc gcc-12.4.0/gcc/d/intrinsics.cc
*** gcc-12.3.0/gcc/d/intrinsics.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/intrinsics.cc	Thu Jun 20 08:08:06 2024
*************** expand_volatile_load (tree callexp)
*** 721,726 ****
--- 721,727 ----
    tree type = build_qualified_type (TREE_TYPE (ptrtype), TYPE_QUAL_VOLATILE);
    tree result = indirect_ref (type, ptr);
    TREE_THIS_VOLATILE (result) = 1;
+   TREE_SIDE_EFFECTS (result) = 1;
  
    return result;
  }
*************** expand_volatile_store (tree callexp)
*** 748,753 ****
--- 749,755 ----
    tree type = build_qualified_type (TREE_TYPE (ptrtype), TYPE_QUAL_VOLATILE);
    tree result = indirect_ref (type, ptr);
    TREE_THIS_VOLATILE (result) = 1;
+   TREE_SIDE_EFFECTS (result) = 1;
  
    /* (*(volatile T *) ptr) = value;  */
    tree value = CALL_EXPR_ARG (callexp, 1);
diff -Nrcpad gcc-12.3.0/gcc/d/modules.cc gcc-12.4.0/gcc/d/modules.cc
*** gcc-12.3.0/gcc/d/modules.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/modules.cc	Thu Jun 20 08:08:06 2024
*************** static tree
*** 329,335 ****
  build_dso_cdtor_fn (bool ctor_p)
  {
    const char *name = ctor_p ? GDC_PREFIX ("dso_ctor") : GDC_PREFIX ("dso_dtor");
!   tree condition = ctor_p ? boolean_true_node : boolean_false_node;
  
    /* Declaration of dso_ctor/dso_dtor is:
  
--- 329,335 ----
  build_dso_cdtor_fn (bool ctor_p)
  {
    const char *name = ctor_p ? GDC_PREFIX ("dso_ctor") : GDC_PREFIX ("dso_dtor");
!   tree condition = ctor_p ? d_bool_true_node : d_bool_false_node;
  
    /* Declaration of dso_ctor/dso_dtor is:
  
*************** register_moduleinfo (Module *decl, tree
*** 452,458 ****
    d_finish_decl (dso_slot_node);
  
    dso_initialized_node = build_dso_registry_var (GDC_PREFIX ("dso_initialized"),
! 						 boolean_type_node);
    d_finish_decl (dso_initialized_node);
  
    /* Declare dso_ctor() and dso_dtor().  */
--- 452,458 ----
    d_finish_decl (dso_slot_node);
  
    dso_initialized_node = build_dso_registry_var (GDC_PREFIX ("dso_initialized"),
! 						 d_bool_type);
    d_finish_decl (dso_initialized_node);
  
    /* Declare dso_ctor() and dso_dtor().  */
diff -Nrcpad gcc-12.3.0/gcc/d/types.cc gcc-12.4.0/gcc/d/types.cc
*** gcc-12.3.0/gcc/d/types.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/types.cc	Thu Jun 20 08:08:06 2024
*************** public:
*** 1103,1108 ****
--- 1103,1113 ----
  	apply_user_attributes (t->sym, t->ctype);
  	finish_aggregate_type (structsize, alignsize, t->ctype);
        }
+     else
+       {
+ 	build_type_decl (t->ctype, t->sym);
+ 	apply_user_attributes (t->sym, t->ctype);
+       }
  
      TYPE_CONTEXT (t->ctype) = d_decl_context (t->sym);
      build_type_decl (t->ctype, t->sym);
diff -Nrcpad gcc-12.3.0/gcc/doc/avr-mmcu.texi gcc-12.4.0/gcc/doc/avr-mmcu.texi
*** gcc-12.3.0/gcc/doc/avr-mmcu.texi	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/doc/avr-mmcu.texi	Thu Jun 20 08:08:06 2024
***************
*** 34,44 ****
  
  @item avr4
  ``Enhanced'' devices with up to 8@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{atmega48}, @code{atmega48a}, @code{atmega48p}, @code{atmega48pa}, @code{atmega48pb}, @code{atmega8}, @code{atmega8a}, @code{atmega8hva}, @code{atmega88}, @code{atmega88a}, @code{atmega88p}, @code{atmega88pa}, @code{atmega88pb}, @code{atmega8515}, @code{atmega8535}, @code{ata6285}, @code{ata6286}, @code{ata6289}, @code{ata6612c}, @code{at90pwm1}, @code{at90pwm2}, @code{at90pwm2b}, @code{at90pwm3}, @code{at90pwm3b}, @code{at90pwm81}.
  
  @item avr5
  ``Enhanced'' devices with 16@tie{}KiB up to 64@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{atmega16}, @code{atmega16a}, @code{atmega16hva}, @code{atmega16hva2}, @code{atmega16hvb}, @code{atmega16hvbrevb}, @code{atmega16m1}, @code{atmega16u4}, @code{atmega161}, @code{atmega162}, @code{atmega163}, @code{atmega164a}, @code{atmega164p}, @code{atmega164pa}, @code{atmega165}, @code{atmega165a}, @code{atmega165p}, @code{atmega165pa}, @code{atmega168}, @code{atmega168a}, @code{atmega168p}, @code{atmega168pa}, @code{atmega168pb}, @code{atmega169}, @code{atmega169a}, @code{atmega169p}, @code{atmega169pa}, @code{atmega32}, @code{atmega32a}, @code{atmega32c1}, @code{atmega32hvb}, @code{atmega32hvbrevb}, @code{atmega32m1}, @code{atmega32u4}, @code{atmega32u6}, @code{atmega323}, @code{atmega324a}, @code{atmega324p}, @code{atmega324pa}, @code{atmega324pb}, @code{atmega325}, @code{atmega325a}, @code{atmega325p}, @code{atmega325pa}, @code{atmega328}, @code{atmega328p}, @code{atmega328pb}, @code{atmega329}, @code{atmega329a}, @code{atmega329p}, @code{atmega329pa}, @code{atmega3250}, @code{atmega3250a}, @code{atmega3250p}, @code{atmega3250pa}, @code{atmega3290}, @code{atmega3290a}, @code{atmega3290p}, @code{atmega3290pa}, @code{atmega406}, @code{atmega64}, @code{atmega64a}, @code{atmega64c1}, @code{atmega64hve}, @code{atmega64hve2}, @code{atmega64m1}, @code{atmega64rfr2}, @code{atmega640}, @code{atmega644}, @code{atmega644a}, @code{atmega644p}, @code{atmega644pa}, @code{atmega644rfr2}, @code{atmega645}, @code{atmega645a}, @code{atmega645p}, @code{atmega649}, @code{atmega649a}, @code{atmega649p}, @code{atmega6450}, @code{atmega6450a}, @code{atmega6450p}, @code{atmega6490}, @code{atmega6490a}, @code{atmega6490p}, @code{ata5795}, @code{ata5790}, @code{ata5790n}, @code{ata5791}, @code{ata6613c}, @code{ata6614q}, @code{ata5782}, @code{ata5831}, @code{ata8210}, @code{ata8510}, @code{ata5702m322}, @code{at90pwm161}, @code{at90pwm216}, @code{at90pwm316}, @code{at90can32}, @code{at90can64}, @code{at90scr100}, @code{at90usb646}, @code{at90usb647}, @code{at94k}, @code{m3000}.
  
  @item avr51
  ``Enhanced'' devices with 128@tie{}KiB of program memory.
--- 34,44 ----
  
  @item avr4
  ``Enhanced'' devices with up to 8@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{atmega48}, @code{atmega48a}, @code{atmega48p}, @code{atmega48pa}, @code{atmega48pb}, @code{atmega8}, @code{atmega8a}, @code{atmega8hva}, @code{atmega88}, @code{atmega88a}, @code{atmega88p}, @code{atmega88pa}, @code{atmega88pb}, @code{atmega8515}, @code{atmega8535}, @code{ata5795}, @code{ata6285}, @code{ata6286}, @code{ata6289}, @code{ata6612c}, @code{at90pwm1}, @code{at90pwm2}, @code{at90pwm2b}, @code{at90pwm3}, @code{at90pwm3b}, @code{at90pwm81}.
  
  @item avr5
  ``Enhanced'' devices with 16@tie{}KiB up to 64@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{atmega16}, @code{atmega16a}, @code{atmega16hva}, @code{atmega16hva2}, @code{atmega16hvb}, @code{atmega16hvbrevb}, @code{atmega16m1}, @code{atmega16u4}, @code{atmega161}, @code{atmega162}, @code{atmega163}, @code{atmega164a}, @code{atmega164p}, @code{atmega164pa}, @code{atmega165}, @code{atmega165a}, @code{atmega165p}, @code{atmega165pa}, @code{atmega168}, @code{atmega168a}, @code{atmega168p}, @code{atmega168pa}, @code{atmega168pb}, @code{atmega169}, @code{atmega169a}, @code{atmega169p}, @code{atmega169pa}, @code{atmega32}, @code{atmega32a}, @code{atmega32c1}, @code{atmega32hvb}, @code{atmega32hvbrevb}, @code{atmega32m1}, @code{atmega32u4}, @code{atmega32u6}, @code{atmega323}, @code{atmega324a}, @code{atmega324p}, @code{atmega324pa}, @code{atmega324pb}, @code{atmega325}, @code{atmega325a}, @code{atmega325p}, @code{atmega325pa}, @code{atmega328}, @code{atmega328p}, @code{atmega328pb}, @code{atmega329}, @code{atmega329a}, @code{atmega329p}, @code{atmega329pa}, @code{atmega3250}, @code{atmega3250a}, @code{atmega3250p}, @code{atmega3250pa}, @code{atmega3290}, @code{atmega3290a}, @code{atmega3290p}, @code{atmega3290pa}, @code{atmega406}, @code{atmega64}, @code{atmega64a}, @code{atmega64c1}, @code{atmega64hve}, @code{atmega64hve2}, @code{atmega64m1}, @code{atmega64rfr2}, @code{atmega640}, @code{atmega644}, @code{atmega644a}, @code{atmega644p}, @code{atmega644pa}, @code{atmega644rfr2}, @code{atmega645}, @code{atmega645a}, @code{atmega645p}, @code{atmega649}, @code{atmega649a}, @code{atmega649p}, @code{atmega6450}, @code{atmega6450a}, @code{atmega6450p}, @code{atmega6490}, @code{atmega6490a}, @code{atmega6490p}, @code{ata5790}, @code{ata5790n}, @code{ata5791}, @code{ata6613c}, @code{ata6614q}, @code{ata5782}, @code{ata5831}, @code{ata8210}, @code{ata8510}, @code{ata5787}, @code{ata5835}, @code{ata5700m322}, @code{ata5702m322}, @code{at90pwm161}, @code{at90pwm216}, @code{at90pwm316}, @code{at90can32}, @code{at90can64}, @code{at90scr100}, @code{at90usb646}, @code{at90usb647}, @code{at94k}, @code{m3000}.
  
  @item avr51
  ``Enhanced'' devices with 128@tie{}KiB of program memory.
***************
*** 50,64 ****
  
  @item avrxmega2
  ``XMEGA'' devices with more than 8@tie{}KiB and up to 64@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{atxmega8e5}, @code{atxmega16a4}, @code{atxmega16a4u}, @code{atxmega16c4}, @code{atxmega16d4}, @code{atxmega16e5}, @code{atxmega32a4}, @code{atxmega32a4u}, @code{atxmega32c3}, @code{atxmega32c4}, @code{atxmega32d3}, @code{atxmega32d4}, @code{atxmega32e5}.
  
  @item avrxmega3
  ``XMEGA'' devices with up to 64@tie{}KiB of combined program memory and RAM, and with program memory visible in the RAM address space.
! @*@var{mcu}@tie{}= @code{attiny202}, @code{attiny204}, @code{attiny212}, @code{attiny214}, @code{attiny402}, @code{attiny404}, @code{attiny406}, @code{attiny412}, @code{attiny414}, @code{attiny416}, @code{attiny417}, @code{attiny804}, @code{attiny806}, @code{attiny807}, @code{attiny814}, @code{attiny816}, @code{attiny817}, @code{attiny1604}, @code{attiny1606}, @code{attiny1607}, @code{attiny1614}, @code{attiny1616}, @code{attiny1617}, @code{attiny3214}, @code{attiny3216}, @code{attiny3217}, @code{atmega808}, @code{atmega809}, @code{atmega1608}, @code{atmega1609}, @code{atmega3208}, @code{atmega3209}, @code{atmega4808}, @code{atmega4809}.
  
  @item avrxmega4
  ``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{atxmega64a3}, @code{atxmega64a3u}, @code{atxmega64a4u}, @code{atxmega64b1}, @code{atxmega64b3}, @code{atxmega64c3}, @code{atxmega64d3}, @code{atxmega64d4}.
  
  @item avrxmega5
  ``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB of program memory and more than 64@tie{}KiB of RAM.
--- 50,64 ----
  
  @item avrxmega2
  ``XMEGA'' devices with more than 8@tie{}KiB and up to 64@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{atxmega8e5}, @code{atxmega16a4}, @code{atxmega16a4u}, @code{atxmega16c4}, @code{atxmega16d4}, @code{atxmega16e5}, @code{atxmega32a4}, @code{atxmega32a4u}, @code{atxmega32c3}, @code{atxmega32c4}, @code{atxmega32d3}, @code{atxmega32d4}, @code{atxmega32e5}, @code{avr64da28}, @code{avr64da32}, @code{avr64da48}, @code{avr64da64}, @code{avr64db28}, @code{avr64db32}, @code{avr64db48}, @code{avr64db64}, @code{avr64dd14}, @code{avr64dd20}, @code{avr64dd28}, @code{avr64dd32}, @code{avr64du28}, @code{avr64du32}, @code{avr64ea28}, @code{avr64ea32}, @code{avr64ea48}.
  
  @item avrxmega3
  ``XMEGA'' devices with up to 64@tie{}KiB of combined program memory and RAM, and with program memory visible in the RAM address space.
! @*@var{mcu}@tie{}= @code{attiny202}, @code{attiny204}, @code{attiny212}, @code{attiny214}, @code{attiny402}, @code{attiny404}, @code{attiny406}, @code{attiny412}, @code{attiny414}, @code{attiny416}, @code{attiny416auto}, @code{attiny417}, @code{attiny424}, @code{attiny426}, @code{attiny427}, @code{attiny804}, @code{attiny806}, @code{attiny807}, @code{attiny814}, @code{attiny816}, @code{attiny817}, @code{attiny824}, @code{attiny826}, @code{attiny827}, @code{attiny1604}, @code{attiny1606}, @code{attiny1607}, @code{attiny1614}, @code{attiny1616}, @code{attiny1617}, @code{attiny1624}, @code{attiny1626}, @code{attiny1627}, @code{attiny3214}, @code{attiny3216}, @code{attiny3217}, @code{attiny3224}, @code{attiny3226}, @code{attiny3227}, @code{atmega808}, @code{atmega809}, @code{atmega1608}, @code{atmega1609}, @code{atmega3208}, @code{atmega3209}, @code{atmega4808}, @code{atmega4809}, @code{avr16dd14}, @code{avr16dd20}, @code{avr16dd28}, @code{avr16dd32}, @code{avr16du14}, @code{avr16du20}, @code{avr16du28}, @code{avr16du32}, @code{avr16ea28}, @code{avr16ea32}, @code{avr16ea48}, @code{avr16eb14}, @code{avr16eb20}, @code{avr16eb28}, @code{avr16eb32}, @code{avr32da28}, @code{avr32da32}, @code{avr32da48}, @code{avr32db28}, @code{avr32db32}, @code{avr32db48}, @code{avr32dd14}, @code{avr32dd20}, @code{avr32dd28}, @code{avr32dd32}, @code{avr32du14}, @code{avr32du20}, @code{avr32du28}, @code{avr32du32}, @code{avr32ea28}, @code{avr32ea32}, @code{avr32ea48}.
  
  @item avrxmega4
  ``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{atxmega64a3}, @code{atxmega64a3u}, @code{atxmega64a4u}, @code{atxmega64b1}, @code{atxmega64b3}, @code{atxmega64c3}, @code{atxmega64d3}, @code{atxmega64d4}, @code{avr128da28}, @code{avr128da32}, @code{avr128da48}, @code{avr128da64}, @code{avr128db28}, @code{avr128db32}, @code{avr128db48}, @code{avr128db64}.
  
  @item avrxmega5
  ``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB of program memory and more than 64@tie{}KiB of RAM.
***************
*** 74,80 ****
  
  @item avrtiny
  ``TINY'' Tiny core devices with 512@tie{}B up to 4@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{attiny4}, @code{attiny5}, @code{attiny9}, @code{attiny10}, @code{attiny20}, @code{attiny40}.
  
  @item avr1
  This ISA is implemented by the minimal AVR core and supported for assembler only.
--- 74,80 ----
  
  @item avrtiny
  ``TINY'' Tiny core devices with 512@tie{}B up to 4@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{attiny4}, @code{attiny5}, @code{attiny9}, @code{attiny10}, @code{attiny102}, @code{attiny104}, @code{attiny20}, @code{attiny40}.
  
  @item avr1
  This ISA is implemented by the minimal AVR core and supported for assembler only.
diff -Nrcpad gcc-12.3.0/gcc/doc/cpp.1 gcc-12.4.0/gcc/doc/cpp.1
*** gcc-12.3.0/gcc/doc/cpp.1	Mon May  8 12:16:07 2023
--- gcc-12.4.0/gcc/doc/cpp.1	Thu Jun 20 08:11:52 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "CPP 1"
! .TH CPP 1 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "CPP 1"
! .TH CPP 1 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** time of the source or package and it sho
*** 920,927 ****
  process.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
! \&\fIgcc\fR\|(1), and the Info entries for \fIcpp\fR and \fIgcc\fR.
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 1987\-2022 Free Software Foundation, Inc.
--- 924,931 ----
  process.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fBgpl\fR\|(7), \fBgfdl\fR\|(7), \fBfsf\-funding\fR\|(7),
! \&\fBgcc\fR\|(1), and the Info entries for \fIcpp\fR and \fIgcc\fR.
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 1987\-2022 Free Software Foundation, Inc.
*************** Permission is granted to copy, distribut
*** 930,936 ****
  under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 or
  any later version published by the Free Software Foundation.  A copy of
  the license is included in the
! man page \fIgfdl\fR\|(7).
  This manual contains no Invariant Sections.  The Front-Cover Texts are
  (a) (see below), and the Back-Cover Texts are (b) (see below).
  .PP
--- 934,940 ----
  under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 or
  any later version published by the Free Software Foundation.  A copy of
  the license is included in the
! man page \fBgfdl\fR\|(7).
  This manual contains no Invariant Sections.  The Front-Cover Texts are
  (a) (see below), and the Back-Cover Texts are (b) (see below).
  .PP
diff -Nrcpad gcc-12.3.0/gcc/doc/cpp.info gcc-12.4.0/gcc/doc/cpp.info
*** gcc-12.3.0/gcc/doc/cpp.info	Mon May  8 12:27:46 2023
--- gcc-12.4.0/gcc/doc/cpp.info	Thu Jun 20 08:26:15 2024
***************
*** 1,4 ****
! This is cpp.info, produced by makeinfo version 6.5 from cpp.texi.
  
  Copyright (C) 1987-2022 Free Software Foundation, Inc.
  
--- 1,4 ----
! This is cpp.info, produced by makeinfo version 6.8 from cpp.texi.
  
  Copyright (C) 1987-2022 Free Software Foundation, Inc.
  
*************** without any initial '-' or '--'.
*** 5303,5389 ****
  [index]
  * Menu:
  
! * A:                                     Invocation.          (line 338)
! * C:                                     Invocation.          (line 347)
! * CC:                                    Invocation.          (line 359)
  * CPATH:                                 Environment Variables.
                                                                (line  15)
  * CPLUS_INCLUDE_PATH:                    Environment Variables.
                                                                (line  17)
  * C_INCLUDE_PATH:                        Environment Variables.
                                                                (line  16)
! * D:                                     Invocation.          (line  44)
! * d:                                     Invocation.          (line 408)
! * dD:                                    Invocation.          (line 427)
  * DEPENDENCIES_OUTPUT:                   Environment Variables.
!                                                               (line  45)
! * dI:                                    Invocation.          (line 437)
! * dM:                                    Invocation.          (line 416)
! * dN:                                    Invocation.          (line 433)
! * dU:                                    Invocation.          (line 441)
! * fdebug-cpp:                            Invocation.          (line 448)
! * fdirectives-only:                      Invocation.          (line 231)
! * fdollars-in-identifiers:               Invocation.          (line 252)
! * fexec-charset:                         Invocation.          (line 299)
! * fextended-identifiers:                 Invocation.          (line 255)
! * finput-charset:                        Invocation.          (line 314)
! * fmacro-prefix-map:                     Invocation.          (line 290)
! * fmax-include-depth:                    Invocation.          (line 264)
! * fno-canonical-system-headers:          Invocation.          (line 260)
! * fno-working-directory:                 Invocation.          (line 324)
! * fpreprocessed:                         Invocation.          (line 218)
! * ftabstop:                              Invocation.          (line 267)
! * ftrack-macro-expansion:                Invocation.          (line 273)
! * fwide-exec-charset:                    Invocation.          (line 304)
! * fworking-directory:                    Invocation.          (line 324)
! * H:                                     Invocation.          (line 401)
! * I:                                     Invocation.          (line 459)
! * I-:                                    Invocation.          (line 513)
! * idirafter:                             Invocation.          (line 459)
! * imacros:                               Invocation.          (line  82)
! * imultilib:                             Invocation.          (line 547)
! * include:                               Invocation.          (line  71)
! * iprefix:                               Invocation.          (line 529)
! * iquote:                                Invocation.          (line 459)
! * isysroot:                              Invocation.          (line 541)
! * isystem:                               Invocation.          (line 459)
! * iwithprefix:                           Invocation.          (line 535)
! * iwithprefixbefore:                     Invocation.          (line 535)
! * M:                                     Invocation.          (line 103)
! * MD:                                    Invocation.          (line 198)
! * MF:                                    Invocation.          (line 137)
! * MG:                                    Invocation.          (line 148)
! * MM:                                    Invocation.          (line 128)
! * MMD:                                   Invocation.          (line 214)
! * Mno-modules:                           Invocation.          (line 158)
! * MP:                                    Invocation.          (line 161)
! * MQ:                                    Invocation.          (line 188)
! * MT:                                    Invocation.          (line 173)
! * nostdinc:                              Invocation.          (line 551)
! * nostdinc++:                            Invocation.          (line 557)
  * OBJC_INCLUDE_PATH:                     Environment Variables.
                                                                (line  18)
! * P:                                     Invocation.          (line 371)
! * pthread:                               Invocation.          (line  96)
! * remap:                                 Invocation.          (line 397)
  * SOURCE_DATE_EPOCH:                     Environment Variables.
!                                                               (line  67)
  * SUNPRO_DEPENDENCIES:                   Environment Variables.
!                                                               (line  61)
! * traditional:                           Invocation.          (line 379)
! * traditional-cpp:                       Invocation.          (line 379)
! * trigraphs:                             Invocation.          (line 388)
! * U:                                     Invocation.          (line  67)
! * undef:                                 Invocation.          (line  91)
! * Wcomment:                              Invocation.          (line 563)
! * Wcomments:                             Invocation.          (line 563)
! * Wendif-labels:                         Invocation.          (line 607)
! * Wexpansion-to-defined:                 Invocation.          (line 582)
! * Wno-endif-labels:                      Invocation.          (line 607)
! * Wno-undef:                             Invocation.          (line 578)
! * Wtrigraphs:                            Invocation.          (line 568)
! * Wundef:                                Invocation.          (line 578)
! * Wunused-macros:                        Invocation.          (line 588)
  
  
  File: cpp.info,  Node: Concept Index,  Prev: Option Index,  Up: Top
--- 5303,5389 ----
  [index]
  * Menu:
  
! * A:                                     Invocation.          (line 337)
! * C:                                     Invocation.          (line 346)
! * CC:                                    Invocation.          (line 358)
  * CPATH:                                 Environment Variables.
                                                                (line  15)
  * CPLUS_INCLUDE_PATH:                    Environment Variables.
                                                                (line  17)
  * C_INCLUDE_PATH:                        Environment Variables.
                                                                (line  16)
! * D:                                     Invocation.          (line  43)
! * d:                                     Invocation.          (line 407)
! * dD:                                    Invocation.          (line 426)
  * DEPENDENCIES_OUTPUT:                   Environment Variables.
!                                                               (line  44)
! * dI:                                    Invocation.          (line 436)
! * dM:                                    Invocation.          (line 415)
! * dN:                                    Invocation.          (line 432)
! * dU:                                    Invocation.          (line 440)
! * fdebug-cpp:                            Invocation.          (line 447)
! * fdirectives-only:                      Invocation.          (line 230)
! * fdollars-in-identifiers:               Invocation.          (line 251)
! * fexec-charset:                         Invocation.          (line 298)
! * fextended-identifiers:                 Invocation.          (line 254)
! * finput-charset:                        Invocation.          (line 313)
! * fmacro-prefix-map:                     Invocation.          (line 289)
! * fmax-include-depth:                    Invocation.          (line 263)
! * fno-canonical-system-headers:          Invocation.          (line 259)
! * fno-working-directory:                 Invocation.          (line 323)
! * fpreprocessed:                         Invocation.          (line 217)
! * ftabstop:                              Invocation.          (line 266)
! * ftrack-macro-expansion:                Invocation.          (line 272)
! * fwide-exec-charset:                    Invocation.          (line 303)
! * fworking-directory:                    Invocation.          (line 323)
! * H:                                     Invocation.          (line 400)
! * I:                                     Invocation.          (line 458)
! * I-:                                    Invocation.          (line 512)
! * idirafter:                             Invocation.          (line 458)
! * imacros:                               Invocation.          (line  81)
! * imultilib:                             Invocation.          (line 546)
! * include:                               Invocation.          (line  70)
! * iprefix:                               Invocation.          (line 528)
! * iquote:                                Invocation.          (line 458)
! * isysroot:                              Invocation.          (line 540)
! * isystem:                               Invocation.          (line 458)
! * iwithprefix:                           Invocation.          (line 534)
! * iwithprefixbefore:                     Invocation.          (line 534)
! * M:                                     Invocation.          (line 102)
! * MD:                                    Invocation.          (line 197)
! * MF:                                    Invocation.          (line 136)
! * MG:                                    Invocation.          (line 147)
! * MM:                                    Invocation.          (line 127)
! * MMD:                                   Invocation.          (line 213)
! * Mno-modules:                           Invocation.          (line 157)
! * MP:                                    Invocation.          (line 160)
! * MQ:                                    Invocation.          (line 187)
! * MT:                                    Invocation.          (line 172)
! * nostdinc:                              Invocation.          (line 550)
! * nostdinc++:                            Invocation.          (line 556)
  * OBJC_INCLUDE_PATH:                     Environment Variables.
                                                                (line  18)
! * P:                                     Invocation.          (line 370)
! * pthread:                               Invocation.          (line  95)
! * remap:                                 Invocation.          (line 396)
  * SOURCE_DATE_EPOCH:                     Environment Variables.
!                                                               (line  66)
  * SUNPRO_DEPENDENCIES:                   Environment Variables.
!                                                               (line  60)
! * traditional:                           Invocation.          (line 378)
! * traditional-cpp:                       Invocation.          (line 378)
! * trigraphs:                             Invocation.          (line 387)
! * U:                                     Invocation.          (line  66)
! * undef:                                 Invocation.          (line  90)
! * Wcomment:                              Invocation.          (line 562)
! * Wcomments:                             Invocation.          (line 562)
! * Wendif-labels:                         Invocation.          (line 606)
! * Wexpansion-to-defined:                 Invocation.          (line 581)
! * Wno-endif-labels:                      Invocation.          (line 606)
! * Wno-undef:                             Invocation.          (line 577)
! * Wtrigraphs:                            Invocation.          (line 567)
! * Wundef:                                Invocation.          (line 577)
! * Wunused-macros:                        Invocation.          (line 587)
  
  
  File: cpp.info,  Node: Concept Index,  Prev: Option Index,  Up: Top
*************** Concept Index
*** 5409,5420 ****
  * assertions, canceling:                 Obsolete Features.   (line  59)
  * backslash-newline:                     Initial processing.  (line  61)
  * block comments:                        Initial processing.  (line  77)
! * C language, traditional:               Invocation.          (line 377)
  * C++ named operators:                   C++ Named Operators. (line   6)
  * character constants:                   Tokenization.        (line  81)
! * character set, execution:              Invocation.          (line 299)
! * character set, input:                  Invocation.          (line 314)
! * character set, wide execution:         Invocation.          (line 304)
  * command line:                          Invocation.          (line   6)
  * commenting out code:                   Deleted Code.        (line   6)
  * comments:                              Initial processing.  (line  77)
--- 5409,5420 ----
  * assertions, canceling:                 Obsolete Features.   (line  59)
  * backslash-newline:                     Initial processing.  (line  61)
  * block comments:                        Initial processing.  (line  77)
! * C language, traditional:               Invocation.          (line 376)
  * C++ named operators:                   C++ Named Operators. (line   6)
  * character constants:                   Tokenization.        (line  81)
! * character set, execution:              Invocation.          (line 298)
! * character set, input:                  Invocation.          (line 313)
! * character set, wide execution:         Invocation.          (line 303)
  * command line:                          Invocation.          (line   6)
  * commenting out code:                   Deleted Code.        (line   6)
  * comments:                              Initial processing.  (line  77)
*************** Concept Index
*** 5428,5437 ****
  * controlling macro:                     Once-Only Headers.   (line  35)
  * defined:                               Defined.             (line   6)
  * dependencies for make as output:       Environment Variables.
!                                                               (line  46)
  * dependencies for make as output <1>:   Environment Variables.
!                                                               (line  62)
! * dependencies, make:                    Invocation.          (line 103)
  * diagnostic:                            Diagnostics.         (line   6)
  * digraphs:                              Tokenization.        (line 100)
  * directive line:                        The preprocessing language.
--- 5428,5437 ----
  * controlling macro:                     Once-Only Headers.   (line  35)
  * defined:                               Defined.             (line   6)
  * dependencies for make as output:       Environment Variables.
!                                                               (line  45)
  * dependencies for make as output <1>:   Environment Variables.
!                                                               (line  61)
! * dependencies, make:                    Invocation.          (line 102)
  * diagnostic:                            Diagnostics.         (line   6)
  * digraphs:                              Tokenization.        (line 100)
  * directive line:                        The preprocessing language.
*************** Concept Index
*** 5470,5476 ****
  * macros in include:                     Computed Includes.   (line   6)
  * macros with arguments:                 Macro Arguments.     (line   6)
  * macros with variable arguments:        Variadic Macros.     (line   6)
! * make:                                  Invocation.          (line 103)
  * manifest constants:                    Object-like Macros.  (line   6)
  * named operators:                       C++ Named Operators. (line   6)
  * newlines in macro arguments:           Newlines in Arguments.
--- 5470,5476 ----
  * macros in include:                     Computed Includes.   (line   6)
  * macros with arguments:                 Macro Arguments.     (line   6)
  * macros with variable arguments:        Variadic Macros.     (line   6)
! * make:                                  Invocation.          (line 102)
  * manifest constants:                    Object-like Macros.  (line   6)
  * named operators:                       C++ Named Operators. (line   6)
  * newlines in macro arguments:           Newlines in Arguments.
*************** Concept Index
*** 5478,5484 ****
  * null directive:                        Other Directives.    (line  15)
  * numbers:                               Tokenization.        (line  58)
  * object-like macro:                     Object-like Macros.  (line   6)
! * options:                               Invocation.          (line  43)
  * options, grouping:                     Invocation.          (line  38)
  * other tokens:                          Tokenization.        (line 114)
  * output format:                         Preprocessor Output. (line  12)
--- 5478,5484 ----
  * null directive:                        Other Directives.    (line  15)
  * numbers:                               Tokenization.        (line  58)
  * object-like macro:                     Object-like Macros.  (line   6)
! * options:                               Invocation.          (line  42)
  * options, grouping:                     Invocation.          (line  38)
  * other tokens:                          Tokenization.        (line 114)
  * output format:                         Preprocessor Output. (line  12)
*************** Concept Index
*** 5525,5531 ****
  * token concatenation:                   Concatenation.       (line   6)
  * token pasting:                         Concatenation.       (line   6)
  * tokens:                                Tokenization.        (line   6)
! * traditional C language:                Invocation.          (line 377)
  * trigraphs:                             Initial processing.  (line  32)
  * undefining macros:                     Undefining and Redefining Macros.
                                                                (line   6)
--- 5525,5531 ----
  * token concatenation:                   Concatenation.       (line   6)
  * token pasting:                         Concatenation.       (line   6)
  * tokens:                                Tokenization.        (line   6)
! * traditional C language:                Invocation.          (line 376)
  * trigraphs:                             Initial processing.  (line  32)
  * undefining macros:                     Undefining and Redefining Macros.
                                                                (line   6)
*************** Node: Option Index224896
*** 5619,5621 ****
--- 5619,5626 ----
  Node: Concept Index230998
  
  End Tag Table
+ 
+ 
+ Local Variables:
+ coding: utf-8
+ End:
diff -Nrcpad gcc-12.3.0/gcc/doc/cppinternals.info gcc-12.4.0/gcc/doc/cppinternals.info
*** gcc-12.3.0/gcc/doc/cppinternals.info	Mon May  8 12:27:46 2023
--- gcc-12.4.0/gcc/doc/cppinternals.info	Thu Jun 20 08:26:15 2024
***************
*** 1,4 ****
! This is cppinternals.info, produced by makeinfo version 6.5 from
  cppinternals.texi.
  
  INFO-DIR-SECTION Software development
--- 1,4 ----
! This is cppinternals.info, produced by makeinfo version 6.8 from
  cppinternals.texi.
  
  INFO-DIR-SECTION Software development
*************** will be removed, so I'll not discuss it
*** 137,143 ****
     The job of '_cpp_lex_direct' is simply to lex a token.  It is not
  responsible for issues like directive handling, returning lookahead
  tokens directly, multiple-include optimization, or conditional block
! skipping.  It necessarily has a minor ro^le to play in memory management
  of lexed lines.  I discuss these issues in a separate section (*note
  Lexing a line::).
  
--- 137,143 ----
     The job of '_cpp_lex_direct' is simply to lex a token.  It is not
  responsible for issues like directive handling, returning lookahead
  tokens directly, multiple-include optimization, or conditional block
! skipping.  It necessarily has a minor rôle to play in memory management
  of lexed lines.  I discuss these issues in a separate section (*note
  Lexing a line::).
  
*************** Node: Files44875
*** 1039,1041 ****
--- 1039,1046 ----
  Node: Concept Index48342
  
  End Tag Table
+ 
+ 
+ Local Variables:
+ coding: utf-8
+ End:
diff -Nrcpad gcc-12.3.0/gcc/doc/extend.texi gcc-12.4.0/gcc/doc/extend.texi
*** gcc-12.3.0/gcc/doc/extend.texi	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/doc/extend.texi	Thu Jun 20 08:08:06 2024
*************** instructions, but allow the compiler to
*** 14618,14623 ****
--- 14618,14624 ----
  * Blackfin Built-in Functions::
  * BPF Built-in Functions::
  * FR-V Built-in Functions::
+ * LoongArch Base Built-in Functions::
  * MIPS DSP Built-in Functions::
  * MIPS Paired-Single Support::
  * MIPS Loongson Built-in Functions::
*************** Use the @code{nldub} instruction to load
*** 16068,16073 ****
--- 16069,16207 ----
  into the data cache.  The instruction is issued in slot I1@.
  @end table
  
+ @node LoongArch Base Built-in Functions
+ @subsection LoongArch Base Built-in Functions
+ 
+ These built-in functions are available for LoongArch.
+ 
+ Data Type Description:
+ @itemize
+ @item @code{imm0_31}, a compile-time constant in range 0 to 31;
+ @item @code{imm0_16383}, a compile-time constant in range 0 to 16383;
+ @item @code{imm0_32767}, a compile-time constant in range 0 to 32767;
+ @item @code{imm_n2048_2047}, a compile-time constant in range -2048 to 2047;
+ @end itemize
+ 
+ The intrinsics provided are listed below:
+ @smallexample
+     unsigned int __builtin_loongarch_movfcsr2gr (imm0_31)
+     void __builtin_loongarch_movgr2fcsr (imm0_31, unsigned int)
+     void __builtin_loongarch_cacop_d (imm0_31, unsigned long int, imm_n2048_2047)
+     unsigned int __builtin_loongarch_cpucfg (unsigned int)
+     void __builtin_loongarch_asrtle_d (long int, long int)
+     void __builtin_loongarch_asrtgt_d (long int, long int)
+     long int __builtin_loongarch_lddir_d (long int, imm0_31)
+     void __builtin_loongarch_ldpte_d (long int, imm0_31)
+ 
+     int __builtin_loongarch_crc_w_b_w (char, int)
+     int __builtin_loongarch_crc_w_h_w (short, int)
+     int __builtin_loongarch_crc_w_w_w (int, int)
+     int __builtin_loongarch_crc_w_d_w (long int, int)
+     int __builtin_loongarch_crcc_w_b_w (char, int)
+     int __builtin_loongarch_crcc_w_h_w (short, int)
+     int __builtin_loongarch_crcc_w_w_w (int, int)
+     int __builtin_loongarch_crcc_w_d_w (long int, int)
+ 
+     unsigned int __builtin_loongarch_csrrd_w (imm0_16383)
+     unsigned int __builtin_loongarch_csrwr_w (unsigned int, imm0_16383)
+     unsigned int __builtin_loongarch_csrxchg_w (unsigned int, unsigned int, imm0_16383)
+     unsigned long int __builtin_loongarch_csrrd_d (imm0_16383)
+     unsigned long int __builtin_loongarch_csrwr_d (unsigned long int, imm0_16383)
+     unsigned long int __builtin_loongarch_csrxchg_d (unsigned long int, unsigned long int, imm0_16383)
+ 
+     unsigned char __builtin_loongarch_iocsrrd_b (unsigned int)
+     unsigned short __builtin_loongarch_iocsrrd_h (unsigned int)
+     unsigned int __builtin_loongarch_iocsrrd_w (unsigned int)
+     unsigned long int __builtin_loongarch_iocsrrd_d (unsigned int)
+     void __builtin_loongarch_iocsrwr_b (unsigned char, unsigned int)
+     void __builtin_loongarch_iocsrwr_h (unsigned short, unsigned int)
+     void __builtin_loongarch_iocsrwr_w (unsigned int, unsigned int)
+     void __builtin_loongarch_iocsrwr_d (unsigned long int, unsigned int)
+ 
+     void __builtin_loongarch_dbar (imm0_32767)
+     void __builtin_loongarch_ibar (imm0_32767)
+ 
+     void __builtin_loongarch_syscall (imm0_32767)
+     void __builtin_loongarch_break (imm0_32767)
+ @end smallexample
+ 
+ @emph{Note:}Since the control register is divided into 32-bit and 64-bit,
+ but the access instruction is not distinguished. So GCC renames the control
+ instructions when implementing intrinsics.
+ 
+ Take the csrrd instruction as an example, built-in functions are implemented as follows:
+ @smallexample
+   __builtin_loongarch_csrrd_w  // When reading the 32-bit control register use.
+   __builtin_loongarch_csrrd_d  // When reading the 64-bit control register use.
+ @end smallexample
+ 
+ For the convenience of use, the built-in functions are encapsulated,
+ the encapsulated functions and @code{__drdtime_t, __rdtime_t} are
+ defined in the @code{larchintrin.h}. So if you call the following
+ function you need to include @code{larchintrin.h}.
+ 
+ @smallexample
+      typedef struct drdtime@{
+             unsigned long dvalue;
+             unsigned long dtimeid;
+      @} __drdtime_t;
+ 
+      typedef struct rdtime@{
+             unsigned int value;
+             unsigned int timeid;
+      @} __rdtime_t;
+ @end smallexample
+ 
+ @smallexample
+     __drdtime_t __rdtime_d (void)
+     __rdtime_t  __rdtimel_w (void)
+     __rdtime_t  __rdtimeh_w (void)
+     unsigned int  __movfcsr2gr (imm0_31)
+     void __movgr2fcsr (imm0_31, unsigned int)
+     void __cacop_d (imm0_31, unsigned long, imm_n2048_2047)
+     unsigned int  __cpucfg (unsigned int)
+     void __asrtle_d (long int, long int)
+     void __asrtgt_d (long int, long int)
+     long int  __lddir_d (long int, imm0_31)
+     void __ldpte_d (long int, imm0_31)
+ 
+     int  __crc_w_b_w (char, int)
+     int  __crc_w_h_w (short, int)
+     int  __crc_w_w_w (int, int)
+     int  __crc_w_d_w (long int, int)
+     int  __crcc_w_b_w (char, int)
+     int  __crcc_w_h_w (short, int)
+     int  __crcc_w_w_w (int, int)
+     int  __crcc_w_d_w (long int, int)
+ 
+     unsigned int  __csrrd_w (imm0_16383)
+     unsigned int  __csrwr_w (unsigned int, imm0_16383)
+     unsigned int  __csrxchg_w (unsigned int, unsigned int, imm0_16383)
+     unsigned long  __csrrd_d (imm0_16383)
+     unsigned long  __csrwr_d (unsigned long, imm0_16383)
+     unsigned long  __csrxchg_d (unsigned long, unsigned long, imm0_16383)
+ 
+     unsigned char   __iocsrrd_b (unsigned int)
+     unsigned short  __iocsrrd_h (unsigned int)
+     unsigned int  __iocsrrd_w (unsigned int)
+     unsigned long  __iocsrrd_d (unsigned int)
+     void __iocsrwr_b (unsigned char, unsigned int)
+     void __iocsrwr_h (unsigned short, unsigned int)
+     void __iocsrwr_w (unsigned int, unsigned int)
+     void __iocsrwr_d (unsigned long, unsigned int)
+ 
+     void __dbar (imm0_32767)
+     void __ibar (imm0_32767)
+ 
+     void __syscall (imm0_32767)
+     void __break (imm0_32767)
+ @end smallexample
+ 
+ Returns the value that is currently set in the @samp{tp} register.
+ @smallexample
+     void * __builtin_thread_pointer (void)
+ @end smallexample
+ 
  @node MIPS DSP Built-in Functions
  @subsection MIPS DSP Built-in Functions
  
diff -Nrcpad gcc-12.3.0/gcc/doc/fsf-funding.7 gcc-12.4.0/gcc/doc/fsf-funding.7
*** gcc-12.3.0/gcc/doc/fsf-funding.7	Mon May  8 12:16:07 2023
--- gcc-12.4.0/gcc/doc/fsf-funding.7	Thu Jun 20 08:11:52 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "FSF-FUNDING 7"
! .TH FSF-FUNDING 7 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "FSF-FUNDING 7"
! .TH FSF-FUNDING 7 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** proper thing to do\*(R" when distributin
*** 181,187 ****
  assure a steady flow of resources into making more free software.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fIgpl\fR\|(7), \fIgfdl\fR\|(7).
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 1994 Free Software Foundation, Inc.
--- 185,191 ----
  assure a steady flow of resources into making more free software.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fBgpl\fR\|(7), \fBgfdl\fR\|(7).
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 1994 Free Software Foundation, Inc.
diff -Nrcpad gcc-12.3.0/gcc/doc/g++.1 gcc-12.4.0/gcc/doc/g++.1
*** gcc-12.3.0/gcc/doc/g++.1	Mon May  8 12:27:47 2023
--- gcc-12.4.0/gcc/doc/g++.1	Thu Jun 20 08:26:16 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "GCC 1"
! .TH GCC 1 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "GCC 1"
! .TH GCC 1 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** in the following sections.
*** 1008,1014 ****
  \&\-mcond\-move\-float  \-mno\-cond\-move\-float 
  \&\-memcpy  \-mno\-memcpy \-mstrict\-align \-mno\-strict\-align 
  \&\-mmax\-inline\-memcpy\-size=\fR\fIn\fR 
! \&\fB\-mcmodel=\fR\fIcode-model\fR
  .Sp
  \&\fIM32R/D Options\fR
  \&\fB\-m32r2  \-m32rx  \-m32r 
--- 1012,1018 ----
  \&\-mcond\-move\-float  \-mno\-cond\-move\-float 
  \&\-memcpy  \-mno\-memcpy \-mstrict\-align \-mno\-strict\-align 
  \&\-mmax\-inline\-memcpy\-size=\fR\fIn\fR 
! \&\fB\-mcmodel=\fR\fIcode-model\fR \fB\-mrelax \-mpass\-mrelax\-to\-as\fR
  .Sp
  \&\fIM32R/D Options\fR
  \&\fB\-m32r2  \-m32rx  \-m32r 
*************** See \s-1RS/6000\s0 and PowerPC Options.
*** 1438,1444 ****
  \&\-m96bit\-long\-double  \-mlong\-double\-64  \-mlong\-double\-80  \-mlong\-double\-128 
  \&\-mregparm=\fR\fInum\fR  \fB\-msseregparm 
  \&\-mveclibabi=\fR\fItype\fR  \fB\-mvect8\-ret\-in\-mem 
! \&\-mpc32  \-mpc64  \-mpc80  \-mstackrealign 
  \&\-momit\-leaf\-frame\-pointer  \-mno\-red\-zone  \-mno\-tls\-direct\-seg\-refs 
  \&\-mcmodel=\fR\fIcode-model\fR  \fB\-mabi=\fR\fIname\fR  \fB\-maddress\-mode=\fR\fImode\fR 
  \&\fB\-m32  \-m64  \-mx32  \-m16  \-miamcu  \-mlarge\-data\-threshold=\fR\fInum\fR 
--- 1442,1448 ----
  \&\-m96bit\-long\-double  \-mlong\-double\-64  \-mlong\-double\-80  \-mlong\-double\-128 
  \&\-mregparm=\fR\fInum\fR  \fB\-msseregparm 
  \&\-mveclibabi=\fR\fItype\fR  \fB\-mvect8\-ret\-in\-mem 
! \&\-mpc32  \-mpc64  \-mpc80 \-mdaz\-ftz \-mstackrealign 
  \&\-momit\-leaf\-frame\-pointer  \-mno\-red\-zone  \-mno\-tls\-direct\-seg\-refs 
  \&\-mcmodel=\fR\fIcode-model\fR  \fB\-mabi=\fR\fIname\fR  \fB\-maddress\-mode=\fR\fImode\fR 
  \&\fB\-m32  \-m64  \-mx32  \-m16  \-miamcu  \-mlarge\-data\-threshold=\fR\fInum\fR 
*************** and Objective\-\*(C+ programs:
*** 4361,4370 ****
  Use \fIclass-name\fR as the name of the class to instantiate for each
  literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR.  The default
  class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and
! \&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below).  The
! \&\fB\-fconstant\-cfstrings\fR option, if also present, overrides the
! \&\fB\-fconstant\-string\-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR literals
! to be laid out as constant CoreFoundation strings.
  .IP "\fB\-fgnu\-runtime\fR" 4
  .IX Item "-fgnu-runtime"
  Generate object code compatible with the standard \s-1GNU\s0 Objective-C
--- 4365,4376 ----
  Use \fIclass-name\fR as the name of the class to instantiate for each
  literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR.  The default
  class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and
! \&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below).  On
! Darwin (macOS, MacOS X) platforms, the \fB\-fconstant\-cfstrings\fR option, if
! also present, overrides the \fB\-fconstant\-string\-class\fR setting and cause
! \&\f(CW\*(C`@"..."\*(C'\fR literals to be laid out as constant CoreFoundation strings.
! Note that \fB\-fconstant\-cfstrings\fR is an alias for the target-specific
! \&\fB\-mconstant\-cfstrings\fR equivalent.
  .IP "\fB\-fgnu\-runtime\fR" 4
  .IX Item "-fgnu-runtime"
  Generate object code compatible with the standard \s-1GNU\s0 Objective-C
*************** This is useful if you need to make sure
*** 4456,4463 ****
  be compiled with older versions of \s-1GCC.\s0
  .IP "\fB\-freplace\-objc\-classes\fR" 4
  .IX Item "-freplace-objc-classes"
! Emit a special marker instructing \fB\f(BIld\fB\|(1)\fR not to statically link in
! the resulting object file, and allow \fB\f(BIdyld\fB\|(1)\fR to load it in at
  run time instead.  This is used in conjunction with the Fix-and-Continue
  debugging mode, where the object file in question may be recompiled and
  dynamically reloaded in the course of program execution, without the need
--- 4462,4469 ----
  be compiled with older versions of \s-1GCC.\s0
  .IP "\fB\-freplace\-objc\-classes\fR" 4
  .IX Item "-freplace-objc-classes"
! Emit a special marker instructing \fB\fBld\fB\|(1)\fR not to statically link in
! the resulting object file, and allow \fB\fBdyld\fB\|(1)\fR to load it in at
  run time instead.  This is used in conjunction with the Fix-and-Continue
  debugging mode, where the object file in question may be recompiled and
  dynamically reloaded in the course of program execution, without the need
*************** bracketed, but that for \f(CW\*(C`b\*(C'
*** 6314,6320 ****
  This warning is enabled by \fB\-Wall\fR.
  .IP "\fB\-Wmissing\-include\-dirs\fR (C, \*(C+, Objective-C, Objective\-\*(C+ and Fortran only)" 4
  .IX Item "-Wmissing-include-dirs (C, , Objective-C, Objective- and Fortran only)"
! Warn if a user-supplied include directory does not exist. This opions is disabled
  by default for C, \*(C+, Objective-C and Objective\-\*(C+. For Fortran, it is partially
  enabled by default by warning for \-I and \-J, only.
  .IP "\fB\-Wno\-missing\-profile\fR" 4
--- 6320,6326 ----
  This warning is enabled by \fB\-Wall\fR.
  .IP "\fB\-Wmissing\-include\-dirs\fR (C, \*(C+, Objective-C, Objective\-\*(C+ and Fortran only)" 4
  .IX Item "-Wmissing-include-dirs (C, , Objective-C, Objective- and Fortran only)"
! Warn if a user-supplied include directory does not exist. This option is disabled
  by default for C, \*(C+, Objective-C and Objective\-\*(C+. For Fortran, it is partially
  enabled by default by warning for \-I and \-J, only.
  .IP "\fB\-Wno\-missing\-profile\fR" 4
*************** example of how this can happen:
*** 6810,6816 ****
  .Sp
  If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is
  always initialized, but \s-1GCC\s0 doesn't know this. To suppress the
! warning, you need to provide a default case with \fIassert\fR\|(0) or
  similar code.
  .Sp
  This option also warns when a non-volatile automatic variable might be
--- 6816,6822 ----
  .Sp
  If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is
  always initialized, but \s-1GCC\s0 doesn't know this. To suppress the
! warning, you need to provide a default case with \fBassert\fR\|(0) or
  similar code.
  .Sp
  This option also warns when a non-volatile automatic variable might be
*************** run-time callbacks.
*** 13943,13949 ****
  Emit special instrumentation for accesses to volatiles.
  .IP "\fBtsan-instrument-func-entry-exit\fR" 4
  .IX Item "tsan-instrument-func-entry-exit"
! Emit instrumentation calls to _\|\fI_tsan_func_entry()\fR and _\|\fI_tsan_func_exit()\fR.
  .IP "\fBmax-fsm-thread-path-insns\fR" 4
  .IX Item "max-fsm-thread-path-insns"
  Maximum number of instructions to copy when duplicating blocks on a
--- 13949,13955 ----
  Emit special instrumentation for accesses to volatiles.
  .IP "\fBtsan-instrument-func-entry-exit\fR" 4
  .IX Item "tsan-instrument-func-entry-exit"
! Emit instrumentation calls to _\|\fB_tsan_func_entry()\fR and _\|\fB_tsan_func_exit()\fR.
  .IP "\fBmax-fsm-thread-path-insns\fR" 4
  .IX Item "max-fsm-thread-path-insns"
  Maximum number of instructions to copy when duplicating blocks on a
*************** performance of the code.  Permissible va
*** 18462,18468 ****
  \&\fBcortex\-a75.cortex\-a55\fR, \fBcortex\-a76.cortex\-a55\fR,
  \&\fBcortex\-r82\fR, \fBcortex\-x1\fR, \fBcortex\-x2\fR,
  \&\fBcortex\-a510\fR, \fBcortex\-a710\fR, \fBampere1\fR,
! \&\fBampere1a\fR, \fBnative\fR.
  .Sp
  The values \fBcortex\-a57.cortex\-a53\fR, \fBcortex\-a72.cortex\-a53\fR,
  \&\fBcortex\-a73.cortex\-a35\fR, \fBcortex\-a73.cortex\-a53\fR,
--- 18468,18474 ----
  \&\fBcortex\-a75.cortex\-a55\fR, \fBcortex\-a76.cortex\-a55\fR,
  \&\fBcortex\-r82\fR, \fBcortex\-x1\fR, \fBcortex\-x2\fR,
  \&\fBcortex\-a510\fR, \fBcortex\-a710\fR, \fBampere1\fR,
! \&\fBampere1a\fR, \fBcobalt\-100\fR and \fBnative\fR.
  .Sp
  The values \fBcortex\-a57.cortex\-a53\fR, \fBcortex\-a72.cortex\-a53\fR,
  \&\fBcortex\-a73.cortex\-a35\fR, \fBcortex\-a73.cortex\-a53\fR,
*************** The default for this option is \fBavr2\f
*** 20783,20794 ****
  .el .IP "\f(CWavr4\fR" 4
  .IX Item "avr4"
  \&\*(L"Enhanced\*(R" devices with up to 8 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atmega48\*(C'\fR, \f(CW\*(C`atmega48a\*(C'\fR, \f(CW\*(C`atmega48p\*(C'\fR, \f(CW\*(C`atmega48pa\*(C'\fR, \f(CW\*(C`atmega48pb\*(C'\fR, \f(CW\*(C`atmega8\*(C'\fR, \f(CW\*(C`atmega8a\*(C'\fR, \f(CW\*(C`atmega8hva\*(C'\fR, \f(CW\*(C`atmega88\*(C'\fR, \f(CW\*(C`atmega88a\*(C'\fR, \f(CW\*(C`atmega88p\*(C'\fR, \f(CW\*(C`atmega88pa\*(C'\fR, \f(CW\*(C`atmega88pb\*(C'\fR, \f(CW\*(C`atmega8515\*(C'\fR, \f(CW\*(C`atmega8535\*(C'\fR, \f(CW\*(C`ata6285\*(C'\fR, \f(CW\*(C`ata6286\*(C'\fR, \f(CW\*(C`ata6289\*(C'\fR, \f(CW\*(C`ata6612c\*(C'\fR, \f(CW\*(C`at90pwm1\*(C'\fR, \f(CW\*(C`at90pwm2\*(C'\fR, \f(CW\*(C`at90pwm2b\*(C'\fR, \f(CW\*(C`at90pwm3\*(C'\fR, \f(CW\*(C`at90pwm3b\*(C'\fR, \f(CW\*(C`at90pwm81\*(C'\fR.
  .ie n .IP """avr5""" 4
  .el .IP "\f(CWavr5\fR" 4
  .IX Item "avr5"
  \&\*(L"Enhanced\*(R" devices with 16 KiB up to 64 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atmega16\*(C'\fR, \f(CW\*(C`atmega16a\*(C'\fR, \f(CW\*(C`atmega16hva\*(C'\fR, \f(CW\*(C`atmega16hva2\*(C'\fR, \f(CW\*(C`atmega16hvb\*(C'\fR, \f(CW\*(C`atmega16hvbrevb\*(C'\fR, \f(CW\*(C`atmega16m1\*(C'\fR, \f(CW\*(C`atmega16u4\*(C'\fR, \f(CW\*(C`atmega161\*(C'\fR, \f(CW\*(C`atmega162\*(C'\fR, \f(CW\*(C`atmega163\*(C'\fR, \f(CW\*(C`atmega164a\*(C'\fR, \f(CW\*(C`atmega164p\*(C'\fR, \f(CW\*(C`atmega164pa\*(C'\fR, \f(CW\*(C`atmega165\*(C'\fR, \f(CW\*(C`atmega165a\*(C'\fR, \f(CW\*(C`atmega165p\*(C'\fR, \f(CW\*(C`atmega165pa\*(C'\fR, \f(CW\*(C`atmega168\*(C'\fR, \f(CW\*(C`atmega168a\*(C'\fR, \f(CW\*(C`atmega168p\*(C'\fR, \f(CW\*(C`atmega168pa\*(C'\fR, \f(CW\*(C`atmega168pb\*(C'\fR, \f(CW\*(C`atmega169\*(C'\fR, \f(CW\*(C`atmega169a\*(C'\fR, \f(CW\*(C`atmega169p\*(C'\fR, \f(CW\*(C`atmega169pa\*(C'\fR, \f(CW\*(C`atmega32\*(C'\fR, \f(CW\*(C`atmega32a\*(C'\fR, \f(CW\*(C`atmega32c1\*(C'\fR, \f(CW\*(C`atmega32hvb\*(C'\fR, \f(CW\*(C`atmega32hvbrevb\*(C'\fR, \f(CW\*(C`atmega32m1\*(C'\fR, \f(CW\*(C`atmega32u4\*(C'\fR, \f(CW\*(C`atmega32u6\*(C'\fR, \f(CW\*(C`atmega323\*(C'\fR, \f(CW\*(C`atmega324a\*(C'\fR, \f(CW\*(C`atmega324p\*(C'\fR, \f(CW\*(C`atmega324pa\*(C'\fR, \f(CW\*(C`atmega324pb\*(C'\fR, \f(CW\*(C`atmega325\*(C'\fR, \f(CW\*(C`atmega325a\*(C'\fR, \f(CW\*(C`atmega325p\*(C'\fR, \f(CW\*(C`atmega325pa\*(C'\fR, \f(CW\*(C`atmega328\*(C'\fR, \f(CW\*(C`atmega328p\*(C'\fR, \f(CW\*(C`atmega328pb\*(C'\fR, \f(CW\*(C`atmega329\*(C'\fR, \f(CW\*(C`atmega329a\*(C'\fR, \f(CW\*(C`atmega329p\*(C'\fR, \f(CW\*(C`atmega329pa\*(C'\fR, \f(CW\*(C`atmega3250\*(C'\fR, \f(CW\*(C`atmega3250a\*(C'\fR, \f(CW\*(C`atmega3250p\*(C'\fR, \f(CW\*(C`atmega3250pa\*(C'\fR, \f(CW\*(C`atmega3290\*(C'\fR, \f(CW\*(C`atmega3290a\*(C'\fR, \f(CW\*(C`atmega3290p\*(C'\fR, \f(CW\*(C`atmega3290pa\*(C'\fR, \f(CW\*(C`atmega406\*(C'\fR, \f(CW\*(C`atmega64\*(C'\fR, \f(CW\*(C`atmega64a\*(C'\fR, \f(CW\*(C`atmega64c1\*(C'\fR, \f(CW\*(C`atmega64hve\*(C'\fR, \f(CW\*(C`atmega64hve2\*(C'\fR, \f(CW\*(C`atmega64m1\*(C'\fR, \f(CW\*(C`atmega64rfr2\*(C'\fR, \f(CW\*(C`atmega640\*(C'\fR, \f(CW\*(C`atmega644\*(C'\fR, \f(CW\*(C`atmega644a\*(C'\fR, \f(CW\*(C`atmega644p\*(C'\fR, \f(CW\*(C`atmega644pa\*(C'\fR, \f(CW\*(C`atmega644rfr2\*(C'\fR, \f(CW\*(C`atmega645\*(C'\fR, \f(CW\*(C`atmega645a\*(C'\fR, \f(CW\*(C`atmega645p\*(C'\fR, \f(CW\*(C`atmega649\*(C'\fR, \f(CW\*(C`atmega649a\*(C'\fR, \f(CW\*(C`atmega649p\*(C'\fR, \f(CW\*(C`atmega6450\*(C'\fR, \f(CW\*(C`atmega6450a\*(C'\fR, \f(CW\*(C`atmega6450p\*(C'\fR, \f(CW\*(C`atmega6490\*(C'\fR, \f(CW\*(C`atmega6490a\*(C'\fR, \f(CW\*(C`atmega6490p\*(C'\fR, \f(CW\*(C`ata5795\*(C'\fR, \f(CW\*(C`ata5790\*(C'\fR, \f(CW\*(C`ata5790n\*(C'\fR, \f(CW\*(C`ata5791\*(C'\fR, \f(CW\*(C`ata6613c\*(C'\fR, \f(CW\*(C`ata6614q\*(C'\fR, \f(CW\*(C`ata5782\*(C'\fR, \f(CW\*(C`ata5831\*(C'\fR, \f(CW\*(C`ata8210\*(C'\fR, \f(CW\*(C`ata8510\*(C'\fR, \f(CW\*(C`ata5702m322\*(C'\fR, \f(CW\*(C`at90pwm161\*(C'\fR, \f(CW\*(C`at90pwm216\*(C'\fR, \f(CW\*(C`at90pwm316\*(C'\fR, \f(CW\*(C`at90can32\*(C'\fR, \f(CW\*(C`at90can64\*(C'\fR, \f(CW\*(C`at90scr100\*(C'\fR, \f(CW\*(C`at90usb646\*(C'\fR, \f(CW\*(C`at90usb647\*(C'\fR, \f(CW\*(C`at94k\*(C'\fR, \f(CW\*(C`m3000\*(C'\fR.
  .ie n .IP """avr51""" 4
  .el .IP "\f(CWavr51\fR" 4
  .IX Item "avr51"
--- 20789,20800 ----
  .el .IP "\f(CWavr4\fR" 4
  .IX Item "avr4"
  \&\*(L"Enhanced\*(R" devices with up to 8 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atmega48\*(C'\fR, \f(CW\*(C`atmega48a\*(C'\fR, \f(CW\*(C`atmega48p\*(C'\fR, \f(CW\*(C`atmega48pa\*(C'\fR, \f(CW\*(C`atmega48pb\*(C'\fR, \f(CW\*(C`atmega8\*(C'\fR, \f(CW\*(C`atmega8a\*(C'\fR, \f(CW\*(C`atmega8hva\*(C'\fR, \f(CW\*(C`atmega88\*(C'\fR, \f(CW\*(C`atmega88a\*(C'\fR, \f(CW\*(C`atmega88p\*(C'\fR, \f(CW\*(C`atmega88pa\*(C'\fR, \f(CW\*(C`atmega88pb\*(C'\fR, \f(CW\*(C`atmega8515\*(C'\fR, \f(CW\*(C`atmega8535\*(C'\fR, \f(CW\*(C`ata5795\*(C'\fR, \f(CW\*(C`ata6285\*(C'\fR, \f(CW\*(C`ata6286\*(C'\fR, \f(CW\*(C`ata6289\*(C'\fR, \f(CW\*(C`ata6612c\*(C'\fR, \f(CW\*(C`at90pwm1\*(C'\fR, \f(CW\*(C`at90pwm2\*(C'\fR, \f(CW\*(C`at90pwm2b\*(C'\fR, \f(CW\*(C`at90pwm3\*(C'\fR, \f(CW\*(C`at90pwm3b\*(C'\fR, \f(CW\*(C`at90pwm81\*(C'\fR.
  .ie n .IP """avr5""" 4
  .el .IP "\f(CWavr5\fR" 4
  .IX Item "avr5"
  \&\*(L"Enhanced\*(R" devices with 16 KiB up to 64 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atmega16\*(C'\fR, \f(CW\*(C`atmega16a\*(C'\fR, \f(CW\*(C`atmega16hva\*(C'\fR, \f(CW\*(C`atmega16hva2\*(C'\fR, \f(CW\*(C`atmega16hvb\*(C'\fR, \f(CW\*(C`atmega16hvbrevb\*(C'\fR, \f(CW\*(C`atmega16m1\*(C'\fR, \f(CW\*(C`atmega16u4\*(C'\fR, \f(CW\*(C`atmega161\*(C'\fR, \f(CW\*(C`atmega162\*(C'\fR, \f(CW\*(C`atmega163\*(C'\fR, \f(CW\*(C`atmega164a\*(C'\fR, \f(CW\*(C`atmega164p\*(C'\fR, \f(CW\*(C`atmega164pa\*(C'\fR, \f(CW\*(C`atmega165\*(C'\fR, \f(CW\*(C`atmega165a\*(C'\fR, \f(CW\*(C`atmega165p\*(C'\fR, \f(CW\*(C`atmega165pa\*(C'\fR, \f(CW\*(C`atmega168\*(C'\fR, \f(CW\*(C`atmega168a\*(C'\fR, \f(CW\*(C`atmega168p\*(C'\fR, \f(CW\*(C`atmega168pa\*(C'\fR, \f(CW\*(C`atmega168pb\*(C'\fR, \f(CW\*(C`atmega169\*(C'\fR, \f(CW\*(C`atmega169a\*(C'\fR, \f(CW\*(C`atmega169p\*(C'\fR, \f(CW\*(C`atmega169pa\*(C'\fR, \f(CW\*(C`atmega32\*(C'\fR, \f(CW\*(C`atmega32a\*(C'\fR, \f(CW\*(C`atmega32c1\*(C'\fR, \f(CW\*(C`atmega32hvb\*(C'\fR, \f(CW\*(C`atmega32hvbrevb\*(C'\fR, \f(CW\*(C`atmega32m1\*(C'\fR, \f(CW\*(C`atmega32u4\*(C'\fR, \f(CW\*(C`atmega32u6\*(C'\fR, \f(CW\*(C`atmega323\*(C'\fR, \f(CW\*(C`atmega324a\*(C'\fR, \f(CW\*(C`atmega324p\*(C'\fR, \f(CW\*(C`atmega324pa\*(C'\fR, \f(CW\*(C`atmega324pb\*(C'\fR, \f(CW\*(C`atmega325\*(C'\fR, \f(CW\*(C`atmega325a\*(C'\fR, \f(CW\*(C`atmega325p\*(C'\fR, \f(CW\*(C`atmega325pa\*(C'\fR, \f(CW\*(C`atmega328\*(C'\fR, \f(CW\*(C`atmega328p\*(C'\fR, \f(CW\*(C`atmega328pb\*(C'\fR, \f(CW\*(C`atmega329\*(C'\fR, \f(CW\*(C`atmega329a\*(C'\fR, \f(CW\*(C`atmega329p\*(C'\fR, \f(CW\*(C`atmega329pa\*(C'\fR, \f(CW\*(C`atmega3250\*(C'\fR, \f(CW\*(C`atmega3250a\*(C'\fR, \f(CW\*(C`atmega3250p\*(C'\fR, \f(CW\*(C`atmega3250pa\*(C'\fR, \f(CW\*(C`atmega3290\*(C'\fR, \f(CW\*(C`atmega3290a\*(C'\fR, \f(CW\*(C`atmega3290p\*(C'\fR, \f(CW\*(C`atmega3290pa\*(C'\fR, \f(CW\*(C`atmega406\*(C'\fR, \f(CW\*(C`atmega64\*(C'\fR, \f(CW\*(C`atmega64a\*(C'\fR, \f(CW\*(C`atmega64c1\*(C'\fR, \f(CW\*(C`atmega64hve\*(C'\fR, \f(CW\*(C`atmega64hve2\*(C'\fR, \f(CW\*(C`atmega64m1\*(C'\fR, \f(CW\*(C`atmega64rfr2\*(C'\fR, \f(CW\*(C`atmega640\*(C'\fR, \f(CW\*(C`atmega644\*(C'\fR, \f(CW\*(C`atmega644a\*(C'\fR, \f(CW\*(C`atmega644p\*(C'\fR, \f(CW\*(C`atmega644pa\*(C'\fR, \f(CW\*(C`atmega644rfr2\*(C'\fR, \f(CW\*(C`atmega645\*(C'\fR, \f(CW\*(C`atmega645a\*(C'\fR, \f(CW\*(C`atmega645p\*(C'\fR, \f(CW\*(C`atmega649\*(C'\fR, \f(CW\*(C`atmega649a\*(C'\fR, \f(CW\*(C`atmega649p\*(C'\fR, \f(CW\*(C`atmega6450\*(C'\fR, \f(CW\*(C`atmega6450a\*(C'\fR, \f(CW\*(C`atmega6450p\*(C'\fR, \f(CW\*(C`atmega6490\*(C'\fR, \f(CW\*(C`atmega6490a\*(C'\fR, \f(CW\*(C`atmega6490p\*(C'\fR, \f(CW\*(C`ata5790\*(C'\fR, \f(CW\*(C`ata5790n\*(C'\fR, \f(CW\*(C`ata5791\*(C'\fR, \f(CW\*(C`ata6613c\*(C'\fR, \f(CW\*(C`ata6614q\*(C'\fR, \f(CW\*(C`ata5782\*(C'\fR, \f(CW\*(C`ata5831\*(C'\fR, \f(CW\*(C`ata8210\*(C'\fR, \f(CW\*(C`ata8510\*(C'\fR, \f(CW\*(C`ata5787\*(C'\fR, \f(CW\*(C`ata5835\*(C'\fR, \f(CW\*(C`ata5700m322\*(C'\fR, \f(CW\*(C`ata5702m322\*(C'\fR, \f(CW\*(C`at90pwm161\*(C'\fR, \f(CW\*(C`at90pwm216\*(C'\fR, \f(CW\*(C`at90pwm316\*(C'\fR, \f(CW\*(C`at90can32\*(C'\fR, \f(CW\*(C`at90can64\*(C'\fR, \f(CW\*(C`at90scr100\*(C'\fR, \f(CW\*(C`at90usb646\*(C'\fR, \f(CW\*(C`at90usb647\*(C'\fR, \f(CW\*(C`at94k\*(C'\fR, \f(CW\*(C`m3000\*(C'\fR.
  .ie n .IP """avr51""" 4
  .el .IP "\f(CWavr51\fR" 4
  .IX Item "avr51"
*************** The default for this option is \fBavr2\f
*** 20803,20819 ****
  .el .IP "\f(CWavrxmega2\fR" 4
  .IX Item "avrxmega2"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with more than 8 KiB and up to 64 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atxmega8e5\*(C'\fR, \f(CW\*(C`atxmega16a4\*(C'\fR, \f(CW\*(C`atxmega16a4u\*(C'\fR, \f(CW\*(C`atxmega16c4\*(C'\fR, \f(CW\*(C`atxmega16d4\*(C'\fR, \f(CW\*(C`atxmega16e5\*(C'\fR, \f(CW\*(C`atxmega32a4\*(C'\fR, \f(CW\*(C`atxmega32a4u\*(C'\fR, \f(CW\*(C`atxmega32c3\*(C'\fR, \f(CW\*(C`atxmega32c4\*(C'\fR, \f(CW\*(C`atxmega32d3\*(C'\fR, \f(CW\*(C`atxmega32d4\*(C'\fR, \f(CW\*(C`atxmega32e5\*(C'\fR.
  .ie n .IP """avrxmega3""" 4
  .el .IP "\f(CWavrxmega3\fR" 4
  .IX Item "avrxmega3"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with up to 64 KiB of combined program memory and \s-1RAM,\s0 and with program memory visible in the \s-1RAM\s0 address space.
! \&\fImcu\fR = \f(CW\*(C`attiny202\*(C'\fR, \f(CW\*(C`attiny204\*(C'\fR, \f(CW\*(C`attiny212\*(C'\fR, \f(CW\*(C`attiny214\*(C'\fR, \f(CW\*(C`attiny402\*(C'\fR, \f(CW\*(C`attiny404\*(C'\fR, \f(CW\*(C`attiny406\*(C'\fR, \f(CW\*(C`attiny412\*(C'\fR, \f(CW\*(C`attiny414\*(C'\fR, \f(CW\*(C`attiny416\*(C'\fR, \f(CW\*(C`attiny417\*(C'\fR, \f(CW\*(C`attiny804\*(C'\fR, \f(CW\*(C`attiny806\*(C'\fR, \f(CW\*(C`attiny807\*(C'\fR, \f(CW\*(C`attiny814\*(C'\fR, \f(CW\*(C`attiny816\*(C'\fR, \f(CW\*(C`attiny817\*(C'\fR, \f(CW\*(C`attiny1604\*(C'\fR, \f(CW\*(C`attiny1606\*(C'\fR, \f(CW\*(C`attiny1607\*(C'\fR, \f(CW\*(C`attiny1614\*(C'\fR, \f(CW\*(C`attiny1616\*(C'\fR, \f(CW\*(C`attiny1617\*(C'\fR, \f(CW\*(C`attiny3214\*(C'\fR, \f(CW\*(C`attiny3216\*(C'\fR, \f(CW\*(C`attiny3217\*(C'\fR, \f(CW\*(C`atmega808\*(C'\fR, \f(CW\*(C`atmega809\*(C'\fR, \f(CW\*(C`atmega1608\*(C'\fR, \f(CW\*(C`atmega1609\*(C'\fR, \f(CW\*(C`atmega3208\*(C'\fR, \f(CW\*(C`atmega3209\*(C'\fR, \f(CW\*(C`atmega4808\*(C'\fR, \f(CW\*(C`atmega4809\*(C'\fR.
  .ie n .IP """avrxmega4""" 4
  .el .IP "\f(CWavrxmega4\fR" 4
  .IX Item "avrxmega4"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with more than 64 KiB and up to 128 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atxmega64a3\*(C'\fR, \f(CW\*(C`atxmega64a3u\*(C'\fR, \f(CW\*(C`atxmega64a4u\*(C'\fR, \f(CW\*(C`atxmega64b1\*(C'\fR, \f(CW\*(C`atxmega64b3\*(C'\fR, \f(CW\*(C`atxmega64c3\*(C'\fR, \f(CW\*(C`atxmega64d3\*(C'\fR, \f(CW\*(C`atxmega64d4\*(C'\fR.
  .ie n .IP """avrxmega5""" 4
  .el .IP "\f(CWavrxmega5\fR" 4
  .IX Item "avrxmega5"
--- 20809,20825 ----
  .el .IP "\f(CWavrxmega2\fR" 4
  .IX Item "avrxmega2"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with more than 8 KiB and up to 64 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atxmega8e5\*(C'\fR, \f(CW\*(C`atxmega16a4\*(C'\fR, \f(CW\*(C`atxmega16a4u\*(C'\fR, \f(CW\*(C`atxmega16c4\*(C'\fR, \f(CW\*(C`atxmega16d4\*(C'\fR, \f(CW\*(C`atxmega16e5\*(C'\fR, \f(CW\*(C`atxmega32a4\*(C'\fR, \f(CW\*(C`atxmega32a4u\*(C'\fR, \f(CW\*(C`atxmega32c3\*(C'\fR, \f(CW\*(C`atxmega32c4\*(C'\fR, \f(CW\*(C`atxmega32d3\*(C'\fR, \f(CW\*(C`atxmega32d4\*(C'\fR, \f(CW\*(C`atxmega32e5\*(C'\fR, \f(CW\*(C`avr64da28\*(C'\fR, \f(CW\*(C`avr64da32\*(C'\fR, \f(CW\*(C`avr64da48\*(C'\fR, \f(CW\*(C`avr64da64\*(C'\fR, \f(CW\*(C`avr64db28\*(C'\fR, \f(CW\*(C`avr64db32\*(C'\fR, \f(CW\*(C`avr64db48\*(C'\fR, \f(CW\*(C`avr64db64\*(C'\fR, \f(CW\*(C`avr64dd14\*(C'\fR, \f(CW\*(C`avr64dd20\*(C'\fR, \f(CW\*(C`avr64dd28\*(C'\fR, \f(CW\*(C`avr64dd32\*(C'\fR, \f(CW\*(C`avr64du28\*(C'\fR, \f(CW\*(C`avr64du32\*(C'\fR, \f(CW\*(C`avr64ea28\*(C'\fR, \f(CW\*(C`avr64ea32\*(C'\fR, \f(CW\*(C`avr64ea48\*(C'\fR.
  .ie n .IP """avrxmega3""" 4
  .el .IP "\f(CWavrxmega3\fR" 4
  .IX Item "avrxmega3"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with up to 64 KiB of combined program memory and \s-1RAM,\s0 and with program memory visible in the \s-1RAM\s0 address space.
! \&\fImcu\fR = \f(CW\*(C`attiny202\*(C'\fR, \f(CW\*(C`attiny204\*(C'\fR, \f(CW\*(C`attiny212\*(C'\fR, \f(CW\*(C`attiny214\*(C'\fR, \f(CW\*(C`attiny402\*(C'\fR, \f(CW\*(C`attiny404\*(C'\fR, \f(CW\*(C`attiny406\*(C'\fR, \f(CW\*(C`attiny412\*(C'\fR, \f(CW\*(C`attiny414\*(C'\fR, \f(CW\*(C`attiny416\*(C'\fR, \f(CW\*(C`attiny416auto\*(C'\fR, \f(CW\*(C`attiny417\*(C'\fR, \f(CW\*(C`attiny424\*(C'\fR, \f(CW\*(C`attiny426\*(C'\fR, \f(CW\*(C`attiny427\*(C'\fR, \f(CW\*(C`attiny804\*(C'\fR, \f(CW\*(C`attiny806\*(C'\fR, \f(CW\*(C`attiny807\*(C'\fR, \f(CW\*(C`attiny814\*(C'\fR, \f(CW\*(C`attiny816\*(C'\fR, \f(CW\*(C`attiny817\*(C'\fR, \f(CW\*(C`attiny824\*(C'\fR, \f(CW\*(C`attiny826\*(C'\fR, \f(CW\*(C`attiny827\*(C'\fR, \f(CW\*(C`attiny1604\*(C'\fR, \f(CW\*(C`attiny1606\*(C'\fR, \f(CW\*(C`attiny1607\*(C'\fR, \f(CW\*(C`attiny1614\*(C'\fR, \f(CW\*(C`attiny1616\*(C'\fR, \f(CW\*(C`attiny1617\*(C'\fR, \f(CW\*(C`attiny1624\*(C'\fR, \f(CW\*(C`attiny1626\*(C'\fR, \f(CW\*(C`attiny1627\*(C'\fR, \f(CW\*(C`attiny3214\*(C'\fR, \f(CW\*(C`attiny3216\*(C'\fR, \f(CW\*(C`attiny3217\*(C'\fR, \f(CW\*(C`attiny3224\*(C'\fR, \f(CW\*(C`attiny3226\*(C'\fR, \f(CW\*(C`attiny3227\*(C'\fR, \f(CW\*(C`atmega808\*(C'\fR, \f(CW\*(C`atmega809\*(C'\fR, \f(CW\*(C`atmega1608\*(C'\fR, \f(CW\*(C`atmega1609\*(C'\fR, \f(CW\*(C`atmega3208\*(C'\fR, \f(CW\*(C`atmega3209\*(C'\fR, \f(CW\*(C`atmega4808\*(C'\fR, \f(CW\*(C`atmega4809\*(C'\fR, \f(CW\*(C`avr16dd14\*(C'\fR, \f(CW\*(C`avr16dd20\*(C'\fR, \f(CW\*(C`avr16dd28\*(C'\fR, \f(CW\*(C`avr16dd32\*(C'\fR, \f(CW\*(C`avr16du14\*(C'\fR, \f(CW\*(C`avr16du20\*(C'\fR, \f(CW\*(C`avr16du28\*(C'\fR, \f(CW\*(C`avr16du32\*(C'\fR, \f(CW\*(C`avr16ea28\*(C'\fR, \f(CW\*(C`avr16ea32\*(C'\fR, \f(CW\*(C`avr16ea48\*(C'\fR, \f(CW\*(C`avr16eb14\*(C'\fR, \f(CW\*(C`avr16eb20\*(C'\fR, \f(CW\*(C`avr16eb28\*(C'\fR, \f(CW\*(C`avr16eb32\*(C'\fR, \f(CW\*(C`avr32da28\*(C'\fR, \f(CW\*(C`avr32da32\*(C'\fR, \f(CW\*(C`avr32da48\*(C'\fR, \f(CW\*(C`avr32db28\*(C'\fR, \f(CW\*(C`avr32db32\*(C'\fR, \f(CW\*(C`avr32db48\*(C'\fR, \f(CW\*(C`avr32dd14\*(C'\fR, \f(CW\*(C`avr32dd20\*(C'\fR, \f(CW\*(C`avr32dd28\*(C'\fR, \f(CW\*(C`avr32dd32\*(C'\fR, \f(CW\*(C`avr32du14\*(C'\fR, \f(CW\*(C`avr32du20\*(C'\fR, \f(CW\*(C`avr32du28\*(C'\fR, \f(CW\*(C`avr32du32\*(C'\fR, \f(CW\*(C`avr32ea28\*(C'\fR, \f(CW\*(C`avr32ea32\*(C'\fR, \f(CW\*(C`avr32ea48\*(C'\fR.
  .ie n .IP """avrxmega4""" 4
  .el .IP "\f(CWavrxmega4\fR" 4
  .IX Item "avrxmega4"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with more than 64 KiB and up to 128 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atxmega64a3\*(C'\fR, \f(CW\*(C`atxmega64a3u\*(C'\fR, \f(CW\*(C`atxmega64a4u\*(C'\fR, \f(CW\*(C`atxmega64b1\*(C'\fR, \f(CW\*(C`atxmega64b3\*(C'\fR, \f(CW\*(C`atxmega64c3\*(C'\fR, \f(CW\*(C`atxmega64d3\*(C'\fR, \f(CW\*(C`atxmega64d4\*(C'\fR, \f(CW\*(C`avr128da28\*(C'\fR, \f(CW\*(C`avr128da32\*(C'\fR, \f(CW\*(C`avr128da48\*(C'\fR, \f(CW\*(C`avr128da64\*(C'\fR, \f(CW\*(C`avr128db28\*(C'\fR, \f(CW\*(C`avr128db32\*(C'\fR, \f(CW\*(C`avr128db48\*(C'\fR, \f(CW\*(C`avr128db64\*(C'\fR.
  .ie n .IP """avrxmega5""" 4
  .el .IP "\f(CWavrxmega5\fR" 4
  .IX Item "avrxmega5"
*************** The default for this option is \fBavr2\f
*** 20833,20839 ****
  .el .IP "\f(CWavrtiny\fR" 4
  .IX Item "avrtiny"
  \&\*(L"\s-1TINY\*(R"\s0 Tiny core devices with 512 B up to 4 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`attiny4\*(C'\fR, \f(CW\*(C`attiny5\*(C'\fR, \f(CW\*(C`attiny9\*(C'\fR, \f(CW\*(C`attiny10\*(C'\fR, \f(CW\*(C`attiny20\*(C'\fR, \f(CW\*(C`attiny40\*(C'\fR.
  .ie n .IP """avr1""" 4
  .el .IP "\f(CWavr1\fR" 4
  .IX Item "avr1"
--- 20839,20845 ----
  .el .IP "\f(CWavrtiny\fR" 4
  .IX Item "avrtiny"
  \&\*(L"\s-1TINY\*(R"\s0 Tiny core devices with 512 B up to 4 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`attiny4\*(C'\fR, \f(CW\*(C`attiny5\*(C'\fR, \f(CW\*(C`attiny9\*(C'\fR, \f(CW\*(C`attiny10\*(C'\fR, \f(CW\*(C`attiny102\*(C'\fR, \f(CW\*(C`attiny104\*(C'\fR, \f(CW\*(C`attiny20\*(C'\fR, \f(CW\*(C`attiny40\*(C'\fR.
  .ie n .IP """avr1""" 4
  .el .IP "\f(CWavr1\fR" 4
  .IX Item "avr1"
*************** This is by default \s-1ON.\s0
*** 22084,22094 ****
  .IP "\fB\-gfull\fR" 4
  .IX Item "-gfull"
  Emit debugging information for all symbols and types.
  .IP "\fB\-mmacosx\-version\-min=\fR\fIversion\fR" 4
  .IX Item "-mmacosx-version-min=version"
! The earliest version of MacOS X that this executable will run on
! is \fIversion\fR.  Typical values of \fIversion\fR include \f(CW10.1\fR,
! \&\f(CW10.2\fR, and \f(CW10.3.9\fR.
  .Sp
  If the compiler was built to use the system's headers by default,
  then the default for this option is the system version on which the
--- 22090,22108 ----
  .IP "\fB\-gfull\fR" 4
  .IX Item "-gfull"
  Emit debugging information for all symbols and types.
+ .IP "\fB\-fconstant\-cfstrings\fR" 4
+ .IX Item "-fconstant-cfstrings"
+ The \fB\-fconstant\-cfstrings\fR is an alias for \fB\-mconstant\-cfstrings\fR.
+ .IP "\fB\-mconstant\-cfstrings\fR" 4
+ .IX Item "-mconstant-cfstrings"
+ When the NeXT runtime is being used (the default on these systems), override
+ any \fB\-fconstant\-string\-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR
+ literals to be laid out as constant CoreFoundation strings.
  .IP "\fB\-mmacosx\-version\-min=\fR\fIversion\fR" 4
  .IX Item "-mmacosx-version-min=version"
! The earliest version of MacOS X that this executable will run on is
! \&\fIversion\fR.  Typical values supported for \fIversion\fR include \f(CW12\fR,
! \&\f(CW10.12\fR, and \f(CW10.5.8\fR.
  .Sp
  If the compiler was built to use the system's headers by default,
  then the default for this option is the system version on which the
*************** are provided for backwards compatibility
*** 22130,22136 ****
  .IP "\fB\-all_load\fR" 4
  .IX Item "-all_load"
  Loads all members of static archive libraries.
! See man \fIld\fR\|(1) for more information.
  .IP "\fB\-arch_errors_fatal\fR" 4
  .IX Item "-arch_errors_fatal"
  Cause the errors having to do with files that have the wrong architecture
--- 22144,22150 ----
  .IP "\fB\-all_load\fR" 4
  .IX Item "-all_load"
  Loads all members of static archive libraries.
! See man \fBld\fR\|(1) for more information.
  .IP "\fB\-arch_errors_fatal\fR" 4
  .IX Item "-arch_errors_fatal"
  Cause the errors having to do with files that have the wrong architecture
*************** bind all undefined references when the f
*** 22142,22152 ****
  .IP "\fB\-bundle\fR" 4
  .IX Item "-bundle"
  Produce a Mach-o bundle format file.
! See man \fIld\fR\|(1) for more information.
  .IP "\fB\-bundle_loader\fR \fIexecutable\fR" 4
  .IX Item "-bundle_loader executable"
  This option specifies the \fIexecutable\fR that will load the build
! output file being linked.  See man \fIld\fR\|(1) for more information.
  .IP "\fB\-dynamiclib\fR" 4
  .IX Item "-dynamiclib"
  When passed this option, \s-1GCC\s0 produces a dynamic library instead of
--- 22156,22166 ----
  .IP "\fB\-bundle\fR" 4
  .IX Item "-bundle"
  Produce a Mach-o bundle format file.
! See man \fBld\fR\|(1) for more information.
  .IP "\fB\-bundle_loader\fR \fIexecutable\fR" 4
  .IX Item "-bundle_loader executable"
  This option specifies the \fIexecutable\fR that will load the build
! output file being linked.  See man \fBld\fR\|(1) for more information.
  .IP "\fB\-dynamiclib\fR" 4
  .IX Item "-dynamiclib"
  When passed this option, \s-1GCC\s0 produces a dynamic library instead of
*************** global symbol: The data got table must b
*** 23769,23774 ****
--- 23783,23816 ----
  .Sp
  The default code model is \f(CW\*(C`normal\*(C'\fR.
  .RE
+ .IP "\fB\-mrelax\fR" 4
+ .IX Item "-mrelax"
+ .PD 0
+ .IP "\fB\-mno\-relax\fR" 4
+ .IX Item "-mno-relax"
+ .PD
+ Take (do not take) advantage of linker relaxations.  If
+ \&\fB\-mpass\-mrelax\-to\-as\fR is enabled, this option is also passed to
+ the assembler.  The default is determined during \s-1GCC\s0 build-time by
+ detecting corresponding assembler support:
+ \&\fB\-mrelax\fR if the assembler supports both the \fB\-mrelax\fR
+ option and the conditional branch relaxation (it's required or the
+ \&\f(CW\*(C`.align\*(C'\fR directives and conditional branch instructions in the
+ assembly code outputted by \s-1GCC\s0 may be rejected by the assembler because
+ of a relocation overflow), \fB\-mno\-relax\fR otherwise.
+ .IP "\fB\-mpass\-mrelax\-to\-as\fR" 4
+ .IX Item "-mpass-mrelax-to-as"
+ .PD 0
+ .IP "\fB\-mno\-pass\-mrelax\-to\-as\fR" 4
+ .IX Item "-mno-pass-mrelax-to-as"
+ .PD
+ Pass (do not pass) the \fB\-mrelax\fR or \fB\-mno\-relax\fR option
+ to the assembler.  The default is determined during \s-1GCC\s0 build-time by
+ detecting corresponding assembler support:
+ \&\fB\-mpass\-mrelax\-to\-as\fR if the assembler supports the
+ \&\fB\-mrelax\fR option, \fB\-mno\-pass\-mrelax\-to\-as\fR otherwise.
+ This option is mostly useful for debugging, or interoperation with
+ assemblers different from the build-time one.
  .PP
  \fIM32C Options\fR
  .IX Subsection "M32C Options"
*************** libraries assume that extended-precision
*** 31013,31018 ****
--- 31055,31067 ----
  are enabled by default; routines in such libraries could suffer significant
  loss of accuracy, typically through so-called \*(L"catastrophic cancellation\*(R",
  when this option is used to set the precision to less than extended precision.
+ .IP "\fB\-mdaz\-ftz\fR" 4
+ .IX Item "-mdaz-ftz"
+ The flush-to-zero (\s-1FTZ\s0) and denormals-are-zero (\s-1DAZ\s0) flags in the \s-1MXCSR\s0 register
+ are used to control floating-point calculations.SSE and \s-1AVX\s0 instructions
+ including scalar and vector instructions could benefit from enabling the \s-1FTZ\s0
+ and \s-1DAZ\s0 flags when \fB\-mdaz\-ftz\fR is specified. Don't set \s-1FTZ/DAZ\s0 flags
+ when \fB\-mno\-daz\-ftz\fR is specified.
  .IP "\fB\-mstackrealign\fR" 4
  .IX Item "-mstackrealign"
  Realign the stack at entry.  On the x86, the \fB\-mstackrealign\fR
*************** on x86\-64 processors in 64\-bit environ
*** 31925,31931 ****
  Generate code for a 16\-bit, 32\-bit or 64\-bit environment.
  The \fB\-m32\fR option sets \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, and pointer types
  to 32 bits, and
! generates code that runs on any i386 system.
  .Sp
  The \fB\-m64\fR option sets \f(CW\*(C`int\*(C'\fR to 32 bits and \f(CW\*(C`long\*(C'\fR and pointer
  types to 64 bits, and generates code for the x86\-64 architecture.
--- 31974,31980 ----
  Generate code for a 16\-bit, 32\-bit or 64\-bit environment.
  The \fB\-m32\fR option sets \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, and pointer types
  to 32 bits, and
! generates code that runs in 32\-bit mode.
  .Sp
  The \fB\-m64\fR option sets \f(CW\*(C`int\*(C'\fR to 32 bits and \f(CW\*(C`long\*(C'\fR and pointer
  types to 64 bits, and generates code for the x86\-64 architecture.
*************** to subtle defects.  Supplying them in ca
*** 32452,32459 ****
  is innocuous.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
! \&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIdbx\fR\|(1)
  and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIas\fR,
  \&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
  .SH "AUTHOR"
--- 32501,32508 ----
  is innocuous.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fBgpl\fR\|(7), \fBgfdl\fR\|(7), \fBfsf\-funding\fR\|(7),
! \&\fBcpp\fR\|(1), \fBgcov\fR\|(1), \fBas\fR\|(1), \fBld\fR\|(1), \fBgdb\fR\|(1), \fBdbx\fR\|(1)
  and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIas\fR,
  \&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
  .SH "AUTHOR"
*************** any later version published by the Free
*** 32471,32477 ****
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fIgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
--- 32520,32526 ----
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fBgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
diff -Nrcpad gcc-12.3.0/gcc/doc/gcc.1 gcc-12.4.0/gcc/doc/gcc.1
*** gcc-12.3.0/gcc/doc/gcc.1	Mon May  8 12:27:47 2023
--- gcc-12.4.0/gcc/doc/gcc.1	Thu Jun 20 08:26:16 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "GCC 1"
! .TH GCC 1 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "GCC 1"
! .TH GCC 1 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** in the following sections.
*** 1008,1014 ****
  \&\-mcond\-move\-float  \-mno\-cond\-move\-float 
  \&\-memcpy  \-mno\-memcpy \-mstrict\-align \-mno\-strict\-align 
  \&\-mmax\-inline\-memcpy\-size=\fR\fIn\fR 
! \&\fB\-mcmodel=\fR\fIcode-model\fR
  .Sp
  \&\fIM32R/D Options\fR
  \&\fB\-m32r2  \-m32rx  \-m32r 
--- 1012,1018 ----
  \&\-mcond\-move\-float  \-mno\-cond\-move\-float 
  \&\-memcpy  \-mno\-memcpy \-mstrict\-align \-mno\-strict\-align 
  \&\-mmax\-inline\-memcpy\-size=\fR\fIn\fR 
! \&\fB\-mcmodel=\fR\fIcode-model\fR \fB\-mrelax \-mpass\-mrelax\-to\-as\fR
  .Sp
  \&\fIM32R/D Options\fR
  \&\fB\-m32r2  \-m32rx  \-m32r 
*************** See \s-1RS/6000\s0 and PowerPC Options.
*** 1438,1444 ****
  \&\-m96bit\-long\-double  \-mlong\-double\-64  \-mlong\-double\-80  \-mlong\-double\-128 
  \&\-mregparm=\fR\fInum\fR  \fB\-msseregparm 
  \&\-mveclibabi=\fR\fItype\fR  \fB\-mvect8\-ret\-in\-mem 
! \&\-mpc32  \-mpc64  \-mpc80  \-mstackrealign 
  \&\-momit\-leaf\-frame\-pointer  \-mno\-red\-zone  \-mno\-tls\-direct\-seg\-refs 
  \&\-mcmodel=\fR\fIcode-model\fR  \fB\-mabi=\fR\fIname\fR  \fB\-maddress\-mode=\fR\fImode\fR 
  \&\fB\-m32  \-m64  \-mx32  \-m16  \-miamcu  \-mlarge\-data\-threshold=\fR\fInum\fR 
--- 1442,1448 ----
  \&\-m96bit\-long\-double  \-mlong\-double\-64  \-mlong\-double\-80  \-mlong\-double\-128 
  \&\-mregparm=\fR\fInum\fR  \fB\-msseregparm 
  \&\-mveclibabi=\fR\fItype\fR  \fB\-mvect8\-ret\-in\-mem 
! \&\-mpc32  \-mpc64  \-mpc80 \-mdaz\-ftz \-mstackrealign 
  \&\-momit\-leaf\-frame\-pointer  \-mno\-red\-zone  \-mno\-tls\-direct\-seg\-refs 
  \&\-mcmodel=\fR\fIcode-model\fR  \fB\-mabi=\fR\fIname\fR  \fB\-maddress\-mode=\fR\fImode\fR 
  \&\fB\-m32  \-m64  \-mx32  \-m16  \-miamcu  \-mlarge\-data\-threshold=\fR\fInum\fR 
*************** and Objective\-\*(C+ programs:
*** 4361,4370 ****
  Use \fIclass-name\fR as the name of the class to instantiate for each
  literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR.  The default
  class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and
! \&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below).  The
! \&\fB\-fconstant\-cfstrings\fR option, if also present, overrides the
! \&\fB\-fconstant\-string\-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR literals
! to be laid out as constant CoreFoundation strings.
  .IP "\fB\-fgnu\-runtime\fR" 4
  .IX Item "-fgnu-runtime"
  Generate object code compatible with the standard \s-1GNU\s0 Objective-C
--- 4365,4376 ----
  Use \fIclass-name\fR as the name of the class to instantiate for each
  literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR.  The default
  class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and
! \&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below).  On
! Darwin (macOS, MacOS X) platforms, the \fB\-fconstant\-cfstrings\fR option, if
! also present, overrides the \fB\-fconstant\-string\-class\fR setting and cause
! \&\f(CW\*(C`@"..."\*(C'\fR literals to be laid out as constant CoreFoundation strings.
! Note that \fB\-fconstant\-cfstrings\fR is an alias for the target-specific
! \&\fB\-mconstant\-cfstrings\fR equivalent.
  .IP "\fB\-fgnu\-runtime\fR" 4
  .IX Item "-fgnu-runtime"
  Generate object code compatible with the standard \s-1GNU\s0 Objective-C
*************** This is useful if you need to make sure
*** 4456,4463 ****
  be compiled with older versions of \s-1GCC.\s0
  .IP "\fB\-freplace\-objc\-classes\fR" 4
  .IX Item "-freplace-objc-classes"
! Emit a special marker instructing \fB\f(BIld\fB\|(1)\fR not to statically link in
! the resulting object file, and allow \fB\f(BIdyld\fB\|(1)\fR to load it in at
  run time instead.  This is used in conjunction with the Fix-and-Continue
  debugging mode, where the object file in question may be recompiled and
  dynamically reloaded in the course of program execution, without the need
--- 4462,4469 ----
  be compiled with older versions of \s-1GCC.\s0
  .IP "\fB\-freplace\-objc\-classes\fR" 4
  .IX Item "-freplace-objc-classes"
! Emit a special marker instructing \fB\fBld\fB\|(1)\fR not to statically link in
! the resulting object file, and allow \fB\fBdyld\fB\|(1)\fR to load it in at
  run time instead.  This is used in conjunction with the Fix-and-Continue
  debugging mode, where the object file in question may be recompiled and
  dynamically reloaded in the course of program execution, without the need
*************** bracketed, but that for \f(CW\*(C`b\*(C'
*** 6314,6320 ****
  This warning is enabled by \fB\-Wall\fR.
  .IP "\fB\-Wmissing\-include\-dirs\fR (C, \*(C+, Objective-C, Objective\-\*(C+ and Fortran only)" 4
  .IX Item "-Wmissing-include-dirs (C, , Objective-C, Objective- and Fortran only)"
! Warn if a user-supplied include directory does not exist. This opions is disabled
  by default for C, \*(C+, Objective-C and Objective\-\*(C+. For Fortran, it is partially
  enabled by default by warning for \-I and \-J, only.
  .IP "\fB\-Wno\-missing\-profile\fR" 4
--- 6320,6326 ----
  This warning is enabled by \fB\-Wall\fR.
  .IP "\fB\-Wmissing\-include\-dirs\fR (C, \*(C+, Objective-C, Objective\-\*(C+ and Fortran only)" 4
  .IX Item "-Wmissing-include-dirs (C, , Objective-C, Objective- and Fortran only)"
! Warn if a user-supplied include directory does not exist. This option is disabled
  by default for C, \*(C+, Objective-C and Objective\-\*(C+. For Fortran, it is partially
  enabled by default by warning for \-I and \-J, only.
  .IP "\fB\-Wno\-missing\-profile\fR" 4
*************** example of how this can happen:
*** 6810,6816 ****
  .Sp
  If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is
  always initialized, but \s-1GCC\s0 doesn't know this. To suppress the
! warning, you need to provide a default case with \fIassert\fR\|(0) or
  similar code.
  .Sp
  This option also warns when a non-volatile automatic variable might be
--- 6816,6822 ----
  .Sp
  If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is
  always initialized, but \s-1GCC\s0 doesn't know this. To suppress the
! warning, you need to provide a default case with \fBassert\fR\|(0) or
  similar code.
  .Sp
  This option also warns when a non-volatile automatic variable might be
*************** run-time callbacks.
*** 13943,13949 ****
  Emit special instrumentation for accesses to volatiles.
  .IP "\fBtsan-instrument-func-entry-exit\fR" 4
  .IX Item "tsan-instrument-func-entry-exit"
! Emit instrumentation calls to _\|\fI_tsan_func_entry()\fR and _\|\fI_tsan_func_exit()\fR.
  .IP "\fBmax-fsm-thread-path-insns\fR" 4
  .IX Item "max-fsm-thread-path-insns"
  Maximum number of instructions to copy when duplicating blocks on a
--- 13949,13955 ----
  Emit special instrumentation for accesses to volatiles.
  .IP "\fBtsan-instrument-func-entry-exit\fR" 4
  .IX Item "tsan-instrument-func-entry-exit"
! Emit instrumentation calls to _\|\fB_tsan_func_entry()\fR and _\|\fB_tsan_func_exit()\fR.
  .IP "\fBmax-fsm-thread-path-insns\fR" 4
  .IX Item "max-fsm-thread-path-insns"
  Maximum number of instructions to copy when duplicating blocks on a
*************** performance of the code.  Permissible va
*** 18462,18468 ****
  \&\fBcortex\-a75.cortex\-a55\fR, \fBcortex\-a76.cortex\-a55\fR,
  \&\fBcortex\-r82\fR, \fBcortex\-x1\fR, \fBcortex\-x2\fR,
  \&\fBcortex\-a510\fR, \fBcortex\-a710\fR, \fBampere1\fR,
! \&\fBampere1a\fR, \fBnative\fR.
  .Sp
  The values \fBcortex\-a57.cortex\-a53\fR, \fBcortex\-a72.cortex\-a53\fR,
  \&\fBcortex\-a73.cortex\-a35\fR, \fBcortex\-a73.cortex\-a53\fR,
--- 18468,18474 ----
  \&\fBcortex\-a75.cortex\-a55\fR, \fBcortex\-a76.cortex\-a55\fR,
  \&\fBcortex\-r82\fR, \fBcortex\-x1\fR, \fBcortex\-x2\fR,
  \&\fBcortex\-a510\fR, \fBcortex\-a710\fR, \fBampere1\fR,
! \&\fBampere1a\fR, \fBcobalt\-100\fR and \fBnative\fR.
  .Sp
  The values \fBcortex\-a57.cortex\-a53\fR, \fBcortex\-a72.cortex\-a53\fR,
  \&\fBcortex\-a73.cortex\-a35\fR, \fBcortex\-a73.cortex\-a53\fR,
*************** The default for this option is \fBavr2\f
*** 20783,20794 ****
  .el .IP "\f(CWavr4\fR" 4
  .IX Item "avr4"
  \&\*(L"Enhanced\*(R" devices with up to 8 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atmega48\*(C'\fR, \f(CW\*(C`atmega48a\*(C'\fR, \f(CW\*(C`atmega48p\*(C'\fR, \f(CW\*(C`atmega48pa\*(C'\fR, \f(CW\*(C`atmega48pb\*(C'\fR, \f(CW\*(C`atmega8\*(C'\fR, \f(CW\*(C`atmega8a\*(C'\fR, \f(CW\*(C`atmega8hva\*(C'\fR, \f(CW\*(C`atmega88\*(C'\fR, \f(CW\*(C`atmega88a\*(C'\fR, \f(CW\*(C`atmega88p\*(C'\fR, \f(CW\*(C`atmega88pa\*(C'\fR, \f(CW\*(C`atmega88pb\*(C'\fR, \f(CW\*(C`atmega8515\*(C'\fR, \f(CW\*(C`atmega8535\*(C'\fR, \f(CW\*(C`ata6285\*(C'\fR, \f(CW\*(C`ata6286\*(C'\fR, \f(CW\*(C`ata6289\*(C'\fR, \f(CW\*(C`ata6612c\*(C'\fR, \f(CW\*(C`at90pwm1\*(C'\fR, \f(CW\*(C`at90pwm2\*(C'\fR, \f(CW\*(C`at90pwm2b\*(C'\fR, \f(CW\*(C`at90pwm3\*(C'\fR, \f(CW\*(C`at90pwm3b\*(C'\fR, \f(CW\*(C`at90pwm81\*(C'\fR.
  .ie n .IP """avr5""" 4
  .el .IP "\f(CWavr5\fR" 4
  .IX Item "avr5"
  \&\*(L"Enhanced\*(R" devices with 16 KiB up to 64 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atmega16\*(C'\fR, \f(CW\*(C`atmega16a\*(C'\fR, \f(CW\*(C`atmega16hva\*(C'\fR, \f(CW\*(C`atmega16hva2\*(C'\fR, \f(CW\*(C`atmega16hvb\*(C'\fR, \f(CW\*(C`atmega16hvbrevb\*(C'\fR, \f(CW\*(C`atmega16m1\*(C'\fR, \f(CW\*(C`atmega16u4\*(C'\fR, \f(CW\*(C`atmega161\*(C'\fR, \f(CW\*(C`atmega162\*(C'\fR, \f(CW\*(C`atmega163\*(C'\fR, \f(CW\*(C`atmega164a\*(C'\fR, \f(CW\*(C`atmega164p\*(C'\fR, \f(CW\*(C`atmega164pa\*(C'\fR, \f(CW\*(C`atmega165\*(C'\fR, \f(CW\*(C`atmega165a\*(C'\fR, \f(CW\*(C`atmega165p\*(C'\fR, \f(CW\*(C`atmega165pa\*(C'\fR, \f(CW\*(C`atmega168\*(C'\fR, \f(CW\*(C`atmega168a\*(C'\fR, \f(CW\*(C`atmega168p\*(C'\fR, \f(CW\*(C`atmega168pa\*(C'\fR, \f(CW\*(C`atmega168pb\*(C'\fR, \f(CW\*(C`atmega169\*(C'\fR, \f(CW\*(C`atmega169a\*(C'\fR, \f(CW\*(C`atmega169p\*(C'\fR, \f(CW\*(C`atmega169pa\*(C'\fR, \f(CW\*(C`atmega32\*(C'\fR, \f(CW\*(C`atmega32a\*(C'\fR, \f(CW\*(C`atmega32c1\*(C'\fR, \f(CW\*(C`atmega32hvb\*(C'\fR, \f(CW\*(C`atmega32hvbrevb\*(C'\fR, \f(CW\*(C`atmega32m1\*(C'\fR, \f(CW\*(C`atmega32u4\*(C'\fR, \f(CW\*(C`atmega32u6\*(C'\fR, \f(CW\*(C`atmega323\*(C'\fR, \f(CW\*(C`atmega324a\*(C'\fR, \f(CW\*(C`atmega324p\*(C'\fR, \f(CW\*(C`atmega324pa\*(C'\fR, \f(CW\*(C`atmega324pb\*(C'\fR, \f(CW\*(C`atmega325\*(C'\fR, \f(CW\*(C`atmega325a\*(C'\fR, \f(CW\*(C`atmega325p\*(C'\fR, \f(CW\*(C`atmega325pa\*(C'\fR, \f(CW\*(C`atmega328\*(C'\fR, \f(CW\*(C`atmega328p\*(C'\fR, \f(CW\*(C`atmega328pb\*(C'\fR, \f(CW\*(C`atmega329\*(C'\fR, \f(CW\*(C`atmega329a\*(C'\fR, \f(CW\*(C`atmega329p\*(C'\fR, \f(CW\*(C`atmega329pa\*(C'\fR, \f(CW\*(C`atmega3250\*(C'\fR, \f(CW\*(C`atmega3250a\*(C'\fR, \f(CW\*(C`atmega3250p\*(C'\fR, \f(CW\*(C`atmega3250pa\*(C'\fR, \f(CW\*(C`atmega3290\*(C'\fR, \f(CW\*(C`atmega3290a\*(C'\fR, \f(CW\*(C`atmega3290p\*(C'\fR, \f(CW\*(C`atmega3290pa\*(C'\fR, \f(CW\*(C`atmega406\*(C'\fR, \f(CW\*(C`atmega64\*(C'\fR, \f(CW\*(C`atmega64a\*(C'\fR, \f(CW\*(C`atmega64c1\*(C'\fR, \f(CW\*(C`atmega64hve\*(C'\fR, \f(CW\*(C`atmega64hve2\*(C'\fR, \f(CW\*(C`atmega64m1\*(C'\fR, \f(CW\*(C`atmega64rfr2\*(C'\fR, \f(CW\*(C`atmega640\*(C'\fR, \f(CW\*(C`atmega644\*(C'\fR, \f(CW\*(C`atmega644a\*(C'\fR, \f(CW\*(C`atmega644p\*(C'\fR, \f(CW\*(C`atmega644pa\*(C'\fR, \f(CW\*(C`atmega644rfr2\*(C'\fR, \f(CW\*(C`atmega645\*(C'\fR, \f(CW\*(C`atmega645a\*(C'\fR, \f(CW\*(C`atmega645p\*(C'\fR, \f(CW\*(C`atmega649\*(C'\fR, \f(CW\*(C`atmega649a\*(C'\fR, \f(CW\*(C`atmega649p\*(C'\fR, \f(CW\*(C`atmega6450\*(C'\fR, \f(CW\*(C`atmega6450a\*(C'\fR, \f(CW\*(C`atmega6450p\*(C'\fR, \f(CW\*(C`atmega6490\*(C'\fR, \f(CW\*(C`atmega6490a\*(C'\fR, \f(CW\*(C`atmega6490p\*(C'\fR, \f(CW\*(C`ata5795\*(C'\fR, \f(CW\*(C`ata5790\*(C'\fR, \f(CW\*(C`ata5790n\*(C'\fR, \f(CW\*(C`ata5791\*(C'\fR, \f(CW\*(C`ata6613c\*(C'\fR, \f(CW\*(C`ata6614q\*(C'\fR, \f(CW\*(C`ata5782\*(C'\fR, \f(CW\*(C`ata5831\*(C'\fR, \f(CW\*(C`ata8210\*(C'\fR, \f(CW\*(C`ata8510\*(C'\fR, \f(CW\*(C`ata5702m322\*(C'\fR, \f(CW\*(C`at90pwm161\*(C'\fR, \f(CW\*(C`at90pwm216\*(C'\fR, \f(CW\*(C`at90pwm316\*(C'\fR, \f(CW\*(C`at90can32\*(C'\fR, \f(CW\*(C`at90can64\*(C'\fR, \f(CW\*(C`at90scr100\*(C'\fR, \f(CW\*(C`at90usb646\*(C'\fR, \f(CW\*(C`at90usb647\*(C'\fR, \f(CW\*(C`at94k\*(C'\fR, \f(CW\*(C`m3000\*(C'\fR.
  .ie n .IP """avr51""" 4
  .el .IP "\f(CWavr51\fR" 4
  .IX Item "avr51"
--- 20789,20800 ----
  .el .IP "\f(CWavr4\fR" 4
  .IX Item "avr4"
  \&\*(L"Enhanced\*(R" devices with up to 8 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atmega48\*(C'\fR, \f(CW\*(C`atmega48a\*(C'\fR, \f(CW\*(C`atmega48p\*(C'\fR, \f(CW\*(C`atmega48pa\*(C'\fR, \f(CW\*(C`atmega48pb\*(C'\fR, \f(CW\*(C`atmega8\*(C'\fR, \f(CW\*(C`atmega8a\*(C'\fR, \f(CW\*(C`atmega8hva\*(C'\fR, \f(CW\*(C`atmega88\*(C'\fR, \f(CW\*(C`atmega88a\*(C'\fR, \f(CW\*(C`atmega88p\*(C'\fR, \f(CW\*(C`atmega88pa\*(C'\fR, \f(CW\*(C`atmega88pb\*(C'\fR, \f(CW\*(C`atmega8515\*(C'\fR, \f(CW\*(C`atmega8535\*(C'\fR, \f(CW\*(C`ata5795\*(C'\fR, \f(CW\*(C`ata6285\*(C'\fR, \f(CW\*(C`ata6286\*(C'\fR, \f(CW\*(C`ata6289\*(C'\fR, \f(CW\*(C`ata6612c\*(C'\fR, \f(CW\*(C`at90pwm1\*(C'\fR, \f(CW\*(C`at90pwm2\*(C'\fR, \f(CW\*(C`at90pwm2b\*(C'\fR, \f(CW\*(C`at90pwm3\*(C'\fR, \f(CW\*(C`at90pwm3b\*(C'\fR, \f(CW\*(C`at90pwm81\*(C'\fR.
  .ie n .IP """avr5""" 4
  .el .IP "\f(CWavr5\fR" 4
  .IX Item "avr5"
  \&\*(L"Enhanced\*(R" devices with 16 KiB up to 64 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atmega16\*(C'\fR, \f(CW\*(C`atmega16a\*(C'\fR, \f(CW\*(C`atmega16hva\*(C'\fR, \f(CW\*(C`atmega16hva2\*(C'\fR, \f(CW\*(C`atmega16hvb\*(C'\fR, \f(CW\*(C`atmega16hvbrevb\*(C'\fR, \f(CW\*(C`atmega16m1\*(C'\fR, \f(CW\*(C`atmega16u4\*(C'\fR, \f(CW\*(C`atmega161\*(C'\fR, \f(CW\*(C`atmega162\*(C'\fR, \f(CW\*(C`atmega163\*(C'\fR, \f(CW\*(C`atmega164a\*(C'\fR, \f(CW\*(C`atmega164p\*(C'\fR, \f(CW\*(C`atmega164pa\*(C'\fR, \f(CW\*(C`atmega165\*(C'\fR, \f(CW\*(C`atmega165a\*(C'\fR, \f(CW\*(C`atmega165p\*(C'\fR, \f(CW\*(C`atmega165pa\*(C'\fR, \f(CW\*(C`atmega168\*(C'\fR, \f(CW\*(C`atmega168a\*(C'\fR, \f(CW\*(C`atmega168p\*(C'\fR, \f(CW\*(C`atmega168pa\*(C'\fR, \f(CW\*(C`atmega168pb\*(C'\fR, \f(CW\*(C`atmega169\*(C'\fR, \f(CW\*(C`atmega169a\*(C'\fR, \f(CW\*(C`atmega169p\*(C'\fR, \f(CW\*(C`atmega169pa\*(C'\fR, \f(CW\*(C`atmega32\*(C'\fR, \f(CW\*(C`atmega32a\*(C'\fR, \f(CW\*(C`atmega32c1\*(C'\fR, \f(CW\*(C`atmega32hvb\*(C'\fR, \f(CW\*(C`atmega32hvbrevb\*(C'\fR, \f(CW\*(C`atmega32m1\*(C'\fR, \f(CW\*(C`atmega32u4\*(C'\fR, \f(CW\*(C`atmega32u6\*(C'\fR, \f(CW\*(C`atmega323\*(C'\fR, \f(CW\*(C`atmega324a\*(C'\fR, \f(CW\*(C`atmega324p\*(C'\fR, \f(CW\*(C`atmega324pa\*(C'\fR, \f(CW\*(C`atmega324pb\*(C'\fR, \f(CW\*(C`atmega325\*(C'\fR, \f(CW\*(C`atmega325a\*(C'\fR, \f(CW\*(C`atmega325p\*(C'\fR, \f(CW\*(C`atmega325pa\*(C'\fR, \f(CW\*(C`atmega328\*(C'\fR, \f(CW\*(C`atmega328p\*(C'\fR, \f(CW\*(C`atmega328pb\*(C'\fR, \f(CW\*(C`atmega329\*(C'\fR, \f(CW\*(C`atmega329a\*(C'\fR, \f(CW\*(C`atmega329p\*(C'\fR, \f(CW\*(C`atmega329pa\*(C'\fR, \f(CW\*(C`atmega3250\*(C'\fR, \f(CW\*(C`atmega3250a\*(C'\fR, \f(CW\*(C`atmega3250p\*(C'\fR, \f(CW\*(C`atmega3250pa\*(C'\fR, \f(CW\*(C`atmega3290\*(C'\fR, \f(CW\*(C`atmega3290a\*(C'\fR, \f(CW\*(C`atmega3290p\*(C'\fR, \f(CW\*(C`atmega3290pa\*(C'\fR, \f(CW\*(C`atmega406\*(C'\fR, \f(CW\*(C`atmega64\*(C'\fR, \f(CW\*(C`atmega64a\*(C'\fR, \f(CW\*(C`atmega64c1\*(C'\fR, \f(CW\*(C`atmega64hve\*(C'\fR, \f(CW\*(C`atmega64hve2\*(C'\fR, \f(CW\*(C`atmega64m1\*(C'\fR, \f(CW\*(C`atmega64rfr2\*(C'\fR, \f(CW\*(C`atmega640\*(C'\fR, \f(CW\*(C`atmega644\*(C'\fR, \f(CW\*(C`atmega644a\*(C'\fR, \f(CW\*(C`atmega644p\*(C'\fR, \f(CW\*(C`atmega644pa\*(C'\fR, \f(CW\*(C`atmega644rfr2\*(C'\fR, \f(CW\*(C`atmega645\*(C'\fR, \f(CW\*(C`atmega645a\*(C'\fR, \f(CW\*(C`atmega645p\*(C'\fR, \f(CW\*(C`atmega649\*(C'\fR, \f(CW\*(C`atmega649a\*(C'\fR, \f(CW\*(C`atmega649p\*(C'\fR, \f(CW\*(C`atmega6450\*(C'\fR, \f(CW\*(C`atmega6450a\*(C'\fR, \f(CW\*(C`atmega6450p\*(C'\fR, \f(CW\*(C`atmega6490\*(C'\fR, \f(CW\*(C`atmega6490a\*(C'\fR, \f(CW\*(C`atmega6490p\*(C'\fR, \f(CW\*(C`ata5790\*(C'\fR, \f(CW\*(C`ata5790n\*(C'\fR, \f(CW\*(C`ata5791\*(C'\fR, \f(CW\*(C`ata6613c\*(C'\fR, \f(CW\*(C`ata6614q\*(C'\fR, \f(CW\*(C`ata5782\*(C'\fR, \f(CW\*(C`ata5831\*(C'\fR, \f(CW\*(C`ata8210\*(C'\fR, \f(CW\*(C`ata8510\*(C'\fR, \f(CW\*(C`ata5787\*(C'\fR, \f(CW\*(C`ata5835\*(C'\fR, \f(CW\*(C`ata5700m322\*(C'\fR, \f(CW\*(C`ata5702m322\*(C'\fR, \f(CW\*(C`at90pwm161\*(C'\fR, \f(CW\*(C`at90pwm216\*(C'\fR, \f(CW\*(C`at90pwm316\*(C'\fR, \f(CW\*(C`at90can32\*(C'\fR, \f(CW\*(C`at90can64\*(C'\fR, \f(CW\*(C`at90scr100\*(C'\fR, \f(CW\*(C`at90usb646\*(C'\fR, \f(CW\*(C`at90usb647\*(C'\fR, \f(CW\*(C`at94k\*(C'\fR, \f(CW\*(C`m3000\*(C'\fR.
  .ie n .IP """avr51""" 4
  .el .IP "\f(CWavr51\fR" 4
  .IX Item "avr51"
*************** The default for this option is \fBavr2\f
*** 20803,20819 ****
  .el .IP "\f(CWavrxmega2\fR" 4
  .IX Item "avrxmega2"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with more than 8 KiB and up to 64 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atxmega8e5\*(C'\fR, \f(CW\*(C`atxmega16a4\*(C'\fR, \f(CW\*(C`atxmega16a4u\*(C'\fR, \f(CW\*(C`atxmega16c4\*(C'\fR, \f(CW\*(C`atxmega16d4\*(C'\fR, \f(CW\*(C`atxmega16e5\*(C'\fR, \f(CW\*(C`atxmega32a4\*(C'\fR, \f(CW\*(C`atxmega32a4u\*(C'\fR, \f(CW\*(C`atxmega32c3\*(C'\fR, \f(CW\*(C`atxmega32c4\*(C'\fR, \f(CW\*(C`atxmega32d3\*(C'\fR, \f(CW\*(C`atxmega32d4\*(C'\fR, \f(CW\*(C`atxmega32e5\*(C'\fR.
  .ie n .IP """avrxmega3""" 4
  .el .IP "\f(CWavrxmega3\fR" 4
  .IX Item "avrxmega3"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with up to 64 KiB of combined program memory and \s-1RAM,\s0 and with program memory visible in the \s-1RAM\s0 address space.
! \&\fImcu\fR = \f(CW\*(C`attiny202\*(C'\fR, \f(CW\*(C`attiny204\*(C'\fR, \f(CW\*(C`attiny212\*(C'\fR, \f(CW\*(C`attiny214\*(C'\fR, \f(CW\*(C`attiny402\*(C'\fR, \f(CW\*(C`attiny404\*(C'\fR, \f(CW\*(C`attiny406\*(C'\fR, \f(CW\*(C`attiny412\*(C'\fR, \f(CW\*(C`attiny414\*(C'\fR, \f(CW\*(C`attiny416\*(C'\fR, \f(CW\*(C`attiny417\*(C'\fR, \f(CW\*(C`attiny804\*(C'\fR, \f(CW\*(C`attiny806\*(C'\fR, \f(CW\*(C`attiny807\*(C'\fR, \f(CW\*(C`attiny814\*(C'\fR, \f(CW\*(C`attiny816\*(C'\fR, \f(CW\*(C`attiny817\*(C'\fR, \f(CW\*(C`attiny1604\*(C'\fR, \f(CW\*(C`attiny1606\*(C'\fR, \f(CW\*(C`attiny1607\*(C'\fR, \f(CW\*(C`attiny1614\*(C'\fR, \f(CW\*(C`attiny1616\*(C'\fR, \f(CW\*(C`attiny1617\*(C'\fR, \f(CW\*(C`attiny3214\*(C'\fR, \f(CW\*(C`attiny3216\*(C'\fR, \f(CW\*(C`attiny3217\*(C'\fR, \f(CW\*(C`atmega808\*(C'\fR, \f(CW\*(C`atmega809\*(C'\fR, \f(CW\*(C`atmega1608\*(C'\fR, \f(CW\*(C`atmega1609\*(C'\fR, \f(CW\*(C`atmega3208\*(C'\fR, \f(CW\*(C`atmega3209\*(C'\fR, \f(CW\*(C`atmega4808\*(C'\fR, \f(CW\*(C`atmega4809\*(C'\fR.
  .ie n .IP """avrxmega4""" 4
  .el .IP "\f(CWavrxmega4\fR" 4
  .IX Item "avrxmega4"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with more than 64 KiB and up to 128 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atxmega64a3\*(C'\fR, \f(CW\*(C`atxmega64a3u\*(C'\fR, \f(CW\*(C`atxmega64a4u\*(C'\fR, \f(CW\*(C`atxmega64b1\*(C'\fR, \f(CW\*(C`atxmega64b3\*(C'\fR, \f(CW\*(C`atxmega64c3\*(C'\fR, \f(CW\*(C`atxmega64d3\*(C'\fR, \f(CW\*(C`atxmega64d4\*(C'\fR.
  .ie n .IP """avrxmega5""" 4
  .el .IP "\f(CWavrxmega5\fR" 4
  .IX Item "avrxmega5"
--- 20809,20825 ----
  .el .IP "\f(CWavrxmega2\fR" 4
  .IX Item "avrxmega2"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with more than 8 KiB and up to 64 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atxmega8e5\*(C'\fR, \f(CW\*(C`atxmega16a4\*(C'\fR, \f(CW\*(C`atxmega16a4u\*(C'\fR, \f(CW\*(C`atxmega16c4\*(C'\fR, \f(CW\*(C`atxmega16d4\*(C'\fR, \f(CW\*(C`atxmega16e5\*(C'\fR, \f(CW\*(C`atxmega32a4\*(C'\fR, \f(CW\*(C`atxmega32a4u\*(C'\fR, \f(CW\*(C`atxmega32c3\*(C'\fR, \f(CW\*(C`atxmega32c4\*(C'\fR, \f(CW\*(C`atxmega32d3\*(C'\fR, \f(CW\*(C`atxmega32d4\*(C'\fR, \f(CW\*(C`atxmega32e5\*(C'\fR, \f(CW\*(C`avr64da28\*(C'\fR, \f(CW\*(C`avr64da32\*(C'\fR, \f(CW\*(C`avr64da48\*(C'\fR, \f(CW\*(C`avr64da64\*(C'\fR, \f(CW\*(C`avr64db28\*(C'\fR, \f(CW\*(C`avr64db32\*(C'\fR, \f(CW\*(C`avr64db48\*(C'\fR, \f(CW\*(C`avr64db64\*(C'\fR, \f(CW\*(C`avr64dd14\*(C'\fR, \f(CW\*(C`avr64dd20\*(C'\fR, \f(CW\*(C`avr64dd28\*(C'\fR, \f(CW\*(C`avr64dd32\*(C'\fR, \f(CW\*(C`avr64du28\*(C'\fR, \f(CW\*(C`avr64du32\*(C'\fR, \f(CW\*(C`avr64ea28\*(C'\fR, \f(CW\*(C`avr64ea32\*(C'\fR, \f(CW\*(C`avr64ea48\*(C'\fR.
  .ie n .IP """avrxmega3""" 4
  .el .IP "\f(CWavrxmega3\fR" 4
  .IX Item "avrxmega3"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with up to 64 KiB of combined program memory and \s-1RAM,\s0 and with program memory visible in the \s-1RAM\s0 address space.
! \&\fImcu\fR = \f(CW\*(C`attiny202\*(C'\fR, \f(CW\*(C`attiny204\*(C'\fR, \f(CW\*(C`attiny212\*(C'\fR, \f(CW\*(C`attiny214\*(C'\fR, \f(CW\*(C`attiny402\*(C'\fR, \f(CW\*(C`attiny404\*(C'\fR, \f(CW\*(C`attiny406\*(C'\fR, \f(CW\*(C`attiny412\*(C'\fR, \f(CW\*(C`attiny414\*(C'\fR, \f(CW\*(C`attiny416\*(C'\fR, \f(CW\*(C`attiny416auto\*(C'\fR, \f(CW\*(C`attiny417\*(C'\fR, \f(CW\*(C`attiny424\*(C'\fR, \f(CW\*(C`attiny426\*(C'\fR, \f(CW\*(C`attiny427\*(C'\fR, \f(CW\*(C`attiny804\*(C'\fR, \f(CW\*(C`attiny806\*(C'\fR, \f(CW\*(C`attiny807\*(C'\fR, \f(CW\*(C`attiny814\*(C'\fR, \f(CW\*(C`attiny816\*(C'\fR, \f(CW\*(C`attiny817\*(C'\fR, \f(CW\*(C`attiny824\*(C'\fR, \f(CW\*(C`attiny826\*(C'\fR, \f(CW\*(C`attiny827\*(C'\fR, \f(CW\*(C`attiny1604\*(C'\fR, \f(CW\*(C`attiny1606\*(C'\fR, \f(CW\*(C`attiny1607\*(C'\fR, \f(CW\*(C`attiny1614\*(C'\fR, \f(CW\*(C`attiny1616\*(C'\fR, \f(CW\*(C`attiny1617\*(C'\fR, \f(CW\*(C`attiny1624\*(C'\fR, \f(CW\*(C`attiny1626\*(C'\fR, \f(CW\*(C`attiny1627\*(C'\fR, \f(CW\*(C`attiny3214\*(C'\fR, \f(CW\*(C`attiny3216\*(C'\fR, \f(CW\*(C`attiny3217\*(C'\fR, \f(CW\*(C`attiny3224\*(C'\fR, \f(CW\*(C`attiny3226\*(C'\fR, \f(CW\*(C`attiny3227\*(C'\fR, \f(CW\*(C`atmega808\*(C'\fR, \f(CW\*(C`atmega809\*(C'\fR, \f(CW\*(C`atmega1608\*(C'\fR, \f(CW\*(C`atmega1609\*(C'\fR, \f(CW\*(C`atmega3208\*(C'\fR, \f(CW\*(C`atmega3209\*(C'\fR, \f(CW\*(C`atmega4808\*(C'\fR, \f(CW\*(C`atmega4809\*(C'\fR, \f(CW\*(C`avr16dd14\*(C'\fR, \f(CW\*(C`avr16dd20\*(C'\fR, \f(CW\*(C`avr16dd28\*(C'\fR, \f(CW\*(C`avr16dd32\*(C'\fR, \f(CW\*(C`avr16du14\*(C'\fR, \f(CW\*(C`avr16du20\*(C'\fR, \f(CW\*(C`avr16du28\*(C'\fR, \f(CW\*(C`avr16du32\*(C'\fR, \f(CW\*(C`avr16ea28\*(C'\fR, \f(CW\*(C`avr16ea32\*(C'\fR, \f(CW\*(C`avr16ea48\*(C'\fR, \f(CW\*(C`avr16eb14\*(C'\fR, \f(CW\*(C`avr16eb20\*(C'\fR, \f(CW\*(C`avr16eb28\*(C'\fR, \f(CW\*(C`avr16eb32\*(C'\fR, \f(CW\*(C`avr32da28\*(C'\fR, \f(CW\*(C`avr32da32\*(C'\fR, \f(CW\*(C`avr32da48\*(C'\fR, \f(CW\*(C`avr32db28\*(C'\fR, \f(CW\*(C`avr32db32\*(C'\fR, \f(CW\*(C`avr32db48\*(C'\fR, \f(CW\*(C`avr32dd14\*(C'\fR, \f(CW\*(C`avr32dd20\*(C'\fR, \f(CW\*(C`avr32dd28\*(C'\fR, \f(CW\*(C`avr32dd32\*(C'\fR, \f(CW\*(C`avr32du14\*(C'\fR, \f(CW\*(C`avr32du20\*(C'\fR, \f(CW\*(C`avr32du28\*(C'\fR, \f(CW\*(C`avr32du32\*(C'\fR, \f(CW\*(C`avr32ea28\*(C'\fR, \f(CW\*(C`avr32ea32\*(C'\fR, \f(CW\*(C`avr32ea48\*(C'\fR.
  .ie n .IP """avrxmega4""" 4
  .el .IP "\f(CWavrxmega4\fR" 4
  .IX Item "avrxmega4"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with more than 64 KiB and up to 128 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atxmega64a3\*(C'\fR, \f(CW\*(C`atxmega64a3u\*(C'\fR, \f(CW\*(C`atxmega64a4u\*(C'\fR, \f(CW\*(C`atxmega64b1\*(C'\fR, \f(CW\*(C`atxmega64b3\*(C'\fR, \f(CW\*(C`atxmega64c3\*(C'\fR, \f(CW\*(C`atxmega64d3\*(C'\fR, \f(CW\*(C`atxmega64d4\*(C'\fR, \f(CW\*(C`avr128da28\*(C'\fR, \f(CW\*(C`avr128da32\*(C'\fR, \f(CW\*(C`avr128da48\*(C'\fR, \f(CW\*(C`avr128da64\*(C'\fR, \f(CW\*(C`avr128db28\*(C'\fR, \f(CW\*(C`avr128db32\*(C'\fR, \f(CW\*(C`avr128db48\*(C'\fR, \f(CW\*(C`avr128db64\*(C'\fR.
  .ie n .IP """avrxmega5""" 4
  .el .IP "\f(CWavrxmega5\fR" 4
  .IX Item "avrxmega5"
*************** The default for this option is \fBavr2\f
*** 20833,20839 ****
  .el .IP "\f(CWavrtiny\fR" 4
  .IX Item "avrtiny"
  \&\*(L"\s-1TINY\*(R"\s0 Tiny core devices with 512 B up to 4 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`attiny4\*(C'\fR, \f(CW\*(C`attiny5\*(C'\fR, \f(CW\*(C`attiny9\*(C'\fR, \f(CW\*(C`attiny10\*(C'\fR, \f(CW\*(C`attiny20\*(C'\fR, \f(CW\*(C`attiny40\*(C'\fR.
  .ie n .IP """avr1""" 4
  .el .IP "\f(CWavr1\fR" 4
  .IX Item "avr1"
--- 20839,20845 ----
  .el .IP "\f(CWavrtiny\fR" 4
  .IX Item "avrtiny"
  \&\*(L"\s-1TINY\*(R"\s0 Tiny core devices with 512 B up to 4 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`attiny4\*(C'\fR, \f(CW\*(C`attiny5\*(C'\fR, \f(CW\*(C`attiny9\*(C'\fR, \f(CW\*(C`attiny10\*(C'\fR, \f(CW\*(C`attiny102\*(C'\fR, \f(CW\*(C`attiny104\*(C'\fR, \f(CW\*(C`attiny20\*(C'\fR, \f(CW\*(C`attiny40\*(C'\fR.
  .ie n .IP """avr1""" 4
  .el .IP "\f(CWavr1\fR" 4
  .IX Item "avr1"
*************** This is by default \s-1ON.\s0
*** 22084,22094 ****
  .IP "\fB\-gfull\fR" 4
  .IX Item "-gfull"
  Emit debugging information for all symbols and types.
  .IP "\fB\-mmacosx\-version\-min=\fR\fIversion\fR" 4
  .IX Item "-mmacosx-version-min=version"
! The earliest version of MacOS X that this executable will run on
! is \fIversion\fR.  Typical values of \fIversion\fR include \f(CW10.1\fR,
! \&\f(CW10.2\fR, and \f(CW10.3.9\fR.
  .Sp
  If the compiler was built to use the system's headers by default,
  then the default for this option is the system version on which the
--- 22090,22108 ----
  .IP "\fB\-gfull\fR" 4
  .IX Item "-gfull"
  Emit debugging information for all symbols and types.
+ .IP "\fB\-fconstant\-cfstrings\fR" 4
+ .IX Item "-fconstant-cfstrings"
+ The \fB\-fconstant\-cfstrings\fR is an alias for \fB\-mconstant\-cfstrings\fR.
+ .IP "\fB\-mconstant\-cfstrings\fR" 4
+ .IX Item "-mconstant-cfstrings"
+ When the NeXT runtime is being used (the default on these systems), override
+ any \fB\-fconstant\-string\-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR
+ literals to be laid out as constant CoreFoundation strings.
  .IP "\fB\-mmacosx\-version\-min=\fR\fIversion\fR" 4
  .IX Item "-mmacosx-version-min=version"
! The earliest version of MacOS X that this executable will run on is
! \&\fIversion\fR.  Typical values supported for \fIversion\fR include \f(CW12\fR,
! \&\f(CW10.12\fR, and \f(CW10.5.8\fR.
  .Sp
  If the compiler was built to use the system's headers by default,
  then the default for this option is the system version on which the
*************** are provided for backwards compatibility
*** 22130,22136 ****
  .IP "\fB\-all_load\fR" 4
  .IX Item "-all_load"
  Loads all members of static archive libraries.
! See man \fIld\fR\|(1) for more information.
  .IP "\fB\-arch_errors_fatal\fR" 4
  .IX Item "-arch_errors_fatal"
  Cause the errors having to do with files that have the wrong architecture
--- 22144,22150 ----
  .IP "\fB\-all_load\fR" 4
  .IX Item "-all_load"
  Loads all members of static archive libraries.
! See man \fBld\fR\|(1) for more information.
  .IP "\fB\-arch_errors_fatal\fR" 4
  .IX Item "-arch_errors_fatal"
  Cause the errors having to do with files that have the wrong architecture
*************** bind all undefined references when the f
*** 22142,22152 ****
  .IP "\fB\-bundle\fR" 4
  .IX Item "-bundle"
  Produce a Mach-o bundle format file.
! See man \fIld\fR\|(1) for more information.
  .IP "\fB\-bundle_loader\fR \fIexecutable\fR" 4
  .IX Item "-bundle_loader executable"
  This option specifies the \fIexecutable\fR that will load the build
! output file being linked.  See man \fIld\fR\|(1) for more information.
  .IP "\fB\-dynamiclib\fR" 4
  .IX Item "-dynamiclib"
  When passed this option, \s-1GCC\s0 produces a dynamic library instead of
--- 22156,22166 ----
  .IP "\fB\-bundle\fR" 4
  .IX Item "-bundle"
  Produce a Mach-o bundle format file.
! See man \fBld\fR\|(1) for more information.
  .IP "\fB\-bundle_loader\fR \fIexecutable\fR" 4
  .IX Item "-bundle_loader executable"
  This option specifies the \fIexecutable\fR that will load the build
! output file being linked.  See man \fBld\fR\|(1) for more information.
  .IP "\fB\-dynamiclib\fR" 4
  .IX Item "-dynamiclib"
  When passed this option, \s-1GCC\s0 produces a dynamic library instead of
*************** global symbol: The data got table must b
*** 23769,23774 ****
--- 23783,23816 ----
  .Sp
  The default code model is \f(CW\*(C`normal\*(C'\fR.
  .RE
+ .IP "\fB\-mrelax\fR" 4
+ .IX Item "-mrelax"
+ .PD 0
+ .IP "\fB\-mno\-relax\fR" 4
+ .IX Item "-mno-relax"
+ .PD
+ Take (do not take) advantage of linker relaxations.  If
+ \&\fB\-mpass\-mrelax\-to\-as\fR is enabled, this option is also passed to
+ the assembler.  The default is determined during \s-1GCC\s0 build-time by
+ detecting corresponding assembler support:
+ \&\fB\-mrelax\fR if the assembler supports both the \fB\-mrelax\fR
+ option and the conditional branch relaxation (it's required or the
+ \&\f(CW\*(C`.align\*(C'\fR directives and conditional branch instructions in the
+ assembly code outputted by \s-1GCC\s0 may be rejected by the assembler because
+ of a relocation overflow), \fB\-mno\-relax\fR otherwise.
+ .IP "\fB\-mpass\-mrelax\-to\-as\fR" 4
+ .IX Item "-mpass-mrelax-to-as"
+ .PD 0
+ .IP "\fB\-mno\-pass\-mrelax\-to\-as\fR" 4
+ .IX Item "-mno-pass-mrelax-to-as"
+ .PD
+ Pass (do not pass) the \fB\-mrelax\fR or \fB\-mno\-relax\fR option
+ to the assembler.  The default is determined during \s-1GCC\s0 build-time by
+ detecting corresponding assembler support:
+ \&\fB\-mpass\-mrelax\-to\-as\fR if the assembler supports the
+ \&\fB\-mrelax\fR option, \fB\-mno\-pass\-mrelax\-to\-as\fR otherwise.
+ This option is mostly useful for debugging, or interoperation with
+ assemblers different from the build-time one.
  .PP
  \fIM32C Options\fR
  .IX Subsection "M32C Options"
*************** libraries assume that extended-precision
*** 31013,31018 ****
--- 31055,31067 ----
  are enabled by default; routines in such libraries could suffer significant
  loss of accuracy, typically through so-called \*(L"catastrophic cancellation\*(R",
  when this option is used to set the precision to less than extended precision.
+ .IP "\fB\-mdaz\-ftz\fR" 4
+ .IX Item "-mdaz-ftz"
+ The flush-to-zero (\s-1FTZ\s0) and denormals-are-zero (\s-1DAZ\s0) flags in the \s-1MXCSR\s0 register
+ are used to control floating-point calculations.SSE and \s-1AVX\s0 instructions
+ including scalar and vector instructions could benefit from enabling the \s-1FTZ\s0
+ and \s-1DAZ\s0 flags when \fB\-mdaz\-ftz\fR is specified. Don't set \s-1FTZ/DAZ\s0 flags
+ when \fB\-mno\-daz\-ftz\fR is specified.
  .IP "\fB\-mstackrealign\fR" 4
  .IX Item "-mstackrealign"
  Realign the stack at entry.  On the x86, the \fB\-mstackrealign\fR
*************** on x86\-64 processors in 64\-bit environ
*** 31925,31931 ****
  Generate code for a 16\-bit, 32\-bit or 64\-bit environment.
  The \fB\-m32\fR option sets \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, and pointer types
  to 32 bits, and
! generates code that runs on any i386 system.
  .Sp
  The \fB\-m64\fR option sets \f(CW\*(C`int\*(C'\fR to 32 bits and \f(CW\*(C`long\*(C'\fR and pointer
  types to 64 bits, and generates code for the x86\-64 architecture.
--- 31974,31980 ----
  Generate code for a 16\-bit, 32\-bit or 64\-bit environment.
  The \fB\-m32\fR option sets \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, and pointer types
  to 32 bits, and
! generates code that runs in 32\-bit mode.
  .Sp
  The \fB\-m64\fR option sets \f(CW\*(C`int\*(C'\fR to 32 bits and \f(CW\*(C`long\*(C'\fR and pointer
  types to 64 bits, and generates code for the x86\-64 architecture.
*************** to subtle defects.  Supplying them in ca
*** 32452,32459 ****
  is innocuous.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
! \&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIdbx\fR\|(1)
  and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIas\fR,
  \&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
  .SH "AUTHOR"
--- 32501,32508 ----
  is innocuous.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fBgpl\fR\|(7), \fBgfdl\fR\|(7), \fBfsf\-funding\fR\|(7),
! \&\fBcpp\fR\|(1), \fBgcov\fR\|(1), \fBas\fR\|(1), \fBld\fR\|(1), \fBgdb\fR\|(1), \fBdbx\fR\|(1)
  and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIas\fR,
  \&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
  .SH "AUTHOR"
*************** any later version published by the Free
*** 32471,32477 ****
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fIgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
--- 32520,32526 ----
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fBgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
diff -Nrcpad gcc-12.3.0/gcc/doc/gcc.info gcc-12.4.0/gcc/doc/gcc.info
*** gcc-12.3.0/gcc/doc/gcc.info	Mon May  8 12:27:50 2023
--- gcc-12.4.0/gcc/doc/gcc.info	Thu Jun 20 08:26:23 2024
***************
*** 1,4 ****
! This is gcc.info, produced by makeinfo version 6.5 from gcc.texi.
  
  Copyright (C) 1988-2022 Free Software Foundation, Inc.
  
--- 1,4 ----
! This is gcc.info, produced by makeinfo version 6.8 from gcc.texi.
  
  Copyright (C) 1988-2022 Free Software Foundation, Inc.
  
*************** Copies published by the Free Software Fo
*** 53,66 ****
  development.
  
  
! File: gcc.info,  Node: Top,  Next: G++ and GCC
  
  Introduction
  ************
  
  This manual documents how to use the GNU compilers, as well as their
  features and incompatibilities, and how to report bugs.  It corresponds
! to the compilers (GCC) version 12.3.0.  The internals of the GNU
  compilers, including how to port them to new targets and some
  information about how to write front ends for new languages, are
  documented in a separate manual.  *Note Introduction: (gccint)Top.
--- 53,66 ----
  development.
  
  
! File: gcc.info,  Node: Top,  Next: G++ and GCC,  Up: (dir)
  
  Introduction
  ************
  
  This manual documents how to use the GNU compilers, as well as their
  features and incompatibilities, and how to report bugs.  It corresponds
! to the compilers (GCC) version 12.4.0.  The internals of the GNU
  compilers, including how to port them to new targets and some
  information about how to write front ends for new languages, are
  documented in a separate manual.  *Note Introduction: (gccint)Top.
*************** _Machine-Dependent Options_
*** 1331,1337 ****
            -mcond-move-float  -mno-cond-move-float
            -memcpy  -mno-memcpy -mstrict-align -mno-strict-align
            -mmax-inline-memcpy-size=N
!           -mcmodel=CODE-MODEL
  
       _M32R/D Options_
            -m32r2  -m32rx  -m32r
--- 1331,1337 ----
            -mcond-move-float  -mno-cond-move-float
            -memcpy  -mno-memcpy -mstrict-align -mno-strict-align
            -mmax-inline-memcpy-size=N
!           -mcmodel=CODE-MODEL -mrelax -mpass-mrelax-to-as
  
       _M32R/D Options_
            -m32r2  -m32rx  -m32r
*************** _Machine-Dependent Options_
*** 1760,1766 ****
            -m96bit-long-double  -mlong-double-64  -mlong-double-80  -mlong-double-128
            -mregparm=NUM  -msseregparm
            -mveclibabi=TYPE  -mvect8-ret-in-mem
!           -mpc32  -mpc64  -mpc80  -mstackrealign
            -momit-leaf-frame-pointer  -mno-red-zone  -mno-tls-direct-seg-refs
            -mcmodel=CODE-MODEL  -mabi=NAME  -maddress-mode=MODE
            -m32  -m64  -mx32  -m16  -miamcu  -mlarge-data-threshold=NUM
--- 1760,1766 ----
            -m96bit-long-double  -mlong-double-64  -mlong-double-80  -mlong-double-128
            -mregparm=NUM  -msseregparm
            -mveclibabi=TYPE  -mvect8-ret-in-mem
!           -mpc32  -mpc64  -mpc80 -mdaz-ftz -mstackrealign
            -momit-leaf-frame-pointer  -mno-red-zone  -mno-tls-direct-seg-refs
            -mcmodel=CODE-MODEL  -mabi=NAME  -maddress-mode=MODE
            -m32  -m64  -mx32  -m16  -miamcu  -mlarge-data-threshold=NUM
*************** Objective-C++ programs:
*** 4400,4408 ****
       literal string specified with the syntax '@"..."'.  The default
       class name is 'NXConstantString' if the GNU runtime is being used,
       and 'NSConstantString' if the NeXT runtime is being used (see
!      below).  The '-fconstant-cfstrings' option, if also present,
!      overrides the '-fconstant-string-class' setting and cause '@"..."'
!      literals to be laid out as constant CoreFoundation strings.
  
  '-fgnu-runtime'
       Generate object code compatible with the standard GNU Objective-C
--- 4400,4411 ----
       literal string specified with the syntax '@"..."'.  The default
       class name is 'NXConstantString' if the GNU runtime is being used,
       and 'NSConstantString' if the NeXT runtime is being used (see
!      below).  On Darwin (macOS, MacOS X) platforms, the
!      '-fconstant-cfstrings' option, if also present, overrides the
!      '-fconstant-string-class' setting and cause '@"..."' literals to be
!      laid out as constant CoreFoundation strings.  Note that
!      '-fconstant-cfstrings' is an alias for the target-specific
!      '-mconstant-cfstrings' equivalent.
  
  '-fgnu-runtime'
       Generate object code compatible with the standard GNU Objective-C
*************** warnings, in some cases it may also caus
*** 6223,6229 ****
  
  '-Wmissing-include-dirs (C, C++, Objective-C, Objective-C++ and Fortran only)'
       Warn if a user-supplied include directory does not exist.  This
!      opions is disabled by default for C, C++, Objective-C and
       Objective-C++.  For Fortran, it is partially enabled by default by
       warning for -I and -J, only.
  
--- 6226,6232 ----
  
  '-Wmissing-include-dirs (C, C++, Objective-C, Objective-C++ and Fortran only)'
       Warn if a user-supplied include directory does not exist.  This
!      option is disabled by default for C, C++, Objective-C and
       Objective-C++.  For Fortran, it is partially enabled by default by
       warning for -I and -J, only.
  
*************** These options are defined for AArch64 im
*** 18052,18058 ****
       'cortex-a73.cortex-a35', 'cortex-a73.cortex-a53',
       'cortex-a75.cortex-a55', 'cortex-a76.cortex-a55', 'cortex-r82',
       'cortex-x1', 'cortex-x2', 'cortex-a510', 'cortex-a710', 'ampere1',
!      'ampere1a', 'native'.
  
       The values 'cortex-a57.cortex-a53', 'cortex-a72.cortex-a53',
       'cortex-a73.cortex-a35', 'cortex-a73.cortex-a53',
--- 18055,18061 ----
       'cortex-a73.cortex-a35', 'cortex-a73.cortex-a53',
       'cortex-a75.cortex-a55', 'cortex-a76.cortex-a55', 'cortex-r82',
       'cortex-x1', 'cortex-x2', 'cortex-a510', 'cortex-a710', 'ampere1',
!      'ampere1a', 'cobalt-100' and 'native'.
  
       The values 'cortex-a57.cortex-a53', 'cortex-a72.cortex-a53',
       'cortex-a73.cortex-a35', 'cortex-a73.cortex-a53',
*************** These options are defined for AVR implem
*** 20158,20163 ****
--- 20161,20167 ----
  
       'avr3'
            "Classic" devices with 16 KiB up to 64 KiB of program memory.
+ 
            MCU = 'at76c711', 'at43usb355'.
  
       'avr31'
*************** These options are defined for AVR implem
*** 20176,20184 ****
            MCU = 'atmega48', 'atmega48a', 'atmega48p', 'atmega48pa',
            'atmega48pb', 'atmega8', 'atmega8a', 'atmega8hva', 'atmega88',
            'atmega88a', 'atmega88p', 'atmega88pa', 'atmega88pb',
!           'atmega8515', 'atmega8535', 'ata6285', 'ata6286', 'ata6289',
!           'ata6612c', 'at90pwm1', 'at90pwm2', 'at90pwm2b', 'at90pwm3',
!           'at90pwm3b', 'at90pwm81'.
  
       'avr5'
            "Enhanced" devices with 16 KiB up to 64 KiB of program memory.
--- 20180,20188 ----
            MCU = 'atmega48', 'atmega48a', 'atmega48p', 'atmega48pa',
            'atmega48pb', 'atmega8', 'atmega8a', 'atmega8hva', 'atmega88',
            'atmega88a', 'atmega88p', 'atmega88pa', 'atmega88pb',
!           'atmega8515', 'atmega8535', 'ata5795', 'ata6285', 'ata6286',
!           'ata6289', 'ata6612c', 'at90pwm1', 'at90pwm2', 'at90pwm2b',
!           'at90pwm3', 'at90pwm3b', 'at90pwm81'.
  
       'avr5'
            "Enhanced" devices with 16 KiB up to 64 KiB of program memory.
*************** These options are defined for AVR implem
*** 20204,20214 ****
            'atmega644rfr2', 'atmega645', 'atmega645a', 'atmega645p',
            'atmega649', 'atmega649a', 'atmega649p', 'atmega6450',
            'atmega6450a', 'atmega6450p', 'atmega6490', 'atmega6490a',
!           'atmega6490p', 'ata5795', 'ata5790', 'ata5790n', 'ata5791',
!           'ata6613c', 'ata6614q', 'ata5782', 'ata5831', 'ata8210',
!           'ata8510', 'ata5702m322', 'at90pwm161', 'at90pwm216',
!           'at90pwm316', 'at90can32', 'at90can64', 'at90scr100',
!           'at90usb646', 'at90usb647', 'at94k', 'm3000'.
  
       'avr51'
            "Enhanced" devices with 128 KiB of program memory.
--- 20208,20219 ----
            'atmega644rfr2', 'atmega645', 'atmega645a', 'atmega645p',
            'atmega649', 'atmega649a', 'atmega649p', 'atmega6450',
            'atmega6450a', 'atmega6450p', 'atmega6490', 'atmega6490a',
!           'atmega6490p', 'ata5790', 'ata5790n', 'ata5791', 'ata6613c',
!           'ata6614q', 'ata5782', 'ata5831', 'ata8210', 'ata8510',
!           'ata5787', 'ata5835', 'ata5700m322', 'ata5702m322',
!           'at90pwm161', 'at90pwm216', 'at90pwm316', 'at90can32',
!           'at90can64', 'at90scr100', 'at90usb646', 'at90usb647',
!           'at94k', 'm3000'.
  
       'avr51'
            "Enhanced" devices with 128 KiB of program memory.
*************** These options are defined for AVR implem
*** 20229,20235 ****
            MCU = 'atxmega8e5', 'atxmega16a4', 'atxmega16a4u',
            'atxmega16c4', 'atxmega16d4', 'atxmega16e5', 'atxmega32a4',
            'atxmega32a4u', 'atxmega32c3', 'atxmega32c4', 'atxmega32d3',
!           'atxmega32d4', 'atxmega32e5'.
  
       'avrxmega3'
            "XMEGA" devices with up to 64 KiB of combined program memory
--- 20234,20244 ----
            MCU = 'atxmega8e5', 'atxmega16a4', 'atxmega16a4u',
            'atxmega16c4', 'atxmega16d4', 'atxmega16e5', 'atxmega32a4',
            'atxmega32a4u', 'atxmega32c3', 'atxmega32c4', 'atxmega32d3',
!           'atxmega32d4', 'atxmega32e5', 'avr64da28', 'avr64da32',
!           'avr64da48', 'avr64da64', 'avr64db28', 'avr64db32',
!           'avr64db48', 'avr64db64', 'avr64dd14', 'avr64dd20',
!           'avr64dd28', 'avr64dd32', 'avr64du28', 'avr64du32',
!           'avr64ea28', 'avr64ea32', 'avr64ea48'.
  
       'avrxmega3'
            "XMEGA" devices with up to 64 KiB of combined program memory
*************** These options are defined for AVR implem
*** 20237,20256 ****
            space.
            MCU = 'attiny202', 'attiny204', 'attiny212', 'attiny214',
            'attiny402', 'attiny404', 'attiny406', 'attiny412',
!           'attiny414', 'attiny416', 'attiny417', 'attiny804',
            'attiny806', 'attiny807', 'attiny814', 'attiny816',
!           'attiny817', 'attiny1604', 'attiny1606', 'attiny1607',
!           'attiny1614', 'attiny1616', 'attiny1617', 'attiny3214',
!           'attiny3216', 'attiny3217', 'atmega808', 'atmega809',
!           'atmega1608', 'atmega1609', 'atmega3208', 'atmega3209',
!           'atmega4808', 'atmega4809'.
  
       'avrxmega4'
            "XMEGA" devices with more than 64 KiB and up to 128 KiB of
            program memory.
            MCU = 'atxmega64a3', 'atxmega64a3u', 'atxmega64a4u',
            'atxmega64b1', 'atxmega64b3', 'atxmega64c3', 'atxmega64d3',
!           'atxmega64d4'.
  
       'avrxmega5'
            "XMEGA" devices with more than 64 KiB and up to 128 KiB of
--- 20246,20278 ----
            space.
            MCU = 'attiny202', 'attiny204', 'attiny212', 'attiny214',
            'attiny402', 'attiny404', 'attiny406', 'attiny412',
!           'attiny414', 'attiny416', 'attiny416auto', 'attiny417',
!           'attiny424', 'attiny426', 'attiny427', 'attiny804',
            'attiny806', 'attiny807', 'attiny814', 'attiny816',
!           'attiny817', 'attiny824', 'attiny826', 'attiny827',
!           'attiny1604', 'attiny1606', 'attiny1607', 'attiny1614',
!           'attiny1616', 'attiny1617', 'attiny1624', 'attiny1626',
!           'attiny1627', 'attiny3214', 'attiny3216', 'attiny3217',
!           'attiny3224', 'attiny3226', 'attiny3227', 'atmega808',
!           'atmega809', 'atmega1608', 'atmega1609', 'atmega3208',
!           'atmega3209', 'atmega4808', 'atmega4809', 'avr16dd14',
!           'avr16dd20', 'avr16dd28', 'avr16dd32', 'avr16du14',
!           'avr16du20', 'avr16du28', 'avr16du32', 'avr16ea28',
!           'avr16ea32', 'avr16ea48', 'avr16eb14', 'avr16eb20',
!           'avr16eb28', 'avr16eb32', 'avr32da28', 'avr32da32',
!           'avr32da48', 'avr32db28', 'avr32db32', 'avr32db48',
!           'avr32dd14', 'avr32dd20', 'avr32dd28', 'avr32dd32',
!           'avr32du14', 'avr32du20', 'avr32du28', 'avr32du32',
!           'avr32ea28', 'avr32ea32', 'avr32ea48'.
  
       'avrxmega4'
            "XMEGA" devices with more than 64 KiB and up to 128 KiB of
            program memory.
            MCU = 'atxmega64a3', 'atxmega64a3u', 'atxmega64a4u',
            'atxmega64b1', 'atxmega64b3', 'atxmega64c3', 'atxmega64d3',
!           'atxmega64d4', 'avr128da28', 'avr128da32', 'avr128da48',
!           'avr128da64', 'avr128db28', 'avr128db32', 'avr128db48',
!           'avr128db64'.
  
       'avrxmega5'
            "XMEGA" devices with more than 64 KiB and up to 128 KiB of
*************** These options are defined for AVR implem
*** 20275,20282 ****
       'avrtiny'
            "TINY" Tiny core devices with 512 B up to 4 KiB of program
            memory.
!           MCU = 'attiny4', 'attiny5', 'attiny9', 'attiny10', 'attiny20',
!           'attiny40'.
  
       'avr1'
            This ISA is implemented by the minimal AVR core and supported
--- 20297,20304 ----
       'avrtiny'
            "TINY" Tiny core devices with 512 B up to 4 KiB of program
            memory.
!           MCU = 'attiny4', 'attiny5', 'attiny9', 'attiny10',
!           'attiny102', 'attiny104', 'attiny20', 'attiny40'.
  
       'avr1'
            This ISA is implemented by the minimal AVR core and supported
*************** executable the most restrictive subtype
*** 21341,21350 ****
  '-gfull'
       Emit debugging information for all symbols and types.
  
  '-mmacosx-version-min=VERSION'
       The earliest version of MacOS X that this executable will run on is
!      VERSION.  Typical values of VERSION include '10.1', '10.2', and
!      '10.3.9'.
  
       If the compiler was built to use the system's headers by default,
       then the default for this option is the system version on which the
--- 21363,21380 ----
  '-gfull'
       Emit debugging information for all symbols and types.
  
+ '-fconstant-cfstrings'
+      The '-fconstant-cfstrings' is an alias for '-mconstant-cfstrings'.
+ 
+ '-mconstant-cfstrings'
+      When the NeXT runtime is being used (the default on these systems),
+      override any '-fconstant-string-class' setting and cause '@"..."'
+      literals to be laid out as constant CoreFoundation strings.
+ 
  '-mmacosx-version-min=VERSION'
       The earliest version of MacOS X that this executable will run on is
!      VERSION.  Typical values supported for VERSION include '12',
!      '10.12', and '10.5.8'.
  
       If the compiler was built to use the system's headers by default,
       then the default for this option is the system version on which the
*************** These command-line options are defined f
*** 22842,22847 ****
--- 22872,22899 ----
                 addressing space.
       The default code model is 'normal'.
  
+ '-mrelax'
+ '-mno-relax'
+      Take (do not take) advantage of linker relaxations.  If
+      '-mpass-mrelax-to-as' is enabled, this option is also passed to the
+      assembler.  The default is determined during GCC build-time by
+      detecting corresponding assembler support: '-mrelax' if the
+      assembler supports both the '-mrelax' option and the conditional
+      branch relaxation (it's required or the '.align' directives and
+      conditional branch instructions in the assembly code outputted by
+      GCC may be rejected by the assembler because of a relocation
+      overflow), '-mno-relax' otherwise.
+ 
+ '-mpass-mrelax-to-as'
+ '-mno-pass-mrelax-to-as'
+      Pass (do not pass) the '-mrelax' or '-mno-relax' option to the
+      assembler.  The default is determined during GCC build-time by
+      detecting corresponding assembler support: '-mpass-mrelax-to-as' if
+      the assembler supports the '-mrelax' option,
+      '-mno-pass-mrelax-to-as' otherwise.  This option is mostly useful
+      for debugging, or interoperation with assemblers different from the
+      build-time one.
+ 
  
  File: gcc.info,  Node: M32C Options,  Next: M32R/D Options,  Prev: LoongArch Options,  Up: Submodel Options
  
*************** These '-m' options are defined for the x
*** 29285,29290 ****
--- 29337,29351 ----
       through so-called "catastrophic cancellation", when this option is
       used to set the precision to less than extended precision.
  
+ '-mdaz-ftz'
+ 
+      The flush-to-zero (FTZ) and denormals-are-zero (DAZ) flags in the
+      MXCSR register are used to control floating-point calculations.SSE
+      and AVX instructions including scalar and vector instructions could
+      benefit from enabling the FTZ and DAZ flags when '-mdaz-ftz' is
+      specified.  Don't set FTZ/DAZ flags when '-mno-daz-ftz' is
+      specified.
+ 
  '-mstackrealign'
       Realign the stack at entry.  On the x86, the '-mstackrealign'
       option generates an alternate prologue and epilogue that realigns
*************** processors in 64-bit environments.
*** 30047,30053 ****
  '-miamcu'
       Generate code for a 16-bit, 32-bit or 64-bit environment.  The
       '-m32' option sets 'int', 'long', and pointer types to 32 bits, and
!      generates code that runs on any i386 system.
  
       The '-m64' option sets 'int' to 32 bits and 'long' and pointer
       types to 64 bits, and generates code for the x86-64 architecture.
--- 30108,30114 ----
  '-miamcu'
       Generate code for a 16-bit, 32-bit or 64-bit environment.  The
       '-m32' option sets 'int', 'long', and pointer types to 32 bits, and
!      generates code that runs in 32-bit mode.
  
       The '-m64' option sets 'int' to 32 bits and 'long' and pointer
       types to 64 bits, and generates code for the x86-64 architecture.
*************** instructions, but allow the compiler to
*** 47483,47488 ****
--- 47544,47550 ----
  * Blackfin Built-in Functions::
  * BPF Built-in Functions::
  * FR-V Built-in Functions::
+ * LoongArch Base Built-in Functions::
  * MIPS DSP Built-in Functions::
  * MIPS Paired-Single Support::
  * MIPS Loongson Built-in Functions::
*************** The following built-in functions are ava
*** 48403,48409 ****
       if '-mco-re' is not in effect (either specified or implied).
  
  
! File: gcc.info,  Node: FR-V Built-in Functions,  Next: MIPS DSP Built-in Functions,  Prev: BPF Built-in Functions,  Up: Target Builtins
  
  6.60.13 FR-V Built-in Functions
  -------------------------------
--- 48465,48471 ----
       if '-mco-re' is not in effect (either specified or implied).
  
  
! File: gcc.info,  Node: FR-V Built-in Functions,  Next: LoongArch Base Built-in Functions,  Prev: BPF Built-in Functions,  Up: Target Builtins
  
  6.60.13 FR-V Built-in Functions
  -------------------------------
*************** specific FR-V instruction.
*** 48690,48698 ****
       the data cache.  The instruction is issued in slot I1.
  
  
! File: gcc.info,  Node: MIPS DSP Built-in Functions,  Next: MIPS Paired-Single Support,  Prev: FR-V Built-in Functions,  Up: Target Builtins
  
! 6.60.14 MIPS DSP Built-in Functions
  -----------------------------------
  
  The MIPS DSP Application-Specific Extension (ASE) includes new
--- 48752,48885 ----
       the data cache.  The instruction is issued in slot I1.
  
  
! File: gcc.info,  Node: LoongArch Base Built-in Functions,  Next: MIPS DSP Built-in Functions,  Prev: FR-V Built-in Functions,  Up: Target Builtins
  
! 6.60.14 LoongArch Base Built-in Functions
! -----------------------------------------
! 
! These built-in functions are available for LoongArch.
! 
!  Data Type Description:
!    * 'imm0_31', a compile-time constant in range 0 to 31;
!    * 'imm0_16383', a compile-time constant in range 0 to 16383;
!    * 'imm0_32767', a compile-time constant in range 0 to 32767;
!    * 'imm_n2048_2047', a compile-time constant in range -2048 to 2047;
! 
!  The intrinsics provided are listed below:
!          unsigned int __builtin_loongarch_movfcsr2gr (imm0_31)
!          void __builtin_loongarch_movgr2fcsr (imm0_31, unsigned int)
!          void __builtin_loongarch_cacop_d (imm0_31, unsigned long int, imm_n2048_2047)
!          unsigned int __builtin_loongarch_cpucfg (unsigned int)
!          void __builtin_loongarch_asrtle_d (long int, long int)
!          void __builtin_loongarch_asrtgt_d (long int, long int)
!          long int __builtin_loongarch_lddir_d (long int, imm0_31)
!          void __builtin_loongarch_ldpte_d (long int, imm0_31)
! 
!          int __builtin_loongarch_crc_w_b_w (char, int)
!          int __builtin_loongarch_crc_w_h_w (short, int)
!          int __builtin_loongarch_crc_w_w_w (int, int)
!          int __builtin_loongarch_crc_w_d_w (long int, int)
!          int __builtin_loongarch_crcc_w_b_w (char, int)
!          int __builtin_loongarch_crcc_w_h_w (short, int)
!          int __builtin_loongarch_crcc_w_w_w (int, int)
!          int __builtin_loongarch_crcc_w_d_w (long int, int)
! 
!          unsigned int __builtin_loongarch_csrrd_w (imm0_16383)
!          unsigned int __builtin_loongarch_csrwr_w (unsigned int, imm0_16383)
!          unsigned int __builtin_loongarch_csrxchg_w (unsigned int, unsigned int, imm0_16383)
!          unsigned long int __builtin_loongarch_csrrd_d (imm0_16383)
!          unsigned long int __builtin_loongarch_csrwr_d (unsigned long int, imm0_16383)
!          unsigned long int __builtin_loongarch_csrxchg_d (unsigned long int, unsigned long int, imm0_16383)
! 
!          unsigned char __builtin_loongarch_iocsrrd_b (unsigned int)
!          unsigned short __builtin_loongarch_iocsrrd_h (unsigned int)
!          unsigned int __builtin_loongarch_iocsrrd_w (unsigned int)
!          unsigned long int __builtin_loongarch_iocsrrd_d (unsigned int)
!          void __builtin_loongarch_iocsrwr_b (unsigned char, unsigned int)
!          void __builtin_loongarch_iocsrwr_h (unsigned short, unsigned int)
!          void __builtin_loongarch_iocsrwr_w (unsigned int, unsigned int)
!          void __builtin_loongarch_iocsrwr_d (unsigned long int, unsigned int)
! 
!          void __builtin_loongarch_dbar (imm0_32767)
!          void __builtin_loongarch_ibar (imm0_32767)
! 
!          void __builtin_loongarch_syscall (imm0_32767)
!          void __builtin_loongarch_break (imm0_32767)
! 
!  _Note:_Since the control register is divided into 32-bit and 64-bit,
! but the access instruction is not distinguished.  So GCC renames the
! control instructions when implementing intrinsics.
! 
!  Take the csrrd instruction as an example, built-in functions are
! implemented as follows:
!        __builtin_loongarch_csrrd_w  // When reading the 32-bit control register use.
!        __builtin_loongarch_csrrd_d  // When reading the 64-bit control register use.
! 
!  For the convenience of use, the built-in functions are encapsulated,
! the encapsulated functions and '__drdtime_t, __rdtime_t' are defined in
! the 'larchintrin.h'.  So if you call the following function you need to
! include 'larchintrin.h'.
! 
!           typedef struct drdtime{
!                  unsigned long dvalue;
!                  unsigned long dtimeid;
!           } __drdtime_t;
! 
!           typedef struct rdtime{
!                  unsigned int value;
!                  unsigned int timeid;
!           } __rdtime_t;
! 
!          __drdtime_t __rdtime_d (void)
!          __rdtime_t  __rdtimel_w (void)
!          __rdtime_t  __rdtimeh_w (void)
!          unsigned int  __movfcsr2gr (imm0_31)
!          void __movgr2fcsr (imm0_31, unsigned int)
!          void __cacop_d (imm0_31, unsigned long, imm_n2048_2047)
!          unsigned int  __cpucfg (unsigned int)
!          void __asrtle_d (long int, long int)
!          void __asrtgt_d (long int, long int)
!          long int  __lddir_d (long int, imm0_31)
!          void __ldpte_d (long int, imm0_31)
! 
!          int  __crc_w_b_w (char, int)
!          int  __crc_w_h_w (short, int)
!          int  __crc_w_w_w (int, int)
!          int  __crc_w_d_w (long int, int)
!          int  __crcc_w_b_w (char, int)
!          int  __crcc_w_h_w (short, int)
!          int  __crcc_w_w_w (int, int)
!          int  __crcc_w_d_w (long int, int)
! 
!          unsigned int  __csrrd_w (imm0_16383)
!          unsigned int  __csrwr_w (unsigned int, imm0_16383)
!          unsigned int  __csrxchg_w (unsigned int, unsigned int, imm0_16383)
!          unsigned long  __csrrd_d (imm0_16383)
!          unsigned long  __csrwr_d (unsigned long, imm0_16383)
!          unsigned long  __csrxchg_d (unsigned long, unsigned long, imm0_16383)
! 
!          unsigned char   __iocsrrd_b (unsigned int)
!          unsigned short  __iocsrrd_h (unsigned int)
!          unsigned int  __iocsrrd_w (unsigned int)
!          unsigned long  __iocsrrd_d (unsigned int)
!          void __iocsrwr_b (unsigned char, unsigned int)
!          void __iocsrwr_h (unsigned short, unsigned int)
!          void __iocsrwr_w (unsigned int, unsigned int)
!          void __iocsrwr_d (unsigned long, unsigned int)
! 
!          void __dbar (imm0_32767)
!          void __ibar (imm0_32767)
! 
!          void __syscall (imm0_32767)
!          void __break (imm0_32767)
! 
!  Returns the value that is currently set in the 'tp' register.
!          void * __builtin_thread_pointer (void)
! 
! 
! File: gcc.info,  Node: MIPS DSP Built-in Functions,  Next: MIPS Paired-Single Support,  Prev: LoongArch Base Built-in Functions,  Up: Target Builtins
! 
! 6.60.15 MIPS DSP Built-in Functions
  -----------------------------------
  
  The MIPS DSP Application-Specific Extension (ASE) includes new
*************** details on what each instruction does.
*** 48967,48973 ****
  
  File: gcc.info,  Node: MIPS Paired-Single Support,  Next: MIPS Loongson Built-in Functions,  Prev: MIPS DSP Built-in Functions,  Up: Target Builtins
  
! 6.60.15 MIPS Paired-Single Support
  ----------------------------------
  
  The MIPS64 architecture includes a number of instructions that operate
--- 49154,49160 ----
  
  File: gcc.info,  Node: MIPS Paired-Single Support,  Next: MIPS Loongson Built-in Functions,  Prev: MIPS DSP Built-in Functions,  Up: Target Builtins
  
! 6.60.16 MIPS Paired-Single Support
  ----------------------------------
  
  The MIPS64 architecture includes a number of instructions that operate
*************** targets.  For example, the code above se
*** 49003,49009 ****
  
  File: gcc.info,  Node: MIPS Loongson Built-in Functions,  Next: MIPS SIMD Architecture (MSA) Support,  Prev: MIPS Paired-Single Support,  Up: Target Builtins
  
! 6.60.16 MIPS Loongson Built-in Functions
  ----------------------------------------
  
  GCC provides intrinsics to access the SIMD instructions provided by the
--- 49190,49196 ----
  
  File: gcc.info,  Node: MIPS Loongson Built-in Functions,  Next: MIPS SIMD Architecture (MSA) Support,  Prev: MIPS Paired-Single Support,  Up: Target Builtins
  
! 6.60.17 MIPS Loongson Built-in Functions
  ----------------------------------------
  
  GCC provides intrinsics to access the SIMD instructions provided by the
*************** each instruction.
*** 49134,49140 ****
  
  File: gcc.info,  Node: Paired-Single Arithmetic,  Next: Paired-Single Built-in Functions,  Up: MIPS Loongson Built-in Functions
  
! 6.60.16.1 Paired-Single Arithmetic
  ..................................
  
  The table below lists the 'v2sf' operations for which hardware support
--- 49321,49327 ----
  
  File: gcc.info,  Node: Paired-Single Arithmetic,  Next: Paired-Single Built-in Functions,  Up: MIPS Loongson Built-in Functions
  
! 6.60.17.1 Paired-Single Arithmetic
  ..................................
  
  The table below lists the 'v2sf' operations for which hardware support
*************** the command-line option '-mno-fused-madd
*** 49159,49165 ****
  
  File: gcc.info,  Node: Paired-Single Built-in Functions,  Next: MIPS-3D Built-in Functions,  Prev: Paired-Single Arithmetic,  Up: MIPS Loongson Built-in Functions
  
! 6.60.16.2 Paired-Single Built-in Functions
  ..........................................
  
  The following paired-single functions map directly to a particular MIPS
--- 49346,49352 ----
  
  File: gcc.info,  Node: Paired-Single Built-in Functions,  Next: MIPS-3D Built-in Functions,  Prev: Paired-Single Arithmetic,  Up: MIPS Loongson Built-in Functions
  
! 6.60.17.2 Paired-Single Built-in Functions
  ..........................................
  
  The following paired-single functions map directly to a particular MIPS
*************** case, COND can be any of the 16 floating
*** 49238,49244 ****
  
  File: gcc.info,  Node: MIPS-3D Built-in Functions,  Prev: Paired-Single Built-in Functions,  Up: MIPS Loongson Built-in Functions
  
! 6.60.16.3 MIPS-3D Built-in Functions
  ....................................
  
  The MIPS-3D Application-Specific Extension (ASE) includes additional
--- 49425,49431 ----
  
  File: gcc.info,  Node: MIPS-3D Built-in Functions,  Prev: Paired-Single Built-in Functions,  Up: MIPS Loongson Built-in Functions
  
! 6.60.17.3 MIPS-3D Built-in Functions
  ....................................
  
  The MIPS-3D Application-Specific Extension (ASE) includes additional
*************** case, COND can be any of the 16 floating
*** 49386,49392 ****
  
  File: gcc.info,  Node: MIPS SIMD Architecture (MSA) Support,  Next: Other MIPS Built-in Functions,  Prev: MIPS Loongson Built-in Functions,  Up: Target Builtins
  
! 6.60.17 MIPS SIMD Architecture (MSA) Support
  --------------------------------------------
  
  * Menu:
--- 49573,49579 ----
  
  File: gcc.info,  Node: MIPS SIMD Architecture (MSA) Support,  Next: Other MIPS Built-in Functions,  Prev: MIPS Loongson Built-in Functions,  Up: Target Builtins
  
! 6.60.18 MIPS SIMD Architecture (MSA) Support
  --------------------------------------------
  
  * Menu:
*************** restrictions and/or input/output values
*** 49456,49462 ****
  
  File: gcc.info,  Node: MIPS SIMD Architecture Built-in Functions,  Up: MIPS SIMD Architecture (MSA) Support
  
! 6.60.17.1 MIPS SIMD Architecture Built-in Functions
  ...................................................
  
  The intrinsics provided are listed below; each is named after the
--- 49643,49649 ----
  
  File: gcc.info,  Node: MIPS SIMD Architecture Built-in Functions,  Up: MIPS SIMD Architecture (MSA) Support
  
! 6.60.18.1 MIPS SIMD Architecture Built-in Functions
  ...................................................
  
  The intrinsics provided are listed below; each is named after the
*************** machine instruction.
*** 50173,50179 ****
  
  File: gcc.info,  Node: Other MIPS Built-in Functions,  Next: MSP430 Built-in Functions,  Prev: MIPS SIMD Architecture (MSA) Support,  Up: Target Builtins
  
! 6.60.18 Other MIPS Built-in Functions
  -------------------------------------
  
  GCC provides other MIPS-specific built-in functions:
--- 50360,50366 ----
  
  File: gcc.info,  Node: Other MIPS Built-in Functions,  Next: MSP430 Built-in Functions,  Prev: MIPS SIMD Architecture (MSA) Support,  Up: Target Builtins
  
! 6.60.19 Other MIPS Built-in Functions
  -------------------------------------
  
  GCC provides other MIPS-specific built-in functions:
*************** GCC provides other MIPS-specific built-i
*** 50197,50203 ****
  
  File: gcc.info,  Node: MSP430 Built-in Functions,  Next: NDS32 Built-in Functions,  Prev: Other MIPS Built-in Functions,  Up: Target Builtins
  
! 6.60.19 MSP430 Built-in Functions
  ---------------------------------
  
  GCC provides a couple of special builtin functions to aid in the writing
--- 50384,50390 ----
  
  File: gcc.info,  Node: MSP430 Built-in Functions,  Next: NDS32 Built-in Functions,  Prev: Other MIPS Built-in Functions,  Up: Target Builtins
  
! 6.60.20 MSP430 Built-in Functions
  ---------------------------------
  
  GCC provides a couple of special builtin functions to aid in the writing
*************** of interrupt handlers in C.
*** 50227,50233 ****
  
  File: gcc.info,  Node: NDS32 Built-in Functions,  Next: picoChip Built-in Functions,  Prev: MSP430 Built-in Functions,  Up: Target Builtins
  
! 6.60.20 NDS32 Built-in Functions
  --------------------------------
  
  These built-in functions are available for the NDS32 target:
--- 50414,50420 ----
  
  File: gcc.info,  Node: NDS32 Built-in Functions,  Next: picoChip Built-in Functions,  Prev: MSP430 Built-in Functions,  Up: Target Builtins
  
! 6.60.21 NDS32 Built-in Functions
  --------------------------------
  
  These built-in functions are available for the NDS32 target:
*************** These built-in functions are available f
*** 50260,50266 ****
  
  File: gcc.info,  Node: picoChip Built-in Functions,  Next: Basic PowerPC Built-in Functions,  Prev: NDS32 Built-in Functions,  Up: Target Builtins
  
! 6.60.21 picoChip Built-in Functions
  -----------------------------------
  
  GCC provides an interface to selected machine instructions from the
--- 50447,50453 ----
  
  File: gcc.info,  Node: picoChip Built-in Functions,  Next: Basic PowerPC Built-in Functions,  Prev: NDS32 Built-in Functions,  Up: Target Builtins
  
! 6.60.22 picoChip Built-in Functions
  -----------------------------------
  
  GCC provides an interface to selected machine instructions from the
*************** picoChip instruction set.
*** 50296,50302 ****
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions,  Next: PowerPC AltiVec/VSX Built-in Functions,  Prev: picoChip Built-in Functions,  Up: Target Builtins
  
! 6.60.22 Basic PowerPC Built-in Functions
  ----------------------------------------
  
  * Menu:
--- 50483,50489 ----
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions,  Next: PowerPC AltiVec/VSX Built-in Functions,  Prev: picoChip Built-in Functions,  Up: Target Builtins
  
! 6.60.23 Basic PowerPC Built-in Functions
  ----------------------------------------
  
  * Menu:
*************** PowerPC built-in functions.
*** 50316,50322 ****
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on all Configurations,  Next: Basic PowerPC Built-in Functions Available on ISA 2.05,  Up: Basic PowerPC Built-in Functions
  
! 6.60.22.1 Basic PowerPC Built-in Functions Available on all Configurations
  ..........................................................................
  
   -- Built-in Function: void __builtin_cpu_init (void)
--- 50503,50509 ----
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on all Configurations,  Next: Basic PowerPC Built-in Functions Available on ISA 2.05,  Up: Basic PowerPC Built-in Functions
  
! 6.60.23.1 Basic PowerPC Built-in Functions Available on all Configurations
  ..........................................................................
  
   -- Built-in Function: void __builtin_cpu_init (void)
*************** value.
*** 50541,50547 ****
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 2.05,  Next: Basic PowerPC Built-in Functions Available on ISA 2.06,  Prev: Basic PowerPC Built-in Functions Available on all Configurations,  Up: Basic PowerPC Built-in Functions
  
! 6.60.22.2 Basic PowerPC Built-in Functions Available on ISA 2.05
  ................................................................
  
  The basic built-in functions described in this section are available on
--- 50728,50734 ----
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 2.05,  Next: Basic PowerPC Built-in Functions Available on ISA 2.06,  Prev: Basic PowerPC Built-in Functions Available on all Configurations,  Up: Basic PowerPC Built-in Functions
  
! 6.60.23.2 Basic PowerPC Built-in Functions Available on ISA 2.05
  ................................................................
  
  The basic built-in functions described in this section are available on
*************** family of processors, for efficient use
*** 50639,50645 ****
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 2.06,  Next: Basic PowerPC Built-in Functions Available on ISA 2.07,  Prev: Basic PowerPC Built-in Functions Available on ISA 2.05,  Up: Basic PowerPC Built-in Functions
  
! 6.60.22.3 Basic PowerPC Built-in Functions Available on ISA 2.06
  ................................................................
  
  The basic built-in functions described in this section are available on
--- 50826,50832 ----
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 2.06,  Next: Basic PowerPC Built-in Functions Available on ISA 2.07,  Prev: Basic PowerPC Built-in Functions Available on ISA 2.05,  Up: Basic PowerPC Built-in Functions
  
! 6.60.23.3 Basic PowerPC Built-in Functions Available on ISA 2.06
  ................................................................
  
  The basic built-in functions described in this section are available on
*************** targets, require '-mfloat128'.
*** 50680,50686 ****
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 2.07,  Next: Basic PowerPC Built-in Functions Available on ISA 3.0,  Prev: Basic PowerPC Built-in Functions Available on ISA 2.06,  Up: Basic PowerPC Built-in Functions
  
! 6.60.22.4 Basic PowerPC Built-in Functions Available on ISA 2.07
  ................................................................
  
  The basic built-in functions described in this section are available on
--- 50867,50873 ----
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 2.07,  Next: Basic PowerPC Built-in Functions Available on ISA 3.0,  Prev: Basic PowerPC Built-in Functions Available on ISA 2.06,  Up: Basic PowerPC Built-in Functions
  
! 6.60.23.4 Basic PowerPC Built-in Functions Available on ISA 2.07
  ................................................................
  
  The basic built-in functions described in this section are available on
*************** options as for '-mcpu=power7' in additio
*** 50696,50702 ****
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 3.0,  Next: Basic PowerPC Built-in Functions Available on ISA 3.1,  Prev: Basic PowerPC Built-in Functions Available on ISA 2.07,  Up: Basic PowerPC Built-in Functions
  
! 6.60.22.5 Basic PowerPC Built-in Functions Available on ISA 3.0
  ...............................................................
  
  The basic built-in functions described in this section are available on
--- 50883,50889 ----
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 3.0,  Next: Basic PowerPC Built-in Functions Available on ISA 3.1,  Prev: Basic PowerPC Built-in Functions Available on ISA 2.07,  Up: Basic PowerPC Built-in Functions
  
! 6.60.23.5 Basic PowerPC Built-in Functions Available on ISA 3.0
  ...............................................................
  
  The basic built-in functions described in this section are available on
*************** builtin uses the older 'mffs' instructio
*** 50830,50836 ****
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 3.1,  Prev: Basic PowerPC Built-in Functions Available on ISA 3.0,  Up: Basic PowerPC Built-in Functions
  
! 6.60.22.6 Basic PowerPC Built-in Functions Available on ISA 3.1
  ...............................................................
  
  The basic built-in functions described in this section are available on
--- 51017,51023 ----
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 3.1,  Prev: Basic PowerPC Built-in Functions Available on ISA 3.0,  Up: Basic PowerPC Built-in Functions
  
! 6.60.23.6 Basic PowerPC Built-in Functions Available on ISA 3.1
  ...............................................................
  
  The basic built-in functions described in this section are available on
*************** instructions.
*** 50909,50915 ****
  
  File: gcc.info,  Node: PowerPC AltiVec/VSX Built-in Functions,  Next: PowerPC Hardware Transactional Memory Built-in Functions,  Prev: Basic PowerPC Built-in Functions,  Up: Target Builtins
  
! 6.60.23 PowerPC AltiVec/VSX Built-in Functions
  ----------------------------------------------
  
  GCC provides an interface for the PowerPC family of processors to access
--- 51096,51102 ----
  
  File: gcc.info,  Node: PowerPC AltiVec/VSX Built-in Functions,  Next: PowerPC Hardware Transactional Memory Built-in Functions,  Prev: Basic PowerPC Built-in Functions,  Up: Target Builtins
  
! 6.60.24 PowerPC AltiVec/VSX Built-in Functions
  ----------------------------------------------
  
  GCC provides an interface for the PowerPC family of processors to access
*************** same capabilities should be considered d
*** 51075,51081 ****
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions on ISA 2.05,  Next: PowerPC AltiVec Built-in Functions Available on ISA 2.06,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.23.1 PowerPC AltiVec Built-in Functions on ISA 2.05
  ........................................................
  
  The following interfaces are supported for the generic and specific
--- 51262,51268 ----
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions on ISA 2.05,  Next: PowerPC AltiVec Built-in Functions Available on ISA 2.06,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.24.1 PowerPC AltiVec Built-in Functions on ISA 2.05
  ........................................................
  
  The following interfaces are supported for the generic and specific
*************** values within the range required for tha
*** 51557,51563 ****
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions Available on ISA 2.06,  Next: PowerPC AltiVec Built-in Functions Available on ISA 2.07,  Prev: PowerPC AltiVec Built-in Functions on ISA 2.05,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.23.2 PowerPC AltiVec Built-in Functions Available on ISA 2.06
  ..................................................................
  
  The AltiVec built-in functions described in this section are available
--- 51744,51750 ----
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions Available on ISA 2.06,  Next: PowerPC AltiVec Built-in Functions Available on ISA 2.07,  Prev: PowerPC AltiVec Built-in Functions on ISA 2.05,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.24.2 PowerPC AltiVec Built-in Functions Available on ISA 2.06
  ..................................................................
  
  The AltiVec built-in functions described in this section are available
*************** instructions.
*** 51686,51692 ****
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions Available on ISA 2.07,  Next: PowerPC AltiVec Built-in Functions Available on ISA 3.0,  Prev: PowerPC AltiVec Built-in Functions Available on ISA 2.06,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.23.3 PowerPC AltiVec Built-in Functions Available on ISA 2.07
  ..................................................................
  
  If the ISA 2.07 additions to the vector/scalar (power8-vector)
--- 51873,51879 ----
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions Available on ISA 2.07,  Next: PowerPC AltiVec Built-in Functions Available on ISA 3.0,  Prev: PowerPC AltiVec Built-in Functions Available on ISA 2.06,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.24.3 PowerPC AltiVec Built-in Functions Available on ISA 2.07
  ..................................................................
  
  If the ISA 2.07 additions to the vector/scalar (power8-vector)
*************** and VECTOR __UINT128 types, but the inde
*** 51875,51881 ****
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions Available on ISA 3.0,  Next: PowerPC AltiVec Built-in Functions Available on ISA 3.1,  Prev: PowerPC AltiVec Built-in Functions Available on ISA 2.07,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.23.4 PowerPC AltiVec Built-in Functions Available on ISA 3.0
  .................................................................
  
  The following additional built-in functions are also available for the
--- 52062,52068 ----
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions Available on ISA 3.0,  Next: PowerPC AltiVec Built-in Functions Available on ISA 3.1,  Prev: PowerPC AltiVec Built-in Functions Available on ISA 2.07,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.24.4 PowerPC AltiVec Built-in Functions Available on ISA 3.0
  .................................................................
  
  The following additional built-in functions are also available for the
*************** doubleword.
*** 52186,52192 ****
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions Available on ISA 3.1,  Prev: PowerPC AltiVec Built-in Functions Available on ISA 3.0,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.23.5 PowerPC AltiVec Built-in Functions Available on ISA 3.1
  .................................................................
  
  The following additional built-in functions are also available for the
--- 52373,52379 ----
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions Available on ISA 3.1,  Prev: PowerPC AltiVec Built-in Functions Available on ISA 3.0,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.24.5 PowerPC AltiVec Built-in Functions Available on ISA 3.1
  .................................................................
  
  The following additional built-in functions are also available for the
*************** vec_div (vector unsigned long long a, ve
*** 52644,52651 ****
  in doubleword element 'i' of a is divided by the integer in doubleword
  element 'i' of b.  The unique integer quotient is placed into the
  doubleword element 'i' of the vector returned.  If an attempt is made to
! perform any of the divisions 0x8000_0000_0000_0000 ÷ -1 or <anything>
! ÷ 0 then the quotient is undefined.
  
  vector signed int
  vec_dive (vector signed int a, vector signed int b);
--- 52831,52838 ----
  in doubleword element 'i' of a is divided by the integer in doubleword
  element 'i' of b.  The unique integer quotient is placed into the
  doubleword element 'i' of the vector returned.  If an attempt is made to
! perform any of the divisions 0x8000_0000_0000_0000 ÷ -1 or <anything> ÷
! 0 then the quotient is undefined.
  
  vector signed int
  vec_dive (vector signed int a, vector signed int b);
*************** Otherwise, the element of the returned v
*** 52853,52859 ****
  
  File: gcc.info,  Node: PowerPC Hardware Transactional Memory Built-in Functions,  Next: PowerPC Atomic Memory Operation Functions,  Prev: PowerPC AltiVec/VSX Built-in Functions,  Up: Target Builtins
  
! 6.60.24 PowerPC Hardware Transactional Memory Built-in Functions
  ----------------------------------------------------------------
  
  GCC provides two interfaces for accessing the Hardware Transactional
--- 53040,53046 ----
  
  File: gcc.info,  Node: PowerPC Hardware Transactional Memory Built-in Functions,  Next: PowerPC Atomic Memory Operation Functions,  Prev: PowerPC AltiVec/VSX Built-in Functions,  Up: Target Builtins
  
! 6.60.25 PowerPC Hardware Transactional Memory Built-in Functions
  ----------------------------------------------------------------
  
  GCC provides two interfaces for accessing the Hardware Transactional
*************** interface, consisting of built-in functi
*** 52863,52869 ****
  higher level interface consisting of inline functions that are common
  between PowerPC and S/390.
  
! 6.60.24.1 PowerPC HTM Low Level Built-in Functions
  ..................................................
  
  The following low level built-in functions are available with '-mhtm' or
--- 53050,53056 ----
  higher level interface consisting of inline functions that are common
  between PowerPC and S/390.
  
! 6.60.25.1 PowerPC HTM Low Level Built-in Functions
  ..................................................
  
  The following low level built-in functions are available with '-mhtm' or
*************** using the following code example:
*** 52997,53003 ****
           /* Code to use in transaction suspended state.  */
         }
  
! 6.60.24.2 PowerPC HTM High Level Inline Functions
  .................................................
  
  The following high level HTM interface is made available by including
--- 53184,53190 ----
           /* Code to use in transaction suspended state.  */
         }
  
! 6.60.25.2 PowerPC HTM High Level Inline Functions
  .................................................
  
  The following high level HTM interface is made available by including
*************** work on either PowerPC or S/390:
*** 53063,53069 ****
  
  File: gcc.info,  Node: PowerPC Atomic Memory Operation Functions,  Next: PowerPC Matrix-Multiply Assist Built-in Functions,  Prev: PowerPC Hardware Transactional Memory Built-in Functions,  Up: Target Builtins
  
! 6.60.25 PowerPC Atomic Memory Operation Functions
  -------------------------------------------------
  
  ISA 3.0 of the PowerPC added new atomic memory operation (amo)
--- 53250,53256 ----
  
  File: gcc.info,  Node: PowerPC Atomic Memory Operation Functions,  Next: PowerPC Matrix-Multiply Assist Built-in Functions,  Prev: PowerPC Hardware Transactional Memory Built-in Functions,  Up: Target Builtins
  
! 6.60.26 PowerPC Atomic Memory Operation Functions
  -------------------------------------------------
  
  ISA 3.0 of the PowerPC added new atomic memory operation (amo)
*************** environments.  All of the functions are
*** 53126,53132 ****
  
  File: gcc.info,  Node: PowerPC Matrix-Multiply Assist Built-in Functions,  Next: PRU Built-in Functions,  Prev: PowerPC Atomic Memory Operation Functions,  Up: Target Builtins
  
! 6.60.26 PowerPC Matrix-Multiply Assist Built-in Functions
  ---------------------------------------------------------
  
  ISA 3.1 of the PowerPC added new Matrix-Multiply Assist (MMA)
--- 53313,53319 ----
  
  File: gcc.info,  Node: PowerPC Matrix-Multiply Assist Built-in Functions,  Next: PRU Built-in Functions,  Prev: PowerPC Atomic Memory Operation Functions,  Up: Target Builtins
  
! 6.60.27 PowerPC Matrix-Multiply Assist Built-in Functions
  ---------------------------------------------------------
  
  ISA 3.1 of the PowerPC added new Matrix-Multiply Assist (MMA)
*************** they are constants and that their values
*** 53225,53231 ****
  
  File: gcc.info,  Node: PRU Built-in Functions,  Next: RISC-V Built-in Functions,  Prev: PowerPC Matrix-Multiply Assist Built-in Functions,  Up: Target Builtins
  
! 6.60.27 PRU Built-in Functions
  ------------------------------
  
  GCC provides a couple of special builtin functions to aid in utilizing
--- 53412,53418 ----
  
  File: gcc.info,  Node: PRU Built-in Functions,  Next: RISC-V Built-in Functions,  Prev: PowerPC Matrix-Multiply Assist Built-in Functions,  Up: Target Builtins
  
! 6.60.28 PRU Built-in Functions
  ------------------------------
  
  GCC provides a couple of special builtin functions to aid in utilizing
*************** special PRU instructions.
*** 53253,53259 ****
  
  File: gcc.info,  Node: RISC-V Built-in Functions,  Next: RX Built-in Functions,  Prev: PRU Built-in Functions,  Up: Target Builtins
  
! 6.60.28 RISC-V Built-in Functions
  ---------------------------------
  
  These built-in functions are available for the RISC-V family of
--- 53440,53446 ----
  
  File: gcc.info,  Node: RISC-V Built-in Functions,  Next: RX Built-in Functions,  Prev: PRU Built-in Functions,  Up: Target Builtins
  
! 6.60.29 RISC-V Built-in Functions
  ---------------------------------
  
  These built-in functions are available for the RISC-V family of
*************** processors.
*** 53265,53271 ****
  
  File: gcc.info,  Node: RX Built-in Functions,  Next: S/390 System z Built-in Functions,  Prev: RISC-V Built-in Functions,  Up: Target Builtins
  
! 6.60.29 RX Built-in Functions
  -----------------------------
  
  GCC supports some of the RX instructions which cannot be expressed in
--- 53452,53458 ----
  
  File: gcc.info,  Node: RX Built-in Functions,  Next: S/390 System z Built-in Functions,  Prev: RISC-V Built-in Functions,  Up: Target Builtins
  
! 6.60.30 RX Built-in Functions
  -----------------------------
  
  GCC supports some of the RX instructions which cannot be expressed in
*************** following functions are supported:
*** 53363,53369 ****
  
  File: gcc.info,  Node: S/390 System z Built-in Functions,  Next: SH Built-in Functions,  Prev: RX Built-in Functions,  Up: Target Builtins
  
! 6.60.30 S/390 System z Built-in Functions
  -----------------------------------------
  
   -- Built-in Function: int __builtin_tbegin (void*)
--- 53550,53556 ----
  
  File: gcc.info,  Node: S/390 System z Built-in Functions,  Next: SH Built-in Functions,  Prev: RX Built-in Functions,  Up: Target Builtins
  
! 6.60.31 S/390 System z Built-in Functions
  -----------------------------------------
  
   -- Built-in Function: int __builtin_tbegin (void*)
*************** File: gcc.info,  Node: S/390 System z Bu
*** 53468,53474 ****
  
  File: gcc.info,  Node: SH Built-in Functions,  Next: SPARC VIS Built-in Functions,  Prev: S/390 System z Built-in Functions,  Up: Target Builtins
  
! 6.60.31 SH Built-in Functions
  -----------------------------
  
  The following built-in functions are supported on the SH1, SH2, SH3 and
--- 53655,53661 ----
  
  File: gcc.info,  Node: SH Built-in Functions,  Next: SPARC VIS Built-in Functions,  Prev: S/390 System z Built-in Functions,  Up: Target Builtins
  
! 6.60.32 SH Built-in Functions
  -----------------------------
  
  The following built-in functions are supported on the SH1, SH2, SH3 and
*************** SH4 families of processors:
*** 53510,53516 ****
  
  File: gcc.info,  Node: SPARC VIS Built-in Functions,  Next: TI C6X Built-in Functions,  Prev: SH Built-in Functions,  Up: Target Builtins
  
! 6.60.32 SPARC VIS Built-in Functions
  ------------------------------------
  
  GCC supports SIMD operations on the SPARC using both the generic vector
--- 53697,53703 ----
  
  File: gcc.info,  Node: SPARC VIS Built-in Functions,  Next: TI C6X Built-in Functions,  Prev: SH Built-in Functions,  Up: Target Builtins
  
! 6.60.33 SPARC VIS Built-in Functions
  ------------------------------------
  
  GCC supports SIMD operations on the SPARC using both the generic vector
*************** functions also become available:
*** 53723,53729 ****
  
  File: gcc.info,  Node: TI C6X Built-in Functions,  Next: TILE-Gx Built-in Functions,  Prev: SPARC VIS Built-in Functions,  Up: Target Builtins
  
! 6.60.33 TI C6X Built-in Functions
  ---------------------------------
  
  GCC provides intrinsics to access certain instructions of the TI C6X
--- 53910,53916 ----
  
  File: gcc.info,  Node: TI C6X Built-in Functions,  Next: TILE-Gx Built-in Functions,  Prev: SPARC VIS Built-in Functions,  Up: Target Builtins
  
! 6.60.34 TI C6X Built-in Functions
  ---------------------------------
  
  GCC provides intrinsics to access certain instructions of the TI C6X
*************** C6X instructions.
*** 53761,53767 ****
  
  File: gcc.info,  Node: TILE-Gx Built-in Functions,  Next: TILEPro Built-in Functions,  Prev: TI C6X Built-in Functions,  Up: Target Builtins
  
! 6.60.34 TILE-Gx Built-in Functions
  ----------------------------------
  
  GCC provides intrinsics to access every instruction of the TILE-Gx
--- 53948,53954 ----
  
  File: gcc.info,  Node: TILE-Gx Built-in Functions,  Next: TILEPro Built-in Functions,  Prev: TI C6X Built-in Functions,  Up: Target Builtins
  
! 6.60.35 TILE-Gx Built-in Functions
  ----------------------------------
  
  GCC provides intrinsics to access every instruction of the TILE-Gx
*************** that no network operations before it are
*** 53792,53798 ****
  
  File: gcc.info,  Node: TILEPro Built-in Functions,  Next: x86 Built-in Functions,  Prev: TILE-Gx Built-in Functions,  Up: Target Builtins
  
! 6.60.35 TILEPro Built-in Functions
  ----------------------------------
  
  GCC provides intrinsics to access every instruction of the TILEPro
--- 53979,53985 ----
  
  File: gcc.info,  Node: TILEPro Built-in Functions,  Next: x86 Built-in Functions,  Prev: TILE-Gx Built-in Functions,  Up: Target Builtins
  
! 6.60.36 TILEPro Built-in Functions
  ----------------------------------
  
  GCC provides intrinsics to access every instruction of the TILEPro
*************** that no network operations before it are
*** 53825,53831 ****
  
  File: gcc.info,  Node: x86 Built-in Functions,  Next: x86 transactional memory intrinsics,  Prev: TILEPro Built-in Functions,  Up: Target Builtins
  
! 6.60.36 x86 Built-in Functions
  ------------------------------
  
  These built-in functions are available for the x86-32 and x86-64 family
--- 54012,54018 ----
  
  File: gcc.info,  Node: x86 Built-in Functions,  Next: x86 transactional memory intrinsics,  Prev: TILEPro Built-in Functions,  Up: Target Builtins
  
! 6.60.37 x86 Built-in Functions
  ------------------------------
  
  These built-in functions are available for the x86-32 and x86-64 family
*************** These are the internal low-level functio
*** 55321,55327 ****
  
  File: gcc.info,  Node: x86 transactional memory intrinsics,  Next: x86 control-flow protection intrinsics,  Prev: x86 Built-in Functions,  Up: Target Builtins
  
! 6.60.37 x86 Transactional Memory Intrinsics
  -------------------------------------------
  
  These hardware transactional memory intrinsics for x86 allow you to use
--- 55508,55514 ----
  
  File: gcc.info,  Node: x86 transactional memory intrinsics,  Next: x86 control-flow protection intrinsics,  Prev: x86 Built-in Functions,  Up: Target Builtins
  
! 6.60.38 x86 Transactional Memory Intrinsics
  -------------------------------------------
  
  These hardware transactional memory intrinsics for x86 allow you to use
*************** must synchronize together to ensure cons
*** 55411,55417 ****
  
  File: gcc.info,  Node: x86 control-flow protection intrinsics,  Prev: x86 transactional memory intrinsics,  Up: Target Builtins
  
! 6.60.38 x86 Control-Flow Protection Intrinsics
  ----------------------------------------------
  
   -- CET Function: ret_type _get_ssp (void)
--- 55598,55604 ----
  
  File: gcc.info,  Node: x86 control-flow protection intrinsics,  Prev: x86 transactional memory intrinsics,  Up: Target Builtins
  
! 6.60.39 x86 Control-Flow Protection Intrinsics
  ----------------------------------------------
  
   -- CET Function: ret_type _get_ssp (void)
*************** alphabetical order.
*** 62219,62225 ****
  
     * Ralf Corsepius for SH testing and minor bug fixing.
  
!    * Franc,ois-Xavier Coudert for contributions to GNU Fortran.
  
     * Stan Cox for care and feeding of the x86 port and lots of behind
       the scenes hacking.
--- 62406,62412 ----
  
     * Ralf Corsepius for SH testing and minor bug fixing.
  
!    * François-Xavier Coudert for contributions to GNU Fortran.
  
     * Stan Cox for care and feeding of the x86 port and lots of behind
       the scenes hacking.
*************** alphabetical order.
*** 62262,62268 ****
       disbursement, configuration architecture, libio maintenance, and
       early math work.
  
!    * Franc,ois Dumont for his work on libstdc++-v3, especially
       maintaining and improving 'debug-mode' and associative and
       unordered containers.
  
--- 62449,62455 ----
       disbursement, configuration architecture, libio maintenance, and
       early math work.
  
!    * François Dumont for his work on libstdc++-v3, especially
       maintaining and improving 'debug-mode' and associative and
       unordered containers.
  
*************** alphabetical order.
*** 62521,62533 ****
  
     * Weiwen Liu for testing and various bug fixes.
  
!    * Manuel Lo'pez-Iba'n~ez for improving '-Wconversion' and many other
       diagnostics fixes and improvements.
  
     * Dave Love for his ongoing work with the Fortran front end and
       runtime libraries.
  
!    * Martin von Lo"wis for internal consistency checking infrastructure,
       various C++ improvements including namespace support, and tons of
       assistance with libstdc++/compiler merges.
  
--- 62708,62720 ----
  
     * Weiwen Liu for testing and various bug fixes.
  
!    * Manuel López-Ibáñez for improving '-Wconversion' and many other
       diagnostics fixes and improvements.
  
     * Dave Love for his ongoing work with the Fortran front end and
       runtime libraries.
  
!    * Martin von Löwis for internal consistency checking infrastructure,
       various C++ improvements including namespace support, and tons of
       assistance with libstdc++/compiler merges.
  
*************** alphabetical order.
*** 62719,62725 ****
  
     * Craig Rodrigues for processing tons of bug reports.
  
!    * Ola Ro"nnerup for work on mt_alloc.
  
     * Gavin Romig-Koch for lots of behind the scenes MIPS work.
  
--- 62906,62912 ----
  
     * Craig Rodrigues for processing tons of bug reports.
  
!    * Ola Rönnerup for work on mt_alloc.
  
     * Gavin Romig-Koch for lots of behind the scenes MIPS work.
  
*************** alphabetical order.
*** 62733,62739 ****
  
     * Paul Rubin wrote most of the preprocessor.
  
!    * Pe'tur Runo'lfsson for major performance improvements in C++
       formatted I/O and large file support in C++ filebuf.
  
     * Chip Salzenberg for libstdc++ patches and improvements to locales,
--- 62920,62926 ----
  
     * Paul Rubin wrote most of the preprocessor.
  
!    * Pétur Runólfsson for major performance improvements in C++
       formatted I/O and large file support in C++ filebuf.
  
     * Chip Salzenberg for libstdc++ patches and improvements to locales,
*************** alphabetical order.
*** 62754,62760 ****
  
     * William Schelter did most of the work on the Intel 80386 support.
  
!    * Tobias Schlu"ter for work on GNU Fortran.
  
     * Bernd Schmidt for various code generation improvements and major
       work in the reload pass, serving as release manager for GCC 2.95.3,
--- 62941,62947 ----
  
     * William Schelter did most of the work on the Intel 80386 support.
  
!    * Tobias Schlüter for work on GNU Fortran.
  
     * Bernd Schmidt for various code generation improvements and major
       work in the reload pass, serving as release manager for GCC 2.95.3,
*************** contributions to testing:
*** 63251,63257 ****
  
     * Robert A. French
  
!    * Jo"rgen Freyh
  
     * Mark K. Gardner
  
--- 63438,63444 ----
  
     * Robert A. French
  
!    * Jörgen Freyh
  
     * Mark K. Gardner
  
*************** look up both forms.
*** 63399,63433 ****
  * 80387:                                 x86 Options.        (line  603)
  * A:                                     Preprocessor Options.
                                                               (line  337)
! * allowable_client:                      Darwin Options.     (line  196)
! * all_load:                              Darwin Options.     (line  110)
  * analyzer:                              Static Analyzer Options.
                                                               (line    7)
  * ansi:                                  Standards.          (line   13)
  * ansi <1>:                              C Dialect Options.  (line   11)
  * ansi <2>:                              Other Builtins.     (line   31)
  * ansi <3>:                              Non-bugs.           (line  107)
! * arch_errors_fatal:                     Darwin Options.     (line  114)
  * aux-info:                              C Dialect Options.  (line  202)
  * B:                                     Directory Options.  (line  122)
  * Bdynamic:                              VxWorks Options.    (line   22)
! * bind_at_load:                          Darwin Options.     (line  118)
  * block-ops-unaligned-vsx:               RS/6000 and PowerPC Options.
                                                               (line  959)
  * Bstatic:                               VxWorks Options.    (line   22)
! * bundle:                                Darwin Options.     (line  123)
! * bundle_loader:                         Darwin Options.     (line  127)
  * c:                                     Overall Options.    (line  165)
  * C:                                     Preprocessor Options.
                                                               (line  346)
  * c <1>:                                 Link Options.       (line   20)
  * CC:                                    Preprocessor Options.
                                                               (line  358)
! * client_name:                           Darwin Options.     (line  196)
! * compatibility_version:                 Darwin Options.     (line  196)
  * coverage:                              Instrumentation Options.
                                                               (line   56)
! * current_version:                       Darwin Options.     (line  196)
  * D:                                     Preprocessor Options.
                                                               (line   19)
  * d:                                     Preprocessor Options.
--- 63586,63620 ----
  * 80387:                                 x86 Options.        (line  603)
  * A:                                     Preprocessor Options.
                                                               (line  337)
! * allowable_client:                      Darwin Options.     (line  204)
! * all_load:                              Darwin Options.     (line  118)
  * analyzer:                              Static Analyzer Options.
                                                               (line    7)
  * ansi:                                  Standards.          (line   13)
  * ansi <1>:                              C Dialect Options.  (line   11)
  * ansi <2>:                              Other Builtins.     (line   31)
  * ansi <3>:                              Non-bugs.           (line  107)
! * arch_errors_fatal:                     Darwin Options.     (line  122)
  * aux-info:                              C Dialect Options.  (line  202)
  * B:                                     Directory Options.  (line  122)
  * Bdynamic:                              VxWorks Options.    (line   22)
! * bind_at_load:                          Darwin Options.     (line  126)
  * block-ops-unaligned-vsx:               RS/6000 and PowerPC Options.
                                                               (line  959)
  * Bstatic:                               VxWorks Options.    (line   22)
! * bundle:                                Darwin Options.     (line  131)
! * bundle_loader:                         Darwin Options.     (line  135)
  * c:                                     Overall Options.    (line  165)
  * C:                                     Preprocessor Options.
                                                               (line  346)
  * c <1>:                                 Link Options.       (line   20)
  * CC:                                    Preprocessor Options.
                                                               (line  358)
! * client_name:                           Darwin Options.     (line  204)
! * compatibility_version:                 Darwin Options.     (line  204)
  * coverage:                              Instrumentation Options.
                                                               (line   56)
! * current_version:                       Darwin Options.     (line  204)
  * D:                                     Preprocessor Options.
                                                               (line   19)
  * d:                                     Preprocessor Options.
*************** look up both forms.
*** 63438,63445 ****
  * dD:                                    Preprocessor Options.
                                                               (line  436)
  * dD <1>:                                Developer Options.  (line  253)
! * dead_strip:                            Darwin Options.     (line  196)
! * dependency-file:                       Darwin Options.     (line  196)
  * dH:                                    Developer Options.  (line  257)
  * dI:                                    Preprocessor Options.
                                                               (line  446)
--- 63625,63632 ----
  * dD:                                    Preprocessor Options.
                                                               (line  436)
  * dD <1>:                                Developer Options.  (line  253)
! * dead_strip:                            Darwin Options.     (line  204)
! * dependency-file:                       Darwin Options.     (line  204)
  * dH:                                    Developer Options.  (line  257)
  * dI:                                    Preprocessor Options.
                                                               (line  446)
*************** look up both forms.
*** 63467,63487 ****
  * dumpspecs:                             Developer Options.  (line 1019)
  * dumpversion:                           Developer Options.  (line 1006)
  * dx:                                    Developer Options.  (line  269)
! * dylib_file:                            Darwin Options.     (line  196)
! * dylinker_install_name:                 Darwin Options.     (line  196)
! * dynamic:                               Darwin Options.     (line  196)
! * dynamiclib:                            Darwin Options.     (line  131)
  * E:                                     Overall Options.    (line  186)
  * E <1>:                                 Link Options.       (line   20)
  * e:                                     Link Options.       (line  172)
! * EB:                                    ARC Options.        (line  590)
  * EB <1>:                                C-SKY Options.      (line   29)
  * EB <2>:                                MIPS Options.       (line    7)
! * EL:                                    ARC Options.        (line  599)
  * EL <1>:                                C-SKY Options.      (line   31)
  * EL <2>:                                MIPS Options.       (line   10)
  * entry:                                 Link Options.       (line  172)
! * exported_symbols_list:                 Darwin Options.     (line  196)
  * F:                                     Darwin Options.     (line   31)
  * fabi-compat-version:                   C++ Dialect Options.
                                                               (line   92)
--- 63654,63674 ----
  * dumpspecs:                             Developer Options.  (line 1019)
  * dumpversion:                           Developer Options.  (line 1006)
  * dx:                                    Developer Options.  (line  269)
! * dylib_file:                            Darwin Options.     (line  204)
! * dylinker_install_name:                 Darwin Options.     (line  204)
! * dynamic:                               Darwin Options.     (line  204)
! * dynamiclib:                            Darwin Options.     (line  139)
  * E:                                     Overall Options.    (line  186)
  * E <1>:                                 Link Options.       (line   20)
  * e:                                     Link Options.       (line  172)
! * EB:                                    ARC Options.        (line  588)
  * EB <1>:                                C-SKY Options.      (line   29)
  * EB <2>:                                MIPS Options.       (line    7)
! * EL:                                    ARC Options.        (line  595)
  * EL <1>:                                C-SKY Options.      (line   31)
  * EL <2>:                                MIPS Options.       (line   10)
  * entry:                                 Link Options.       (line  172)
! * exported_symbols_list:                 Darwin Options.     (line  204)
  * F:                                     Darwin Options.     (line   31)
  * fabi-compat-version:                   C++ Dialect Options.
                                                               (line   92)
*************** look up both forms.
*** 63554,63559 ****
--- 63741,63747 ----
                                                               (line  176)
  * fcond-mismatch:                        C Dialect Options.  (line  273)
  * fconserve-stack:                       Optimize Options.   (line  965)
+ * fconstant-cfstrings:                   Darwin Options.     (line   71)
  * fconstant-string-class:                Objective-C and Objective-C++ Dialect Options.
                                                               (line   30)
  * fconstexpr-cache-depth:                C++ Dialect Options.
*************** look up both forms.
*** 63767,63773 ****
  * ffile-prefix-map:                      Overall Options.    (line  630)
  * ffinite-loops:                         Optimize Options.   (line 1222)
  * ffinite-math-only:                     Optimize Options.   (line 2400)
! * ffix-and-continue:                     Darwin Options.     (line  104)
  * ffixed:                                Code Gen Options.   (line  429)
  * ffloat-store:                          Optimize Options.   (line 2285)
  * ffloat-store <1>:                      Disappointments.    (line   77)
--- 63955,63961 ----
  * ffile-prefix-map:                      Overall Options.    (line  630)
  * ffinite-loops:                         Optimize Options.   (line 1222)
  * ffinite-math-only:                     Optimize Options.   (line 2400)
! * ffix-and-continue:                     Darwin Options.     (line  112)
  * ffixed:                                Code Gen Options.   (line  429)
  * ffloat-store:                          Optimize Options.   (line 2285)
  * ffloat-store <1>:                      Disappointments.    (line   77)
*************** look up both forms.
*** 63792,63798 ****
  * fgnu-keywords:                         C++ Dialect Options.
                                                               (line  279)
  * fgnu-runtime:                          Objective-C and Objective-C++ Dialect Options.
!                                                              (line   39)
  * fgnu-tm:                               C Dialect Options.  (line  295)
  * fgnu-unique:                           Code Gen Options.   (line  165)
  * fgnu89-inline:                         C Dialect Options.  (line  310)
--- 63980,63986 ----
  * fgnu-keywords:                         C++ Dialect Options.
                                                               (line  279)
  * fgnu-runtime:                          Objective-C and Objective-C++ Dialect Options.
!                                                              (line   42)
  * fgnu-tm:                               C Dialect Options.  (line  295)
  * fgnu-unique:                           Code Gen Options.   (line  165)
  * fgnu89-inline:                         C Dialect Options.  (line  310)
*************** look up both forms.
*** 63808,63814 ****
  * fif-conversion:                        Optimize Options.   (line  590)
  * fif-conversion2:                       Optimize Options.   (line  599)
  * fiji:                                  AMD GCN Options.    (line   13)
! * filelist:                              Darwin Options.     (line  196)
  * fimplement-inlines:                    C++ Dialect Options.
                                                               (line  305)
  * fimplicit-constexpr:                   C++ Dialect Options.
--- 63996,64002 ----
  * fif-conversion:                        Optimize Options.   (line  590)
  * fif-conversion2:                       Optimize Options.   (line  599)
  * fiji:                                  AMD GCN Options.    (line   13)
! * filelist:                              Darwin Options.     (line  204)
  * fimplement-inlines:                    C++ Dialect Options.
                                                               (line  305)
  * fimplicit-constexpr:                   C++ Dialect Options.
*************** look up both forms.
*** 63817,63823 ****
                                                               (line  299)
  * fimplicit-templates:                   C++ Dialect Options.
                                                               (line  291)
! * findirect-data:                        Darwin Options.     (line  104)
  * findirect-inlining:                    Optimize Options.   (line  300)
  * finhibit-size-directive:               Code Gen Options.   (line  258)
  * finline:                               Optimize Options.   (line  283)
--- 64005,64011 ----
                                                               (line  299)
  * fimplicit-templates:                   C++ Dialect Options.
                                                               (line  291)
! * findirect-data:                        Darwin Options.     (line  112)
  * findirect-inlining:                    Optimize Options.   (line  300)
  * finhibit-size-directive:               Code Gen Options.   (line  258)
  * finline:                               Optimize Options.   (line  283)
*************** look up both forms.
*** 63860,63866 ****
  * fisolate-erroneous-paths-attribute:    Optimize Options.   (line 1164)
  * fisolate-erroneous-paths-dereference:  Optimize Options.   (line 1156)
  * fivar-visibility:                      Objective-C and Objective-C++ Dialect Options.
!                                                              (line  161)
  * fivopts:                               Optimize Options.   (line 1389)
  * fjump-tables:                          Code Gen Options.   (line  417)
  * fkeep-inline-dllexport:                Optimize Options.   (line  369)
--- 64048,64054 ----
  * fisolate-erroneous-paths-attribute:    Optimize Options.   (line 1164)
  * fisolate-erroneous-paths-dereference:  Optimize Options.   (line 1156)
  * fivar-visibility:                      Objective-C and Objective-C++ Dialect Options.
!                                                              (line  164)
  * fivopts:                               Optimize Options.   (line 1389)
  * fjump-tables:                          Code Gen Options.   (line  417)
  * fkeep-inline-dllexport:                Optimize Options.   (line  369)
*************** look up both forms.
*** 63876,63882 ****
                                                               (line  571)
  * flarge-source-files:                   Preprocessor Options.
                                                               (line  497)
! * flat_namespace:                        Darwin Options.     (line  196)
  * flax-vector-conversions:               C Dialect Options.  (line  335)
  * fleading-underscore:                   Code Gen Options.   (line  485)
  * flifetime-dse:                         Optimize Options.   (line  675)
--- 64064,64070 ----
                                                               (line  571)
  * flarge-source-files:                   Preprocessor Options.
                                                               (line  497)
! * flat_namespace:                        Darwin Options.     (line  204)
  * flax-vector-conversions:               C Dialect Options.  (line  335)
  * fleading-underscore:                   Code Gen Options.   (line  485)
  * flifetime-dse:                         Optimize Options.   (line  675)
*************** look up both forms.
*** 63884,63890 ****
  * flive-patching:                        Optimize Options.   (line 1096)
  * flive-range-shrinkage:                 Optimize Options.   (line  690)
  * flocal-ivars:                          Objective-C and Objective-C++ Dialect Options.
!                                                              (line  152)
  * floop-block:                           Optimize Options.   (line 1258)
  * floop-interchange:                     Optimize Options.   (line 1342)
  * floop-nest-optimize:                   Optimize Options.   (line 1272)
--- 64072,64078 ----
  * flive-patching:                        Optimize Options.   (line 1096)
  * flive-range-shrinkage:                 Optimize Options.   (line  690)
  * flocal-ivars:                          Objective-C and Objective-C++ Dialect Options.
!                                                              (line  155)
  * floop-block:                           Optimize Options.   (line 1258)
  * floop-interchange:                     Optimize Options.   (line 1342)
  * floop-nest-optimize:                   Optimize Options.   (line 1272)
*************** look up both forms.
*** 63935,63943 ****
  * fnew-ttp-matching:                     C++ Dialect Options.
                                                               (line  360)
  * fnext-runtime:                         Objective-C and Objective-C++ Dialect Options.
!                                                              (line   43)
  * fnil-receivers:                        Objective-C and Objective-C++ Dialect Options.
!                                                              (line   49)
  * fno-access-control:                    C++ Dialect Options.
                                                               (line  108)
  * fno-allocation-dce:                    Optimize Options.   (line 1833)
--- 64123,64131 ----
  * fnew-ttp-matching:                     C++ Dialect Options.
                                                               (line  360)
  * fnext-runtime:                         Objective-C and Objective-C++ Dialect Options.
!                                                              (line   46)
  * fnil-receivers:                        Objective-C and Objective-C++ Dialect Options.
!                                                              (line   52)
  * fno-access-control:                    C++ Dialect Options.
                                                               (line  108)
  * fno-allocation-dce:                    Optimize Options.   (line 1833)
*************** look up both forms.
*** 64026,64032 ****
  * fno-keep-inline-dllexport:             Optimize Options.   (line  369)
  * fno-lifetime-dse:                      Optimize Options.   (line  675)
  * fno-local-ivars:                       Objective-C and Objective-C++ Dialect Options.
!                                                              (line  152)
  * fno-math-errno:                        Optimize Options.   (line 2337)
  * fno-merge-debug-strings:               Debugging Options.  (line  166)
  * fno-module-lazy:                       C++ Dialect Options.
--- 64214,64220 ----
  * fno-keep-inline-dllexport:             Optimize Options.   (line  369)
  * fno-lifetime-dse:                      Optimize Options.   (line  675)
  * fno-local-ivars:                       Objective-C and Objective-C++ Dialect Options.
!                                                              (line  155)
  * fno-math-errno:                        Optimize Options.   (line 2337)
  * fno-merge-debug-strings:               Debugging Options.  (line  166)
  * fno-module-lazy:                       C++ Dialect Options.
*************** look up both forms.
*** 64034,64040 ****
  * fno-modules-ts:                        C++ Dialect Options.
                                                               (line  311)
  * fno-nil-receivers:                     Objective-C and Objective-C++ Dialect Options.
!                                                              (line   49)
  * fno-nonansi-builtins:                  C++ Dialect Options.
                                                               (line  367)
  * fno-operator-names:                    C++ Dialect Options.
--- 64222,64228 ----
  * fno-modules-ts:                        C++ Dialect Options.
                                                               (line  311)
  * fno-nil-receivers:                     Objective-C and Objective-C++ Dialect Options.
!                                                              (line   52)
  * fno-nonansi-builtins:                  C++ Dialect Options.
                                                               (line  367)
  * fno-operator-names:                    C++ Dialect Options.
*************** look up both forms.
*** 64059,64065 ****
                                                               (line   46)
  * fno-show-column:                       Diagnostic Message Formatting Options.
                                                               (line  408)
! * fno-signed-bitfields:                  C Dialect Options.  (line  451)
  * fno-signed-zeros:                      Optimize Options.   (line 2412)
  * fno-stack-limit:                       Instrumentation Options.
                                                               (line  823)
--- 64247,64253 ----
                                                               (line   46)
  * fno-show-column:                       Diagnostic Message Formatting Options.
                                                               (line  408)
! * fno-signed-bitfields:                  C Dialect Options.  (line  449)
  * fno-signed-zeros:                      Optimize Options.   (line 2412)
  * fno-stack-limit:                       Instrumentation Options.
                                                               (line  823)
*************** look up both forms.
*** 64067,64073 ****
                                                               (line  464)
  * fno-toplevel-reorder:                  Optimize Options.   (line 1859)
  * fno-trapping-math:                     Optimize Options.   (line 2422)
! * fno-unsigned-bitfields:                C Dialect Options.  (line  451)
  * fno-use-cxa-get-exception-ptr:         C++ Dialect Options.
                                                               (line  477)
  * fno-var-tracking-assignments:          Debugging Options.  (line  193)
--- 64255,64261 ----
                                                               (line  464)
  * fno-toplevel-reorder:                  Optimize Options.   (line 1859)
  * fno-trapping-math:                     Optimize Options.   (line 2422)
! * fno-unsigned-bitfields:                C Dialect Options.  (line  449)
  * fno-use-cxa-get-exception-ptr:         C++ Dialect Options.
                                                               (line  477)
  * fno-var-tracking-assignments:          Debugging Options.  (line  193)
*************** look up both forms.
*** 64085,64110 ****
  * fnothrow-opt:                          C++ Dialect Options.
                                                               (line  372)
  * fobjc-abi-version:                     Objective-C and Objective-C++ Dialect Options.
!                                                              (line   56)
  * fobjc-call-cxx-cdtors:                 Objective-C and Objective-C++ Dialect Options.
!                                                              (line   67)
  * fobjc-direct-dispatch:                 Objective-C and Objective-C++ Dialect Options.
!                                                              (line   92)
  * fobjc-exceptions:                      Objective-C and Objective-C++ Dialect Options.
!                                                              (line   96)
  * fobjc-gc:                              Objective-C and Objective-C++ Dialect Options.
!                                                              (line  104)
  * fobjc-nilcheck:                        Objective-C and Objective-C++ Dialect Options.
!                                                              (line  110)
  * fobjc-std:                             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  119)
  * foffload:                              C Dialect Options.  (line  360)
  * foffload-options:                      C Dialect Options.  (line  373)
  * fomit-frame-pointer:                   Optimize Options.   (line  256)
  * fopenacc:                              C Dialect Options.  (line  388)
! * fopenacc-dim:                          C Dialect Options.  (line  397)
! * fopenmp:                               C Dialect Options.  (line  403)
! * fopenmp-simd:                          C Dialect Options.  (line  412)
  * foperator-names:                       C++ Dialect Options.
                                                               (line  383)
  * fopt-info:                             Developer Options.  (line  487)
--- 64273,64298 ----
  * fnothrow-opt:                          C++ Dialect Options.
                                                               (line  372)
  * fobjc-abi-version:                     Objective-C and Objective-C++ Dialect Options.
!                                                              (line   59)
  * fobjc-call-cxx-cdtors:                 Objective-C and Objective-C++ Dialect Options.
!                                                              (line   70)
  * fobjc-direct-dispatch:                 Objective-C and Objective-C++ Dialect Options.
!                                                              (line   95)
  * fobjc-exceptions:                      Objective-C and Objective-C++ Dialect Options.
!                                                              (line   99)
  * fobjc-gc:                              Objective-C and Objective-C++ Dialect Options.
!                                                              (line  107)
  * fobjc-nilcheck:                        Objective-C and Objective-C++ Dialect Options.
!                                                              (line  113)
  * fobjc-std:                             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  122)
  * foffload:                              C Dialect Options.  (line  360)
  * foffload-options:                      C Dialect Options.  (line  373)
  * fomit-frame-pointer:                   Optimize Options.   (line  256)
  * fopenacc:                              C Dialect Options.  (line  388)
! * fopenacc-dim:                          C Dialect Options.  (line  396)
! * fopenmp:                               C Dialect Options.  (line  402)
! * fopenmp-simd:                          C Dialect Options.  (line  410)
  * foperator-names:                       C++ Dialect Options.
                                                               (line  383)
  * fopt-info:                             Developer Options.  (line  487)
*************** look up both forms.
*** 64112,64119 ****
  * foptimize-strlen:                      Optimize Options.   (line  276)
  * foptional-diags:                       C++ Dialect Options.
                                                               (line  387)
! * force_cpusubtype_ALL:                  Darwin Options.     (line  135)
! * force_flat_namespace:                  Darwin Options.     (line  196)
  * fpack-struct:                          Code Gen Options.   (line  472)
  * fpartial-inlining:                     Optimize Options.   (line 1548)
  * fpatchable-function-entry:             Instrumentation Options.
--- 64300,64307 ----
  * foptimize-strlen:                      Optimize Options.   (line  276)
  * foptional-diags:                       C++ Dialect Options.
                                                               (line  387)
! * force_cpusubtype_ALL:                  Darwin Options.     (line  143)
! * force_flat_namespace:                  Darwin Options.     (line  204)
  * fpack-struct:                          Code Gen Options.   (line  472)
  * fpartial-inlining:                     Optimize Options.   (line 1548)
  * fpatchable-function-entry:             Instrumentation Options.
*************** look up both forms.
*** 64129,64142 ****
  * fpeephole2:                            Optimize Options.   (line 1596)
  * fpermissive:                           C++ Dialect Options.
                                                               (line  392)
! * fpermitted-flt-eval-methods:           C Dialect Options.  (line  416)
! * fpermitted-flt-eval-methods=c11:       C Dialect Options.  (line  416)
! * fpermitted-flt-eval-methods=ts-18661-3: C Dialect Options. (line  416)
  * fpic:                                  Code Gen Options.   (line  356)
  * fPIC:                                  Code Gen Options.   (line  377)
  * fpie:                                  Code Gen Options.   (line  390)
  * fPIE:                                  Code Gen Options.   (line  390)
! * fplan9-extensions:                     C Dialect Options.  (line  438)
  * fplan9-extensions <1>:                 Unnamed Fields.     (line   43)
  * fplt:                                  Code Gen Options.   (line  399)
  * fplugin:                               Overall Options.    (line  639)
--- 64317,64330 ----
  * fpeephole2:                            Optimize Options.   (line 1596)
  * fpermissive:                           C++ Dialect Options.
                                                               (line  392)
! * fpermitted-flt-eval-methods:           C Dialect Options.  (line  414)
! * fpermitted-flt-eval-methods=c11:       C Dialect Options.  (line  414)
! * fpermitted-flt-eval-methods=ts-18661-3: C Dialect Options. (line  414)
  * fpic:                                  Code Gen Options.   (line  356)
  * fPIC:                                  Code Gen Options.   (line  377)
  * fpie:                                  Code Gen Options.   (line  390)
  * fPIE:                                  Code Gen Options.   (line  390)
! * fplan9-extensions:                     C Dialect Options.  (line  436)
  * fplan9-extensions <1>:                 Unnamed Fields.     (line   43)
  * fplt:                                  Code Gen Options.   (line  399)
  * fplugin:                               Overall Options.    (line  639)
*************** look up both forms.
*** 64193,64199 ****
  * freorder-blocks-and-partition:         Optimize Options.   (line 1643)
  * freorder-functions:                    Optimize Options.   (line 1660)
  * freplace-objc-classes:                 Objective-C and Objective-C++ Dialect Options.
!                                                              (line  130)
  * freport-bug:                           Developer Options.  (line  287)
  * frerun-cse-after-loop:                 Optimize Options.   (line  505)
  * freschedule-modulo-scheduled-loops:    Optimize Options.   (line  883)
--- 64381,64387 ----
  * freorder-blocks-and-partition:         Optimize Options.   (line 1643)
  * freorder-functions:                    Optimize Options.   (line 1660)
  * freplace-objc-classes:                 Objective-C and Objective-C++ Dialect Options.
!                                                              (line  133)
  * freport-bug:                           Developer Options.  (line  287)
  * frerun-cse-after-loop:                 Optimize Options.   (line  505)
  * freschedule-modulo-scheduled-loops:    Optimize Options.   (line  883)
*************** look up both forms.
*** 64315,64323 ****
  * fshrink-wrap:                          Optimize Options.   (line  923)
  * fshrink-wrap-separate:                 Optimize Options.   (line  928)
  * fsignaling-nans:                       Optimize Options.   (line 2457)
! * fsigned-bitfields:                     C Dialect Options.  (line  451)
  * fsigned-bitfields <1>:                 Non-bugs.           (line   57)
! * fsigned-char:                          C Dialect Options.  (line  457)
  * fsigned-char <1>:                      Characters implementation.
                                                               (line   31)
  * fsigned-zeros:                         Optimize Options.   (line 2412)
--- 64503,64511 ----
  * fshrink-wrap:                          Optimize Options.   (line  923)
  * fshrink-wrap-separate:                 Optimize Options.   (line  928)
  * fsignaling-nans:                       Optimize Options.   (line 2457)
! * fsigned-bitfields:                     C Dialect Options.  (line  449)
  * fsigned-bitfields <1>:                 Non-bugs.           (line   57)
! * fsigned-char:                          C Dialect Options.  (line  455)
  * fsigned-char <1>:                      Characters implementation.
                                                               (line   31)
  * fsigned-zeros:                         Optimize Options.   (line 2412)
*************** look up both forms.
*** 64336,64342 ****
  * fsplit-wide-types-early:               Optimize Options.   (line  482)
  * fssa-backprop:                         Optimize Options.   (line 1188)
  * fssa-phiopt:                           Optimize Options.   (line 1194)
! * fsso-struct:                           C Dialect Options.  (line  482)
  * fstack-check:                          Instrumentation Options.
                                                               (line  766)
  * fstack-clash-protection:               Instrumentation Options.
--- 64524,64530 ----
  * fsplit-wide-types-early:               Optimize Options.   (line  482)
  * fssa-backprop:                         Optimize Options.   (line 1188)
  * fssa-phiopt:                           Optimize Options.   (line 1194)
! * fsso-struct:                           C Dialect Options.  (line  480)
  * fstack-check:                          Instrumentation Options.
                                                               (line  766)
  * fstack-clash-protection:               Instrumentation Options.
*************** look up both forms.
*** 64362,64371 ****
  * fstrict-enums:                         C++ Dialect Options.
                                                               (line  434)
  * fstrict-overflow:                      Code Gen Options.   (line  115)
! * fstrict-volatile-bitfields:            Code Gen Options.   (line  601)
  * fstrong-eval-order:                    C++ Dialect Options.
                                                               (line  443)
! * fsync-libcalls:                        Code Gen Options.   (line  633)
  * fsyntax-only:                          Warning Options.    (line   14)
  * ftabstop:                              Preprocessor Options.
                                                               (line  241)
--- 64550,64559 ----
  * fstrict-enums:                         C++ Dialect Options.
                                                               (line  434)
  * fstrict-overflow:                      Code Gen Options.   (line  115)
! * fstrict-volatile-bitfields:            Code Gen Options.   (line  600)
  * fstrong-eval-order:                    C++ Dialect Options.
                                                               (line  443)
! * fsync-libcalls:                        Code Gen Options.   (line  632)
  * fsyntax-only:                          Warning Options.    (line   14)
  * ftabstop:                              Preprocessor Options.
                                                               (line  241)
*************** look up both forms.
*** 64429,64439 ****
  * funroll-all-loops:                     Optimize Options.   (line 2604)
  * funroll-loops:                         Optimize Options.   (line 2594)
  * funsafe-math-optimizations:            Optimize Options.   (line 2355)
! * funsigned-bitfields:                   C Dialect Options.  (line  451)
  * funsigned-bitfields <1>:               Structures unions enumerations and bit-fields implementation.
                                                               (line   17)
  * funsigned-bitfields <2>:               Non-bugs.           (line   57)
! * funsigned-char:                        C Dialect Options.  (line  464)
  * funsigned-char <1>:                    Characters implementation.
                                                               (line   31)
  * funswitch-loops:                       Optimize Options.   (line 2636)
--- 64617,64627 ----
  * funroll-all-loops:                     Optimize Options.   (line 2604)
  * funroll-loops:                         Optimize Options.   (line 2594)
  * funsafe-math-optimizations:            Optimize Options.   (line 2355)
! * funsigned-bitfields:                   C Dialect Options.  (line  449)
  * funsigned-bitfields <1>:               Structures unions enumerations and bit-fields implementation.
                                                               (line   17)
  * funsigned-bitfields <2>:               Non-bugs.           (line   57)
! * funsigned-char:                        C Dialect Options.  (line  462)
  * funsigned-char <1>:                    Characters implementation.
                                                               (line   31)
  * funswitch-loops:                       Optimize Options.   (line 2636)
*************** look up both forms.
*** 64481,64489 ****
  * fzero-call-used-regs:                  Optimize Options.   (line 2723)
  * fzero-initialized-in-bss:              Optimize Options.   (line  453)
  * fzero-link:                            Objective-C and Objective-C++ Dialect Options.
!                                                              (line  140)
  * g:                                     Debugging Options.  (line   28)
! * G:                                     ARC Options.        (line  416)
  * G <1>:                                 M32R/D Options.     (line   57)
  * G <2>:                                 MIPS Options.       (line  460)
  * G <3>:                                 Nios II Options.    (line    9)
--- 64669,64677 ----
  * fzero-call-used-regs:                  Optimize Options.   (line 2723)
  * fzero-initialized-in-bss:              Optimize Options.   (line  453)
  * fzero-link:                            Objective-C and Objective-C++ Dialect Options.
!                                                              (line  143)
  * g:                                     Debugging Options.  (line   28)
! * G:                                     ARC Options.        (line  414)
  * G <1>:                                 M32R/D Options.     (line   57)
  * G <2>:                                 MIPS Options.       (line  460)
  * G <3>:                                 Nios II Options.    (line    9)
*************** look up both forms.
*** 64500,64506 ****
  * gdwarf32:                              Debugging Options.  (line  212)
  * gdwarf64:                              Debugging Options.  (line  212)
  * gen-decls:                             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  166)
  * gfull:                                 Darwin Options.     (line   69)
  * ggdb:                                  Debugging Options.  (line   41)
  * ggnu-pubnames:                         Debugging Options.  (line  230)
--- 64688,64694 ----
  * gdwarf32:                              Debugging Options.  (line  212)
  * gdwarf64:                              Debugging Options.  (line  212)
  * gen-decls:                             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  169)
  * gfull:                                 Darwin Options.     (line   69)
  * ggdb:                                  Debugging Options.  (line   41)
  * ggnu-pubnames:                         Debugging Options.  (line  230)
*************** look up both forms.
*** 64531,64537 ****
  * gz:                                    Debugging Options.  (line  360)
  * H:                                     Preprocessor Options.
                                                               (line  405)
! * headerpad_max_install_names:           Darwin Options.     (line  196)
  * help:                                  Overall Options.    (line  478)
  * I:                                     Directory Options.  (line   13)
  * I-:                                    Directory Options.  (line   65)
--- 64719,64725 ----
  * gz:                                    Debugging Options.  (line  360)
  * H:                                     Preprocessor Options.
                                                               (line  405)
! * headerpad_max_install_names:           Darwin Options.     (line  204)
  * help:                                  Overall Options.    (line  478)
  * I:                                     Directory Options.  (line   13)
  * I-:                                    Directory Options.  (line   65)
*************** look up both forms.
*** 64539,64550 ****
  * iframework:                            Darwin Options.     (line   57)
  * imacros:                               Preprocessor Options.
                                                               (line   57)
! * image_base:                            Darwin Options.     (line  196)
  * imultilib:                             Directory Options.  (line   98)
  * include:                               Preprocessor Options.
                                                               (line   46)
! * init:                                  Darwin Options.     (line  196)
! * install_name:                          Darwin Options.     (line  196)
  * iplugindir=:                           Directory Options.  (line  113)
  * iprefix:                               Directory Options.  (line   80)
  * iquote:                                Directory Options.  (line   13)
--- 64727,64738 ----
  * iframework:                            Darwin Options.     (line   57)
  * imacros:                               Preprocessor Options.
                                                               (line   57)
! * image_base:                            Darwin Options.     (line  204)
  * imultilib:                             Directory Options.  (line   98)
  * include:                               Preprocessor Options.
                                                               (line   46)
! * init:                                  Darwin Options.     (line  204)
! * install_name:                          Darwin Options.     (line  204)
  * iplugindir=:                           Directory Options.  (line  113)
  * iprefix:                               Directory Options.  (line   80)
  * iquote:                                Directory Options.  (line   13)
*************** look up both forms.
*** 64552,64558 ****
  * isystem:                               Directory Options.  (line   13)
  * iwithprefix:                           Directory Options.  (line   86)
  * iwithprefixbefore:                     Directory Options.  (line   86)
! * keep_private_externs:                  Darwin Options.     (line  196)
  * l:                                     Link Options.       (line   87)
  * L:                                     Directory Options.  (line  118)
  * lobjc:                                 Link Options.       (line  113)
--- 64740,64746 ----
  * isystem:                               Directory Options.  (line   13)
  * iwithprefix:                           Directory Options.  (line   86)
  * iwithprefixbefore:                     Directory Options.  (line   86)
! * keep_private_externs:                  Darwin Options.     (line  204)
  * l:                                     Link Options.       (line   87)
  * L:                                     Directory Options.  (line  118)
  * lobjc:                                 Link Options.       (line  113)
*************** look up both forms.
*** 64563,64570 ****
  * m1:                                    SH Options.         (line    9)
  * m10:                                   PDP-11 Options.     (line   29)
  * m128bit-long-double:                   x86 Options.        (line  655)
! * m16:                                   x86 Options.        (line 1542)
! * m16-bit:                               CRIS Options.       (line   63)
  * m16-bit <1>:                           NDS32 Options.      (line   51)
  * m1reg-:                                Adapteva Epiphany Options.
                                                               (line  131)
--- 64751,64758 ----
  * m1:                                    SH Options.         (line    9)
  * m10:                                   PDP-11 Options.     (line   29)
  * m128bit-long-double:                   x86 Options.        (line  655)
! * m16:                                   x86 Options.        (line 1551)
! * m16-bit:                               CRIS Options.       (line   62)
  * m16-bit <1>:                           NDS32 Options.      (line   51)
  * m1reg-:                                Adapteva Epiphany Options.
                                                               (line  131)
*************** look up both forms.
*** 64582,64597 ****
  * m32 <1>:                               SPARC Options.      (line  315)
  * m32 <2>:                               TILE-Gx Options.    (line   23)
  * m32 <3>:                               TILEPro Options.    (line   13)
! * m32 <4>:                               x86 Options.        (line 1542)
! * m32-bit:                               CRIS Options.       (line   63)
  * m32bit-doubles:                        RL78 Options.       (line   73)
  * m32bit-doubles <1>:                    RX Options.         (line   10)
  * m32r:                                  M32R/D Options.     (line   15)
  * m32r2:                                 M32R/D Options.     (line    9)
  * m32rx:                                 M32R/D Options.     (line   12)
  * m340:                                  MCore Options.      (line   43)
! * m3dnow:                                x86 Options.        (line  878)
! * m3dnowa:                               x86 Options.        (line  879)
  * m3e:                                   SH Options.         (line   37)
  * m4:                                    SH Options.         (line   51)
  * m4-100:                                SH Options.         (line   54)
--- 64770,64785 ----
  * m32 <1>:                               SPARC Options.      (line  315)
  * m32 <2>:                               TILE-Gx Options.    (line   23)
  * m32 <3>:                               TILEPro Options.    (line   13)
! * m32 <4>:                               x86 Options.        (line 1551)
! * m32-bit:                               CRIS Options.       (line   62)
  * m32bit-doubles:                        RL78 Options.       (line   73)
  * m32bit-doubles <1>:                    RX Options.         (line   10)
  * m32r:                                  M32R/D Options.     (line   15)
  * m32r2:                                 M32R/D Options.     (line    9)
  * m32rx:                                 M32R/D Options.     (line   12)
  * m340:                                  MCore Options.      (line   43)
! * m3dnow:                                x86 Options.        (line  887)
! * m3dnowa:                               x86 Options.        (line  888)
  * m3e:                                   SH Options.         (line   37)
  * m4:                                    SH Options.         (line   51)
  * m4-100:                                SH Options.         (line   54)
*************** look up both forms.
*** 64631,64637 ****
                                                               (line   86)
  * m64 <3>:                               SPARC Options.      (line  315)
  * m64 <4>:                               TILE-Gx Options.    (line   23)
! * m64 <5>:                               x86 Options.        (line 1542)
  * m64bit-doubles:                        RL78 Options.       (line   73)
  * m64bit-doubles <1>:                    RX Options.         (line   10)
  * m68000:                                M680x0 Options.     (line   94)
--- 64819,64825 ----
                                                               (line   86)
  * m64 <3>:                               SPARC Options.      (line  315)
  * m64 <4>:                               TILE-Gx Options.    (line   23)
! * m64 <5>:                               x86 Options.        (line 1551)
  * m64bit-doubles:                        RL78 Options.       (line   73)
  * m64bit-doubles <1>:                    RX Options.         (line   10)
  * m68000:                                M680x0 Options.     (line   94)
*************** look up both forms.
*** 64643,64650 ****
  * m68040:                                M680x0 Options.     (line  118)
  * m68060:                                M680x0 Options.     (line  127)
  * m68881:                                M680x0 Options.     (line  195)
! * m8-bit:                                CRIS Options.       (line   63)
! * m8bit-idiv:                            x86 Options.        (line 1444)
  * m8byte-align:                          V850 Options.       (line  170)
  * m96bit-long-double:                    x86 Options.        (line  655)
  * mA6:                                   ARC Options.        (line   23)
--- 64831,64838 ----
  * m68040:                                M680x0 Options.     (line  118)
  * m68060:                                M680x0 Options.     (line  127)
  * m68881:                                M680x0 Options.     (line  195)
! * m8-bit:                                CRIS Options.       (line   62)
! * m8bit-idiv:                            x86 Options.        (line 1453)
  * m8byte-align:                          V850 Options.       (line  170)
  * m96bit-long-double:                    x86 Options.        (line  655)
  * mA6:                                   ARC Options.        (line   23)
*************** look up both forms.
*** 64656,64662 ****
  * mabi <4>:                              RISC-V Options.     (line   17)
  * mabi <5>:                              RS/6000 and PowerPC Options.
                                                               (line  552)
! * mabi <6>:                              x86 Options.        (line 1137)
  * mabi <7>:                              Xtensa Options.     (line  103)
  * mabi=32:                               MIPS Options.       (line  156)
  * mabi=64:                               MIPS Options.       (line  156)
--- 64844,64850 ----
  * mabi <4>:                              RISC-V Options.     (line   17)
  * mabi <5>:                              RS/6000 and PowerPC Options.
                                                               (line  552)
! * mabi <6>:                              x86 Options.        (line 1146)
  * mabi <7>:                              Xtensa Options.     (line  103)
  * mabi=32:                               MIPS Options.       (line  156)
  * mabi=64:                               MIPS Options.       (line  156)
*************** look up both forms.
*** 64676,64699 ****
  * mabi=o64:                              MIPS Options.       (line  156)
  * mabi=windowed:                         Xtensa Options.     (line  115)
  * mabicalls:                             MIPS Options.       (line  192)
! * mabm:                                  x86 Options.        (line  881)
  * mabort-on-noreturn:                    ARM Options.        (line  752)
  * mabs=2008:                             MIPS Options.       (line  300)
  * mabs=legacy:                           MIPS Options.       (line  300)
! * mabsdata:                              AVR Options.        (line  163)
  * mabsdiff:                              MeP Options.        (line    7)
  * mac0:                                  PDP-11 Options.     (line   16)
  * macc-4:                                FRV Options.        (line  139)
  * macc-8:                                FRV Options.        (line  143)
! * maccumulate-args:                      AVR Options.        (line  170)
  * maccumulate-outgoing-args:             SH Options.         (line  314)
! * maccumulate-outgoing-args <1>:         x86 Options.        (line 1181)
! * maddress-mode=long:                    x86 Options.        (line 1592)
! * maddress-mode=short:                   x86 Options.        (line 1597)
  * mads:                                  RS/6000 and PowerPC Options.
                                                               (line  614)
! * madx:                                  x86 Options.        (line  882)
! * maes:                                  x86 Options.        (line  859)
  * maix-struct-return:                    RS/6000 and PowerPC Options.
                                                               (line  545)
  * maix32:                                RS/6000 and PowerPC Options.
--- 64864,64887 ----
  * mabi=o64:                              MIPS Options.       (line  156)
  * mabi=windowed:                         Xtensa Options.     (line  115)
  * mabicalls:                             MIPS Options.       (line  192)
! * mabm:                                  x86 Options.        (line  890)
  * mabort-on-noreturn:                    ARM Options.        (line  752)
  * mabs=2008:                             MIPS Options.       (line  300)
  * mabs=legacy:                           MIPS Options.       (line  300)
! * mabsdata:                              AVR Options.        (line  180)
  * mabsdiff:                              MeP Options.        (line    7)
  * mac0:                                  PDP-11 Options.     (line   16)
  * macc-4:                                FRV Options.        (line  139)
  * macc-8:                                FRV Options.        (line  143)
! * maccumulate-args:                      AVR Options.        (line  187)
  * maccumulate-outgoing-args:             SH Options.         (line  314)
! * maccumulate-outgoing-args <1>:         x86 Options.        (line 1190)
! * maddress-mode=long:                    x86 Options.        (line 1601)
! * maddress-mode=short:                   x86 Options.        (line 1606)
  * mads:                                  RS/6000 and PowerPC Options.
                                                               (line  614)
! * madx:                                  x86 Options.        (line  891)
! * maes:                                  x86 Options.        (line  868)
  * maix-struct-return:                    RS/6000 and PowerPC Options.
                                                               (line  545)
  * maix32:                                RS/6000 and PowerPC Options.
*************** look up both forms.
*** 64701,64707 ****
  * maix64:                                RS/6000 and PowerPC Options.
                                                               (line  283)
  * malign-300:                            H8/300 Options.     (line   41)
! * malign-call:                           ARC Options.        (line  435)
  * malign-data:                           RISC-V Options.     (line  168)
  * malign-data <1>:                       x86 Options.        (line  695)
  * malign-double:                         x86 Options.        (line  640)
--- 64889,64895 ----
  * maix64:                                RS/6000 and PowerPC Options.
                                                               (line  283)
  * malign-300:                            H8/300 Options.     (line   41)
! * malign-call:                           ARC Options.        (line  433)
  * malign-data:                           RISC-V Options.     (line  168)
  * malign-data <1>:                       x86 Options.        (line  695)
  * malign-double:                         x86 Options.        (line  640)
*************** look up both forms.
*** 64712,64718 ****
                                                               (line  321)
  * malign-power:                          RS/6000 and PowerPC Options.
                                                               (line  321)
! * malign-stringops:                      x86 Options.        (line 1317)
  * mall-opts:                             MeP Options.        (line   11)
  * malloc-cc:                             FRV Options.        (line   31)
  * mallow-string-insns:                   RX Options.         (line  150)
--- 64900,64906 ----
                                                               (line  321)
  * malign-power:                          RS/6000 and PowerPC Options.
                                                               (line  321)
! * malign-stringops:                      x86 Options.        (line 1326)
  * mall-opts:                             MeP Options.        (line   11)
  * malloc-cc:                             FRV Options.        (line   31)
  * mallow-string-insns:                   RX Options.         (line  150)
*************** look up both forms.
*** 64723,64731 ****
  * mam33:                                 MN10300 Options.    (line   17)
  * mam33-2:                               MN10300 Options.    (line   24)
  * mam34:                                 MN10300 Options.    (line   27)
! * mamx-bf16:                             x86 Options.        (line  920)
! * mamx-int8:                             x86 Options.        (line  919)
! * mamx-tile:                             x86 Options.        (line  918)
  * manchor:                               C-SKY Options.      (line  126)
  * mandroid:                              GNU/Linux Options.  (line   26)
  * mannotate-align:                       ARC Options.        (line  382)
--- 64911,64919 ----
  * mam33:                                 MN10300 Options.    (line   17)
  * mam33-2:                               MN10300 Options.    (line   24)
  * mam34:                                 MN10300 Options.    (line   27)
! * mamx-bf16:                             x86 Options.        (line  929)
! * mamx-int8:                             x86 Options.        (line  928)
! * mamx-tile:                             x86 Options.        (line  927)
  * manchor:                               C-SKY Options.      (line  126)
  * mandroid:                              GNU/Linux Options.  (line   26)
  * mannotate-align:                       ARC Options.        (line  382)
*************** look up both forms.
*** 64755,64762 ****
  * march <15>:                            x86 Options.        (line    9)
  * march=:                                C-SKY Options.      (line    9)
  * marclinux:                             ARC Options.        (line  388)
! * marclinux_prof:                        ARC Options.        (line  395)
! * margonaut:                             ARC Options.        (line  586)
  * marm:                                  ARM Options.        (line  824)
  * mas100-syntax:                         RX Options.         (line   76)
  * masm-hex:                              MSP430 Options.     (line    9)
--- 64943,64950 ----
  * march <15>:                            x86 Options.        (line    9)
  * march=:                                C-SKY Options.      (line    9)
  * marclinux:                             ARC Options.        (line  388)
! * marclinux_prof:                        ARC Options.        (line  394)
! * margonaut:                             ARC Options.        (line  584)
  * marm:                                  ARM Options.        (line  824)
  * mas100-syntax:                         RX Options.         (line   76)
  * masm-hex:                              MSP430 Options.     (line    9)
*************** look up both forms.
*** 64765,64798 ****
  * matomic:                               ARC Options.        (line  155)
  * matomic-model=MODEL:                   SH Options.         (line  193)
  * mauto-litpools:                        Xtensa Options.     (line   60)
! * mauto-modify-reg:                      ARC Options.        (line  438)
  * mauto-pic:                             IA-64 Options.      (line   50)
  * maverage:                              MeP Options.        (line   16)
  * mavoid-indexed-addresses:              RS/6000 and PowerPC Options.
                                                               (line  360)
! * mavx:                                  x86 Options.        (line  847)
! * mavx2:                                 x86 Options.        (line  848)
! * mavx256-split-unaligned-load:          x86 Options.        (line 1452)
! * mavx256-split-unaligned-store:         x86 Options.        (line 1452)
! * mavx5124fmaps:                         x86 Options.        (line  912)
! * mavx5124vnniw:                         x86 Options.        (line  915)
! * mavx512bf16:                           x86 Options.        (line  898)
! * mavx512bitalg:                         x86 Options.        (line  904)
! * mavx512bw:                             x86 Options.        (line  854)
! * mavx512cd:                             x86 Options.        (line  852)
! * mavx512dq:                             x86 Options.        (line  855)
! * mavx512er:                             x86 Options.        (line  851)
! * mavx512f:                              x86 Options.        (line  849)
! * mavx512fp16:                           x86 Options.        (line  899)
! * mavx512ifma:                           x86 Options.        (line  856)
! * mavx512pf:                             x86 Options.        (line  850)
! * mavx512vbmi:                           x86 Options.        (line  857)
! * mavx512vbmi2:                          x86 Options.        (line  897)
! * mavx512vl:                             x86 Options.        (line  853)
! * mavx512vnni:                           x86 Options.        (line  913)
! * mavx512vp2intersect:                   x86 Options.        (line  911)
! * mavx512vpopcntdq:                      x86 Options.        (line  910)
! * mavxvnni:                              x86 Options.        (line  914)
  * max-vect-align:                        Adapteva Epiphany Options.
                                                               (line  119)
  * mb:                                    SH Options.         (line  126)
--- 64953,64986 ----
  * matomic:                               ARC Options.        (line  155)
  * matomic-model=MODEL:                   SH Options.         (line  193)
  * mauto-litpools:                        Xtensa Options.     (line   60)
! * mauto-modify-reg:                      ARC Options.        (line  436)
  * mauto-pic:                             IA-64 Options.      (line   50)
  * maverage:                              MeP Options.        (line   16)
  * mavoid-indexed-addresses:              RS/6000 and PowerPC Options.
                                                               (line  360)
! * mavx:                                  x86 Options.        (line  856)
! * mavx2:                                 x86 Options.        (line  857)
! * mavx256-split-unaligned-load:          x86 Options.        (line 1461)
! * mavx256-split-unaligned-store:         x86 Options.        (line 1461)
! * mavx5124fmaps:                         x86 Options.        (line  921)
! * mavx5124vnniw:                         x86 Options.        (line  924)
! * mavx512bf16:                           x86 Options.        (line  907)
! * mavx512bitalg:                         x86 Options.        (line  913)
! * mavx512bw:                             x86 Options.        (line  863)
! * mavx512cd:                             x86 Options.        (line  861)
! * mavx512dq:                             x86 Options.        (line  864)
! * mavx512er:                             x86 Options.        (line  860)
! * mavx512f:                              x86 Options.        (line  858)
! * mavx512fp16:                           x86 Options.        (line  908)
! * mavx512ifma:                           x86 Options.        (line  865)
! * mavx512pf:                             x86 Options.        (line  859)
! * mavx512vbmi:                           x86 Options.        (line  866)
! * mavx512vbmi2:                          x86 Options.        (line  906)
! * mavx512vl:                             x86 Options.        (line  862)
! * mavx512vnni:                           x86 Options.        (line  922)
! * mavx512vp2intersect:                   x86 Options.        (line  920)
! * mavx512vpopcntdq:                      x86 Options.        (line  919)
! * mavxvnni:                              x86 Options.        (line  923)
  * max-vect-align:                        Adapteva Epiphany Options.
                                                               (line  119)
  * mb:                                    SH Options.         (line  126)
*************** look up both forms.
*** 64800,64814 ****
                                                               (line   35)
  * mbarrel-shift-enabled:                 LM32 Options.       (line    9)
  * mbarrel-shifter:                       ARC Options.        (line   10)
! * mbarrel_shifter:                       ARC Options.        (line  606)
  * mbase-addresses:                       MMIX Options.       (line   53)
  * mbased=:                               MeP Options.        (line   20)
! * mbbit-peephole:                        ARC Options.        (line  441)
  * mbe8:                                  ARM Options.        (line   72)
  * mbig:                                  RS/6000 and PowerPC Options.
                                                               (line  440)
  * mbig-endian:                           AArch64 Options.    (line   20)
! * mbig-endian <1>:                       ARC Options.        (line  589)
  * mbig-endian <2>:                       ARM Options.        (line   67)
  * mbig-endian <3>:                       C6X Options.        (line   13)
  * mbig-endian <4>:                       C-SKY Options.      (line   28)
--- 64988,65002 ----
                                                               (line   35)
  * mbarrel-shift-enabled:                 LM32 Options.       (line    9)
  * mbarrel-shifter:                       ARC Options.        (line   10)
! * mbarrel_shifter:                       ARC Options.        (line  601)
  * mbase-addresses:                       MMIX Options.       (line   53)
  * mbased=:                               MeP Options.        (line   20)
! * mbbit-peephole:                        ARC Options.        (line  439)
  * mbe8:                                  ARM Options.        (line   72)
  * mbig:                                  RS/6000 and PowerPC Options.
                                                               (line  440)
  * mbig-endian:                           AArch64 Options.    (line   20)
! * mbig-endian <1>:                       ARC Options.        (line  587)
  * mbig-endian <2>:                       ARM Options.        (line   67)
  * mbig-endian <3>:                       C6X Options.        (line   13)
  * mbig-endian <4>:                       C-SKY Options.      (line   28)
*************** look up both forms.
*** 64837,64848 ****
                                                               (line  700)
  * mblock-move-inline-limit:              RS/6000 and PowerPC Options.
                                                               (line  688)
! * mbmi:                                  x86 Options.        (line  883)
! * mbmi2:                                 x86 Options.        (line  884)
  * mboard:                                OpenRISC Options.   (line    9)
  * mbranch-cost:                          Adapteva Epiphany Options.
                                                               (line   18)
! * mbranch-cost <1>:                      AVR Options.        (line  185)
  * mbranch-cost <2>:                      MIPS Options.       (line  791)
  * mbranch-cost <3>:                      RISC-V Options.     (line    9)
  * mbranch-cost=:                         C-SKY Options.      (line  159)
--- 65025,65036 ----
                                                               (line  700)
  * mblock-move-inline-limit:              RS/6000 and PowerPC Options.
                                                               (line  688)
! * mbmi:                                  x86 Options.        (line  892)
! * mbmi2:                                 x86 Options.        (line  893)
  * mboard:                                OpenRISC Options.   (line    9)
  * mbranch-cost:                          Adapteva Epiphany Options.
                                                               (line   18)
! * mbranch-cost <1>:                      AVR Options.        (line  202)
  * mbranch-cost <2>:                      MIPS Options.       (line  791)
  * mbranch-cost <3>:                      RISC-V Options.     (line    9)
  * mbranch-cost=:                         C-SKY Options.      (line  159)
*************** look up both forms.
*** 64869,64880 ****
                                                               (line  529)
  * mcall-linux:                           RS/6000 and PowerPC Options.
                                                               (line  525)
! * mcall-ms2sysv-xlogues:                 x86 Options.        (line 1157)
  * mcall-netbsd:                          RS/6000 and PowerPC Options.
                                                               (line  533)
  * mcall-netbsd <1>:                      RS/6000 and PowerPC Options.
                                                               (line  537)
! * mcall-prologues:                       AVR Options.        (line  190)
  * mcall-sysv:                            RS/6000 and PowerPC Options.
                                                               (line  507)
  * mcall-sysv-eabi:                       RS/6000 and PowerPC Options.
--- 65057,65068 ----
                                                               (line  529)
  * mcall-linux:                           RS/6000 and PowerPC Options.
                                                               (line  525)
! * mcall-ms2sysv-xlogues:                 x86 Options.        (line 1166)
  * mcall-netbsd:                          RS/6000 and PowerPC Options.
                                                               (line  533)
  * mcall-netbsd <1>:                      RS/6000 and PowerPC Options.
                                                               (line  537)
! * mcall-prologues:                       AVR Options.        (line  207)
  * mcall-sysv:                            RS/6000 and PowerPC Options.
                                                               (line  507)
  * mcall-sysv-eabi:                       RS/6000 and PowerPC Options.
*************** look up both forms.
*** 64885,64925 ****
  * mcaller-copies:                        HPPA Options.       (line   23)
  * mcaller-super-interworking:            ARM Options.        (line  860)
  * mcallgraph-data:                       MCore Options.      (line   31)
! * mcase-vector-pcrel:                    ARC Options.        (line  450)
  * mcbcond:                               SPARC Options.      (line  260)
  * mcbranch-force-delay-slot:             SH Options.         (line  349)
! * mcc-init:                              CRIS Options.       (line   41)
  * mccrt:                                 C-SKY Options.      (line  155)
  * mcfv4e:                                M680x0 Options.     (line  170)
  * mcheck-zero-division:                  MIPS Options.       (line  570)
  * mcix:                                  DEC Alpha Options.  (line  163)
! * mcld:                                  x86 Options.        (line  975)
! * mcldemote:                             x86 Options.        (line  916)
  * mclear-hwcap:                          Solaris 2 Options.  (line    9)
! * mclflushopt:                           x86 Options.        (line  861)
  * mclip:                                 MeP Options.        (line   35)
! * mclwb:                                 x86 Options.        (line  862)
! * mclzero:                               x86 Options.        (line  895)
  * mcmodel:                               NDS32 Options.      (line   67)
  * mcmodel <1>:                           SPARC Options.      (line  320)
! * mcmodel=kernel:                        x86 Options.        (line 1576)
  * mcmodel=large:                         AArch64 Options.    (line   45)
  * mcmodel=large <1>:                     OpenRISC Options.   (line   77)
  * mcmodel=large <2>:                     RS/6000 and PowerPC Options.
                                                               (line  131)
  * mcmodel=large <3>:                     TILE-Gx Options.    (line   14)
! * mcmodel=large <4>:                     x86 Options.        (line 1588)
  * mcmodel=medany:                        RISC-V Options.     (line  142)
  * mcmodel=medium:                        RS/6000 and PowerPC Options.
                                                               (line  126)
! * mcmodel=medium <1>:                    x86 Options.        (line 1581)
  * mcmodel=medlow:                        RISC-V Options.     (line  135)
  * mcmodel=small:                         AArch64 Options.    (line   39)
  * mcmodel=small <1>:                     OpenRISC Options.   (line   73)
  * mcmodel=small <2>:                     RS/6000 and PowerPC Options.
                                                               (line  122)
  * mcmodel=small <3>:                     TILE-Gx Options.    (line    9)
! * mcmodel=small <4>:                     x86 Options.        (line 1570)
  * mcmodel=tiny:                          AArch64 Options.    (line   34)
  * mcmov:                                 NDS32 Options.      (line   21)
  * mcmov <1>:                             OpenRISC Options.   (line   45)
--- 65073,65113 ----
  * mcaller-copies:                        HPPA Options.       (line   23)
  * mcaller-super-interworking:            ARM Options.        (line  860)
  * mcallgraph-data:                       MCore Options.      (line   31)
! * mcase-vector-pcrel:                    ARC Options.        (line  448)
  * mcbcond:                               SPARC Options.      (line  260)
  * mcbranch-force-delay-slot:             SH Options.         (line  349)
! * mcc-init:                              CRIS Options.       (line   40)
  * mccrt:                                 C-SKY Options.      (line  155)
  * mcfv4e:                                M680x0 Options.     (line  170)
  * mcheck-zero-division:                  MIPS Options.       (line  570)
  * mcix:                                  DEC Alpha Options.  (line  163)
! * mcld:                                  x86 Options.        (line  984)
! * mcldemote:                             x86 Options.        (line  925)
  * mclear-hwcap:                          Solaris 2 Options.  (line    9)
! * mclflushopt:                           x86 Options.        (line  870)
  * mclip:                                 MeP Options.        (line   35)
! * mclwb:                                 x86 Options.        (line  871)
! * mclzero:                               x86 Options.        (line  904)
  * mcmodel:                               NDS32 Options.      (line   67)
  * mcmodel <1>:                           SPARC Options.      (line  320)
! * mcmodel=kernel:                        x86 Options.        (line 1585)
  * mcmodel=large:                         AArch64 Options.    (line   45)
  * mcmodel=large <1>:                     OpenRISC Options.   (line   77)
  * mcmodel=large <2>:                     RS/6000 and PowerPC Options.
                                                               (line  131)
  * mcmodel=large <3>:                     TILE-Gx Options.    (line   14)
! * mcmodel=large <4>:                     x86 Options.        (line 1597)
  * mcmodel=medany:                        RISC-V Options.     (line  142)
  * mcmodel=medium:                        RS/6000 and PowerPC Options.
                                                               (line  126)
! * mcmodel=medium <1>:                    x86 Options.        (line 1590)
  * mcmodel=medlow:                        RISC-V Options.     (line  135)
  * mcmodel=small:                         AArch64 Options.    (line   39)
  * mcmodel=small <1>:                     OpenRISC Options.   (line   73)
  * mcmodel=small <2>:                     RS/6000 and PowerPC Options.
                                                               (line  122)
  * mcmodel=small <3>:                     TILE-Gx Options.    (line    9)
! * mcmodel=small <4>:                     x86 Options.        (line 1579)
  * mcmodel=tiny:                          AArch64 Options.    (line   34)
  * mcmov:                                 NDS32 Options.      (line   21)
  * mcmov <1>:                             OpenRISC Options.   (line   45)
*************** look up both forms.
*** 64930,64942 ****
  * mcmse:                                 ARM Options.        (line  961)
  * mco-re:                                eBPF Options.       (line   56)
  * mcode-density:                         ARC Options.        (line  163)
! * mcode-density-frame:                   ARC Options.        (line  511)
  * mcode-readable:                        MIPS Options.       (line  530)
  * mcode-region:                          MSP430 Options.     (line  150)
  * mcompact-branches=always:              MIPS Options.       (line  810)
  * mcompact-branches=never:               MIPS Options.       (line  810)
  * mcompact-branches=optimal:             MIPS Options.       (line  810)
! * mcompact-casesi:                       ARC Options.        (line  454)
  * mcompat-align-parm:                    RS/6000 and PowerPC Options.
                                                               (line  899)
  * mcompress:                             FT32 Options.       (line   26)
--- 65118,65130 ----
  * mcmse:                                 ARM Options.        (line  961)
  * mco-re:                                eBPF Options.       (line   56)
  * mcode-density:                         ARC Options.        (line  163)
! * mcode-density-frame:                   ARC Options.        (line  509)
  * mcode-readable:                        MIPS Options.       (line  530)
  * mcode-region:                          MSP430 Options.     (line  150)
  * mcompact-branches=always:              MIPS Options.       (line  810)
  * mcompact-branches=never:               MIPS Options.       (line  810)
  * mcompact-branches=optimal:             MIPS Options.       (line  810)
! * mcompact-casesi:                       ARC Options.        (line  452)
  * mcompat-align-parm:                    RS/6000 and PowerPC Options.
                                                               (line  899)
  * mcompress:                             FT32 Options.       (line   26)
*************** look up both forms.
*** 64945,64952 ****
  * mconfig=:                              MeP Options.        (line   39)
  * mconsole:                              x86 Windows Options.
                                                               (line    9)
! * mconst-align:                          CRIS Options.       (line   54)
  * mconst16:                              Xtensa Options.     (line   10)
  * mconstant-gp:                          IA-64 Options.      (line   46)
  * mconstpool:                            C-SKY Options.      (line  143)
  * mcop:                                  MeP Options.        (line   48)
--- 65133,65141 ----
  * mconfig=:                              MeP Options.        (line   39)
  * mconsole:                              x86 Windows Options.
                                                               (line    9)
! * mconst-align:                          CRIS Options.       (line   53)
  * mconst16:                              Xtensa Options.     (line   10)
+ * mconstant-cfstrings:                   Darwin Options.     (line   74)
  * mconstant-gp:                          IA-64 Options.      (line   46)
  * mconstpool:                            C-SKY Options.      (line  143)
  * mcop:                                  MeP Options.        (line   48)
*************** look up both forms.
*** 64983,64989 ****
  * mcr16c:                                CR16 Options.       (line   14)
  * mcr16cplus:                            CR16 Options.       (line   14)
  * mcrc:                                  MIPS Options.       (line  416)
! * mcrc32:                                x86 Options.        (line 1053)
  * mcrypto:                               RS/6000 and PowerPC Options.
                                                               (line  178)
  * mcsync-anomaly:                        Blackfin Options.   (line   57)
--- 65172,65178 ----
  * mcr16c:                                CR16 Options.       (line   14)
  * mcr16cplus:                            CR16 Options.       (line   14)
  * mcrc:                                  MIPS Options.       (line  416)
! * mcrc32:                                x86 Options.        (line 1062)
  * mcrypto:                               RS/6000 and PowerPC Options.
                                                               (line  178)
  * mcsync-anomaly:                        Blackfin Options.   (line   57)
*************** look up both forms.
*** 64991,65003 ****
  * mctor-dtor:                            NDS32 Options.      (line   81)
  * mcustom-fpu-cfg:                       Nios II Options.    (line  259)
  * mcustom-INSN:                          Nios II Options.    (line  139)
! * mcx16:                                 x86 Options.        (line 1026)
  * MD:                                    Preprocessor Options.
                                                               (line  172)
  * mdalign:                               SH Options.         (line  132)
! * mdata-align:                           CRIS Options.       (line   54)
  * mdata-model:                           CR16 Options.       (line   28)
  * mdata-region:                          MSP430 Options.     (line  150)
  * mdc:                                   MeP Options.        (line   62)
  * mdebug:                                M32R/D Options.     (line   69)
  * mdebug <1>:                            S/390 and zSeries Options.
--- 65180,65193 ----
  * mctor-dtor:                            NDS32 Options.      (line   81)
  * mcustom-fpu-cfg:                       Nios II Options.    (line  259)
  * mcustom-INSN:                          Nios II Options.    (line  139)
! * mcx16:                                 x86 Options.        (line 1035)
  * MD:                                    Preprocessor Options.
                                                               (line  172)
  * mdalign:                               SH Options.         (line  132)
! * mdata-align:                           CRIS Options.       (line   53)
  * mdata-model:                           CR16 Options.       (line   28)
  * mdata-region:                          MSP430 Options.     (line  150)
+ * mdaz-ftz:                              x86 Options.        (line  783)
  * mdc:                                   MeP Options.        (line   62)
  * mdebug:                                M32R/D Options.     (line   69)
  * mdebug <1>:                            S/390 and zSeries Options.
*************** look up both forms.
*** 65005,65011 ****
  * mdebug <2>:                            Visium Options.     (line    7)
  * mdebug-main=PREFIX:                    VMS Options.        (line   13)
  * mdec-asm:                              PDP-11 Options.     (line   46)
! * mdirect-extern-access:                 x86 Options.        (line 1608)
  * mdisable-callt:                        V850 Options.       (line   92)
  * mdisable-fpregs:                       HPPA Options.       (line   34)
  * mdisable-indexing:                     HPPA Options.       (line   40)
--- 65195,65201 ----
  * mdebug <2>:                            Visium Options.     (line    7)
  * mdebug-main=PREFIX:                    VMS Options.        (line   13)
  * mdec-asm:                              PDP-11 Options.     (line   46)
! * mdirect-extern-access:                 x86 Options.        (line 1617)
  * mdisable-callt:                        V850 Options.       (line   92)
  * mdisable-fpregs:                       HPPA Options.       (line   34)
  * mdisable-indexing:                     HPPA Options.       (line   40)
*************** look up both forms.
*** 65025,65031 ****
  * mdlmzb:                                RS/6000 and PowerPC Options.
                                                               (line  385)
  * mdmx:                                  MIPS Options.       (line  376)
! * mdouble:                               AVR Options.        (line  195)
  * mdouble <1>:                           FRV Options.        (line   48)
  * mdouble-float:                         C-SKY Options.      (line   58)
  * mdouble-float <1>:                     MIPS Options.       (line  288)
--- 65215,65221 ----
  * mdlmzb:                                RS/6000 and PowerPC Options.
                                                               (line  385)
  * mdmx:                                  MIPS Options.       (line  376)
! * mdouble:                               AVR Options.        (line  212)
  * mdouble <1>:                           FRV Options.        (line   48)
  * mdouble-float:                         C-SKY Options.      (line   58)
  * mdouble-float <1>:                     MIPS Options.       (line  288)
*************** look up both forms.
*** 65033,65046 ****
  * mdpfp:                                 ARC Options.        (line   99)
  * mdpfp-compact:                         ARC Options.        (line  100)
  * mdpfp-fast:                            ARC Options.        (line  104)
! * mdpfp_compact:                         ARC Options.        (line  609)
! * mdpfp_fast:                            ARC Options.        (line  612)
  * mdsp:                                  C-SKY Options.      (line  102)
  * mdsp <1>:                              MIPS Options.       (line  353)
  * mdsp-packa:                            ARC Options.        (line  335)
  * mdspr2:                                MIPS Options.       (line  359)
! * mdsp_packa:                            ARC Options.        (line  615)
! * mdump-tune-features:                   x86 Options.        (line  957)
  * mdvbf:                                 ARC Options.        (line  340)
  * mdwarf2-asm:                           IA-64 Options.      (line   94)
  * mdword:                                FRV Options.        (line   40)
--- 65223,65236 ----
  * mdpfp:                                 ARC Options.        (line   99)
  * mdpfp-compact:                         ARC Options.        (line  100)
  * mdpfp-fast:                            ARC Options.        (line  104)
! * mdpfp_compact:                         ARC Options.        (line  604)
! * mdpfp_fast:                            ARC Options.        (line  607)
  * mdsp:                                  C-SKY Options.      (line  102)
  * mdsp <1>:                              MIPS Options.       (line  353)
  * mdsp-packa:                            ARC Options.        (line  335)
  * mdspr2:                                MIPS Options.       (line  359)
! * mdsp_packa:                            ARC Options.        (line  610)
! * mdump-tune-features:                   x86 Options.        (line  966)
  * mdvbf:                                 ARC Options.        (line  340)
  * mdwarf2-asm:                           IA-64 Options.      (line   94)
  * mdword:                                FRV Options.        (line   40)
*************** look up both forms.
*** 65048,65057 ****
  * mdynamic-no-pic:                       RS/6000 and PowerPC Options.
                                                               (line  445)
  * mea:                                   ARC Options.        (line  112)
! * mEA:                                   ARC Options.        (line  618)
  * meabi:                                 RS/6000 and PowerPC Options.
                                                               (line  633)
! * mearly-cbranchsi:                      ARC Options.        (line  476)
  * mearly-stop-bits:                      IA-64 Options.      (line  100)
  * meb:                                   MeP Options.        (line   68)
  * meb <1>:                               Moxie Options.      (line    7)
--- 65238,65247 ----
  * mdynamic-no-pic:                       RS/6000 and PowerPC Options.
                                                               (line  445)
  * mea:                                   ARC Options.        (line  112)
! * mEA:                                   ARC Options.        (line  613)
  * meabi:                                 RS/6000 and PowerPC Options.
                                                               (line  633)
! * mearly-cbranchsi:                      ARC Options.        (line  474)
  * mearly-stop-bits:                      IA-64 Options.      (line  100)
  * meb:                                   MeP Options.        (line   68)
  * meb <1>:                               Moxie Options.      (line    7)
*************** look up both forms.
*** 65062,65083 ****
  * mel <1>:                               Moxie Options.      (line   11)
  * mel <2>:                               Nios II Options.    (line   90)
  * mel <3>:                               Score Options.      (line   12)
! * melf:                                  CRIS Options.       (line   79)
  * melf <1>:                              MMIX Options.       (line   43)
  * melrw:                                 C-SKY Options.      (line   76)
  * memb:                                  RS/6000 and PowerPC Options.
                                                               (line  628)
  * membedded-data:                        MIPS Options.       (line  517)
  * memregs=:                              M32C Options.       (line   21)
! * menqcmd:                               x86 Options.        (line  907)
  * mep:                                   V850 Options.       (line   16)
  * mepsilon:                              MMIX Options.       (line   15)
  * mesa:                                  S/390 and zSeries Options.
                                                               (line   94)
! * metrax100:                             CRIS Options.       (line   26)
! * metrax4:                               CRIS Options.       (line   26)
  * meva:                                  MIPS Options.       (line  403)
! * mexpand-adddi:                         ARC Options.        (line  479)
  * mexplicit-relocs:                      DEC Alpha Options.  (line  176)
  * mexplicit-relocs <1>:                  MIPS Options.       (line  561)
  * mexr:                                  H8/300 Options.     (line   28)
--- 65252,65273 ----
  * mel <1>:                               Moxie Options.      (line   11)
  * mel <2>:                               Nios II Options.    (line   90)
  * mel <3>:                               Score Options.      (line   12)
! * melf:                                  CRIS Options.       (line   78)
  * melf <1>:                              MMIX Options.       (line   43)
  * melrw:                                 C-SKY Options.      (line   76)
  * memb:                                  RS/6000 and PowerPC Options.
                                                               (line  628)
  * membedded-data:                        MIPS Options.       (line  517)
  * memregs=:                              M32C Options.       (line   21)
! * menqcmd:                               x86 Options.        (line  916)
  * mep:                                   V850 Options.       (line   16)
  * mepsilon:                              MMIX Options.       (line   15)
  * mesa:                                  S/390 and zSeries Options.
                                                               (line   94)
! * metrax100:                             CRIS Options.       (line   25)
! * metrax4:                               CRIS Options.       (line   25)
  * meva:                                  MIPS Options.       (line  403)
! * mexpand-adddi:                         ARC Options.        (line  477)
  * mexplicit-relocs:                      DEC Alpha Options.  (line  176)
  * mexplicit-relocs <1>:                  MIPS Options.       (line  561)
  * mexr:                                  H8/300 Options.     (line   28)
*************** look up both forms.
*** 65088,65094 ****
  * mextern-sdata:                         MIPS Options.       (line  480)
  * MF:                                    Preprocessor Options.
                                                               (line  111)
! * mf16c:                                 x86 Options.        (line  866)
  * mfancy-math-387:                       x86 Options.        (line  630)
  * mfast-fp:                              Blackfin Options.   (line  130)
  * mfast-indirect-calls:                  HPPA Options.       (line   52)
--- 65278,65284 ----
  * mextern-sdata:                         MIPS Options.       (line  480)
  * MF:                                    Preprocessor Options.
                                                               (line  111)
! * mf16c:                                 x86 Options.        (line  875)
  * mfancy-math-387:                       x86 Options.        (line  630)
  * mfast-fp:                              Blackfin Options.   (line  130)
  * mfast-indirect-calls:                  HPPA Options.       (line   52)
*************** look up both forms.
*** 65098,65109 ****
  * mfdivdu:                               C-SKY Options.      (line   64)
  * mfdpic:                                ARM Options.        (line  984)
  * mfdpic <1>:                            FRV Options.        (line   72)
! * mfentry:                               x86 Options.        (line 1391)
! * mfentry-name:                          x86 Options.        (line 1422)
! * mfentry-section:                       x86 Options.        (line 1426)
  * mfix:                                  DEC Alpha Options.  (line  163)
  * mfix-24k:                              MIPS Options.       (line  647)
! * mfix-and-continue:                     Darwin Options.     (line  104)
  * mfix-at697f:                           SPARC Options.      (line  294)
  * mfix-cmse-cve-2021-35465:              ARM Options.        (line  967)
  * mfix-cortex-a53-835769:                AArch64 Options.    (line   90)
--- 65288,65299 ----
  * mfdivdu:                               C-SKY Options.      (line   64)
  * mfdpic:                                ARM Options.        (line  984)
  * mfdpic <1>:                            FRV Options.        (line   72)
! * mfentry:                               x86 Options.        (line 1400)
! * mfentry-name:                          x86 Options.        (line 1431)
! * mfentry-section:                       x86 Options.        (line 1435)
  * mfix:                                  DEC Alpha Options.  (line  163)
  * mfix-24k:                              MIPS Options.       (line  647)
! * mfix-and-continue:                     Darwin Options.     (line  112)
  * mfix-at697f:                           SPARC Options.      (line  294)
  * mfix-cmse-cve-2021-35465:              ARM Options.        (line  967)
  * mfix-cortex-a53-835769:                AArch64 Options.    (line   90)
*************** look up both forms.
*** 65138,65148 ****
  * mflush-func:                           MIPS Options.       (line  782)
  * mflush-func=NAME:                      M32R/D Options.     (line   93)
  * mflush-trap=NUMBER:                    M32R/D Options.     (line   86)
! * mfma:                                  x86 Options.        (line  867)
! * mfma4:                                 x86 Options.        (line  870)
  * mfmaf:                                 SPARC Options.      (line  267)
  * mfmovd:                                SH Options.         (line  148)
! * mforce-indirect-call:                  x86 Options.        (line 1146)
  * mforce-no-pic:                         Xtensa Options.     (line   41)
  * mfp-exceptions:                        MIPS Options.       (line  830)
  * mfp-mode:                              Adapteva Epiphany Options.
--- 65328,65338 ----
  * mflush-func:                           MIPS Options.       (line  782)
  * mflush-func=NAME:                      M32R/D Options.     (line   93)
  * mflush-trap=NUMBER:                    M32R/D Options.     (line   86)
! * mfma:                                  x86 Options.        (line  876)
! * mfma4:                                 x86 Options.        (line  879)
  * mfmaf:                                 SPARC Options.      (line  267)
  * mfmovd:                                SH Options.         (line  148)
! * mforce-indirect-call:                  x86 Options.        (line 1155)
  * mforce-no-pic:                         Xtensa Options.     (line   41)
  * mfp-exceptions:                        MIPS Options.       (line  830)
  * mfp-mode:                              Adapteva Epiphany Options.
*************** look up both forms.
*** 65168,65186 ****
  * mfpu <5>:                              Visium Options.     (line   19)
  * mfpu=:                                 C-SKY Options.      (line   69)
  * mfpxx:                                 MIPS Options.       (line  264)
! * mfract-convert-truncate:               AVR Options.        (line  286)
  * mframe-header-opt:                     MIPS Options.       (line  891)
  * mfriz:                                 RS/6000 and PowerPC Options.
                                                               (line  870)
  * mfsca:                                 SH Options.         (line  365)
! * mfsgsbase:                             x86 Options.        (line  863)
  * mfsmuld:                               SPARC Options.      (line  274)
  * mfsrra:                                SH Options.         (line  374)
  * mft32b:                                FT32 Options.       (line   23)
  * mfull-regs:                            NDS32 Options.      (line   18)
  * mfull-toc:                             RS/6000 and PowerPC Options.
                                                               (line  256)
! * mfunction-return:                      x86 Options.        (line 1500)
  * mfused-madd:                           IA-64 Options.      (line   88)
  * mfused-madd <1>:                       MIPS Options.       (line  630)
  * mfused-madd <2>:                       RS/6000 and PowerPC Options.
--- 65358,65376 ----
  * mfpu <5>:                              Visium Options.     (line   19)
  * mfpu=:                                 C-SKY Options.      (line   69)
  * mfpxx:                                 MIPS Options.       (line  264)
! * mfract-convert-truncate:               AVR Options.        (line  302)
  * mframe-header-opt:                     MIPS Options.       (line  891)
  * mfriz:                                 RS/6000 and PowerPC Options.
                                                               (line  870)
  * mfsca:                                 SH Options.         (line  365)
! * mfsgsbase:                             x86 Options.        (line  872)
  * mfsmuld:                               SPARC Options.      (line  274)
  * mfsrra:                                SH Options.         (line  374)
  * mft32b:                                FT32 Options.       (line   23)
  * mfull-regs:                            NDS32 Options.      (line   18)
  * mfull-toc:                             RS/6000 and PowerPC Options.
                                                               (line  256)
! * mfunction-return:                      x86 Options.        (line 1509)
  * mfused-madd:                           IA-64 Options.      (line   88)
  * mfused-madd <1>:                       MIPS Options.       (line  630)
  * mfused-madd <2>:                       RS/6000 and PowerPC Options.
*************** look up both forms.
*** 65189,65195 ****
                                                               (line  183)
  * mfused-madd <4>:                       SH Options.         (line  356)
  * mfused-madd <5>:                       Xtensa Options.     (line   19)
! * mfxsr:                                 x86 Options.        (line  886)
  * MG:                                    Preprocessor Options.
                                                               (line  122)
  * mg:                                    VAX Options.        (line   17)
--- 65379,65385 ----
                                                               (line  183)
  * mfused-madd <4>:                       SH Options.         (line  356)
  * mfused-madd <5>:                       Xtensa Options.     (line   19)
! * mfxsr:                                 x86 Options.        (line  895)
  * MG:                                    Preprocessor Options.
                                                               (line  122)
  * mg:                                    VAX Options.        (line   17)
*************** look up both forms.
*** 65197,65208 ****
  * mg13:                                  RL78 Options.       (line   62)
  * mg14:                                  RL78 Options.       (line   62)
  * mgas:                                  HPPA Options.       (line   75)
! * mgas-isr-prologues:                    AVR Options.        (line  203)
  * mgcc-abi:                              V850 Options.       (line  148)
  * mgeneral-regs-only:                    AArch64 Options.    (line   24)
  * mgeneral-regs-only <1>:                ARM Options.        (line   57)
! * mgeneral-regs-only <2>:                x86 Options.        (line 1470)
! * mgfni:                                 x86 Options.        (line  900)
  * mghs:                                  V850 Options.       (line  127)
  * mginv:                                 MIPS Options.       (line  421)
  * mglibc:                                GNU/Linux Options.  (line    9)
--- 65387,65398 ----
  * mg13:                                  RL78 Options.       (line   62)
  * mg14:                                  RL78 Options.       (line   62)
  * mgas:                                  HPPA Options.       (line   75)
! * mgas-isr-prologues:                    AVR Options.        (line  220)
  * mgcc-abi:                              V850 Options.       (line  148)
  * mgeneral-regs-only:                    AArch64 Options.    (line   24)
  * mgeneral-regs-only <1>:                ARM Options.        (line   57)
! * mgeneral-regs-only <2>:                x86 Options.        (line 1479)
! * mgfni:                                 x86 Options.        (line  909)
  * mghs:                                  V850 Options.       (line  127)
  * mginv:                                 MIPS Options.       (line  421)
  * mglibc:                                GNU/Linux Options.  (line    9)
*************** look up both forms.
*** 65248,65261 ****
  * mhard-mul:                             OpenRISC Options.   (line   24)
  * mhard-quad-float:                      SPARC Options.      (line   55)
  * mharden-sls:                           AArch64 Options.    (line  301)
! * mharden-sls <1>:                       x86 Options.        (line 1522)
  * mhardlit:                              MCore Options.      (line   10)
  * mhigh-registers:                       C-SKY Options.      (line  120)
! * mhle:                                  x86 Options.        (line  892)
  * mhotpatch:                             S/390 and zSeries Options.
                                                               (line  218)
  * mhp-ld:                                HPPA Options.       (line  123)
! * mhreset:                               x86 Options.        (line  921)
  * mhtm:                                  RS/6000 and PowerPC Options.
                                                               (line  184)
  * mhtm <1>:                              S/390 and zSeries Options.
--- 65438,65451 ----
  * mhard-mul:                             OpenRISC Options.   (line   24)
  * mhard-quad-float:                      SPARC Options.      (line   55)
  * mharden-sls:                           AArch64 Options.    (line  301)
! * mharden-sls <1>:                       x86 Options.        (line 1531)
  * mhardlit:                              MCore Options.      (line   10)
  * mhigh-registers:                       C-SKY Options.      (line  120)
! * mhle:                                  x86 Options.        (line  901)
  * mhotpatch:                             S/390 and zSeries Options.
                                                               (line  218)
  * mhp-ld:                                HPPA Options.       (line  123)
! * mhreset:                               x86 Options.        (line  930)
  * mhtm:                                  RS/6000 and PowerPC Options.
                                                               (line  184)
  * mhtm <1>:                              S/390 and zSeries Options.
*************** look up both forms.
*** 65264,65270 ****
  * mhw-mul:                               Nios II Options.    (line  124)
  * mhw-mulx:                              Nios II Options.    (line  124)
  * mhwmult=:                              MSP430 Options.     (line   93)
! * miamcu:                                x86 Options.        (line 1542)
  * micplb:                                Blackfin Options.   (line  175)
  * mid-shared-library:                    Blackfin Options.   (line   78)
  * mid-shared-library <1>:                Blackfin Options.   (line   85)
--- 65454,65460 ----
  * mhw-mul:                               Nios II Options.    (line  124)
  * mhw-mulx:                              Nios II Options.    (line  124)
  * mhwmult=:                              MSP430 Options.     (line   93)
! * miamcu:                                x86 Options.        (line 1551)
  * micplb:                                Blackfin Options.   (line  175)
  * mid-shared-library:                    Blackfin Options.   (line   78)
  * mid-shared-library <1>:                Blackfin Options.   (line   85)
*************** look up both forms.
*** 65276,65287 ****
  * milp32:                                IA-64 Options.      (line  121)
  * mimadd:                                MIPS Options.       (line  623)
  * mimpure-text:                          Solaris 2 Options.  (line   15)
! * mincoming-stack-boundary:              x86 Options.        (line  813)
! * mindexed-loads:                        ARC Options.        (line  483)
! * mindirect-branch:                      x86 Options.        (line 1481)
! * mindirect-branch-cs-prefix:            x86 Options.        (line 1529)
! * mindirect-branch-register:             x86 Options.        (line 1519)
! * minline-all-stringops:                 x86 Options.        (line 1322)
  * minline-float-divide-max-throughput:   IA-64 Options.      (line   58)
  * minline-float-divide-min-latency:      IA-64 Options.      (line   54)
  * minline-ic_invalidate:                 SH Options.         (line  174)
--- 65466,65477 ----
  * milp32:                                IA-64 Options.      (line  121)
  * mimadd:                                MIPS Options.       (line  623)
  * mimpure-text:                          Solaris 2 Options.  (line   15)
! * mincoming-stack-boundary:              x86 Options.        (line  822)
! * mindexed-loads:                        ARC Options.        (line  481)
! * mindirect-branch:                      x86 Options.        (line 1490)
! * mindirect-branch-cs-prefix:            x86 Options.        (line 1538)
! * mindirect-branch-register:             x86 Options.        (line 1528)
! * minline-all-stringops:                 x86 Options.        (line 1331)
  * minline-float-divide-max-throughput:   IA-64 Options.      (line   58)
  * minline-float-divide-min-latency:      IA-64 Options.      (line   54)
  * minline-ic_invalidate:                 SH Options.         (line  174)
*************** look up both forms.
*** 65292,65309 ****
  * minline-plt <1>:                       FRV Options.        (line   81)
  * minline-sqrt-max-throughput:           IA-64 Options.      (line   80)
  * minline-sqrt-min-latency:              IA-64 Options.      (line   76)
! * minline-stringops-dynamically:         x86 Options.        (line 1330)
  * minrt:                                 MSP430 Options.     (line  115)
  * minrt <1>:                             PRU Options.        (line    9)
  * minsert-sched-nops:                    RS/6000 and PowerPC Options.
                                                               (line  485)
! * minstrument-return:                    x86 Options.        (line 1410)
  * mint-register:                         RX Options.         (line  100)
  * mint16:                                PDP-11 Options.     (line   33)
  * mint32:                                CR16 Options.       (line   22)
  * mint32 <1>:                            H8/300 Options.     (line   38)
  * mint32 <2>:                            PDP-11 Options.     (line   37)
! * mint8:                                 AVR Options.        (line  213)
  * minterlink-compressed:                 MIPS Options.       (line  135)
  * minterlink-mips16:                     MIPS Options.       (line  147)
  * mio-volatile:                          MeP Options.        (line   74)
--- 65482,65499 ----
  * minline-plt <1>:                       FRV Options.        (line   81)
  * minline-sqrt-max-throughput:           IA-64 Options.      (line   80)
  * minline-sqrt-min-latency:              IA-64 Options.      (line   76)
! * minline-stringops-dynamically:         x86 Options.        (line 1339)
  * minrt:                                 MSP430 Options.     (line  115)
  * minrt <1>:                             PRU Options.        (line    9)
  * minsert-sched-nops:                    RS/6000 and PowerPC Options.
                                                               (line  485)
! * minstrument-return:                    x86 Options.        (line 1419)
  * mint-register:                         RX Options.         (line  100)
  * mint16:                                PDP-11 Options.     (line   33)
  * mint32:                                CR16 Options.       (line   22)
  * mint32 <1>:                            H8/300 Options.     (line   38)
  * mint32 <2>:                            PDP-11 Options.     (line   37)
! * mint8:                                 AVR Options.        (line  229)
  * minterlink-compressed:                 MIPS Options.       (line  135)
  * minterlink-mips16:                     MIPS Options.       (line  147)
  * mio-volatile:                          MeP Options.        (line   74)
*************** look up both forms.
*** 65338,65346 ****
  * mjmpext:                               eBPF Options.       (line   28)
  * mjsr:                                  RX Options.         (line  169)
  * mjump-in-delay:                        HPPA Options.       (line   30)
! * mkernel:                               Darwin Options.     (line   82)
  * mkernel <1>:                           eBPF Options.       (line   13)
! * mkl:                                   x86 Options.        (line  922)
  * mknuthdiv:                             MMIX Options.       (line   32)
  * ml:                                    MeP Options.        (line   78)
  * ml <1>:                                SH Options.         (line  129)
--- 65528,65536 ----
  * mjmpext:                               eBPF Options.       (line   28)
  * mjsr:                                  RX Options.         (line  169)
  * mjump-in-delay:                        HPPA Options.       (line   30)
! * mkernel:                               Darwin Options.     (line   90)
  * mkernel <1>:                           eBPF Options.       (line   13)
! * mkl:                                   x86 Options.        (line  931)
  * mknuthdiv:                             MMIX Options.       (line   32)
  * ml:                                    MeP Options.        (line   78)
  * ml <1>:                                SH Options.         (line  129)
*************** look up both forms.
*** 65358,65364 ****
  * mlittle:                               RS/6000 and PowerPC Options.
                                                               (line  434)
  * mlittle-endian:                        AArch64 Options.    (line   30)
! * mlittle-endian <1>:                    ARC Options.        (line  598)
  * mlittle-endian <2>:                    ARM Options.        (line   63)
  * mlittle-endian <3>:                    C6X Options.        (line   16)
  * mlittle-endian <4>:                    C-SKY Options.      (line   30)
--- 65548,65554 ----
  * mlittle:                               RS/6000 and PowerPC Options.
                                                               (line  434)
  * mlittle-endian:                        AArch64 Options.    (line   30)
! * mlittle-endian <1>:                    ARC Options.        (line  594)
  * mlittle-endian <2>:                    ARM Options.        (line   63)
  * mlittle-endian <3>:                    C6X Options.        (line   16)
  * mlittle-endian <4>:                    C-SKY Options.      (line   30)
*************** look up both forms.
*** 65380,65393 ****
  * mlock:                                 ARC Options.        (line  345)
  * mlong-calls:                           Adapteva Epiphany Options.
                                                               (line   55)
! * mlong-calls <1>:                       ARC Options.        (line  404)
  * mlong-calls <2>:                       ARM Options.        (line  757)
  * mlong-calls <3>:                       Blackfin Options.   (line  118)
  * mlong-calls <4>:                       FRV Options.        (line  122)
  * mlong-calls <5>:                       HPPA Options.       (line  136)
  * mlong-calls <6>:                       MIPS Options.       (line  609)
  * mlong-calls <7>:                       V850 Options.       (line   10)
! * mlong-double:                          AVR Options.        (line  195)
  * mlong-double-128:                      S/390 and zSeries Options.
                                                               (line   29)
  * mlong-double-128 <1>:                  x86 Options.        (line  681)
--- 65570,65583 ----
  * mlock:                                 ARC Options.        (line  345)
  * mlong-calls:                           Adapteva Epiphany Options.
                                                               (line   55)
! * mlong-calls <1>:                       ARC Options.        (line  402)
  * mlong-calls <2>:                       ARM Options.        (line  757)
  * mlong-calls <3>:                       Blackfin Options.   (line  118)
  * mlong-calls <4>:                       FRV Options.        (line  122)
  * mlong-calls <5>:                       HPPA Options.       (line  136)
  * mlong-calls <6>:                       MIPS Options.       (line  609)
  * mlong-calls <7>:                       V850 Options.       (line   10)
! * mlong-double:                          AVR Options.        (line  212)
  * mlong-double-128:                      S/390 and zSeries Options.
                                                               (line   29)
  * mlong-double-128 <1>:                  x86 Options.        (line  681)
*************** look up both forms.
*** 65414,65430 ****
  * mlow64k:                               Blackfin Options.   (line   67)
  * mlp64:                                 IA-64 Options.      (line  121)
  * mlpc-width:                            ARC Options.        (line  313)
! * mlra:                                  ARC Options.        (line  488)
  * mlra <1>:                              FT32 Options.       (line   16)
  * mlra <2>:                              PDP-11 Options.     (line   52)
  * mlra <3>:                              SPARC Options.      (line  111)
  * mlra <4>:                              VAX Options.        (line   22)
! * mlra-priority-compact:                 ARC Options.        (line  496)
! * mlra-priority-noncompact:              ARC Options.        (line  499)
! * mlra-priority-none:                    ARC Options.        (line  493)
! * mlwp:                                  x86 Options.        (line  877)
  * mlxc1-sxc1:                            MIPS Options.       (line  901)
! * mlzcnt:                                x86 Options.        (line  885)
  * MM:                                    Preprocessor Options.
                                                               (line  102)
  * mm:                                    MeP Options.        (line   84)
--- 65604,65620 ----
  * mlow64k:                               Blackfin Options.   (line   67)
  * mlp64:                                 IA-64 Options.      (line  121)
  * mlpc-width:                            ARC Options.        (line  313)
! * mlra:                                  ARC Options.        (line  486)
  * mlra <1>:                              FT32 Options.       (line   16)
  * mlra <2>:                              PDP-11 Options.     (line   52)
  * mlra <3>:                              SPARC Options.      (line  111)
  * mlra <4>:                              VAX Options.        (line   22)
! * mlra-priority-compact:                 ARC Options.        (line  494)
! * mlra-priority-noncompact:              ARC Options.        (line  497)
! * mlra-priority-none:                    ARC Options.        (line  491)
! * mlwp:                                  x86 Options.        (line  886)
  * mlxc1-sxc1:                            MIPS Options.       (line  901)
! * mlzcnt:                                x86 Options.        (line  894)
  * MM:                                    Preprocessor Options.
                                                               (line  102)
  * mm:                                    MeP Options.        (line   84)
*************** look up both forms.
*** 65432,65449 ****
  * mmac <1>:                              Score Options.      (line   21)
  * mmac-24:                               ARC Options.        (line  354)
  * mmac-d16:                              ARC Options.        (line  350)
! * mmac_24:                               ARC Options.        (line  621)
! * mmac_d16:                              ARC Options.        (line  624)
  * mmad:                                  MIPS Options.       (line  618)
  * mmadd4:                                MIPS Options.       (line  906)
! * mmain-is-OS_task:                      AVR Options.        (line  219)
  * mmainkernel:                           Nvidia PTX Options. (line   41)
  * mmalloc64:                             VMS Options.        (line   17)
! * mmanual-endbr:                         x86 Options.        (line 1151)
  * mmax:                                  DEC Alpha Options.  (line  163)
  * mmax-constant-size:                    RX Options.         (line   82)
  * mmax-inline-shift=:                    MSP430 Options.     (line  134)
! * mmax-stack-frame:                      CRIS Options.       (line   22)
  * mmcount-ra-address:                    MIPS Options.       (line  878)
  * mmcu:                                  AVR Options.        (line    9)
  * mmcu <1>:                              MIPS Options.       (line  399)
--- 65622,65640 ----
  * mmac <1>:                              Score Options.      (line   21)
  * mmac-24:                               ARC Options.        (line  354)
  * mmac-d16:                              ARC Options.        (line  350)
! * mmacosx-version-min:                   Darwin Options.     (line   79)
! * mmac_24:                               ARC Options.        (line  616)
! * mmac_d16:                              ARC Options.        (line  619)
  * mmad:                                  MIPS Options.       (line  618)
  * mmadd4:                                MIPS Options.       (line  906)
! * mmain-is-OS_task:                      AVR Options.        (line  235)
  * mmainkernel:                           Nvidia PTX Options. (line   41)
  * mmalloc64:                             VMS Options.        (line   17)
! * mmanual-endbr:                         x86 Options.        (line 1160)
  * mmax:                                  DEC Alpha Options.  (line  163)
  * mmax-constant-size:                    RX Options.         (line   82)
  * mmax-inline-shift=:                    MSP430 Options.     (line  134)
! * mmax-stack-frame:                      CRIS Options.       (line   21)
  * mmcount-ra-address:                    MIPS Options.       (line  878)
  * mmcu:                                  AVR Options.        (line    9)
  * mmcu <1>:                              MIPS Options.       (line  399)
*************** look up both forms.
*** 65452,65489 ****
  * MMD:                                   Preprocessor Options.
                                                               (line  188)
  * mmedia:                                FRV Options.        (line   56)
! * mmedium-calls:                         ARC Options.        (line  408)
  * mmemcpy:                               MicroBlaze Options. (line   13)
  * mmemcpy <1>:                           MIPS Options.       (line  603)
! * mmemcpy-strategy=STRATEGY:             x86 Options.        (line 1352)
  * mmemory-latency:                       DEC Alpha Options.  (line  268)
  * mmemory-model:                         SPARC Options.      (line  348)
! * mmemset-strategy=STRATEGY:             x86 Options.        (line 1364)
  * mmfcrf:                                RS/6000 and PowerPC Options.
                                                               (line   25)
  * mmicromips:                            MIPS Options.       (line  387)
! * mmillicode:                            ARC Options.        (line  502)
  * mminimal-toc:                          RS/6000 and PowerPC Options.
                                                               (line  256)
  * mminmax:                               MeP Options.        (line   87)
! * mmixed-code:                           ARC Options.        (line  516)
  * mmma:                                  RS/6000 and PowerPC Options.
                                                               (line  944)
! * mmmx:                                  x86 Options.        (line  838)
  * mmodel=large:                          M32R/D Options.     (line   33)
  * mmodel=medium:                         M32R/D Options.     (line   27)
  * mmodel=small:                          M32R/D Options.     (line   18)
! * mmovbe:                                x86 Options.        (line 1045)
! * mmovdir64b:                            x86 Options.        (line  906)
! * mmovdiri:                              x86 Options.        (line  905)
! * mmove-max:                             x86 Options.        (line 1003)
  * mmp:                                   C-SKY Options.      (line   87)
  * mmpy:                                  ARC Options.        (line  117)
  * mmpy-option:                           ARC Options.        (line  173)
! * mms-bitfields:                         x86 Options.        (line 1197)
  * mmt:                                   MIPS Options.       (line  395)
  * mmul:                                  RL78 Options.       (line   15)
! * mmul-bug-workaround:                   CRIS Options.       (line   31)
  * mmul.x:                                Moxie Options.      (line   14)
  * mmul32x16:                             ARC Options.        (line  121)
  * mmul64:                                ARC Options.        (line  124)
--- 65643,65680 ----
  * MMD:                                   Preprocessor Options.
                                                               (line  188)
  * mmedia:                                FRV Options.        (line   56)
! * mmedium-calls:                         ARC Options.        (line  406)
  * mmemcpy:                               MicroBlaze Options. (line   13)
  * mmemcpy <1>:                           MIPS Options.       (line  603)
! * mmemcpy-strategy=STRATEGY:             x86 Options.        (line 1361)
  * mmemory-latency:                       DEC Alpha Options.  (line  268)
  * mmemory-model:                         SPARC Options.      (line  348)
! * mmemset-strategy=STRATEGY:             x86 Options.        (line 1373)
  * mmfcrf:                                RS/6000 and PowerPC Options.
                                                               (line   25)
  * mmicromips:                            MIPS Options.       (line  387)
! * mmillicode:                            ARC Options.        (line  500)
  * mminimal-toc:                          RS/6000 and PowerPC Options.
                                                               (line  256)
  * mminmax:                               MeP Options.        (line   87)
! * mmixed-code:                           ARC Options.        (line  514)
  * mmma:                                  RS/6000 and PowerPC Options.
                                                               (line  944)
! * mmmx:                                  x86 Options.        (line  847)
  * mmodel=large:                          M32R/D Options.     (line   33)
  * mmodel=medium:                         M32R/D Options.     (line   27)
  * mmodel=small:                          M32R/D Options.     (line   18)
! * mmovbe:                                x86 Options.        (line 1054)
! * mmovdir64b:                            x86 Options.        (line  915)
! * mmovdiri:                              x86 Options.        (line  914)
! * mmove-max:                             x86 Options.        (line 1012)
  * mmp:                                   C-SKY Options.      (line   87)
  * mmpy:                                  ARC Options.        (line  117)
  * mmpy-option:                           ARC Options.        (line  173)
! * mms-bitfields:                         x86 Options.        (line 1206)
  * mmt:                                   MIPS Options.       (line  395)
  * mmul:                                  RL78 Options.       (line   15)
! * mmul-bug-workaround:                   CRIS Options.       (line   30)
  * mmul.x:                                Moxie Options.      (line   14)
  * mmul32x16:                             ARC Options.        (line  121)
  * mmul64:                                ARC Options.        (line  124)
*************** look up both forms.
*** 65492,65498 ****
                                                               (line  378)
  * mmult:                                 MeP Options.        (line   90)
  * mmult-bug:                             MN10300 Options.    (line    9)
! * mmultcost:                             ARC Options.        (line  576)
  * mmulti-cond-exec:                      FRV Options.        (line  215)
  * mmulticore:                            Blackfin Options.   (line  139)
  * mmultiple:                             RS/6000 and PowerPC Options.
--- 65683,65689 ----
                                                               (line  378)
  * mmult:                                 MeP Options.        (line   90)
  * mmult-bug:                             MN10300 Options.    (line    9)
! * mmultcost:                             ARC Options.        (line  574)
  * mmulti-cond-exec:                      FRV Options.        (line  215)
  * mmulticore:                            Blackfin Options.   (line  139)
  * mmultiple:                             RS/6000 and PowerPC Options.
*************** look up both forms.
*** 65503,65515 ****
                                                               (line  138)
  * mmvme:                                 RS/6000 and PowerPC Options.
                                                               (line  609)
! * mmwait:                                x86 Options.        (line 1059)
! * mmwaitx:                               x86 Options.        (line  894)
  * mn:                                    H8/300 Options.     (line   20)
! * mn-flash:                              AVR Options.        (line  224)
  * mnan=2008:                             MIPS Options.       (line  320)
  * mnan=legacy:                           MIPS Options.       (line  320)
! * mneeded:                               x86 Options.        (line 1603)
  * mneon-for-64bits:                      ARM Options.        (line  923)
  * mnested-cond-exec:                     FRV Options.        (line  230)
  * mnewlib:                               OpenRISC Options.   (line   13)
--- 65694,65706 ----
                                                               (line  138)
  * mmvme:                                 RS/6000 and PowerPC Options.
                                                               (line  609)
! * mmwait:                                x86 Options.        (line 1068)
! * mmwaitx:                               x86 Options.        (line  903)
  * mn:                                    H8/300 Options.     (line   20)
! * mn-flash:                              AVR Options.        (line  240)
  * mnan=2008:                             MIPS Options.       (line  320)
  * mnan=legacy:                           MIPS Options.       (line  320)
! * mneeded:                               x86 Options.        (line 1612)
  * mneon-for-64bits:                      ARM Options.        (line  923)
  * mnested-cond-exec:                     FRV Options.        (line  230)
  * mnewlib:                               OpenRISC Options.   (line   13)
*************** look up both forms.
*** 65522,65528 ****
  * mno-align-double:                      x86 Options.        (line  640)
  * mno-align-int:                         M680x0 Options.     (line  262)
  * mno-align-loops:                       M32R/D Options.     (line   76)
! * mno-align-stringops:                   x86 Options.        (line 1317)
  * mno-allow-string-insns:                RX Options.         (line  150)
  * mno-altivec:                           RS/6000 and PowerPC Options.
                                                               (line  137)
--- 65713,65719 ----
  * mno-align-double:                      x86 Options.        (line  640)
  * mno-align-int:                         M680x0 Options.     (line  262)
  * mno-align-loops:                       M32R/D Options.     (line   76)
! * mno-align-stringops:                   x86 Options.        (line 1326)
  * mno-allow-string-insns:                RX Options.         (line  150)
  * mno-altivec:                           RS/6000 and PowerPC Options.
                                                               (line  137)
*************** look up both forms.
*** 65541,65551 ****
  * mno-bitfield:                          M680x0 Options.     (line  228)
  * mno-branch-likely:                     MIPS Options.       (line  798)
  * mno-branch-predict:                    MMIX Options.       (line   48)
! * mno-brcc:                              ARC Options.        (line  444)
  * mno-bwx:                               DEC Alpha Options.  (line  163)
  * mno-bypass-cache:                      Nios II Options.    (line  103)
  * mno-cache-volatile:                    Nios II Options.    (line  109)
! * mno-call-ms2sysv-xlogues:              x86 Options.        (line 1157)
  * mno-callgraph-data:                    MCore Options.      (line   31)
  * mno-cbcond:                            SPARC Options.      (line  260)
  * mno-check-zero-division:               MIPS Options.       (line  570)
--- 65732,65742 ----
  * mno-bitfield:                          M680x0 Options.     (line  228)
  * mno-branch-likely:                     MIPS Options.       (line  798)
  * mno-branch-predict:                    MMIX Options.       (line   48)
! * mno-brcc:                              ARC Options.        (line  442)
  * mno-bwx:                               DEC Alpha Options.  (line  163)
  * mno-bypass-cache:                      Nios II Options.    (line  103)
  * mno-cache-volatile:                    Nios II Options.    (line  109)
! * mno-call-ms2sysv-xlogues:              x86 Options.        (line 1166)
  * mno-callgraph-data:                    MCore Options.      (line   31)
  * mno-cbcond:                            SPARC Options.      (line  260)
  * mno-check-zero-division:               MIPS Options.       (line  570)
*************** look up both forms.
*** 65555,65564 ****
  * mno-cmpb:                              RS/6000 and PowerPC Options.
                                                               (line   25)
  * mno-co-re:                             eBPF Options.       (line   60)
! * mno-cond-exec:                         ARC Options.        (line  458)
  * mno-cond-exec <1>:                     FRV Options.        (line  194)
  * mno-cond-move:                         FRV Options.        (line  166)
! * mno-const-align:                       CRIS Options.       (line   54)
  * mno-const16:                           Xtensa Options.     (line   10)
  * mno-crc:                               MIPS Options.       (line  416)
  * mno-crt0:                              MN10300 Options.    (line   43)
--- 65746,65755 ----
  * mno-cmpb:                              RS/6000 and PowerPC Options.
                                                               (line   25)
  * mno-co-re:                             eBPF Options.       (line   60)
! * mno-cond-exec:                         ARC Options.        (line  456)
  * mno-cond-exec <1>:                     FRV Options.        (line  194)
  * mno-cond-move:                         FRV Options.        (line  166)
! * mno-const-align:                       CRIS Options.       (line   53)
  * mno-const16:                           Xtensa Options.     (line   10)
  * mno-crc:                               MIPS Options.       (line  416)
  * mno-crt0:                              MN10300 Options.    (line   43)
*************** look up both forms.
*** 65567,65577 ****
                                                               (line  178)
  * mno-csync-anomaly:                     Blackfin Options.   (line   63)
  * mno-custom-INSN:                       Nios II Options.    (line  139)
! * mno-data-align:                        CRIS Options.       (line   54)
  * mno-debug:                             S/390 and zSeries Options.
                                                               (line  144)
! * mno-default:                           x86 Options.        (line  971)
! * mno-direct-extern-access:              x86 Options.        (line 1608)
  * mno-direct-extern-access <1>:          x86 Function Attributes.
                                                               (line  712)
  * mno-disable-callt:                     V850 Options.       (line   92)
--- 65758,65768 ----
                                                               (line  178)
  * mno-csync-anomaly:                     Blackfin Options.   (line   63)
  * mno-custom-INSN:                       Nios II Options.    (line  139)
! * mno-data-align:                        CRIS Options.       (line   53)
  * mno-debug:                             S/390 and zSeries Options.
                                                               (line  144)
! * mno-default:                           x86 Options.        (line  980)
! * mno-direct-extern-access:              x86 Options.        (line 1617)
  * mno-direct-extern-access <1>:          x86 Function Attributes.
                                                               (line  712)
  * mno-disable-callt:                     V850 Options.       (line   92)
*************** look up both forms.
*** 65669,65675 ****
  * mno-int32:                             PDP-11 Options.     (line   33)
  * mno-interlink-compressed:              MIPS Options.       (line  135)
  * mno-interlink-mips16:                  MIPS Options.       (line  147)
! * mno-interrupts:                        AVR Options.        (line  227)
  * mno-isel:                              RS/6000 and PowerPC Options.
                                                               (line  167)
  * mno-jsr:                               RX Options.         (line  169)
--- 65860,65866 ----
  * mno-int32:                             PDP-11 Options.     (line   33)
  * mno-interlink-compressed:              MIPS Options.       (line  135)
  * mno-interlink-mips16:                  MIPS Options.       (line  147)
! * mno-interrupts:                        AVR Options.        (line  243)
  * mno-isel:                              RS/6000 and PowerPC Options.
                                                               (line  167)
  * mno-jsr:                               RX Options.         (line  169)
*************** look up both forms.
*** 65717,65725 ****
  * Mno-modules:                           Preprocessor Options.
                                                               (line  132)
  * mno-mpy:                               ARC Options.        (line  117)
! * mno-ms-bitfields:                      x86 Options.        (line 1197)
  * mno-mt:                                MIPS Options.       (line  395)
! * mno-mul-bug-workaround:                CRIS Options.       (line   31)
  * mno-muladd:                            FRV Options.        (line   68)
  * mno-mulhw:                             RS/6000 and PowerPC Options.
                                                               (line  378)
--- 65908,65916 ----
  * Mno-modules:                           Preprocessor Options.
                                                               (line  132)
  * mno-mpy:                               ARC Options.        (line  117)
! * mno-ms-bitfields:                      x86 Options.        (line 1206)
  * mno-mt:                                MIPS Options.       (line  395)
! * mno-mul-bug-workaround:                CRIS Options.       (line   30)
  * mno-muladd:                            FRV Options.        (line   68)
  * mno-mulhw:                             RS/6000 and PowerPC Options.
                                                               (line  378)
*************** look up both forms.
*** 65770,65786 ****
  * mno-privileged:                        RS/6000 and PowerPC Options.
                                                               (line  955)
  * mno-prolog-function:                   V850 Options.       (line   23)
! * mno-prologue-epilogue:                 CRIS Options.       (line   70)
  * mno-prototype:                         RS/6000 and PowerPC Options.
                                                               (line  593)
! * mno-push-args:                         x86 Options.        (line 1174)
  * mno-quad-memory:                       RS/6000 and PowerPC Options.
                                                               (line  203)
  * mno-quad-memory-atomic:                RS/6000 and PowerPC Options.
                                                               (line  209)
  * mno-readonly-in-sdata:                 RS/6000 and PowerPC Options.
                                                               (line  684)
! * mno-red-zone:                          x86 Options.        (line 1562)
  * mno-register-names:                    IA-64 Options.      (line   37)
  * mno-regnames:                          RS/6000 and PowerPC Options.
                                                               (line  722)
--- 65961,65977 ----
  * mno-privileged:                        RS/6000 and PowerPC Options.
                                                               (line  955)
  * mno-prolog-function:                   V850 Options.       (line   23)
! * mno-prologue-epilogue:                 CRIS Options.       (line   69)
  * mno-prototype:                         RS/6000 and PowerPC Options.
                                                               (line  593)
! * mno-push-args:                         x86 Options.        (line 1183)
  * mno-quad-memory:                       RS/6000 and PowerPC Options.
                                                               (line  203)
  * mno-quad-memory-atomic:                RS/6000 and PowerPC Options.
                                                               (line  209)
  * mno-readonly-in-sdata:                 RS/6000 and PowerPC Options.
                                                               (line  684)
! * mno-red-zone:                          x86 Options.        (line 1571)
  * mno-register-names:                    IA-64 Options.      (line   37)
  * mno-regnames:                          RS/6000 and PowerPC Options.
                                                               (line  722)
*************** look up both forms.
*** 65808,65814 ****
  * mno-sched-prefer-non-control-spec-insns: IA-64 Options.    (line  178)
  * mno-sched-prefer-non-data-spec-insns:  IA-64 Options.      (line  171)
  * mno-sched-prolog:                      ARM Options.        (line   32)
! * mno-sdata:                             ARC Options.        (line  422)
  * mno-sdata <1>:                         IA-64 Options.      (line   42)
  * mno-sdata <2>:                         RS/6000 and PowerPC Options.
                                                               (line  679)
--- 65999,66005 ----
  * mno-sched-prefer-non-control-spec-insns: IA-64 Options.    (line  178)
  * mno-sched-prefer-non-data-spec-insns:  IA-64 Options.      (line  171)
  * mno-sched-prolog:                      ARM Options.        (line   32)
! * mno-sdata:                             ARC Options.        (line  420)
  * mno-sdata <1>:                         IA-64 Options.      (line   42)
  * mno-sdata <2>:                         RS/6000 and PowerPC Options.
                                                               (line  679)
*************** look up both forms.
*** 65816,65822 ****
  * mno-serialize-volatile:                Xtensa Options.     (line   35)
  * mno-setlb:                             MN10300 Options.    (line   69)
  * mno-short:                             M680x0 Options.     (line  223)
! * mno-side-effects:                      CRIS Options.       (line   45)
  * mno-sim:                               RX Options.         (line   71)
  * mno-single-exit:                       MMIX Options.       (line   65)
  * mno-slow-bytes:                        MCore Options.      (line   35)
--- 66007,66013 ----
  * mno-serialize-volatile:                Xtensa Options.     (line   35)
  * mno-setlb:                             MN10300 Options.    (line   69)
  * mno-short:                             M680x0 Options.     (line  223)
! * mno-side-effects:                      CRIS Options.       (line   44)
  * mno-sim:                               RX Options.         (line   71)
  * mno-single-exit:                       MMIX Options.       (line   65)
  * mno-slow-bytes:                        MCore Options.      (line   35)
*************** look up both forms.
*** 65831,65837 ****
  * mno-split-addresses:                   MIPS Options.       (line  555)
  * mno-split-lohi:                        Adapteva Epiphany Options.
                                                               (line  109)
! * mno-stack-align:                       CRIS Options.       (line   54)
  * mno-stack-bias:                        SPARC Options.      (line  372)
  * mno-std-struct-return:                 SPARC Options.      (line  102)
  * mno-strict-align:                      AArch64 Options.    (line   52)
--- 66022,66028 ----
  * mno-split-addresses:                   MIPS Options.       (line  555)
  * mno-split-lohi:                        Adapteva Epiphany Options.
                                                               (line  109)
! * mno-stack-align:                       CRIS Options.       (line   53)
  * mno-stack-bias:                        SPARC Options.      (line  372)
  * mno-std-struct-return:                 SPARC Options.      (line  102)
  * mno-strict-align:                      AArch64 Options.    (line   52)
*************** look up both forms.
*** 65873,65879 ****
  * mno-vis4b:                             SPARC Options.      (line  251)
  * mno-vliw-branch:                       FRV Options.        (line  208)
  * mno-volatile-asm-stop:                 IA-64 Options.      (line   32)
! * mno-volatile-cache:                    ARC Options.        (line  431)
  * mno-vrsave:                            RS/6000 and PowerPC Options.
                                                               (line  153)
  * mno-vsx:                               RS/6000 and PowerPC Options.
--- 66064,66070 ----
  * mno-vis4b:                             SPARC Options.      (line  251)
  * mno-vliw-branch:                       FRV Options.        (line  208)
  * mno-volatile-asm-stop:                 IA-64 Options.      (line   32)
! * mno-volatile-cache:                    ARC Options.        (line  429)
  * mno-vrsave:                            RS/6000 and PowerPC Options.
                                                               (line  153)
  * mno-vsx:                               RS/6000 and PowerPC Options.
*************** look up both forms.
*** 65898,65904 ****
  * mnomacsave:                            SH Options.         (line  160)
  * mnop-fun-dllimport:                    x86 Windows Options.
                                                               (line   22)
! * mnop-mcount:                           x86 Options.        (line 1404)
  * mnopm:                                 FT32 Options.       (line   29)
  * mnops:                                 Adapteva Epiphany Options.
                                                               (line   26)
--- 66089,66095 ----
  * mnomacsave:                            SH Options.         (line  160)
  * mnop-fun-dllimport:                    x86 Windows Options.
                                                               (line   22)
! * mnop-mcount:                           x86 Options.        (line 1413)
  * mnopm:                                 FT32 Options.       (line   29)
  * mnops:                                 Adapteva Epiphany Options.
                                                               (line   26)
*************** look up both forms.
*** 65906,65913 ****
  * modd-spreg:                            MIPS Options.       (line  293)
  * momit-leaf-frame-pointer:              AArch64 Options.    (line   58)
  * momit-leaf-frame-pointer <1>:          Blackfin Options.   (line   43)
! * momit-leaf-frame-pointer <2>:          x86 Options.        (line 1368)
! * mone-byte-bool:                        Darwin Options.     (line   90)
  * moptimize:                             Nvidia PTX Options. (line   45)
  * moptimize-membar:                      FRV Options.        (line  244)
  * moptimize-membar <1>:                  FRV Options.        (line  249)
--- 66097,66104 ----
  * modd-spreg:                            MIPS Options.       (line  293)
  * momit-leaf-frame-pointer:              AArch64 Options.    (line   58)
  * momit-leaf-frame-pointer <1>:          Blackfin Options.   (line   43)
! * momit-leaf-frame-pointer <2>:          x86 Options.        (line 1377)
! * mone-byte-bool:                        Darwin Options.     (line   98)
  * moptimize:                             Nvidia PTX Options. (line   45)
  * moptimize-membar:                      FRV Options.        (line  244)
  * moptimize-membar <1>:                  FRV Options.        (line  249)
*************** look up both forms.
*** 65926,65937 ****
  * mpc32:                                 x86 Options.        (line  762)
  * mpc64:                                 x86 Options.        (line  762)
  * mpc80:                                 x86 Options.        (line  762)
! * mpclmul:                               x86 Options.        (line  860)
! * mpconfig:                              x86 Options.        (line  868)
  * mpcrel:                                M680x0 Options.     (line  273)
  * mpcrel <1>:                            RS/6000 and PowerPC Options.
                                                               (line  932)
! * mpdebug:                               CRIS Options.       (line   35)
  * mpe:                                   RS/6000 and PowerPC Options.
                                                               (line  310)
  * mpe-aligned-commons:                   x86 Windows Options.
--- 66117,66128 ----
  * mpc32:                                 x86 Options.        (line  762)
  * mpc64:                                 x86 Options.        (line  762)
  * mpc80:                                 x86 Options.        (line  762)
! * mpclmul:                               x86 Options.        (line  869)
! * mpconfig:                              x86 Options.        (line  877)
  * mpcrel:                                M680x0 Options.     (line  273)
  * mpcrel <1>:                            RS/6000 and PowerPC Options.
                                                               (line  932)
! * mpdebug:                               CRIS Options.       (line   34)
  * mpe:                                   RS/6000 and PowerPC Options.
                                                               (line  310)
  * mpe-aligned-commons:                   x86 Windows Options.
*************** look up both forms.
*** 65940,65946 ****
  * mpic-data-is-text-relative <1>:        MicroBlaze Options. (line   92)
  * mpic-register:                         ARM Options.        (line  787)
  * mpid:                                  RX Options.         (line  117)
! * mpku:                                  x86 Options.        (line  896)
  * mplt:                                  MIPS Options.       (line  219)
  * mpltseq:                               RS/6000 and PowerPC Options.
                                                               (line  765)
--- 66131,66137 ----
  * mpic-data-is-text-relative <1>:        MicroBlaze Options. (line   92)
  * mpic-register:                         ARM Options.        (line  787)
  * mpid:                                  RX Options.         (line  117)
! * mpku:                                  x86 Options.        (line  905)
  * mplt:                                  MIPS Options.       (line  219)
  * mpltseq:                               RS/6000 and PowerPC Options.
                                                               (line  765)
*************** look up both forms.
*** 65949,65955 ****
                                                               (line  878)
  * mpoke-function-name:                   ARM Options.        (line  802)
  * mpopc:                                 SPARC Options.      (line  281)
! * mpopcnt:                               x86 Options.        (line  880)
  * mpopcntb:                              RS/6000 and PowerPC Options.
                                                               (line   25)
  * mpopcntd:                              RS/6000 and PowerPC Options.
--- 66140,66146 ----
                                                               (line  878)
  * mpoke-function-name:                   ARM Options.        (line  802)
  * mpopc:                                 SPARC Options.      (line  281)
! * mpopcnt:                               x86 Options.        (line  889)
  * mpopcntb:                              RS/6000 and PowerPC Options.
                                                               (line   25)
  * mpopcntd:                              RS/6000 and PowerPC Options.
*************** look up both forms.
*** 65969,66033 ****
                                                               (line   25)
  * mpowerpc64:                            RS/6000 and PowerPC Options.
                                                               (line   25)
! * mprefer-avx128:                        x86 Options.        (line  995)
  * mprefer-short-insn-regs:               Adapteva Epiphany Options.
                                                               (line   13)
! * mprefer-vector-width:                  x86 Options.        (line  999)
  * mprefergot:                            SH Options.         (line  268)
  * mpreferred-stack-boundary:             RISC-V Options.     (line  101)
! * mpreferred-stack-boundary <1>:         x86 Options.        (line  792)
! * mprefetchwt1:                          x86 Options.        (line  873)
  * mprefixed:                             RS/6000 and PowerPC Options.
                                                               (line  938)
  * mpretend-cmove:                        SH Options.         (line  383)
! * mprfchw:                               x86 Options.        (line  871)
  * mprint-tune-info:                      ARM Options.        (line  944)
  * mprioritize-restricted-insns:          RS/6000 and PowerPC Options.
                                                               (line  457)
  * mprivileged:                           RS/6000 and PowerPC Options.
                                                               (line  955)
  * mprolog-function:                      V850 Options.       (line   23)
! * mprologue-epilogue:                    CRIS Options.       (line   70)
  * mprototype:                            RS/6000 and PowerPC Options.
                                                               (line  593)
! * mptwrite:                              x86 Options.        (line  864)
  * mptx:                                  Nvidia PTX Options. (line   30)
  * mpure-code:                            ARM Options.        (line  954)
! * mpush-args:                            x86 Options.        (line 1174)
  * mpushpop:                              C-SKY Options.      (line  130)
  * MQ:                                    Preprocessor Options.
                                                               (line  162)
! * mq-class:                              ARC Options.        (line  519)
  * mquad-memory:                          RS/6000 and PowerPC Options.
                                                               (line  203)
  * mquad-memory-atomic:                   RS/6000 and PowerPC Options.
                                                               (line  209)
  * mr0rel-sec:                            Nios II Options.    (line   76)
  * mr10k-cache-barrier:                   MIPS Options.       (line  720)
! * mRcq:                                  ARC Options.        (line  523)
! * mRcw:                                  ARC Options.        (line  527)
! * mrdpid:                                x86 Options.        (line  872)
! * mrdrnd:                                x86 Options.        (line  865)
! * mrdseed:                               x86 Options.        (line  874)
  * mreadonly-in-sdata:                    RS/6000 and PowerPC Options.
                                                               (line  684)
  * mrecip:                                RS/6000 and PowerPC Options.
                                                               (line  785)
! * mrecip <1>:                            x86 Options.        (line 1064)
  * mrecip-precision:                      RS/6000 and PowerPC Options.
                                                               (line  842)
  * mrecip=opt:                            RS/6000 and PowerPC Options.
                                                               (line  798)
! * mrecip=opt <1>:                        x86 Options.        (line 1086)
! * mrecord-mcount:                        x86 Options.        (line 1398)
! * mrecord-return:                        x86 Options.        (line 1418)
! * mred-zone:                             x86 Options.        (line 1562)
  * mreduced-regs:                         NDS32 Options.      (line   15)
  * mregister-names:                       IA-64 Options.      (line   37)
  * mregnames:                             RS/6000 and PowerPC Options.
                                                               (line  722)
  * mregparm:                              x86 Options.        (line  732)
! * mrelax:                                AVR Options.        (line  231)
  * mrelax <1>:                            H8/300 Options.     (line    9)
  * mrelax <2>:                            MN10300 Options.    (line   46)
  * mrelax <3>:                            MSP430 Options.     (line   88)
--- 66160,66224 ----
                                                               (line   25)
  * mpowerpc64:                            RS/6000 and PowerPC Options.
                                                               (line   25)
! * mprefer-avx128:                        x86 Options.        (line 1004)
  * mprefer-short-insn-regs:               Adapteva Epiphany Options.
                                                               (line   13)
! * mprefer-vector-width:                  x86 Options.        (line 1008)
  * mprefergot:                            SH Options.         (line  268)
  * mpreferred-stack-boundary:             RISC-V Options.     (line  101)
! * mpreferred-stack-boundary <1>:         x86 Options.        (line  801)
! * mprefetchwt1:                          x86 Options.        (line  882)
  * mprefixed:                             RS/6000 and PowerPC Options.
                                                               (line  938)
  * mpretend-cmove:                        SH Options.         (line  383)
! * mprfchw:                               x86 Options.        (line  880)
  * mprint-tune-info:                      ARM Options.        (line  944)
  * mprioritize-restricted-insns:          RS/6000 and PowerPC Options.
                                                               (line  457)
  * mprivileged:                           RS/6000 and PowerPC Options.
                                                               (line  955)
  * mprolog-function:                      V850 Options.       (line   23)
! * mprologue-epilogue:                    CRIS Options.       (line   69)
  * mprototype:                            RS/6000 and PowerPC Options.
                                                               (line  593)
! * mptwrite:                              x86 Options.        (line  873)
  * mptx:                                  Nvidia PTX Options. (line   30)
  * mpure-code:                            ARM Options.        (line  954)
! * mpush-args:                            x86 Options.        (line 1183)
  * mpushpop:                              C-SKY Options.      (line  130)
  * MQ:                                    Preprocessor Options.
                                                               (line  162)
! * mq-class:                              ARC Options.        (line  517)
  * mquad-memory:                          RS/6000 and PowerPC Options.
                                                               (line  203)
  * mquad-memory-atomic:                   RS/6000 and PowerPC Options.
                                                               (line  209)
  * mr0rel-sec:                            Nios II Options.    (line   76)
  * mr10k-cache-barrier:                   MIPS Options.       (line  720)
! * mRcq:                                  ARC Options.        (line  521)
! * mRcw:                                  ARC Options.        (line  525)
! * mrdpid:                                x86 Options.        (line  881)
! * mrdrnd:                                x86 Options.        (line  874)
! * mrdseed:                               x86 Options.        (line  883)
  * mreadonly-in-sdata:                    RS/6000 and PowerPC Options.
                                                               (line  684)
  * mrecip:                                RS/6000 and PowerPC Options.
                                                               (line  785)
! * mrecip <1>:                            x86 Options.        (line 1073)
  * mrecip-precision:                      RS/6000 and PowerPC Options.
                                                               (line  842)
  * mrecip=opt:                            RS/6000 and PowerPC Options.
                                                               (line  798)
! * mrecip=opt <1>:                        x86 Options.        (line 1095)
! * mrecord-mcount:                        x86 Options.        (line 1407)
! * mrecord-return:                        x86 Options.        (line 1427)
! * mred-zone:                             x86 Options.        (line 1571)
  * mreduced-regs:                         NDS32 Options.      (line   15)
  * mregister-names:                       IA-64 Options.      (line   37)
  * mregnames:                             RS/6000 and PowerPC Options.
                                                               (line  722)
  * mregparm:                              x86 Options.        (line  732)
! * mrelax:                                AVR Options.        (line  247)
  * mrelax <1>:                            H8/300 Options.     (line    9)
  * mrelax <2>:                            MN10300 Options.    (line   46)
  * mrelax <3>:                            MSP430 Options.     (line   88)
*************** look up both forms.
*** 66035,66041 ****
  * mrelax <5>:                            RX Options.         (line   95)
  * mrelax <6>:                            SH Options.         (line  137)
  * mrelax <7>:                            V850 Options.       (line  103)
! * mrelax-cmpxchg-loop:                   x86 Options.        (line 1475)
  * mrelax-immediate:                      MCore Options.      (line   19)
  * mrelax-pic-calls:                      MIPS Options.       (line  865)
  * mrelocatable:                          RS/6000 and PowerPC Options.
--- 66226,66232 ----
  * mrelax <5>:                            RX Options.         (line   95)
  * mrelax <6>:                            SH Options.         (line  137)
  * mrelax <7>:                            V850 Options.       (line  103)
! * mrelax-cmpxchg-loop:                   x86 Options.        (line 1484)
  * mrelax-immediate:                      MCore Options.      (line   19)
  * mrelax-pic-calls:                      MIPS Options.       (line  865)
  * mrelocatable:                          RS/6000 and PowerPC Options.
*************** look up both forms.
*** 66050,66056 ****
  * mrgf-banked-regs:                      ARC Options.        (line  304)
  * mrh850-abi:                            V850 Options.       (line  127)
  * mrl78:                                 RL78 Options.       (line   62)
! * mrmw:                                  AVR Options.        (line  245)
  * mrop-protect:                          RS/6000 and PowerPC Options.
                                                               (line  949)
  * mror:                                  OpenRISC Options.   (line   49)
--- 66241,66247 ----
  * mrgf-banked-regs:                      ARC Options.        (line  304)
  * mrh850-abi:                            V850 Options.       (line  127)
  * mrl78:                                 RL78 Options.       (line   62)
! * mrmw:                                  AVR Options.        (line  261)
  * mrop-protect:                          RS/6000 and PowerPC Options.
                                                               (line  949)
  * mror:                                  OpenRISC Options.   (line   49)
*************** look up both forms.
*** 66061,66073 ****
  * mrtd <1>:                              x86 Options.        (line  708)
  * mrtd <2>:                              x86 Function Attributes.
                                                               (line    9)
! * mrtm:                                  x86 Options.        (line  891)
  * mrtp:                                  VxWorks Options.    (line   11)
  * mrtsc:                                 ARC Options.        (line  358)
  * ms:                                    H8/300 Options.     (line   17)
  * ms <1>:                                MeP Options.        (line  100)
  * ms2600:                                H8/300 Options.     (line   24)
! * msahf:                                 x86 Options.        (line 1035)
  * msatur:                                MeP Options.        (line  105)
  * msave-acc-in-interrupts:               RX Options.         (line  109)
  * msave-mduc-in-interrupts:              RL78 Options.       (line   79)
--- 66252,66264 ----
  * mrtd <1>:                              x86 Options.        (line  708)
  * mrtd <2>:                              x86 Function Attributes.
                                                               (line    9)
! * mrtm:                                  x86 Options.        (line  900)
  * mrtp:                                  VxWorks Options.    (line   11)
  * mrtsc:                                 ARC Options.        (line  358)
  * ms:                                    H8/300 Options.     (line   17)
  * ms <1>:                                MeP Options.        (line  100)
  * ms2600:                                H8/300 Options.     (line   24)
! * msahf:                                 x86 Options.        (line 1044)
  * msatur:                                MeP Options.        (line  105)
  * msave-acc-in-interrupts:               RX Options.         (line  109)
  * msave-mduc-in-interrupts:              RL78 Options.       (line   79)
*************** look up both forms.
*** 66100,66106 ****
  * mscore7:                               Score Options.      (line   31)
  * mscore7d:                              Score Options.      (line   35)
  * msda:                                  V850 Options.       (line   40)
! * msdata:                                ARC Options.        (line  422)
  * msdata <1>:                            IA-64 Options.      (line   42)
  * msdata <2>:                            RS/6000 and PowerPC Options.
                                                               (line  666)
--- 66291,66297 ----
  * mscore7:                               Score Options.      (line   31)
  * mscore7d:                              Score Options.      (line   35)
  * msda:                                  V850 Options.       (line   40)
! * msdata:                                ARC Options.        (line  420)
  * msdata <1>:                            IA-64 Options.      (line   42)
  * msdata <2>:                            RS/6000 and PowerPC Options.
                                                               (line  666)
*************** look up both forms.
*** 66128,66147 ****
  * msel-sched-dont-check-control-spec:    IA-64 Options.      (line  207)
  * msep-data:                             Blackfin Options.   (line  107)
  * msep-data <1>:                         Blackfin Options.   (line  113)
! * mserialize:                            x86 Options.        (line  917)
  * mserialize-volatile:                   Xtensa Options.     (line   35)
  * msetlb:                                MN10300 Options.    (line   64)
  * msext:                                 OpenRISC Options.   (line   59)
  * msfimm:                                OpenRISC Options.   (line   63)
! * msgx:                                  x86 Options.        (line  875)
! * msha:                                  x86 Options.        (line  858)
  * mshared-library-id:                    Blackfin Options.   (line  100)
  * mshftimm:                              OpenRISC Options.   (line   68)
  * mshort:                                M680x0 Options.     (line  217)
! * mshort-calls:                          AVR Options.        (line  249)
  * mshorten-memrefs:                      RISC-V Options.     (line  121)
! * mshstk:                                x86 Options.        (line 1049)
! * mside-effects:                         CRIS Options.       (line   45)
  * msign-extend-enabled:                  LM32 Options.       (line   18)
  * msign-return-address:                  AArch64 Options.    (line  280)
  * msilicon-errata:                       MSP430 Options.     (line  159)
--- 66319,66338 ----
  * msel-sched-dont-check-control-spec:    IA-64 Options.      (line  207)
  * msep-data:                             Blackfin Options.   (line  107)
  * msep-data <1>:                         Blackfin Options.   (line  113)
! * mserialize:                            x86 Options.        (line  926)
  * mserialize-volatile:                   Xtensa Options.     (line   35)
  * msetlb:                                MN10300 Options.    (line   64)
  * msext:                                 OpenRISC Options.   (line   59)
  * msfimm:                                OpenRISC Options.   (line   63)
! * msgx:                                  x86 Options.        (line  884)
! * msha:                                  x86 Options.        (line  867)
  * mshared-library-id:                    Blackfin Options.   (line  100)
  * mshftimm:                              OpenRISC Options.   (line   68)
  * mshort:                                M680x0 Options.     (line  217)
! * mshort-calls:                          AVR Options.        (line  265)
  * mshorten-memrefs:                      RISC-V Options.     (line  121)
! * mshstk:                                x86 Options.        (line 1058)
! * mside-effects:                         CRIS Options.       (line   44)
  * msign-extend-enabled:                  LM32 Options.       (line   18)
  * msign-return-address:                  AArch64 Options.    (line  280)
  * msilicon-errata:                       MSP430 Options.     (line  159)
*************** look up both forms.
*** 66168,66175 ****
  * msingle-pic-base <1>:                  RS/6000 and PowerPC Options.
                                                               (line  451)
  * msio:                                  HPPA Options.       (line  105)
! * msize-level:                           ARC Options.        (line  531)
! * mskip-rax-setup:                       x86 Options.        (line 1431)
  * mslow-bytes:                           MCore Options.      (line   35)
  * mslow-flash-data:                      ARM Options.        (line  926)
  * msmall:                                MSP430 Options.     (line   85)
--- 66359,66366 ----
  * msingle-pic-base <1>:                  RS/6000 and PowerPC Options.
                                                               (line  451)
  * msio:                                  HPPA Options.       (line  105)
! * msize-level:                           ARC Options.        (line  529)
! * mskip-rax-setup:                       x86 Options.        (line 1440)
  * mslow-bytes:                           MCore Options.      (line   35)
  * mslow-flash-data:                      ARM Options.        (line  926)
  * msmall:                                MSP430 Options.     (line   85)
*************** look up both forms.
*** 66211,66217 ****
  * msoft-mul:                             OpenRISC Options.   (line   24)
  * msoft-quad-float:                      SPARC Options.      (line   59)
  * msoft-stack:                           Nvidia PTX Options. (line   49)
! * msp8:                                  AVR Options.        (line  256)
  * mspace:                                V850 Options.       (line   30)
  * mspace-regs:                           HPPA Options.       (line   45)
  * mspecld-anomaly:                       Blackfin Options.   (line   48)
--- 66402,66408 ----
  * msoft-mul:                             OpenRISC Options.   (line   24)
  * msoft-quad-float:                      SPARC Options.      (line   59)
  * msoft-stack:                           Nvidia PTX Options. (line   49)
! * msp8:                                  AVR Options.        (line  272)
  * mspace:                                V850 Options.       (line   30)
  * mspace-regs:                           HPPA Options.       (line   45)
  * mspecld-anomaly:                       Blackfin Options.   (line   48)
*************** look up both forms.
*** 66219,66226 ****
  * mspfp:                                 ARC Options.        (line  132)
  * mspfp-compact:                         ARC Options.        (line  133)
  * mspfp-fast:                            ARC Options.        (line  137)
! * mspfp_compact:                         ARC Options.        (line  627)
! * mspfp_fast:                            ARC Options.        (line  630)
  * msplit:                                PDP-11 Options.     (line   40)
  * msplit-addresses:                      MIPS Options.       (line  555)
  * msplit-lohi:                           Adapteva Epiphany Options.
--- 66410,66417 ----
  * mspfp:                                 ARC Options.        (line  132)
  * mspfp-compact:                         ARC Options.        (line  133)
  * mspfp-fast:                            ARC Options.        (line  137)
! * mspfp_compact:                         ARC Options.        (line  622)
! * mspfp_fast:                            ARC Options.        (line  625)
  * msplit:                                PDP-11 Options.     (line   40)
  * msplit-addresses:                      MIPS Options.       (line  555)
  * msplit-lohi:                           Adapteva Epiphany Options.
*************** look up both forms.
*** 66228,66244 ****
  * msplit-vecmove-early:                  Adapteva Epiphany Options.
                                                               (line  126)
  * msram-ecc:                             AMD GCN Options.    (line   25)
! * msse:                                  x86 Options.        (line  839)
! * msse2:                                 x86 Options.        (line  840)
! * msse2avx:                              x86 Options.        (line 1386)
! * msse3:                                 x86 Options.        (line  841)
! * msse4:                                 x86 Options.        (line  843)
! * msse4.1:                               x86 Options.        (line  845)
! * msse4.2:                               x86 Options.        (line  846)
! * msse4a:                                x86 Options.        (line  844)
  * msseregparm:                           x86 Options.        (line  743)
! * mssse3:                                x86 Options.        (line  842)
! * mstack-align:                          CRIS Options.       (line   54)
  * mstack-bias:                           SPARC Options.      (line  372)
  * mstack-check-l1:                       Blackfin Options.   (line   74)
  * mstack-guard:                          S/390 and zSeries Options.
--- 66419,66435 ----
  * msplit-vecmove-early:                  Adapteva Epiphany Options.
                                                               (line  126)
  * msram-ecc:                             AMD GCN Options.    (line   25)
! * msse:                                  x86 Options.        (line  848)
! * msse2:                                 x86 Options.        (line  849)
! * msse2avx:                              x86 Options.        (line 1395)
! * msse3:                                 x86 Options.        (line  850)
! * msse4:                                 x86 Options.        (line  852)
! * msse4.1:                               x86 Options.        (line  854)
! * msse4.2:                               x86 Options.        (line  855)
! * msse4a:                                x86 Options.        (line  853)
  * msseregparm:                           x86 Options.        (line  743)
! * mssse3:                                x86 Options.        (line  851)
! * mstack-align:                          CRIS Options.       (line   53)
  * mstack-bias:                           SPARC Options.      (line  372)
  * mstack-check-l1:                       Blackfin Options.   (line   74)
  * mstack-guard:                          S/390 and zSeries Options.
*************** look up both forms.
*** 66251,66286 ****
  * mstack-protector-guard <2>:            RISC-V Options.     (line  185)
  * mstack-protector-guard <3>:            RS/6000 and PowerPC Options.
                                                               (line  916)
! * mstack-protector-guard <4>:            x86 Options.        (line 1457)
  * mstack-protector-guard-offset:         AArch64 Options.    (line   64)
  * mstack-protector-guard-offset <1>:     ARM Options.        (line  976)
  * mstack-protector-guard-offset <2>:     RISC-V Options.     (line  185)
  * mstack-protector-guard-offset <3>:     RS/6000 and PowerPC Options.
                                                               (line  916)
! * mstack-protector-guard-offset <4>:     x86 Options.        (line 1457)
  * mstack-protector-guard-reg:            AArch64 Options.    (line   64)
  * mstack-protector-guard-reg <1>:        RISC-V Options.     (line  185)
  * mstack-protector-guard-reg <2>:        RS/6000 and PowerPC Options.
                                                               (line  916)
! * mstack-protector-guard-reg <3>:        x86 Options.        (line 1457)
  * mstack-protector-guard-symbol:         RS/6000 and PowerPC Options.
                                                               (line  916)
  * mstack-size:                           AMD GCN Options.    (line   31)
  * mstack-size <1>:                       C-SKY Options.      (line  150)
  * mstack-size <2>:                       S/390 and zSeries Options.
                                                               (line  202)
! * mstackrealign:                         x86 Options.        (line  783)
  * mstd-struct-return:                    SPARC Options.      (line  102)
! * mstore-max:                            x86 Options.        (line 1008)
  * mstrict-align:                         AArch64 Options.    (line   52)
  * mstrict-align <1>:                     M680x0 Options.     (line  281)
  * mstrict-align <2>:                     RISC-V Options.     (line  130)
  * mstrict-align <3>:                     RS/6000 and PowerPC Options.
                                                               (line  403)
! * mstrict-X:                             AVR Options.        (line  269)
  * mstring-compare-inline-limit:          RS/6000 and PowerPC Options.
                                                               (line  708)
! * mstringop-strategy=ALG:                x86 Options.        (line 1334)
  * mstructure-size-boundary:              ARM Options.        (line  736)
  * msubxc:                                SPARC Options.      (line  288)
  * msv-mode:                              Visium Options.     (line   52)
--- 66442,66477 ----
  * mstack-protector-guard <2>:            RISC-V Options.     (line  185)
  * mstack-protector-guard <3>:            RS/6000 and PowerPC Options.
                                                               (line  916)
! * mstack-protector-guard <4>:            x86 Options.        (line 1466)
  * mstack-protector-guard-offset:         AArch64 Options.    (line   64)
  * mstack-protector-guard-offset <1>:     ARM Options.        (line  976)
  * mstack-protector-guard-offset <2>:     RISC-V Options.     (line  185)
  * mstack-protector-guard-offset <3>:     RS/6000 and PowerPC Options.
                                                               (line  916)
! * mstack-protector-guard-offset <4>:     x86 Options.        (line 1466)
  * mstack-protector-guard-reg:            AArch64 Options.    (line   64)
  * mstack-protector-guard-reg <1>:        RISC-V Options.     (line  185)
  * mstack-protector-guard-reg <2>:        RS/6000 and PowerPC Options.
                                                               (line  916)
! * mstack-protector-guard-reg <3>:        x86 Options.        (line 1466)
  * mstack-protector-guard-symbol:         RS/6000 and PowerPC Options.
                                                               (line  916)
  * mstack-size:                           AMD GCN Options.    (line   31)
  * mstack-size <1>:                       C-SKY Options.      (line  150)
  * mstack-size <2>:                       S/390 and zSeries Options.
                                                               (line  202)
! * mstackrealign:                         x86 Options.        (line  792)
  * mstd-struct-return:                    SPARC Options.      (line  102)
! * mstore-max:                            x86 Options.        (line 1017)
  * mstrict-align:                         AArch64 Options.    (line   52)
  * mstrict-align <1>:                     M680x0 Options.     (line  281)
  * mstrict-align <2>:                     RISC-V Options.     (line  130)
  * mstrict-align <3>:                     RS/6000 and PowerPC Options.
                                                               (line  403)
! * mstrict-X:                             AVR Options.        (line  285)
  * mstring-compare-inline-limit:          RS/6000 and PowerPC Options.
                                                               (line  708)
! * mstringop-strategy=ALG:                x86 Options.        (line 1343)
  * mstructure-size-boundary:              ARM Options.        (line  736)
  * msubxc:                                SPARC Options.      (line  288)
  * msv-mode:                              Visium Options.     (line   52)
*************** look up both forms.
*** 66297,66322 ****
                                                               (line  147)
  * mtarget-align:                         Xtensa Options.     (line   74)
  * mtas:                                  SH Options.         (line  259)
! * mtbm:                                  x86 Options.        (line  893)
  * mtda:                                  V850 Options.       (line   34)
  * mtelephony:                            ARC Options.        (line  368)
  * mtext-section-literals:                Xtensa Options.     (line   47)
  * mtf:                                   MeP Options.        (line  121)
! * mthreads:                              x86 Options.        (line 1189)
  * mthreads <1>:                          x86 Windows Options.
                                                               (line   26)
  * mthumb:                                ARM Options.        (line  824)
  * mthumb-interwork:                      ARM Options.        (line   24)
  * mtiny-printf:                          MSP430 Options.     (line  122)
! * mtiny-stack:                           AVR Options.        (line  283)
  * mtiny=:                                MeP Options.        (line  125)
  * mTLS:                                  FRV Options.        (line   90)
  * mtls:                                  FRV Options.        (line   94)
  * mtls-dialect:                          ARM Options.        (line  876)
! * mtls-dialect <1>:                      x86 Options.        (line 1167)
  * mtls-dialect=desc:                     AArch64 Options.    (line   77)
  * mtls-dialect=traditional:              AArch64 Options.    (line   81)
! * mtls-direct-seg-refs:                  x86 Options.        (line 1376)
  * mtls-markers:                          RS/6000 and PowerPC Options.
                                                               (line  777)
  * mtls-size:                             AArch64 Options.    (line   85)
--- 66488,66513 ----
                                                               (line  147)
  * mtarget-align:                         Xtensa Options.     (line   74)
  * mtas:                                  SH Options.         (line  259)
! * mtbm:                                  x86 Options.        (line  902)
  * mtda:                                  V850 Options.       (line   34)
  * mtelephony:                            ARC Options.        (line  368)
  * mtext-section-literals:                Xtensa Options.     (line   47)
  * mtf:                                   MeP Options.        (line  121)
! * mthreads:                              x86 Options.        (line 1198)
  * mthreads <1>:                          x86 Windows Options.
                                                               (line   26)
  * mthumb:                                ARM Options.        (line  824)
  * mthumb-interwork:                      ARM Options.        (line   24)
  * mtiny-printf:                          MSP430 Options.     (line  122)
! * mtiny-stack:                           AVR Options.        (line  299)
  * mtiny=:                                MeP Options.        (line  125)
  * mTLS:                                  FRV Options.        (line   90)
  * mtls:                                  FRV Options.        (line   94)
  * mtls-dialect:                          ARM Options.        (line  876)
! * mtls-dialect <1>:                      x86 Options.        (line 1176)
  * mtls-dialect=desc:                     AArch64 Options.    (line   77)
  * mtls-dialect=traditional:              AArch64 Options.    (line   81)
! * mtls-direct-seg-refs:                  x86 Options.        (line 1385)
  * mtls-markers:                          RS/6000 and PowerPC Options.
                                                               (line  777)
  * mtls-size:                             AArch64 Options.    (line   85)
*************** look up both forms.
*** 66337,66349 ****
                                                               (line  541)
  * mtrap-precision:                       DEC Alpha Options.  (line  109)
  * mtrust:                                C-SKY Options.      (line   99)
! * mtsxldtrk:                             x86 Options.        (line  909)
  * mtune:                                 AArch64 Options.    (line  189)
  * mtune <1>:                             AMD GCN Options.    (line   10)
! * mtune <2>:                             ARC Options.        (line  552)
! * mtune <3>:                             ARC Options.        (line  633)
  * mtune <4>:                             ARM Options.        (line  571)
! * mtune <5>:                             CRIS Options.       (line   16)
  * mtune <6>:                             DEC Alpha Options.  (line  259)
  * mtune <7>:                             IA-64 Options.      (line  116)
  * mtune <8>:                             LoongArch Options.  (line   32)
--- 66528,66540 ----
                                                               (line  541)
  * mtrap-precision:                       DEC Alpha Options.  (line  109)
  * mtrust:                                C-SKY Options.      (line   99)
! * mtsxldtrk:                             x86 Options.        (line  918)
  * mtune:                                 AArch64 Options.    (line  189)
  * mtune <1>:                             AMD GCN Options.    (line   10)
! * mtune <2>:                             ARC Options.        (line  550)
! * mtune <3>:                             ARC Options.        (line  628)
  * mtune <4>:                             ARM Options.        (line  571)
! * mtune <5>:                             CRIS Options.       (line   15)
  * mtune <6>:                             DEC Alpha Options.  (line  259)
  * mtune <7>:                             IA-64 Options.      (line  116)
  * mtune <8>:                             LoongArch Options.  (line   32)
*************** look up both forms.
*** 66358,66375 ****
  * mtune <15>:                            SPARC Options.      (line  199)
  * mtune <16>:                            Visium Options.     (line   47)
  * mtune <17>:                            x86 Options.        (line  481)
! * mtune-ctrl=FEATURE-LIST:               x86 Options.        (line  962)
  * muclibc:                               GNU/Linux Options.  (line   14)
! * muintr:                                x86 Options.        (line  908)
  * muls:                                  Score Options.      (line   18)
! * multcost:                              ARC Options.        (line  638)
  * multcost=NUMBER:                       SH Options.         (line  281)
  * multilib-library-pic:                  FRV Options.        (line  110)
  * multiply-enabled:                      LM32 Options.       (line   15)
! * multiply_defined:                      Darwin Options.     (line  196)
! * multiply_defined_unused:               Darwin Options.     (line  196)
! * multi_module:                          Darwin Options.     (line  196)
! * munalign-prob-threshold:               ARC Options.        (line  580)
  * munaligned-access:                     ARM Options.        (line  910)
  * munaligned-access <1>:                 MIPS Options.       (line  597)
  * munaligned-doubles:                    SPARC Options.      (line   73)
--- 66549,66566 ----
  * mtune <15>:                            SPARC Options.      (line  199)
  * mtune <16>:                            Visium Options.     (line   47)
  * mtune <17>:                            x86 Options.        (line  481)
! * mtune-ctrl=FEATURE-LIST:               x86 Options.        (line  971)
  * muclibc:                               GNU/Linux Options.  (line   14)
! * muintr:                                x86 Options.        (line  917)
  * muls:                                  Score Options.      (line   18)
! * multcost:                              ARC Options.        (line  633)
  * multcost=NUMBER:                       SH Options.         (line  281)
  * multilib-library-pic:                  FRV Options.        (line  110)
  * multiply-enabled:                      LM32 Options.       (line   15)
! * multiply_defined:                      Darwin Options.     (line  204)
! * multiply_defined_unused:               Darwin Options.     (line  204)
! * multi_module:                          Darwin Options.     (line  204)
! * munalign-prob-threshold:               ARC Options.        (line  578)
  * munaligned-access:                     ARM Options.        (line  910)
  * munaligned-access <1>:                 MIPS Options.       (line  597)
  * munaligned-doubles:                    SPARC Options.      (line   73)
*************** look up both forms.
*** 66396,66406 ****
  * mv850e3v5:                             V850 Options.       (line   52)
  * mv850es:                               V850 Options.       (line   75)
  * mv8plus:                               SPARC Options.      (line  214)
! * mvaes:                                 x86 Options.        (line  901)
  * mvdsp:                                 C-SKY Options.      (line  104)
  * mveclibabi:                            RS/6000 and PowerPC Options.
                                                               (line  851)
! * mveclibabi <1>:                        x86 Options.        (line 1115)
  * mvect-double:                          Adapteva Epiphany Options.
                                                               (line  115)
  * mvect8-ret-in-mem:                     x86 Options.        (line  753)
--- 66587,66597 ----
  * mv850e3v5:                             V850 Options.       (line   52)
  * mv850es:                               V850 Options.       (line   75)
  * mv8plus:                               SPARC Options.      (line  214)
! * mvaes:                                 x86 Options.        (line  910)
  * mvdsp:                                 C-SKY Options.      (line  104)
  * mveclibabi:                            RS/6000 and PowerPC Options.
                                                               (line  851)
! * mveclibabi <1>:                        x86 Options.        (line 1124)
  * mvect-double:                          Adapteva Epiphany Options.
                                                               (line  115)
  * mvect8-ret-in-mem:                     x86 Options.        (line  753)
*************** look up both forms.
*** 66415,66423 ****
  * mvliw-branch:                          FRV Options.        (line  201)
  * mvms-return-codes:                     VMS Options.        (line    9)
  * mvolatile-asm-stop:                    IA-64 Options.      (line   32)
! * mvolatile-cache:                       ARC Options.        (line  427)
! * mvolatile-cache <1>:                   ARC Options.        (line  431)
! * mvpclmulqdq:                           x86 Options.        (line  903)
  * mvr4130-align:                         MIPS Options.       (line  840)
  * mvrsave:                               RS/6000 and PowerPC Options.
                                                               (line  153)
--- 66606,66614 ----
  * mvliw-branch:                          FRV Options.        (line  201)
  * mvms-return-codes:                     VMS Options.        (line    9)
  * mvolatile-asm-stop:                    IA-64 Options.      (line   32)
! * mvolatile-cache:                       ARC Options.        (line  425)
! * mvolatile-cache <1>:                   ARC Options.        (line  429)
! * mvpclmulqdq:                           x86 Options.        (line  912)
  * mvr4130-align:                         MIPS Options.       (line  840)
  * mvrsave:                               RS/6000 and PowerPC Options.
                                                               (line  153)
*************** look up both forms.
*** 66427,66434 ****
                                                               (line  112)
  * mvxworks:                              RS/6000 and PowerPC Options.
                                                               (line  624)
! * mvzeroupper:                           x86 Options.        (line  989)
! * mwaitpkg:                              x86 Options.        (line  902)
  * mwarn-devices-csv:                     MSP430 Options.     (line  168)
  * mwarn-dynamicstack:                    S/390 and zSeries Options.
                                                               (line  196)
--- 66618,66625 ----
                                                               (line  112)
  * mvxworks:                              RS/6000 and PowerPC Options.
                                                               (line  624)
! * mvzeroupper:                           x86 Options.        (line  998)
! * mwaitpkg:                              x86 Options.        (line  911)
  * mwarn-devices-csv:                     MSP430 Options.     (line  168)
  * mwarn-dynamicstack:                    S/390 and zSeries Options.
                                                               (line  196)
*************** look up both forms.
*** 66436,66450 ****
                                                               (line  188)
  * mwarn-mcu:                             MSP430 Options.     (line   65)
  * mwarn-multiple-fast-interrupts:        RX Options.         (line  143)
! * mwbnoinvd:                             x86 Options.        (line  869)
  * mwide-bitfields:                       MCore Options.      (line   23)
! * mwidekl:                               x86 Options.        (line  923)
  * mwin32:                                x86 Windows Options.
                                                               (line   35)
  * mwindows:                              x86 Windows Options.
                                                               (line   41)
  * mword-relocations:                     ARM Options.        (line  887)
! * mx32:                                  x86 Options.        (line 1542)
  * mxgot:                                 M680x0 Options.     (line  313)
  * mxgot <1>:                             MIPS Options.       (line  229)
  * mxl-barrel-shift:                      MicroBlaze Options. (line   32)
--- 66627,66641 ----
                                                               (line  188)
  * mwarn-mcu:                             MSP430 Options.     (line   65)
  * mwarn-multiple-fast-interrupts:        RX Options.         (line  143)
! * mwbnoinvd:                             x86 Options.        (line  878)
  * mwide-bitfields:                       MCore Options.      (line   23)
! * mwidekl:                               x86 Options.        (line  932)
  * mwin32:                                x86 Windows Options.
                                                               (line   35)
  * mwindows:                              x86 Windows Options.
                                                               (line   41)
  * mword-relocations:                     ARM Options.        (line  887)
! * mx32:                                  x86 Options.        (line 1551)
  * mxgot:                                 M680x0 Options.     (line  313)
  * mxgot <1>:                             MIPS Options.       (line  229)
  * mxl-barrel-shift:                      MicroBlaze Options. (line   32)
*************** look up both forms.
*** 66460,66471 ****
  * mxl-soft-mul:                          MicroBlaze Options. (line   26)
  * mxl-stack-check:                       MicroBlaze Options. (line   41)
  * mxnack:                                AMD GCN Options.    (line   38)
! * mxop:                                  x86 Options.        (line  876)
  * mxpa:                                  MIPS Options.       (line  411)
! * mxsave:                                x86 Options.        (line  887)
! * mxsavec:                               x86 Options.        (line  889)
! * mxsaveopt:                             x86 Options.        (line  888)
! * mxsaves:                               x86 Options.        (line  890)
  * mxy:                                   ARC Options.        (line  373)
  * myellowknife:                          RS/6000 and PowerPC Options.
                                                               (line  619)
--- 66651,66662 ----
  * mxl-soft-mul:                          MicroBlaze Options. (line   26)
  * mxl-stack-check:                       MicroBlaze Options. (line   41)
  * mxnack:                                AMD GCN Options.    (line   38)
! * mxop:                                  x86 Options.        (line  885)
  * mxpa:                                  MIPS Options.       (line  411)
! * mxsave:                                x86 Options.        (line  896)
! * mxsavec:                               x86 Options.        (line  898)
! * mxsaveopt:                             x86 Options.        (line  897)
! * mxsaves:                               x86 Options.        (line  899)
  * mxy:                                   ARC Options.        (line  373)
  * myellowknife:                          RS/6000 and PowerPC Options.
                                                               (line  619)
*************** look up both forms.
*** 66484,66509 ****
                                                               (line  485)
  * no-pie:                                Link Options.       (line  184)
  * no-sysroot-suffix:                     Directory Options.  (line  183)
! * noall_load:                            Darwin Options.     (line  196)
  * nocpp:                                 MIPS Options.       (line  642)
  * nodefaultlibs:                         Link Options.       (line  122)
! * nodevicelib:                           AVR Options.        (line  290)
! * nodevicespecs:                         AVR Options.        (line  293)
! * nofixprebinding:                       Darwin Options.     (line  196)
  * nofpu:                                 RX Options.         (line   17)
  * nolibc:                                Link Options.       (line  134)
  * nolibdld:                              HPPA Options.       (line  188)
! * nomultidefs:                           Darwin Options.     (line  196)
  * non-static:                            VxWorks Options.    (line   16)
! * noprebind:                             Darwin Options.     (line  196)
! * noseglinkedit:                         Darwin Options.     (line  196)
  * nostartfiles:                          Link Options.       (line  117)
  * nostdinc:                              Directory Options.  (line  102)
  * nostdinc++:                            C++ Dialect Options.
                                                               (line  555)
  * nostdinc++ <1>:                        Directory Options.  (line  108)
  * nostdlib:                              Link Options.       (line  146)
! * no_dead_strip_inits_and_terms:         Darwin Options.     (line  196)
  * o:                                     Overall Options.    (line  193)
  * O:                                     Optimize Options.   (line   39)
  * O0:                                    Optimize Options.   (line  166)
--- 66675,66700 ----
                                                               (line  485)
  * no-pie:                                Link Options.       (line  184)
  * no-sysroot-suffix:                     Directory Options.  (line  183)
! * noall_load:                            Darwin Options.     (line  204)
  * nocpp:                                 MIPS Options.       (line  642)
  * nodefaultlibs:                         Link Options.       (line  122)
! * nodevicelib:                           AVR Options.        (line  306)
! * nodevicespecs:                         AVR Options.        (line  309)
! * nofixprebinding:                       Darwin Options.     (line  204)
  * nofpu:                                 RX Options.         (line   17)
  * nolibc:                                Link Options.       (line  134)
  * nolibdld:                              HPPA Options.       (line  188)
! * nomultidefs:                           Darwin Options.     (line  204)
  * non-static:                            VxWorks Options.    (line   16)
! * noprebind:                             Darwin Options.     (line  204)
! * noseglinkedit:                         Darwin Options.     (line  204)
  * nostartfiles:                          Link Options.       (line  117)
  * nostdinc:                              Directory Options.  (line  102)
  * nostdinc++:                            C++ Dialect Options.
                                                               (line  555)
  * nostdinc++ <1>:                        Directory Options.  (line  108)
  * nostdlib:                              Link Options.       (line  146)
! * no_dead_strip_inits_and_terms:         Darwin Options.     (line  204)
  * o:                                     Overall Options.    (line  193)
  * O:                                     Optimize Options.   (line   39)
  * O0:                                    Optimize Options.   (line  166)
*************** look up both forms.
*** 66520,66526 ****
                                                               (line  370)
  * p <1>:                                 Common Function Attributes.
                                                               (line  814)
! * pagezero_size:                         Darwin Options.     (line  196)
  * param:                                 Optimize Options.   (line 2736)
  * pass-exit-codes:                       Overall Options.    (line  597)
  * pedantic:                              Standards.          (line   13)
--- 66711,66717 ----
                                                               (line  370)
  * p <1>:                                 Common Function Attributes.
                                                               (line  814)
! * pagezero_size:                         Darwin Options.     (line  204)
  * param:                                 Optimize Options.   (line 2736)
  * pass-exit-codes:                       Overall Options.    (line  597)
  * pedantic:                              Standards.          (line   13)
*************** look up both forms.
*** 66541,66548 ****
  * pie:                                   Link Options.       (line  178)
  * pipe:                                  Overall Options.    (line  605)
  * plt:                                   RISC-V Options.     (line   13)
! * prebind:                               Darwin Options.     (line  196)
! * prebind_all_twolevel_modules:          Darwin Options.     (line  196)
  * print-file-name:                       Developer Options.  (line  935)
  * print-libgcc-file-name:                Developer Options.  (line  969)
  * print-multi-directory:                 Developer Options.  (line  941)
--- 66732,66739 ----
  * pie:                                   Link Options.       (line  178)
  * pipe:                                  Overall Options.    (line  605)
  * plt:                                   RISC-V Options.     (line   13)
! * prebind:                               Darwin Options.     (line  204)
! * prebind_all_twolevel_modules:          Darwin Options.     (line  204)
  * print-file-name:                       Developer Options.  (line  935)
  * print-libgcc-file-name:                Developer Options.  (line  969)
  * print-multi-directory:                 Developer Options.  (line  941)
*************** look up both forms.
*** 66550,66561 ****
  * print-multi-os-directory:              Developer Options.  (line  953)
  * print-multiarch:                       Developer Options.  (line  962)
  * print-objc-runtime-info:               Objective-C and Objective-C++ Dialect Options.
!                                                              (line  227)
  * print-prog-name:                       Developer Options.  (line  966)
  * print-search-dirs:                     Developer Options.  (line  977)
  * print-sysroot:                         Developer Options.  (line  990)
  * print-sysroot-headers-suffix:          Developer Options.  (line  997)
! * private_bundle:                        Darwin Options.     (line  196)
  * pthread:                               Preprocessor Options.
                                                               (line   70)
  * pthread <1>:                           Link Options.       (line  195)
--- 66741,66752 ----
  * print-multi-os-directory:              Developer Options.  (line  953)
  * print-multiarch:                       Developer Options.  (line  962)
  * print-objc-runtime-info:               Objective-C and Objective-C++ Dialect Options.
!                                                              (line  230)
  * print-prog-name:                       Developer Options.  (line  966)
  * print-search-dirs:                     Developer Options.  (line  977)
  * print-sysroot:                         Developer Options.  (line  990)
  * print-sysroot-headers-suffix:          Developer Options.  (line  997)
! * private_bundle:                        Darwin Options.     (line  204)
  * pthread:                               Preprocessor Options.
                                                               (line   70)
  * pthread <1>:                           Link Options.       (line  195)
*************** look up both forms.
*** 66565,66571 ****
  * Qy:                                    System V Options.   (line   14)
  * r:                                     Link Options.       (line  202)
  * rdynamic:                              Link Options.       (line  206)
! * read_only_relocs:                      Darwin Options.     (line  196)
  * remap:                                 Preprocessor Options.
                                                               (line  401)
  * S:                                     Overall Options.    (line  176)
--- 66756,66762 ----
  * Qy:                                    System V Options.   (line   14)
  * r:                                     Link Options.       (line  202)
  * rdynamic:                              Link Options.       (line  206)
! * read_only_relocs:                      Darwin Options.     (line  204)
  * remap:                                 Preprocessor Options.
                                                               (line  401)
  * S:                                     Overall Options.    (line  176)
*************** look up both forms.
*** 66574,66604 ****
  * save-temps:                            Developer Options.  (line  735)
  * save-temps=cwd:                        Developer Options.  (line  746)
  * save-temps=obj:                        Developer Options.  (line  749)
! * sectalign:                             Darwin Options.     (line  196)
! * sectcreate:                            Darwin Options.     (line  196)
! * sectobjectsymbols:                     Darwin Options.     (line  196)
! * sectobjectsymbols <1>:                 Darwin Options.     (line  196)
! * sectorder:                             Darwin Options.     (line  196)
! * seg1addr:                              Darwin Options.     (line  196)
! * segaddr:                               Darwin Options.     (line  196)
! * seglinkedit:                           Darwin Options.     (line  196)
! * segprot:                               Darwin Options.     (line  196)
! * segs_read_only_addr:                   Darwin Options.     (line  196)
! * segs_read_only_addr <1>:               Darwin Options.     (line  196)
! * segs_read_write_addr:                  Darwin Options.     (line  196)
! * segs_read_write_addr <1>:              Darwin Options.     (line  196)
! * seg_addr_table:                        Darwin Options.     (line  196)
! * seg_addr_table_filename:               Darwin Options.     (line  196)
  * shared:                                Link Options.       (line  222)
  * shared-libgcc:                         Link Options.       (line  230)
  * short-calls:                           Adapteva Epiphany Options.
                                                               (line   61)
! * sim:                                   CRIS Options.       (line   82)
! * sim2:                                  CRIS Options.       (line   87)
! * single_module:                         Darwin Options.     (line  196)
  * specs:                                 Overall Options.    (line  611)
  * static:                                Link Options.       (line  217)
! * static <1>:                            Darwin Options.     (line  196)
  * static <2>:                            HPPA Options.       (line  192)
  * static-libasan:                        Link Options.       (line  264)
  * static-libgcc:                         Link Options.       (line  230)
--- 66765,66795 ----
  * save-temps:                            Developer Options.  (line  735)
  * save-temps=cwd:                        Developer Options.  (line  746)
  * save-temps=obj:                        Developer Options.  (line  749)
! * sectalign:                             Darwin Options.     (line  204)
! * sectcreate:                            Darwin Options.     (line  204)
! * sectobjectsymbols:                     Darwin Options.     (line  204)
! * sectobjectsymbols <1>:                 Darwin Options.     (line  204)
! * sectorder:                             Darwin Options.     (line  204)
! * seg1addr:                              Darwin Options.     (line  204)
! * segaddr:                               Darwin Options.     (line  204)
! * seglinkedit:                           Darwin Options.     (line  204)
! * segprot:                               Darwin Options.     (line  204)
! * segs_read_only_addr:                   Darwin Options.     (line  204)
! * segs_read_only_addr <1>:               Darwin Options.     (line  204)
! * segs_read_write_addr:                  Darwin Options.     (line  204)
! * segs_read_write_addr <1>:              Darwin Options.     (line  204)
! * seg_addr_table:                        Darwin Options.     (line  204)
! * seg_addr_table_filename:               Darwin Options.     (line  204)
  * shared:                                Link Options.       (line  222)
  * shared-libgcc:                         Link Options.       (line  230)
  * short-calls:                           Adapteva Epiphany Options.
                                                               (line   61)
! * sim:                                   CRIS Options.       (line   81)
! * sim2:                                  CRIS Options.       (line   86)
! * single_module:                         Darwin Options.     (line  204)
  * specs:                                 Overall Options.    (line  611)
  * static:                                Link Options.       (line  217)
! * static <1>:                            Darwin Options.     (line  204)
  * static <2>:                            HPPA Options.       (line  192)
  * static-libasan:                        Link Options.       (line  264)
  * static-libgcc:                         Link Options.       (line  230)
*************** look up both forms.
*** 66613,66620 ****
  * std <3>:                               Non-bugs.           (line  107)
  * stdlib:                                C++ Dialect Options.
                                                               (line  578)
! * sub_library:                           Darwin Options.     (line  196)
! * sub_umbrella:                          Darwin Options.     (line  196)
  * symbolic:                              Link Options.       (line  308)
  * sysroot:                               Directory Options.  (line  168)
  * T:                                     Link Options.       (line  314)
--- 66804,66811 ----
  * std <3>:                               Non-bugs.           (line  107)
  * stdlib:                                C++ Dialect Options.
                                                               (line  578)
! * sub_library:                           Darwin Options.     (line  204)
! * sub_umbrella:                          Darwin Options.     (line  204)
  * symbolic:                              Link Options.       (line  308)
  * sysroot:                               Directory Options.  (line  168)
  * T:                                     Link Options.       (line  314)
*************** look up both forms.
*** 66630,66644 ****
                                                               (line  377)
  * trigraphs:                             Preprocessor Options.
                                                               (line  387)
! * twolevel_namespace:                    Darwin Options.     (line  196)
  * U:                                     Preprocessor Options.
                                                               (line   42)
  * u:                                     Link Options.       (line  346)
! * umbrella:                              Darwin Options.     (line  196)
  * undef:                                 Preprocessor Options.
                                                               (line   66)
! * undefined:                             Darwin Options.     (line  196)
! * unexported_symbols_list:               Darwin Options.     (line  196)
  * v:                                     Overall Options.    (line  466)
  * version:                               Overall Options.    (line  594)
  * w:                                     Warning Options.    (line   25)
--- 66821,66835 ----
                                                               (line  377)
  * trigraphs:                             Preprocessor Options.
                                                               (line  387)
! * twolevel_namespace:                    Darwin Options.     (line  204)
  * U:                                     Preprocessor Options.
                                                               (line   42)
  * u:                                     Link Options.       (line  346)
! * umbrella:                              Darwin Options.     (line  204)
  * undef:                                 Preprocessor Options.
                                                               (line   66)
! * undefined:                             Darwin Options.     (line  204)
! * unexported_symbols_list:               Darwin Options.     (line  204)
  * v:                                     Overall Options.    (line  466)
  * version:                               Overall Options.    (line  594)
  * w:                                     Warning Options.    (line   25)
*************** look up both forms.
*** 66651,66657 ****
  * Wabi-tag:                              C++ Dialect Options.
                                                               (line  590)
  * Wabsolute-value:                       Warning Options.    (line 2352)
! * Waddr-space-convert:                   AVR Options.        (line  308)
  * Waddress:                              Warning Options.    (line 2781)
  * Waddress-of-packed-member:             Warning Options.    (line 2815)
  * Waggregate-return:                     Warning Options.    (line 2843)
--- 66842,66848 ----
  * Wabi-tag:                              C++ Dialect Options.
                                                               (line  590)
  * Wabsolute-value:                       Warning Options.    (line 2352)
! * Waddr-space-convert:                   AVR Options.        (line  324)
  * Waddress:                              Warning Options.    (line 2781)
  * Waddress-of-packed-member:             Warning Options.    (line 2815)
  * Waggregate-return:                     Warning Options.    (line 2843)
*************** look up both forms.
*** 66720,66726 ****
  * Warray-bounds:                         Warning Options.    (line 1811)
  * Warray-compare:                        Warning Options.    (line 1830)
  * Wassign-intercept:                     Objective-C and Objective-C++ Dialect Options.
!                                                              (line  170)
  * Wattribute-alias:                      Warning Options.    (line 1886)
  * Wattribute-warning:                    Warning Options.    (line 3072)
  * Wattributes:                           Warning Options.    (line 2853)
--- 66911,66917 ----
  * Warray-bounds:                         Warning Options.    (line 1811)
  * Warray-compare:                        Warning Options.    (line 1830)
  * Wassign-intercept:                     Objective-C and Objective-C++ Dialect Options.
!                                                              (line  173)
  * Wattribute-alias:                      Warning Options.    (line 1886)
  * Wattribute-warning:                    Warning Options.    (line 3072)
  * Wattributes:                           Warning Options.    (line 2853)
*************** look up both forms.
*** 66797,66803 ****
  * Wduplicate-decl-specifier:             Warning Options.    (line  427)
  * Wduplicated-branches:                  Warning Options.    (line 1959)
  * Wduplicated-cond:                      Warning Options.    (line 1970)
! * weak_reference_mismatches:             Darwin Options.     (line  196)
  * Weffc++:                               C++ Dialect Options.
                                                               (line  951)
  * Wempty-body:                           Warning Options.    (line 2662)
--- 66988,66994 ----
  * Wduplicate-decl-specifier:             Warning Options.    (line  427)
  * Wduplicated-branches:                  Warning Options.    (line 1959)
  * Wduplicated-cond:                      Warning Options.    (line 1970)
! * weak_reference_mismatches:             Darwin Options.     (line  204)
  * Weffc++:                               C++ Dialect Options.
                                                               (line  951)
  * Wempty-body:                           Warning Options.    (line 2662)
*************** look up both forms.
*** 66842,66849 ****
  * Wframe-address:                        Warning Options.    (line 1976)
  * Wframe-larger-than=:                   Warning Options.    (line 2243)
  * Wfree-nonheap-object:                  Warning Options.    (line 2260)
! * whatsloaded:                           Darwin Options.     (line  196)
! * whyload:                               Darwin Options.     (line  196)
  * Wif-not-aligned:                       Warning Options.    (line  791)
  * Wignored-attributes:                   Warning Options.    (line  806)
  * Wignored-qualifiers:                   Warning Options.    (line  795)
--- 67033,67040 ----
  * Wframe-address:                        Warning Options.    (line 1976)
  * Wframe-larger-than=:                   Warning Options.    (line 2243)
  * Wfree-nonheap-object:                  Warning Options.    (line 2260)
! * whatsloaded:                           Darwin Options.     (line  204)
! * whyload:                               Darwin Options.     (line  204)
  * Wif-not-aligned:                       Warning Options.    (line  791)
  * Wignored-attributes:                   Warning Options.    (line  806)
  * Wignored-qualifiers:                   Warning Options.    (line  795)
*************** look up both forms.
*** 66905,66911 ****
  * Wmissing-prototypes:                   Warning Options.    (line 2928)
  * Wmissing-requires:                     Warning Options.    (line 2978)
  * Wmissing-template-keyword:             Warning Options.    (line 2995)
! * Wmisspelled-isr:                       AVR Options.        (line  313)
  * Wmultichar:                            Warning Options.    (line 3023)
  * Wmultiple-inheritance:                 C++ Dialect Options.
                                                               (line 1098)
--- 67096,67102 ----
  * Wmissing-prototypes:                   Warning Options.    (line 2928)
  * Wmissing-requires:                     Warning Options.    (line 2978)
  * Wmissing-template-keyword:             Warning Options.    (line 2995)
! * Wmisspelled-isr:                       AVR Options.        (line  329)
  * Wmultichar:                            Warning Options.    (line 3023)
  * Wmultiple-inheritance:                 C++ Dialect Options.
                                                               (line 1098)
*************** look up both forms.
*** 66917,66923 ****
  * Wnested-externs:                       Warning Options.    (line 3195)
  * Wno-abi:                               Warning Options.    (line  267)
  * Wno-absolute-value:                    Warning Options.    (line 2352)
! * Wno-addr-space-convert:                AVR Options.        (line  308)
  * Wno-address:                           Warning Options.    (line 2781)
  * Wno-address-of-packed-member:          Warning Options.    (line 2815)
  * Wno-aggregate-return:                  Warning Options.    (line 2843)
--- 67108,67114 ----
  * Wnested-externs:                       Warning Options.    (line 3195)
  * Wno-abi:                               Warning Options.    (line  267)
  * Wno-absolute-value:                    Warning Options.    (line 2352)
! * Wno-addr-space-convert:                AVR Options.        (line  324)
  * Wno-address:                           Warning Options.    (line 2781)
  * Wno-address-of-packed-member:          Warning Options.    (line 2815)
  * Wno-aggregate-return:                  Warning Options.    (line 2843)
*************** look up both forms.
*** 66988,66994 ****
  * Wno-array-compare:                     Warning Options.    (line 1830)
  * Wno-array-parameter:                   Warning Options.    (line 1842)
  * Wno-assign-intercept:                  Objective-C and Objective-C++ Dialect Options.
!                                                              (line  170)
  * Wno-attribute-alias:                   Warning Options.    (line 1886)
  * Wno-attribute-warning:                 Warning Options.    (line 3072)
  * Wno-attributes:                        Warning Options.    (line 2853)
--- 67179,67185 ----
  * Wno-array-compare:                     Warning Options.    (line 1830)
  * Wno-array-parameter:                   Warning Options.    (line 1842)
  * Wno-assign-intercept:                  Objective-C and Objective-C++ Dialect Options.
!                                                              (line  173)
  * Wno-attribute-alias:                   Warning Options.    (line 1886)
  * Wno-attribute-warning:                 Warning Options.    (line 3072)
  * Wno-attributes:                        Warning Options.    (line 2853)
*************** look up both forms.
*** 67153,67159 ****
  * Wno-missing-prototypes:                Warning Options.    (line 2928)
  * Wno-missing-requires:                  Warning Options.    (line 2978)
  * Wno-missing-template-keyword:          Warning Options.    (line 2995)
! * Wno-misspelled-isr:                    AVR Options.        (line  313)
  * Wno-multichar:                         Warning Options.    (line 3023)
  * Wno-multiple-inheritance:              C++ Dialect Options.
                                                               (line 1098)
--- 67344,67350 ----
  * Wno-missing-prototypes:                Warning Options.    (line 2928)
  * Wno-missing-requires:                  Warning Options.    (line 2978)
  * Wno-missing-template-keyword:          Warning Options.    (line 2995)
! * Wno-misspelled-isr:                    AVR Options.        (line  329)
  * Wno-multichar:                         Warning Options.    (line 3023)
  * Wno-multiple-inheritance:              C++ Dialect Options.
                                                               (line 1098)
*************** look up both forms.
*** 67210,67218 ****
  * Wno-pragmas:                           Warning Options.    (line 1397)
  * Wno-prio-ctor-dtor:                    Warning Options.    (line 1402)
  * Wno-property-assign-default:           Objective-C and Objective-C++ Dialect Options.
!                                                              (line  174)
  * Wno-protocol:                          Objective-C and Objective-C++ Dialect Options.
!                                                              (line  178)
  * Wno-range-loop-construct:              C++ Dialect Options.
                                                               (line  895)
  * Wno-redundant-decls:                   Warning Options.    (line 3172)
--- 67401,67409 ----
  * Wno-pragmas:                           Warning Options.    (line 1397)
  * Wno-prio-ctor-dtor:                    Warning Options.    (line 1402)
  * Wno-property-assign-default:           Objective-C and Objective-C++ Dialect Options.
!                                                              (line  177)
  * Wno-protocol:                          Objective-C and Objective-C++ Dialect Options.
!                                                              (line  181)
  * Wno-range-loop-construct:              C++ Dialect Options.
                                                               (line  895)
  * Wno-redundant-decls:                   Warning Options.    (line 3172)
*************** look up both forms.
*** 67229,67235 ****
  * Wno-return-type:                       Warning Options.    (line 1065)
  * Wno-scalar-storage-order:              Warning Options.    (line 2709)
  * Wno-selector:                          Objective-C and Objective-C++ Dialect Options.
!                                                              (line  195)
  * Wno-sequence-point:                    Warning Options.    (line 1008)
  * Wno-shadow:                            Warning Options.    (line 2175)
  * Wno-shadow-ivar:                       Warning Options.    (line 2186)
--- 67420,67426 ----
  * Wno-return-type:                       Warning Options.    (line 1065)
  * Wno-scalar-storage-order:              Warning Options.    (line 2709)
  * Wno-selector:                          Objective-C and Objective-C++ Dialect Options.
!                                                              (line  198)
  * Wno-sequence-point:                    Warning Options.    (line 1008)
  * Wno-shadow:                            Warning Options.    (line 2175)
  * Wno-shadow-ivar:                       Warning Options.    (line 2186)
*************** look up both forms.
*** 67256,67262 ****
  * Wno-strict-overflow:                   Warning Options.    (line 1449)
  * Wno-strict-prototypes:                 Warning Options.    (line 2901)
  * Wno-strict-selector-match:             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  207)
  * Wno-string-compare:                    Warning Options.    (line 1497)
  * Wno-stringop-overflow:                 Warning Options.    (line 1519)
  * Wno-stringop-overflow <1>:             Warning Options.    (line 1558)
--- 67447,67453 ----
  * Wno-strict-overflow:                   Warning Options.    (line 1449)
  * Wno-strict-prototypes:                 Warning Options.    (line 2901)
  * Wno-strict-selector-match:             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  210)
  * Wno-string-compare:                    Warning Options.    (line 1497)
  * Wno-stringop-overflow:                 Warning Options.    (line 1519)
  * Wno-stringop-overflow <1>:             Warning Options.    (line 1558)
*************** look up both forms.
*** 67297,67303 ****
  * Wno-tsan:                              Warning Options.    (line 2337)
  * Wno-type-limits:                       Warning Options.    (line 2345)
  * Wno-undeclared-selector:               Objective-C and Objective-C++ Dialect Options.
!                                                              (line  215)
  * Wno-undef:                             Warning Options.    (line 2378)
  * Wno-uninitialized:                     Warning Options.    (line 1282)
  * Wno-unknown-pragmas:                   Warning Options.    (line 1390)
--- 67488,67494 ----
  * Wno-tsan:                              Warning Options.    (line 2337)
  * Wno-type-limits:                       Warning Options.    (line 2345)
  * Wno-undeclared-selector:               Objective-C and Objective-C++ Dialect Options.
!                                                              (line  218)
  * Wno-undef:                             Warning Options.    (line 2378)
  * Wno-uninitialized:                     Warning Options.    (line 1282)
  * Wno-unknown-pragmas:                   Warning Options.    (line 1390)
*************** look up both forms.
*** 67351,67357 ****
  * Wnormalized=:                          Warning Options.    (line 3029)
  * Wnull-dereference:                     Warning Options.    (line  630)
  * Wobjc-root-class:                      Objective-C and Objective-C++ Dialect Options.
!                                                              (line  188)
  * Wodr:                                  Warning Options.    (line 3092)
  * Wold-style-cast:                       C++ Dialect Options.
                                                               (line 1000)
--- 67542,67548 ----
  * Wnormalized=:                          Warning Options.    (line 3029)
  * Wnull-dereference:                     Warning Options.    (line  630)
  * Wobjc-root-class:                      Objective-C and Objective-C++ Dialect Options.
!                                                              (line  191)
  * Wodr:                                  Warning Options.    (line 3092)
  * Wold-style-cast:                       C++ Dialect Options.
                                                               (line 1000)
*************** look up both forms.
*** 67388,67396 ****
  * Wpragmas:                              Warning Options.    (line 1397)
  * Wprio-ctor-dtor:                       Warning Options.    (line 1402)
  * Wproperty-assign-default:              Objective-C and Objective-C++ Dialect Options.
!                                                              (line  174)
  * Wprotocol:                             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  178)
  * Wrange-loop-construct:                 C++ Dialect Options.
                                                               (line  895)
  * wrapper:                               Overall Options.    (line  620)
--- 67579,67587 ----
  * Wpragmas:                              Warning Options.    (line 1397)
  * Wprio-ctor-dtor:                       Warning Options.    (line 1402)
  * Wproperty-assign-default:              Objective-C and Objective-C++ Dialect Options.
!                                                              (line  177)
  * Wprotocol:                             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  181)
  * Wrange-loop-construct:                 C++ Dialect Options.
                                                               (line  895)
  * wrapper:                               Overall Options.    (line  620)
*************** look up both forms.
*** 67408,67414 ****
  * Wreturn-type:                          Warning Options.    (line 1065)
  * Wscalar-storage-order:                 Warning Options.    (line 2709)
  * Wselector:                             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  195)
  * Wsequence-point:                       Warning Options.    (line 1008)
  * Wshadow:                               Warning Options.    (line 2175)
  * Wshadow-ivar:                          Warning Options.    (line 2186)
--- 67599,67605 ----
  * Wreturn-type:                          Warning Options.    (line 1065)
  * Wscalar-storage-order:                 Warning Options.    (line 2709)
  * Wselector:                             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  198)
  * Wsequence-point:                       Warning Options.    (line 1008)
  * Wshadow:                               Warning Options.    (line 2175)
  * Wshadow-ivar:                          Warning Options.    (line 2186)
*************** look up both forms.
*** 67438,67444 ****
  * Wstrict-overflow:                      Warning Options.    (line 1449)
  * Wstrict-prototypes:                    Warning Options.    (line 2901)
  * Wstrict-selector-match:                Objective-C and Objective-C++ Dialect Options.
!                                                              (line  207)
  * Wstring-compare:                       Warning Options.    (line 1497)
  * Wstringop-overflow:                    Warning Options.    (line 1519)
  * Wstringop-overflow <1>:                Warning Options.    (line 1558)
--- 67629,67635 ----
  * Wstrict-overflow:                      Warning Options.    (line 1449)
  * Wstrict-prototypes:                    Warning Options.    (line 2901)
  * Wstrict-selector-match:                Objective-C and Objective-C++ Dialect Options.
!                                                              (line  210)
  * Wstring-compare:                       Warning Options.    (line 1497)
  * Wstringop-overflow:                    Warning Options.    (line 1519)
  * Wstringop-overflow <1>:                Warning Options.    (line 1558)
*************** look up both forms.
*** 67480,67486 ****
  * Wtsan:                                 Warning Options.    (line 2337)
  * Wtype-limits:                          Warning Options.    (line 2345)
  * Wundeclared-selector:                  Objective-C and Objective-C++ Dialect Options.
!                                                              (line  215)
  * Wundef:                                Warning Options.    (line 2378)
  * Wuninitialized:                        Warning Options.    (line 1282)
  * Wunknown-pragmas:                      Warning Options.    (line 1390)
--- 67671,67677 ----
  * Wtsan:                                 Warning Options.    (line 2337)
  * Wtype-limits:                          Warning Options.    (line 2345)
  * Wundeclared-selector:                  Objective-C and Objective-C++ Dialect Options.
!                                                              (line  218)
  * Wundef:                                Warning Options.    (line 2378)
  * Wuninitialized:                        Warning Options.    (line 1282)
  * Wunknown-pragmas:                      Warning Options.    (line 1390)
*************** Keyword Index
*** 68014,68020 ****
  * __far M32C Named Address Spaces:       Named Address Spaces.
                                                               (line  153)
  * __far RL78 Named Address Spaces:       Named Address Spaces.
!                                                              (line  177)
  * __flash AVR Named Address Spaces:      Named Address Spaces.
                                                               (line   44)
  * __flash1 AVR Named Address Spaces:     Named Address Spaces.
--- 68205,68211 ----
  * __far M32C Named Address Spaces:       Named Address Spaces.
                                                               (line  153)
  * __far RL78 Named Address Spaces:       Named Address Spaces.
!                                                              (line  176)
  * __flash AVR Named Address Spaces:      Named Address Spaces.
                                                               (line   44)
  * __flash1 AVR Named Address Spaces:     Named Address Spaces.
*************** Keyword Index
*** 68041,68051 ****
  * __PRETTY_FUNCTION__ identifier:        Function Names.     (line    6)
  * __real__ keyword:                      Complex.            (line   43)
  * __regio_symbol PRU Named Address Spaces: Named Address Spaces.
!                                                              (line  162)
  * __seg_fs x86 named address space:      Named Address Spaces.
!                                                              (line  190)
  * __seg_gs x86 named address space:      Named Address Spaces.
!                                                              (line  190)
  * __STDC_HOSTED__:                       Standards.          (line   13)
  * __sync_add_and_fetch:                  __sync Builtins.    (line   72)
  * __sync_and_and_fetch:                  __sync Builtins.    (line   72)
--- 68232,68242 ----
  * __PRETTY_FUNCTION__ identifier:        Function Names.     (line    6)
  * __real__ keyword:                      Complex.            (line   43)
  * __regio_symbol PRU Named Address Spaces: Named Address Spaces.
!                                                              (line  161)
  * __seg_fs x86 named address space:      Named Address Spaces.
!                                                              (line  189)
  * __seg_gs x86 named address space:      Named Address Spaces.
!                                                              (line  189)
  * __STDC_HOSTED__:                       Standards.          (line   13)
  * __sync_add_and_fetch:                  __sync Builtins.    (line   72)
  * __sync_and_and_fetch:                  __sync Builtins.    (line   72)
*************** Keyword Index
*** 68455,68467 ****
  * declaring static data in C++:          Static Definitions. (line    6)
  * defining static data in C++:           Static Definitions. (line    6)
  * dependencies for make as output:       Environment Variables.
!                                                              (line  173)
  * dependencies for make as output <1>:   Environment Variables.
!                                                              (line  189)
  * dependencies, make:                    Preprocessor Options.
                                                               (line   77)
  * DEPENDENCIES_OUTPUT:                   Environment Variables.
!                                                              (line  172)
  * dependent name lookup:                 Name lookup.        (line    6)
  * deprecated enumerator attribute:       Enumerator Attributes.
                                                               (line   28)
--- 68646,68658 ----
  * declaring static data in C++:          Static Definitions. (line    6)
  * defining static data in C++:           Static Definitions. (line    6)
  * dependencies for make as output:       Environment Variables.
!                                                              (line  172)
  * dependencies for make as output <1>:   Environment Variables.
!                                                              (line  188)
  * dependencies, make:                    Preprocessor Options.
                                                               (line   77)
  * DEPENDENCIES_OUTPUT:                   Environment Variables.
!                                                              (line  171)
  * dependent name lookup:                 Name lookup.        (line    6)
  * deprecated enumerator attribute:       Enumerator Attributes.
                                                               (line   28)
*************** Keyword Index
*** 68523,68529 ****
                                                               (line    9)
  * eightbit_data variable attribute, H8/300: H8/300 Variable Attributes.
                                                               (line    9)
! * EIND:                                  AVR Options.        (line  319)
  * either function attribute, MSP430:     MSP430 Function Attributes.
                                                               (line   57)
  * either variable attribute, MSP430:     MSP430 Variable Attributes.
--- 68714,68720 ----
                                                               (line    9)
  * eightbit_data variable attribute, H8/300: H8/300 Variable Attributes.
                                                               (line    9)
! * EIND:                                  AVR Options.        (line  335)
  * either function attribute, MSP430:     MSP430 Function Attributes.
                                                               (line   57)
  * either variable attribute, MSP430:     MSP430 Variable Attributes.
*************** Keyword Index
*** 68813,68819 ****
  * increment operators:                   Bug Criteria.       (line   17)
  * index:                                 Other Builtins.     (line    6)
  * indirect calls, ARC:                   ARC Function Attributes.
!                                                              (line   27)
  * indirect calls, ARM:                   ARM Function Attributes.
                                                               (line   38)
  * indirect calls, Blackfin:              Blackfin Function Attributes.
--- 69004,69010 ----
  * increment operators:                   Bug Criteria.       (line   17)
  * index:                                 Other Builtins.     (line    6)
  * indirect calls, ARC:                   ARC Function Attributes.
!                                                              (line   26)
  * indirect calls, ARM:                   ARM Function Attributes.
                                                               (line   38)
  * indirect calls, Blackfin:              Blackfin Function Attributes.
*************** Keyword Index
*** 68960,68968 ****
  * j1f:                                   Other Builtins.     (line    6)
  * j1l:                                   Other Builtins.     (line    6)
  * jli_always function attribute, ARC:    ARC Function Attributes.
!                                                              (line   44)
  * jli_fixed function attribute, ARC:     ARC Function Attributes.
!                                                              (line   50)
  * jn:                                    Other Builtins.     (line    6)
  * jnf:                                   Other Builtins.     (line    6)
  * jnl:                                   Other Builtins.     (line    6)
--- 69151,69159 ----
  * j1f:                                   Other Builtins.     (line    6)
  * j1l:                                   Other Builtins.     (line    6)
  * jli_always function attribute, ARC:    ARC Function Attributes.
!                                                              (line   43)
  * jli_fixed function attribute, ARC:     ARC Function Attributes.
!                                                              (line   49)
  * jn:                                    Other Builtins.     (line    6)
  * jnf:                                   Other Builtins.     (line    6)
  * jnl:                                   Other Builtins.     (line    6)
*************** Keyword Index
*** 69079,69085 ****
  * longjmp incompatibilities:             Incompatibilities.  (line   39)
  * longjmp warnings:                      Warning Options.    (line 1375)
  * long_call function attribute, ARC:     ARC Function Attributes.
!                                                              (line   27)
  * long_call function attribute, ARM:     ARM Function Attributes.
                                                               (line   38)
  * long_call function attribute, Epiphany: Epiphany Function Attributes.
--- 69270,69276 ----
  * longjmp incompatibilities:             Incompatibilities.  (line   39)
  * longjmp warnings:                      Warning Options.    (line 1375)
  * long_call function attribute, ARC:     ARC Function Attributes.
!                                                              (line   26)
  * long_call function attribute, ARM:     ARM Function Attributes.
                                                               (line   38)
  * long_call function attribute, Epiphany: Epiphany Function Attributes.
*************** Keyword Index
*** 69122,69128 ****
                                                               (line  245)
  * MCore options:                         MCore Options.      (line    6)
  * medium_call function attribute, ARC:   ARC Function Attributes.
!                                                              (line   27)
  * member fns, automatically inline:      Inline.             (line   68)
  * memchr:                                Other Builtins.     (line    6)
  * memcmp:                                Other Builtins.     (line    6)
--- 69313,69319 ----
                                                               (line  245)
  * MCore options:                         MCore Options.      (line    6)
  * medium_call function attribute, ARC:   ARC Function Attributes.
!                                                              (line   26)
  * member fns, automatically inline:      Inline.             (line   68)
  * memchr:                                Other Builtins.     (line    6)
  * memcmp:                                Other Builtins.     (line    6)
*************** Keyword Index
*** 69185,69191 ****
  * multiprecision arithmetic:             Long Long.          (line    6)
  * n in constraint:                       Simple Constraints. (line   73)
  * naked function attribute, ARC:         ARC Function Attributes.
!                                                              (line   59)
  * naked function attribute, ARM:         ARM Function Attributes.
                                                               (line   48)
  * naked function attribute, AVR:         AVR Function Attributes.
--- 69376,69382 ----
  * multiprecision arithmetic:             Long Long.          (line    6)
  * n in constraint:                       Simple Constraints. (line   73)
  * naked function attribute, ARC:         ARC Function Attributes.
!                                                              (line   58)
  * naked function attribute, ARM:         ARM Function Attributes.
                                                               (line   48)
  * naked function attribute, AVR:         AVR Function Attributes.
*************** Keyword Index
*** 69339,69352 ****
  * omitted middle-operands:               Conditionals.       (line    6)
  * open coding:                           Inline.             (line    6)
  * OpenACC accelerator programming:       C Dialect Options.  (line  388)
! * OpenACC accelerator programming <1>:   C Dialect Options.  (line  397)
  * OpenACC accelerator programming <2>:   Warning Options.    (line 3096)
  * OpenACC offloading options:            C Dialect Options.  (line  373)
  * OpenACC offloading targets:            C Dialect Options.  (line  360)
  * OpenMP offloading options:             C Dialect Options.  (line  373)
  * OpenMP offloading targets:             C Dialect Options.  (line  360)
! * OpenMP parallel:                       C Dialect Options.  (line  403)
! * OpenMP SIMD:                           C Dialect Options.  (line  412)
  * OpenRISC Options:                      OpenRISC Options.   (line    6)
  * operand constraints, asm:              Constraints.        (line    6)
  * optimize function attribute:           Common Function Attributes.
--- 69530,69543 ----
  * omitted middle-operands:               Conditionals.       (line    6)
  * open coding:                           Inline.             (line    6)
  * OpenACC accelerator programming:       C Dialect Options.  (line  388)
! * OpenACC accelerator programming <1>:   C Dialect Options.  (line  396)
  * OpenACC accelerator programming <2>:   Warning Options.    (line 3096)
  * OpenACC offloading options:            C Dialect Options.  (line  373)
  * OpenACC offloading targets:            C Dialect Options.  (line  360)
  * OpenMP offloading options:             C Dialect Options.  (line  373)
  * OpenMP offloading targets:             C Dialect Options.  (line  360)
! * OpenMP parallel:                       C Dialect Options.  (line  402)
! * OpenMP SIMD:                           C Dialect Options.  (line  410)
  * OpenRISC Options:                      OpenRISC Options.   (line    6)
  * operand constraints, asm:              Constraints.        (line    6)
  * optimize function attribute:           Common Function Attributes.
*************** Keyword Index
*** 69512,69521 ****
  * r fixed-suffix:                        Fixed-Point.        (line    6)
  * R fixed-suffix:                        Fixed-Point.        (line    6)
  * r in constraint:                       Simple Constraints. (line   64)
! * RAMPD:                                 AVR Options.        (line  430)
! * RAMPX:                                 AVR Options.        (line  430)
! * RAMPY:                                 AVR Options.        (line  430)
! * RAMPZ:                                 AVR Options.        (line  430)
  * range1 GCC_COLORS capability:          Diagnostic Message Formatting Options.
                                                               (line  107)
  * range2 GCC_COLORS capability:          Diagnostic Message Formatting Options.
--- 69703,69712 ----
  * r fixed-suffix:                        Fixed-Point.        (line    6)
  * R fixed-suffix:                        Fixed-Point.        (line    6)
  * r in constraint:                       Simple Constraints. (line   64)
! * RAMPD:                                 AVR Options.        (line  446)
! * RAMPX:                                 AVR Options.        (line  446)
! * RAMPY:                                 AVR Options.        (line  446)
! * RAMPZ:                                 AVR Options.        (line  446)
  * range1 GCC_COLORS capability:          Diagnostic Message Formatting Options.
                                                               (line  107)
  * range2 GCC_COLORS capability:          Diagnostic Message Formatting Options.
*************** Keyword Index
*** 69627,69633 ****
  * section variable attribute:            Common Variable Attributes.
                                                               (line  307)
  * secure_call function attribute, ARC:   ARC Function Attributes.
!                                                              (line   54)
  * selectany variable attribute:          Microsoft Windows Variable Attributes.
                                                               (line   16)
  * sentinel function attribute:           Common Function Attributes.
--- 69818,69824 ----
  * section variable attribute:            Common Variable Attributes.
                                                               (line  307)
  * secure_call function attribute, ARC:   ARC Function Attributes.
!                                                              (line   53)
  * selectany variable attribute:          Microsoft Windows Variable Attributes.
                                                               (line   16)
  * sentinel function attribute:           Common Function Attributes.
*************** Keyword Index
*** 69645,69651 ****
  * shortcall function attribute, PowerPC: PowerPC Function Attributes.
                                                               (line   10)
  * short_call function attribute, ARC:    ARC Function Attributes.
!                                                              (line   27)
  * short_call function attribute, ARM:    ARM Function Attributes.
                                                               (line   38)
  * short_call function attribute, Epiphany: Epiphany Function Attributes.
--- 69836,69842 ----
  * shortcall function attribute, PowerPC: PowerPC Function Attributes.
                                                               (line   10)
  * short_call function attribute, ARC:    ARC Function Attributes.
!                                                              (line   26)
  * short_call function attribute, ARM:    ARM Function Attributes.
                                                               (line   38)
  * short_call function attribute, Epiphany: Epiphany Function Attributes.
*************** Keyword Index
*** 69670,69676 ****
  * significand:                           Other Builtins.     (line    6)
  * significandf:                          Other Builtins.     (line    6)
  * significandl:                          Other Builtins.     (line    6)
! * SIMD:                                  C Dialect Options.  (line  412)
  * simd function attribute:               Common Function Attributes.
                                                               (line 1180)
  * simple constraints:                    Simple Constraints. (line    6)
--- 69861,69867 ----
  * significand:                           Other Builtins.     (line    6)
  * significandf:                          Other Builtins.     (line    6)
  * significandl:                          Other Builtins.     (line    6)
! * SIMD:                                  C Dialect Options.  (line  410)
  * simd function attribute:               Common Function Attributes.
                                                               (line 1180)
  * simple constraints:                    Simple Constraints. (line    6)
*************** Keyword Index
*** 69691,69697 ****
  * snprintf:                              Other Builtins.     (line    6)
  * Solaris 2 options:                     Solaris 2 Options.  (line    6)
  * SOURCE_DATE_EPOCH:                     Environment Variables.
!                                                              (line  194)
  * SPARC options:                         SPARC Options.      (line    6)
  * Spec Files:                            Spec Files.         (line    6)
  * specified registers:                   Explicit Register Variables.
--- 69882,69888 ----
  * snprintf:                              Other Builtins.     (line    6)
  * Solaris 2 options:                     Solaris 2 Options.  (line    6)
  * SOURCE_DATE_EPOCH:                     Environment Variables.
!                                                              (line  193)
  * SPARC options:                         SPARC Options.      (line    6)
  * Spec Files:                            Spec Files.         (line    6)
  * specified registers:                   Explicit Register Variables.
*************** Keyword Index
*** 69759,69765 ****
  * subscripting and function values:      Subscripting.       (line    6)
  * suffixes for C++ source:               Invoking G++.       (line    6)
  * SUNPRO_DEPENDENCIES:                   Environment Variables.
!                                                              (line  188)
  * suppressing warnings:                  Warning Options.    (line    6)
  * surprises in C++:                      C++ Misunderstandings.
                                                               (line    6)
--- 69950,69956 ----
  * subscripting and function values:      Subscripting.       (line    6)
  * suffixes for C++ source:               Invoking G++.       (line    6)
  * SUNPRO_DEPENDENCIES:                   Environment Variables.
!                                                              (line  187)
  * suppressing warnings:                  Warning Options.    (line    6)
  * surprises in C++:                      C++ Misunderstandings.
                                                               (line    6)
*************** Keyword Index
*** 70336,70342 ****
  * X in constraint:                       Simple Constraints. (line  122)
  * X3.159-1989:                           Standards.          (line   13)
  * x86 named address spaces:              Named Address Spaces.
!                                                              (line  185)
  * x86 Options:                           x86 Options.        (line    6)
  * x86 Windows Options:                   x86 Windows Options.
                                                               (line    6)
--- 70527,70533 ----
  * X in constraint:                       Simple Constraints. (line  122)
  * X3.159-1989:                           Standards.          (line   13)
  * x86 named address spaces:              Named Address Spaces.
!                                                              (line  184)
  * x86 Options:                           x86 Options.        (line    6)
  * x86 Windows Options:                   x86 Windows Options.
                                                               (line    6)
*************** Keyword Index
*** 70363,70802 ****
  
  Tag Table:
  Node: Top2135
! Node: G++ and GCC4093
! Node: Standards6139
! Node: Invoking GCC19766
! Node: Option Summary24993
! Node: Overall Options83928
! Node: Invoking G++111454
! Node: C Dialect Options112977
! Node: C++ Dialect Options134016
! Node: Objective-C and Objective-C++ Dialect Options196575
! Node: Diagnostic Message Formatting Options208322
! Node: Warning Options238895
! Ref: Wtrigraphs343793
! Node: Static Analyzer Options389156
! Node: Debugging Options409708
! Node: Optimize Options430945
! Ref: Type-punning503405
! Node: Instrumentation Options623696
! Node: Preprocessor Options671808
! Ref: dashMF676655
! Ref: fdollars-in-identifiers681317
! Node: Assembler Options694642
! Node: Link Options695333
! Ref: Link Options-Footnote-1712293
! Node: Directory Options712629
! Node: Code Gen Options721032
! Node: Developer Options749905
! Node: Submodel Options791290
! Node: AArch64 Options793122
! Ref: aarch64-feature-modifiers808695
! Node: Adapteva Epiphany Options814256
! Node: AMD GCN Options820208
! Node: ARC Options821771
! Node: ARM Options842540
! Node: AVR Options884565
! Node: Blackfin Options911102
! Node: C6X Options918994
! Node: CRIS Options920537
! Node: CR16 Options923723
! Node: C-SKY Options924635
! Node: Darwin Options930362
! Node: DEC Alpha Options937803
! Node: eBPF Options949419
! Node: FR30 Options951795
! Node: FT32 Options952355
! Node: FRV Options953301
! Node: GNU/Linux Options960065
! Node: H8/300 Options961446
! Node: HPPA Options962898
! Node: IA-64 Options972430
! Node: LM32 Options980558
! Node: LoongArch Options981086
! Node: M32C Options987364
! Node: M32R/D Options988642
! Node: M680x0 Options992187
! Node: MCore Options1006342
! Node: MeP Options1007844
! Node: MicroBlaze Options1011804
! Node: MIPS Options1014869
! Node: MMIX Options1051666
! Node: MN10300 Options1054143
! Node: Moxie Options1056686
! Node: MSP430 Options1057173
! Node: NDS32 Options1064934
! Node: Nios II Options1067104
! Node: Nvidia PTX Options1080320
! Node: OpenRISC Options1083816
! Node: PDP-11 Options1086570
! Node: picoChip Options1087819
! Node: PowerPC Options1089957
! Node: PRU Options1090177
! Node: RISC-V Options1092386
! Node: RL78 Options1100787
! Node: RS/6000 and PowerPC Options1104562
! Node: RX Options1146078
! Node: S/390 and zSeries Options1154680
! Node: Score Options1165480
! Node: SH Options1166329
! Node: Solaris 2 Options1181469
! Node: SPARC Options1182707
! Node: System V Options1198359
! Node: TILE-Gx Options1199187
! Node: TILEPro Options1200205
! Node: V850 Options1200709
! Node: VAX Options1207396
! Node: Visium Options1208088
! Node: VMS Options1210396
! Node: VxWorks Options1211212
! Node: x86 Options1212364
! Node: x86 Windows Options1281467
! Node: Xstormy16 Options1284273
! Node: Xtensa Options1284567
! Node: zSeries Options1290703
! Node: Spec Files1290899
! Node: Environment Variables1316978
! Node: Precompiled Headers1326411
! Node: C++ Modules1332620
! Ref: C++ Modules-Footnote-11338615
! Node: C++ Module Mapper1338868
! Node: C++ Module Preprocessing1344021
! Node: C++ Compiled Module Interface1345850
! Ref: C++ Compiled Module Interface-Footnote-11349234
! Ref: C++ Compiled Module Interface-Footnote-21349323
! Node: C Implementation1349379
! Node: Translation implementation1351070
! Node: Environment implementation1351661
! Node: Identifiers implementation1352215
! Node: Characters implementation1353301
! Node: Integers implementation1356951
! Node: Floating point implementation1359000
! Node: Arrays and pointers implementation1362063
! Ref: Arrays and pointers implementation-Footnote-11363523
! Node: Hints implementation1363649
! Node: Structures unions enumerations and bit-fields implementation1365144
! Node: Qualifiers implementation1367368
! Node: Declarators implementation1369429
! Node: Statements implementation1369770
! Node: Preprocessing directives implementation1370096
! Node: Library functions implementation1372417
! Node: Architecture implementation1373066
! Node: Locale-specific behavior implementation1374711
! Node: C++ Implementation1375016
! Node: Conditionally-supported behavior1376300
! Node: Exception handling1376917
! Node: C Extensions1377384
! Node: Statement Exprs1382607
! Node: Local Labels1387979
! Node: Labels as Values1390952
! Ref: Labels as Values-Footnote-11393479
! Node: Nested Functions1393664
! Node: Nonlocal Gotos1397618
! Node: Constructing Calls1399884
! Node: Typeof1404596
! Node: Conditionals1408525
! Node: __int1281409414
! Node: Long Long1409939
! Node: Complex1411430
! Node: Floating Types1416175
! Node: Half-Precision1419696
! Node: Decimal Float1423164
! Node: Hex Floats1425018
! Node: Fixed-Point1426092
! Node: Named Address Spaces1429350
! Ref: AVR Named Address Spaces1430036
! Node: Zero Length1437330
! Node: Empty Structures1441511
! Node: Variable Length1441917
! Node: Variadic Macros1444635
! Node: Escaped Newlines1447013
! Node: Subscripting1447874
! Node: Pointer Arith1448599
! Node: Variadic Pointer Args1449176
! Node: Pointers to Arrays1449901
! Node: Initializers1450654
! Node: Compound Literals1451155
! Node: Designated Inits1454722
! Node: Case Ranges1458646
! Node: Cast to Union1459327
! Node: Mixed Labels and Declarations1461061
! Node: Function Attributes1461698
! Node: Common Function Attributes1466209
! Ref: Common Function Attributes-Footnote-11543150
! Node: AArch64 Function Attributes1543467
! Node: AMD GCN Function Attributes1549661
! Node: ARC Function Attributes1552714
! Node: ARM Function Attributes1555651
! Node: AVR Function Attributes1560790
! Node: Blackfin Function Attributes1565325
! Node: BPF Function Attributes1567822
! Node: CR16 Function Attributes1568410
! Node: C-SKY Function Attributes1568929
! Node: Epiphany Function Attributes1570228
! Node: H8/300 Function Attributes1572983
! Node: IA-64 Function Attributes1574181
! Node: M32C Function Attributes1575223
! Node: M32R/D Function Attributes1577561
! Node: m68k Function Attributes1579035
! Node: MCORE Function Attributes1579979
! Node: MeP Function Attributes1580790
! Node: MicroBlaze Function Attributes1582091
! Node: Microsoft Windows Function Attributes1583598
! Node: MIPS Function Attributes1588167
! Node: MSP430 Function Attributes1593785
! Node: NDS32 Function Attributes1597864
! Node: Nios II Function Attributes1600288
! Node: Nvidia PTX Function Attributes1601585
! Node: PowerPC Function Attributes1602200
! Node: RISC-V Function Attributes1608974
! Node: RL78 Function Attributes1610390
! Node: RX Function Attributes1611629
! Node: S/390 Function Attributes1614176
! Node: SH Function Attributes1616004
! Node: Symbian OS Function Attributes1619432
! Node: V850 Function Attributes1619768
! Node: Visium Function Attributes1620313
! Node: x86 Function Attributes1620841
! Node: Xstormy16 Function Attributes1644796
! Node: Variable Attributes1645303
! Node: Common Variable Attributes1646836
! Node: ARC Variable Attributes1668743
! Node: AVR Variable Attributes1669125
! Node: Blackfin Variable Attributes1674288
! Node: H8/300 Variable Attributes1675146
! Node: IA-64 Variable Attributes1676219
! Node: M32R/D Variable Attributes1676970
! Node: MeP Variable Attributes1677753
! Node: Microsoft Windows Variable Attributes1679846
! Node: MSP430 Variable Attributes1682299
! Node: Nvidia PTX Variable Attributes1683513
! Node: PowerPC Variable Attributes1684130
! Node: RL78 Variable Attributes1684687
! Node: V850 Variable Attributes1685106
! Node: x86 Variable Attributes1685739
! Node: Xstormy16 Variable Attributes1686795
! Node: Type Attributes1687365
! Node: Common Type Attributes1689053
! Node: ARC Type Attributes1711414
! Node: ARM Type Attributes1711886
! Node: BPF Type Attributes1712668
! Node: MeP Type Attributes1713185
! Node: PowerPC Type Attributes1713587
! Node: x86 Type Attributes1714576
! Node: Label Attributes1715568
! Node: Enumerator Attributes1717595
! Node: Statement Attributes1719127
! Node: Attribute Syntax1720610
! Node: Function Prototypes1731868
! Node: C++ Comments1733648
! Node: Dollar Signs1734167
! Node: Character Escapes1734632
! Node: Alignment1734916
! Node: Inline1736569
! Node: Volatiles1741386
! Node: Using Assembly Language with C1744285
! Node: Basic Asm1745522
! Node: Extended Asm1751145
! Ref: Volatile1755259
! Ref: AssemblerTemplate1759372
! Ref: OutputOperands1763612
! Ref: FlagOutputOperands1770575
! Ref: InputOperands1773522
! Ref: Clobbers and Scratch Registers1777790
! Ref: GotoLabels1786431
! Ref: x86Operandmodifiers1790054
! Ref: x86floatingpointasmoperands1794870
! Ref: msp430Operandmodifiers1798199
! Node: Constraints1799857
! Node: Simple Constraints1800963
! Node: Multi-Alternative1808277
! Node: Modifiers1809952
! Node: Machine Constraints1812751
! Node: Asm Labels1870522
! Node: Explicit Register Variables1872142
! Ref: Explicit Reg Vars1872356
! Node: Global Register Variables1872965
! Ref: Global Reg Vars1873173
! Node: Local Register Variables1877955
! Ref: Local Reg Vars1878175
! Node: Size of an asm1881803
! Node: Alternate Keywords1883281
! Node: Incomplete Enums1884786
! Node: Function Names1885543
! Node: Return Address1887447
! Node: Vector Extensions1892034
! Node: Offsetof1903017
! Node: __sync Builtins1903850
! Node: __atomic Builtins1910293
! Node: Integer Overflow Builtins1923806
! Node: x86 specific memory model extensions for transactional memory1930289
! Node: Object Size Checking1931555
! Node: Other Builtins1938571
! Node: Target Builtins1991175
! Node: AArch64 Built-in Functions1992950
! Node: Alpha Built-in Functions1993646
! Node: Altera Nios II Built-in Functions1996740
! Node: ARC Built-in Functions2001179
! Node: ARC SIMD Built-in Functions2006391
! Node: ARM iWMMXt Built-in Functions2015389
! Node: ARM C Language Extensions (ACLE)2022525
! Node: ARM Floating Point Status and Control Intrinsics2023802
! Node: ARM ARMv8-M Security Extensions2024289
! Node: AVR Built-in Functions2025581
! Node: Blackfin Built-in Functions2029347
! Node: BPF Built-in Functions2029967
! Node: FR-V Built-in Functions2031426
! Node: Argument Types2032289
! Node: Directly-mapped Integer Functions2034120
! Node: Directly-mapped Media Functions2035280
! Node: Raw read/write Functions2043562
! Node: Other Built-in Functions2044470
! Node: MIPS DSP Built-in Functions2045656
! Node: MIPS Paired-Single Support2058411
! Node: MIPS Loongson Built-in Functions2059910
! Node: Paired-Single Arithmetic2066432
! Node: Paired-Single Built-in Functions2067455
! Node: MIPS-3D Built-in Functions2070122
! Node: MIPS SIMD Architecture (MSA) Support2075516
! Node: MIPS SIMD Architecture Built-in Functions2078356
! Node: Other MIPS Built-in Functions2105210
! Node: MSP430 Built-in Functions2106219
! Node: NDS32 Built-in Functions2107620
! Node: picoChip Built-in Functions2108913
! Node: Basic PowerPC Built-in Functions2110262
! Node: Basic PowerPC Built-in Functions Available on all Configurations2111120
! Node: Basic PowerPC Built-in Functions Available on ISA 2.052119630
! Node: Basic PowerPC Built-in Functions Available on ISA 2.062124465
! Node: Basic PowerPC Built-in Functions Available on ISA 2.072126545
! Node: Basic PowerPC Built-in Functions Available on ISA 3.02127399
! Node: Basic PowerPC Built-in Functions Available on ISA 3.12134377
! Node: PowerPC AltiVec/VSX Built-in Functions2137542
! Node: PowerPC AltiVec Built-in Functions on ISA 2.052145611
! Node: PowerPC AltiVec Built-in Functions Available on ISA 2.062171011
! Node: PowerPC AltiVec Built-in Functions Available on ISA 2.072178077
! Node: PowerPC AltiVec Built-in Functions Available on ISA 3.02187887
! Node: PowerPC AltiVec Built-in Functions Available on ISA 3.12203610
! Node: PowerPC Hardware Transactional Memory Built-in Functions2236894
! Node: PowerPC Atomic Memory Operation Functions2245444
! Node: PowerPC Matrix-Multiply Assist Built-in Functions2248007
! Node: PRU Built-in Functions2254132
! Node: RISC-V Built-in Functions2255320
! Node: RX Built-in Functions2255731
! Node: S/390 System z Built-in Functions2259733
! Node: SH Built-in Functions2264963
! Node: SPARC VIS Built-in Functions2266691
! Node: TI C6X Built-in Functions2275222
! Node: TILE-Gx Built-in Functions2276273
! Node: TILEPro Built-in Functions2277398
! Node: x86 Built-in Functions2278506
! Node: x86 transactional memory intrinsics2343856
! Node: x86 control-flow protection intrinsics2347123
! Node: Target Format Checks2348894
! Node: Solaris Format Checks2349326
! Node: Darwin Format Checks2349752
! Node: Pragmas2350715
! Node: AArch64 Pragmas2351656
! Node: ARM Pragmas2352113
! Node: M32C Pragmas2352740
! Node: MeP Pragmas2353812
! Node: PRU Pragmas2355864
! Node: RS/6000 and PowerPC Pragmas2356442
! Node: S/390 Pragmas2357182
! Node: Darwin Pragmas2357748
! Node: Solaris Pragmas2358801
! Node: Symbol-Renaming Pragmas2359965
! Node: Structure-Layout Pragmas2361602
! Node: Weak Pragmas2363882
! Node: Diagnostic Pragmas2364617
! Node: Visibility Pragmas2369368
! Node: Push/Pop Macro Pragmas2370053
! Node: Function Specific Option Pragmas2371026
! Node: Loop-Specific Pragmas2372992
! Node: Unnamed Fields2374592
! Node: Thread-Local2376789
! Node: C99 Thread-Local Edits2378895
! Node: C++98 Thread-Local Edits2380893
! Node: Binary constants2384338
! Node: C++ Extensions2385009
! Node: C++ Volatiles2386639
! Node: Restricted Pointers2388987
! Node: Vague Linkage2390578
! Node: C++ Interface2394201
! Ref: C++ Interface-Footnote-12397998
! Node: Template Instantiation2398136
! Node: Bound member functions2404227
! Node: C++ Attributes2405759
! Node: Function Multiversioning2409831
! Node: Type Traits2411639
! Node: C++ Concepts2418610
! Node: Deprecated Features2420116
! Node: Backwards Compatibility2421941
! Node: Objective-C2423013
! Node: GNU Objective-C runtime API2423620
! Node: Modern GNU Objective-C runtime API2424627
! Node: Traditional GNU Objective-C runtime API2427063
! Node: Executing code before main2427790
! Node: What you can and what you cannot do in +load2430534
! Node: Type encoding2432904
! Node: Legacy type encoding2438270
! Node: @encode2439360
! Node: Method signatures2439905
! Node: Garbage Collection2441897
! Node: Constant string objects2444587
! Node: compatibility_alias2447096
! Node: Exceptions2447821
! Node: Synchronization2450531
! Node: Fast enumeration2451715
! Node: Using fast enumeration2452027
! Node: c99-like fast enumeration syntax2453238
! Node: Fast enumeration details2453941
! Node: Fast enumeration protocol2456281
! Node: Messaging with the GNU Objective-C runtime2459433
! Node: Dynamically registering methods2460805
! Node: Forwarding hook2462496
! Node: Compatibility2465536
! Node: Gcov2472092
! Node: Gcov Intro2472627
! Node: Invoking Gcov2475345
! Node: Gcov and Optimization2498078
! Node: Gcov Data Files2501831
! Node: Cross-profiling2503240
! Node: Gcov-tool2505094
! Node: Gcov-tool Intro2505519
! Node: Invoking Gcov-tool2507489
! Node: Gcov-dump2510067
! Node: Gcov-dump Intro2510390
! Node: Invoking Gcov-dump2510657
! Node: lto-dump2511314
! Node: lto-dump Intro2511613
! Node: Invoking lto-dump2511863
! Node: Trouble2512959
! Node: Actual Bugs2514376
! Node: Interoperation2514823
! Node: Incompatibilities2521714
! Node: Fixed Headers2529866
! Node: Standard Libraries2531524
! Node: Disappointments2532896
! Node: C++ Misunderstandings2537255
! Node: Static Definitions2538066
! Node: Name lookup2539119
! Ref: Name lookup-Footnote-12543900
! Node: Temporaries2544089
! Node: Copy Assignment2546065
! Node: Non-bugs2547900
! Node: Warnings and Errors2558406
! Node: Bugs2560168
! Node: Bug Criteria2560635
! Node: Bug Reporting2562845
! Node: Service2563063
! Node: Contributing2563884
! Node: Funding2564630
! Node: GNU Project2567120
! Node: Copying2567768
! Node: GNU Free Documentation License2605279
! Node: Contributors2630399
! Node: Option Index2671373
! Node: Keyword Index2970472
  
  End Tag Table
--- 70554,70999 ----
  
  Tag Table:
  Node: Top2135
! Node: G++ and GCC4105
! Node: Standards6151
! Node: Invoking GCC19778
! Node: Option Summary25005
! Node: Overall Options83977
! Node: Invoking G++111503
! Node: C Dialect Options113026
! Node: C++ Dialect Options134065
! Node: Objective-C and Objective-C++ Dialect Options196624
! Node: Diagnostic Message Formatting Options208529
! Node: Warning Options239102
! Ref: Wtrigraphs344000
! Node: Static Analyzer Options389363
! Node: Debugging Options409915
! Node: Optimize Options431152
! Ref: Type-punning503612
! Node: Instrumentation Options623903
! Node: Preprocessor Options672015
! Ref: dashMF676862
! Ref: fdollars-in-identifiers681524
! Node: Assembler Options694849
! Node: Link Options695540
! Ref: Link Options-Footnote-1712500
! Node: Directory Options712836
! Node: Code Gen Options721239
! Node: Developer Options750112
! Node: Submodel Options791497
! Node: AArch64 Options793329
! Ref: aarch64-feature-modifiers808919
! Node: Adapteva Epiphany Options814480
! Node: AMD GCN Options820432
! Node: ARC Options821995
! Node: ARM Options842764
! Node: AVR Options884789
! Node: Blackfin Options912498
! Node: C6X Options920390
! Node: CRIS Options921933
! Node: CR16 Options925119
! Node: C-SKY Options926031
! Node: Darwin Options931758
! Node: DEC Alpha Options939538
! Node: eBPF Options951154
! Node: FR30 Options953530
! Node: FT32 Options954090
! Node: FRV Options955036
! Node: GNU/Linux Options961800
! Node: H8/300 Options963181
! Node: HPPA Options964633
! Node: IA-64 Options974165
! Node: LM32 Options982293
! Node: LoongArch Options982821
! Node: M32C Options990178
! Node: M32R/D Options991456
! Node: M680x0 Options995001
! Node: MCore Options1009156
! Node: MeP Options1010658
! Node: MicroBlaze Options1014618
! Node: MIPS Options1017683
! Node: MMIX Options1054480
! Node: MN10300 Options1056957
! Node: Moxie Options1059500
! Node: MSP430 Options1059987
! Node: NDS32 Options1067748
! Node: Nios II Options1069918
! Node: Nvidia PTX Options1083134
! Node: OpenRISC Options1086630
! Node: PDP-11 Options1089384
! Node: picoChip Options1090633
! Node: PowerPC Options1092771
! Node: PRU Options1092991
! Node: RISC-V Options1095200
! Node: RL78 Options1103601
! Node: RS/6000 and PowerPC Options1107376
! Node: RX Options1148892
! Node: S/390 and zSeries Options1157494
! Node: Score Options1168294
! Node: SH Options1169143
! Node: Solaris 2 Options1184283
! Node: SPARC Options1185521
! Node: System V Options1201173
! Node: TILE-Gx Options1202001
! Node: TILEPro Options1203019
! Node: V850 Options1203523
! Node: VAX Options1210210
! Node: Visium Options1210902
! Node: VMS Options1213210
! Node: VxWorks Options1214026
! Node: x86 Options1215178
! Node: x86 Windows Options1284656
! Node: Xstormy16 Options1287462
! Node: Xtensa Options1287756
! Node: zSeries Options1293892
! Node: Spec Files1294088
! Node: Environment Variables1320167
! Node: Precompiled Headers1329600
! Node: C++ Modules1335809
! Ref: C++ Modules-Footnote-11341804
! Node: C++ Module Mapper1342057
! Node: C++ Module Preprocessing1347210
! Node: C++ Compiled Module Interface1349039
! Ref: C++ Compiled Module Interface-Footnote-11352423
! Ref: C++ Compiled Module Interface-Footnote-21352512
! Node: C Implementation1352568
! Node: Translation implementation1354259
! Node: Environment implementation1354850
! Node: Identifiers implementation1355404
! Node: Characters implementation1356490
! Node: Integers implementation1360140
! Node: Floating point implementation1362189
! Node: Arrays and pointers implementation1365252
! Ref: Arrays and pointers implementation-Footnote-11366712
! Node: Hints implementation1366838
! Node: Structures unions enumerations and bit-fields implementation1368333
! Node: Qualifiers implementation1370557
! Node: Declarators implementation1372618
! Node: Statements implementation1372959
! Node: Preprocessing directives implementation1373285
! Node: Library functions implementation1375606
! Node: Architecture implementation1376255
! Node: Locale-specific behavior implementation1377900
! Node: C++ Implementation1378205
! Node: Conditionally-supported behavior1379489
! Node: Exception handling1380106
! Node: C Extensions1380573
! Node: Statement Exprs1385796
! Node: Local Labels1391168
! Node: Labels as Values1394141
! Ref: Labels as Values-Footnote-11396668
! Node: Nested Functions1396853
! Node: Nonlocal Gotos1400807
! Node: Constructing Calls1403073
! Node: Typeof1407785
! Node: Conditionals1411714
! Node: __int1281412603
! Node: Long Long1413128
! Node: Complex1414619
! Node: Floating Types1419364
! Node: Half-Precision1422885
! Node: Decimal Float1426353
! Node: Hex Floats1428207
! Node: Fixed-Point1429281
! Node: Named Address Spaces1432539
! Ref: AVR Named Address Spaces1433225
! Node: Zero Length1440519
! Node: Empty Structures1444700
! Node: Variable Length1445106
! Node: Variadic Macros1447824
! Node: Escaped Newlines1450202
! Node: Subscripting1451063
! Node: Pointer Arith1451788
! Node: Variadic Pointer Args1452365
! Node: Pointers to Arrays1453090
! Node: Initializers1453843
! Node: Compound Literals1454344
! Node: Designated Inits1457911
! Node: Case Ranges1461835
! Node: Cast to Union1462516
! Node: Mixed Labels and Declarations1464250
! Node: Function Attributes1464887
! Node: Common Function Attributes1469398
! Ref: Common Function Attributes-Footnote-11546339
! Node: AArch64 Function Attributes1546656
! Node: AMD GCN Function Attributes1552850
! Node: ARC Function Attributes1555903
! Node: ARM Function Attributes1558840
! Node: AVR Function Attributes1563979
! Node: Blackfin Function Attributes1568514
! Node: BPF Function Attributes1571011
! Node: CR16 Function Attributes1571599
! Node: C-SKY Function Attributes1572118
! Node: Epiphany Function Attributes1573417
! Node: H8/300 Function Attributes1576172
! Node: IA-64 Function Attributes1577370
! Node: M32C Function Attributes1578412
! Node: M32R/D Function Attributes1580750
! Node: m68k Function Attributes1582224
! Node: MCORE Function Attributes1583168
! Node: MeP Function Attributes1583979
! Node: MicroBlaze Function Attributes1585280
! Node: Microsoft Windows Function Attributes1586787
! Node: MIPS Function Attributes1591356
! Node: MSP430 Function Attributes1596974
! Node: NDS32 Function Attributes1601053
! Node: Nios II Function Attributes1603477
! Node: Nvidia PTX Function Attributes1604774
! Node: PowerPC Function Attributes1605389
! Node: RISC-V Function Attributes1612163
! Node: RL78 Function Attributes1613579
! Node: RX Function Attributes1614818
! Node: S/390 Function Attributes1617365
! Node: SH Function Attributes1619193
! Node: Symbian OS Function Attributes1622621
! Node: V850 Function Attributes1622957
! Node: Visium Function Attributes1623502
! Node: x86 Function Attributes1624030
! Node: Xstormy16 Function Attributes1647985
! Node: Variable Attributes1648492
! Node: Common Variable Attributes1650025
! Node: ARC Variable Attributes1671932
! Node: AVR Variable Attributes1672314
! Node: Blackfin Variable Attributes1677477
! Node: H8/300 Variable Attributes1678335
! Node: IA-64 Variable Attributes1679408
! Node: M32R/D Variable Attributes1680159
! Node: MeP Variable Attributes1680942
! Node: Microsoft Windows Variable Attributes1683035
! Node: MSP430 Variable Attributes1685488
! Node: Nvidia PTX Variable Attributes1686702
! Node: PowerPC Variable Attributes1687319
! Node: RL78 Variable Attributes1687876
! Node: V850 Variable Attributes1688295
! Node: x86 Variable Attributes1688928
! Node: Xstormy16 Variable Attributes1689984
! Node: Type Attributes1690554
! Node: Common Type Attributes1692242
! Node: ARC Type Attributes1714603
! Node: ARM Type Attributes1715075
! Node: BPF Type Attributes1715857
! Node: MeP Type Attributes1716374
! Node: PowerPC Type Attributes1716776
! Node: x86 Type Attributes1717765
! Node: Label Attributes1718757
! Node: Enumerator Attributes1720784
! Node: Statement Attributes1722316
! Node: Attribute Syntax1723799
! Node: Function Prototypes1735057
! Node: C++ Comments1736837
! Node: Dollar Signs1737356
! Node: Character Escapes1737821
! Node: Alignment1738105
! Node: Inline1739758
! Node: Volatiles1744575
! Node: Using Assembly Language with C1747474
! Node: Basic Asm1748711
! Node: Extended Asm1754334
! Ref: Volatile1758448
! Ref: AssemblerTemplate1762561
! Ref: OutputOperands1766801
! Ref: FlagOutputOperands1773764
! Ref: InputOperands1776711
! Ref: Clobbers and Scratch Registers1780979
! Ref: GotoLabels1789620
! Ref: x86Operandmodifiers1793243
! Ref: x86floatingpointasmoperands1798059
! Ref: msp430Operandmodifiers1801388
! Node: Constraints1803046
! Node: Simple Constraints1804152
! Node: Multi-Alternative1811466
! Node: Modifiers1813141
! Node: Machine Constraints1815940
! Node: Asm Labels1873711
! Node: Explicit Register Variables1875331
! Ref: Explicit Reg Vars1875545
! Node: Global Register Variables1876154
! Ref: Global Reg Vars1876362
! Node: Local Register Variables1881144
! Ref: Local Reg Vars1881364
! Node: Size of an asm1884992
! Node: Alternate Keywords1886470
! Node: Incomplete Enums1887975
! Node: Function Names1888732
! Node: Return Address1890636
! Node: Vector Extensions1895223
! Node: Offsetof1906206
! Node: __sync Builtins1907039
! Node: __atomic Builtins1913482
! Node: Integer Overflow Builtins1926995
! Node: x86 specific memory model extensions for transactional memory1933478
! Node: Object Size Checking1934744
! Node: Other Builtins1941760
! Node: Target Builtins1994364
! Node: AArch64 Built-in Functions1996177
! Node: Alpha Built-in Functions1996873
! Node: Altera Nios II Built-in Functions1999967
! Node: ARC Built-in Functions2004406
! Node: ARC SIMD Built-in Functions2009618
! Node: ARM iWMMXt Built-in Functions2018616
! Node: ARM C Language Extensions (ACLE)2025752
! Node: ARM Floating Point Status and Control Intrinsics2027029
! Node: ARM ARMv8-M Security Extensions2027516
! Node: AVR Built-in Functions2028808
! Node: Blackfin Built-in Functions2032574
! Node: BPF Built-in Functions2033194
! Node: FR-V Built-in Functions2034653
! Node: Argument Types2035522
! Node: Directly-mapped Integer Functions2037353
! Node: Directly-mapped Media Functions2038513
! Node: Raw read/write Functions2046795
! Node: Other Built-in Functions2047703
! Node: LoongArch Base Built-in Functions2048889
! Node: MIPS DSP Built-in Functions2054635
! Node: MIPS Paired-Single Support2067400
! Node: MIPS Loongson Built-in Functions2068899
! Node: Paired-Single Arithmetic2075421
! Node: Paired-Single Built-in Functions2076444
! Node: MIPS-3D Built-in Functions2079111
! Node: MIPS SIMD Architecture (MSA) Support2084505
! Node: MIPS SIMD Architecture Built-in Functions2087345
! Node: Other MIPS Built-in Functions2114199
! Node: MSP430 Built-in Functions2115208
! Node: NDS32 Built-in Functions2116609
! Node: picoChip Built-in Functions2117902
! Node: Basic PowerPC Built-in Functions2119251
! Node: Basic PowerPC Built-in Functions Available on all Configurations2120109
! Node: Basic PowerPC Built-in Functions Available on ISA 2.052128619
! Node: Basic PowerPC Built-in Functions Available on ISA 2.062133454
! Node: Basic PowerPC Built-in Functions Available on ISA 2.072135534
! Node: Basic PowerPC Built-in Functions Available on ISA 3.02136388
! Node: Basic PowerPC Built-in Functions Available on ISA 3.12143366
! Node: PowerPC AltiVec/VSX Built-in Functions2146531
! Node: PowerPC AltiVec Built-in Functions on ISA 2.052154600
! Node: PowerPC AltiVec Built-in Functions Available on ISA 2.062180000
! Node: PowerPC AltiVec Built-in Functions Available on ISA 2.072187066
! Node: PowerPC AltiVec Built-in Functions Available on ISA 3.02196876
! Node: PowerPC AltiVec Built-in Functions Available on ISA 3.12212599
! Node: PowerPC Hardware Transactional Memory Built-in Functions2245883
! Node: PowerPC Atomic Memory Operation Functions2254433
! Node: PowerPC Matrix-Multiply Assist Built-in Functions2256996
! Node: PRU Built-in Functions2263121
! Node: RISC-V Built-in Functions2264309
! Node: RX Built-in Functions2264720
! Node: S/390 System z Built-in Functions2268722
! Node: SH Built-in Functions2273952
! Node: SPARC VIS Built-in Functions2275680
! Node: TI C6X Built-in Functions2284211
! Node: TILE-Gx Built-in Functions2285262
! Node: TILEPro Built-in Functions2286387
! Node: x86 Built-in Functions2287495
! Node: x86 transactional memory intrinsics2352845
! Node: x86 control-flow protection intrinsics2356112
! Node: Target Format Checks2357883
! Node: Solaris Format Checks2358315
! Node: Darwin Format Checks2358741
! Node: Pragmas2359704
! Node: AArch64 Pragmas2360645
! Node: ARM Pragmas2361102
! Node: M32C Pragmas2361729
! Node: MeP Pragmas2362801
! Node: PRU Pragmas2364853
! Node: RS/6000 and PowerPC Pragmas2365431
! Node: S/390 Pragmas2366171
! Node: Darwin Pragmas2366737
! Node: Solaris Pragmas2367790
! Node: Symbol-Renaming Pragmas2368954
! Node: Structure-Layout Pragmas2370591
! Node: Weak Pragmas2372871
! Node: Diagnostic Pragmas2373606
! Node: Visibility Pragmas2378357
! Node: Push/Pop Macro Pragmas2379042
! Node: Function Specific Option Pragmas2380015
! Node: Loop-Specific Pragmas2381981
! Node: Unnamed Fields2383581
! Node: Thread-Local2385778
! Node: C99 Thread-Local Edits2387884
! Node: C++98 Thread-Local Edits2389882
! Node: Binary constants2393327
! Node: C++ Extensions2393998
! Node: C++ Volatiles2395628
! Node: Restricted Pointers2397976
! Node: Vague Linkage2399567
! Node: C++ Interface2403190
! Ref: C++ Interface-Footnote-12406987
! Node: Template Instantiation2407125
! Node: Bound member functions2413216
! Node: C++ Attributes2414748
! Node: Function Multiversioning2418820
! Node: Type Traits2420628
! Node: C++ Concepts2427599
! Node: Deprecated Features2429105
! Node: Backwards Compatibility2430930
! Node: Objective-C2432002
! Node: GNU Objective-C runtime API2432609
! Node: Modern GNU Objective-C runtime API2433616
! Node: Traditional GNU Objective-C runtime API2436052
! Node: Executing code before main2436779
! Node: What you can and what you cannot do in +load2439523
! Node: Type encoding2441893
! Node: Legacy type encoding2447259
! Node: @encode2448349
! Node: Method signatures2448894
! Node: Garbage Collection2450886
! Node: Constant string objects2453576
! Node: compatibility_alias2456085
! Node: Exceptions2456810
! Node: Synchronization2459520
! Node: Fast enumeration2460704
! Node: Using fast enumeration2461016
! Node: c99-like fast enumeration syntax2462227
! Node: Fast enumeration details2462930
! Node: Fast enumeration protocol2465270
! Node: Messaging with the GNU Objective-C runtime2468422
! Node: Dynamically registering methods2469794
! Node: Forwarding hook2471485
! Node: Compatibility2474525
! Node: Gcov2481081
! Node: Gcov Intro2481616
! Node: Invoking Gcov2484334
! Node: Gcov and Optimization2507067
! Node: Gcov Data Files2510820
! Node: Cross-profiling2512229
! Node: Gcov-tool2514083
! Node: Gcov-tool Intro2514508
! Node: Invoking Gcov-tool2516478
! Node: Gcov-dump2519056
! Node: Gcov-dump Intro2519379
! Node: Invoking Gcov-dump2519646
! Node: lto-dump2520303
! Node: lto-dump Intro2520602
! Node: Invoking lto-dump2520852
! Node: Trouble2521948
! Node: Actual Bugs2523365
! Node: Interoperation2523812
! Node: Incompatibilities2530703
! Node: Fixed Headers2538855
! Node: Standard Libraries2540513
! Node: Disappointments2541885
! Node: C++ Misunderstandings2546244
! Node: Static Definitions2547055
! Node: Name lookup2548108
! Ref: Name lookup-Footnote-12552889
! Node: Temporaries2553078
! Node: Copy Assignment2555054
! Node: Non-bugs2556889
! Node: Warnings and Errors2567395
! Node: Bugs2569157
! Node: Bug Criteria2569624
! Node: Bug Reporting2571834
! Node: Service2572052
! Node: Contributing2572873
! Node: Funding2573619
! Node: GNU Project2576109
! Node: Copying2576757
! Node: GNU Free Documentation License2614268
! Node: Contributors2639388
! Node: Option Index2680362
! Node: Keyword Index2979753
  
  End Tag Table
+ 
+ 
+ Local Variables:
+ coding: utf-8
+ End:
diff -Nrcpad gcc-12.3.0/gcc/doc/gccinstall.info gcc-12.4.0/gcc/doc/gccinstall.info
*** gcc-12.3.0/gcc/doc/gccinstall.info	Mon May  8 12:27:46 2023
--- gcc-12.4.0/gcc/doc/gccinstall.info	Thu Jun 20 08:26:15 2024
***************
*** 1,4 ****
! This is gccinstall.info, produced by makeinfo version 6.5 from
  install.texi.
  
  Copyright (C) 1988-2022 Free Software Foundation, Inc.
--- 1,4 ----
! This is gccinstall.info, produced by makeinfo version 6.8 from
  install.texi.
  
  Copyright (C) 1988-2022 Free Software Foundation, Inc.
*************** Perl version between 5.6.1 and 5.6.24
*** 264,269 ****
--- 264,272 ----
  
       Used by 'automake'.
  
+      If available, enables parallel testing of 'libgomp' in case that
+      'flock' is not available.
+ 
     Several support libraries are necessary to build GCC, some are
  required, others optional.  While any sufficiently new version of
  required tools usually work, library requirements are generally
*************** Concept Index
*** 4849,4855 ****
  * Menu:
  
  * Binaries:                              Binaries.           (line    6)
! * build_configargs:                      Configuration.      (line 1833)
  * Configuration:                         Configuration.      (line    6)
  * Downloading GCC:                       Downloading the source.
                                                               (line    6)
--- 4852,4858 ----
  * Menu:
  
  * Binaries:                              Binaries.           (line    6)
! * build_configargs:                      Configuration.      (line 1832)
  * Configuration:                         Configuration.      (line    6)
  * Downloading GCC:                       Downloading the source.
                                                               (line    6)
*************** Concept Index
*** 4858,4864 ****
  * FDL, GNU Free Documentation License:   GNU Free Documentation License.
                                                               (line    6)
  * Host specific installation:            Specific.           (line    6)
! * host_configargs:                       Configuration.      (line 1837)
  * Installing GCC: Binaries:              Binaries.           (line    6)
  * Installing GCC: Building:              Building.           (line    6)
  * Installing GCC: Configuration:         Configuration.      (line    6)
--- 4861,4867 ----
  * FDL, GNU Free Documentation License:   GNU Free Documentation License.
                                                               (line    6)
  * Host specific installation:            Specific.           (line    6)
! * host_configargs:                       Configuration.      (line 1836)
  * Installing GCC: Binaries:              Binaries.           (line    6)
  * Installing GCC: Building:              Building.           (line    6)
  * Installing GCC: Configuration:         Configuration.      (line    6)
*************** Concept Index
*** 4868,4874 ****
  * Specific installation notes:           Specific.           (line    6)
  * Target specific installation:          Specific.           (line    6)
  * Target specific installation notes:    Specific.           (line    6)
! * target_configargs:                     Configuration.      (line 1841)
  * Testing:                               Testing.            (line    6)
  * Testsuite:                             Testing.            (line    6)
  
--- 4871,4877 ----
  * Specific installation notes:           Specific.           (line    6)
  * Target specific installation:          Specific.           (line    6)
  * Target specific installation notes:    Specific.           (line    6)
! * target_configargs:                     Configuration.      (line 1840)
  * Testing:                               Testing.            (line    6)
  * Testsuite:                             Testing.            (line    6)
  
*************** Node: Installing GCC2201
*** 4880,4981 ****
  Node: Prerequisites3837
  Ref: GNAT-prerequisite5825
  Ref: GDC-prerequisite7222
! Node: Downloading the source16784
! Node: Configuration18455
! Ref: with-gnu-as36755
! Ref: with-as37650
! Ref: with-gnu-ld39059
! Ref: WithAixSoname64770
! Ref: AixLdCommand65431
! Node: Building107756
! Node: Testing123963
! Node: Final install131794
! Node: Binaries137095
! Node: Specific138202
! Ref: aarch64-x-x138736
! Ref: alpha-x-x140756
! Ref: amd64-x-solaris2140970
! Ref: amdgcn-x-amdhsa141052
! Ref: arc-x-elf32141578
! Ref: arc-linux-uclibc141754
! Ref: arm-x-eabi141895
! Ref: avr142148
! Ref: bfin142729
! Ref: cr16142992
! Ref: cris143408
! Ref: dos143734
! Ref: epiphany-x-elf144059
! Ref: x-x-freebsd144164
! Ref: ft32-x-elf145812
! Ref: h8300-hms145910
! Ref: hppa-hp-hpux146262
! Ref: hppa-hp-hpux10148634
! Ref: hppa-hp-hpux11149047
! Ref: x-x-linux-gnu154449
! Ref: ix86-x-linux154772
! Ref: ix86-x-solaris2155085
! Ref: ia64-x-linux156161
! Ref: ia64-x-hpux156408
! Ref: x-ibm-aix156963
! Ref: TransferAixShobj160625
! Ref: iq2000-x-elf164435
! Ref: lm32-x-elf164575
! Ref: lm32-x-uclinux164679
! Ref: loongarch164807
! Ref: m32c-x-elf165501
! Ref: m32r-x-elf165603
! Ref: m68k-x-x165705
! Ref: m68k-x-uclinux166743
! Ref: microblaze-x-elf166988
! Ref: mips-x-x167107
! Ref: moxie-x-elf169017
! Ref: msp430-x-elf169064
! Ref: nds32le-x-elf169621
! Ref: nds32be-x-elf169693
! Ref: nvptx-x-none169762
! Ref: or1k-x-elf170273
! Ref: or1k-x-linux170404
! Ref: powerpc-x-x170485
! Ref: powerpc-x-darwin170676
! Ref: powerpc-x-elf171171
! Ref: powerpc-x-linux-gnu171256
! Ref: powerpc-x-netbsd171351
! Ref: powerpc-x-eabisim171439
! Ref: powerpc-x-eabi171565
! Ref: powerpcle-x-elf171641
! Ref: powerpcle-x-eabisim171733
! Ref: powerpcle-x-eabi171866
! Ref: rl78-x-elf171949
! Ref: riscv32-x-elf172055
! Ref: riscv32-x-linux172244
! Ref: riscv64-x-elf172401
! Ref: riscv64-x-linux172590
! Ref: rx-x-elf172747
! Ref: s390-x-linux172793
! Ref: s390x-x-linux172865
! Ref: s390x-ibm-tpf172952
! Ref: x-x-solaris2173083
! Ref: sparc-x-x176517
! Ref: sparc-sun-solaris2177019
! Ref: sparc-x-linux178162
! Ref: sparc64-x-solaris2178193
! Ref: sparcv9-x-solaris2178911
! Ref: c6x-x-x178998
! Ref: tilegx-*-linux179090
! Ref: tilegxbe-*-linux179232
! Ref: tilepro-*-linux179375
! Ref: visium-x-elf179496
! Ref: x-x-vxworks179604
! Ref: x86-64-x-x181127
! Ref: x86-64-x-solaris2181455
! Ref: xtensa-x-elf182105
! Ref: xtensa-x-linux182776
! Ref: windows183117
! Ref: x-x-cygwin184913
! Ref: x-x-mingw32185466
! Ref: older185848
! Ref: elf187965
! Node: GNU Free Documentation License188223
! Node: Concept Index213358
  
  End Tag Table
--- 4883,4989 ----
  Node: Prerequisites3837
  Ref: GNAT-prerequisite5825
  Ref: GDC-prerequisite7222
! Node: Downloading the source16886
! Node: Configuration18557
! Ref: with-gnu-as36857
! Ref: with-as37752
! Ref: with-gnu-ld39161
! Ref: WithAixSoname64872
! Ref: AixLdCommand65533
! Node: Building107858
! Node: Testing124065
! Node: Final install131896
! Node: Binaries137197
! Node: Specific138304
! Ref: aarch64-x-x138838
! Ref: alpha-x-x140858
! Ref: amd64-x-solaris2141072
! Ref: amdgcn-x-amdhsa141154
! Ref: arc-x-elf32141680
! Ref: arc-linux-uclibc141856
! Ref: arm-x-eabi141997
! Ref: avr142250
! Ref: bfin142831
! Ref: cr16143094
! Ref: cris143510
! Ref: dos143836
! Ref: epiphany-x-elf144161
! Ref: x-x-freebsd144266
! Ref: ft32-x-elf145914
! Ref: h8300-hms146012
! Ref: hppa-hp-hpux146364
! Ref: hppa-hp-hpux10148736
! Ref: hppa-hp-hpux11149149
! Ref: x-x-linux-gnu154551
! Ref: ix86-x-linux154874
! Ref: ix86-x-solaris2155187
! Ref: ia64-x-linux156263
! Ref: ia64-x-hpux156510
! Ref: x-ibm-aix157065
! Ref: TransferAixShobj160727
! Ref: iq2000-x-elf164537
! Ref: lm32-x-elf164677
! Ref: lm32-x-uclinux164781
! Ref: loongarch164909
! Ref: m32c-x-elf165603
! Ref: m32r-x-elf165705
! Ref: m68k-x-x165807
! Ref: m68k-x-uclinux166845
! Ref: microblaze-x-elf167090
! Ref: mips-x-x167209
! Ref: moxie-x-elf169119
! Ref: msp430-x-elf169166
! Ref: nds32le-x-elf169723
! Ref: nds32be-x-elf169795
! Ref: nvptx-x-none169864
! Ref: or1k-x-elf170375
! Ref: or1k-x-linux170506
! Ref: powerpc-x-x170587
! Ref: powerpc-x-darwin170778
! Ref: powerpc-x-elf171273
! Ref: powerpc-x-linux-gnu171358
! Ref: powerpc-x-netbsd171453
! Ref: powerpc-x-eabisim171541
! Ref: powerpc-x-eabi171667
! Ref: powerpcle-x-elf171743
! Ref: powerpcle-x-eabisim171835
! Ref: powerpcle-x-eabi171968
! Ref: rl78-x-elf172051
! Ref: riscv32-x-elf172157
! Ref: riscv32-x-linux172346
! Ref: riscv64-x-elf172503
! Ref: riscv64-x-linux172692
! Ref: rx-x-elf172849
! Ref: s390-x-linux172895
! Ref: s390x-x-linux172967
! Ref: s390x-ibm-tpf173054
! Ref: x-x-solaris2173185
! Ref: sparc-x-x176619
! Ref: sparc-sun-solaris2177121
! Ref: sparc-x-linux178264
! Ref: sparc64-x-solaris2178295
! Ref: sparcv9-x-solaris2179013
! Ref: c6x-x-x179100
! Ref: tilegx-*-linux179192
! Ref: tilegxbe-*-linux179334
! Ref: tilepro-*-linux179477
! Ref: visium-x-elf179598
! Ref: x-x-vxworks179706
! Ref: x86-64-x-x181229
! Ref: x86-64-x-solaris2181557
! Ref: xtensa-x-elf182207
! Ref: xtensa-x-linux182878
! Ref: windows183219
! Ref: x-x-cygwin185015
! Ref: x-x-mingw32185568
! Ref: older185950
! Ref: elf188067
! Node: GNU Free Documentation License188325
! Node: Concept Index213460
  
  End Tag Table
+ 
+ 
+ Local Variables:
+ coding: utf-8
+ End:
diff -Nrcpad gcc-12.3.0/gcc/doc/gccint.info gcc-12.4.0/gcc/doc/gccint.info
*** gcc-12.3.0/gcc/doc/gccint.info	Mon May  8 12:27:51 2023
--- gcc-12.4.0/gcc/doc/gccint.info	Thu Jun 20 08:26:24 2024
***************
*** 1,4 ****
! This is gccint.info, produced by makeinfo version 6.5 from gccint.texi.
  
  Copyright (C) 1988-2022 Free Software Foundation, Inc.
  
--- 1,4 ----
! This is gccint.info, produced by makeinfo version 6.8 from gccint.texi.
  
  Copyright (C) 1988-2022 Free Software Foundation, Inc.
  
*************** Copies published by the Free Software Fo
*** 47,53 ****
  development.
  
  
! File: gccint.info,  Node: Top,  Next: Contributing
  
  Introduction
  ************
--- 47,53 ----
  development.
  
  
! File: gccint.info,  Node: Top,  Next: Contributing,  Up: (dir)
  
  Introduction
  ************
*************** Introduction
*** 55,61 ****
  This manual documents the internals of the GNU compilers, including how
  to port them to new targets and some information about how to write
  front ends for new languages.  It corresponds to the compilers (GCC)
! version 12.3.0.  The use of the GNU compilers is documented in a
  separate manual.  *Note Introduction: (gcc)Top.
  
   This manual is mainly a reference manual rather than a tutorial.  It
--- 55,61 ----
  This manual documents the internals of the GNU compilers, including how
  to port them to new targets and some information about how to write
  front ends for new languages.  It corresponds to the compilers (GCC)
! version 12.4.0.  The use of the GNU compilers is documented in a
  separate manual.  *Note Introduction: (gcc)Top.
  
   This manual is mainly a reference manual rather than a tutorial.  It
*************** kinds of expressions:
*** 10930,10936 ****
       vector.  For example { 0, 1 } could be seen as two patterns with
       one element each or one pattern with two elements (BASE0 and
       BASE1).  The canonical encoding is always the one with the fewest
!      patterns or (if both encodings have the same number of petterns)
       the one with the fewest encoded elements.
  
       'vector_cst_encoding_nelts (V)' gives the total number of encoded
--- 10930,10936 ----
       vector.  For example { 0, 1 } could be seen as two patterns with
       one element each or one pattern with two elements (BASE0 and
       BASE1).  The canonical encoding is always the one with the fewest
!      patterns or (if both encodings have the same number of patterns)
       the one with the fewest encoded elements.
  
       'vector_cst_encoding_nelts (V)' gives the total number of encoded
*************** File: gccint.info,  Node: GIMPLE_CALL,
*** 14304,14310 ****
       call needs no further simplification.  All the call flags in
       'call_expr' are copied over to the new 'GIMPLE_CALL'.
  
!  -- GIMPLE function: gcall *gimple_build_call_vec (tree fn, 'vec<tree>'
            args)
       Identical to 'gimple_build_call' but the arguments are stored in a
       'vec<tree>'.
--- 14304,14310 ----
       call needs no further simplification.  All the call flags in
       'call_expr' are copied over to the new 'GIMPLE_CALL'.
  
!  -- GIMPLE function: gcall *gimple_build_call_vec (tree fn, vec<tree>
            args)
       Identical to 'gimple_build_call' but the arguments are stored in a
       'vec<tree>'.
*************** File: gccint.info,  Node: GIMPLE_SWITCH,
*** 15111,15117 ****
  -----------------------
  
   -- GIMPLE function: gswitch *gimple_build_switch (tree index, tree
!           default_label, 'vec'<tree> *args)
       Build a 'GIMPLE_SWITCH' statement.  'INDEX' is the index variable
       to switch on, and 'DEFAULT_LABEL' represents the default label.
       'ARGS' is a vector of 'CASE_LABEL_EXPR' trees that contain the
--- 15111,15117 ----
  -----------------------
  
   -- GIMPLE function: gswitch *gimple_build_switch (tree index, tree
!           default_label, vec<tree> *args)
       Build a 'GIMPLE_SWITCH' statement.  'INDEX' is the index variable
       to switch on, and 'DEFAULT_LABEL' represents the default label.
       'ARGS' is a vector of 'CASE_LABEL_EXPR' trees that contain the
*************** The simplest RTL expressions are those t
*** 17798,17804 ****
       vector.  For example { 0, 1 } could be seen as two patterns with
       one element each or one pattern with two elements (BASE0 and
       BASE1).  The canonical encoding is always the one with the fewest
!      patterns or (if both encodings have the same number of petterns)
       the one with the fewest encoded elements.
  
       'const_vector_encoding_nelts (V)' gives the total number of encoded
--- 17798,17804 ----
       vector.  For example { 0, 1 } could be seen as two patterns with
       one element each or one pattern with two elements (BASE0 and
       BASE1).  The canonical encoding is always the one with the fewest
!      patterns or (if both encodings have the same number of patterns)
       the one with the fewest encoded elements.
  
       'const_vector_encoding_nelts (V)' gives the total number of encoded
*************** alphabetical order.
*** 49364,49370 ****
  
     * Ralf Corsepius for SH testing and minor bug fixing.
  
!    * Franc,ois-Xavier Coudert for contributions to GNU Fortran.
  
     * Stan Cox for care and feeding of the x86 port and lots of behind
       the scenes hacking.
--- 49364,49370 ----
  
     * Ralf Corsepius for SH testing and minor bug fixing.
  
!    * François-Xavier Coudert for contributions to GNU Fortran.
  
     * Stan Cox for care and feeding of the x86 port and lots of behind
       the scenes hacking.
*************** alphabetical order.
*** 49407,49413 ****
       disbursement, configuration architecture, libio maintenance, and
       early math work.
  
!    * Franc,ois Dumont for his work on libstdc++-v3, especially
       maintaining and improving 'debug-mode' and associative and
       unordered containers.
  
--- 49407,49413 ----
       disbursement, configuration architecture, libio maintenance, and
       early math work.
  
!    * François Dumont for his work on libstdc++-v3, especially
       maintaining and improving 'debug-mode' and associative and
       unordered containers.
  
*************** alphabetical order.
*** 49666,49678 ****
  
     * Weiwen Liu for testing and various bug fixes.
  
!    * Manuel Lo'pez-Iba'n~ez for improving '-Wconversion' and many other
       diagnostics fixes and improvements.
  
     * Dave Love for his ongoing work with the Fortran front end and
       runtime libraries.
  
!    * Martin von Lo"wis for internal consistency checking infrastructure,
       various C++ improvements including namespace support, and tons of
       assistance with libstdc++/compiler merges.
  
--- 49666,49678 ----
  
     * Weiwen Liu for testing and various bug fixes.
  
!    * Manuel López-Ibáñez for improving '-Wconversion' and many other
       diagnostics fixes and improvements.
  
     * Dave Love for his ongoing work with the Fortran front end and
       runtime libraries.
  
!    * Martin von Löwis for internal consistency checking infrastructure,
       various C++ improvements including namespace support, and tons of
       assistance with libstdc++/compiler merges.
  
*************** alphabetical order.
*** 49864,49870 ****
  
     * Craig Rodrigues for processing tons of bug reports.
  
!    * Ola Ro"nnerup for work on mt_alloc.
  
     * Gavin Romig-Koch for lots of behind the scenes MIPS work.
  
--- 49864,49870 ----
  
     * Craig Rodrigues for processing tons of bug reports.
  
!    * Ola Rönnerup for work on mt_alloc.
  
     * Gavin Romig-Koch for lots of behind the scenes MIPS work.
  
*************** alphabetical order.
*** 49878,49884 ****
  
     * Paul Rubin wrote most of the preprocessor.
  
!    * Pe'tur Runo'lfsson for major performance improvements in C++
       formatted I/O and large file support in C++ filebuf.
  
     * Chip Salzenberg for libstdc++ patches and improvements to locales,
--- 49878,49884 ----
  
     * Paul Rubin wrote most of the preprocessor.
  
!    * Pétur Runólfsson for major performance improvements in C++
       formatted I/O and large file support in C++ filebuf.
  
     * Chip Salzenberg for libstdc++ patches and improvements to locales,
*************** alphabetical order.
*** 49899,49905 ****
  
     * William Schelter did most of the work on the Intel 80386 support.
  
!    * Tobias Schlu"ter for work on GNU Fortran.
  
     * Bernd Schmidt for various code generation improvements and major
       work in the reload pass, serving as release manager for GCC 2.95.3,
--- 49899,49905 ----
  
     * William Schelter did most of the work on the Intel 80386 support.
  
!    * Tobias Schlüter for work on GNU Fortran.
  
     * Bernd Schmidt for various code generation improvements and major
       work in the reload pass, serving as release manager for GCC 2.95.3,
*************** contributions to testing:
*** 50396,50402 ****
  
     * Robert A. French
  
!    * Jo"rgen Freyh
  
     * Mark K. Gardner
  
--- 50396,50402 ----
  
     * Robert A. French
  
!    * Jörgen Freyh
  
     * Mark K. Gardner
  
*************** Concept Index
*** 50618,50660 ****
  * __absvsi2:                             Integer library routines.
                                                               (line  105)
  * __addda3:                              Fixed-point fractional library routines.
!                                                              (line   52)
  * __adddf3:                              Soft float library routines.
                                                               (line   22)
  * __adddq3:                              Fixed-point fractional library routines.
!                                                              (line   39)
  * __addha3:                              Fixed-point fractional library routines.
!                                                              (line   49)
  * __addhq3:                              Fixed-point fractional library routines.
!                                                              (line   37)
  * __addqq3:                              Fixed-point fractional library routines.
!                                                              (line   35)
  * __addsa3:                              Fixed-point fractional library routines.
!                                                              (line   51)
  * __addsf3:                              Soft float library routines.
                                                               (line   21)
  * __addsq3:                              Fixed-point fractional library routines.
!                                                              (line   38)
  * __addta3:                              Fixed-point fractional library routines.
!                                                              (line   53)
  * __addtf3:                              Soft float library routines.
                                                               (line   23)
  * __adduda3:                             Fixed-point fractional library routines.
!                                                              (line   59)
  * __addudq3:                             Fixed-point fractional library routines.
!                                                              (line   47)
  * __adduha3:                             Fixed-point fractional library routines.
!                                                              (line   55)
  * __adduhq3:                             Fixed-point fractional library routines.
!                                                              (line   43)
  * __adduqq3:                             Fixed-point fractional library routines.
!                                                              (line   41)
  * __addusa3:                             Fixed-point fractional library routines.
!                                                              (line   57)
  * __addusq3:                             Fixed-point fractional library routines.
!                                                              (line   45)
  * __adduta3:                             Fixed-point fractional library routines.
!                                                              (line   61)
  * __addvdi3:                             Integer library routines.
                                                               (line  110)
  * __addvsi3:                             Integer library routines.
--- 50618,50660 ----
  * __absvsi2:                             Integer library routines.
                                                               (line  105)
  * __addda3:                              Fixed-point fractional library routines.
!                                                              (line   44)
  * __adddf3:                              Soft float library routines.
                                                               (line   22)
  * __adddq3:                              Fixed-point fractional library routines.
!                                                              (line   31)
  * __addha3:                              Fixed-point fractional library routines.
!                                                              (line   41)
  * __addhq3:                              Fixed-point fractional library routines.
!                                                              (line   29)
  * __addqq3:                              Fixed-point fractional library routines.
!                                                              (line   27)
  * __addsa3:                              Fixed-point fractional library routines.
!                                                              (line   43)
  * __addsf3:                              Soft float library routines.
                                                               (line   21)
  * __addsq3:                              Fixed-point fractional library routines.
!                                                              (line   30)
  * __addta3:                              Fixed-point fractional library routines.
!                                                              (line   45)
  * __addtf3:                              Soft float library routines.
                                                               (line   23)
  * __adduda3:                             Fixed-point fractional library routines.
!                                                              (line   51)
  * __addudq3:                             Fixed-point fractional library routines.
!                                                              (line   39)
  * __adduha3:                             Fixed-point fractional library routines.
!                                                              (line   47)
  * __adduhq3:                             Fixed-point fractional library routines.
!                                                              (line   35)
  * __adduqq3:                             Fixed-point fractional library routines.
!                                                              (line   33)
  * __addusa3:                             Fixed-point fractional library routines.
!                                                              (line   49)
  * __addusq3:                             Fixed-point fractional library routines.
!                                                              (line   37)
  * __adduta3:                             Fixed-point fractional library routines.
!                                                              (line   53)
  * __addvdi3:                             Integer library routines.
                                                               (line  110)
  * __addvsi3:                             Integer library routines.
*************** Concept Index
*** 50662,50724 ****
  * __addxf3:                              Soft float library routines.
                                                               (line   25)
  * __ashlda3:                             Fixed-point fractional library routines.
!                                                              (line  358)
  * __ashldi3:                             Integer library routines.
                                                               (line   13)
  * __ashldq3:                             Fixed-point fractional library routines.
!                                                              (line  346)
  * __ashlha3:                             Fixed-point fractional library routines.
!                                                              (line  356)
  * __ashlhq3:                             Fixed-point fractional library routines.
!                                                              (line  344)
  * __ashlqq3:                             Fixed-point fractional library routines.
!                                                              (line  343)
  * __ashlsa3:                             Fixed-point fractional library routines.
!                                                              (line  357)
  * __ashlsi3:                             Integer library routines.
                                                               (line   12)
  * __ashlsq3:                             Fixed-point fractional library routines.
!                                                              (line  345)
  * __ashlta3:                             Fixed-point fractional library routines.
!                                                              (line  359)
  * __ashlti3:                             Integer library routines.
                                                               (line   14)
  * __ashluda3:                            Fixed-point fractional library routines.
!                                                              (line  365)
  * __ashludq3:                            Fixed-point fractional library routines.
!                                                              (line  354)
  * __ashluha3:                            Fixed-point fractional library routines.
!                                                              (line  361)
  * __ashluhq3:                            Fixed-point fractional library routines.
!                                                              (line  350)
  * __ashluqq3:                            Fixed-point fractional library routines.
!                                                              (line  348)
  * __ashlusa3:                            Fixed-point fractional library routines.
!                                                              (line  363)
  * __ashlusq3:                            Fixed-point fractional library routines.
!                                                              (line  352)
  * __ashluta3:                            Fixed-point fractional library routines.
!                                                              (line  367)
  * __ashrda3:                             Fixed-point fractional library routines.
!                                                              (line  378)
  * __ashrdi3:                             Integer library routines.
                                                               (line   18)
  * __ashrdq3:                             Fixed-point fractional library routines.
!                                                              (line  374)
  * __ashrha3:                             Fixed-point fractional library routines.
!                                                              (line  376)
  * __ashrhq3:                             Fixed-point fractional library routines.
!                                                              (line  372)
  * __ashrqq3:                             Fixed-point fractional library routines.
!                                                              (line  371)
  * __ashrsa3:                             Fixed-point fractional library routines.
!                                                              (line  377)
  * __ashrsi3:                             Integer library routines.
                                                               (line   17)
  * __ashrsq3:                             Fixed-point fractional library routines.
!                                                              (line  373)
  * __ashrta3:                             Fixed-point fractional library routines.
!                                                              (line  379)
  * __ashrti3:                             Integer library routines.
                                                               (line   19)
  * __bid_adddd3:                          Decimal float library routines.
--- 50662,50724 ----
  * __addxf3:                              Soft float library routines.
                                                               (line   25)
  * __ashlda3:                             Fixed-point fractional library routines.
!                                                              (line  350)
  * __ashldi3:                             Integer library routines.
                                                               (line   13)
  * __ashldq3:                             Fixed-point fractional library routines.
!                                                              (line  338)
  * __ashlha3:                             Fixed-point fractional library routines.
!                                                              (line  348)
  * __ashlhq3:                             Fixed-point fractional library routines.
!                                                              (line  336)
  * __ashlqq3:                             Fixed-point fractional library routines.
!                                                              (line  335)
  * __ashlsa3:                             Fixed-point fractional library routines.
!                                                              (line  349)
  * __ashlsi3:                             Integer library routines.
                                                               (line   12)
  * __ashlsq3:                             Fixed-point fractional library routines.
!                                                              (line  337)
  * __ashlta3:                             Fixed-point fractional library routines.
!                                                              (line  351)
  * __ashlti3:                             Integer library routines.
                                                               (line   14)
  * __ashluda3:                            Fixed-point fractional library routines.
!                                                              (line  357)
  * __ashludq3:                            Fixed-point fractional library routines.
!                                                              (line  346)
  * __ashluha3:                            Fixed-point fractional library routines.
!                                                              (line  353)
  * __ashluhq3:                            Fixed-point fractional library routines.
!                                                              (line  342)
  * __ashluqq3:                            Fixed-point fractional library routines.
!                                                              (line  340)
  * __ashlusa3:                            Fixed-point fractional library routines.
!                                                              (line  355)
  * __ashlusq3:                            Fixed-point fractional library routines.
!                                                              (line  344)
  * __ashluta3:                            Fixed-point fractional library routines.
!                                                              (line  359)
  * __ashrda3:                             Fixed-point fractional library routines.
!                                                              (line  370)
  * __ashrdi3:                             Integer library routines.
                                                               (line   18)
  * __ashrdq3:                             Fixed-point fractional library routines.
!                                                              (line  366)
  * __ashrha3:                             Fixed-point fractional library routines.
!                                                              (line  368)
  * __ashrhq3:                             Fixed-point fractional library routines.
!                                                              (line  364)
  * __ashrqq3:                             Fixed-point fractional library routines.
!                                                              (line  363)
  * __ashrsa3:                             Fixed-point fractional library routines.
!                                                              (line  369)
  * __ashrsi3:                             Integer library routines.
                                                               (line   17)
  * __ashrsq3:                             Fixed-point fractional library routines.
!                                                              (line  365)
  * __ashrta3:                             Fixed-point fractional library routines.
!                                                              (line  371)
  * __ashrti3:                             Integer library routines.
                                                               (line   19)
  * __bid_adddd3:                          Decimal float library routines.
*************** Concept Index
*** 50917,50963 ****
  * __clzti2:                              Integer library routines.
                                                               (line  131)
  * __cmpda2:                              Fixed-point fractional library routines.
!                                                              (line  458)
  * __cmpdf2:                              Soft float library routines.
                                                               (line  163)
  * __cmpdi2:                              Integer library routines.
                                                               (line   86)
  * __cmpdq2:                              Fixed-point fractional library routines.
!                                                              (line  447)
  * __cmpha2:                              Fixed-point fractional library routines.
!                                                              (line  456)
  * __cmphq2:                              Fixed-point fractional library routines.
!                                                              (line  445)
  * __cmpqq2:                              Fixed-point fractional library routines.
!                                                              (line  444)
  * __cmpsa2:                              Fixed-point fractional library routines.
!                                                              (line  457)
  * __cmpsf2:                              Soft float library routines.
                                                               (line  162)
  * __cmpsq2:                              Fixed-point fractional library routines.
!                                                              (line  446)
  * __cmpta2:                              Fixed-point fractional library routines.
!                                                              (line  459)
  * __cmptf2:                              Soft float library routines.
                                                               (line  164)
  * __cmpti2:                              Integer library routines.
                                                               (line   87)
  * __cmpuda2:                             Fixed-point fractional library routines.
!                                                              (line  464)
  * __cmpudq2:                             Fixed-point fractional library routines.
!                                                              (line  454)
  * __cmpuha2:                             Fixed-point fractional library routines.
!                                                              (line  461)
  * __cmpuhq2:                             Fixed-point fractional library routines.
!                                                              (line  451)
  * __cmpuqq2:                             Fixed-point fractional library routines.
!                                                              (line  449)
  * __cmpusa2:                             Fixed-point fractional library routines.
!                                                              (line  463)
  * __cmpusq2:                             Fixed-point fractional library routines.
!                                                              (line  452)
  * __cmputa2:                             Fixed-point fractional library routines.
!                                                              (line  466)
  * __CTOR_LIST__:                         Initialization.     (line   25)
  * __ctzdi2:                              Integer library routines.
                                                               (line  137)
--- 50917,50963 ----
  * __clzti2:                              Integer library routines.
                                                               (line  131)
  * __cmpda2:                              Fixed-point fractional library routines.
!                                                              (line  450)
  * __cmpdf2:                              Soft float library routines.
                                                               (line  163)
  * __cmpdi2:                              Integer library routines.
                                                               (line   86)
  * __cmpdq2:                              Fixed-point fractional library routines.
!                                                              (line  439)
  * __cmpha2:                              Fixed-point fractional library routines.
!                                                              (line  448)
  * __cmphq2:                              Fixed-point fractional library routines.
!                                                              (line  437)
  * __cmpqq2:                              Fixed-point fractional library routines.
!                                                              (line  436)
  * __cmpsa2:                              Fixed-point fractional library routines.
!                                                              (line  449)
  * __cmpsf2:                              Soft float library routines.
                                                               (line  162)
  * __cmpsq2:                              Fixed-point fractional library routines.
!                                                              (line  438)
  * __cmpta2:                              Fixed-point fractional library routines.
!                                                              (line  451)
  * __cmptf2:                              Soft float library routines.
                                                               (line  164)
  * __cmpti2:                              Integer library routines.
                                                               (line   87)
  * __cmpuda2:                             Fixed-point fractional library routines.
!                                                              (line  456)
  * __cmpudq2:                             Fixed-point fractional library routines.
!                                                              (line  446)
  * __cmpuha2:                             Fixed-point fractional library routines.
!                                                              (line  453)
  * __cmpuhq2:                             Fixed-point fractional library routines.
!                                                              (line  443)
  * __cmpuqq2:                             Fixed-point fractional library routines.
!                                                              (line  441)
  * __cmpusa2:                             Fixed-point fractional library routines.
!                                                              (line  455)
  * __cmpusq2:                             Fixed-point fractional library routines.
!                                                              (line  444)
  * __cmputa2:                             Fixed-point fractional library routines.
!                                                              (line  458)
  * __CTOR_LIST__:                         Initialization.     (line   25)
  * __ctzdi2:                              Integer library routines.
                                                               (line  137)
*************** Concept Index
*** 50966,50972 ****
  * __ctzti2:                              Integer library routines.
                                                               (line  138)
  * __divda3:                              Fixed-point fractional library routines.
!                                                              (line  234)
  * __divdc3:                              Soft float library routines.
                                                               (line  250)
  * __divdf3:                              Soft float library routines.
--- 50966,50972 ----
  * __ctzti2:                              Integer library routines.
                                                               (line  138)
  * __divda3:                              Fixed-point fractional library routines.
!                                                              (line  226)
  * __divdc3:                              Soft float library routines.
                                                               (line  250)
  * __divdf3:                              Soft float library routines.
*************** Concept Index
*** 50974,50988 ****
  * __divdi3:                              Integer library routines.
                                                               (line   24)
  * __divdq3:                              Fixed-point fractional library routines.
!                                                              (line  229)
  * __divha3:                              Fixed-point fractional library routines.
!                                                              (line  231)
  * __divhq3:                              Fixed-point fractional library routines.
!                                                              (line  227)
  * __divqq3:                              Fixed-point fractional library routines.
!                                                              (line  225)
  * __divsa3:                              Fixed-point fractional library routines.
!                                                              (line  233)
  * __divsc3:                              Soft float library routines.
                                                               (line  248)
  * __divsf3:                              Soft float library routines.
--- 50974,50988 ----
  * __divdi3:                              Integer library routines.
                                                               (line   24)
  * __divdq3:                              Fixed-point fractional library routines.
!                                                              (line  221)
  * __divha3:                              Fixed-point fractional library routines.
!                                                              (line  223)
  * __divhq3:                              Fixed-point fractional library routines.
!                                                              (line  219)
  * __divqq3:                              Fixed-point fractional library routines.
!                                                              (line  217)
  * __divsa3:                              Fixed-point fractional library routines.
!                                                              (line  225)
  * __divsc3:                              Soft float library routines.
                                                               (line  248)
  * __divsf3:                              Soft float library routines.
*************** Concept Index
*** 50990,50998 ****
  * __divsi3:                              Integer library routines.
                                                               (line   23)
  * __divsq3:                              Fixed-point fractional library routines.
!                                                              (line  228)
  * __divta3:                              Fixed-point fractional library routines.
!                                                              (line  235)
  * __divtc3:                              Soft float library routines.
                                                               (line  252)
  * __divtf3:                              Soft float library routines.
--- 50990,50998 ----
  * __divsi3:                              Integer library routines.
                                                               (line   23)
  * __divsq3:                              Fixed-point fractional library routines.
!                                                              (line  220)
  * __divta3:                              Fixed-point fractional library routines.
!                                                              (line  227)
  * __divtc3:                              Soft float library routines.
                                                               (line  252)
  * __divtf3:                              Soft float library routines.
*************** Concept Index
*** 51301,52553 ****
  * __floatuntixf:                         Soft float library routines.
                                                               (line  153)
  * __fractdadf:                           Fixed-point fractional library routines.
!                                                              (line  643)
  * __fractdadi:                           Fixed-point fractional library routines.
!                                                              (line  640)
  * __fractdadq:                           Fixed-point fractional library routines.
!                                                              (line  623)
  * __fractdaha2:                          Fixed-point fractional library routines.
!                                                              (line  624)
  * __fractdahi:                           Fixed-point fractional library routines.
!                                                              (line  638)
  * __fractdahq:                           Fixed-point fractional library routines.
!                                                              (line  621)
  * __fractdaqi:                           Fixed-point fractional library routines.
!                                                              (line  637)
  * __fractdaqq:                           Fixed-point fractional library routines.
!                                                              (line  620)
  * __fractdasa2:                          Fixed-point fractional library routines.
!                                                              (line  625)
  * __fractdasf:                           Fixed-point fractional library routines.
!                                                              (line  642)
  * __fractdasi:                           Fixed-point fractional library routines.
!                                                              (line  639)
  * __fractdasq:                           Fixed-point fractional library routines.
!                                                              (line  622)
  * __fractdata2:                          Fixed-point fractional library routines.
!                                                              (line  626)
  * __fractdati:                           Fixed-point fractional library routines.
!                                                              (line  641)
  * __fractdauda:                          Fixed-point fractional library routines.
!                                                              (line  634)
  * __fractdaudq:                          Fixed-point fractional library routines.
!                                                              (line  630)
  * __fractdauha:                          Fixed-point fractional library routines.
!                                                              (line  632)
  * __fractdauhq:                          Fixed-point fractional library routines.
!                                                              (line  628)
  * __fractdauqq:                          Fixed-point fractional library routines.
!                                                              (line  627)
  * __fractdausa:                          Fixed-point fractional library routines.
!                                                              (line  633)
  * __fractdausq:                          Fixed-point fractional library routines.
!                                                              (line  629)
  * __fractdauta:                          Fixed-point fractional library routines.
!                                                              (line  635)
  * __fractdfda:                           Fixed-point fractional library routines.
!                                                              (line 1032)
  * __fractdfdq:                           Fixed-point fractional library routines.
!                                                              (line 1029)
  * __fractdfha:                           Fixed-point fractional library routines.
!                                                              (line 1030)
  * __fractdfhq:                           Fixed-point fractional library routines.
!                                                              (line 1027)
  * __fractdfqq:                           Fixed-point fractional library routines.
!                                                              (line 1026)
  * __fractdfsa:                           Fixed-point fractional library routines.
!                                                              (line 1031)
  * __fractdfsq:                           Fixed-point fractional library routines.
!                                                              (line 1028)
  * __fractdfta:                           Fixed-point fractional library routines.
!                                                              (line 1033)
  * __fractdfuda:                          Fixed-point fractional library routines.
!                                                              (line 1040)
  * __fractdfudq:                          Fixed-point fractional library routines.
!                                                              (line 1037)
  * __fractdfuha:                          Fixed-point fractional library routines.
!                                                              (line 1038)
  * __fractdfuhq:                          Fixed-point fractional library routines.
!                                                              (line 1035)
  * __fractdfuqq:                          Fixed-point fractional library routines.
!                                                              (line 1034)
  * __fractdfusa:                          Fixed-point fractional library routines.
!                                                              (line 1039)
  * __fractdfusq:                          Fixed-point fractional library routines.
!                                                              (line 1036)
  * __fractdfuta:                          Fixed-point fractional library routines.
!                                                              (line 1041)
  * __fractdida:                           Fixed-point fractional library routines.
!                                                              (line  982)
  * __fractdidq:                           Fixed-point fractional library routines.
!                                                              (line  979)
  * __fractdiha:                           Fixed-point fractional library routines.
!                                                              (line  980)
  * __fractdihq:                           Fixed-point fractional library routines.
!                                                              (line  977)
  * __fractdiqq:                           Fixed-point fractional library routines.
!                                                              (line  976)
  * __fractdisa:                           Fixed-point fractional library routines.
!                                                              (line  981)
  * __fractdisq:                           Fixed-point fractional library routines.
!                                                              (line  978)
  * __fractdita:                           Fixed-point fractional library routines.
!                                                              (line  983)
  * __fractdiuda:                          Fixed-point fractional library routines.
!                                                              (line  990)
  * __fractdiudq:                          Fixed-point fractional library routines.
!                                                              (line  987)
  * __fractdiuha:                          Fixed-point fractional library routines.
!                                                              (line  988)
  * __fractdiuhq:                          Fixed-point fractional library routines.
!                                                              (line  985)
  * __fractdiuqq:                          Fixed-point fractional library routines.
!                                                              (line  984)
  * __fractdiusa:                          Fixed-point fractional library routines.
!                                                              (line  989)
  * __fractdiusq:                          Fixed-point fractional library routines.
!                                                              (line  986)
  * __fractdiuta:                          Fixed-point fractional library routines.
!                                                              (line  991)
  * __fractdqda:                           Fixed-point fractional library routines.
!                                                              (line  551)
  * __fractdqdf:                           Fixed-point fractional library routines.
!                                                              (line  573)
  * __fractdqdi:                           Fixed-point fractional library routines.
!                                                              (line  570)
  * __fractdqha:                           Fixed-point fractional library routines.
!                                                              (line  549)
  * __fractdqhi:                           Fixed-point fractional library routines.
!                                                              (line  568)
  * __fractdqhq2:                          Fixed-point fractional library routines.
!                                                              (line  547)
  * __fractdqqi:                           Fixed-point fractional library routines.
!                                                              (line  567)
  * __fractdqqq2:                          Fixed-point fractional library routines.
!                                                              (line  546)
  * __fractdqsa:                           Fixed-point fractional library routines.
!                                                              (line  550)
  * __fractdqsf:                           Fixed-point fractional library routines.
!                                                              (line  572)
  * __fractdqsi:                           Fixed-point fractional library routines.
!                                                              (line  569)
  * __fractdqsq2:                          Fixed-point fractional library routines.
!                                                              (line  548)
  * __fractdqta:                           Fixed-point fractional library routines.
!                                                              (line  552)
  * __fractdqti:                           Fixed-point fractional library routines.
-                                                              (line  571)
- * __fractdquda:                          Fixed-point fractional library routines.
                                                               (line  563)
  * __fractdqudq:                          Fixed-point fractional library routines.
!                                                              (line  558)
  * __fractdquha:                          Fixed-point fractional library routines.
!                                                              (line  560)
  * __fractdquhq:                          Fixed-point fractional library routines.
!                                                              (line  555)
  * __fractdquqq:                          Fixed-point fractional library routines.
!                                                              (line  553)
  * __fractdqusa:                          Fixed-point fractional library routines.
!                                                              (line  562)
  * __fractdqusq:                          Fixed-point fractional library routines.
!                                                              (line  556)
  * __fractdquta:                          Fixed-point fractional library routines.
!                                                              (line  565)
  * __fracthada2:                          Fixed-point fractional library routines.
!                                                              (line  579)
  * __fracthadf:                           Fixed-point fractional library routines.
!                                                              (line  597)
  * __fracthadi:                           Fixed-point fractional library routines.
!                                                              (line  594)
  * __fracthadq:                           Fixed-point fractional library routines.
!                                                              (line  577)
  * __fracthahi:                           Fixed-point fractional library routines.
!                                                              (line  592)
  * __fracthahq:                           Fixed-point fractional library routines.
!                                                              (line  575)
  * __fracthaqi:                           Fixed-point fractional library routines.
!                                                              (line  591)
  * __fracthaqq:                           Fixed-point fractional library routines.
!                                                              (line  574)
  * __fracthasa2:                          Fixed-point fractional library routines.
!                                                              (line  578)
  * __fracthasf:                           Fixed-point fractional library routines.
!                                                              (line  596)
  * __fracthasi:                           Fixed-point fractional library routines.
!                                                              (line  593)
  * __fracthasq:                           Fixed-point fractional library routines.
!                                                              (line  576)
  * __fracthata2:                          Fixed-point fractional library routines.
!                                                              (line  580)
  * __fracthati:                           Fixed-point fractional library routines.
!                                                              (line  595)
  * __fracthauda:                          Fixed-point fractional library routines.
!                                                              (line  588)
  * __fracthaudq:                          Fixed-point fractional library routines.
!                                                              (line  584)
  * __fracthauha:                          Fixed-point fractional library routines.
!                                                              (line  586)
  * __fracthauhq:                          Fixed-point fractional library routines.
!                                                              (line  582)
  * __fracthauqq:                          Fixed-point fractional library routines.
!                                                              (line  581)
  * __fracthausa:                          Fixed-point fractional library routines.
!                                                              (line  587)
  * __fracthausq:                          Fixed-point fractional library routines.
!                                                              (line  583)
  * __fracthauta:                          Fixed-point fractional library routines.
!                                                              (line  589)
  * __fracthida:                           Fixed-point fractional library routines.
!                                                              (line  950)
  * __fracthidq:                           Fixed-point fractional library routines.
!                                                              (line  947)
  * __fracthiha:                           Fixed-point fractional library routines.
!                                                              (line  948)
  * __fracthihq:                           Fixed-point fractional library routines.
!                                                              (line  945)
  * __fracthiqq:                           Fixed-point fractional library routines.
!                                                              (line  944)
  * __fracthisa:                           Fixed-point fractional library routines.
!                                                              (line  949)
  * __fracthisq:                           Fixed-point fractional library routines.
!                                                              (line  946)
  * __fracthita:                           Fixed-point fractional library routines.
!                                                              (line  951)
  * __fracthiuda:                          Fixed-point fractional library routines.
!                                                              (line  958)
  * __fracthiudq:                          Fixed-point fractional library routines.
!                                                              (line  955)
  * __fracthiuha:                          Fixed-point fractional library routines.
!                                                              (line  956)
  * __fracthiuhq:                          Fixed-point fractional library routines.
!                                                              (line  953)
  * __fracthiuqq:                          Fixed-point fractional library routines.
!                                                              (line  952)
  * __fracthiusa:                          Fixed-point fractional library routines.
!                                                              (line  957)
  * __fracthiusq:                          Fixed-point fractional library routines.
!                                                              (line  954)
  * __fracthiuta:                          Fixed-point fractional library routines.
!                                                              (line  959)
  * __fracthqda:                           Fixed-point fractional library routines.
!                                                              (line  505)
  * __fracthqdf:                           Fixed-point fractional library routines.
!                                                              (line  521)
  * __fracthqdi:                           Fixed-point fractional library routines.
!                                                              (line  518)
  * __fracthqdq2:                          Fixed-point fractional library routines.
!                                                              (line  502)
  * __fracthqha:                           Fixed-point fractional library routines.
!                                                              (line  503)
  * __fracthqhi:                           Fixed-point fractional library routines.
!                                                              (line  516)
  * __fracthqqi:                           Fixed-point fractional library routines.
!                                                              (line  515)
  * __fracthqqq2:                          Fixed-point fractional library routines.
!                                                              (line  500)
  * __fracthqsa:                           Fixed-point fractional library routines.
!                                                              (line  504)
  * __fracthqsf:                           Fixed-point fractional library routines.
!                                                              (line  520)
  * __fracthqsi:                           Fixed-point fractional library routines.
!                                                              (line  517)
  * __fracthqsq2:                          Fixed-point fractional library routines.
!                                                              (line  501)
  * __fracthqta:                           Fixed-point fractional library routines.
!                                                              (line  506)
  * __fracthqti:                           Fixed-point fractional library routines.
!                                                              (line  519)
  * __fracthquda:                          Fixed-point fractional library routines.
!                                                              (line  513)
  * __fracthqudq:                          Fixed-point fractional library routines.
!                                                              (line  510)
  * __fracthquha:                          Fixed-point fractional library routines.
!                                                              (line  511)
  * __fracthquhq:                          Fixed-point fractional library routines.
!                                                              (line  508)
  * __fracthquqq:                          Fixed-point fractional library routines.
!                                                              (line  507)
  * __fracthqusa:                          Fixed-point fractional library routines.
!                                                              (line  512)
  * __fracthqusq:                          Fixed-point fractional library routines.
!                                                              (line  509)
  * __fracthquta:                          Fixed-point fractional library routines.
!                                                              (line  514)
  * __fractqida:                           Fixed-point fractional library routines.
!                                                              (line  932)
  * __fractqidq:                           Fixed-point fractional library routines.
!                                                              (line  929)
  * __fractqiha:                           Fixed-point fractional library routines.
!                                                              (line  930)
  * __fractqihq:                           Fixed-point fractional library routines.
!                                                              (line  927)
  * __fractqiqq:                           Fixed-point fractional library routines.
!                                                              (line  926)
  * __fractqisa:                           Fixed-point fractional library routines.
!                                                              (line  931)
  * __fractqisq:                           Fixed-point fractional library routines.
!                                                              (line  928)
  * __fractqita:                           Fixed-point fractional library routines.
!                                                              (line  933)
  * __fractqiuda:                          Fixed-point fractional library routines.
!                                                              (line  941)
  * __fractqiudq:                          Fixed-point fractional library routines.
!                                                              (line  937)
  * __fractqiuha:                          Fixed-point fractional library routines.
!                                                              (line  939)
  * __fractqiuhq:                          Fixed-point fractional library routines.
!                                                              (line  935)
  * __fractqiuqq:                          Fixed-point fractional library routines.
!                                                              (line  934)
  * __fractqiusa:                          Fixed-point fractional library routines.
!                                                              (line  940)
  * __fractqiusq:                          Fixed-point fractional library routines.
!                                                              (line  936)
  * __fractqiuta:                          Fixed-point fractional library routines.
!                                                              (line  942)
  * __fractqqda:                           Fixed-point fractional library routines.
!                                                              (line  481)
  * __fractqqdf:                           Fixed-point fractional library routines.
!                                                              (line  499)
  * __fractqqdi:                           Fixed-point fractional library routines.
!                                                              (line  496)
  * __fractqqdq2:                          Fixed-point fractional library routines.
!                                                              (line  478)
  * __fractqqha:                           Fixed-point fractional library routines.
!                                                              (line  479)
  * __fractqqhi:                           Fixed-point fractional library routines.
!                                                              (line  494)
  * __fractqqhq2:                          Fixed-point fractional library routines.
!                                                              (line  476)
  * __fractqqqi:                           Fixed-point fractional library routines.
!                                                              (line  493)
  * __fractqqsa:                           Fixed-point fractional library routines.
!                                                              (line  480)
  * __fractqqsf:                           Fixed-point fractional library routines.
!                                                              (line  498)
  * __fractqqsi:                           Fixed-point fractional library routines.
!                                                              (line  495)
  * __fractqqsq2:                          Fixed-point fractional library routines.
!                                                              (line  477)
  * __fractqqta:                           Fixed-point fractional library routines.
!                                                              (line  482)
  * __fractqqti:                           Fixed-point fractional library routines.
!                                                              (line  497)
  * __fractqquda:                          Fixed-point fractional library routines.
!                                                              (line  490)
  * __fractqqudq:                          Fixed-point fractional library routines.
!                                                              (line  486)
  * __fractqquha:                          Fixed-point fractional library routines.
!                                                              (line  488)
  * __fractqquhq:                          Fixed-point fractional library routines.
!                                                              (line  484)
  * __fractqquqq:                          Fixed-point fractional library routines.
!                                                              (line  483)
  * __fractqqusa:                          Fixed-point fractional library routines.
!                                                              (line  489)
  * __fractqqusq:                          Fixed-point fractional library routines.
!                                                              (line  485)
  * __fractqquta:                          Fixed-point fractional library routines.
!                                                              (line  491)
  * __fractsada2:                          Fixed-point fractional library routines.
!                                                              (line  603)
  * __fractsadf:                           Fixed-point fractional library routines.
!                                                              (line  619)
  * __fractsadi:                           Fixed-point fractional library routines.
!                                                              (line  616)
  * __fractsadq:                           Fixed-point fractional library routines.
!                                                              (line  601)
  * __fractsaha2:                          Fixed-point fractional library routines.
!                                                              (line  602)
  * __fractsahi:                           Fixed-point fractional library routines.
!                                                              (line  614)
  * __fractsahq:                           Fixed-point fractional library routines.
!                                                              (line  599)
  * __fractsaqi:                           Fixed-point fractional library routines.
!                                                              (line  613)
  * __fractsaqq:                           Fixed-point fractional library routines.
!                                                              (line  598)
  * __fractsasf:                           Fixed-point fractional library routines.
!                                                              (line  618)
  * __fractsasi:                           Fixed-point fractional library routines.
!                                                              (line  615)
  * __fractsasq:                           Fixed-point fractional library routines.
!                                                              (line  600)
  * __fractsata2:                          Fixed-point fractional library routines.
!                                                              (line  604)
  * __fractsati:                           Fixed-point fractional library routines.
!                                                              (line  617)
  * __fractsauda:                          Fixed-point fractional library routines.
!                                                              (line  611)
  * __fractsaudq:                          Fixed-point fractional library routines.
!                                                              (line  608)
  * __fractsauha:                          Fixed-point fractional library routines.
!                                                              (line  609)
  * __fractsauhq:                          Fixed-point fractional library routines.
!                                                              (line  606)
  * __fractsauqq:                          Fixed-point fractional library routines.
!                                                              (line  605)
  * __fractsausa:                          Fixed-point fractional library routines.
!                                                              (line  610)
  * __fractsausq:                          Fixed-point fractional library routines.
!                                                              (line  607)
  * __fractsauta:                          Fixed-point fractional library routines.
!                                                              (line  612)
  * __fractsfda:                           Fixed-point fractional library routines.
!                                                              (line 1016)
  * __fractsfdq:                           Fixed-point fractional library routines.
!                                                              (line 1013)
  * __fractsfha:                           Fixed-point fractional library routines.
!                                                              (line 1014)
  * __fractsfhq:                           Fixed-point fractional library routines.
!                                                              (line 1011)
  * __fractsfqq:                           Fixed-point fractional library routines.
!                                                              (line 1010)
  * __fractsfsa:                           Fixed-point fractional library routines.
!                                                              (line 1015)
  * __fractsfsq:                           Fixed-point fractional library routines.
!                                                              (line 1012)
  * __fractsfta:                           Fixed-point fractional library routines.
!                                                              (line 1017)
  * __fractsfuda:                          Fixed-point fractional library routines.
!                                                              (line 1024)
  * __fractsfudq:                          Fixed-point fractional library routines.
!                                                              (line 1021)
  * __fractsfuha:                          Fixed-point fractional library routines.
!                                                              (line 1022)
  * __fractsfuhq:                          Fixed-point fractional library routines.
!                                                              (line 1019)
  * __fractsfuqq:                          Fixed-point fractional library routines.
!                                                              (line 1018)
  * __fractsfusa:                          Fixed-point fractional library routines.
!                                                              (line 1023)
  * __fractsfusq:                          Fixed-point fractional library routines.
!                                                              (line 1020)
  * __fractsfuta:                          Fixed-point fractional library routines.
!                                                              (line 1025)
  * __fractsida:                           Fixed-point fractional library routines.
!                                                              (line  966)
  * __fractsidq:                           Fixed-point fractional library routines.
!                                                              (line  963)
  * __fractsiha:                           Fixed-point fractional library routines.
!                                                              (line  964)
  * __fractsihq:                           Fixed-point fractional library routines.
!                                                              (line  961)
  * __fractsiqq:                           Fixed-point fractional library routines.
!                                                              (line  960)
  * __fractsisa:                           Fixed-point fractional library routines.
!                                                              (line  965)
  * __fractsisq:                           Fixed-point fractional library routines.
!                                                              (line  962)
  * __fractsita:                           Fixed-point fractional library routines.
!                                                              (line  967)
  * __fractsiuda:                          Fixed-point fractional library routines.
!                                                              (line  974)
  * __fractsiudq:                          Fixed-point fractional library routines.
!                                                              (line  971)
  * __fractsiuha:                          Fixed-point fractional library routines.
!                                                              (line  972)
  * __fractsiuhq:                          Fixed-point fractional library routines.
!                                                              (line  969)
  * __fractsiuqq:                          Fixed-point fractional library routines.
!                                                              (line  968)
  * __fractsiusa:                          Fixed-point fractional library routines.
!                                                              (line  973)
  * __fractsiusq:                          Fixed-point fractional library routines.
!                                                              (line  970)
  * __fractsiuta:                          Fixed-point fractional library routines.
!                                                              (line  975)
  * __fractsqda:                           Fixed-point fractional library routines.
!                                                              (line  527)
  * __fractsqdf:                           Fixed-point fractional library routines.
!                                                              (line  545)
  * __fractsqdi:                           Fixed-point fractional library routines.
!                                                              (line  542)
  * __fractsqdq2:                          Fixed-point fractional library routines.
!                                                              (line  524)
  * __fractsqha:                           Fixed-point fractional library routines.
!                                                              (line  525)
  * __fractsqhi:                           Fixed-point fractional library routines.
!                                                              (line  540)
  * __fractsqhq2:                          Fixed-point fractional library routines.
!                                                              (line  523)
  * __fractsqqi:                           Fixed-point fractional library routines.
!                                                              (line  539)
  * __fractsqqq2:                          Fixed-point fractional library routines.
!                                                              (line  522)
  * __fractsqsa:                           Fixed-point fractional library routines.
!                                                              (line  526)
  * __fractsqsf:                           Fixed-point fractional library routines.
!                                                              (line  544)
  * __fractsqsi:                           Fixed-point fractional library routines.
!                                                              (line  541)
  * __fractsqta:                           Fixed-point fractional library routines.
!                                                              (line  528)
  * __fractsqti:                           Fixed-point fractional library routines.
!                                                              (line  543)
  * __fractsquda:                          Fixed-point fractional library routines.
!                                                              (line  536)
  * __fractsqudq:                          Fixed-point fractional library routines.
!                                                              (line  532)
  * __fractsquha:                          Fixed-point fractional library routines.
!                                                              (line  534)
  * __fractsquhq:                          Fixed-point fractional library routines.
!                                                              (line  530)
  * __fractsquqq:                          Fixed-point fractional library routines.
!                                                              (line  529)
  * __fractsqusa:                          Fixed-point fractional library routines.
!                                                              (line  535)
  * __fractsqusq:                          Fixed-point fractional library routines.
!                                                              (line  531)
  * __fractsquta:                          Fixed-point fractional library routines.
!                                                              (line  537)
  * __fracttada2:                          Fixed-point fractional library routines.
!                                                              (line  650)
  * __fracttadf:                           Fixed-point fractional library routines.
!                                                              (line  671)
  * __fracttadi:                           Fixed-point fractional library routines.
!                                                              (line  668)
  * __fracttadq:                           Fixed-point fractional library routines.
!                                                              (line  647)
  * __fracttaha2:                          Fixed-point fractional library routines.
!                                                              (line  648)
  * __fracttahi:                           Fixed-point fractional library routines.
!                                                              (line  666)
  * __fracttahq:                           Fixed-point fractional library routines.
!                                                              (line  645)
  * __fracttaqi:                           Fixed-point fractional library routines.
!                                                              (line  665)
  * __fracttaqq:                           Fixed-point fractional library routines.
!                                                              (line  644)
  * __fracttasa2:                          Fixed-point fractional library routines.
!                                                              (line  649)
  * __fracttasf:                           Fixed-point fractional library routines.
!                                                              (line  670)
  * __fracttasi:                           Fixed-point fractional library routines.
!                                                              (line  667)
  * __fracttasq:                           Fixed-point fractional library routines.
!                                                              (line  646)
  * __fracttati:                           Fixed-point fractional library routines.
-                                                              (line  669)
- * __fracttauda:                          Fixed-point fractional library routines.
                                                               (line  661)
  * __fracttaudq:                          Fixed-point fractional library routines.
!                                                              (line  656)
  * __fracttauha:                          Fixed-point fractional library routines.
!                                                              (line  658)
  * __fracttauhq:                          Fixed-point fractional library routines.
!                                                              (line  653)
  * __fracttauqq:                          Fixed-point fractional library routines.
!                                                              (line  651)
  * __fracttausa:                          Fixed-point fractional library routines.
!                                                              (line  660)
  * __fracttausq:                          Fixed-point fractional library routines.
!                                                              (line  654)
  * __fracttauta:                          Fixed-point fractional library routines.
!                                                              (line  663)
  * __fracttida:                           Fixed-point fractional library routines.
!                                                              (line  998)
  * __fracttidq:                           Fixed-point fractional library routines.
!                                                              (line  995)
  * __fracttiha:                           Fixed-point fractional library routines.
!                                                              (line  996)
  * __fracttihq:                           Fixed-point fractional library routines.
!                                                              (line  993)
  * __fracttiqq:                           Fixed-point fractional library routines.
!                                                              (line  992)
  * __fracttisa:                           Fixed-point fractional library routines.
!                                                              (line  997)
  * __fracttisq:                           Fixed-point fractional library routines.
!                                                              (line  994)
  * __fracttita:                           Fixed-point fractional library routines.
!                                                              (line  999)
  * __fracttiuda:                          Fixed-point fractional library routines.
!                                                              (line 1007)
  * __fracttiudq:                          Fixed-point fractional library routines.
!                                                              (line 1003)
  * __fracttiuha:                          Fixed-point fractional library routines.
!                                                              (line 1005)
  * __fracttiuhq:                          Fixed-point fractional library routines.
!                                                              (line 1001)
  * __fracttiuqq:                          Fixed-point fractional library routines.
!                                                              (line 1000)
  * __fracttiusa:                          Fixed-point fractional library routines.
!                                                              (line 1006)
  * __fracttiusq:                          Fixed-point fractional library routines.
!                                                              (line 1002)
  * __fracttiuta:                          Fixed-point fractional library routines.
!                                                              (line 1008)
  * __fractudada:                          Fixed-point fractional library routines.
!                                                              (line  865)
  * __fractudadf:                          Fixed-point fractional library routines.
!                                                              (line  888)
  * __fractudadi:                          Fixed-point fractional library routines.
!                                                              (line  885)
  * __fractudadq:                          Fixed-point fractional library routines.
!                                                              (line  861)
  * __fractudaha:                          Fixed-point fractional library routines.
!                                                              (line  863)
  * __fractudahi:                          Fixed-point fractional library routines.
!                                                              (line  883)
  * __fractudahq:                          Fixed-point fractional library routines.
!                                                              (line  859)
  * __fractudaqi:                          Fixed-point fractional library routines.
!                                                              (line  882)
  * __fractudaqq:                          Fixed-point fractional library routines.
!                                                              (line  858)
  * __fractudasa:                          Fixed-point fractional library routines.
!                                                              (line  864)
  * __fractudasf:                          Fixed-point fractional library routines.
!                                                              (line  887)
  * __fractudasi:                          Fixed-point fractional library routines.
!                                                              (line  884)
  * __fractudasq:                          Fixed-point fractional library routines.
!                                                              (line  860)
  * __fractudata:                          Fixed-point fractional library routines.
!                                                              (line  866)
  * __fractudati:                          Fixed-point fractional library routines.
!                                                              (line  886)
  * __fractudaudq:                         Fixed-point fractional library routines.
!                                                              (line  874)
  * __fractudauha2:                        Fixed-point fractional library routines.
!                                                              (line  876)
  * __fractudauhq:                         Fixed-point fractional library routines.
!                                                              (line  870)
  * __fractudauqq:                         Fixed-point fractional library routines.
!                                                              (line  868)
  * __fractudausa2:                        Fixed-point fractional library routines.
!                                                              (line  878)
  * __fractudausq:                         Fixed-point fractional library routines.
!                                                              (line  872)
  * __fractudauta2:                        Fixed-point fractional library routines.
!                                                              (line  880)
  * __fractudqda:                          Fixed-point fractional library routines.
!                                                              (line  772)
  * __fractudqdf:                          Fixed-point fractional library routines.
!                                                              (line  798)
  * __fractudqdi:                          Fixed-point fractional library routines.
!                                                              (line  794)
  * __fractudqdq:                          Fixed-point fractional library routines.
!                                                              (line  767)
  * __fractudqha:                          Fixed-point fractional library routines.
!                                                              (line  769)
  * __fractudqhi:                          Fixed-point fractional library routines.
!                                                              (line  792)
  * __fractudqhq:                          Fixed-point fractional library routines.
!                                                              (line  764)
  * __fractudqqi:                          Fixed-point fractional library routines.
!                                                              (line  790)
  * __fractudqqq:                          Fixed-point fractional library routines.
!                                                              (line  762)
  * __fractudqsa:                          Fixed-point fractional library routines.
!                                                              (line  771)
  * __fractudqsf:                          Fixed-point fractional library routines.
!                                                              (line  797)
  * __fractudqsi:                          Fixed-point fractional library routines.
!                                                              (line  793)
  * __fractudqsq:                          Fixed-point fractional library routines.
!                                                              (line  765)
  * __fractudqta:                          Fixed-point fractional library routines.
!                                                              (line  774)
  * __fractudqti:                          Fixed-point fractional library routines.
!                                                              (line  795)
  * __fractudquda:                         Fixed-point fractional library routines.
!                                                              (line  786)
  * __fractudquha:                         Fixed-point fractional library routines.
!                                                              (line  782)
  * __fractudquhq2:                        Fixed-point fractional library routines.
!                                                              (line  778)
  * __fractudquqq2:                        Fixed-point fractional library routines.
!                                                              (line  776)
  * __fractudqusa:                         Fixed-point fractional library routines.
!                                                              (line  784)
  * __fractudqusq2:                        Fixed-point fractional library routines.
!                                                              (line  780)
  * __fractudquta:                         Fixed-point fractional library routines.
!                                                              (line  788)
  * __fractuhada:                          Fixed-point fractional library routines.
!                                                              (line  806)
  * __fractuhadf:                          Fixed-point fractional library routines.
!                                                              (line  829)
  * __fractuhadi:                          Fixed-point fractional library routines.
!                                                              (line  826)
  * __fractuhadq:                          Fixed-point fractional library routines.
!                                                              (line  802)
  * __fractuhaha:                          Fixed-point fractional library routines.
!                                                              (line  804)
  * __fractuhahi:                          Fixed-point fractional library routines.
!                                                              (line  824)
  * __fractuhahq:                          Fixed-point fractional library routines.
!                                                              (line  800)
  * __fractuhaqi:                          Fixed-point fractional library routines.
!                                                              (line  823)
  * __fractuhaqq:                          Fixed-point fractional library routines.
!                                                              (line  799)
  * __fractuhasa:                          Fixed-point fractional library routines.
!                                                              (line  805)
  * __fractuhasf:                          Fixed-point fractional library routines.
!                                                              (line  828)
  * __fractuhasi:                          Fixed-point fractional library routines.
!                                                              (line  825)
  * __fractuhasq:                          Fixed-point fractional library routines.
!                                                              (line  801)
  * __fractuhata:                          Fixed-point fractional library routines.
!                                                              (line  807)
  * __fractuhati:                          Fixed-point fractional library routines.
-                                                              (line  827)
- * __fractuhauda2:                        Fixed-point fractional library routines.
                                                               (line  819)
  * __fractuhaudq:                         Fixed-point fractional library routines.
!                                                              (line  815)
  * __fractuhauhq:                         Fixed-point fractional library routines.
!                                                              (line  811)
  * __fractuhauqq:                         Fixed-point fractional library routines.
!                                                              (line  809)
  * __fractuhausa2:                        Fixed-point fractional library routines.
!                                                              (line  817)
  * __fractuhausq:                         Fixed-point fractional library routines.
!                                                              (line  813)
  * __fractuhauta2:                        Fixed-point fractional library routines.
!                                                              (line  821)
  * __fractuhqda:                          Fixed-point fractional library routines.
!                                                              (line  709)
  * __fractuhqdf:                          Fixed-point fractional library routines.
!                                                              (line  730)
  * __fractuhqdi:                          Fixed-point fractional library routines.
!                                                              (line  727)
  * __fractuhqdq:                          Fixed-point fractional library routines.
!                                                              (line  706)
  * __fractuhqha:                          Fixed-point fractional library routines.
!                                                              (line  707)
  * __fractuhqhi:                          Fixed-point fractional library routines.
!                                                              (line  725)
  * __fractuhqhq:                          Fixed-point fractional library routines.
!                                                              (line  704)
  * __fractuhqqi:                          Fixed-point fractional library routines.
!                                                              (line  724)
  * __fractuhqqq:                          Fixed-point fractional library routines.
!                                                              (line  703)
  * __fractuhqsa:                          Fixed-point fractional library routines.
!                                                              (line  708)
  * __fractuhqsf:                          Fixed-point fractional library routines.
!                                                              (line  729)
  * __fractuhqsi:                          Fixed-point fractional library routines.
!                                                              (line  726)
  * __fractuhqsq:                          Fixed-point fractional library routines.
!                                                              (line  705)
  * __fractuhqta:                          Fixed-point fractional library routines.
!                                                              (line  710)
  * __fractuhqti:                          Fixed-point fractional library routines.
-                                                              (line  728)
- * __fractuhquda:                         Fixed-point fractional library routines.
                                                               (line  720)
  * __fractuhqudq2:                        Fixed-point fractional library routines.
!                                                              (line  715)
  * __fractuhquha:                         Fixed-point fractional library routines.
!                                                              (line  717)
  * __fractuhquqq2:                        Fixed-point fractional library routines.
!                                                              (line  711)
  * __fractuhqusa:                         Fixed-point fractional library routines.
!                                                              (line  719)
  * __fractuhqusq2:                        Fixed-point fractional library routines.
!                                                              (line  713)
  * __fractuhquta:                         Fixed-point fractional library routines.
!                                                              (line  722)
  * __fractunsdadi:                        Fixed-point fractional library routines.
!                                                              (line 1562)
  * __fractunsdahi:                        Fixed-point fractional library routines.
!                                                              (line 1560)
  * __fractunsdaqi:                        Fixed-point fractional library routines.
!                                                              (line 1559)
  * __fractunsdasi:                        Fixed-point fractional library routines.
!                                                              (line 1561)
  * __fractunsdati:                        Fixed-point fractional library routines.
!                                                              (line 1563)
  * __fractunsdida:                        Fixed-point fractional library routines.
!                                                              (line 1714)
  * __fractunsdidq:                        Fixed-point fractional library routines.
!                                                              (line 1711)
  * __fractunsdiha:                        Fixed-point fractional library routines.
!                                                              (line 1712)
  * __fractunsdihq:                        Fixed-point fractional library routines.
!                                                              (line 1709)
  * __fractunsdiqq:                        Fixed-point fractional library routines.
!                                                              (line 1708)
  * __fractunsdisa:                        Fixed-point fractional library routines.
!                                                              (line 1713)
  * __fractunsdisq:                        Fixed-point fractional library routines.
!                                                              (line 1710)
  * __fractunsdita:                        Fixed-point fractional library routines.
!                                                              (line 1715)
  * __fractunsdiuda:                       Fixed-point fractional library routines.
!                                                              (line 1726)
  * __fractunsdiudq:                       Fixed-point fractional library routines.
!                                                              (line 1721)
  * __fractunsdiuha:                       Fixed-point fractional library routines.
!                                                              (line 1723)
  * __fractunsdiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1718)
  * __fractunsdiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1716)
  * __fractunsdiusa:                       Fixed-point fractional library routines.
!                                                              (line 1725)
  * __fractunsdiusq:                       Fixed-point fractional library routines.
!                                                              (line 1719)
  * __fractunsdiuta:                       Fixed-point fractional library routines.
!                                                              (line 1728)
  * __fractunsdqdi:                        Fixed-point fractional library routines.
!                                                              (line 1546)
  * __fractunsdqhi:                        Fixed-point fractional library routines.
!                                                              (line 1544)
  * __fractunsdqqi:                        Fixed-point fractional library routines.
!                                                              (line 1543)
  * __fractunsdqsi:                        Fixed-point fractional library routines.
!                                                              (line 1545)
  * __fractunsdqti:                        Fixed-point fractional library routines.
!                                                              (line 1547)
  * __fractunshadi:                        Fixed-point fractional library routines.
!                                                              (line 1552)
  * __fractunshahi:                        Fixed-point fractional library routines.
!                                                              (line 1550)
  * __fractunshaqi:                        Fixed-point fractional library routines.
!                                                              (line 1549)
  * __fractunshasi:                        Fixed-point fractional library routines.
!                                                              (line 1551)
  * __fractunshati:                        Fixed-point fractional library routines.
!                                                              (line 1553)
  * __fractunshida:                        Fixed-point fractional library routines.
!                                                              (line 1670)
  * __fractunshidq:                        Fixed-point fractional library routines.
!                                                              (line 1667)
  * __fractunshiha:                        Fixed-point fractional library routines.
!                                                              (line 1668)
  * __fractunshihq:                        Fixed-point fractional library routines.
!                                                              (line 1665)
  * __fractunshiqq:                        Fixed-point fractional library routines.
!                                                              (line 1664)
  * __fractunshisa:                        Fixed-point fractional library routines.
!                                                              (line 1669)
  * __fractunshisq:                        Fixed-point fractional library routines.
!                                                              (line 1666)
  * __fractunshita:                        Fixed-point fractional library routines.
!                                                              (line 1671)
  * __fractunshiuda:                       Fixed-point fractional library routines.
!                                                              (line 1682)
  * __fractunshiudq:                       Fixed-point fractional library routines.
!                                                              (line 1677)
  * __fractunshiuha:                       Fixed-point fractional library routines.
!                                                              (line 1679)
  * __fractunshiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1674)
  * __fractunshiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1672)
  * __fractunshiusa:                       Fixed-point fractional library routines.
!                                                              (line 1681)
  * __fractunshiusq:                       Fixed-point fractional library routines.
!                                                              (line 1675)
  * __fractunshiuta:                       Fixed-point fractional library routines.
!                                                              (line 1684)
  * __fractunshqdi:                        Fixed-point fractional library routines.
!                                                              (line 1536)
  * __fractunshqhi:                        Fixed-point fractional library routines.
!                                                              (line 1534)
  * __fractunshqqi:                        Fixed-point fractional library routines.
!                                                              (line 1533)
  * __fractunshqsi:                        Fixed-point fractional library routines.
!                                                              (line 1535)
  * __fractunshqti:                        Fixed-point fractional library routines.
!                                                              (line 1537)
  * __fractunsqida:                        Fixed-point fractional library routines.
!                                                              (line 1648)
  * __fractunsqidq:                        Fixed-point fractional library routines.
!                                                              (line 1645)
  * __fractunsqiha:                        Fixed-point fractional library routines.
!                                                              (line 1646)
  * __fractunsqihq:                        Fixed-point fractional library routines.
!                                                              (line 1643)
  * __fractunsqiqq:                        Fixed-point fractional library routines.
!                                                              (line 1642)
  * __fractunsqisa:                        Fixed-point fractional library routines.
!                                                              (line 1647)
  * __fractunsqisq:                        Fixed-point fractional library routines.
!                                                              (line 1644)
  * __fractunsqita:                        Fixed-point fractional library routines.
!                                                              (line 1649)
  * __fractunsqiuda:                       Fixed-point fractional library routines.
!                                                              (line 1660)
  * __fractunsqiudq:                       Fixed-point fractional library routines.
!                                                              (line 1655)
  * __fractunsqiuha:                       Fixed-point fractional library routines.
!                                                              (line 1657)
  * __fractunsqiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1652)
  * __fractunsqiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1650)
  * __fractunsqiusa:                       Fixed-point fractional library routines.
!                                                              (line 1659)
  * __fractunsqiusq:                       Fixed-point fractional library routines.
!                                                              (line 1653)
  * __fractunsqiuta:                       Fixed-point fractional library routines.
!                                                              (line 1662)
  * __fractunsqqdi:                        Fixed-point fractional library routines.
!                                                              (line 1531)
  * __fractunsqqhi:                        Fixed-point fractional library routines.
!                                                              (line 1529)
  * __fractunsqqqi:                        Fixed-point fractional library routines.
!                                                              (line 1528)
  * __fractunsqqsi:                        Fixed-point fractional library routines.
!                                                              (line 1530)
  * __fractunsqqti:                        Fixed-point fractional library routines.
!                                                              (line 1532)
  * __fractunssadi:                        Fixed-point fractional library routines.
!                                                              (line 1557)
  * __fractunssahi:                        Fixed-point fractional library routines.
!                                                              (line 1555)
  * __fractunssaqi:                        Fixed-point fractional library routines.
!                                                              (line 1554)
  * __fractunssasi:                        Fixed-point fractional library routines.
!                                                              (line 1556)
  * __fractunssati:                        Fixed-point fractional library routines.
!                                                              (line 1558)
  * __fractunssida:                        Fixed-point fractional library routines.
!                                                              (line 1692)
  * __fractunssidq:                        Fixed-point fractional library routines.
!                                                              (line 1689)
  * __fractunssiha:                        Fixed-point fractional library routines.
!                                                              (line 1690)
  * __fractunssihq:                        Fixed-point fractional library routines.
!                                                              (line 1687)
  * __fractunssiqq:                        Fixed-point fractional library routines.
!                                                              (line 1686)
  * __fractunssisa:                        Fixed-point fractional library routines.
!                                                              (line 1691)
  * __fractunssisq:                        Fixed-point fractional library routines.
!                                                              (line 1688)
  * __fractunssita:                        Fixed-point fractional library routines.
!                                                              (line 1693)
  * __fractunssiuda:                       Fixed-point fractional library routines.
!                                                              (line 1704)
  * __fractunssiudq:                       Fixed-point fractional library routines.
!                                                              (line 1699)
  * __fractunssiuha:                       Fixed-point fractional library routines.
!                                                              (line 1701)
  * __fractunssiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1696)
  * __fractunssiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1694)
  * __fractunssiusa:                       Fixed-point fractional library routines.
!                                                              (line 1703)
  * __fractunssiusq:                       Fixed-point fractional library routines.
!                                                              (line 1697)
  * __fractunssiuta:                       Fixed-point fractional library routines.
!                                                              (line 1706)
  * __fractunssqdi:                        Fixed-point fractional library routines.
!                                                              (line 1541)
  * __fractunssqhi:                        Fixed-point fractional library routines.
!                                                              (line 1539)
  * __fractunssqqi:                        Fixed-point fractional library routines.
!                                                              (line 1538)
  * __fractunssqsi:                        Fixed-point fractional library routines.
!                                                              (line 1540)
  * __fractunssqti:                        Fixed-point fractional library routines.
!                                                              (line 1542)
  * __fractunstadi:                        Fixed-point fractional library routines.
!                                                              (line 1567)
  * __fractunstahi:                        Fixed-point fractional library routines.
!                                                              (line 1565)
  * __fractunstaqi:                        Fixed-point fractional library routines.
!                                                              (line 1564)
  * __fractunstasi:                        Fixed-point fractional library routines.
!                                                              (line 1566)
  * __fractunstati:                        Fixed-point fractional library routines.
!                                                              (line 1568)
  * __fractunstida:                        Fixed-point fractional library routines.
!                                                              (line 1737)
  * __fractunstidq:                        Fixed-point fractional library routines.
!                                                              (line 1733)
  * __fractunstiha:                        Fixed-point fractional library routines.
!                                                              (line 1735)
  * __fractunstihq:                        Fixed-point fractional library routines.
!                                                              (line 1731)
  * __fractunstiqq:                        Fixed-point fractional library routines.
!                                                              (line 1730)
  * __fractunstisa:                        Fixed-point fractional library routines.
!                                                              (line 1736)
  * __fractunstisq:                        Fixed-point fractional library routines.
!                                                              (line 1732)
  * __fractunstita:                        Fixed-point fractional library routines.
!                                                              (line 1738)
  * __fractunstiuda:                       Fixed-point fractional library routines.
!                                                              (line 1752)
  * __fractunstiudq:                       Fixed-point fractional library routines.
!                                                              (line 1746)
  * __fractunstiuha:                       Fixed-point fractional library routines.
!                                                              (line 1748)
  * __fractunstiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1742)
  * __fractunstiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1740)
  * __fractunstiusa:                       Fixed-point fractional library routines.
!                                                              (line 1750)
  * __fractunstiusq:                       Fixed-point fractional library routines.
!                                                              (line 1744)
  * __fractunstiuta:                       Fixed-point fractional library routines.
!                                                              (line 1754)
  * __fractunsudadi:                       Fixed-point fractional library routines.
!                                                              (line 1628)
  * __fractunsudahi:                       Fixed-point fractional library routines.
!                                                              (line 1624)
  * __fractunsudaqi:                       Fixed-point fractional library routines.
!                                                              (line 1622)
  * __fractunsudasi:                       Fixed-point fractional library routines.
!                                                              (line 1626)
  * __fractunsudati:                       Fixed-point fractional library routines.
!                                                              (line 1630)
  * __fractunsudqdi:                       Fixed-point fractional library routines.
!                                                              (line 1602)
  * __fractunsudqhi:                       Fixed-point fractional library routines.
!                                                              (line 1598)
  * __fractunsudqqi:                       Fixed-point fractional library routines.
!                                                              (line 1596)
  * __fractunsudqsi:                       Fixed-point fractional library routines.
!                                                              (line 1600)
  * __fractunsudqti:                       Fixed-point fractional library routines.
!                                                              (line 1604)
  * __fractunsuhadi:                       Fixed-point fractional library routines.
!                                                              (line 1612)
  * __fractunsuhahi:                       Fixed-point fractional library routines.
!                                                              (line 1608)
  * __fractunsuhaqi:                       Fixed-point fractional library routines.
!                                                              (line 1606)
  * __fractunsuhasi:                       Fixed-point fractional library routines.
!                                                              (line 1610)
  * __fractunsuhati:                       Fixed-point fractional library routines.
!                                                              (line 1614)
  * __fractunsuhqdi:                       Fixed-point fractional library routines.
!                                                              (line 1583)
  * __fractunsuhqhi:                       Fixed-point fractional library routines.
!                                                              (line 1581)
  * __fractunsuhqqi:                       Fixed-point fractional library routines.
!                                                              (line 1580)
  * __fractunsuhqsi:                       Fixed-point fractional library routines.
!                                                              (line 1582)
  * __fractunsuhqti:                       Fixed-point fractional library routines.
-                                                              (line 1584)
- * __fractunsuqqdi:                       Fixed-point fractional library routines.
                                                               (line 1576)
  * __fractunsuqqhi:                       Fixed-point fractional library routines.
!                                                              (line 1572)
  * __fractunsuqqqi:                       Fixed-point fractional library routines.
!                                                              (line 1570)
  * __fractunsuqqsi:                       Fixed-point fractional library routines.
!                                                              (line 1574)
  * __fractunsuqqti:                       Fixed-point fractional library routines.
!                                                              (line 1578)
  * __fractunsusadi:                       Fixed-point fractional library routines.
!                                                              (line 1619)
  * __fractunsusahi:                       Fixed-point fractional library routines.
!                                                              (line 1617)
  * __fractunsusaqi:                       Fixed-point fractional library routines.
!                                                              (line 1616)
  * __fractunsusasi:                       Fixed-point fractional library routines.
!                                                              (line 1618)
  * __fractunsusati:                       Fixed-point fractional library routines.
!                                                              (line 1620)
  * __fractunsusqdi:                       Fixed-point fractional library routines.
!                                                              (line 1592)
  * __fractunsusqhi:                       Fixed-point fractional library routines.
!                                                              (line 1588)
  * __fractunsusqqi:                       Fixed-point fractional library routines.
!                                                              (line 1586)
  * __fractunsusqsi:                       Fixed-point fractional library routines.
!                                                              (line 1590)
  * __fractunsusqti:                       Fixed-point fractional library routines.
!                                                              (line 1594)
  * __fractunsutadi:                       Fixed-point fractional library routines.
!                                                              (line 1638)
  * __fractunsutahi:                       Fixed-point fractional library routines.
!                                                              (line 1634)
  * __fractunsutaqi:                       Fixed-point fractional library routines.
!                                                              (line 1632)
  * __fractunsutasi:                       Fixed-point fractional library routines.
!                                                              (line 1636)
  * __fractunsutati:                       Fixed-point fractional library routines.
!                                                              (line 1640)
  * __fractuqqda:                          Fixed-point fractional library routines.
!                                                              (line  679)
  * __fractuqqdf:                          Fixed-point fractional library routines.
!                                                              (line  702)
  * __fractuqqdi:                          Fixed-point fractional library routines.
!                                                              (line  699)
  * __fractuqqdq:                          Fixed-point fractional library routines.
!                                                              (line  675)
  * __fractuqqha:                          Fixed-point fractional library routines.
!                                                              (line  677)
  * __fractuqqhi:                          Fixed-point fractional library routines.
!                                                              (line  697)
  * __fractuqqhq:                          Fixed-point fractional library routines.
!                                                              (line  673)
  * __fractuqqqi:                          Fixed-point fractional library routines.
!                                                              (line  696)
  * __fractuqqqq:                          Fixed-point fractional library routines.
!                                                              (line  672)
  * __fractuqqsa:                          Fixed-point fractional library routines.
!                                                              (line  678)
  * __fractuqqsf:                          Fixed-point fractional library routines.
!                                                              (line  701)
  * __fractuqqsi:                          Fixed-point fractional library routines.
!                                                              (line  698)
  * __fractuqqsq:                          Fixed-point fractional library routines.
!                                                              (line  674)
  * __fractuqqta:                          Fixed-point fractional library routines.
!                                                              (line  680)
  * __fractuqqti:                          Fixed-point fractional library routines.
-                                                              (line  700)
- * __fractuqquda:                         Fixed-point fractional library routines.
                                                               (line  692)
  * __fractuqqudq2:                        Fixed-point fractional library routines.
!                                                              (line  686)
  * __fractuqquha:                         Fixed-point fractional library routines.
!                                                              (line  688)
  * __fractuqquhq2:                        Fixed-point fractional library routines.
!                                                              (line  682)
  * __fractuqqusa:                         Fixed-point fractional library routines.
!                                                              (line  690)
  * __fractuqqusq2:                        Fixed-point fractional library routines.
!                                                              (line  684)
  * __fractuqquta:                         Fixed-point fractional library routines.
!                                                              (line  694)
  * __fractusada:                          Fixed-point fractional library routines.
!                                                              (line  836)
  * __fractusadf:                          Fixed-point fractional library routines.
!                                                              (line  857)
  * __fractusadi:                          Fixed-point fractional library routines.
!                                                              (line  854)
  * __fractusadq:                          Fixed-point fractional library routines.
!                                                              (line  833)
  * __fractusaha:                          Fixed-point fractional library routines.
!                                                              (line  834)
  * __fractusahi:                          Fixed-point fractional library routines.
!                                                              (line  852)
  * __fractusahq:                          Fixed-point fractional library routines.
!                                                              (line  831)
  * __fractusaqi:                          Fixed-point fractional library routines.
!                                                              (line  851)
  * __fractusaqq:                          Fixed-point fractional library routines.
!                                                              (line  830)
  * __fractusasa:                          Fixed-point fractional library routines.
!                                                              (line  835)
  * __fractusasf:                          Fixed-point fractional library routines.
!                                                              (line  856)
  * __fractusasi:                          Fixed-point fractional library routines.
!                                                              (line  853)
  * __fractusasq:                          Fixed-point fractional library routines.
!                                                              (line  832)
  * __fractusata:                          Fixed-point fractional library routines.
!                                                              (line  837)
  * __fractusati:                          Fixed-point fractional library routines.
-                                                              (line  855)
- * __fractusauda2:                        Fixed-point fractional library routines.
                                                               (line  847)
  * __fractusaudq:                         Fixed-point fractional library routines.
!                                                              (line  843)
  * __fractusauha2:                        Fixed-point fractional library routines.
!                                                              (line  845)
  * __fractusauhq:                         Fixed-point fractional library routines.
!                                                              (line  840)
  * __fractusauqq:                         Fixed-point fractional library routines.
!                                                              (line  838)
  * __fractusausq:                         Fixed-point fractional library routines.
!                                                              (line  841)
  * __fractusauta2:                        Fixed-point fractional library routines.
!                                                              (line  849)
  * __fractusqda:                          Fixed-point fractional library routines.
!                                                              (line  738)
  * __fractusqdf:                          Fixed-point fractional library routines.
!                                                              (line  761)
  * __fractusqdi:                          Fixed-point fractional library routines.
!                                                              (line  758)
  * __fractusqdq:                          Fixed-point fractional library routines.
!                                                              (line  734)
  * __fractusqha:                          Fixed-point fractional library routines.
!                                                              (line  736)
  * __fractusqhi:                          Fixed-point fractional library routines.
!                                                              (line  756)
  * __fractusqhq:                          Fixed-point fractional library routines.
!                                                              (line  732)
  * __fractusqqi:                          Fixed-point fractional library routines.
!                                                              (line  755)
  * __fractusqqq:                          Fixed-point fractional library routines.
!                                                              (line  731)
  * __fractusqsa:                          Fixed-point fractional library routines.
!                                                              (line  737)
  * __fractusqsf:                          Fixed-point fractional library routines.
!                                                              (line  760)
  * __fractusqsi:                          Fixed-point fractional library routines.
!                                                              (line  757)
  * __fractusqsq:                          Fixed-point fractional library routines.
!                                                              (line  733)
  * __fractusqta:                          Fixed-point fractional library routines.
!                                                              (line  739)
  * __fractusqti:                          Fixed-point fractional library routines.
-                                                              (line  759)
- * __fractusquda:                         Fixed-point fractional library routines.
                                                               (line  751)
  * __fractusqudq2:                        Fixed-point fractional library routines.
!                                                              (line  745)
  * __fractusquha:                         Fixed-point fractional library routines.
!                                                              (line  747)
  * __fractusquhq2:                        Fixed-point fractional library routines.
!                                                              (line  743)
  * __fractusquqq2:                        Fixed-point fractional library routines.
!                                                              (line  741)
  * __fractusqusa:                         Fixed-point fractional library routines.
!                                                              (line  749)
  * __fractusquta:                         Fixed-point fractional library routines.
!                                                              (line  753)
  * __fractutada:                          Fixed-point fractional library routines.
!                                                              (line  899)
  * __fractutadf:                          Fixed-point fractional library routines.
!                                                              (line  925)
  * __fractutadi:                          Fixed-point fractional library routines.
!                                                              (line  921)
  * __fractutadq:                          Fixed-point fractional library routines.
!                                                              (line  894)
  * __fractutaha:                          Fixed-point fractional library routines.
!                                                              (line  896)
  * __fractutahi:                          Fixed-point fractional library routines.
!                                                              (line  919)
  * __fractutahq:                          Fixed-point fractional library routines.
!                                                              (line  891)
  * __fractutaqi:                          Fixed-point fractional library routines.
!                                                              (line  917)
  * __fractutaqq:                          Fixed-point fractional library routines.
!                                                              (line  889)
  * __fractutasa:                          Fixed-point fractional library routines.
!                                                              (line  898)
  * __fractutasf:                          Fixed-point fractional library routines.
!                                                              (line  924)
  * __fractutasi:                          Fixed-point fractional library routines.
!                                                              (line  920)
  * __fractutasq:                          Fixed-point fractional library routines.
!                                                              (line  892)
  * __fractutata:                          Fixed-point fractional library routines.
!                                                              (line  901)
  * __fractutati:                          Fixed-point fractional library routines.
!                                                              (line  922)
  * __fractutauda2:                        Fixed-point fractional library routines.
!                                                              (line  915)
  * __fractutaudq:                         Fixed-point fractional library routines.
!                                                              (line  909)
  * __fractutauha2:                        Fixed-point fractional library routines.
!                                                              (line  911)
  * __fractutauhq:                         Fixed-point fractional library routines.
!                                                              (line  905)
  * __fractutauqq:                         Fixed-point fractional library routines.
!                                                              (line  903)
  * __fractutausa2:                        Fixed-point fractional library routines.
!                                                              (line  913)
  * __fractutausq:                         Fixed-point fractional library routines.
!                                                              (line  907)
  * __gedf2:                               Soft float library routines.
                                                               (line  205)
  * __gesf2:                               Soft float library routines.
--- 51301,52553 ----
  * __floatuntixf:                         Soft float library routines.
                                                               (line  153)
  * __fractdadf:                           Fixed-point fractional library routines.
!                                                              (line  635)
  * __fractdadi:                           Fixed-point fractional library routines.
!                                                              (line  632)
  * __fractdadq:                           Fixed-point fractional library routines.
!                                                              (line  615)
  * __fractdaha2:                          Fixed-point fractional library routines.
!                                                              (line  616)
  * __fractdahi:                           Fixed-point fractional library routines.
!                                                              (line  630)
  * __fractdahq:                           Fixed-point fractional library routines.
!                                                              (line  613)
  * __fractdaqi:                           Fixed-point fractional library routines.
!                                                              (line  629)
  * __fractdaqq:                           Fixed-point fractional library routines.
!                                                              (line  612)
  * __fractdasa2:                          Fixed-point fractional library routines.
!                                                              (line  617)
  * __fractdasf:                           Fixed-point fractional library routines.
!                                                              (line  634)
  * __fractdasi:                           Fixed-point fractional library routines.
!                                                              (line  631)
  * __fractdasq:                           Fixed-point fractional library routines.
!                                                              (line  614)
  * __fractdata2:                          Fixed-point fractional library routines.
!                                                              (line  618)
  * __fractdati:                           Fixed-point fractional library routines.
!                                                              (line  633)
  * __fractdauda:                          Fixed-point fractional library routines.
!                                                              (line  626)
  * __fractdaudq:                          Fixed-point fractional library routines.
!                                                              (line  622)
  * __fractdauha:                          Fixed-point fractional library routines.
!                                                              (line  624)
  * __fractdauhq:                          Fixed-point fractional library routines.
!                                                              (line  620)
  * __fractdauqq:                          Fixed-point fractional library routines.
!                                                              (line  619)
  * __fractdausa:                          Fixed-point fractional library routines.
!                                                              (line  625)
  * __fractdausq:                          Fixed-point fractional library routines.
!                                                              (line  621)
  * __fractdauta:                          Fixed-point fractional library routines.
!                                                              (line  627)
  * __fractdfda:                           Fixed-point fractional library routines.
!                                                              (line 1024)
  * __fractdfdq:                           Fixed-point fractional library routines.
!                                                              (line 1021)
  * __fractdfha:                           Fixed-point fractional library routines.
!                                                              (line 1022)
  * __fractdfhq:                           Fixed-point fractional library routines.
!                                                              (line 1019)
  * __fractdfqq:                           Fixed-point fractional library routines.
!                                                              (line 1018)
  * __fractdfsa:                           Fixed-point fractional library routines.
!                                                              (line 1023)
  * __fractdfsq:                           Fixed-point fractional library routines.
!                                                              (line 1020)
  * __fractdfta:                           Fixed-point fractional library routines.
!                                                              (line 1025)
  * __fractdfuda:                          Fixed-point fractional library routines.
!                                                              (line 1032)
  * __fractdfudq:                          Fixed-point fractional library routines.
!                                                              (line 1029)
  * __fractdfuha:                          Fixed-point fractional library routines.
!                                                              (line 1030)
  * __fractdfuhq:                          Fixed-point fractional library routines.
!                                                              (line 1027)
  * __fractdfuqq:                          Fixed-point fractional library routines.
!                                                              (line 1026)
  * __fractdfusa:                          Fixed-point fractional library routines.
!                                                              (line 1031)
  * __fractdfusq:                          Fixed-point fractional library routines.
!                                                              (line 1028)
  * __fractdfuta:                          Fixed-point fractional library routines.
!                                                              (line 1033)
  * __fractdida:                           Fixed-point fractional library routines.
!                                                              (line  974)
  * __fractdidq:                           Fixed-point fractional library routines.
!                                                              (line  971)
  * __fractdiha:                           Fixed-point fractional library routines.
!                                                              (line  972)
  * __fractdihq:                           Fixed-point fractional library routines.
!                                                              (line  969)
  * __fractdiqq:                           Fixed-point fractional library routines.
!                                                              (line  968)
  * __fractdisa:                           Fixed-point fractional library routines.
!                                                              (line  973)
  * __fractdisq:                           Fixed-point fractional library routines.
!                                                              (line  970)
  * __fractdita:                           Fixed-point fractional library routines.
!                                                              (line  975)
  * __fractdiuda:                          Fixed-point fractional library routines.
!                                                              (line  982)
  * __fractdiudq:                          Fixed-point fractional library routines.
!                                                              (line  979)
  * __fractdiuha:                          Fixed-point fractional library routines.
!                                                              (line  980)
  * __fractdiuhq:                          Fixed-point fractional library routines.
!                                                              (line  977)
  * __fractdiuqq:                          Fixed-point fractional library routines.
!                                                              (line  976)
  * __fractdiusa:                          Fixed-point fractional library routines.
!                                                              (line  981)
  * __fractdiusq:                          Fixed-point fractional library routines.
!                                                              (line  978)
  * __fractdiuta:                          Fixed-point fractional library routines.
!                                                              (line  983)
  * __fractdqda:                           Fixed-point fractional library routines.
!                                                              (line  543)
  * __fractdqdf:                           Fixed-point fractional library routines.
!                                                              (line  565)
  * __fractdqdi:                           Fixed-point fractional library routines.
!                                                              (line  562)
  * __fractdqha:                           Fixed-point fractional library routines.
!                                                              (line  541)
  * __fractdqhi:                           Fixed-point fractional library routines.
!                                                              (line  560)
  * __fractdqhq2:                          Fixed-point fractional library routines.
!                                                              (line  539)
  * __fractdqqi:                           Fixed-point fractional library routines.
!                                                              (line  559)
  * __fractdqqq2:                          Fixed-point fractional library routines.
!                                                              (line  538)
  * __fractdqsa:                           Fixed-point fractional library routines.
!                                                              (line  542)
  * __fractdqsf:                           Fixed-point fractional library routines.
!                                                              (line  564)
  * __fractdqsi:                           Fixed-point fractional library routines.
!                                                              (line  561)
  * __fractdqsq2:                          Fixed-point fractional library routines.
!                                                              (line  540)
  * __fractdqta:                           Fixed-point fractional library routines.
!                                                              (line  544)
  * __fractdqti:                           Fixed-point fractional library routines.
                                                               (line  563)
+ * __fractdquda:                          Fixed-point fractional library routines.
+                                                              (line  555)
  * __fractdqudq:                          Fixed-point fractional library routines.
!                                                              (line  550)
  * __fractdquha:                          Fixed-point fractional library routines.
!                                                              (line  552)
  * __fractdquhq:                          Fixed-point fractional library routines.
!                                                              (line  547)
  * __fractdquqq:                          Fixed-point fractional library routines.
!                                                              (line  545)
  * __fractdqusa:                          Fixed-point fractional library routines.
!                                                              (line  554)
  * __fractdqusq:                          Fixed-point fractional library routines.
!                                                              (line  548)
  * __fractdquta:                          Fixed-point fractional library routines.
!                                                              (line  557)
  * __fracthada2:                          Fixed-point fractional library routines.
!                                                              (line  571)
  * __fracthadf:                           Fixed-point fractional library routines.
!                                                              (line  589)
  * __fracthadi:                           Fixed-point fractional library routines.
!                                                              (line  586)
  * __fracthadq:                           Fixed-point fractional library routines.
!                                                              (line  569)
  * __fracthahi:                           Fixed-point fractional library routines.
!                                                              (line  584)
  * __fracthahq:                           Fixed-point fractional library routines.
!                                                              (line  567)
  * __fracthaqi:                           Fixed-point fractional library routines.
!                                                              (line  583)
  * __fracthaqq:                           Fixed-point fractional library routines.
!                                                              (line  566)
  * __fracthasa2:                          Fixed-point fractional library routines.
!                                                              (line  570)
  * __fracthasf:                           Fixed-point fractional library routines.
!                                                              (line  588)
  * __fracthasi:                           Fixed-point fractional library routines.
!                                                              (line  585)
  * __fracthasq:                           Fixed-point fractional library routines.
!                                                              (line  568)
  * __fracthata2:                          Fixed-point fractional library routines.
!                                                              (line  572)
  * __fracthati:                           Fixed-point fractional library routines.
!                                                              (line  587)
  * __fracthauda:                          Fixed-point fractional library routines.
!                                                              (line  580)
  * __fracthaudq:                          Fixed-point fractional library routines.
!                                                              (line  576)
  * __fracthauha:                          Fixed-point fractional library routines.
!                                                              (line  578)
  * __fracthauhq:                          Fixed-point fractional library routines.
!                                                              (line  574)
  * __fracthauqq:                          Fixed-point fractional library routines.
!                                                              (line  573)
  * __fracthausa:                          Fixed-point fractional library routines.
!                                                              (line  579)
  * __fracthausq:                          Fixed-point fractional library routines.
!                                                              (line  575)
  * __fracthauta:                          Fixed-point fractional library routines.
!                                                              (line  581)
  * __fracthida:                           Fixed-point fractional library routines.
!                                                              (line  942)
  * __fracthidq:                           Fixed-point fractional library routines.
!                                                              (line  939)
  * __fracthiha:                           Fixed-point fractional library routines.
!                                                              (line  940)
  * __fracthihq:                           Fixed-point fractional library routines.
!                                                              (line  937)
  * __fracthiqq:                           Fixed-point fractional library routines.
!                                                              (line  936)
  * __fracthisa:                           Fixed-point fractional library routines.
!                                                              (line  941)
  * __fracthisq:                           Fixed-point fractional library routines.
!                                                              (line  938)
  * __fracthita:                           Fixed-point fractional library routines.
!                                                              (line  943)
  * __fracthiuda:                          Fixed-point fractional library routines.
!                                                              (line  950)
  * __fracthiudq:                          Fixed-point fractional library routines.
!                                                              (line  947)
  * __fracthiuha:                          Fixed-point fractional library routines.
!                                                              (line  948)
  * __fracthiuhq:                          Fixed-point fractional library routines.
!                                                              (line  945)
  * __fracthiuqq:                          Fixed-point fractional library routines.
!                                                              (line  944)
  * __fracthiusa:                          Fixed-point fractional library routines.
!                                                              (line  949)
  * __fracthiusq:                          Fixed-point fractional library routines.
!                                                              (line  946)
  * __fracthiuta:                          Fixed-point fractional library routines.
!                                                              (line  951)
  * __fracthqda:                           Fixed-point fractional library routines.
!                                                              (line  497)
  * __fracthqdf:                           Fixed-point fractional library routines.
!                                                              (line  513)
  * __fracthqdi:                           Fixed-point fractional library routines.
!                                                              (line  510)
  * __fracthqdq2:                          Fixed-point fractional library routines.
!                                                              (line  494)
  * __fracthqha:                           Fixed-point fractional library routines.
!                                                              (line  495)
  * __fracthqhi:                           Fixed-point fractional library routines.
!                                                              (line  508)
  * __fracthqqi:                           Fixed-point fractional library routines.
!                                                              (line  507)
  * __fracthqqq2:                          Fixed-point fractional library routines.
!                                                              (line  492)
  * __fracthqsa:                           Fixed-point fractional library routines.
!                                                              (line  496)
  * __fracthqsf:                           Fixed-point fractional library routines.
!                                                              (line  512)
  * __fracthqsi:                           Fixed-point fractional library routines.
!                                                              (line  509)
  * __fracthqsq2:                          Fixed-point fractional library routines.
!                                                              (line  493)
  * __fracthqta:                           Fixed-point fractional library routines.
!                                                              (line  498)
  * __fracthqti:                           Fixed-point fractional library routines.
!                                                              (line  511)
  * __fracthquda:                          Fixed-point fractional library routines.
!                                                              (line  505)
  * __fracthqudq:                          Fixed-point fractional library routines.
!                                                              (line  502)
  * __fracthquha:                          Fixed-point fractional library routines.
!                                                              (line  503)
  * __fracthquhq:                          Fixed-point fractional library routines.
!                                                              (line  500)
  * __fracthquqq:                          Fixed-point fractional library routines.
!                                                              (line  499)
  * __fracthqusa:                          Fixed-point fractional library routines.
!                                                              (line  504)
  * __fracthqusq:                          Fixed-point fractional library routines.
!                                                              (line  501)
  * __fracthquta:                          Fixed-point fractional library routines.
!                                                              (line  506)
  * __fractqida:                           Fixed-point fractional library routines.
!                                                              (line  924)
  * __fractqidq:                           Fixed-point fractional library routines.
!                                                              (line  921)
  * __fractqiha:                           Fixed-point fractional library routines.
!                                                              (line  922)
  * __fractqihq:                           Fixed-point fractional library routines.
!                                                              (line  919)
  * __fractqiqq:                           Fixed-point fractional library routines.
!                                                              (line  918)
  * __fractqisa:                           Fixed-point fractional library routines.
!                                                              (line  923)
  * __fractqisq:                           Fixed-point fractional library routines.
!                                                              (line  920)
  * __fractqita:                           Fixed-point fractional library routines.
!                                                              (line  925)
  * __fractqiuda:                          Fixed-point fractional library routines.
!                                                              (line  933)
  * __fractqiudq:                          Fixed-point fractional library routines.
!                                                              (line  929)
  * __fractqiuha:                          Fixed-point fractional library routines.
!                                                              (line  931)
  * __fractqiuhq:                          Fixed-point fractional library routines.
!                                                              (line  927)
  * __fractqiuqq:                          Fixed-point fractional library routines.
!                                                              (line  926)
  * __fractqiusa:                          Fixed-point fractional library routines.
!                                                              (line  932)
  * __fractqiusq:                          Fixed-point fractional library routines.
!                                                              (line  928)
  * __fractqiuta:                          Fixed-point fractional library routines.
!                                                              (line  934)
  * __fractqqda:                           Fixed-point fractional library routines.
!                                                              (line  473)
  * __fractqqdf:                           Fixed-point fractional library routines.
!                                                              (line  491)
  * __fractqqdi:                           Fixed-point fractional library routines.
!                                                              (line  488)
  * __fractqqdq2:                          Fixed-point fractional library routines.
!                                                              (line  470)
  * __fractqqha:                           Fixed-point fractional library routines.
!                                                              (line  471)
  * __fractqqhi:                           Fixed-point fractional library routines.
!                                                              (line  486)
  * __fractqqhq2:                          Fixed-point fractional library routines.
!                                                              (line  468)
  * __fractqqqi:                           Fixed-point fractional library routines.
!                                                              (line  485)
  * __fractqqsa:                           Fixed-point fractional library routines.
!                                                              (line  472)
  * __fractqqsf:                           Fixed-point fractional library routines.
!                                                              (line  490)
  * __fractqqsi:                           Fixed-point fractional library routines.
!                                                              (line  487)
  * __fractqqsq2:                          Fixed-point fractional library routines.
!                                                              (line  469)
  * __fractqqta:                           Fixed-point fractional library routines.
!                                                              (line  474)
  * __fractqqti:                           Fixed-point fractional library routines.
!                                                              (line  489)
  * __fractqquda:                          Fixed-point fractional library routines.
!                                                              (line  482)
  * __fractqqudq:                          Fixed-point fractional library routines.
!                                                              (line  478)
  * __fractqquha:                          Fixed-point fractional library routines.
!                                                              (line  480)
  * __fractqquhq:                          Fixed-point fractional library routines.
!                                                              (line  476)
  * __fractqquqq:                          Fixed-point fractional library routines.
!                                                              (line  475)
  * __fractqqusa:                          Fixed-point fractional library routines.
!                                                              (line  481)
  * __fractqqusq:                          Fixed-point fractional library routines.
!                                                              (line  477)
  * __fractqquta:                          Fixed-point fractional library routines.
!                                                              (line  483)
  * __fractsada2:                          Fixed-point fractional library routines.
!                                                              (line  595)
  * __fractsadf:                           Fixed-point fractional library routines.
!                                                              (line  611)
  * __fractsadi:                           Fixed-point fractional library routines.
!                                                              (line  608)
  * __fractsadq:                           Fixed-point fractional library routines.
!                                                              (line  593)
  * __fractsaha2:                          Fixed-point fractional library routines.
!                                                              (line  594)
  * __fractsahi:                           Fixed-point fractional library routines.
!                                                              (line  606)
  * __fractsahq:                           Fixed-point fractional library routines.
!                                                              (line  591)
  * __fractsaqi:                           Fixed-point fractional library routines.
!                                                              (line  605)
  * __fractsaqq:                           Fixed-point fractional library routines.
!                                                              (line  590)
  * __fractsasf:                           Fixed-point fractional library routines.
!                                                              (line  610)
  * __fractsasi:                           Fixed-point fractional library routines.
!                                                              (line  607)
  * __fractsasq:                           Fixed-point fractional library routines.
!                                                              (line  592)
  * __fractsata2:                          Fixed-point fractional library routines.
!                                                              (line  596)
  * __fractsati:                           Fixed-point fractional library routines.
!                                                              (line  609)
  * __fractsauda:                          Fixed-point fractional library routines.
!                                                              (line  603)
  * __fractsaudq:                          Fixed-point fractional library routines.
!                                                              (line  600)
  * __fractsauha:                          Fixed-point fractional library routines.
!                                                              (line  601)
  * __fractsauhq:                          Fixed-point fractional library routines.
!                                                              (line  598)
  * __fractsauqq:                          Fixed-point fractional library routines.
!                                                              (line  597)
  * __fractsausa:                          Fixed-point fractional library routines.
!                                                              (line  602)
  * __fractsausq:                          Fixed-point fractional library routines.
!                                                              (line  599)
  * __fractsauta:                          Fixed-point fractional library routines.
!                                                              (line  604)
  * __fractsfda:                           Fixed-point fractional library routines.
!                                                              (line 1008)
  * __fractsfdq:                           Fixed-point fractional library routines.
!                                                              (line 1005)
  * __fractsfha:                           Fixed-point fractional library routines.
!                                                              (line 1006)
  * __fractsfhq:                           Fixed-point fractional library routines.
!                                                              (line 1003)
  * __fractsfqq:                           Fixed-point fractional library routines.
!                                                              (line 1002)
  * __fractsfsa:                           Fixed-point fractional library routines.
!                                                              (line 1007)
  * __fractsfsq:                           Fixed-point fractional library routines.
!                                                              (line 1004)
  * __fractsfta:                           Fixed-point fractional library routines.
!                                                              (line 1009)
  * __fractsfuda:                          Fixed-point fractional library routines.
!                                                              (line 1016)
  * __fractsfudq:                          Fixed-point fractional library routines.
!                                                              (line 1013)
  * __fractsfuha:                          Fixed-point fractional library routines.
!                                                              (line 1014)
  * __fractsfuhq:                          Fixed-point fractional library routines.
!                                                              (line 1011)
  * __fractsfuqq:                          Fixed-point fractional library routines.
!                                                              (line 1010)
  * __fractsfusa:                          Fixed-point fractional library routines.
!                                                              (line 1015)
  * __fractsfusq:                          Fixed-point fractional library routines.
!                                                              (line 1012)
  * __fractsfuta:                          Fixed-point fractional library routines.
!                                                              (line 1017)
  * __fractsida:                           Fixed-point fractional library routines.
!                                                              (line  958)
  * __fractsidq:                           Fixed-point fractional library routines.
!                                                              (line  955)
  * __fractsiha:                           Fixed-point fractional library routines.
!                                                              (line  956)
  * __fractsihq:                           Fixed-point fractional library routines.
!                                                              (line  953)
  * __fractsiqq:                           Fixed-point fractional library routines.
!                                                              (line  952)
  * __fractsisa:                           Fixed-point fractional library routines.
!                                                              (line  957)
  * __fractsisq:                           Fixed-point fractional library routines.
!                                                              (line  954)
  * __fractsita:                           Fixed-point fractional library routines.
!                                                              (line  959)
  * __fractsiuda:                          Fixed-point fractional library routines.
!                                                              (line  966)
  * __fractsiudq:                          Fixed-point fractional library routines.
!                                                              (line  963)
  * __fractsiuha:                          Fixed-point fractional library routines.
!                                                              (line  964)
  * __fractsiuhq:                          Fixed-point fractional library routines.
!                                                              (line  961)
  * __fractsiuqq:                          Fixed-point fractional library routines.
!                                                              (line  960)
  * __fractsiusa:                          Fixed-point fractional library routines.
!                                                              (line  965)
  * __fractsiusq:                          Fixed-point fractional library routines.
!                                                              (line  962)
  * __fractsiuta:                          Fixed-point fractional library routines.
!                                                              (line  967)
  * __fractsqda:                           Fixed-point fractional library routines.
!                                                              (line  519)
  * __fractsqdf:                           Fixed-point fractional library routines.
!                                                              (line  537)
  * __fractsqdi:                           Fixed-point fractional library routines.
!                                                              (line  534)
  * __fractsqdq2:                          Fixed-point fractional library routines.
!                                                              (line  516)
  * __fractsqha:                           Fixed-point fractional library routines.
!                                                              (line  517)
  * __fractsqhi:                           Fixed-point fractional library routines.
!                                                              (line  532)
  * __fractsqhq2:                          Fixed-point fractional library routines.
!                                                              (line  515)
  * __fractsqqi:                           Fixed-point fractional library routines.
!                                                              (line  531)
  * __fractsqqq2:                          Fixed-point fractional library routines.
!                                                              (line  514)
  * __fractsqsa:                           Fixed-point fractional library routines.
!                                                              (line  518)
  * __fractsqsf:                           Fixed-point fractional library routines.
!                                                              (line  536)
  * __fractsqsi:                           Fixed-point fractional library routines.
!                                                              (line  533)
  * __fractsqta:                           Fixed-point fractional library routines.
!                                                              (line  520)
  * __fractsqti:                           Fixed-point fractional library routines.
!                                                              (line  535)
  * __fractsquda:                          Fixed-point fractional library routines.
!                                                              (line  528)
  * __fractsqudq:                          Fixed-point fractional library routines.
!                                                              (line  524)
  * __fractsquha:                          Fixed-point fractional library routines.
!                                                              (line  526)
  * __fractsquhq:                          Fixed-point fractional library routines.
!                                                              (line  522)
  * __fractsquqq:                          Fixed-point fractional library routines.
!                                                              (line  521)
  * __fractsqusa:                          Fixed-point fractional library routines.
!                                                              (line  527)
  * __fractsqusq:                          Fixed-point fractional library routines.
!                                                              (line  523)
  * __fractsquta:                          Fixed-point fractional library routines.
!                                                              (line  529)
  * __fracttada2:                          Fixed-point fractional library routines.
!                                                              (line  642)
  * __fracttadf:                           Fixed-point fractional library routines.
!                                                              (line  663)
  * __fracttadi:                           Fixed-point fractional library routines.
!                                                              (line  660)
  * __fracttadq:                           Fixed-point fractional library routines.
!                                                              (line  639)
  * __fracttaha2:                          Fixed-point fractional library routines.
!                                                              (line  640)
  * __fracttahi:                           Fixed-point fractional library routines.
!                                                              (line  658)
  * __fracttahq:                           Fixed-point fractional library routines.
!                                                              (line  637)
  * __fracttaqi:                           Fixed-point fractional library routines.
!                                                              (line  657)
  * __fracttaqq:                           Fixed-point fractional library routines.
!                                                              (line  636)
  * __fracttasa2:                          Fixed-point fractional library routines.
!                                                              (line  641)
  * __fracttasf:                           Fixed-point fractional library routines.
!                                                              (line  662)
  * __fracttasi:                           Fixed-point fractional library routines.
!                                                              (line  659)
  * __fracttasq:                           Fixed-point fractional library routines.
!                                                              (line  638)
  * __fracttati:                           Fixed-point fractional library routines.
                                                               (line  661)
+ * __fracttauda:                          Fixed-point fractional library routines.
+                                                              (line  653)
  * __fracttaudq:                          Fixed-point fractional library routines.
!                                                              (line  648)
  * __fracttauha:                          Fixed-point fractional library routines.
!                                                              (line  650)
  * __fracttauhq:                          Fixed-point fractional library routines.
!                                                              (line  645)
  * __fracttauqq:                          Fixed-point fractional library routines.
!                                                              (line  643)
  * __fracttausa:                          Fixed-point fractional library routines.
!                                                              (line  652)
  * __fracttausq:                          Fixed-point fractional library routines.
!                                                              (line  646)
  * __fracttauta:                          Fixed-point fractional library routines.
!                                                              (line  655)
  * __fracttida:                           Fixed-point fractional library routines.
!                                                              (line  990)
  * __fracttidq:                           Fixed-point fractional library routines.
!                                                              (line  987)
  * __fracttiha:                           Fixed-point fractional library routines.
!                                                              (line  988)
  * __fracttihq:                           Fixed-point fractional library routines.
!                                                              (line  985)
  * __fracttiqq:                           Fixed-point fractional library routines.
!                                                              (line  984)
  * __fracttisa:                           Fixed-point fractional library routines.
!                                                              (line  989)
  * __fracttisq:                           Fixed-point fractional library routines.
!                                                              (line  986)
  * __fracttita:                           Fixed-point fractional library routines.
!                                                              (line  991)
  * __fracttiuda:                          Fixed-point fractional library routines.
!                                                              (line  999)
  * __fracttiudq:                          Fixed-point fractional library routines.
!                                                              (line  995)
  * __fracttiuha:                          Fixed-point fractional library routines.
!                                                              (line  997)
  * __fracttiuhq:                          Fixed-point fractional library routines.
!                                                              (line  993)
  * __fracttiuqq:                          Fixed-point fractional library routines.
!                                                              (line  992)
  * __fracttiusa:                          Fixed-point fractional library routines.
!                                                              (line  998)
  * __fracttiusq:                          Fixed-point fractional library routines.
!                                                              (line  994)
  * __fracttiuta:                          Fixed-point fractional library routines.
!                                                              (line 1000)
  * __fractudada:                          Fixed-point fractional library routines.
!                                                              (line  857)
  * __fractudadf:                          Fixed-point fractional library routines.
!                                                              (line  880)
  * __fractudadi:                          Fixed-point fractional library routines.
!                                                              (line  877)
  * __fractudadq:                          Fixed-point fractional library routines.
!                                                              (line  853)
  * __fractudaha:                          Fixed-point fractional library routines.
!                                                              (line  855)
  * __fractudahi:                          Fixed-point fractional library routines.
!                                                              (line  875)
  * __fractudahq:                          Fixed-point fractional library routines.
!                                                              (line  851)
  * __fractudaqi:                          Fixed-point fractional library routines.
!                                                              (line  874)
  * __fractudaqq:                          Fixed-point fractional library routines.
!                                                              (line  850)
  * __fractudasa:                          Fixed-point fractional library routines.
!                                                              (line  856)
  * __fractudasf:                          Fixed-point fractional library routines.
!                                                              (line  879)
  * __fractudasi:                          Fixed-point fractional library routines.
!                                                              (line  876)
  * __fractudasq:                          Fixed-point fractional library routines.
!                                                              (line  852)
  * __fractudata:                          Fixed-point fractional library routines.
!                                                              (line  858)
  * __fractudati:                          Fixed-point fractional library routines.
!                                                              (line  878)
  * __fractudaudq:                         Fixed-point fractional library routines.
!                                                              (line  866)
  * __fractudauha2:                        Fixed-point fractional library routines.
!                                                              (line  868)
  * __fractudauhq:                         Fixed-point fractional library routines.
!                                                              (line  862)
  * __fractudauqq:                         Fixed-point fractional library routines.
!                                                              (line  860)
  * __fractudausa2:                        Fixed-point fractional library routines.
!                                                              (line  870)
  * __fractudausq:                         Fixed-point fractional library routines.
!                                                              (line  864)
  * __fractudauta2:                        Fixed-point fractional library routines.
!                                                              (line  872)
  * __fractudqda:                          Fixed-point fractional library routines.
!                                                              (line  764)
  * __fractudqdf:                          Fixed-point fractional library routines.
!                                                              (line  790)
  * __fractudqdi:                          Fixed-point fractional library routines.
!                                                              (line  786)
  * __fractudqdq:                          Fixed-point fractional library routines.
!                                                              (line  759)
  * __fractudqha:                          Fixed-point fractional library routines.
!                                                              (line  761)
  * __fractudqhi:                          Fixed-point fractional library routines.
!                                                              (line  784)
  * __fractudqhq:                          Fixed-point fractional library routines.
!                                                              (line  756)
  * __fractudqqi:                          Fixed-point fractional library routines.
!                                                              (line  782)
  * __fractudqqq:                          Fixed-point fractional library routines.
!                                                              (line  754)
  * __fractudqsa:                          Fixed-point fractional library routines.
!                                                              (line  763)
  * __fractudqsf:                          Fixed-point fractional library routines.
!                                                              (line  789)
  * __fractudqsi:                          Fixed-point fractional library routines.
!                                                              (line  785)
  * __fractudqsq:                          Fixed-point fractional library routines.
!                                                              (line  757)
  * __fractudqta:                          Fixed-point fractional library routines.
!                                                              (line  766)
  * __fractudqti:                          Fixed-point fractional library routines.
!                                                              (line  787)
  * __fractudquda:                         Fixed-point fractional library routines.
!                                                              (line  778)
  * __fractudquha:                         Fixed-point fractional library routines.
!                                                              (line  774)
  * __fractudquhq2:                        Fixed-point fractional library routines.
!                                                              (line  770)
  * __fractudquqq2:                        Fixed-point fractional library routines.
!                                                              (line  768)
  * __fractudqusa:                         Fixed-point fractional library routines.
!                                                              (line  776)
  * __fractudqusq2:                        Fixed-point fractional library routines.
!                                                              (line  772)
  * __fractudquta:                         Fixed-point fractional library routines.
!                                                              (line  780)
  * __fractuhada:                          Fixed-point fractional library routines.
!                                                              (line  798)
  * __fractuhadf:                          Fixed-point fractional library routines.
!                                                              (line  821)
  * __fractuhadi:                          Fixed-point fractional library routines.
!                                                              (line  818)
  * __fractuhadq:                          Fixed-point fractional library routines.
!                                                              (line  794)
  * __fractuhaha:                          Fixed-point fractional library routines.
!                                                              (line  796)
  * __fractuhahi:                          Fixed-point fractional library routines.
!                                                              (line  816)
  * __fractuhahq:                          Fixed-point fractional library routines.
!                                                              (line  792)
  * __fractuhaqi:                          Fixed-point fractional library routines.
!                                                              (line  815)
  * __fractuhaqq:                          Fixed-point fractional library routines.
!                                                              (line  791)
  * __fractuhasa:                          Fixed-point fractional library routines.
!                                                              (line  797)
  * __fractuhasf:                          Fixed-point fractional library routines.
!                                                              (line  820)
  * __fractuhasi:                          Fixed-point fractional library routines.
!                                                              (line  817)
  * __fractuhasq:                          Fixed-point fractional library routines.
!                                                              (line  793)
  * __fractuhata:                          Fixed-point fractional library routines.
!                                                              (line  799)
  * __fractuhati:                          Fixed-point fractional library routines.
                                                               (line  819)
+ * __fractuhauda2:                        Fixed-point fractional library routines.
+                                                              (line  811)
  * __fractuhaudq:                         Fixed-point fractional library routines.
!                                                              (line  807)
  * __fractuhauhq:                         Fixed-point fractional library routines.
!                                                              (line  803)
  * __fractuhauqq:                         Fixed-point fractional library routines.
!                                                              (line  801)
  * __fractuhausa2:                        Fixed-point fractional library routines.
!                                                              (line  809)
  * __fractuhausq:                         Fixed-point fractional library routines.
!                                                              (line  805)
  * __fractuhauta2:                        Fixed-point fractional library routines.
!                                                              (line  813)
  * __fractuhqda:                          Fixed-point fractional library routines.
!                                                              (line  701)
  * __fractuhqdf:                          Fixed-point fractional library routines.
!                                                              (line  722)
  * __fractuhqdi:                          Fixed-point fractional library routines.
!                                                              (line  719)
  * __fractuhqdq:                          Fixed-point fractional library routines.
!                                                              (line  698)
  * __fractuhqha:                          Fixed-point fractional library routines.
!                                                              (line  699)
  * __fractuhqhi:                          Fixed-point fractional library routines.
!                                                              (line  717)
  * __fractuhqhq:                          Fixed-point fractional library routines.
!                                                              (line  696)
  * __fractuhqqi:                          Fixed-point fractional library routines.
!                                                              (line  716)
  * __fractuhqqq:                          Fixed-point fractional library routines.
!                                                              (line  695)
  * __fractuhqsa:                          Fixed-point fractional library routines.
!                                                              (line  700)
  * __fractuhqsf:                          Fixed-point fractional library routines.
!                                                              (line  721)
  * __fractuhqsi:                          Fixed-point fractional library routines.
!                                                              (line  718)
  * __fractuhqsq:                          Fixed-point fractional library routines.
!                                                              (line  697)
  * __fractuhqta:                          Fixed-point fractional library routines.
!                                                              (line  702)
  * __fractuhqti:                          Fixed-point fractional library routines.
                                                               (line  720)
+ * __fractuhquda:                         Fixed-point fractional library routines.
+                                                              (line  712)
  * __fractuhqudq2:                        Fixed-point fractional library routines.
!                                                              (line  707)
  * __fractuhquha:                         Fixed-point fractional library routines.
!                                                              (line  709)
  * __fractuhquqq2:                        Fixed-point fractional library routines.
!                                                              (line  703)
  * __fractuhqusa:                         Fixed-point fractional library routines.
!                                                              (line  711)
  * __fractuhqusq2:                        Fixed-point fractional library routines.
!                                                              (line  705)
  * __fractuhquta:                         Fixed-point fractional library routines.
!                                                              (line  714)
  * __fractunsdadi:                        Fixed-point fractional library routines.
!                                                              (line 1554)
  * __fractunsdahi:                        Fixed-point fractional library routines.
!                                                              (line 1552)
  * __fractunsdaqi:                        Fixed-point fractional library routines.
!                                                              (line 1551)
  * __fractunsdasi:                        Fixed-point fractional library routines.
!                                                              (line 1553)
  * __fractunsdati:                        Fixed-point fractional library routines.
!                                                              (line 1555)
  * __fractunsdida:                        Fixed-point fractional library routines.
!                                                              (line 1706)
  * __fractunsdidq:                        Fixed-point fractional library routines.
!                                                              (line 1703)
  * __fractunsdiha:                        Fixed-point fractional library routines.
!                                                              (line 1704)
  * __fractunsdihq:                        Fixed-point fractional library routines.
!                                                              (line 1701)
  * __fractunsdiqq:                        Fixed-point fractional library routines.
!                                                              (line 1700)
  * __fractunsdisa:                        Fixed-point fractional library routines.
!                                                              (line 1705)
  * __fractunsdisq:                        Fixed-point fractional library routines.
!                                                              (line 1702)
  * __fractunsdita:                        Fixed-point fractional library routines.
!                                                              (line 1707)
  * __fractunsdiuda:                       Fixed-point fractional library routines.
!                                                              (line 1718)
  * __fractunsdiudq:                       Fixed-point fractional library routines.
!                                                              (line 1713)
  * __fractunsdiuha:                       Fixed-point fractional library routines.
!                                                              (line 1715)
  * __fractunsdiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1710)
  * __fractunsdiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1708)
  * __fractunsdiusa:                       Fixed-point fractional library routines.
!                                                              (line 1717)
  * __fractunsdiusq:                       Fixed-point fractional library routines.
!                                                              (line 1711)
  * __fractunsdiuta:                       Fixed-point fractional library routines.
!                                                              (line 1720)
  * __fractunsdqdi:                        Fixed-point fractional library routines.
!                                                              (line 1538)
  * __fractunsdqhi:                        Fixed-point fractional library routines.
!                                                              (line 1536)
  * __fractunsdqqi:                        Fixed-point fractional library routines.
!                                                              (line 1535)
  * __fractunsdqsi:                        Fixed-point fractional library routines.
!                                                              (line 1537)
  * __fractunsdqti:                        Fixed-point fractional library routines.
!                                                              (line 1539)
  * __fractunshadi:                        Fixed-point fractional library routines.
!                                                              (line 1544)
  * __fractunshahi:                        Fixed-point fractional library routines.
!                                                              (line 1542)
  * __fractunshaqi:                        Fixed-point fractional library routines.
!                                                              (line 1541)
  * __fractunshasi:                        Fixed-point fractional library routines.
!                                                              (line 1543)
  * __fractunshati:                        Fixed-point fractional library routines.
!                                                              (line 1545)
  * __fractunshida:                        Fixed-point fractional library routines.
!                                                              (line 1662)
  * __fractunshidq:                        Fixed-point fractional library routines.
!                                                              (line 1659)
  * __fractunshiha:                        Fixed-point fractional library routines.
!                                                              (line 1660)
  * __fractunshihq:                        Fixed-point fractional library routines.
!                                                              (line 1657)
  * __fractunshiqq:                        Fixed-point fractional library routines.
!                                                              (line 1656)
  * __fractunshisa:                        Fixed-point fractional library routines.
!                                                              (line 1661)
  * __fractunshisq:                        Fixed-point fractional library routines.
!                                                              (line 1658)
  * __fractunshita:                        Fixed-point fractional library routines.
!                                                              (line 1663)
  * __fractunshiuda:                       Fixed-point fractional library routines.
!                                                              (line 1674)
  * __fractunshiudq:                       Fixed-point fractional library routines.
!                                                              (line 1669)
  * __fractunshiuha:                       Fixed-point fractional library routines.
!                                                              (line 1671)
  * __fractunshiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1666)
  * __fractunshiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1664)
  * __fractunshiusa:                       Fixed-point fractional library routines.
!                                                              (line 1673)
  * __fractunshiusq:                       Fixed-point fractional library routines.
!                                                              (line 1667)
  * __fractunshiuta:                       Fixed-point fractional library routines.
!                                                              (line 1676)
  * __fractunshqdi:                        Fixed-point fractional library routines.
!                                                              (line 1528)
  * __fractunshqhi:                        Fixed-point fractional library routines.
!                                                              (line 1526)
  * __fractunshqqi:                        Fixed-point fractional library routines.
!                                                              (line 1525)
  * __fractunshqsi:                        Fixed-point fractional library routines.
!                                                              (line 1527)
  * __fractunshqti:                        Fixed-point fractional library routines.
!                                                              (line 1529)
  * __fractunsqida:                        Fixed-point fractional library routines.
!                                                              (line 1640)
  * __fractunsqidq:                        Fixed-point fractional library routines.
!                                                              (line 1637)
  * __fractunsqiha:                        Fixed-point fractional library routines.
!                                                              (line 1638)
  * __fractunsqihq:                        Fixed-point fractional library routines.
!                                                              (line 1635)
  * __fractunsqiqq:                        Fixed-point fractional library routines.
!                                                              (line 1634)
  * __fractunsqisa:                        Fixed-point fractional library routines.
!                                                              (line 1639)
  * __fractunsqisq:                        Fixed-point fractional library routines.
!                                                              (line 1636)
  * __fractunsqita:                        Fixed-point fractional library routines.
!                                                              (line 1641)
  * __fractunsqiuda:                       Fixed-point fractional library routines.
!                                                              (line 1652)
  * __fractunsqiudq:                       Fixed-point fractional library routines.
!                                                              (line 1647)
  * __fractunsqiuha:                       Fixed-point fractional library routines.
!                                                              (line 1649)
  * __fractunsqiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1644)
  * __fractunsqiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1642)
  * __fractunsqiusa:                       Fixed-point fractional library routines.
!                                                              (line 1651)
  * __fractunsqiusq:                       Fixed-point fractional library routines.
!                                                              (line 1645)
  * __fractunsqiuta:                       Fixed-point fractional library routines.
!                                                              (line 1654)
  * __fractunsqqdi:                        Fixed-point fractional library routines.
!                                                              (line 1523)
  * __fractunsqqhi:                        Fixed-point fractional library routines.
!                                                              (line 1521)
  * __fractunsqqqi:                        Fixed-point fractional library routines.
!                                                              (line 1520)
  * __fractunsqqsi:                        Fixed-point fractional library routines.
!                                                              (line 1522)
  * __fractunsqqti:                        Fixed-point fractional library routines.
!                                                              (line 1524)
  * __fractunssadi:                        Fixed-point fractional library routines.
!                                                              (line 1549)
  * __fractunssahi:                        Fixed-point fractional library routines.
!                                                              (line 1547)
  * __fractunssaqi:                        Fixed-point fractional library routines.
!                                                              (line 1546)
  * __fractunssasi:                        Fixed-point fractional library routines.
!                                                              (line 1548)
  * __fractunssati:                        Fixed-point fractional library routines.
!                                                              (line 1550)
  * __fractunssida:                        Fixed-point fractional library routines.
!                                                              (line 1684)
  * __fractunssidq:                        Fixed-point fractional library routines.
!                                                              (line 1681)
  * __fractunssiha:                        Fixed-point fractional library routines.
!                                                              (line 1682)
  * __fractunssihq:                        Fixed-point fractional library routines.
!                                                              (line 1679)
  * __fractunssiqq:                        Fixed-point fractional library routines.
!                                                              (line 1678)
  * __fractunssisa:                        Fixed-point fractional library routines.
!                                                              (line 1683)
  * __fractunssisq:                        Fixed-point fractional library routines.
!                                                              (line 1680)
  * __fractunssita:                        Fixed-point fractional library routines.
!                                                              (line 1685)
  * __fractunssiuda:                       Fixed-point fractional library routines.
!                                                              (line 1696)
  * __fractunssiudq:                       Fixed-point fractional library routines.
!                                                              (line 1691)
  * __fractunssiuha:                       Fixed-point fractional library routines.
!                                                              (line 1693)
  * __fractunssiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1688)
  * __fractunssiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1686)
  * __fractunssiusa:                       Fixed-point fractional library routines.
!                                                              (line 1695)
  * __fractunssiusq:                       Fixed-point fractional library routines.
!                                                              (line 1689)
  * __fractunssiuta:                       Fixed-point fractional library routines.
!                                                              (line 1698)
  * __fractunssqdi:                        Fixed-point fractional library routines.
!                                                              (line 1533)
  * __fractunssqhi:                        Fixed-point fractional library routines.
!                                                              (line 1531)
  * __fractunssqqi:                        Fixed-point fractional library routines.
!                                                              (line 1530)
  * __fractunssqsi:                        Fixed-point fractional library routines.
!                                                              (line 1532)
  * __fractunssqti:                        Fixed-point fractional library routines.
!                                                              (line 1534)
  * __fractunstadi:                        Fixed-point fractional library routines.
!                                                              (line 1559)
  * __fractunstahi:                        Fixed-point fractional library routines.
!                                                              (line 1557)
  * __fractunstaqi:                        Fixed-point fractional library routines.
!                                                              (line 1556)
  * __fractunstasi:                        Fixed-point fractional library routines.
!                                                              (line 1558)
  * __fractunstati:                        Fixed-point fractional library routines.
!                                                              (line 1560)
  * __fractunstida:                        Fixed-point fractional library routines.
!                                                              (line 1729)
  * __fractunstidq:                        Fixed-point fractional library routines.
!                                                              (line 1725)
  * __fractunstiha:                        Fixed-point fractional library routines.
!                                                              (line 1727)
  * __fractunstihq:                        Fixed-point fractional library routines.
!                                                              (line 1723)
  * __fractunstiqq:                        Fixed-point fractional library routines.
!                                                              (line 1722)
  * __fractunstisa:                        Fixed-point fractional library routines.
!                                                              (line 1728)
  * __fractunstisq:                        Fixed-point fractional library routines.
!                                                              (line 1724)
  * __fractunstita:                        Fixed-point fractional library routines.
!                                                              (line 1730)
  * __fractunstiuda:                       Fixed-point fractional library routines.
!                                                              (line 1744)
  * __fractunstiudq:                       Fixed-point fractional library routines.
!                                                              (line 1738)
  * __fractunstiuha:                       Fixed-point fractional library routines.
!                                                              (line 1740)
  * __fractunstiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1734)
  * __fractunstiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1732)
  * __fractunstiusa:                       Fixed-point fractional library routines.
!                                                              (line 1742)
  * __fractunstiusq:                       Fixed-point fractional library routines.
!                                                              (line 1736)
  * __fractunstiuta:                       Fixed-point fractional library routines.
!                                                              (line 1746)
  * __fractunsudadi:                       Fixed-point fractional library routines.
!                                                              (line 1620)
  * __fractunsudahi:                       Fixed-point fractional library routines.
!                                                              (line 1616)
  * __fractunsudaqi:                       Fixed-point fractional library routines.
!                                                              (line 1614)
  * __fractunsudasi:                       Fixed-point fractional library routines.
!                                                              (line 1618)
  * __fractunsudati:                       Fixed-point fractional library routines.
!                                                              (line 1622)
  * __fractunsudqdi:                       Fixed-point fractional library routines.
!                                                              (line 1594)
  * __fractunsudqhi:                       Fixed-point fractional library routines.
!                                                              (line 1590)
  * __fractunsudqqi:                       Fixed-point fractional library routines.
!                                                              (line 1588)
  * __fractunsudqsi:                       Fixed-point fractional library routines.
!                                                              (line 1592)
  * __fractunsudqti:                       Fixed-point fractional library routines.
!                                                              (line 1596)
  * __fractunsuhadi:                       Fixed-point fractional library routines.
!                                                              (line 1604)
  * __fractunsuhahi:                       Fixed-point fractional library routines.
!                                                              (line 1600)
  * __fractunsuhaqi:                       Fixed-point fractional library routines.
!                                                              (line 1598)
  * __fractunsuhasi:                       Fixed-point fractional library routines.
!                                                              (line 1602)
  * __fractunsuhati:                       Fixed-point fractional library routines.
!                                                              (line 1606)
  * __fractunsuhqdi:                       Fixed-point fractional library routines.
!                                                              (line 1575)
  * __fractunsuhqhi:                       Fixed-point fractional library routines.
!                                                              (line 1573)
  * __fractunsuhqqi:                       Fixed-point fractional library routines.
!                                                              (line 1572)
  * __fractunsuhqsi:                       Fixed-point fractional library routines.
!                                                              (line 1574)
  * __fractunsuhqti:                       Fixed-point fractional library routines.
                                                               (line 1576)
+ * __fractunsuqqdi:                       Fixed-point fractional library routines.
+                                                              (line 1568)
  * __fractunsuqqhi:                       Fixed-point fractional library routines.
!                                                              (line 1564)
  * __fractunsuqqqi:                       Fixed-point fractional library routines.
!                                                              (line 1562)
  * __fractunsuqqsi:                       Fixed-point fractional library routines.
!                                                              (line 1566)
  * __fractunsuqqti:                       Fixed-point fractional library routines.
!                                                              (line 1570)
  * __fractunsusadi:                       Fixed-point fractional library routines.
!                                                              (line 1611)
  * __fractunsusahi:                       Fixed-point fractional library routines.
!                                                              (line 1609)
  * __fractunsusaqi:                       Fixed-point fractional library routines.
!                                                              (line 1608)
  * __fractunsusasi:                       Fixed-point fractional library routines.
!                                                              (line 1610)
  * __fractunsusati:                       Fixed-point fractional library routines.
!                                                              (line 1612)
  * __fractunsusqdi:                       Fixed-point fractional library routines.
!                                                              (line 1584)
  * __fractunsusqhi:                       Fixed-point fractional library routines.
!                                                              (line 1580)
  * __fractunsusqqi:                       Fixed-point fractional library routines.
!                                                              (line 1578)
  * __fractunsusqsi:                       Fixed-point fractional library routines.
!                                                              (line 1582)
  * __fractunsusqti:                       Fixed-point fractional library routines.
!                                                              (line 1586)
  * __fractunsutadi:                       Fixed-point fractional library routines.
!                                                              (line 1630)
  * __fractunsutahi:                       Fixed-point fractional library routines.
!                                                              (line 1626)
  * __fractunsutaqi:                       Fixed-point fractional library routines.
!                                                              (line 1624)
  * __fractunsutasi:                       Fixed-point fractional library routines.
!                                                              (line 1628)
  * __fractunsutati:                       Fixed-point fractional library routines.
!                                                              (line 1632)
  * __fractuqqda:                          Fixed-point fractional library routines.
!                                                              (line  671)
  * __fractuqqdf:                          Fixed-point fractional library routines.
!                                                              (line  694)
  * __fractuqqdi:                          Fixed-point fractional library routines.
!                                                              (line  691)
  * __fractuqqdq:                          Fixed-point fractional library routines.
!                                                              (line  667)
  * __fractuqqha:                          Fixed-point fractional library routines.
!                                                              (line  669)
  * __fractuqqhi:                          Fixed-point fractional library routines.
!                                                              (line  689)
  * __fractuqqhq:                          Fixed-point fractional library routines.
!                                                              (line  665)
  * __fractuqqqi:                          Fixed-point fractional library routines.
!                                                              (line  688)
  * __fractuqqqq:                          Fixed-point fractional library routines.
!                                                              (line  664)
  * __fractuqqsa:                          Fixed-point fractional library routines.
!                                                              (line  670)
  * __fractuqqsf:                          Fixed-point fractional library routines.
!                                                              (line  693)
  * __fractuqqsi:                          Fixed-point fractional library routines.
!                                                              (line  690)
  * __fractuqqsq:                          Fixed-point fractional library routines.
!                                                              (line  666)
  * __fractuqqta:                          Fixed-point fractional library routines.
!                                                              (line  672)
  * __fractuqqti:                          Fixed-point fractional library routines.
                                                               (line  692)
+ * __fractuqquda:                         Fixed-point fractional library routines.
+                                                              (line  684)
  * __fractuqqudq2:                        Fixed-point fractional library routines.
!                                                              (line  678)
  * __fractuqquha:                         Fixed-point fractional library routines.
!                                                              (line  680)
  * __fractuqquhq2:                        Fixed-point fractional library routines.
!                                                              (line  674)
  * __fractuqqusa:                         Fixed-point fractional library routines.
!                                                              (line  682)
  * __fractuqqusq2:                        Fixed-point fractional library routines.
!                                                              (line  676)
  * __fractuqquta:                         Fixed-point fractional library routines.
!                                                              (line  686)
  * __fractusada:                          Fixed-point fractional library routines.
!                                                              (line  828)
  * __fractusadf:                          Fixed-point fractional library routines.
!                                                              (line  849)
  * __fractusadi:                          Fixed-point fractional library routines.
!                                                              (line  846)
  * __fractusadq:                          Fixed-point fractional library routines.
!                                                              (line  825)
  * __fractusaha:                          Fixed-point fractional library routines.
!                                                              (line  826)
  * __fractusahi:                          Fixed-point fractional library routines.
!                                                              (line  844)
  * __fractusahq:                          Fixed-point fractional library routines.
!                                                              (line  823)
  * __fractusaqi:                          Fixed-point fractional library routines.
!                                                              (line  843)
  * __fractusaqq:                          Fixed-point fractional library routines.
!                                                              (line  822)
  * __fractusasa:                          Fixed-point fractional library routines.
!                                                              (line  827)
  * __fractusasf:                          Fixed-point fractional library routines.
!                                                              (line  848)
  * __fractusasi:                          Fixed-point fractional library routines.
!                                                              (line  845)
  * __fractusasq:                          Fixed-point fractional library routines.
!                                                              (line  824)
  * __fractusata:                          Fixed-point fractional library routines.
!                                                              (line  829)
  * __fractusati:                          Fixed-point fractional library routines.
                                                               (line  847)
+ * __fractusauda2:                        Fixed-point fractional library routines.
+                                                              (line  839)
  * __fractusaudq:                         Fixed-point fractional library routines.
!                                                              (line  835)
  * __fractusauha2:                        Fixed-point fractional library routines.
!                                                              (line  837)
  * __fractusauhq:                         Fixed-point fractional library routines.
!                                                              (line  832)
  * __fractusauqq:                         Fixed-point fractional library routines.
!                                                              (line  830)
  * __fractusausq:                         Fixed-point fractional library routines.
!                                                              (line  833)
  * __fractusauta2:                        Fixed-point fractional library routines.
!                                                              (line  841)
  * __fractusqda:                          Fixed-point fractional library routines.
!                                                              (line  730)
  * __fractusqdf:                          Fixed-point fractional library routines.
!                                                              (line  753)
  * __fractusqdi:                          Fixed-point fractional library routines.
!                                                              (line  750)
  * __fractusqdq:                          Fixed-point fractional library routines.
!                                                              (line  726)
  * __fractusqha:                          Fixed-point fractional library routines.
!                                                              (line  728)
  * __fractusqhi:                          Fixed-point fractional library routines.
!                                                              (line  748)
  * __fractusqhq:                          Fixed-point fractional library routines.
!                                                              (line  724)
  * __fractusqqi:                          Fixed-point fractional library routines.
!                                                              (line  747)
  * __fractusqqq:                          Fixed-point fractional library routines.
!                                                              (line  723)
  * __fractusqsa:                          Fixed-point fractional library routines.
!                                                              (line  729)
  * __fractusqsf:                          Fixed-point fractional library routines.
!                                                              (line  752)
  * __fractusqsi:                          Fixed-point fractional library routines.
!                                                              (line  749)
  * __fractusqsq:                          Fixed-point fractional library routines.
!                                                              (line  725)
  * __fractusqta:                          Fixed-point fractional library routines.
!                                                              (line  731)
  * __fractusqti:                          Fixed-point fractional library routines.
                                                               (line  751)
+ * __fractusquda:                         Fixed-point fractional library routines.
+                                                              (line  743)
  * __fractusqudq2:                        Fixed-point fractional library routines.
!                                                              (line  737)
  * __fractusquha:                         Fixed-point fractional library routines.
!                                                              (line  739)
  * __fractusquhq2:                        Fixed-point fractional library routines.
!                                                              (line  735)
  * __fractusquqq2:                        Fixed-point fractional library routines.
!                                                              (line  733)
  * __fractusqusa:                         Fixed-point fractional library routines.
!                                                              (line  741)
  * __fractusquta:                         Fixed-point fractional library routines.
!                                                              (line  745)
  * __fractutada:                          Fixed-point fractional library routines.
!                                                              (line  891)
  * __fractutadf:                          Fixed-point fractional library routines.
!                                                              (line  917)
  * __fractutadi:                          Fixed-point fractional library routines.
!                                                              (line  913)
  * __fractutadq:                          Fixed-point fractional library routines.
!                                                              (line  886)
  * __fractutaha:                          Fixed-point fractional library routines.
!                                                              (line  888)
  * __fractutahi:                          Fixed-point fractional library routines.
!                                                              (line  911)
  * __fractutahq:                          Fixed-point fractional library routines.
!                                                              (line  883)
  * __fractutaqi:                          Fixed-point fractional library routines.
!                                                              (line  909)
  * __fractutaqq:                          Fixed-point fractional library routines.
!                                                              (line  881)
  * __fractutasa:                          Fixed-point fractional library routines.
!                                                              (line  890)
  * __fractutasf:                          Fixed-point fractional library routines.
!                                                              (line  916)
  * __fractutasi:                          Fixed-point fractional library routines.
!                                                              (line  912)
  * __fractutasq:                          Fixed-point fractional library routines.
!                                                              (line  884)
  * __fractutata:                          Fixed-point fractional library routines.
!                                                              (line  893)
  * __fractutati:                          Fixed-point fractional library routines.
!                                                              (line  914)
  * __fractutauda2:                        Fixed-point fractional library routines.
!                                                              (line  907)
  * __fractutaudq:                         Fixed-point fractional library routines.
!                                                              (line  901)
  * __fractutauha2:                        Fixed-point fractional library routines.
!                                                              (line  903)
  * __fractutauhq:                         Fixed-point fractional library routines.
!                                                              (line  897)
  * __fractutauqq:                         Fixed-point fractional library routines.
!                                                              (line  895)
  * __fractutausa2:                        Fixed-point fractional library routines.
!                                                              (line  905)
  * __fractutausq:                         Fixed-point fractional library routines.
!                                                              (line  899)
  * __gedf2:                               Soft float library routines.
                                                               (line  205)
  * __gesf2:                               Soft float library routines.
*************** Concept Index
*** 52573,52593 ****
  * __lshrti3:                             Integer library routines.
                                                               (line   31)
  * __lshruda3:                            Fixed-point fractional library routines.
!                                                              (line  396)
  * __lshrudq3:                            Fixed-point fractional library routines.
!                                                              (line  390)
  * __lshruha3:                            Fixed-point fractional library routines.
!                                                              (line  392)
  * __lshruhq3:                            Fixed-point fractional library routines.
!                                                              (line  386)
  * __lshruqq3:                            Fixed-point fractional library routines.
!                                                              (line  384)
  * __lshrusa3:                            Fixed-point fractional library routines.
!                                                              (line  394)
  * __lshrusq3:                            Fixed-point fractional library routines.
!                                                              (line  388)
  * __lshruta3:                            Fixed-point fractional library routines.
!                                                              (line  398)
  * __ltdf2:                               Soft float library routines.
                                                               (line  211)
  * __ltsf2:                               Soft float library routines.
--- 52573,52593 ----
  * __lshrti3:                             Integer library routines.
                                                               (line   31)
  * __lshruda3:                            Fixed-point fractional library routines.
!                                                              (line  388)
  * __lshrudq3:                            Fixed-point fractional library routines.
!                                                              (line  382)
  * __lshruha3:                            Fixed-point fractional library routines.
!                                                              (line  384)
  * __lshruhq3:                            Fixed-point fractional library routines.
!                                                              (line  378)
  * __lshruqq3:                            Fixed-point fractional library routines.
!                                                              (line  376)
  * __lshrusa3:                            Fixed-point fractional library routines.
!                                                              (line  386)
  * __lshrusq3:                            Fixed-point fractional library routines.
!                                                              (line  380)
  * __lshruta3:                            Fixed-point fractional library routines.
!                                                              (line  390)
  * __ltdf2:                               Soft float library routines.
                                                               (line  211)
  * __ltsf2:                               Soft float library routines.
*************** Concept Index
*** 52608,52614 ****
  * __morestack_segments:                  Miscellaneous routines.
                                                               (line   44)
  * __mulda3:                              Fixed-point fractional library routines.
!                                                              (line  178)
  * __muldc3:                              Soft float library routines.
                                                               (line  239)
  * __muldf3:                              Soft float library routines.
--- 52608,52614 ----
  * __morestack_segments:                  Miscellaneous routines.
                                                               (line   44)
  * __mulda3:                              Fixed-point fractional library routines.
!                                                              (line  170)
  * __muldc3:                              Soft float library routines.
                                                               (line  239)
  * __muldf3:                              Soft float library routines.
*************** Concept Index
*** 52616,52630 ****
  * __muldi3:                              Integer library routines.
                                                               (line   42)
  * __muldq3:                              Fixed-point fractional library routines.
!                                                              (line  165)
  * __mulha3:                              Fixed-point fractional library routines.
!                                                              (line  175)
  * __mulhq3:                              Fixed-point fractional library routines.
!                                                              (line  163)
  * __mulqq3:                              Fixed-point fractional library routines.
!                                                              (line  161)
  * __mulsa3:                              Fixed-point fractional library routines.
!                                                              (line  177)
  * __mulsc3:                              Soft float library routines.
                                                               (line  237)
  * __mulsf3:                              Soft float library routines.
--- 52616,52630 ----
  * __muldi3:                              Integer library routines.
                                                               (line   42)
  * __muldq3:                              Fixed-point fractional library routines.
!                                                              (line  157)
  * __mulha3:                              Fixed-point fractional library routines.
!                                                              (line  167)
  * __mulhq3:                              Fixed-point fractional library routines.
!                                                              (line  155)
  * __mulqq3:                              Fixed-point fractional library routines.
!                                                              (line  153)
  * __mulsa3:                              Fixed-point fractional library routines.
!                                                              (line  169)
  * __mulsc3:                              Soft float library routines.
                                                               (line  237)
  * __mulsf3:                              Soft float library routines.
*************** Concept Index
*** 52632,52640 ****
  * __mulsi3:                              Integer library routines.
                                                               (line   41)
  * __mulsq3:                              Fixed-point fractional library routines.
!                                                              (line  164)
  * __multa3:                              Fixed-point fractional library routines.
!                                                              (line  179)
  * __multc3:                              Soft float library routines.
                                                               (line  241)
  * __multf3:                              Soft float library routines.
--- 52632,52640 ----
  * __mulsi3:                              Integer library routines.
                                                               (line   41)
  * __mulsq3:                              Fixed-point fractional library routines.
!                                                              (line  156)
  * __multa3:                              Fixed-point fractional library routines.
!                                                              (line  171)
  * __multc3:                              Soft float library routines.
                                                               (line  241)
  * __multf3:                              Soft float library routines.
*************** Concept Index
*** 52642,52662 ****
  * __multi3:                              Integer library routines.
                                                               (line   43)
  * __muluda3:                             Fixed-point fractional library routines.
!                                                              (line  185)
  * __muludq3:                             Fixed-point fractional library routines.
!                                                              (line  173)
  * __muluha3:                             Fixed-point fractional library routines.
!                                                              (line  181)
  * __muluhq3:                             Fixed-point fractional library routines.
!                                                              (line  169)
  * __muluqq3:                             Fixed-point fractional library routines.
!                                                              (line  167)
  * __mulusa3:                             Fixed-point fractional library routines.
!                                                              (line  183)
  * __mulusq3:                             Fixed-point fractional library routines.
!                                                              (line  171)
  * __muluta3:                             Fixed-point fractional library routines.
!                                                              (line  187)
  * __mulvdi3:                             Integer library routines.
                                                               (line  114)
  * __mulvsi3:                             Integer library routines.
--- 52642,52662 ----
  * __multi3:                              Integer library routines.
                                                               (line   43)
  * __muluda3:                             Fixed-point fractional library routines.
!                                                              (line  177)
  * __muludq3:                             Fixed-point fractional library routines.
!                                                              (line  165)
  * __muluha3:                             Fixed-point fractional library routines.
!                                                              (line  173)
  * __muluhq3:                             Fixed-point fractional library routines.
!                                                              (line  161)
  * __muluqq3:                             Fixed-point fractional library routines.
!                                                              (line  159)
  * __mulusa3:                             Fixed-point fractional library routines.
!                                                              (line  175)
  * __mulusq3:                             Fixed-point fractional library routines.
!                                                              (line  163)
  * __muluta3:                             Fixed-point fractional library routines.
!                                                              (line  179)
  * __mulvdi3:                             Integer library routines.
                                                               (line  114)
  * __mulvsi3:                             Integer library routines.
*************** Concept Index
*** 52668,52714 ****
  * __nedf2:                               Soft float library routines.
                                                               (line  199)
  * __negda2:                              Fixed-point fractional library routines.
!                                                              (line  306)
  * __negdf2:                              Soft float library routines.
                                                               (line   55)
  * __negdi2:                              Integer library routines.
                                                               (line   46)
  * __negdq2:                              Fixed-point fractional library routines.
!                                                              (line  296)
  * __negha2:                              Fixed-point fractional library routines.
!                                                              (line  304)
  * __neghq2:                              Fixed-point fractional library routines.
!                                                              (line  294)
  * __negqq2:                              Fixed-point fractional library routines.
!                                                              (line  293)
  * __negsa2:                              Fixed-point fractional library routines.
!                                                              (line  305)
  * __negsf2:                              Soft float library routines.
                                                               (line   54)
  * __negsq2:                              Fixed-point fractional library routines.
!                                                              (line  295)
  * __negta2:                              Fixed-point fractional library routines.
!                                                              (line  307)
  * __negtf2:                              Soft float library routines.
                                                               (line   56)
  * __negti2:                              Integer library routines.
                                                               (line   47)
  * __neguda2:                             Fixed-point fractional library routines.
!                                                              (line  311)
  * __negudq2:                             Fixed-point fractional library routines.
!                                                              (line  302)
  * __neguha2:                             Fixed-point fractional library routines.
!                                                              (line  308)
  * __neguhq2:                             Fixed-point fractional library routines.
!                                                              (line  299)
  * __neguqq2:                             Fixed-point fractional library routines.
!                                                              (line  297)
  * __negusa2:                             Fixed-point fractional library routines.
!                                                              (line  310)
  * __negusq2:                             Fixed-point fractional library routines.
!                                                              (line  300)
  * __neguta2:                             Fixed-point fractional library routines.
!                                                              (line  313)
  * __negvdi2:                             Integer library routines.
                                                               (line  118)
  * __negvsi2:                             Integer library routines.
--- 52668,52714 ----
  * __nedf2:                               Soft float library routines.
                                                               (line  199)
  * __negda2:                              Fixed-point fractional library routines.
!                                                              (line  298)
  * __negdf2:                              Soft float library routines.
                                                               (line   55)
  * __negdi2:                              Integer library routines.
                                                               (line   46)
  * __negdq2:                              Fixed-point fractional library routines.
!                                                              (line  288)
  * __negha2:                              Fixed-point fractional library routines.
!                                                              (line  296)
  * __neghq2:                              Fixed-point fractional library routines.
!                                                              (line  286)
  * __negqq2:                              Fixed-point fractional library routines.
!                                                              (line  285)
  * __negsa2:                              Fixed-point fractional library routines.
!                                                              (line  297)
  * __negsf2:                              Soft float library routines.
                                                               (line   54)
  * __negsq2:                              Fixed-point fractional library routines.
!                                                              (line  287)
  * __negta2:                              Fixed-point fractional library routines.
!                                                              (line  299)
  * __negtf2:                              Soft float library routines.
                                                               (line   56)
  * __negti2:                              Integer library routines.
                                                               (line   47)
  * __neguda2:                             Fixed-point fractional library routines.
!                                                              (line  303)
  * __negudq2:                             Fixed-point fractional library routines.
!                                                              (line  294)
  * __neguha2:                             Fixed-point fractional library routines.
!                                                              (line  300)
  * __neguhq2:                             Fixed-point fractional library routines.
!                                                              (line  291)
  * __neguqq2:                             Fixed-point fractional library routines.
!                                                              (line  289)
  * __negusa2:                             Fixed-point fractional library routines.
!                                                              (line  302)
  * __negusq2:                             Fixed-point fractional library routines.
!                                                              (line  292)
  * __neguta2:                             Fixed-point fractional library routines.
!                                                              (line  305)
  * __negvdi2:                             Integer library routines.
                                                               (line  118)
  * __negvsi2:                             Integer library routines.
*************** Concept Index
*** 52740,53742 ****
  * __powixf2:                             Soft float library routines.
                                                               (line  234)
  * __satfractdadq:                        Fixed-point fractional library routines.
!                                                              (line 1160)
  * __satfractdaha2:                       Fixed-point fractional library routines.
!                                                              (line 1161)
  * __satfractdahq:                        Fixed-point fractional library routines.
!                                                              (line 1158)
  * __satfractdaqq:                        Fixed-point fractional library routines.
!                                                              (line 1157)
  * __satfractdasa2:                       Fixed-point fractional library routines.
!                                                              (line 1162)
  * __satfractdasq:                        Fixed-point fractional library routines.
!                                                              (line 1159)
  * __satfractdata2:                       Fixed-point fractional library routines.
!                                                              (line 1163)
  * __satfractdauda:                       Fixed-point fractional library routines.
!                                                              (line 1173)
  * __satfractdaudq:                       Fixed-point fractional library routines.
!                                                              (line 1168)
  * __satfractdauha:                       Fixed-point fractional library routines.
!                                                              (line 1170)
  * __satfractdauhq:                       Fixed-point fractional library routines.
!                                                              (line 1166)
  * __satfractdauqq:                       Fixed-point fractional library routines.
!                                                              (line 1164)
  * __satfractdausa:                       Fixed-point fractional library routines.
!                                                              (line 1172)
  * __satfractdausq:                       Fixed-point fractional library routines.
!                                                              (line 1167)
  * __satfractdauta:                       Fixed-point fractional library routines.
!                                                              (line 1174)
  * __satfractdfda:                        Fixed-point fractional library routines.
!                                                              (line 1513)
  * __satfractdfdq:                        Fixed-point fractional library routines.
!                                                              (line 1510)
  * __satfractdfha:                        Fixed-point fractional library routines.
!                                                              (line 1511)
  * __satfractdfhq:                        Fixed-point fractional library routines.
!                                                              (line 1508)
  * __satfractdfqq:                        Fixed-point fractional library routines.
!                                                              (line 1507)
  * __satfractdfsa:                        Fixed-point fractional library routines.
!                                                              (line 1512)
  * __satfractdfsq:                        Fixed-point fractional library routines.
!                                                              (line 1509)
  * __satfractdfta:                        Fixed-point fractional library routines.
!                                                              (line 1514)
  * __satfractdfuda:                       Fixed-point fractional library routines.
!                                                              (line 1522)
  * __satfractdfudq:                       Fixed-point fractional library routines.
!                                                              (line 1518)
  * __satfractdfuha:                       Fixed-point fractional library routines.
!                                                              (line 1520)
  * __satfractdfuhq:                       Fixed-point fractional library routines.
!                                                              (line 1516)
  * __satfractdfuqq:                       Fixed-point fractional library routines.
!                                                              (line 1515)
  * __satfractdfusa:                       Fixed-point fractional library routines.
!                                                              (line 1521)
  * __satfractdfusq:                       Fixed-point fractional library routines.
!                                                              (line 1517)
  * __satfractdfuta:                       Fixed-point fractional library routines.
!                                                              (line 1523)
  * __satfractdida:                        Fixed-point fractional library routines.
!                                                              (line 1463)
  * __satfractdidq:                        Fixed-point fractional library routines.
!                                                              (line 1460)
  * __satfractdiha:                        Fixed-point fractional library routines.
!                                                              (line 1461)
  * __satfractdihq:                        Fixed-point fractional library routines.
!                                                              (line 1458)
  * __satfractdiqq:                        Fixed-point fractional library routines.
!                                                              (line 1457)
  * __satfractdisa:                        Fixed-point fractional library routines.
!                                                              (line 1462)
  * __satfractdisq:                        Fixed-point fractional library routines.
!                                                              (line 1459)
  * __satfractdita:                        Fixed-point fractional library routines.
!                                                              (line 1464)
  * __satfractdiuda:                       Fixed-point fractional library routines.
!                                                              (line 1471)
  * __satfractdiudq:                       Fixed-point fractional library routines.
!                                                              (line 1468)
  * __satfractdiuha:                       Fixed-point fractional library routines.
!                                                              (line 1469)
  * __satfractdiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1466)
  * __satfractdiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1465)
  * __satfractdiusa:                       Fixed-point fractional library routines.
!                                                              (line 1470)
  * __satfractdiusq:                       Fixed-point fractional library routines.
!                                                              (line 1467)
  * __satfractdiuta:                       Fixed-point fractional library routines.
!                                                              (line 1472)
  * __satfractdqda:                        Fixed-point fractional library routines.
!                                                              (line 1105)
  * __satfractdqha:                        Fixed-point fractional library routines.
!                                                              (line 1103)
  * __satfractdqhq2:                       Fixed-point fractional library routines.
!                                                              (line 1101)
  * __satfractdqqq2:                       Fixed-point fractional library routines.
!                                                              (line 1100)
  * __satfractdqsa:                        Fixed-point fractional library routines.
!                                                              (line 1104)
  * __satfractdqsq2:                       Fixed-point fractional library routines.
!                                                              (line 1102)
  * __satfractdqta:                        Fixed-point fractional library routines.
!                                                              (line 1106)
  * __satfractdquda:                       Fixed-point fractional library routines.
!                                                              (line 1117)
  * __satfractdqudq:                       Fixed-point fractional library routines.
!                                                              (line 1112)
  * __satfractdquha:                       Fixed-point fractional library routines.
!                                                              (line 1114)
  * __satfractdquhq:                       Fixed-point fractional library routines.
!                                                              (line 1109)
  * __satfractdquqq:                       Fixed-point fractional library routines.
!                                                              (line 1107)
  * __satfractdqusa:                       Fixed-point fractional library routines.
!                                                              (line 1116)
  * __satfractdqusq:                       Fixed-point fractional library routines.
!                                                              (line 1110)
  * __satfractdquta:                       Fixed-point fractional library routines.
!                                                              (line 1119)
  * __satfracthada2:                       Fixed-point fractional library routines.
!                                                              (line 1126)
  * __satfracthadq:                        Fixed-point fractional library routines.
!                                                              (line 1124)
  * __satfracthahq:                        Fixed-point fractional library routines.
!                                                              (line 1122)
  * __satfracthaqq:                        Fixed-point fractional library routines.
!                                                              (line 1121)
  * __satfracthasa2:                       Fixed-point fractional library routines.
!                                                              (line 1125)
  * __satfracthasq:                        Fixed-point fractional library routines.
!                                                              (line 1123)
  * __satfracthata2:                       Fixed-point fractional library routines.
!                                                              (line 1127)
  * __satfracthauda:                       Fixed-point fractional library routines.
!                                                              (line 1138)
  * __satfracthaudq:                       Fixed-point fractional library routines.
!                                                              (line 1133)
  * __satfracthauha:                       Fixed-point fractional library routines.
!                                                              (line 1135)
  * __satfracthauhq:                       Fixed-point fractional library routines.
!                                                              (line 1130)
  * __satfracthauqq:                       Fixed-point fractional library routines.
!                                                              (line 1128)
  * __satfracthausa:                       Fixed-point fractional library routines.
!                                                              (line 1137)
  * __satfracthausq:                       Fixed-point fractional library routines.
!                                                              (line 1131)
  * __satfracthauta:                       Fixed-point fractional library routines.
!                                                              (line 1140)
  * __satfracthida:                        Fixed-point fractional library routines.
!                                                              (line 1431)
  * __satfracthidq:                        Fixed-point fractional library routines.
!                                                              (line 1428)
  * __satfracthiha:                        Fixed-point fractional library routines.
!                                                              (line 1429)
  * __satfracthihq:                        Fixed-point fractional library routines.
!                                                              (line 1426)
  * __satfracthiqq:                        Fixed-point fractional library routines.
!                                                              (line 1425)
  * __satfracthisa:                        Fixed-point fractional library routines.
!                                                              (line 1430)
  * __satfracthisq:                        Fixed-point fractional library routines.
!                                                              (line 1427)
  * __satfracthita:                        Fixed-point fractional library routines.
!                                                              (line 1432)
  * __satfracthiuda:                       Fixed-point fractional library routines.
!                                                              (line 1439)
  * __satfracthiudq:                       Fixed-point fractional library routines.
!                                                              (line 1436)
  * __satfracthiuha:                       Fixed-point fractional library routines.
!                                                              (line 1437)
  * __satfracthiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1434)
  * __satfracthiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1433)
  * __satfracthiusa:                       Fixed-point fractional library routines.
!                                                              (line 1438)
  * __satfracthiusq:                       Fixed-point fractional library routines.
!                                                              (line 1435)
  * __satfracthiuta:                       Fixed-point fractional library routines.
!                                                              (line 1440)
  * __satfracthqda:                        Fixed-point fractional library routines.
!                                                              (line 1071)
  * __satfracthqdq2:                       Fixed-point fractional library routines.
!                                                              (line 1068)
  * __satfracthqha:                        Fixed-point fractional library routines.
!                                                              (line 1069)
  * __satfracthqqq2:                       Fixed-point fractional library routines.
!                                                              (line 1066)
  * __satfracthqsa:                        Fixed-point fractional library routines.
!                                                              (line 1070)
  * __satfracthqsq2:                       Fixed-point fractional library routines.
!                                                              (line 1067)
  * __satfracthqta:                        Fixed-point fractional library routines.
!                                                              (line 1072)
  * __satfracthquda:                       Fixed-point fractional library routines.
!                                                              (line 1079)
  * __satfracthqudq:                       Fixed-point fractional library routines.
!                                                              (line 1076)
  * __satfracthquha:                       Fixed-point fractional library routines.
!                                                              (line 1077)
  * __satfracthquhq:                       Fixed-point fractional library routines.
!                                                              (line 1074)
  * __satfracthquqq:                       Fixed-point fractional library routines.
!                                                              (line 1073)
  * __satfracthqusa:                       Fixed-point fractional library routines.
!                                                              (line 1078)
  * __satfracthqusq:                       Fixed-point fractional library routines.
!                                                              (line 1075)
  * __satfracthquta:                       Fixed-point fractional library routines.
!                                                              (line 1080)
  * __satfractqida:                        Fixed-point fractional library routines.
!                                                              (line 1409)
  * __satfractqidq:                        Fixed-point fractional library routines.
!                                                              (line 1406)
  * __satfractqiha:                        Fixed-point fractional library routines.
!                                                              (line 1407)
  * __satfractqihq:                        Fixed-point fractional library routines.
!                                                              (line 1404)
  * __satfractqiqq:                        Fixed-point fractional library routines.
!                                                              (line 1403)
  * __satfractqisa:                        Fixed-point fractional library routines.
!                                                              (line 1408)
  * __satfractqisq:                        Fixed-point fractional library routines.
!                                                              (line 1405)
  * __satfractqita:                        Fixed-point fractional library routines.
!                                                              (line 1410)
  * __satfractqiuda:                       Fixed-point fractional library routines.
!                                                              (line 1421)
  * __satfractqiudq:                       Fixed-point fractional library routines.
!                                                              (line 1416)
  * __satfractqiuha:                       Fixed-point fractional library routines.
!                                                              (line 1418)
  * __satfractqiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1413)
  * __satfractqiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1411)
  * __satfractqiusa:                       Fixed-point fractional library routines.
!                                                              (line 1420)
  * __satfractqiusq:                       Fixed-point fractional library routines.
!                                                              (line 1414)
  * __satfractqiuta:                       Fixed-point fractional library routines.
!                                                              (line 1423)
  * __satfractqqda:                        Fixed-point fractional library routines.
!                                                              (line 1050)
  * __satfractqqdq2:                       Fixed-point fractional library routines.
!                                                              (line 1047)
  * __satfractqqha:                        Fixed-point fractional library routines.
!                                                              (line 1048)
  * __satfractqqhq2:                       Fixed-point fractional library routines.
!                                                              (line 1045)
  * __satfractqqsa:                        Fixed-point fractional library routines.
!                                                              (line 1049)
  * __satfractqqsq2:                       Fixed-point fractional library routines.
!                                                              (line 1046)
  * __satfractqqta:                        Fixed-point fractional library routines.
!                                                              (line 1051)
  * __satfractqquda:                       Fixed-point fractional library routines.
!                                                              (line 1062)
  * __satfractqqudq:                       Fixed-point fractional library routines.
!                                                              (line 1057)
  * __satfractqquha:                       Fixed-point fractional library routines.
!                                                              (line 1059)
  * __satfractqquhq:                       Fixed-point fractional library routines.
!                                                              (line 1054)
  * __satfractqquqq:                       Fixed-point fractional library routines.
!                                                              (line 1052)
  * __satfractqqusa:                       Fixed-point fractional library routines.
!                                                              (line 1061)
  * __satfractqqusq:                       Fixed-point fractional library routines.
!                                                              (line 1055)
  * __satfractqquta:                       Fixed-point fractional library routines.
!                                                              (line 1064)
  * __satfractsada2:                       Fixed-point fractional library routines.
!                                                              (line 1147)
  * __satfractsadq:                        Fixed-point fractional library routines.
!                                                              (line 1145)
  * __satfractsaha2:                       Fixed-point fractional library routines.
!                                                              (line 1146)
  * __satfractsahq:                        Fixed-point fractional library routines.
!                                                              (line 1143)
  * __satfractsaqq:                        Fixed-point fractional library routines.
!                                                              (line 1142)
  * __satfractsasq:                        Fixed-point fractional library routines.
!                                                              (line 1144)
  * __satfractsata2:                       Fixed-point fractional library routines.
!                                                              (line 1148)
  * __satfractsauda:                       Fixed-point fractional library routines.
!                                                              (line 1155)
  * __satfractsaudq:                       Fixed-point fractional library routines.
!                                                              (line 1152)
  * __satfractsauha:                       Fixed-point fractional library routines.
!                                                              (line 1153)
  * __satfractsauhq:                       Fixed-point fractional library routines.
!                                                              (line 1150)
  * __satfractsauqq:                       Fixed-point fractional library routines.
!                                                              (line 1149)
  * __satfractsausa:                       Fixed-point fractional library routines.
!                                                              (line 1154)
  * __satfractsausq:                       Fixed-point fractional library routines.
!                                                              (line 1151)
  * __satfractsauta:                       Fixed-point fractional library routines.
!                                                              (line 1156)
  * __satfractsfda:                        Fixed-point fractional library routines.
!                                                              (line 1497)
  * __satfractsfdq:                        Fixed-point fractional library routines.
!                                                              (line 1494)
  * __satfractsfha:                        Fixed-point fractional library routines.
!                                                              (line 1495)
  * __satfractsfhq:                        Fixed-point fractional library routines.
!                                                              (line 1492)
  * __satfractsfqq:                        Fixed-point fractional library routines.
!                                                              (line 1491)
  * __satfractsfsa:                        Fixed-point fractional library routines.
!                                                              (line 1496)
  * __satfractsfsq:                        Fixed-point fractional library routines.
!                                                              (line 1493)
  * __satfractsfta:                        Fixed-point fractional library routines.
!                                                              (line 1498)
  * __satfractsfuda:                       Fixed-point fractional library routines.
!                                                              (line 1505)
  * __satfractsfudq:                       Fixed-point fractional library routines.
!                                                              (line 1502)
  * __satfractsfuha:                       Fixed-point fractional library routines.
!                                                              (line 1503)
  * __satfractsfuhq:                       Fixed-point fractional library routines.
!                                                              (line 1500)
  * __satfractsfuqq:                       Fixed-point fractional library routines.
!                                                              (line 1499)
  * __satfractsfusa:                       Fixed-point fractional library routines.
!                                                              (line 1504)
  * __satfractsfusq:                       Fixed-point fractional library routines.
!                                                              (line 1501)
  * __satfractsfuta:                       Fixed-point fractional library routines.
!                                                              (line 1506)
  * __satfractsida:                        Fixed-point fractional library routines.
!                                                              (line 1447)
  * __satfractsidq:                        Fixed-point fractional library routines.
!                                                              (line 1444)
  * __satfractsiha:                        Fixed-point fractional library routines.
!                                                              (line 1445)
  * __satfractsihq:                        Fixed-point fractional library routines.
!                                                              (line 1442)
  * __satfractsiqq:                        Fixed-point fractional library routines.
!                                                              (line 1441)
  * __satfractsisa:                        Fixed-point fractional library routines.
!                                                              (line 1446)
  * __satfractsisq:                        Fixed-point fractional library routines.
!                                                              (line 1443)
  * __satfractsita:                        Fixed-point fractional library routines.
!                                                              (line 1448)
  * __satfractsiuda:                       Fixed-point fractional library routines.
!                                                              (line 1455)
  * __satfractsiudq:                       Fixed-point fractional library routines.
!                                                              (line 1452)
  * __satfractsiuha:                       Fixed-point fractional library routines.
!                                                              (line 1453)
  * __satfractsiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1450)
  * __satfractsiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1449)
  * __satfractsiusa:                       Fixed-point fractional library routines.
!                                                              (line 1454)
  * __satfractsiusq:                       Fixed-point fractional library routines.
!                                                              (line 1451)
  * __satfractsiuta:                       Fixed-point fractional library routines.
!                                                              (line 1456)
  * __satfractsqda:                        Fixed-point fractional library routines.
!                                                              (line 1086)
  * __satfractsqdq2:                       Fixed-point fractional library routines.
!                                                              (line 1083)
  * __satfractsqha:                        Fixed-point fractional library routines.
!                                                              (line 1084)
  * __satfractsqhq2:                       Fixed-point fractional library routines.
!                                                              (line 1082)
  * __satfractsqqq2:                       Fixed-point fractional library routines.
!                                                              (line 1081)
  * __satfractsqsa:                        Fixed-point fractional library routines.
!                                                              (line 1085)
  * __satfractsqta:                        Fixed-point fractional library routines.
!                                                              (line 1087)
  * __satfractsquda:                       Fixed-point fractional library routines.
!                                                              (line 1097)
  * __satfractsqudq:                       Fixed-point fractional library routines.
!                                                              (line 1092)
  * __satfractsquha:                       Fixed-point fractional library routines.
!                                                              (line 1094)
  * __satfractsquhq:                       Fixed-point fractional library routines.
!                                                              (line 1090)
  * __satfractsquqq:                       Fixed-point fractional library routines.
!                                                              (line 1088)
  * __satfractsqusa:                       Fixed-point fractional library routines.
!                                                              (line 1096)
  * __satfractsqusq:                       Fixed-point fractional library routines.
!                                                              (line 1091)
  * __satfractsquta:                       Fixed-point fractional library routines.
!                                                              (line 1098)
  * __satfracttada2:                       Fixed-point fractional library routines.
!                                                              (line 1182)
  * __satfracttadq:                        Fixed-point fractional library routines.
!                                                              (line 1179)
  * __satfracttaha2:                       Fixed-point fractional library routines.
!                                                              (line 1180)
  * __satfracttahq:                        Fixed-point fractional library routines.
!                                                              (line 1177)
  * __satfracttaqq:                        Fixed-point fractional library routines.
!                                                              (line 1176)
  * __satfracttasa2:                       Fixed-point fractional library routines.
!                                                              (line 1181)
  * __satfracttasq:                        Fixed-point fractional library routines.
!                                                              (line 1178)
  * __satfracttauda:                       Fixed-point fractional library routines.
!                                                              (line 1193)
  * __satfracttaudq:                       Fixed-point fractional library routines.
!                                                              (line 1188)
  * __satfracttauha:                       Fixed-point fractional library routines.
!                                                              (line 1190)
  * __satfracttauhq:                       Fixed-point fractional library routines.
!                                                              (line 1185)
  * __satfracttauqq:                       Fixed-point fractional library routines.
!                                                              (line 1183)
  * __satfracttausa:                       Fixed-point fractional library routines.
!                                                              (line 1192)
  * __satfracttausq:                       Fixed-point fractional library routines.
!                                                              (line 1186)
  * __satfracttauta:                       Fixed-point fractional library routines.
!                                                              (line 1195)
  * __satfracttida:                        Fixed-point fractional library routines.
!                                                              (line 1479)
  * __satfracttidq:                        Fixed-point fractional library routines.
!                                                              (line 1476)
  * __satfracttiha:                        Fixed-point fractional library routines.
!                                                              (line 1477)
  * __satfracttihq:                        Fixed-point fractional library routines.
!                                                              (line 1474)
  * __satfracttiqq:                        Fixed-point fractional library routines.
!                                                              (line 1473)
  * __satfracttisa:                        Fixed-point fractional library routines.
!                                                              (line 1478)
  * __satfracttisq:                        Fixed-point fractional library routines.
!                                                              (line 1475)
  * __satfracttita:                        Fixed-point fractional library routines.
!                                                              (line 1480)
  * __satfracttiuda:                       Fixed-point fractional library routines.
!                                                              (line 1488)
  * __satfracttiudq:                       Fixed-point fractional library routines.
!                                                              (line 1484)
  * __satfracttiuha:                       Fixed-point fractional library routines.
!                                                              (line 1486)
  * __satfracttiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1482)
  * __satfracttiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1481)
  * __satfracttiusa:                       Fixed-point fractional library routines.
!                                                              (line 1487)
  * __satfracttiusq:                       Fixed-point fractional library routines.
!                                                              (line 1483)
  * __satfracttiuta:                       Fixed-point fractional library routines.
!                                                              (line 1489)
  * __satfractudada:                       Fixed-point fractional library routines.
!                                                              (line 1358)
  * __satfractudadq:                       Fixed-point fractional library routines.
!                                                              (line 1353)
  * __satfractudaha:                       Fixed-point fractional library routines.
!                                                              (line 1355)
  * __satfractudahq:                       Fixed-point fractional library routines.
!                                                              (line 1351)
  * __satfractudaqq:                       Fixed-point fractional library routines.
!                                                              (line 1349)
  * __satfractudasa:                       Fixed-point fractional library routines.
!                                                              (line 1357)
  * __satfractudasq:                       Fixed-point fractional library routines.
!                                                              (line 1352)
  * __satfractudata:                       Fixed-point fractional library routines.
!                                                              (line 1359)
  * __satfractudaudq:                      Fixed-point fractional library routines.
!                                                              (line 1367)
  * __satfractudauha2:                     Fixed-point fractional library routines.
!                                                              (line 1369)
  * __satfractudauhq:                      Fixed-point fractional library routines.
!                                                              (line 1363)
  * __satfractudauqq:                      Fixed-point fractional library routines.
!                                                              (line 1361)
  * __satfractudausa2:                     Fixed-point fractional library routines.
!                                                              (line 1371)
  * __satfractudausq:                      Fixed-point fractional library routines.
!                                                              (line 1365)
  * __satfractudauta2:                     Fixed-point fractional library routines.
!                                                              (line 1373)
  * __satfractudqda:                       Fixed-point fractional library routines.
!                                                              (line 1282)
  * __satfractudqdq:                       Fixed-point fractional library routines.
!                                                              (line 1277)
  * __satfractudqha:                       Fixed-point fractional library routines.
!                                                              (line 1279)
  * __satfractudqhq:                       Fixed-point fractional library routines.
!                                                              (line 1274)
  * __satfractudqqq:                       Fixed-point fractional library routines.
!                                                              (line 1272)
  * __satfractudqsa:                       Fixed-point fractional library routines.
!                                                              (line 1281)
  * __satfractudqsq:                       Fixed-point fractional library routines.
!                                                              (line 1275)
  * __satfractudqta:                       Fixed-point fractional library routines.
!                                                              (line 1284)
  * __satfractudquda:                      Fixed-point fractional library routines.
!                                                              (line 1296)
  * __satfractudquha:                      Fixed-point fractional library routines.
!                                                              (line 1292)
  * __satfractudquhq2:                     Fixed-point fractional library routines.
!                                                              (line 1288)
  * __satfractudquqq2:                     Fixed-point fractional library routines.
!                                                              (line 1286)
  * __satfractudqusa:                      Fixed-point fractional library routines.
!                                                              (line 1294)
  * __satfractudqusq2:                     Fixed-point fractional library routines.
!                                                              (line 1290)
  * __satfractudquta:                      Fixed-point fractional library routines.
!                                                              (line 1298)
  * __satfractuhada:                       Fixed-point fractional library routines.
!                                                              (line 1310)
  * __satfractuhadq:                       Fixed-point fractional library routines.
!                                                              (line 1305)
  * __satfractuhaha:                       Fixed-point fractional library routines.
!                                                              (line 1307)
  * __satfractuhahq:                       Fixed-point fractional library routines.
!                                                              (line 1302)
  * __satfractuhaqq:                       Fixed-point fractional library routines.
!                                                              (line 1300)
  * __satfractuhasa:                       Fixed-point fractional library routines.
!                                                              (line 1309)
  * __satfractuhasq:                       Fixed-point fractional library routines.
!                                                              (line 1303)
  * __satfractuhata:                       Fixed-point fractional library routines.
!                                                              (line 1312)
  * __satfractuhauda2:                     Fixed-point fractional library routines.
!                                                              (line 1324)
  * __satfractuhaudq:                      Fixed-point fractional library routines.
!                                                              (line 1320)
  * __satfractuhauhq:                      Fixed-point fractional library routines.
!                                                              (line 1316)
  * __satfractuhauqq:                      Fixed-point fractional library routines.
!                                                              (line 1314)
  * __satfractuhausa2:                     Fixed-point fractional library routines.
!                                                              (line 1322)
  * __satfractuhausq:                      Fixed-point fractional library routines.
!                                                              (line 1318)
  * __satfractuhauta2:                     Fixed-point fractional library routines.
!                                                              (line 1326)
  * __satfractuhqda:                       Fixed-point fractional library routines.
!                                                              (line 1231)
  * __satfractuhqdq:                       Fixed-point fractional library routines.
!                                                              (line 1228)
  * __satfractuhqha:                       Fixed-point fractional library routines.
!                                                              (line 1229)
  * __satfractuhqhq:                       Fixed-point fractional library routines.
!                                                              (line 1226)
  * __satfractuhqqq:                       Fixed-point fractional library routines.
!                                                              (line 1225)
  * __satfractuhqsa:                       Fixed-point fractional library routines.
!                                                              (line 1230)
  * __satfractuhqsq:                       Fixed-point fractional library routines.
!                                                              (line 1227)
  * __satfractuhqta:                       Fixed-point fractional library routines.
!                                                              (line 1232)
  * __satfractuhquda:                      Fixed-point fractional library routines.
!                                                              (line 1242)
  * __satfractuhqudq2:                     Fixed-point fractional library routines.
!                                                              (line 1237)
  * __satfractuhquha:                      Fixed-point fractional library routines.
!                                                              (line 1239)
  * __satfractuhquqq2:                     Fixed-point fractional library routines.
!                                                              (line 1233)
  * __satfractuhqusa:                      Fixed-point fractional library routines.
!                                                              (line 1241)
  * __satfractuhqusq2:                     Fixed-point fractional library routines.
!                                                              (line 1235)
  * __satfractuhquta:                      Fixed-point fractional library routines.
!                                                              (line 1244)
  * __satfractunsdida:                     Fixed-point fractional library routines.
!                                                              (line 1841)
  * __satfractunsdidq:                     Fixed-point fractional library routines.
!                                                              (line 1837)
  * __satfractunsdiha:                     Fixed-point fractional library routines.
!                                                              (line 1839)
  * __satfractunsdihq:                     Fixed-point fractional library routines.
!                                                              (line 1835)
  * __satfractunsdiqq:                     Fixed-point fractional library routines.
!                                                              (line 1834)
  * __satfractunsdisa:                     Fixed-point fractional library routines.
!                                                              (line 1840)
  * __satfractunsdisq:                     Fixed-point fractional library routines.
!                                                              (line 1836)
  * __satfractunsdita:                     Fixed-point fractional library routines.
!                                                              (line 1842)
  * __satfractunsdiuda:                    Fixed-point fractional library routines.
!                                                              (line 1856)
  * __satfractunsdiudq:                    Fixed-point fractional library routines.
!                                                              (line 1850)
  * __satfractunsdiuha:                    Fixed-point fractional library routines.
!                                                              (line 1852)
  * __satfractunsdiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1846)
  * __satfractunsdiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1844)
  * __satfractunsdiusa:                    Fixed-point fractional library routines.
!                                                              (line 1854)
  * __satfractunsdiusq:                    Fixed-point fractional library routines.
!                                                              (line 1848)
  * __satfractunsdiuta:                    Fixed-point fractional library routines.
!                                                              (line 1858)
  * __satfractunshida:                     Fixed-point fractional library routines.
!                                                              (line 1793)
  * __satfractunshidq:                     Fixed-point fractional library routines.
!                                                              (line 1789)
  * __satfractunshiha:                     Fixed-point fractional library routines.
!                                                              (line 1791)
  * __satfractunshihq:                     Fixed-point fractional library routines.
!                                                              (line 1787)
  * __satfractunshiqq:                     Fixed-point fractional library routines.
!                                                              (line 1786)
  * __satfractunshisa:                     Fixed-point fractional library routines.
!                                                              (line 1792)
  * __satfractunshisq:                     Fixed-point fractional library routines.
!                                                              (line 1788)
  * __satfractunshita:                     Fixed-point fractional library routines.
!                                                              (line 1794)
  * __satfractunshiuda:                    Fixed-point fractional library routines.
!                                                              (line 1808)
  * __satfractunshiudq:                    Fixed-point fractional library routines.
!                                                              (line 1802)
  * __satfractunshiuha:                    Fixed-point fractional library routines.
!                                                              (line 1804)
  * __satfractunshiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1798)
  * __satfractunshiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1796)
  * __satfractunshiusa:                    Fixed-point fractional library routines.
!                                                              (line 1806)
  * __satfractunshiusq:                    Fixed-point fractional library routines.
!                                                              (line 1800)
  * __satfractunshiuta:                    Fixed-point fractional library routines.
!                                                              (line 1810)
  * __satfractunsqida:                     Fixed-point fractional library routines.
!                                                              (line 1767)
  * __satfractunsqidq:                     Fixed-point fractional library routines.
!                                                              (line 1763)
  * __satfractunsqiha:                     Fixed-point fractional library routines.
!                                                              (line 1765)
  * __satfractunsqihq:                     Fixed-point fractional library routines.
!                                                              (line 1761)
  * __satfractunsqiqq:                     Fixed-point fractional library routines.
!                                                              (line 1760)
  * __satfractunsqisa:                     Fixed-point fractional library routines.
!                                                              (line 1766)
  * __satfractunsqisq:                     Fixed-point fractional library routines.
!                                                              (line 1762)
  * __satfractunsqita:                     Fixed-point fractional library routines.
!                                                              (line 1768)
  * __satfractunsqiuda:                    Fixed-point fractional library routines.
!                                                              (line 1782)
  * __satfractunsqiudq:                    Fixed-point fractional library routines.
!                                                              (line 1776)
  * __satfractunsqiuha:                    Fixed-point fractional library routines.
!                                                              (line 1778)
  * __satfractunsqiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1772)
  * __satfractunsqiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1770)
  * __satfractunsqiusa:                    Fixed-point fractional library routines.
!                                                              (line 1780)
  * __satfractunsqiusq:                    Fixed-point fractional library routines.
!                                                              (line 1774)
  * __satfractunsqiuta:                    Fixed-point fractional library routines.
!                                                              (line 1784)
  * __satfractunssida:                     Fixed-point fractional library routines.
!                                                              (line 1818)
  * __satfractunssidq:                     Fixed-point fractional library routines.
!                                                              (line 1815)
  * __satfractunssiha:                     Fixed-point fractional library routines.
!                                                              (line 1816)
  * __satfractunssihq:                     Fixed-point fractional library routines.
!                                                              (line 1813)
  * __satfractunssiqq:                     Fixed-point fractional library routines.
!                                                              (line 1812)
  * __satfractunssisa:                     Fixed-point fractional library routines.
!                                                              (line 1817)
  * __satfractunssisq:                     Fixed-point fractional library routines.
!                                                              (line 1814)
  * __satfractunssita:                     Fixed-point fractional library routines.
!                                                              (line 1819)
  * __satfractunssiuda:                    Fixed-point fractional library routines.
!                                                              (line 1830)
  * __satfractunssiudq:                    Fixed-point fractional library routines.
!                                                              (line 1825)
  * __satfractunssiuha:                    Fixed-point fractional library routines.
!                                                              (line 1827)
  * __satfractunssiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1822)
  * __satfractunssiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1820)
  * __satfractunssiusa:                    Fixed-point fractional library routines.
!                                                              (line 1829)
  * __satfractunssiusq:                    Fixed-point fractional library routines.
!                                                              (line 1823)
  * __satfractunssiuta:                    Fixed-point fractional library routines.
!                                                              (line 1832)
  * __satfractunstida:                     Fixed-point fractional library routines.
!                                                              (line 1870)
  * __satfractunstidq:                     Fixed-point fractional library routines.
!                                                              (line 1865)
  * __satfractunstiha:                     Fixed-point fractional library routines.
!                                                              (line 1867)
  * __satfractunstihq:                     Fixed-point fractional library routines.
!                                                              (line 1862)
  * __satfractunstiqq:                     Fixed-point fractional library routines.
!                                                              (line 1860)
  * __satfractunstisa:                     Fixed-point fractional library routines.
!                                                              (line 1869)
  * __satfractunstisq:                     Fixed-point fractional library routines.
!                                                              (line 1863)
  * __satfractunstita:                     Fixed-point fractional library routines.
!                                                              (line 1872)
  * __satfractunstiuda:                    Fixed-point fractional library routines.
!                                                              (line 1886)
  * __satfractunstiudq:                    Fixed-point fractional library routines.
!                                                              (line 1880)
  * __satfractunstiuha:                    Fixed-point fractional library routines.
!                                                              (line 1882)
  * __satfractunstiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1876)
  * __satfractunstiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1874)
  * __satfractunstiusa:                    Fixed-point fractional library routines.
!                                                              (line 1884)
  * __satfractunstiusq:                    Fixed-point fractional library routines.
!                                                              (line 1878)
  * __satfractunstiuta:                    Fixed-point fractional library routines.
!                                                              (line 1888)
  * __satfractuqqda:                       Fixed-point fractional library routines.
!                                                              (line 1207)
  * __satfractuqqdq:                       Fixed-point fractional library routines.
!                                                              (line 1202)
  * __satfractuqqha:                       Fixed-point fractional library routines.
!                                                              (line 1204)
  * __satfractuqqhq:                       Fixed-point fractional library routines.
!                                                              (line 1199)
  * __satfractuqqqq:                       Fixed-point fractional library routines.
!                                                              (line 1197)
  * __satfractuqqsa:                       Fixed-point fractional library routines.
!                                                              (line 1206)
  * __satfractuqqsq:                       Fixed-point fractional library routines.
!                                                              (line 1200)
  * __satfractuqqta:                       Fixed-point fractional library routines.
!                                                              (line 1209)
  * __satfractuqquda:                      Fixed-point fractional library routines.
!                                                              (line 1221)
  * __satfractuqqudq2:                     Fixed-point fractional library routines.
!                                                              (line 1215)
  * __satfractuqquha:                      Fixed-point fractional library routines.
!                                                              (line 1217)
  * __satfractuqquhq2:                     Fixed-point fractional library routines.
!                                                              (line 1211)
  * __satfractuqqusa:                      Fixed-point fractional library routines.
!                                                              (line 1219)
  * __satfractuqqusq2:                     Fixed-point fractional library routines.
!                                                              (line 1213)
  * __satfractuqquta:                      Fixed-point fractional library routines.
!                                                              (line 1223)
  * __satfractusada:                       Fixed-point fractional library routines.
!                                                              (line 1334)
  * __satfractusadq:                       Fixed-point fractional library routines.
!                                                              (line 1331)
  * __satfractusaha:                       Fixed-point fractional library routines.
!                                                              (line 1332)
  * __satfractusahq:                       Fixed-point fractional library routines.
!                                                              (line 1329)
  * __satfractusaqq:                       Fixed-point fractional library routines.
!                                                              (line 1328)
  * __satfractusasa:                       Fixed-point fractional library routines.
!                                                              (line 1333)
  * __satfractusasq:                       Fixed-point fractional library routines.
!                                                              (line 1330)
  * __satfractusata:                       Fixed-point fractional library routines.
!                                                              (line 1335)
  * __satfractusauda2:                     Fixed-point fractional library routines.
!                                                              (line 1345)
  * __satfractusaudq:                      Fixed-point fractional library routines.
!                                                              (line 1341)
  * __satfractusauha2:                     Fixed-point fractional library routines.
!                                                              (line 1343)
  * __satfractusauhq:                      Fixed-point fractional library routines.
!                                                              (line 1338)
  * __satfractusauqq:                      Fixed-point fractional library routines.
!                                                              (line 1336)
  * __satfractusausq:                      Fixed-point fractional library routines.
!                                                              (line 1339)
  * __satfractusauta2:                     Fixed-point fractional library routines.
!                                                              (line 1347)
  * __satfractusqda:                       Fixed-point fractional library routines.
!                                                              (line 1255)
  * __satfractusqdq:                       Fixed-point fractional library routines.
!                                                              (line 1250)
  * __satfractusqha:                       Fixed-point fractional library routines.
!                                                              (line 1252)
  * __satfractusqhq:                       Fixed-point fractional library routines.
!                                                              (line 1248)
  * __satfractusqqq:                       Fixed-point fractional library routines.
!                                                              (line 1246)
  * __satfractusqsa:                       Fixed-point fractional library routines.
!                                                              (line 1254)
  * __satfractusqsq:                       Fixed-point fractional library routines.
!                                                              (line 1249)
  * __satfractusqta:                       Fixed-point fractional library routines.
!                                                              (line 1256)
  * __satfractusquda:                      Fixed-point fractional library routines.
!                                                              (line 1268)
  * __satfractusqudq2:                     Fixed-point fractional library routines.
!                                                              (line 1262)
  * __satfractusquha:                      Fixed-point fractional library routines.
!                                                              (line 1264)
  * __satfractusquhq2:                     Fixed-point fractional library routines.
!                                                              (line 1260)
  * __satfractusquqq2:                     Fixed-point fractional library routines.
!                                                              (line 1258)
  * __satfractusqusa:                      Fixed-point fractional library routines.
!                                                              (line 1266)
  * __satfractusquta:                      Fixed-point fractional library routines.
!                                                              (line 1270)
  * __satfractutada:                       Fixed-point fractional library routines.
!                                                              (line 1385)
  * __satfractutadq:                       Fixed-point fractional library routines.
!                                                              (line 1380)
  * __satfractutaha:                       Fixed-point fractional library routines.
!                                                              (line 1382)
  * __satfractutahq:                       Fixed-point fractional library routines.
!                                                              (line 1377)
  * __satfractutaqq:                       Fixed-point fractional library routines.
!                                                              (line 1375)
  * __satfractutasa:                       Fixed-point fractional library routines.
!                                                              (line 1384)
  * __satfractutasq:                       Fixed-point fractional library routines.
!                                                              (line 1378)
  * __satfractutata:                       Fixed-point fractional library routines.
!                                                              (line 1387)
  * __satfractutauda2:                     Fixed-point fractional library routines.
!                                                              (line 1401)
  * __satfractutaudq:                      Fixed-point fractional library routines.
!                                                              (line 1395)
  * __satfractutauha2:                     Fixed-point fractional library routines.
!                                                              (line 1397)
  * __satfractutauhq:                      Fixed-point fractional library routines.
!                                                              (line 1391)
  * __satfractutauqq:                      Fixed-point fractional library routines.
!                                                              (line 1389)
  * __satfractutausa2:                     Fixed-point fractional library routines.
!                                                              (line 1399)
  * __satfractutausq:                      Fixed-point fractional library routines.
!                                                              (line 1393)
  * __splitstack_find:                     Miscellaneous routines.
                                                               (line   15)
  * __ssaddda3:                            Fixed-point fractional library routines.
!                                                              (line   74)
  * __ssadddq3:                            Fixed-point fractional library routines.
!                                                              (line   69)
  * __ssaddha3:                            Fixed-point fractional library routines.
!                                                              (line   71)
  * __ssaddhq3:                            Fixed-point fractional library routines.
!                                                              (line   67)
  * __ssaddqq3:                            Fixed-point fractional library routines.
!                                                              (line   65)
  * __ssaddsa3:                            Fixed-point fractional library routines.
!                                                              (line   73)
  * __ssaddsq3:                            Fixed-point fractional library routines.
!                                                              (line   68)
  * __ssaddta3:                            Fixed-point fractional library routines.
!                                                              (line   75)
  * __ssashlda3:                           Fixed-point fractional library routines.
!                                                              (line  409)
  * __ssashldq3:                           Fixed-point fractional library routines.
!                                                              (line  405)
  * __ssashlha3:                           Fixed-point fractional library routines.
!                                                              (line  407)
  * __ssashlhq3:                           Fixed-point fractional library routines.
!                                                              (line  403)
  * __ssashlsa3:                           Fixed-point fractional library routines.
!                                                              (line  408)
  * __ssashlsq3:                           Fixed-point fractional library routines.
!                                                              (line  404)
  * __ssashlta3:                           Fixed-point fractional library routines.
!                                                              (line  410)
  * __ssdivda3:                            Fixed-point fractional library routines.
!                                                              (line  268)
  * __ssdivdq3:                            Fixed-point fractional library routines.
!                                                              (line  263)
  * __ssdivha3:                            Fixed-point fractional library routines.
!                                                              (line  265)
  * __ssdivhq3:                            Fixed-point fractional library routines.
!                                                              (line  261)
  * __ssdivqq3:                            Fixed-point fractional library routines.
!                                                              (line  259)
  * __ssdivsa3:                            Fixed-point fractional library routines.
!                                                              (line  267)
  * __ssdivsq3:                            Fixed-point fractional library routines.
!                                                              (line  262)
  * __ssdivta3:                            Fixed-point fractional library routines.
!                                                              (line  269)
  * __ssmulda3:                            Fixed-point fractional library routines.
!                                                              (line  200)
  * __ssmuldq3:                            Fixed-point fractional library routines.
!                                                              (line  195)
  * __ssmulha3:                            Fixed-point fractional library routines.
!                                                              (line  197)
  * __ssmulhq3:                            Fixed-point fractional library routines.
!                                                              (line  193)
  * __ssmulqq3:                            Fixed-point fractional library routines.
!                                                              (line  191)
  * __ssmulsa3:                            Fixed-point fractional library routines.
!                                                              (line  199)
  * __ssmulsq3:                            Fixed-point fractional library routines.
!                                                              (line  194)
  * __ssmulta3:                            Fixed-point fractional library routines.
!                                                              (line  201)
  * __ssnegda2:                            Fixed-point fractional library routines.
!                                                              (line  323)
  * __ssnegdq2:                            Fixed-point fractional library routines.
!                                                              (line  320)
  * __ssnegha2:                            Fixed-point fractional library routines.
!                                                              (line  321)
  * __ssneghq2:                            Fixed-point fractional library routines.
!                                                              (line  318)
  * __ssnegqq2:                            Fixed-point fractional library routines.
!                                                              (line  317)
  * __ssnegsa2:                            Fixed-point fractional library routines.
!                                                              (line  322)
  * __ssnegsq2:                            Fixed-point fractional library routines.
!                                                              (line  319)
  * __ssnegta2:                            Fixed-point fractional library routines.
!                                                              (line  324)
  * __sssubda3:                            Fixed-point fractional library routines.
!                                                              (line  136)
  * __sssubdq3:                            Fixed-point fractional library routines.
!                                                              (line  131)
  * __sssubha3:                            Fixed-point fractional library routines.
!                                                              (line  133)
  * __sssubhq3:                            Fixed-point fractional library routines.
!                                                              (line  129)
  * __sssubqq3:                            Fixed-point fractional library routines.
!                                                              (line  127)
  * __sssubsa3:                            Fixed-point fractional library routines.
!                                                              (line  135)
  * __sssubsq3:                            Fixed-point fractional library routines.
!                                                              (line  130)
  * __sssubta3:                            Fixed-point fractional library routines.
!                                                              (line  137)
  * __subda3:                              Fixed-point fractional library routines.
!                                                              (line  114)
  * __subdf3:                              Soft float library routines.
                                                               (line   30)
  * __subdq3:                              Fixed-point fractional library routines.
!                                                              (line  101)
  * __subha3:                              Fixed-point fractional library routines.
!                                                              (line  111)
  * __subhq3:                              Fixed-point fractional library routines.
!                                                              (line   99)
  * __subqq3:                              Fixed-point fractional library routines.
!                                                              (line   97)
  * __subsa3:                              Fixed-point fractional library routines.
!                                                              (line  113)
  * __subsf3:                              Soft float library routines.
                                                               (line   29)
  * __subsq3:                              Fixed-point fractional library routines.
!                                                              (line  100)
  * __subta3:                              Fixed-point fractional library routines.
!                                                              (line  115)
  * __subtf3:                              Soft float library routines.
                                                               (line   31)
  * __subuda3:                             Fixed-point fractional library routines.
!                                                              (line  121)
  * __subudq3:                             Fixed-point fractional library routines.
!                                                              (line  109)
  * __subuha3:                             Fixed-point fractional library routines.
!                                                              (line  117)
  * __subuhq3:                             Fixed-point fractional library routines.
!                                                              (line  105)
  * __subuqq3:                             Fixed-point fractional library routines.
!                                                              (line  103)
  * __subusa3:                             Fixed-point fractional library routines.
!                                                              (line  119)
  * __subusq3:                             Fixed-point fractional library routines.
!                                                              (line  107)
  * __subuta3:                             Fixed-point fractional library routines.
!                                                              (line  123)
  * __subvdi3:                             Integer library routines.
                                                               (line  122)
  * __subvsi3:                             Integer library routines.
--- 52740,53742 ----
  * __powixf2:                             Soft float library routines.
                                                               (line  234)
  * __satfractdadq:                        Fixed-point fractional library routines.
!                                                              (line 1152)
  * __satfractdaha2:                       Fixed-point fractional library routines.
!                                                              (line 1153)
  * __satfractdahq:                        Fixed-point fractional library routines.
!                                                              (line 1150)
  * __satfractdaqq:                        Fixed-point fractional library routines.
!                                                              (line 1149)
  * __satfractdasa2:                       Fixed-point fractional library routines.
!                                                              (line 1154)
  * __satfractdasq:                        Fixed-point fractional library routines.
!                                                              (line 1151)
  * __satfractdata2:                       Fixed-point fractional library routines.
!                                                              (line 1155)
  * __satfractdauda:                       Fixed-point fractional library routines.
!                                                              (line 1165)
  * __satfractdaudq:                       Fixed-point fractional library routines.
!                                                              (line 1160)
  * __satfractdauha:                       Fixed-point fractional library routines.
!                                                              (line 1162)
  * __satfractdauhq:                       Fixed-point fractional library routines.
!                                                              (line 1158)
  * __satfractdauqq:                       Fixed-point fractional library routines.
!                                                              (line 1156)
  * __satfractdausa:                       Fixed-point fractional library routines.
!                                                              (line 1164)
  * __satfractdausq:                       Fixed-point fractional library routines.
!                                                              (line 1159)
  * __satfractdauta:                       Fixed-point fractional library routines.
!                                                              (line 1166)
  * __satfractdfda:                        Fixed-point fractional library routines.
!                                                              (line 1505)
  * __satfractdfdq:                        Fixed-point fractional library routines.
!                                                              (line 1502)
  * __satfractdfha:                        Fixed-point fractional library routines.
!                                                              (line 1503)
  * __satfractdfhq:                        Fixed-point fractional library routines.
!                                                              (line 1500)
  * __satfractdfqq:                        Fixed-point fractional library routines.
!                                                              (line 1499)
  * __satfractdfsa:                        Fixed-point fractional library routines.
!                                                              (line 1504)
  * __satfractdfsq:                        Fixed-point fractional library routines.
!                                                              (line 1501)
  * __satfractdfta:                        Fixed-point fractional library routines.
!                                                              (line 1506)
  * __satfractdfuda:                       Fixed-point fractional library routines.
!                                                              (line 1514)
  * __satfractdfudq:                       Fixed-point fractional library routines.
!                                                              (line 1510)
  * __satfractdfuha:                       Fixed-point fractional library routines.
!                                                              (line 1512)
  * __satfractdfuhq:                       Fixed-point fractional library routines.
!                                                              (line 1508)
  * __satfractdfuqq:                       Fixed-point fractional library routines.
!                                                              (line 1507)
  * __satfractdfusa:                       Fixed-point fractional library routines.
!                                                              (line 1513)
  * __satfractdfusq:                       Fixed-point fractional library routines.
!                                                              (line 1509)
  * __satfractdfuta:                       Fixed-point fractional library routines.
!                                                              (line 1515)
  * __satfractdida:                        Fixed-point fractional library routines.
!                                                              (line 1455)
  * __satfractdidq:                        Fixed-point fractional library routines.
!                                                              (line 1452)
  * __satfractdiha:                        Fixed-point fractional library routines.
!                                                              (line 1453)
  * __satfractdihq:                        Fixed-point fractional library routines.
!                                                              (line 1450)
  * __satfractdiqq:                        Fixed-point fractional library routines.
!                                                              (line 1449)
  * __satfractdisa:                        Fixed-point fractional library routines.
!                                                              (line 1454)
  * __satfractdisq:                        Fixed-point fractional library routines.
!                                                              (line 1451)
  * __satfractdita:                        Fixed-point fractional library routines.
!                                                              (line 1456)
  * __satfractdiuda:                       Fixed-point fractional library routines.
!                                                              (line 1463)
  * __satfractdiudq:                       Fixed-point fractional library routines.
!                                                              (line 1460)
  * __satfractdiuha:                       Fixed-point fractional library routines.
!                                                              (line 1461)
  * __satfractdiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1458)
  * __satfractdiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1457)
  * __satfractdiusa:                       Fixed-point fractional library routines.
!                                                              (line 1462)
  * __satfractdiusq:                       Fixed-point fractional library routines.
!                                                              (line 1459)
  * __satfractdiuta:                       Fixed-point fractional library routines.
!                                                              (line 1464)
  * __satfractdqda:                        Fixed-point fractional library routines.
!                                                              (line 1097)
  * __satfractdqha:                        Fixed-point fractional library routines.
!                                                              (line 1095)
  * __satfractdqhq2:                       Fixed-point fractional library routines.
!                                                              (line 1093)
  * __satfractdqqq2:                       Fixed-point fractional library routines.
!                                                              (line 1092)
  * __satfractdqsa:                        Fixed-point fractional library routines.
!                                                              (line 1096)
  * __satfractdqsq2:                       Fixed-point fractional library routines.
!                                                              (line 1094)
  * __satfractdqta:                        Fixed-point fractional library routines.
!                                                              (line 1098)
  * __satfractdquda:                       Fixed-point fractional library routines.
!                                                              (line 1109)
  * __satfractdqudq:                       Fixed-point fractional library routines.
!                                                              (line 1104)
  * __satfractdquha:                       Fixed-point fractional library routines.
!                                                              (line 1106)
  * __satfractdquhq:                       Fixed-point fractional library routines.
!                                                              (line 1101)
  * __satfractdquqq:                       Fixed-point fractional library routines.
!                                                              (line 1099)
  * __satfractdqusa:                       Fixed-point fractional library routines.
!                                                              (line 1108)
  * __satfractdqusq:                       Fixed-point fractional library routines.
!                                                              (line 1102)
  * __satfractdquta:                       Fixed-point fractional library routines.
!                                                              (line 1111)
  * __satfracthada2:                       Fixed-point fractional library routines.
!                                                              (line 1118)
  * __satfracthadq:                        Fixed-point fractional library routines.
!                                                              (line 1116)
  * __satfracthahq:                        Fixed-point fractional library routines.
!                                                              (line 1114)
  * __satfracthaqq:                        Fixed-point fractional library routines.
!                                                              (line 1113)
  * __satfracthasa2:                       Fixed-point fractional library routines.
!                                                              (line 1117)
  * __satfracthasq:                        Fixed-point fractional library routines.
!                                                              (line 1115)
  * __satfracthata2:                       Fixed-point fractional library routines.
!                                                              (line 1119)
  * __satfracthauda:                       Fixed-point fractional library routines.
!                                                              (line 1130)
  * __satfracthaudq:                       Fixed-point fractional library routines.
!                                                              (line 1125)
  * __satfracthauha:                       Fixed-point fractional library routines.
!                                                              (line 1127)
  * __satfracthauhq:                       Fixed-point fractional library routines.
!                                                              (line 1122)
  * __satfracthauqq:                       Fixed-point fractional library routines.
!                                                              (line 1120)
  * __satfracthausa:                       Fixed-point fractional library routines.
!                                                              (line 1129)
  * __satfracthausq:                       Fixed-point fractional library routines.
!                                                              (line 1123)
  * __satfracthauta:                       Fixed-point fractional library routines.
!                                                              (line 1132)
  * __satfracthida:                        Fixed-point fractional library routines.
!                                                              (line 1423)
  * __satfracthidq:                        Fixed-point fractional library routines.
!                                                              (line 1420)
  * __satfracthiha:                        Fixed-point fractional library routines.
!                                                              (line 1421)
  * __satfracthihq:                        Fixed-point fractional library routines.
!                                                              (line 1418)
  * __satfracthiqq:                        Fixed-point fractional library routines.
!                                                              (line 1417)
  * __satfracthisa:                        Fixed-point fractional library routines.
!                                                              (line 1422)
  * __satfracthisq:                        Fixed-point fractional library routines.
!                                                              (line 1419)
  * __satfracthita:                        Fixed-point fractional library routines.
!                                                              (line 1424)
  * __satfracthiuda:                       Fixed-point fractional library routines.
!                                                              (line 1431)
  * __satfracthiudq:                       Fixed-point fractional library routines.
!                                                              (line 1428)
  * __satfracthiuha:                       Fixed-point fractional library routines.
!                                                              (line 1429)
  * __satfracthiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1426)
  * __satfracthiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1425)
  * __satfracthiusa:                       Fixed-point fractional library routines.
!                                                              (line 1430)
  * __satfracthiusq:                       Fixed-point fractional library routines.
!                                                              (line 1427)
  * __satfracthiuta:                       Fixed-point fractional library routines.
!                                                              (line 1432)
  * __satfracthqda:                        Fixed-point fractional library routines.
!                                                              (line 1063)
  * __satfracthqdq2:                       Fixed-point fractional library routines.
!                                                              (line 1060)
  * __satfracthqha:                        Fixed-point fractional library routines.
!                                                              (line 1061)
  * __satfracthqqq2:                       Fixed-point fractional library routines.
!                                                              (line 1058)
  * __satfracthqsa:                        Fixed-point fractional library routines.
!                                                              (line 1062)
  * __satfracthqsq2:                       Fixed-point fractional library routines.
!                                                              (line 1059)
  * __satfracthqta:                        Fixed-point fractional library routines.
!                                                              (line 1064)
  * __satfracthquda:                       Fixed-point fractional library routines.
!                                                              (line 1071)
  * __satfracthqudq:                       Fixed-point fractional library routines.
!                                                              (line 1068)
  * __satfracthquha:                       Fixed-point fractional library routines.
!                                                              (line 1069)
  * __satfracthquhq:                       Fixed-point fractional library routines.
!                                                              (line 1066)
  * __satfracthquqq:                       Fixed-point fractional library routines.
!                                                              (line 1065)
  * __satfracthqusa:                       Fixed-point fractional library routines.
!                                                              (line 1070)
  * __satfracthqusq:                       Fixed-point fractional library routines.
!                                                              (line 1067)
  * __satfracthquta:                       Fixed-point fractional library routines.
!                                                              (line 1072)
  * __satfractqida:                        Fixed-point fractional library routines.
!                                                              (line 1401)
  * __satfractqidq:                        Fixed-point fractional library routines.
!                                                              (line 1398)
  * __satfractqiha:                        Fixed-point fractional library routines.
!                                                              (line 1399)
  * __satfractqihq:                        Fixed-point fractional library routines.
!                                                              (line 1396)
  * __satfractqiqq:                        Fixed-point fractional library routines.
!                                                              (line 1395)
  * __satfractqisa:                        Fixed-point fractional library routines.
!                                                              (line 1400)
  * __satfractqisq:                        Fixed-point fractional library routines.
!                                                              (line 1397)
  * __satfractqita:                        Fixed-point fractional library routines.
!                                                              (line 1402)
  * __satfractqiuda:                       Fixed-point fractional library routines.
!                                                              (line 1413)
  * __satfractqiudq:                       Fixed-point fractional library routines.
!                                                              (line 1408)
  * __satfractqiuha:                       Fixed-point fractional library routines.
!                                                              (line 1410)
  * __satfractqiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1405)
  * __satfractqiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1403)
  * __satfractqiusa:                       Fixed-point fractional library routines.
!                                                              (line 1412)
  * __satfractqiusq:                       Fixed-point fractional library routines.
!                                                              (line 1406)
  * __satfractqiuta:                       Fixed-point fractional library routines.
!                                                              (line 1415)
  * __satfractqqda:                        Fixed-point fractional library routines.
!                                                              (line 1042)
  * __satfractqqdq2:                       Fixed-point fractional library routines.
!                                                              (line 1039)
  * __satfractqqha:                        Fixed-point fractional library routines.
!                                                              (line 1040)
  * __satfractqqhq2:                       Fixed-point fractional library routines.
!                                                              (line 1037)
  * __satfractqqsa:                        Fixed-point fractional library routines.
!                                                              (line 1041)
  * __satfractqqsq2:                       Fixed-point fractional library routines.
!                                                              (line 1038)
  * __satfractqqta:                        Fixed-point fractional library routines.
!                                                              (line 1043)
  * __satfractqquda:                       Fixed-point fractional library routines.
!                                                              (line 1054)
  * __satfractqqudq:                       Fixed-point fractional library routines.
!                                                              (line 1049)
  * __satfractqquha:                       Fixed-point fractional library routines.
!                                                              (line 1051)
  * __satfractqquhq:                       Fixed-point fractional library routines.
!                                                              (line 1046)
  * __satfractqquqq:                       Fixed-point fractional library routines.
!                                                              (line 1044)
  * __satfractqqusa:                       Fixed-point fractional library routines.
!                                                              (line 1053)
  * __satfractqqusq:                       Fixed-point fractional library routines.
!                                                              (line 1047)
  * __satfractqquta:                       Fixed-point fractional library routines.
!                                                              (line 1056)
  * __satfractsada2:                       Fixed-point fractional library routines.
!                                                              (line 1139)
  * __satfractsadq:                        Fixed-point fractional library routines.
!                                                              (line 1137)
  * __satfractsaha2:                       Fixed-point fractional library routines.
!                                                              (line 1138)
  * __satfractsahq:                        Fixed-point fractional library routines.
!                                                              (line 1135)
  * __satfractsaqq:                        Fixed-point fractional library routines.
!                                                              (line 1134)
  * __satfractsasq:                        Fixed-point fractional library routines.
!                                                              (line 1136)
  * __satfractsata2:                       Fixed-point fractional library routines.
!                                                              (line 1140)
  * __satfractsauda:                       Fixed-point fractional library routines.
!                                                              (line 1147)
  * __satfractsaudq:                       Fixed-point fractional library routines.
!                                                              (line 1144)
  * __satfractsauha:                       Fixed-point fractional library routines.
!                                                              (line 1145)
  * __satfractsauhq:                       Fixed-point fractional library routines.
!                                                              (line 1142)
  * __satfractsauqq:                       Fixed-point fractional library routines.
!                                                              (line 1141)
  * __satfractsausa:                       Fixed-point fractional library routines.
!                                                              (line 1146)
  * __satfractsausq:                       Fixed-point fractional library routines.
!                                                              (line 1143)
  * __satfractsauta:                       Fixed-point fractional library routines.
!                                                              (line 1148)
  * __satfractsfda:                        Fixed-point fractional library routines.
!                                                              (line 1489)
  * __satfractsfdq:                        Fixed-point fractional library routines.
!                                                              (line 1486)
  * __satfractsfha:                        Fixed-point fractional library routines.
!                                                              (line 1487)
  * __satfractsfhq:                        Fixed-point fractional library routines.
!                                                              (line 1484)
  * __satfractsfqq:                        Fixed-point fractional library routines.
!                                                              (line 1483)
  * __satfractsfsa:                        Fixed-point fractional library routines.
!                                                              (line 1488)
  * __satfractsfsq:                        Fixed-point fractional library routines.
!                                                              (line 1485)
  * __satfractsfta:                        Fixed-point fractional library routines.
!                                                              (line 1490)
  * __satfractsfuda:                       Fixed-point fractional library routines.
!                                                              (line 1497)
  * __satfractsfudq:                       Fixed-point fractional library routines.
!                                                              (line 1494)
  * __satfractsfuha:                       Fixed-point fractional library routines.
!                                                              (line 1495)
  * __satfractsfuhq:                       Fixed-point fractional library routines.
!                                                              (line 1492)
  * __satfractsfuqq:                       Fixed-point fractional library routines.
!                                                              (line 1491)
  * __satfractsfusa:                       Fixed-point fractional library routines.
!                                                              (line 1496)
  * __satfractsfusq:                       Fixed-point fractional library routines.
!                                                              (line 1493)
  * __satfractsfuta:                       Fixed-point fractional library routines.
!                                                              (line 1498)
  * __satfractsida:                        Fixed-point fractional library routines.
!                                                              (line 1439)
  * __satfractsidq:                        Fixed-point fractional library routines.
!                                                              (line 1436)
  * __satfractsiha:                        Fixed-point fractional library routines.
!                                                              (line 1437)
  * __satfractsihq:                        Fixed-point fractional library routines.
!                                                              (line 1434)
  * __satfractsiqq:                        Fixed-point fractional library routines.
!                                                              (line 1433)
  * __satfractsisa:                        Fixed-point fractional library routines.
!                                                              (line 1438)
  * __satfractsisq:                        Fixed-point fractional library routines.
!                                                              (line 1435)
  * __satfractsita:                        Fixed-point fractional library routines.
!                                                              (line 1440)
  * __satfractsiuda:                       Fixed-point fractional library routines.
!                                                              (line 1447)
  * __satfractsiudq:                       Fixed-point fractional library routines.
!                                                              (line 1444)
  * __satfractsiuha:                       Fixed-point fractional library routines.
!                                                              (line 1445)
  * __satfractsiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1442)
  * __satfractsiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1441)
  * __satfractsiusa:                       Fixed-point fractional library routines.
!                                                              (line 1446)
  * __satfractsiusq:                       Fixed-point fractional library routines.
!                                                              (line 1443)
  * __satfractsiuta:                       Fixed-point fractional library routines.
!                                                              (line 1448)
  * __satfractsqda:                        Fixed-point fractional library routines.
!                                                              (line 1078)
  * __satfractsqdq2:                       Fixed-point fractional library routines.
!                                                              (line 1075)
  * __satfractsqha:                        Fixed-point fractional library routines.
!                                                              (line 1076)
  * __satfractsqhq2:                       Fixed-point fractional library routines.
!                                                              (line 1074)
  * __satfractsqqq2:                       Fixed-point fractional library routines.
!                                                              (line 1073)
  * __satfractsqsa:                        Fixed-point fractional library routines.
!                                                              (line 1077)
  * __satfractsqta:                        Fixed-point fractional library routines.
!                                                              (line 1079)
  * __satfractsquda:                       Fixed-point fractional library routines.
!                                                              (line 1089)
  * __satfractsqudq:                       Fixed-point fractional library routines.
!                                                              (line 1084)
  * __satfractsquha:                       Fixed-point fractional library routines.
!                                                              (line 1086)
  * __satfractsquhq:                       Fixed-point fractional library routines.
!                                                              (line 1082)
  * __satfractsquqq:                       Fixed-point fractional library routines.
!                                                              (line 1080)
  * __satfractsqusa:                       Fixed-point fractional library routines.
!                                                              (line 1088)
  * __satfractsqusq:                       Fixed-point fractional library routines.
!                                                              (line 1083)
  * __satfractsquta:                       Fixed-point fractional library routines.
!                                                              (line 1090)
  * __satfracttada2:                       Fixed-point fractional library routines.
!                                                              (line 1174)
  * __satfracttadq:                        Fixed-point fractional library routines.
!                                                              (line 1171)
  * __satfracttaha2:                       Fixed-point fractional library routines.
!                                                              (line 1172)
  * __satfracttahq:                        Fixed-point fractional library routines.
!                                                              (line 1169)
  * __satfracttaqq:                        Fixed-point fractional library routines.
!                                                              (line 1168)
  * __satfracttasa2:                       Fixed-point fractional library routines.
!                                                              (line 1173)
  * __satfracttasq:                        Fixed-point fractional library routines.
!                                                              (line 1170)
  * __satfracttauda:                       Fixed-point fractional library routines.
!                                                              (line 1185)
  * __satfracttaudq:                       Fixed-point fractional library routines.
!                                                              (line 1180)
  * __satfracttauha:                       Fixed-point fractional library routines.
!                                                              (line 1182)
  * __satfracttauhq:                       Fixed-point fractional library routines.
!                                                              (line 1177)
  * __satfracttauqq:                       Fixed-point fractional library routines.
!                                                              (line 1175)
  * __satfracttausa:                       Fixed-point fractional library routines.
!                                                              (line 1184)
  * __satfracttausq:                       Fixed-point fractional library routines.
!                                                              (line 1178)
  * __satfracttauta:                       Fixed-point fractional library routines.
!                                                              (line 1187)
  * __satfracttida:                        Fixed-point fractional library routines.
!                                                              (line 1471)
  * __satfracttidq:                        Fixed-point fractional library routines.
!                                                              (line 1468)
  * __satfracttiha:                        Fixed-point fractional library routines.
!                                                              (line 1469)
  * __satfracttihq:                        Fixed-point fractional library routines.
!                                                              (line 1466)
  * __satfracttiqq:                        Fixed-point fractional library routines.
!                                                              (line 1465)
  * __satfracttisa:                        Fixed-point fractional library routines.
!                                                              (line 1470)
  * __satfracttisq:                        Fixed-point fractional library routines.
!                                                              (line 1467)
  * __satfracttita:                        Fixed-point fractional library routines.
!                                                              (line 1472)
  * __satfracttiuda:                       Fixed-point fractional library routines.
!                                                              (line 1480)
  * __satfracttiudq:                       Fixed-point fractional library routines.
!                                                              (line 1476)
  * __satfracttiuha:                       Fixed-point fractional library routines.
!                                                              (line 1478)
  * __satfracttiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1474)
  * __satfracttiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1473)
  * __satfracttiusa:                       Fixed-point fractional library routines.
!                                                              (line 1479)
  * __satfracttiusq:                       Fixed-point fractional library routines.
!                                                              (line 1475)
  * __satfracttiuta:                       Fixed-point fractional library routines.
!                                                              (line 1481)
  * __satfractudada:                       Fixed-point fractional library routines.
!                                                              (line 1350)
  * __satfractudadq:                       Fixed-point fractional library routines.
!                                                              (line 1345)
  * __satfractudaha:                       Fixed-point fractional library routines.
!                                                              (line 1347)
  * __satfractudahq:                       Fixed-point fractional library routines.
!                                                              (line 1343)
  * __satfractudaqq:                       Fixed-point fractional library routines.
!                                                              (line 1341)
  * __satfractudasa:                       Fixed-point fractional library routines.
!                                                              (line 1349)
  * __satfractudasq:                       Fixed-point fractional library routines.
!                                                              (line 1344)
  * __satfractudata:                       Fixed-point fractional library routines.
!                                                              (line 1351)
  * __satfractudaudq:                      Fixed-point fractional library routines.
!                                                              (line 1359)
  * __satfractudauha2:                     Fixed-point fractional library routines.
!                                                              (line 1361)
  * __satfractudauhq:                      Fixed-point fractional library routines.
!                                                              (line 1355)
  * __satfractudauqq:                      Fixed-point fractional library routines.
!                                                              (line 1353)
  * __satfractudausa2:                     Fixed-point fractional library routines.
!                                                              (line 1363)
  * __satfractudausq:                      Fixed-point fractional library routines.
!                                                              (line 1357)
  * __satfractudauta2:                     Fixed-point fractional library routines.
!                                                              (line 1365)
  * __satfractudqda:                       Fixed-point fractional library routines.
!                                                              (line 1274)
  * __satfractudqdq:                       Fixed-point fractional library routines.
!                                                              (line 1269)
  * __satfractudqha:                       Fixed-point fractional library routines.
!                                                              (line 1271)
  * __satfractudqhq:                       Fixed-point fractional library routines.
!                                                              (line 1266)
  * __satfractudqqq:                       Fixed-point fractional library routines.
!                                                              (line 1264)
  * __satfractudqsa:                       Fixed-point fractional library routines.
!                                                              (line 1273)
  * __satfractudqsq:                       Fixed-point fractional library routines.
!                                                              (line 1267)
  * __satfractudqta:                       Fixed-point fractional library routines.
!                                                              (line 1276)
  * __satfractudquda:                      Fixed-point fractional library routines.
!                                                              (line 1288)
  * __satfractudquha:                      Fixed-point fractional library routines.
!                                                              (line 1284)
  * __satfractudquhq2:                     Fixed-point fractional library routines.
!                                                              (line 1280)
  * __satfractudquqq2:                     Fixed-point fractional library routines.
!                                                              (line 1278)
  * __satfractudqusa:                      Fixed-point fractional library routines.
!                                                              (line 1286)
  * __satfractudqusq2:                     Fixed-point fractional library routines.
!                                                              (line 1282)
  * __satfractudquta:                      Fixed-point fractional library routines.
!                                                              (line 1290)
  * __satfractuhada:                       Fixed-point fractional library routines.
!                                                              (line 1302)
  * __satfractuhadq:                       Fixed-point fractional library routines.
!                                                              (line 1297)
  * __satfractuhaha:                       Fixed-point fractional library routines.
!                                                              (line 1299)
  * __satfractuhahq:                       Fixed-point fractional library routines.
!                                                              (line 1294)
  * __satfractuhaqq:                       Fixed-point fractional library routines.
!                                                              (line 1292)
  * __satfractuhasa:                       Fixed-point fractional library routines.
!                                                              (line 1301)
  * __satfractuhasq:                       Fixed-point fractional library routines.
!                                                              (line 1295)
  * __satfractuhata:                       Fixed-point fractional library routines.
!                                                              (line 1304)
  * __satfractuhauda2:                     Fixed-point fractional library routines.
!                                                              (line 1316)
  * __satfractuhaudq:                      Fixed-point fractional library routines.
!                                                              (line 1312)
  * __satfractuhauhq:                      Fixed-point fractional library routines.
!                                                              (line 1308)
  * __satfractuhauqq:                      Fixed-point fractional library routines.
!                                                              (line 1306)
  * __satfractuhausa2:                     Fixed-point fractional library routines.
!                                                              (line 1314)
  * __satfractuhausq:                      Fixed-point fractional library routines.
!                                                              (line 1310)
  * __satfractuhauta2:                     Fixed-point fractional library routines.
!                                                              (line 1318)
  * __satfractuhqda:                       Fixed-point fractional library routines.
!                                                              (line 1223)
  * __satfractuhqdq:                       Fixed-point fractional library routines.
!                                                              (line 1220)
  * __satfractuhqha:                       Fixed-point fractional library routines.
!                                                              (line 1221)
  * __satfractuhqhq:                       Fixed-point fractional library routines.
!                                                              (line 1218)
  * __satfractuhqqq:                       Fixed-point fractional library routines.
!                                                              (line 1217)
  * __satfractuhqsa:                       Fixed-point fractional library routines.
!                                                              (line 1222)
  * __satfractuhqsq:                       Fixed-point fractional library routines.
!                                                              (line 1219)
  * __satfractuhqta:                       Fixed-point fractional library routines.
!                                                              (line 1224)
  * __satfractuhquda:                      Fixed-point fractional library routines.
!                                                              (line 1234)
  * __satfractuhqudq2:                     Fixed-point fractional library routines.
!                                                              (line 1229)
  * __satfractuhquha:                      Fixed-point fractional library routines.
!                                                              (line 1231)
  * __satfractuhquqq2:                     Fixed-point fractional library routines.
!                                                              (line 1225)
  * __satfractuhqusa:                      Fixed-point fractional library routines.
!                                                              (line 1233)
  * __satfractuhqusq2:                     Fixed-point fractional library routines.
!                                                              (line 1227)
  * __satfractuhquta:                      Fixed-point fractional library routines.
!                                                              (line 1236)
  * __satfractunsdida:                     Fixed-point fractional library routines.
!                                                              (line 1833)
  * __satfractunsdidq:                     Fixed-point fractional library routines.
!                                                              (line 1829)
  * __satfractunsdiha:                     Fixed-point fractional library routines.
!                                                              (line 1831)
  * __satfractunsdihq:                     Fixed-point fractional library routines.
!                                                              (line 1827)
  * __satfractunsdiqq:                     Fixed-point fractional library routines.
!                                                              (line 1826)
  * __satfractunsdisa:                     Fixed-point fractional library routines.
!                                                              (line 1832)
  * __satfractunsdisq:                     Fixed-point fractional library routines.
!                                                              (line 1828)
  * __satfractunsdita:                     Fixed-point fractional library routines.
!                                                              (line 1834)
  * __satfractunsdiuda:                    Fixed-point fractional library routines.
!                                                              (line 1848)
  * __satfractunsdiudq:                    Fixed-point fractional library routines.
!                                                              (line 1842)
  * __satfractunsdiuha:                    Fixed-point fractional library routines.
!                                                              (line 1844)
  * __satfractunsdiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1838)
  * __satfractunsdiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1836)
  * __satfractunsdiusa:                    Fixed-point fractional library routines.
!                                                              (line 1846)
  * __satfractunsdiusq:                    Fixed-point fractional library routines.
!                                                              (line 1840)
  * __satfractunsdiuta:                    Fixed-point fractional library routines.
!                                                              (line 1850)
  * __satfractunshida:                     Fixed-point fractional library routines.
!                                                              (line 1785)
  * __satfractunshidq:                     Fixed-point fractional library routines.
!                                                              (line 1781)
  * __satfractunshiha:                     Fixed-point fractional library routines.
!                                                              (line 1783)
  * __satfractunshihq:                     Fixed-point fractional library routines.
!                                                              (line 1779)
  * __satfractunshiqq:                     Fixed-point fractional library routines.
!                                                              (line 1778)
  * __satfractunshisa:                     Fixed-point fractional library routines.
!                                                              (line 1784)
  * __satfractunshisq:                     Fixed-point fractional library routines.
!                                                              (line 1780)
  * __satfractunshita:                     Fixed-point fractional library routines.
!                                                              (line 1786)
  * __satfractunshiuda:                    Fixed-point fractional library routines.
!                                                              (line 1800)
  * __satfractunshiudq:                    Fixed-point fractional library routines.
!                                                              (line 1794)
  * __satfractunshiuha:                    Fixed-point fractional library routines.
!                                                              (line 1796)
  * __satfractunshiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1790)
  * __satfractunshiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1788)
  * __satfractunshiusa:                    Fixed-point fractional library routines.
!                                                              (line 1798)
  * __satfractunshiusq:                    Fixed-point fractional library routines.
!                                                              (line 1792)
  * __satfractunshiuta:                    Fixed-point fractional library routines.
!                                                              (line 1802)
  * __satfractunsqida:                     Fixed-point fractional library routines.
!                                                              (line 1759)
  * __satfractunsqidq:                     Fixed-point fractional library routines.
!                                                              (line 1755)
  * __satfractunsqiha:                     Fixed-point fractional library routines.
!                                                              (line 1757)
  * __satfractunsqihq:                     Fixed-point fractional library routines.
!                                                              (line 1753)
  * __satfractunsqiqq:                     Fixed-point fractional library routines.
!                                                              (line 1752)
  * __satfractunsqisa:                     Fixed-point fractional library routines.
!                                                              (line 1758)
  * __satfractunsqisq:                     Fixed-point fractional library routines.
!                                                              (line 1754)
  * __satfractunsqita:                     Fixed-point fractional library routines.
!                                                              (line 1760)
  * __satfractunsqiuda:                    Fixed-point fractional library routines.
!                                                              (line 1774)
  * __satfractunsqiudq:                    Fixed-point fractional library routines.
!                                                              (line 1768)
  * __satfractunsqiuha:                    Fixed-point fractional library routines.
!                                                              (line 1770)
  * __satfractunsqiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1764)
  * __satfractunsqiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1762)
  * __satfractunsqiusa:                    Fixed-point fractional library routines.
!                                                              (line 1772)
  * __satfractunsqiusq:                    Fixed-point fractional library routines.
!                                                              (line 1766)
  * __satfractunsqiuta:                    Fixed-point fractional library routines.
!                                                              (line 1776)
  * __satfractunssida:                     Fixed-point fractional library routines.
!                                                              (line 1810)
  * __satfractunssidq:                     Fixed-point fractional library routines.
!                                                              (line 1807)
  * __satfractunssiha:                     Fixed-point fractional library routines.
!                                                              (line 1808)
  * __satfractunssihq:                     Fixed-point fractional library routines.
!                                                              (line 1805)
  * __satfractunssiqq:                     Fixed-point fractional library routines.
!                                                              (line 1804)
  * __satfractunssisa:                     Fixed-point fractional library routines.
!                                                              (line 1809)
  * __satfractunssisq:                     Fixed-point fractional library routines.
!                                                              (line 1806)
  * __satfractunssita:                     Fixed-point fractional library routines.
!                                                              (line 1811)
  * __satfractunssiuda:                    Fixed-point fractional library routines.
!                                                              (line 1822)
  * __satfractunssiudq:                    Fixed-point fractional library routines.
!                                                              (line 1817)
  * __satfractunssiuha:                    Fixed-point fractional library routines.
!                                                              (line 1819)
  * __satfractunssiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1814)
  * __satfractunssiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1812)
  * __satfractunssiusa:                    Fixed-point fractional library routines.
!                                                              (line 1821)
  * __satfractunssiusq:                    Fixed-point fractional library routines.
!                                                              (line 1815)
  * __satfractunssiuta:                    Fixed-point fractional library routines.
!                                                              (line 1824)
  * __satfractunstida:                     Fixed-point fractional library routines.
!                                                              (line 1862)
  * __satfractunstidq:                     Fixed-point fractional library routines.
!                                                              (line 1857)
  * __satfractunstiha:                     Fixed-point fractional library routines.
!                                                              (line 1859)
  * __satfractunstihq:                     Fixed-point fractional library routines.
!                                                              (line 1854)
  * __satfractunstiqq:                     Fixed-point fractional library routines.
!                                                              (line 1852)
  * __satfractunstisa:                     Fixed-point fractional library routines.
!                                                              (line 1861)
  * __satfractunstisq:                     Fixed-point fractional library routines.
!                                                              (line 1855)
  * __satfractunstita:                     Fixed-point fractional library routines.
!                                                              (line 1864)
  * __satfractunstiuda:                    Fixed-point fractional library routines.
!                                                              (line 1878)
  * __satfractunstiudq:                    Fixed-point fractional library routines.
!                                                              (line 1872)
  * __satfractunstiuha:                    Fixed-point fractional library routines.
!                                                              (line 1874)
  * __satfractunstiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1868)
  * __satfractunstiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1866)
  * __satfractunstiusa:                    Fixed-point fractional library routines.
!                                                              (line 1876)
  * __satfractunstiusq:                    Fixed-point fractional library routines.
!                                                              (line 1870)
  * __satfractunstiuta:                    Fixed-point fractional library routines.
!                                                              (line 1880)
  * __satfractuqqda:                       Fixed-point fractional library routines.
!                                                              (line 1199)
  * __satfractuqqdq:                       Fixed-point fractional library routines.
!                                                              (line 1194)
  * __satfractuqqha:                       Fixed-point fractional library routines.
!                                                              (line 1196)
  * __satfractuqqhq:                       Fixed-point fractional library routines.
!                                                              (line 1191)
  * __satfractuqqqq:                       Fixed-point fractional library routines.
!                                                              (line 1189)
  * __satfractuqqsa:                       Fixed-point fractional library routines.
!                                                              (line 1198)
  * __satfractuqqsq:                       Fixed-point fractional library routines.
!                                                              (line 1192)
  * __satfractuqqta:                       Fixed-point fractional library routines.
!                                                              (line 1201)
  * __satfractuqquda:                      Fixed-point fractional library routines.
!                                                              (line 1213)
  * __satfractuqqudq2:                     Fixed-point fractional library routines.
!                                                              (line 1207)
  * __satfractuqquha:                      Fixed-point fractional library routines.
!                                                              (line 1209)
  * __satfractuqquhq2:                     Fixed-point fractional library routines.
!                                                              (line 1203)
  * __satfractuqqusa:                      Fixed-point fractional library routines.
!                                                              (line 1211)
  * __satfractuqqusq2:                     Fixed-point fractional library routines.
!                                                              (line 1205)
  * __satfractuqquta:                      Fixed-point fractional library routines.
!                                                              (line 1215)
  * __satfractusada:                       Fixed-point fractional library routines.
!                                                              (line 1326)
  * __satfractusadq:                       Fixed-point fractional library routines.
!                                                              (line 1323)
  * __satfractusaha:                       Fixed-point fractional library routines.
!                                                              (line 1324)
  * __satfractusahq:                       Fixed-point fractional library routines.
!                                                              (line 1321)
  * __satfractusaqq:                       Fixed-point fractional library routines.
!                                                              (line 1320)
  * __satfractusasa:                       Fixed-point fractional library routines.
!                                                              (line 1325)
  * __satfractusasq:                       Fixed-point fractional library routines.
!                                                              (line 1322)
  * __satfractusata:                       Fixed-point fractional library routines.
!                                                              (line 1327)
  * __satfractusauda2:                     Fixed-point fractional library routines.
!                                                              (line 1337)
  * __satfractusaudq:                      Fixed-point fractional library routines.
!                                                              (line 1333)
  * __satfractusauha2:                     Fixed-point fractional library routines.
!                                                              (line 1335)
  * __satfractusauhq:                      Fixed-point fractional library routines.
!                                                              (line 1330)
  * __satfractusauqq:                      Fixed-point fractional library routines.
!                                                              (line 1328)
  * __satfractusausq:                      Fixed-point fractional library routines.
!                                                              (line 1331)
  * __satfractusauta2:                     Fixed-point fractional library routines.
!                                                              (line 1339)
  * __satfractusqda:                       Fixed-point fractional library routines.
!                                                              (line 1247)
  * __satfractusqdq:                       Fixed-point fractional library routines.
!                                                              (line 1242)
  * __satfractusqha:                       Fixed-point fractional library routines.
!                                                              (line 1244)
  * __satfractusqhq:                       Fixed-point fractional library routines.
!                                                              (line 1240)
  * __satfractusqqq:                       Fixed-point fractional library routines.
!                                                              (line 1238)
  * __satfractusqsa:                       Fixed-point fractional library routines.
!                                                              (line 1246)
  * __satfractusqsq:                       Fixed-point fractional library routines.
!                                                              (line 1241)
  * __satfractusqta:                       Fixed-point fractional library routines.
!                                                              (line 1248)
  * __satfractusquda:                      Fixed-point fractional library routines.
!                                                              (line 1260)
  * __satfractusqudq2:                     Fixed-point fractional library routines.
!                                                              (line 1254)
  * __satfractusquha:                      Fixed-point fractional library routines.
!                                                              (line 1256)
  * __satfractusquhq2:                     Fixed-point fractional library routines.
!                                                              (line 1252)
  * __satfractusquqq2:                     Fixed-point fractional library routines.
!                                                              (line 1250)
  * __satfractusqusa:                      Fixed-point fractional library routines.
!                                                              (line 1258)
  * __satfractusquta:                      Fixed-point fractional library routines.
!                                                              (line 1262)
  * __satfractutada:                       Fixed-point fractional library routines.
!                                                              (line 1377)
  * __satfractutadq:                       Fixed-point fractional library routines.
!                                                              (line 1372)
  * __satfractutaha:                       Fixed-point fractional library routines.
!                                                              (line 1374)
  * __satfractutahq:                       Fixed-point fractional library routines.
!                                                              (line 1369)
  * __satfractutaqq:                       Fixed-point fractional library routines.
!                                                              (line 1367)
  * __satfractutasa:                       Fixed-point fractional library routines.
!                                                              (line 1376)
  * __satfractutasq:                       Fixed-point fractional library routines.
!                                                              (line 1370)
  * __satfractutata:                       Fixed-point fractional library routines.
!                                                              (line 1379)
  * __satfractutauda2:                     Fixed-point fractional library routines.
!                                                              (line 1393)
  * __satfractutaudq:                      Fixed-point fractional library routines.
!                                                              (line 1387)
  * __satfractutauha2:                     Fixed-point fractional library routines.
!                                                              (line 1389)
  * __satfractutauhq:                      Fixed-point fractional library routines.
!                                                              (line 1383)
  * __satfractutauqq:                      Fixed-point fractional library routines.
!                                                              (line 1381)
  * __satfractutausa2:                     Fixed-point fractional library routines.
!                                                              (line 1391)
  * __satfractutausq:                      Fixed-point fractional library routines.
!                                                              (line 1385)
  * __splitstack_find:                     Miscellaneous routines.
                                                               (line   15)
  * __ssaddda3:                            Fixed-point fractional library routines.
!                                                              (line   66)
  * __ssadddq3:                            Fixed-point fractional library routines.
!                                                              (line   61)
  * __ssaddha3:                            Fixed-point fractional library routines.
!                                                              (line   63)
  * __ssaddhq3:                            Fixed-point fractional library routines.
!                                                              (line   59)
  * __ssaddqq3:                            Fixed-point fractional library routines.
!                                                              (line   57)
  * __ssaddsa3:                            Fixed-point fractional library routines.
!                                                              (line   65)
  * __ssaddsq3:                            Fixed-point fractional library routines.
!                                                              (line   60)
  * __ssaddta3:                            Fixed-point fractional library routines.
!                                                              (line   67)
  * __ssashlda3:                           Fixed-point fractional library routines.
!                                                              (line  401)
  * __ssashldq3:                           Fixed-point fractional library routines.
!                                                              (line  397)
  * __ssashlha3:                           Fixed-point fractional library routines.
!                                                              (line  399)
  * __ssashlhq3:                           Fixed-point fractional library routines.
!                                                              (line  395)
  * __ssashlsa3:                           Fixed-point fractional library routines.
!                                                              (line  400)
  * __ssashlsq3:                           Fixed-point fractional library routines.
!                                                              (line  396)
  * __ssashlta3:                           Fixed-point fractional library routines.
!                                                              (line  402)
  * __ssdivda3:                            Fixed-point fractional library routines.
!                                                              (line  260)
  * __ssdivdq3:                            Fixed-point fractional library routines.
!                                                              (line  255)
  * __ssdivha3:                            Fixed-point fractional library routines.
!                                                              (line  257)
  * __ssdivhq3:                            Fixed-point fractional library routines.
!                                                              (line  253)
  * __ssdivqq3:                            Fixed-point fractional library routines.
!                                                              (line  251)
  * __ssdivsa3:                            Fixed-point fractional library routines.
!                                                              (line  259)
  * __ssdivsq3:                            Fixed-point fractional library routines.
!                                                              (line  254)
  * __ssdivta3:                            Fixed-point fractional library routines.
!                                                              (line  261)
  * __ssmulda3:                            Fixed-point fractional library routines.
!                                                              (line  192)
  * __ssmuldq3:                            Fixed-point fractional library routines.
!                                                              (line  187)
  * __ssmulha3:                            Fixed-point fractional library routines.
!                                                              (line  189)
  * __ssmulhq3:                            Fixed-point fractional library routines.
!                                                              (line  185)
  * __ssmulqq3:                            Fixed-point fractional library routines.
!                                                              (line  183)
  * __ssmulsa3:                            Fixed-point fractional library routines.
!                                                              (line  191)
  * __ssmulsq3:                            Fixed-point fractional library routines.
!                                                              (line  186)
  * __ssmulta3:                            Fixed-point fractional library routines.
!                                                              (line  193)
  * __ssnegda2:                            Fixed-point fractional library routines.
!                                                              (line  315)
  * __ssnegdq2:                            Fixed-point fractional library routines.
!                                                              (line  312)
  * __ssnegha2:                            Fixed-point fractional library routines.
!                                                              (line  313)
  * __ssneghq2:                            Fixed-point fractional library routines.
!                                                              (line  310)
  * __ssnegqq2:                            Fixed-point fractional library routines.
!                                                              (line  309)
  * __ssnegsa2:                            Fixed-point fractional library routines.
!                                                              (line  314)
  * __ssnegsq2:                            Fixed-point fractional library routines.
!                                                              (line  311)
  * __ssnegta2:                            Fixed-point fractional library routines.
!                                                              (line  316)
  * __sssubda3:                            Fixed-point fractional library routines.
!                                                              (line  128)
  * __sssubdq3:                            Fixed-point fractional library routines.
!                                                              (line  123)
  * __sssubha3:                            Fixed-point fractional library routines.
!                                                              (line  125)
  * __sssubhq3:                            Fixed-point fractional library routines.
!                                                              (line  121)
  * __sssubqq3:                            Fixed-point fractional library routines.
!                                                              (line  119)
  * __sssubsa3:                            Fixed-point fractional library routines.
!                                                              (line  127)
  * __sssubsq3:                            Fixed-point fractional library routines.
!                                                              (line  122)
  * __sssubta3:                            Fixed-point fractional library routines.
!                                                              (line  129)
  * __subda3:                              Fixed-point fractional library routines.
!                                                              (line  106)
  * __subdf3:                              Soft float library routines.
                                                               (line   30)
  * __subdq3:                              Fixed-point fractional library routines.
!                                                              (line   93)
  * __subha3:                              Fixed-point fractional library routines.
!                                                              (line  103)
  * __subhq3:                              Fixed-point fractional library routines.
!                                                              (line   91)
  * __subqq3:                              Fixed-point fractional library routines.
!                                                              (line   89)
  * __subsa3:                              Fixed-point fractional library routines.
!                                                              (line  105)
  * __subsf3:                              Soft float library routines.
                                                               (line   29)
  * __subsq3:                              Fixed-point fractional library routines.
!                                                              (line   92)
  * __subta3:                              Fixed-point fractional library routines.
!                                                              (line  107)
  * __subtf3:                              Soft float library routines.
                                                               (line   31)
  * __subuda3:                             Fixed-point fractional library routines.
!                                                              (line  113)
  * __subudq3:                             Fixed-point fractional library routines.
!                                                              (line  101)
  * __subuha3:                             Fixed-point fractional library routines.
!                                                              (line  109)
  * __subuhq3:                             Fixed-point fractional library routines.
!                                                              (line   97)
  * __subuqq3:                             Fixed-point fractional library routines.
!                                                              (line   95)
  * __subusa3:                             Fixed-point fractional library routines.
!                                                              (line  111)
  * __subusq3:                             Fixed-point fractional library routines.
!                                                              (line   99)
  * __subuta3:                             Fixed-point fractional library routines.
!                                                              (line  115)
  * __subvdi3:                             Integer library routines.
                                                               (line  122)
  * __subvsi3:                             Integer library routines.
*************** Concept Index
*** 53768,53788 ****
  * __udivti3:                             Integer library routines.
                                                               (line   54)
  * __udivuda3:                            Fixed-point fractional library routines.
!                                                              (line  252)
  * __udivudq3:                            Fixed-point fractional library routines.
!                                                              (line  246)
  * __udivuha3:                            Fixed-point fractional library routines.
!                                                              (line  248)
  * __udivuhq3:                            Fixed-point fractional library routines.
!                                                              (line  242)
  * __udivuqq3:                            Fixed-point fractional library routines.
!                                                              (line  240)
  * __udivusa3:                            Fixed-point fractional library routines.
!                                                              (line  250)
  * __udivusq3:                            Fixed-point fractional library routines.
!                                                              (line  244)
  * __udivuta3:                            Fixed-point fractional library routines.
!                                                              (line  254)
  * __umoddi3:                             Integer library routines.
                                                               (line   69)
  * __umodsi3:                             Integer library routines.
--- 53768,53788 ----
  * __udivti3:                             Integer library routines.
                                                               (line   54)
  * __udivuda3:                            Fixed-point fractional library routines.
!                                                              (line  244)
  * __udivudq3:                            Fixed-point fractional library routines.
!                                                              (line  238)
  * __udivuha3:                            Fixed-point fractional library routines.
!                                                              (line  240)
  * __udivuhq3:                            Fixed-point fractional library routines.
!                                                              (line  234)
  * __udivuqq3:                            Fixed-point fractional library routines.
!                                                              (line  232)
  * __udivusa3:                            Fixed-point fractional library routines.
!                                                              (line  242)
  * __udivusq3:                            Fixed-point fractional library routines.
!                                                              (line  236)
  * __udivuta3:                            Fixed-point fractional library routines.
!                                                              (line  246)
  * __umoddi3:                             Integer library routines.
                                                               (line   69)
  * __umodsi3:                             Integer library routines.
*************** Concept Index
*** 53796,53896 ****
  * __unordtf2:                            Soft float library routines.
                                                               (line  173)
  * __usadduda3:                           Fixed-point fractional library routines.
!                                                              (line   91)
  * __usaddudq3:                           Fixed-point fractional library routines.
!                                                              (line   85)
  * __usadduha3:                           Fixed-point fractional library routines.
!                                                              (line   87)
  * __usadduhq3:                           Fixed-point fractional library routines.
!                                                              (line   81)
  * __usadduqq3:                           Fixed-point fractional library routines.
!                                                              (line   79)
  * __usaddusa3:                           Fixed-point fractional library routines.
!                                                              (line   89)
  * __usaddusq3:                           Fixed-point fractional library routines.
!                                                              (line   83)
  * __usadduta3:                           Fixed-point fractional library routines.
!                                                              (line   93)
  * __usashluda3:                          Fixed-point fractional library routines.
!                                                              (line  427)
  * __usashludq3:                          Fixed-point fractional library routines.
!                                                              (line  421)
  * __usashluha3:                          Fixed-point fractional library routines.
!                                                              (line  423)
  * __usashluhq3:                          Fixed-point fractional library routines.
!                                                              (line  417)
  * __usashluqq3:                          Fixed-point fractional library routines.
!                                                              (line  415)
  * __usashlusa3:                          Fixed-point fractional library routines.
!                                                              (line  425)
  * __usashlusq3:                          Fixed-point fractional library routines.
!                                                              (line  419)
  * __usashluta3:                          Fixed-point fractional library routines.
!                                                              (line  429)
  * __usdivuda3:                           Fixed-point fractional library routines.
!                                                              (line  286)
  * __usdivudq3:                           Fixed-point fractional library routines.
!                                                              (line  280)
  * __usdivuha3:                           Fixed-point fractional library routines.
!                                                              (line  282)
  * __usdivuhq3:                           Fixed-point fractional library routines.
!                                                              (line  276)
  * __usdivuqq3:                           Fixed-point fractional library routines.
!                                                              (line  274)
  * __usdivusa3:                           Fixed-point fractional library routines.
!                                                              (line  284)
  * __usdivusq3:                           Fixed-point fractional library routines.
!                                                              (line  278)
  * __usdivuta3:                           Fixed-point fractional library routines.
!                                                              (line  288)
  * __usmuluda3:                           Fixed-point fractional library routines.
!                                                              (line  218)
  * __usmuludq3:                           Fixed-point fractional library routines.
!                                                              (line  212)
  * __usmuluha3:                           Fixed-point fractional library routines.
!                                                              (line  214)
  * __usmuluhq3:                           Fixed-point fractional library routines.
!                                                              (line  208)
  * __usmuluqq3:                           Fixed-point fractional library routines.
!                                                              (line  206)
  * __usmulusa3:                           Fixed-point fractional library routines.
!                                                              (line  216)
  * __usmulusq3:                           Fixed-point fractional library routines.
!                                                              (line  210)
  * __usmuluta3:                           Fixed-point fractional library routines.
!                                                              (line  220)
  * __usneguda2:                           Fixed-point fractional library routines.
!                                                              (line  337)
  * __usnegudq2:                           Fixed-point fractional library routines.
!                                                              (line  332)
  * __usneguha2:                           Fixed-point fractional library routines.
!                                                              (line  334)
  * __usneguhq2:                           Fixed-point fractional library routines.
!                                                              (line  329)
  * __usneguqq2:                           Fixed-point fractional library routines.
!                                                              (line  327)
  * __usnegusa2:                           Fixed-point fractional library routines.
!                                                              (line  336)
  * __usnegusq2:                           Fixed-point fractional library routines.
!                                                              (line  330)
  * __usneguta2:                           Fixed-point fractional library routines.
!                                                              (line  339)
  * __ussubuda3:                           Fixed-point fractional library routines.
!                                                              (line  154)
  * __ussubudq3:                           Fixed-point fractional library routines.
!                                                              (line  148)
  * __ussubuha3:                           Fixed-point fractional library routines.
!                                                              (line  150)
  * __ussubuhq3:                           Fixed-point fractional library routines.
!                                                              (line  144)
  * __ussubuqq3:                           Fixed-point fractional library routines.
!                                                              (line  142)
  * __ussubusa3:                           Fixed-point fractional library routines.
!                                                              (line  152)
  * __ussubusq3:                           Fixed-point fractional library routines.
!                                                              (line  146)
  * __ussubuta3:                           Fixed-point fractional library routines.
!                                                              (line  156)
  * abort:                                 Portability.        (line   20)
  * abs:                                   Arithmetic.         (line  206)
  * abs and attributes:                    Expressions.        (line   83)
--- 53796,53896 ----
  * __unordtf2:                            Soft float library routines.
                                                               (line  173)
  * __usadduda3:                           Fixed-point fractional library routines.
!                                                              (line   83)
  * __usaddudq3:                           Fixed-point fractional library routines.
!                                                              (line   77)
  * __usadduha3:                           Fixed-point fractional library routines.
!                                                              (line   79)
  * __usadduhq3:                           Fixed-point fractional library routines.
!                                                              (line   73)
  * __usadduqq3:                           Fixed-point fractional library routines.
!                                                              (line   71)
  * __usaddusa3:                           Fixed-point fractional library routines.
!                                                              (line   81)
  * __usaddusq3:                           Fixed-point fractional library routines.
!                                                              (line   75)
  * __usadduta3:                           Fixed-point fractional library routines.
!                                                              (line   85)
  * __usashluda3:                          Fixed-point fractional library routines.
!                                                              (line  419)
  * __usashludq3:                          Fixed-point fractional library routines.
!                                                              (line  413)
  * __usashluha3:                          Fixed-point fractional library routines.
!                                                              (line  415)
  * __usashluhq3:                          Fixed-point fractional library routines.
!                                                              (line  409)
  * __usashluqq3:                          Fixed-point fractional library routines.
!                                                              (line  407)
  * __usashlusa3:                          Fixed-point fractional library routines.
!                                                              (line  417)
  * __usashlusq3:                          Fixed-point fractional library routines.
!                                                              (line  411)
  * __usashluta3:                          Fixed-point fractional library routines.
!                                                              (line  421)
  * __usdivuda3:                           Fixed-point fractional library routines.
!                                                              (line  278)
  * __usdivudq3:                           Fixed-point fractional library routines.
!                                                              (line  272)
  * __usdivuha3:                           Fixed-point fractional library routines.
!                                                              (line  274)
  * __usdivuhq3:                           Fixed-point fractional library routines.
!                                                              (line  268)
  * __usdivuqq3:                           Fixed-point fractional library routines.
!                                                              (line  266)
  * __usdivusa3:                           Fixed-point fractional library routines.
!                                                              (line  276)
  * __usdivusq3:                           Fixed-point fractional library routines.
!                                                              (line  270)
  * __usdivuta3:                           Fixed-point fractional library routines.
!                                                              (line  280)
  * __usmuluda3:                           Fixed-point fractional library routines.
!                                                              (line  210)
  * __usmuludq3:                           Fixed-point fractional library routines.
!                                                              (line  204)
  * __usmuluha3:                           Fixed-point fractional library routines.
!                                                              (line  206)
  * __usmuluhq3:                           Fixed-point fractional library routines.
!                                                              (line  200)
  * __usmuluqq3:                           Fixed-point fractional library routines.
!                                                              (line  198)
  * __usmulusa3:                           Fixed-point fractional library routines.
!                                                              (line  208)
  * __usmulusq3:                           Fixed-point fractional library routines.
!                                                              (line  202)
  * __usmuluta3:                           Fixed-point fractional library routines.
!                                                              (line  212)
  * __usneguda2:                           Fixed-point fractional library routines.
!                                                              (line  329)
  * __usnegudq2:                           Fixed-point fractional library routines.
!                                                              (line  324)
  * __usneguha2:                           Fixed-point fractional library routines.
!                                                              (line  326)
  * __usneguhq2:                           Fixed-point fractional library routines.
!                                                              (line  321)
  * __usneguqq2:                           Fixed-point fractional library routines.
!                                                              (line  319)
  * __usnegusa2:                           Fixed-point fractional library routines.
!                                                              (line  328)
  * __usnegusq2:                           Fixed-point fractional library routines.
!                                                              (line  322)
  * __usneguta2:                           Fixed-point fractional library routines.
!                                                              (line  331)
  * __ussubuda3:                           Fixed-point fractional library routines.
!                                                              (line  146)
  * __ussubudq3:                           Fixed-point fractional library routines.
!                                                              (line  140)
  * __ussubuha3:                           Fixed-point fractional library routines.
!                                                              (line  142)
  * __ussubuhq3:                           Fixed-point fractional library routines.
!                                                              (line  136)
  * __ussubuqq3:                           Fixed-point fractional library routines.
!                                                              (line  134)
  * __ussubusa3:                           Fixed-point fractional library routines.
!                                                              (line  144)
  * __ussubusq3:                           Fixed-point fractional library routines.
!                                                              (line  138)
  * __ussubuta3:                           Fixed-point fractional library routines.
!                                                              (line  148)
  * abort:                                 Portability.        (line   20)
  * abs:                                   Arithmetic.         (line  206)
  * abs and attributes:                    Expressions.        (line   83)
*************** Concept Index
*** 54061,54067 ****
  * AS_NEEDS_DASH_FOR_PIPED_INPUT:         Driver.             (line   88)
  * atan2M3 instruction pattern:           Standard Names.     (line 1196)
  * atanM2 instruction pattern:            Standard Names.     (line 1094)
! * atomic:                                GTY Options.        (line  205)
  * atomic_addMODE instruction pattern:    Standard Names.     (line 2700)
  * atomic_add_fetchMODE instruction pattern: Standard Names.  (line 2729)
  * atomic_add_fetch_cmp_0MODE instruction pattern: Standard Names.
--- 54061,54067 ----
  * AS_NEEDS_DASH_FOR_PIPED_INPUT:         Driver.             (line   88)
  * atan2M3 instruction pattern:           Standard Names.     (line 1196)
  * atanM2 instruction pattern:            Standard Names.     (line 1094)
! * atomic:                                GTY Options.        (line  204)
  * atomic_addMODE instruction pattern:    Standard Names.     (line 2700)
  * atomic_add_fetchMODE instruction pattern: Standard Names.  (line 2729)
  * atomic_add_fetch_cmp_0MODE instruction pattern: Standard Names.
*************** Concept Index
*** 56896,56902 ****
  * source code, location information:     Guidelines for Diagnostics.
                                                               (line  183)
  * spaceshipM3 instruction pattern:       Standard Names.     (line 2890)
! * special:                               GTY Options.        (line  246)
  * special predicates:                    Predicates.         (line   31)
  * SPECS:                                 Target Fragment.    (line  194)
  * speculation_barrier instruction pattern: Standard Names.   (line 2498)
--- 56896,56902 ----
  * source code, location information:     Guidelines for Diagnostics.
                                                               (line  183)
  * spaceshipM3 instruction pattern:       Standard Names.     (line 2890)
! * special:                               GTY Options.        (line  245)
  * special predicates:                    Predicates.         (line   31)
  * SPECS:                                 Target Fragment.    (line  194)
  * speculation_barrier instruction pattern: Standard Names.   (line 2498)
*************** Concept Index
*** 58020,58026 ****
  * use:                                   Side Effects.       (line  161)
  * used:                                  Flags.              (line  325)
  * used, in symbol_ref:                   Flags.              (line  211)
! * user:                                  GTY Options.        (line  253)
  * user experience guidelines:            User Experience Guidelines.
                                                               (line    6)
  * user gc:                               User GC.            (line    6)
--- 58020,58026 ----
  * use:                                   Side Effects.       (line  161)
  * used:                                  Flags.              (line  325)
  * used, in symbol_ref:                   Flags.              (line  211)
! * user:                                  GTY Options.        (line  252)
  * user experience guidelines:            User Experience Guidelines.
                                                               (line    6)
  * user gc:                               User GC.            (line    6)
*************** Concept Index
*** 58273,58732 ****
  
  Tag Table:
  Node: Top1789
! Node: Contributing5164
! Node: Portability5899
! Node: Interface7687
! Node: Libgcc10728
! Node: Integer library routines12555
! Node: Soft float library routines19523
! Node: Decimal float library routines31461
! Node: Fixed-point fractional library routines47219
! Node: Exception handling routines147615
! Node: Miscellaneous routines148722
! Node: Languages150842
! Node: Source Tree152389
! Node: Configure Terms152972
! Node: Top Level155928
! Node: gcc Directory159513
! Node: Subdirectories160465
! Node: Configuration162633
! Node: Config Fragments163353
! Node: System Config164578
! Node: Configuration Files165514
! Node: Build168130
! Node: Makefile168542
! Ref: Makefile-Footnote-1175317
! Ref: Makefile-Footnote-2175464
! Node: Library Files175538
! Node: Headers176100
! Node: Documentation178183
! Node: Texinfo Manuals179042
! Node: Man Page Generation181371
! Node: Miscellaneous Docs183284
! Node: Front End184671
! Node: Front End Directory188351
! Node: Front End Config189668
! Node: Front End Makefile192505
! Node: Back End196273
! Node: Testsuites201159
! Node: Test Idioms202148
! Node: Test Directives205546
! Node: Directives206073
! Node: Selectors218675
! Node: Effective-Target Keywords222003
! Ref: arm_fp_ok237201
! Ref: arm_fp_dp_ok237368
! Ref: arm_neon_ok238401
! Ref: arm_neon_ok_no_float_abi238570
! Ref: arm_neonv2_ok238737
! Ref: arm_fp16_ok238904
! Ref: arm_neon_fp16_ok239246
! Ref: arm_vfp3_ok240178
! Ref: arm_arch_v8a_hard_ok240321
! Ref: arm_v8_1a_neon_ok241071
! Ref: arm_v8_2a_fp16_scalar_ok241499
! Ref: arm_v8_2a_fp16_neon_ok241950
! Ref: arm_v8_2a_dotprod_neon_ok242425
! Ref: arm_fp16fml_neon_ok243070
! Ref: arm_coproc1_ok245640
! Ref: arm_coproc2_ok245766
! Ref: arm_coproc3_ok245994
! Ref: arm_simd32_ok246361
! Ref: arm_sat_ok246538
! Ref: arm_dsp_ok246719
! Ref: arm_softfp_ok246896
! Ref: arm_hard_ok246969
! Ref: arm_mve247036
! Ref: arm_v8_1_lob_ok247109
! Ref: stack_size_et261600
! Node: Add Options264186
! Ref: arm_fp16_ieee265424
! Ref: arm_fp16_alternative265679
! Ref: stack_size_ao268243
! Node: Require Support268605
! Node: Final Actions271507
! Node: Ada Tests281476
! Node: C Tests282639
! Node: LTO Testing287011
! Node: gcov Testing288654
! Node: profopt Testing291624
! Node: compat Testing293339
! Node: Torture Tests297579
! Node: GIMPLE Tests299213
! Node: RTL Tests300455
! Node: Options301761
! Node: Option file format302202
! Node: Option properties310685
! Node: Passes327629
! Node: Parsing pass328502
! Node: Gimplification pass332030
! Node: Pass manager333864
! Node: IPA passes335706
! Node: Small IPA passes336599
! Node: Regular IPA passes340049
! Node: Late IPA passes344851
! Node: Tree SSA passes345812
! Node: RTL passes367502
! Node: Optimization info379831
! Node: Dump setup380650
! Node: Optimization groups381780
! Node: Dump files and streams382759
! Node: Dump output verbosity383957
! Node: Dump types385013
! Node: Dump examples387356
! Node: poly_int388837
! Node: Overview of poly_int390317
! Node: Consequences of using poly_int392921
! Node: Comparisons involving poly_int394556
! Node: Comparison functions for poly_int396194
! Node: Properties of the poly_int comparisons397401
! Node: Comparing potentially-unordered poly_ints399843
! Node: Comparing ordered poly_ints400754
! Node: Checking for a poly_int marker value402778
! Node: Range checks on poly_ints403627
! Node: Sorting poly_ints406281
! Node: Arithmetic on poly_ints407054
! Node: Using poly_int with C++ arithmetic operators407855
! Node: wi arithmetic on poly_ints409386
! Node: Division of poly_ints410238
! Node: Other poly_int arithmetic411745
! Node: Alignment of poly_ints413151
! Node: Computing bounds on poly_ints416428
! Node: Converting poly_ints417817
! Node: Miscellaneous poly_int routines421364
! Node: Guidelines for using poly_int422004
! Node: GENERIC426936
! Node: Deficiencies428758
! Node: Tree overview428999
! Node: Macros and Functions433123
! Node: Identifiers433948
! Node: Containers435557
! Node: Types436714
! Node: Declarations449125
! Node: Working with declarations449620
! Node: Internal structure455224
! Node: Current structure hierarchy455608
! Node: Adding new DECL node types457701
! Node: Attributes461987
! Node: Expression trees463231
! Node: Constant expressions464985
! Node: Storage References471077
! Node: Unary and Binary Expressions474918
! Node: Vectors496251
! Node: Statements504741
! Node: Basic Statements505273
! Node: Blocks510048
! Node: Statement Sequences511749
! Node: Empty Statements512082
! Node: Jumps512656
! Node: Cleanups513309
! Node: OpenMP515350
! Node: OpenACC521197
! Node: Functions522314
! Node: Function Basics522785
! Node: Function Properties526469
! Node: Language-dependent trees529250
! Node: C and C++ Trees530137
! Node: Types for C++533022
! Node: Namespaces537992
! Node: Classes541098
! Node: Functions for C++546006
! Node: Statements for C and C++552263
! Node: C++ Expressions560770
! Node: GIMPLE562281
! Node: Tuple representation565946
! Node: Class hierarchy of GIMPLE statements572906
! Node: GIMPLE instruction set577894
! Node: GIMPLE Exception Handling579526
! Node: Temporaries581438
! Ref: Temporaries-Footnote-1582756
! Node: Operands582821
! Node: Compound Expressions583582
! Node: Compound Lvalues583816
! Node: Conditional Expressions584578
! Node: Logical Operators585237
! Node: Manipulating GIMPLE statements592599
! Node: Tuple specific accessors598181
! Node: GIMPLE_ASM598960
! Node: GIMPLE_ASSIGN601343
! Node: GIMPLE_BIND606047
! Node: GIMPLE_CALL607861
! Node: GIMPLE_CATCH612004
! Node: GIMPLE_COND613154
! Node: GIMPLE_DEBUG615949
! Node: GIMPLE_EH_FILTER620547
! Node: GIMPLE_LABEL622110
! Node: GIMPLE_GOTO622723
! Node: GIMPLE_NOP623246
! Node: GIMPLE_OMP_ATOMIC_LOAD623608
! Node: GIMPLE_OMP_ATOMIC_STORE624604
! Node: GIMPLE_OMP_CONTINUE625303
! Node: GIMPLE_OMP_CRITICAL626782
! Node: GIMPLE_OMP_FOR627776
! Node: GIMPLE_OMP_MASTER631192
! Node: GIMPLE_OMP_ORDERED631570
! Node: GIMPLE_OMP_PARALLEL631964
! Node: GIMPLE_OMP_RETURN634733
! Node: GIMPLE_OMP_SECTION635378
! Node: GIMPLE_OMP_SECTIONS636038
! Node: GIMPLE_OMP_SINGLE637648
! Node: GIMPLE_PHI638594
! Node: GIMPLE_RESX639873
! Node: GIMPLE_RETURN640592
! Node: GIMPLE_SWITCH641166
! Node: GIMPLE_TRY643041
! Node: GIMPLE_WITH_CLEANUP_EXPR644813
! Node: GIMPLE sequences645692
! Node: Sequence iterators648898
! Node: Adding a new GIMPLE statement code657355
! Node: Statement and operand traversals658704
! Node: Tree SSA661296
! Node: Annotations663084
! Node: SSA Operands663489
! Node: SSA677293
! Node: Alias analysis687000
! Node: Memory model690775
! Node: RTL692134
! Node: RTL Objects694376
! Node: RTL Classes698260
! Node: Accessors703558
! Node: Special Accessors705731
! Node: Flags711518
! Node: Machine Modes726781
! Node: Constants744348
! Node: Regs and Memory756147
! Node: Arithmetic773418
! Node: Comparisons783797
! Node: Bit-Fields787499
! Node: Vector Operations789050
! Node: Conversions791154
! Node: RTL Declarations795652
! Node: Side Effects796496
! Node: Incdec812984
! Node: Assembler816320
! Node: Debug Information817865
! Node: Insns819792
! Node: Calls845681
! Node: RTL SSA848274
! Node: Using RTL SSA849665
! Node: RTL SSA Instructions851582
! Ref: RTL SSA Instructions-Footnote-1852968
! Node: RTL SSA Basic Blocks853102
! Ref: real RTL SSA insns853570
! Ref: RTL SSA Basic Blocks-Footnote-1855792
! Node: RTL SSA Resources855926
! Node: RTL SSA Accesses857043
! Ref: RTL SSA Accesses-Footnote-1858744
! Node: RTL SSA Phi Nodes858887
! Node: RTL SSA Access Lists860891
! Node: Changing RTL Instructions865172
! Node: Changing One RTL SSA Instruction865781
! Node: Changing Multiple RTL SSA Instructions870717
! Node: Sharing874960
! Node: Reading RTL878116
! Node: Control Flow879108
! Node: Basic Blocks880876
! Node: Edges886330
! Node: Profile information894949
! Node: Maintaining the CFG899633
! Node: Liveness information905401
! Node: Loop Analysis and Representation907528
! Node: Loop representation908564
! Node: Loop querying916008
! Node: Loop manipulation918829
! Node: LCSSA921175
! Node: Scalar evolutions923244
! Node: loop-iv926488
! Node: Number of iterations928410
! Node: Dependency analysis932491
! Node: Machine Desc938843
! Node: Overview941406
! Node: Patterns943446
! Node: Example948413
! Node: RTL Template949874
! Node: Output Template960530
! Node: Output Statement964711
! Node: Predicates969050
! Node: Machine-Independent Predicates971968
! Node: Defining Predicates976913
! Node: Constraints982876
! Node: Simple Constraints984345
! Node: Multi-Alternative997185
! Node: Class Preferences1000394
! Node: Modifiers1001286
! Node: Machine Constraints1006020
! Node: Disable Insn Alternatives1069670
! Node: Define Constraints1073162
! Node: C Constraint Interface1081751
! Node: Standard Names1084878
! Ref: shift patterns1126501
! Ref: prologue instruction pattern1188171
! Ref: window_save instruction pattern1188664
! Ref: epilogue instruction pattern1188941
! Node: Pattern Ordering1212166
! Node: Dependent Patterns1213402
! Node: Jump Patterns1215022
! Node: Looping Patterns1216699
! Node: Insn Canonicalizations1222338
! Node: Expander Definitions1227535
! Node: Insn Splitting1235748
! Node: Including Patterns1250778
! Node: Peephole Definitions1252562
! Node: define_peephole1253815
! Node: define_peephole21260145
! Node: Insn Attributes1264234
! Node: Defining Attributes1265331
! Ref: define_enum_attr1268823
! Node: Expressions1269859
! Node: Tagging Insns1276609
! Node: Attr Example1280962
! Node: Insn Lengths1283335
! Node: Constant Attributes1286747
! Node: Mnemonic Attribute1287923
! Node: Delay Slots1289442
! Node: Processor pipeline description1292665
! Ref: Processor pipeline description-Footnote-11311477
! Node: Conditional Execution1311801
! Node: Define Subst1315284
! Node: Define Subst Example1317319
! Node: Define Subst Pattern Matching1320314
! Node: Define Subst Output Template1321540
! Node: Constant Definitions1323863
! Ref: define_enum1327722
! Node: Iterators1328210
! Node: Mode Iterators1328855
! Node: Defining Mode Iterators1329833
! Node: Substitutions1331327
! Node: Examples1333569
! Node: Code Iterators1335017
! Node: Int Iterators1338147
! Node: Subst Iterators1340611
! Node: Parameterized Names1342331
! Node: Target Macros1346349
! Node: Target Structure1349412
! Node: Driver1351904
! Node: Run-time Target1370877
! Node: Per-Function Data1380403
! Node: Storage Layout1383167
! Node: Type Layout1411064
! Node: Registers1424406
! Node: Register Basics1425380
! Node: Allocation Order1432942
! Node: Values in Registers1435426
! Node: Leaf Functions1442902
! Node: Stack Registers1445761
! Node: Register Classes1447034
! Node: Stack and Calling1481811
! Node: Frame Layout1482417
! Node: Exception Handling1494253
! Node: Stack Checking1500463
! Node: Frame Registers1506089
! Node: Elimination1514640
! Node: Stack Arguments1518496
! Node: Register Arguments1525949
! Node: Scalar Return1550509
! Node: Aggregate Return1556965
! Node: Caller Saves1561519
! Node: Function Entry1562261
! Node: Profiling1573813
! Node: Tail Calls1575923
! Node: Shrink-wrapping separate components1577833
! Node: Stack Smashing Protection1580874
! Node: Miscellaneous Register Hooks1583363
! Node: Varargs1584228
! Node: Trampolines1592114
! Node: Library Calls1601807
! Node: Addressing Modes1606894
! Node: Anchored Addresses1637513
! Node: Condition Code1640156
! Node: MODE_CC Condition Codes1642001
! Node: Costs1648764
! Node: Scheduling1671084
! Node: Sections1695006
! Node: PIC1711376
! Node: Assembler Format1713435
! Node: File Framework1714573
! Ref: TARGET_HAVE_SWITCHABLE_BSS_SECTIONS1722172
! Node: Data Output1723847
! Node: Uninitialized Data1732135
! Node: Label Output1737150
! Node: Initialization1761763
! Node: Macros for Initialization1767724
! Node: Instruction Output1774875
! Node: Dispatch Tables1785505
! Node: Exception Region Output1791256
! Node: Alignment Output1798338
! Node: Debugging Info1802025
! Node: All Debuggers1802783
! Node: DBX Options1805555
! Node: DBX Hooks1810993
! Node: File Names and DBX1812302
! Node: DWARF1814406
! Node: VMS Debug1820221
! Node: CTF Debug1820818
! Node: BTF Debug1821179
! Node: Floating Point1821522
! Node: Mode Switching1824277
! Node: Target Attributes1828714
! Node: Emulated TLS1840117
! Node: MIPS Coprocessors1843507
! Node: PCH Target1844666
! Node: C++ ABI1846508
! Node: D Language and ABI1851300
! Node: Named Address Spaces1854243
! Node: Misc1860170
! Ref: TARGET_SHIFT_TRUNCATION_MASK1868041
! Node: Host Config1929317
! Node: Host Common1930386
! Node: Filesystem1932760
! Node: Host Misc1936875
! Node: Fragments1939324
! Node: Target Fragment1940519
! Node: Host Fragment1951331
! Node: Collect21951571
! Node: Header Dirs1954207
! Node: Type Information1955630
! Node: GTY Options1959161
! Node: Inheritance and GTY1970774
! Ref: Inheritance and GTY-Footnote-11972339
! Node: User GC1972609
! Node: GGC Roots1976360
! Node: Files1977073
! Node: Invoking the garbage collector1979704
! Node: Troubleshooting1981346
! Node: Plugins1982421
! Node: Plugins loading1983550
! Node: Plugin API1984649
! Node: Plugins pass1992516
! Node: Plugins GC1994487
! Node: Plugins description1996204
! Node: Plugins attr1996740
! Node: Plugins recording1999020
! Node: Plugins gate1999870
! Node: Plugins tracking2000461
! Node: Plugins building2001049
! Node: LTO2004552
! Node: LTO Overview2005424
! Node: LTO object file layout2011180
! Node: IPA2015824
! Node: WHOPR2024876
! Node: Internal flags2029436
! Node: Match and Simplify2030847
! Node: GIMPLE API2031817
! Node: The Language2034619
! Node: Static Analyzer2047246
! Node: Analyzer Internals2047511
! Node: Debugging the Analyzer2063281
! Node: User Experience Guidelines2066849
! Node: Guidelines for Diagnostics2067785
! Ref: input_location_example2075960
! Node: Guidelines for Options2085645
! Node: Funding2085822
! Node: GNU Project2088329
! Node: Copying2088980
! Node: GNU Free Documentation License2126494
! Node: Contributors2151617
! Node: Option Index2192594
! Node: Concept Index2193471
  
  End Tag Table
--- 58273,58737 ----
  
  Tag Table:
  Node: Top1789
! Node: Contributing5176
! Node: Portability5911
! Node: Interface7699
! Node: Libgcc10740
! Node: Integer library routines12567
! Node: Soft float library routines19535
! Node: Decimal float library routines31473
! Node: Fixed-point fractional library routines47231
! Node: Exception handling routines147627
! Node: Miscellaneous routines148734
! Node: Languages150854
! Node: Source Tree152401
! Node: Configure Terms152984
! Node: Top Level155940
! Node: gcc Directory159525
! Node: Subdirectories160477
! Node: Configuration162645
! Node: Config Fragments163365
! Node: System Config164590
! Node: Configuration Files165526
! Node: Build168142
! Node: Makefile168554
! Ref: Makefile-Footnote-1175329
! Ref: Makefile-Footnote-2175476
! Node: Library Files175550
! Node: Headers176112
! Node: Documentation178195
! Node: Texinfo Manuals179054
! Node: Man Page Generation181383
! Node: Miscellaneous Docs183296
! Node: Front End184683
! Node: Front End Directory188363
! Node: Front End Config189680
! Node: Front End Makefile192517
! Node: Back End196285
! Node: Testsuites201171
! Node: Test Idioms202160
! Node: Test Directives205558
! Node: Directives206085
! Node: Selectors218687
! Node: Effective-Target Keywords222015
! Ref: arm_fp_ok237213
! Ref: arm_fp_dp_ok237380
! Ref: arm_neon_ok238413
! Ref: arm_neon_ok_no_float_abi238582
! Ref: arm_neonv2_ok238749
! Ref: arm_fp16_ok238916
! Ref: arm_neon_fp16_ok239258
! Ref: arm_vfp3_ok240190
! Ref: arm_arch_v8a_hard_ok240333
! Ref: arm_v8_1a_neon_ok241083
! Ref: arm_v8_2a_fp16_scalar_ok241511
! Ref: arm_v8_2a_fp16_neon_ok241962
! Ref: arm_v8_2a_dotprod_neon_ok242437
! Ref: arm_fp16fml_neon_ok243082
! Ref: arm_coproc1_ok245652
! Ref: arm_coproc2_ok245778
! Ref: arm_coproc3_ok246006
! Ref: arm_simd32_ok246373
! Ref: arm_sat_ok246550
! Ref: arm_dsp_ok246731
! Ref: arm_softfp_ok246908
! Ref: arm_hard_ok246981
! Ref: arm_mve247048
! Ref: arm_v8_1_lob_ok247121
! Ref: stack_size_et261612
! Node: Add Options264198
! Ref: arm_fp16_ieee265436
! Ref: arm_fp16_alternative265691
! Ref: stack_size_ao268255
! Node: Require Support268617
! Node: Final Actions271519
! Node: Ada Tests281488
! Node: C Tests282651
! Node: LTO Testing287023
! Node: gcov Testing288666
! Node: profopt Testing291636
! Node: compat Testing293351
! Node: Torture Tests297591
! Node: GIMPLE Tests299225
! Node: RTL Tests300467
! Node: Options301773
! Node: Option file format302214
! Node: Option properties310697
! Node: Passes327641
! Node: Parsing pass328514
! Node: Gimplification pass332042
! Node: Pass manager333876
! Node: IPA passes335718
! Node: Small IPA passes336611
! Node: Regular IPA passes340061
! Node: Late IPA passes344863
! Node: Tree SSA passes345824
! Node: RTL passes367514
! Node: Optimization info379843
! Node: Dump setup380662
! Node: Optimization groups381792
! Node: Dump files and streams382771
! Node: Dump output verbosity383969
! Node: Dump types385025
! Node: Dump examples387368
! Node: poly_int388849
! Node: Overview of poly_int390329
! Node: Consequences of using poly_int392933
! Node: Comparisons involving poly_int394568
! Node: Comparison functions for poly_int396206
! Node: Properties of the poly_int comparisons397413
! Node: Comparing potentially-unordered poly_ints399855
! Node: Comparing ordered poly_ints400766
! Node: Checking for a poly_int marker value402790
! Node: Range checks on poly_ints403639
! Node: Sorting poly_ints406293
! Node: Arithmetic on poly_ints407066
! Node: Using poly_int with C++ arithmetic operators407867
! Node: wi arithmetic on poly_ints409398
! Node: Division of poly_ints410250
! Node: Other poly_int arithmetic411757
! Node: Alignment of poly_ints413163
! Node: Computing bounds on poly_ints416440
! Node: Converting poly_ints417829
! Node: Miscellaneous poly_int routines421376
! Node: Guidelines for using poly_int422016
! Node: GENERIC426948
! Node: Deficiencies428770
! Node: Tree overview429011
! Node: Macros and Functions433135
! Node: Identifiers433960
! Node: Containers435569
! Node: Types436726
! Node: Declarations449137
! Node: Working with declarations449632
! Node: Internal structure455236
! Node: Current structure hierarchy455620
! Node: Adding new DECL node types457713
! Node: Attributes461999
! Node: Expression trees463243
! Node: Constant expressions464997
! Node: Storage References471089
! Node: Unary and Binary Expressions474930
! Node: Vectors496263
! Node: Statements504753
! Node: Basic Statements505285
! Node: Blocks510060
! Node: Statement Sequences511761
! Node: Empty Statements512094
! Node: Jumps512668
! Node: Cleanups513321
! Node: OpenMP515362
! Node: OpenACC521209
! Node: Functions522326
! Node: Function Basics522797
! Node: Function Properties526481
! Node: Language-dependent trees529262
! Node: C and C++ Trees530149
! Node: Types for C++533034
! Node: Namespaces538004
! Node: Classes541110
! Node: Functions for C++546018
! Node: Statements for C and C++552275
! Node: C++ Expressions560782
! Node: GIMPLE562293
! Node: Tuple representation565958
! Node: Class hierarchy of GIMPLE statements572918
! Node: GIMPLE instruction set577906
! Node: GIMPLE Exception Handling579538
! Node: Temporaries581450
! Ref: Temporaries-Footnote-1582768
! Node: Operands582833
! Node: Compound Expressions583594
! Node: Compound Lvalues583828
! Node: Conditional Expressions584590
! Node: Logical Operators585249
! Node: Manipulating GIMPLE statements592611
! Node: Tuple specific accessors598193
! Node: GIMPLE_ASM598972
! Node: GIMPLE_ASSIGN601355
! Node: GIMPLE_BIND606059
! Node: GIMPLE_CALL607873
! Node: GIMPLE_CATCH612014
! Node: GIMPLE_COND613164
! Node: GIMPLE_DEBUG615959
! Node: GIMPLE_EH_FILTER620557
! Node: GIMPLE_LABEL622120
! Node: GIMPLE_GOTO622733
! Node: GIMPLE_NOP623256
! Node: GIMPLE_OMP_ATOMIC_LOAD623618
! Node: GIMPLE_OMP_ATOMIC_STORE624614
! Node: GIMPLE_OMP_CONTINUE625313
! Node: GIMPLE_OMP_CRITICAL626792
! Node: GIMPLE_OMP_FOR627786
! Node: GIMPLE_OMP_MASTER631202
! Node: GIMPLE_OMP_ORDERED631580
! Node: GIMPLE_OMP_PARALLEL631974
! Node: GIMPLE_OMP_RETURN634743
! Node: GIMPLE_OMP_SECTION635388
! Node: GIMPLE_OMP_SECTIONS636048
! Node: GIMPLE_OMP_SINGLE637658
! Node: GIMPLE_PHI638604
! Node: GIMPLE_RESX639883
! Node: GIMPLE_RETURN640602
! Node: GIMPLE_SWITCH641176
! Node: GIMPLE_TRY643049
! Node: GIMPLE_WITH_CLEANUP_EXPR644821
! Node: GIMPLE sequences645700
! Node: Sequence iterators648906
! Node: Adding a new GIMPLE statement code657363
! Node: Statement and operand traversals658712
! Node: Tree SSA661304
! Node: Annotations663092
! Node: SSA Operands663497
! Node: SSA677301
! Node: Alias analysis687008
! Node: Memory model690783
! Node: RTL692142
! Node: RTL Objects694384
! Node: RTL Classes698268
! Node: Accessors703566
! Node: Special Accessors705739
! Node: Flags711526
! Node: Machine Modes726789
! Node: Constants744356
! Node: Regs and Memory756155
! Node: Arithmetic773426
! Node: Comparisons783805
! Node: Bit-Fields787507
! Node: Vector Operations789058
! Node: Conversions791162
! Node: RTL Declarations795660
! Node: Side Effects796504
! Node: Incdec812992
! Node: Assembler816328
! Node: Debug Information817873
! Node: Insns819800
! Node: Calls845689
! Node: RTL SSA848282
! Node: Using RTL SSA849673
! Node: RTL SSA Instructions851590
! Ref: RTL SSA Instructions-Footnote-1852976
! Node: RTL SSA Basic Blocks853110
! Ref: real RTL SSA insns853578
! Ref: RTL SSA Basic Blocks-Footnote-1855800
! Node: RTL SSA Resources855934
! Node: RTL SSA Accesses857051
! Ref: RTL SSA Accesses-Footnote-1858752
! Node: RTL SSA Phi Nodes858895
! Node: RTL SSA Access Lists860899
! Node: Changing RTL Instructions865180
! Node: Changing One RTL SSA Instruction865789
! Node: Changing Multiple RTL SSA Instructions870725
! Node: Sharing874968
! Node: Reading RTL878124
! Node: Control Flow879116
! Node: Basic Blocks880884
! Node: Edges886338
! Node: Profile information894957
! Node: Maintaining the CFG899641
! Node: Liveness information905409
! Node: Loop Analysis and Representation907536
! Node: Loop representation908572
! Node: Loop querying916016
! Node: Loop manipulation918837
! Node: LCSSA921183
! Node: Scalar evolutions923252
! Node: loop-iv926496
! Node: Number of iterations928418
! Node: Dependency analysis932499
! Node: Machine Desc938851
! Node: Overview941414
! Node: Patterns943454
! Node: Example948421
! Node: RTL Template949882
! Node: Output Template960538
! Node: Output Statement964719
! Node: Predicates969058
! Node: Machine-Independent Predicates971976
! Node: Defining Predicates976921
! Node: Constraints982884
! Node: Simple Constraints984353
! Node: Multi-Alternative997193
! Node: Class Preferences1000402
! Node: Modifiers1001294
! Node: Machine Constraints1006028
! Node: Disable Insn Alternatives1069678
! Node: Define Constraints1073170
! Node: C Constraint Interface1081759
! Node: Standard Names1084886
! Ref: shift patterns1126509
! Ref: prologue instruction pattern1188179
! Ref: window_save instruction pattern1188672
! Ref: epilogue instruction pattern1188949
! Node: Pattern Ordering1212174
! Node: Dependent Patterns1213410
! Node: Jump Patterns1215030
! Node: Looping Patterns1216707
! Node: Insn Canonicalizations1222346
! Node: Expander Definitions1227543
! Node: Insn Splitting1235756
! Node: Including Patterns1250786
! Node: Peephole Definitions1252570
! Node: define_peephole1253823
! Node: define_peephole21260153
! Node: Insn Attributes1264242
! Node: Defining Attributes1265339
! Ref: define_enum_attr1268831
! Node: Expressions1269867
! Node: Tagging Insns1276617
! Node: Attr Example1280970
! Node: Insn Lengths1283343
! Node: Constant Attributes1286755
! Node: Mnemonic Attribute1287931
! Node: Delay Slots1289450
! Node: Processor pipeline description1292673
! Ref: Processor pipeline description-Footnote-11311485
! Node: Conditional Execution1311809
! Node: Define Subst1315292
! Node: Define Subst Example1317327
! Node: Define Subst Pattern Matching1320322
! Node: Define Subst Output Template1321548
! Node: Constant Definitions1323871
! Ref: define_enum1327730
! Node: Iterators1328218
! Node: Mode Iterators1328863
! Node: Defining Mode Iterators1329841
! Node: Substitutions1331335
! Node: Examples1333577
! Node: Code Iterators1335025
! Node: Int Iterators1338155
! Node: Subst Iterators1340619
! Node: Parameterized Names1342339
! Node: Target Macros1346357
! Node: Target Structure1349420
! Node: Driver1351912
! Node: Run-time Target1370885
! Node: Per-Function Data1380411
! Node: Storage Layout1383175
! Node: Type Layout1411072
! Node: Registers1424414
! Node: Register Basics1425388
! Node: Allocation Order1432950
! Node: Values in Registers1435434
! Node: Leaf Functions1442910
! Node: Stack Registers1445769
! Node: Register Classes1447042
! Node: Stack and Calling1481819
! Node: Frame Layout1482425
! Node: Exception Handling1494261
! Node: Stack Checking1500471
! Node: Frame Registers1506097
! Node: Elimination1514648
! Node: Stack Arguments1518504
! Node: Register Arguments1525957
! Node: Scalar Return1550517
! Node: Aggregate Return1556973
! Node: Caller Saves1561527
! Node: Function Entry1562269
! Node: Profiling1573821
! Node: Tail Calls1575931
! Node: Shrink-wrapping separate components1577841
! Node: Stack Smashing Protection1580882
! Node: Miscellaneous Register Hooks1583371
! Node: Varargs1584236
! Node: Trampolines1592122
! Node: Library Calls1601815
! Node: Addressing Modes1606902
! Node: Anchored Addresses1637521
! Node: Condition Code1640164
! Node: MODE_CC Condition Codes1642009
! Node: Costs1648772
! Node: Scheduling1671092
! Node: Sections1695014
! Node: PIC1711384
! Node: Assembler Format1713443
! Node: File Framework1714581
! Ref: TARGET_HAVE_SWITCHABLE_BSS_SECTIONS1722180
! Node: Data Output1723855
! Node: Uninitialized Data1732143
! Node: Label Output1737158
! Node: Initialization1761771
! Node: Macros for Initialization1767732
! Node: Instruction Output1774883
! Node: Dispatch Tables1785513
! Node: Exception Region Output1791264
! Node: Alignment Output1798346
! Node: Debugging Info1802033
! Node: All Debuggers1802791
! Node: DBX Options1805563
! Node: DBX Hooks1811001
! Node: File Names and DBX1812310
! Node: DWARF1814414
! Node: VMS Debug1820229
! Node: CTF Debug1820826
! Node: BTF Debug1821187
! Node: Floating Point1821530
! Node: Mode Switching1824285
! Node: Target Attributes1828722
! Node: Emulated TLS1840125
! Node: MIPS Coprocessors1843515
! Node: PCH Target1844674
! Node: C++ ABI1846516
! Node: D Language and ABI1851308
! Node: Named Address Spaces1854251
! Node: Misc1860178
! Ref: TARGET_SHIFT_TRUNCATION_MASK1868049
! Node: Host Config1929325
! Node: Host Common1930394
! Node: Filesystem1932768
! Node: Host Misc1936883
! Node: Fragments1939332
! Node: Target Fragment1940527
! Node: Host Fragment1951339
! Node: Collect21951579
! Node: Header Dirs1954215
! Node: Type Information1955638
! Node: GTY Options1959169
! Node: Inheritance and GTY1970782
! Ref: Inheritance and GTY-Footnote-11972347
! Node: User GC1972617
! Node: GGC Roots1976368
! Node: Files1977081
! Node: Invoking the garbage collector1979712
! Node: Troubleshooting1981354
! Node: Plugins1982429
! Node: Plugins loading1983558
! Node: Plugin API1984657
! Node: Plugins pass1992524
! Node: Plugins GC1994495
! Node: Plugins description1996212
! Node: Plugins attr1996748
! Node: Plugins recording1999028
! Node: Plugins gate1999878
! Node: Plugins tracking2000469
! Node: Plugins building2001057
! Node: LTO2004560
! Node: LTO Overview2005432
! Node: LTO object file layout2011188
! Node: IPA2015832
! Node: WHOPR2024884
! Node: Internal flags2029444
! Node: Match and Simplify2030855
! Node: GIMPLE API2031825
! Node: The Language2034627
! Node: Static Analyzer2047254
! Node: Analyzer Internals2047519
! Node: Debugging the Analyzer2063289
! Node: User Experience Guidelines2066857
! Node: Guidelines for Diagnostics2067793
! Ref: input_location_example2075968
! Node: Guidelines for Options2085653
! Node: Funding2085830
! Node: GNU Project2088337
! Node: Copying2088988
! Node: GNU Free Documentation License2126502
! Node: Contributors2151625
! Node: Option Index2192602
! Node: Concept Index2193479
  
  End Tag Table
+ 
+ 
+ Local Variables:
+ coding: utf-8
+ End:
diff -Nrcpad gcc-12.3.0/gcc/doc/gcov-dump.1 gcc-12.4.0/gcc/doc/gcov-dump.1
*** gcc-12.3.0/gcc/doc/gcov-dump.1	Mon May  8 12:16:07 2023
--- gcc-12.4.0/gcc/doc/gcov-dump.1	Thu Jun 20 08:11:52 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "GCOV-DUMP 1"
! .TH GCOV-DUMP 1 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "GCOV-DUMP 1"
! .TH GCOV-DUMP 1 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** any later version published by the Free
*** 197,203 ****
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fIgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
--- 201,207 ----
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fBgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
diff -Nrcpad gcc-12.3.0/gcc/doc/gcov-tool.1 gcc-12.4.0/gcc/doc/gcov-tool.1
*** gcc-12.3.0/gcc/doc/gcov-tool.1	Mon May  8 12:16:07 2023
--- gcc-12.4.0/gcc/doc/gcov-tool.1	Thu Jun 20 08:11:52 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "GCOV-TOOL 1"
! .TH GCOV-TOOL 1 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "GCOV-TOOL 1"
! .TH GCOV-TOOL 1 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** Set the verbose mode.
*** 340,346 ****
  .RE
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7), \fIgcc\fR\|(1), \fIgcov\fR\|(1) and the Info entry for
  \&\fIgcc\fR.
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
--- 344,350 ----
  .RE
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fBgpl\fR\|(7), \fBgfdl\fR\|(7), \fBfsf\-funding\fR\|(7), \fBgcc\fR\|(1), \fBgcov\fR\|(1) and the Info entry for
  \&\fIgcc\fR.
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
*************** any later version published by the Free
*** 352,358 ****
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fIgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
--- 356,362 ----
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fBgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
diff -Nrcpad gcc-12.3.0/gcc/doc/gcov.1 gcc-12.4.0/gcc/doc/gcov.1
*** gcc-12.3.0/gcc/doc/gcov.1	Mon May  8 12:16:07 2023
--- gcc-12.4.0/gcc/doc/gcov.1	Thu Jun 20 08:11:52 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "GCOV 1"
! .TH GCOV 1 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "GCOV 1"
! .TH GCOV 1 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** That can help users to find profile clas
*** 1013,1019 ****
  to a misleading profile.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7), \fIgcc\fR\|(1) and the Info entry for \fIgcc\fR.
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 1996\-2022 Free Software Foundation, Inc.
--- 1017,1023 ----
  to a misleading profile.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fBgpl\fR\|(7), \fBgfdl\fR\|(7), \fBfsf\-funding\fR\|(7), \fBgcc\fR\|(1) and the Info entry for \fIgcc\fR.
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 1996\-2022 Free Software Foundation, Inc.
*************** any later version published by the Free
*** 1024,1030 ****
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fIgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
--- 1028,1034 ----
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fBgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
diff -Nrcpad gcc-12.3.0/gcc/doc/generic.texi gcc-12.4.0/gcc/doc/generic.texi
*** gcc-12.3.0/gcc/doc/generic.texi	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/doc/generic.texi	Thu Jun 20 08:08:06 2024
*************** vector.  For example @{ 0, 1 @} could be
*** 1144,1150 ****
  one element each or one pattern with two elements (@var{base0} and
  @var{base1}).  The canonical encoding is always the one with the
  fewest patterns or (if both encodings have the same number of
! petterns) the one with the fewest encoded elements.
  
  @samp{vector_cst_encoding_nelts (@var{v})} gives the total number of
  encoded elements in @var{v}, which is 6 in the example above.
--- 1144,1150 ----
  one element each or one pattern with two elements (@var{base0} and
  @var{base1}).  The canonical encoding is always the one with the
  fewest patterns or (if both encodings have the same number of
! patterns) the one with the fewest encoded elements.
  
  @samp{vector_cst_encoding_nelts (@var{v})} gives the total number of
  encoded elements in @var{v}, which is 6 in the example above.
diff -Nrcpad gcc-12.3.0/gcc/doc/gfdl.7 gcc-12.4.0/gcc/doc/gfdl.7
*** gcc-12.3.0/gcc/doc/gfdl.7	Mon May  8 12:16:07 2023
--- gcc-12.4.0/gcc/doc/gfdl.7	Thu Jun 20 08:11:52 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "GFDL 7"
! .TH GFDL 7 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "GFDL 7"
! .TH GFDL 7 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** free software license, such as the \s-1G
*** 637,643 ****
  to permit their use in free software.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fIgpl\fR\|(7), \fIfsf\-funding\fR\|(7).
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
--- 641,647 ----
  to permit their use in free software.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fBgpl\fR\|(7), \fBfsf\-funding\fR\|(7).
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
diff -Nrcpad gcc-12.3.0/gcc/doc/gfortran.1 gcc-12.4.0/gcc/doc/gfortran.1
*** gcc-12.3.0/gcc/doc/gfortran.1	Mon May  8 12:27:46 2023
--- gcc-12.4.0/gcc/doc/gfortran.1	Thu Jun 20 08:26:15 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "GFORTRAN 1"
! .TH GFORTRAN 1 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "GFORTRAN 1"
! .TH GFORTRAN 1 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** For instructions on reporting bugs, see
*** 1777,1784 ****
  <\fBhttps://gcc.gnu.org/bugs/\fR>.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
! \&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIgcc\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIdbx\fR\|(1)
  and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIgfortran\fR, \fIas\fR,
  \&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
  .SH "AUTHOR"
--- 1781,1788 ----
  <\fBhttps://gcc.gnu.org/bugs/\fR>.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fBgpl\fR\|(7), \fBgfdl\fR\|(7), \fBfsf\-funding\fR\|(7),
! \&\fBcpp\fR\|(1), \fBgcov\fR\|(1), \fBgcc\fR\|(1), \fBas\fR\|(1), \fBld\fR\|(1), \fBgdb\fR\|(1), \fBdbx\fR\|(1)
  and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIgfortran\fR, \fIas\fR,
  \&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
  .SH "AUTHOR"
*************** under the terms of the \s-1GNU\s0 Free D
*** 1794,1800 ****
  any later version published by the Free Software Foundation; with the
  Invariant Sections being \*(L"Funding Free Software\*(R", the Front-Cover
  Texts being (a) (see below), and with the Back-Cover Texts being (b)
! (see below).  A copy of the license is included in the \fIgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
--- 1798,1804 ----
  any later version published by the Free Software Foundation; with the
  Invariant Sections being \*(L"Funding Free Software\*(R", the Front-Cover
  Texts being (a) (see below), and with the Back-Cover Texts being (b)
! (see below).  A copy of the license is included in the \fBgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
diff -Nrcpad gcc-12.3.0/gcc/doc/gpl.7 gcc-12.4.0/gcc/doc/gpl.7
*** gcc-12.3.0/gcc/doc/gpl.7	Mon May  8 12:16:07 2023
--- gcc-12.4.0/gcc/doc/gpl.7	Thu Jun 20 08:11:52 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "GPL 7"
! .TH GPL 7 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "GPL 7"
! .TH GPL 7 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** the \s-1GNU\s0 Lesser General Public Lic
*** 837,843 ****
  first, please read <\fBhttps://www.gnu.org/licenses/why\-not\-lgpl.html\fR>.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7).
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 2007 Free Software Foundation, Inc.
--- 841,847 ----
  first, please read <\fBhttps://www.gnu.org/licenses/why\-not\-lgpl.html\fR>.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fBgfdl\fR\|(7), \fBfsf\-funding\fR\|(7).
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 2007 Free Software Foundation, Inc.
diff -Nrcpad gcc-12.3.0/gcc/doc/install.texi gcc-12.4.0/gcc/doc/install.texi
*** gcc-12.3.0/gcc/doc/install.texi	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/doc/install.texi	Thu Jun 20 08:08:06 2024
*************** tables.
*** 375,380 ****
--- 375,383 ----
  
  Used by @command{automake}.
  
+ If available, enables parallel testing of @samp{libgomp} in case that
+ @command{flock} is not available.
+ 
  @end table
  
  Several support libraries are necessary to build GCC, some are required,
diff -Nrcpad gcc-12.3.0/gcc/doc/invoke.texi gcc-12.4.0/gcc/doc/invoke.texi
*** gcc-12.3.0/gcc/doc/invoke.texi	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/doc/invoke.texi	Thu Jun 20 08:08:06 2024
*************** Objective-C and Objective-C++ Dialects}.
*** 1004,1010 ****
  -mcond-move-float  -mno-cond-move-float @gol
  -memcpy  -mno-memcpy -mstrict-align -mno-strict-align @gol
  -mmax-inline-memcpy-size=@var{n} @gol
! -mcmodel=@var{code-model}}
  
  @emph{M32R/D Options}
  @gccoptlist{-m32r2  -m32rx  -m32r @gol
--- 1004,1010 ----
  -mcond-move-float  -mno-cond-move-float @gol
  -memcpy  -mno-memcpy -mstrict-align -mno-strict-align @gol
  -mmax-inline-memcpy-size=@var{n} @gol
! -mcmodel=@var{code-model} -mrelax -mpass-mrelax-to-as}
  
  @emph{M32R/D Options}
  @gccoptlist{-m32r2  -m32rx  -m32r @gol
*************** See RS/6000 and PowerPC Options.
*** 1434,1440 ****
  -m96bit-long-double  -mlong-double-64  -mlong-double-80  -mlong-double-128 @gol
  -mregparm=@var{num}  -msseregparm @gol
  -mveclibabi=@var{type}  -mvect8-ret-in-mem @gol
! -mpc32  -mpc64  -mpc80  -mstackrealign @gol
  -momit-leaf-frame-pointer  -mno-red-zone  -mno-tls-direct-seg-refs @gol
  -mcmodel=@var{code-model}  -mabi=@var{name}  -maddress-mode=@var{mode} @gol
  -m32  -m64  -mx32  -m16  -miamcu  -mlarge-data-threshold=@var{num} @gol
--- 1434,1440 ----
  -m96bit-long-double  -mlong-double-64  -mlong-double-80  -mlong-double-128 @gol
  -mregparm=@var{num}  -msseregparm @gol
  -mveclibabi=@var{type}  -mvect8-ret-in-mem @gol
! -mpc32  -mpc64  -mpc80 -mdaz-ftz -mstackrealign @gol
  -momit-leaf-frame-pointer  -mno-red-zone  -mno-tls-direct-seg-refs @gol
  -mcmodel=@var{code-model}  -mabi=@var{name}  -maddress-mode=@var{mode} @gol
  -m32  -m64  -mx32  -m16  -miamcu  -mlarge-data-threshold=@var{num} @gol
*************** and Objective-C++ programs:
*** 4521,4530 ****
  Use @var{class-name} as the name of the class to instantiate for each
  literal string specified with the syntax @code{@@"@dots{}"}.  The default
  class name is @code{NXConstantString} if the GNU runtime is being used, and
! @code{NSConstantString} if the NeXT runtime is being used (see below).  The
! @option{-fconstant-cfstrings} option, if also present, overrides the
! @option{-fconstant-string-class} setting and cause @code{@@"@dots{}"} literals
! to be laid out as constant CoreFoundation strings.
  
  @item -fgnu-runtime
  @opindex fgnu-runtime
--- 4521,4532 ----
  Use @var{class-name} as the name of the class to instantiate for each
  literal string specified with the syntax @code{@@"@dots{}"}.  The default
  class name is @code{NXConstantString} if the GNU runtime is being used, and
! @code{NSConstantString} if the NeXT runtime is being used (see below).  On
! Darwin (macOS, MacOS X) platforms, the @option{-fconstant-cfstrings} option, if
! also present, overrides the @option{-fconstant-string-class} setting and cause
! @code{@@"@dots{}"} literals to be laid out as constant CoreFoundation strings.
! Note that @option{-fconstant-cfstrings} is an alias for the target-specific
! @option{-mconstant-cfstrings} equivalent.
  
  @item -fgnu-runtime
  @opindex fgnu-runtime
*************** This warning is enabled by @option{-Wall
*** 6647,6653 ****
  @item -Wmissing-include-dirs @r{(C, C++, Objective-C, Objective-C++ and Fortran only)}
  @opindex Wmissing-include-dirs
  @opindex Wno-missing-include-dirs
! Warn if a user-supplied include directory does not exist. This opions is disabled
  by default for C, C++, Objective-C and Objective-C++. For Fortran, it is partially
  enabled by default by warning for -I and -J, only.
  
--- 6649,6655 ----
  @item -Wmissing-include-dirs @r{(C, C++, Objective-C, Objective-C++ and Fortran only)}
  @opindex Wmissing-include-dirs
  @opindex Wno-missing-include-dirs
! Warn if a user-supplied include directory does not exist. This option is disabled
  by default for C, C++, Objective-C and Objective-C++. For Fortran, it is partially
  enabled by default by warning for -I and -J, only.
  
*************** performance of the code.  Permissible va
*** 19216,19222 ****
  @samp{cortex-a75.cortex-a55}, @samp{cortex-a76.cortex-a55},
  @samp{cortex-r82}, @samp{cortex-x1}, @samp{cortex-x2},
  @samp{cortex-a510}, @samp{cortex-a710}, @samp{ampere1},
! @samp{ampere1a}, @samp{native}.
  
  The values @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53},
  @samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53},
--- 19218,19224 ----
  @samp{cortex-a75.cortex-a55}, @samp{cortex-a76.cortex-a55},
  @samp{cortex-r82}, @samp{cortex-x1}, @samp{cortex-x2},
  @samp{cortex-a510}, @samp{cortex-a710}, @samp{ampere1},
! @samp{ampere1a}, @samp{cobalt-100} and @samp{native}.
  
  The values @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53},
  @samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53},
*************** This is by default ON@.
*** 22804,22813 ****
  @opindex gfull
  Emit debugging information for all symbols and types.
  
  @item -mmacosx-version-min=@var{version}
! The earliest version of MacOS X that this executable will run on
! is @var{version}.  Typical values of @var{version} include @code{10.1},
! @code{10.2}, and @code{10.3.9}.
  
  If the compiler was built to use the system's headers by default,
  then the default for this option is the system version on which the
--- 22806,22826 ----
  @opindex gfull
  Emit debugging information for all symbols and types.
  
+ @opindex fconstant-cfstrings
+ @item -fconstant-cfstrings
+ The @option{-fconstant-cfstrings} is an alias for @option{-mconstant-cfstrings}.
+ 
+ @opindex mconstant-cfstrings
+ @item -mconstant-cfstrings
+ When the NeXT runtime is being used (the default on these systems), override
+ any @option{-fconstant-string-class} setting and cause @code{@@"@dots{}"}
+ literals to be laid out as constant CoreFoundation strings.
+ 
+ @opindex mmacosx-version-min
  @item -mmacosx-version-min=@var{version}
! The earliest version of MacOS X that this executable will run on is
! @var{version}.  Typical values supported for @var{version} include @code{12},
! @code{10.12}, and @code{10.5.8}.
  
  If the compiler was built to use the system's headers by default,
  then the default for this option is the system version on which the
*************** global symbol: The data got table must b
*** 24626,24631 ****
--- 24639,24666 ----
  @end itemize
  @end table
  The default code model is @code{normal}.
+ 
+ @item -mrelax
+ @itemx -mno-relax
+ Take (do not take) advantage of linker relaxations.  If
+ @option{-mpass-mrelax-to-as} is enabled, this option is also passed to
+ the assembler.  The default is determined during GCC build-time by
+ detecting corresponding assembler support:
+ @option{-mrelax} if the assembler supports both the @option{-mrelax}
+ option and the conditional branch relaxation (it's required or the
+ @code{.align} directives and conditional branch instructions in the
+ assembly code outputted by GCC may be rejected by the assembler because
+ of a relocation overflow), @option{-mno-relax} otherwise.
+ 
+ @item -mpass-mrelax-to-as
+ @itemx -mno-pass-mrelax-to-as
+ Pass (do not pass) the @option{-mrelax} or @option{-mno-relax} option
+ to the assembler.  The default is determined during GCC build-time by
+ detecting corresponding assembler support:
+ @option{-mpass-mrelax-to-as} if the assembler supports the
+ @option{-mrelax} option, @option{-mno-pass-mrelax-to-as} otherwise.
+ This option is mostly useful for debugging, or interoperation with
+ assemblers different from the build-time one.
  @end table
  
  @node M32C Options
*************** are enabled by default; routines in such
*** 32078,32083 ****
--- 32113,32127 ----
  loss of accuracy, typically through so-called ``catastrophic cancellation'',
  when this option is used to set the precision to less than extended precision.
  
+ @item -mdaz-ftz
+ @opindex mdaz-ftz
+ 
+ The flush-to-zero (FTZ) and denormals-are-zero (DAZ) flags in the MXCSR register
+ are used to control floating-point calculations.SSE and AVX instructions
+ including scalar and vector instructions could benefit from enabling the FTZ
+ and DAZ flags when @option{-mdaz-ftz} is specified. Don't set FTZ/DAZ flags
+ when @option{-mno-daz-ftz} is specified.
+ 
  @item -mstackrealign
  @opindex mstackrealign
  Realign the stack at entry.  On the x86, the @option{-mstackrealign}
*************** on x86-64 processors in 64-bit environme
*** 33092,33098 ****
  Generate code for a 16-bit, 32-bit or 64-bit environment.
  The @option{-m32} option sets @code{int}, @code{long}, and pointer types
  to 32 bits, and
! generates code that runs on any i386 system.
  
  The @option{-m64} option sets @code{int} to 32 bits and @code{long} and pointer
  types to 64 bits, and generates code for the x86-64 architecture.
--- 33136,33142 ----
  Generate code for a 16-bit, 32-bit or 64-bit environment.
  The @option{-m32} option sets @code{int}, @code{long}, and pointer types
  to 32 bits, and
! generates code that runs in 32-bit mode.
  
  The @option{-m64} option sets @code{int} to 32 bits and @code{long} and pointer
  types to 64 bits, and generates code for the x86-64 architecture.
diff -Nrcpad gcc-12.3.0/gcc/doc/lto-dump.1 gcc-12.4.0/gcc/doc/lto-dump.1
*** gcc-12.3.0/gcc/doc/lto-dump.1	Mon May  8 12:16:07 2023
--- gcc-12.4.0/gcc/doc/lto-dump.1	Thu Jun 20 08:11:52 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "LTO-DUMP 1"
! .TH LTO-DUMP 1 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "LTO-DUMP 1"
! .TH LTO-DUMP 1 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** any later version published by the Free
*** 218,224 ****
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fIgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
--- 222,228 ----
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fBgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
diff -Nrcpad gcc-12.3.0/gcc/doc/rtl.texi gcc-12.4.0/gcc/doc/rtl.texi
*** gcc-12.3.0/gcc/doc/rtl.texi	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/doc/rtl.texi	Thu Jun 20 08:08:06 2024
*************** vector.  For example @{ 0, 1 @} could be
*** 1843,1849 ****
  one element each or one pattern with two elements (@var{base0} and
  @var{base1}).  The canonical encoding is always the one with the
  fewest patterns or (if both encodings have the same number of
! petterns) the one with the fewest encoded elements.
  
  @samp{const_vector_encoding_nelts (@var{v})} gives the total number of
  encoded elements in @var{v}, which is 6 in the example above.
--- 1843,1849 ----
  one element each or one pattern with two elements (@var{base0} and
  @var{base1}).  The canonical encoding is always the one with the
  fewest patterns or (if both encodings have the same number of
! patterns) the one with the fewest encoded elements.
  
  @samp{const_vector_encoding_nelts (@var{v})} gives the total number of
  encoded elements in @var{v}, which is 6 in the example above.
diff -Nrcpad gcc-12.3.0/gcc/dwarf2out.cc gcc-12.4.0/gcc/dwarf2out.cc
*** gcc-12.3.0/gcc/dwarf2out.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/dwarf2out.cc	Thu Jun 20 08:08:06 2024
*************** process_scope_var (tree stmt, tree decl,
*** 26508,26514 ****
  
    if (die != NULL && die->die_parent == NULL)
      add_child_die (context_die, die);
!   else if (TREE_CODE (decl_or_origin) == IMPORTED_DECL)
      {
        if (early_dwarf)
  	dwarf2out_imported_module_or_decl_1 (decl_or_origin, DECL_NAME (decl_or_origin),
--- 26508,26515 ----
  
    if (die != NULL && die->die_parent == NULL)
      add_child_die (context_die, die);
! 
!   if (TREE_CODE (decl_or_origin) == IMPORTED_DECL)
      {
        if (early_dwarf)
  	dwarf2out_imported_module_or_decl_1 (decl_or_origin, DECL_NAME (decl_or_origin),
*************** prune_unused_types_walk (dw_die_ref die)
*** 30107,30114 ****
--- 30108,30120 ----
      case DW_TAG_reference_type:
      case DW_TAG_rvalue_reference_type:
      case DW_TAG_volatile_type:
+     case DW_TAG_restrict_type:
+     case DW_TAG_shared_type:
+     case DW_TAG_atomic_type:
+     case DW_TAG_immutable_type:
      case DW_TAG_typedef:
      case DW_TAG_array_type:
+     case DW_TAG_coarray_type:
      case DW_TAG_friend:
      case DW_TAG_enumeration_type:
      case DW_TAG_subroutine_type:
*************** prune_unused_types_walk (dw_die_ref die)
*** 30117,30122 ****
--- 30123,30130 ----
      case DW_TAG_subrange_type:
      case DW_TAG_ptr_to_member_type:
      case DW_TAG_file_type:
+     case DW_TAG_unspecified_type:
+     case DW_TAG_dynamic_type:
        /* Type nodes are useful only when other DIEs reference them --- don't
  	 mark them.  */
        /* FALLTHROUGH */
*************** dwarf2out_finish (const char *filename)
*** 32154,32177 ****
        reset_dies (comp_unit_die ());
        for (limbo_die_node *node = cu_die_list; node; node = node->next)
  	reset_dies (node->die);
- 
-       hash_table<comdat_type_hasher> comdat_type_table (100);
        for (ctnode = comdat_type_list; ctnode != NULL; ctnode = ctnode->next)
  	{
- 	  comdat_type_node **slot
- 	      = comdat_type_table.find_slot (ctnode, INSERT);
- 
- 	  /* Don't reset types twice.  */
- 	  if (*slot != HTAB_EMPTY_ENTRY)
- 	    continue;
- 
  	  /* Remove the pointer to the line table.  */
  	  remove_AT (ctnode->root_die, DW_AT_stmt_list);
- 
  	  if (debug_info_level >= DINFO_LEVEL_TERSE)
  	    reset_dies (ctnode->root_die);
- 
- 	  *slot = ctnode;
  	}
  
        /* Reset die CU symbol so we don't output it twice.  */
--- 32162,32173 ----
diff -Nrcpad gcc-12.3.0/gcc/fold-const.cc gcc-12.4.0/gcc/fold-const.cc
*** gcc-12.3.0/gcc/fold-const.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fold-const.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 84,89 ****
--- 84,90 ----
  #include "vec-perm-indices.h"
  #include "asan.h"
  #include "gimple-range.h"
+ #include "internal-fn.h"
  
  /* Nonzero if we are folding constants inside an initializer or a C++
     manifestly-constant-evaluated context; zero otherwise.
*************** static tree
*** 6188,6194 ****
  merge_truthop_with_opposite_arm (location_t loc, tree op, tree cmpop,
  				 bool rhs_only)
  {
-   tree type = TREE_TYPE (cmpop);
    enum tree_code code = TREE_CODE (cmpop);
    enum tree_code truthop_code = TREE_CODE (op);
    tree lhs = TREE_OPERAND (op, 0);
--- 6189,6194 ----
*************** merge_truthop_with_opposite_arm (locatio
*** 6204,6209 ****
--- 6204,6211 ----
    if (TREE_CODE_CLASS (code) != tcc_comparison)
      return NULL_TREE;
  
+   tree type = TREE_TYPE (TREE_OPERAND (cmpop, 0));
+ 
    if (rhs_code == truthop_code)
      {
        tree newrhs = merge_truthop_with_opposite_arm (loc, rhs, cmpop, rhs_only);
*************** native_encode_initializer (tree init, un
*** 8422,8427 ****
--- 8424,8431 ----
  		  if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN)
  		    return 0;
  
+ 		  if (TREE_CODE (val) == NON_LVALUE_EXPR)
+ 		    val = TREE_OPERAND (val, 0);
  		  if (TREE_CODE (val) != INTEGER_CST)
  		    return 0;
  
*************** multiple_of_p (tree type, const_tree top
*** 14273,14279 ****
  	      && TREE_CODE (op2) == INTEGER_CST
  	      && integer_pow2p (bottom)
  	      && wi::multiple_of_p (wi::to_widest (op2),
! 				    wi::to_widest (bottom), UNSIGNED))
  	    return 1;
  
  	  op1 = gimple_assign_rhs1 (stmt);
--- 14277,14283 ----
  	      && TREE_CODE (op2) == INTEGER_CST
  	      && integer_pow2p (bottom)
  	      && wi::multiple_of_p (wi::to_widest (op2),
! 				    wi::to_widest (bottom), SIGNED))
  	    return 1;
  
  	  op1 = gimple_assign_rhs1 (stmt);
*************** tree_call_nonnegative_warnv_p (tree type
*** 14858,14864 ****
      CASE_CFN_FFS:
      CASE_CFN_PARITY:
      CASE_CFN_POPCOUNT:
-     CASE_CFN_CLZ:
      CASE_CFN_CLRSB:
      case CFN_BUILT_IN_BSWAP16:
      case CFN_BUILT_IN_BSWAP32:
--- 14862,14867 ----
*************** tree_call_nonnegative_warnv_p (tree type
*** 14867,14872 ****
--- 14870,14891 ----
        /* Always true.  */
        return true;
  
+     CASE_CFN_CLZ:
+       if (fn != CFN_CLZ)
+ 	return true;
+       else if (INTEGRAL_TYPE_P (TREE_TYPE (arg0)))
+ 	{
+ 	  tree atype = TREE_TYPE (arg0);
+ 	  int val = 0;
+ 	  if (direct_internal_fn_supported_p (IFN_CLZ, atype,
+ 					      OPTIMIZE_FOR_BOTH)
+ 	      && CLZ_DEFINED_VALUE_AT_ZERO (SCALAR_INT_TYPE_MODE (atype),
+ 					    val) == 2
+ 	      && val >= 0)
+ 	    return true;
+ 	}
+       break;
+ 
      CASE_CFN_SQRT:
      CASE_CFN_SQRT_FN:
        /* sqrt(-0.0) is -0.0.  */
diff -Nrcpad gcc-12.3.0/gcc/fortran/ChangeLog gcc-12.4.0/gcc/fortran/ChangeLog
*** gcc-12.3.0/gcc/fortran/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/fortran/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,206 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-05-28  Tobias Burnus  <tburnus@baylibre.com>
+ 
+ 	Backported from master:
+ 	2024-05-20  Tobias Burnus  <tburnus@baylibre.com>
+ 
+ 	PR fortran/115150
+ 	* trans-intrinsic.cc (gfc_conv_intrinsic_bound): Fix SHAPE
+ 	for zero-size arrays
+ 
+ 2024-05-06  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2024-04-02  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/106999
+ 	* interface.cc (gfc_compare_interfaces): Add error for a
+ 	subroutine proc pointer passed to a variable formal.
+ 	(compare_parameter): If a procedure pointer is being passed to
+ 	a non-procedure formal arg, and there is an an interface, use
+ 	gfc_compare_interfaces to check and provide a more useful error
+ 	message.
+ 
+ 2024-05-06  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2024-05-06  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/114739
+ 	* primary.cc (gfc_match_varspec): Check for default type before
+ 	checking for derived types with the right component name.
+ 
+ 2024-04-26  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2023-05-23  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/103716
+ 	* resolve.cc (gfc_resolve_ref): Conversion of array_ref into an
+ 	element should be done for all characters without a len expr,
+ 	not just deferred lens, and for integer expressions.
+ 	* trans-expr.cc (conv_inquiry): For len and kind inquiry refs,
+ 	set the se string_length to NULL_TREE.
+ 
+ 2024-04-26  Andre Vehreschild  <vehre@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2023-07-12  Andre Vehreschild  <vehre@gcc.gnu.org>
+ 
+ 	PR fortran/102003
+ 	* expr.cc (find_inquiry_ref): Replace len of pdt_string by
+ 	constant.
+ 	(simplify_ref_chain): Ensure input to find_inquiry_ref is
+ 	NULL.
+ 	(gfc_match_init_expr): Prevent PDT analysis for function calls.
+ 	(gfc_pdt_find_component_copy_initializer): Get the initializer
+ 	value for given component.
+ 	* gfortran.h (gfc_pdt_find_component_copy_initializer): New
+ 	function.
+ 	* simplify.cc (gfc_simplify_len): Replace len() of PDT with pdt
+ 	component ref or constant.
+ 
+ 2024-04-06  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2024-03-28  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/114474
+ 	* primary.cc (gfc_variable_attr): Catch variables used in structure
+ 	constructors within DATA statements that are still tagged with a
+ 	temporary type BT_PROCEDURE from match_actual_arg and which have the
+ 	target attribute, and fix their typespec.
+ 
+ 2024-04-02  Mikael Morin  <mikael@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2024-03-22  Mikael Morin  <mikael@gcc.gnu.org>
+ 
+ 	PR fortran/107426
+ 	* gfortran.h (gfc_save_module_list, gfc_restore_old_module_list):
+ 	New declarations.
+ 	* module.cc (old_module_list_tail): New global variable.
+ 	(gfc_save_module_list, gfc_restore_old_module_list): New functions.
+ 	(gfc_use_modules): Set module_list and old_module_list_tail.
+ 	* parse.cc (next_statement): Save module_list before doing any work.
+ 	(reject_statement): Restore module_list to its saved value.
+ 
+ 2024-03-29  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2024-03-29  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/50410
+ 	* trans-expr.cc (gfc_conv_structure): Check for NULL pointer.
+ 
+ 2024-03-20  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2024-03-18  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/103715
+ 	* frontend-passes.cc (check_externals_expr): Prevent invalid read
+ 	in case of mismatch of external subroutine with function.
+ 
+ 2024-02-09  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2024-01-27  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/104908
+ 	* trans-array.cc (gfc_conv_array_ref): Restrict use of transformed
+ 	descriptor (sym->backend_decl) to the unlimited polymorphic case.
+ 
+ 2023-12-01  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2023-11-26  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/111880
+ 	* resolve.cc (resolve_common_vars): Do not call gfc_add_in_common
+ 	for symbols that are USE associated or used in a submodule.
+ 
+ 2023-10-21  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2023-10-17  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/111837
+ 	* frontend-passes.cc (traverse_io_block): Dependency check of loop
+ 	nest shall be triangular, not banded.
+ 
+ 2023-08-06  Steve Kargl  <kargl@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2022-12-18  Steve Kargl  <kargl@gcc.gnu.org>
+ 
+ 	PR fortran/107397
+ 	* decl.cc (add_init_expr_to_sym): Add check with new error message.
+ 
+ 2023-07-20  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2023-07-17  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/95947
+ 	PR fortran/110658
+ 	* trans-expr.cc (gfc_conv_procedure_call): For intrinsic procedures
+ 	whose result characteristics depends on the first argument and which
+ 	can be of type character, the character length will not be deferred.
+ 
+ 2023-07-14  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2023-07-11  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/110288
+ 	* symbol.cc (gfc_copy_formal_args_intr): When deriving the formal
+ 	argument attributes from the actual ones for intrinsic procedure
+ 	calls, take special care of CHARACTER arguments that we do not
+ 	wrongly treat them formally as deferred-length.
+ 
+ 2023-07-08  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2023-07-08  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/110585
+ 	* arith.cc (gfc_compare_expr): Handle equality comparison of constant
+ 	complex gfc_expr arguments.
+ 
+ 2023-06-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-06-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR fortran/96024
+ 	* primary.cc (gfc_convert_to_structure_constructor): Only do
+ 	constant string ctor length verification and truncation/padding
+ 	if constant length has INTEGER type.
+ 
+ 2023-06-04  Steve Kargl  <kargl@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2023-06-02  Steve Kargl  <kargl@gcc.gnu.org>
+ 
+ 	PR fortran/100607
+ 	* resolve.cc (resolve_select_rank): Remove duplicate error.
+ 	(resolve_fl_var_and_proc): Prevent NULL pointer dereference and
+ 	suppress error message for temporary.
+ 
+ 2023-05-20  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2023-05-15  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/109846
+ 	* expr.cc (gfc_check_vardef_context): Check appropriate pointer
+ 	attribute for CLASS vs. non-CLASS function result in variable
+ 	definition context.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/fortran/arith.cc gcc-12.4.0/gcc/fortran/arith.cc
*** gcc-12.3.0/gcc/fortran/arith.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/arith.cc	Thu Jun 20 08:08:06 2024
*************** gfc_compare_expr (gfc_expr *op1, gfc_exp
*** 1080,1085 ****
--- 1080,1090 ----
  	    || (op1->value.logical && !op2->value.logical));
        break;
  
+     case BT_COMPLEX:
+       gcc_assert (op == INTRINSIC_EQ);
+       rc = mpc_cmp (op1->value.complex, op2->value.complex);
+       break;
+ 
      default:
        gfc_internal_error ("gfc_compare_expr(): Bad basic type");
      }
diff -Nrcpad gcc-12.3.0/gcc/fortran/decl.cc gcc-12.4.0/gcc/fortran/decl.cc
*** gcc-12.3.0/gcc/fortran/decl.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/decl.cc	Thu Jun 20 08:08:06 2024
*************** add_init_expr_to_sym (const char *name,
*** 2220,2225 ****
--- 2220,2233 ----
  	    sym->ts.f90_type = init->ts.f90_type;
  	}
  
+       /* Catch the case:  type(t), parameter :: x = z'1'.  */
+       if (sym->ts.type == BT_DERIVED && init->ts.type == BT_BOZ)
+ 	{
+ 	  gfc_error ("Entity %qs at %L is incompatible with a BOZ "
+ 		     "literal constant", name, &sym->declared_at);
+ 	  return false;
+ 	}
+ 
        /* Add initializer.  Make sure we keep the ranks sane.  */
        if (sym->attr.dimension && init->rank == 0)
  	{
diff -Nrcpad gcc-12.3.0/gcc/fortran/expr.cc gcc-12.4.0/gcc/fortran/expr.cc
*** gcc-12.3.0/gcc/fortran/expr.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/expr.cc	Thu Jun 20 08:08:06 2024
*************** find_inquiry_ref (gfc_expr *p, gfc_expr
*** 1850,1855 ****
--- 1850,1862 ----
  	  else if (tmp->expr_type == EXPR_CONSTANT)
  	    *newp = gfc_get_int_expr (gfc_default_integer_kind,
  				      NULL, tmp->value.character.length);
+ 	  else if (gfc_init_expr_flag
+ 		   && tmp->ts.u.cl->length->symtree->n.sym->attr.pdt_len)
+ 	    *newp = gfc_pdt_find_component_copy_initializer (tmp->symtree->n
+ 							     .sym,
+ 							     tmp->ts.u.cl
+ 							     ->length->symtree
+ 							     ->n.sym->name);
  	  else
  	    goto cleanup;
  
*************** find_inquiry_ref (gfc_expr *p, gfc_expr
*** 1890,1896 ****
  		    mpc_imagref (tmp->value.complex), GFC_RND_MODE);
  	  break;
  	}
!       tmp = gfc_copy_expr (*newp);
      }
  
    if (!(*newp))
--- 1897,1905 ----
  		    mpc_imagref (tmp->value.complex), GFC_RND_MODE);
  	  break;
  	}
!       // TODO: Fix leaking expr tmp, when simplify is done twice.
!       if (inquiry->next)
! 	gfc_replace_expr (tmp, *newp);
      }
  
    if (!(*newp))
*************** static bool
*** 2055,2061 ****
  simplify_ref_chain (gfc_ref *ref, int type, gfc_expr **p)
  {
    int n;
!   gfc_expr *newp;
  
    for (; ref; ref = ref->next)
      {
--- 2064,2070 ----
  simplify_ref_chain (gfc_ref *ref, int type, gfc_expr **p)
  {
    int n;
!   gfc_expr *newp = NULL;
  
    for (; ref; ref = ref->next)
      {
*************** gfc_match_init_expr (gfc_expr **result)
*** 3217,3223 ****
        return m;
      }
  
!   if (gfc_derived_parameter_expr (expr))
      {
        *result = expr;
        gfc_init_expr_flag = false;
--- 3226,3232 ----
        return m;
      }
  
!   if (expr->expr_type != EXPR_FUNCTION && gfc_derived_parameter_expr (expr))
      {
        *result = expr;
        gfc_init_expr_flag = false;
*************** gfc_check_vardef_context (gfc_expr* e, b
*** 6254,6260 ****
        && !(sym->attr.flavor == FL_PROCEDURE && sym == sym->result)
        && !(sym->attr.flavor == FL_PROCEDURE && sym->attr.proc_pointer)
        && !(sym->attr.flavor == FL_PROCEDURE
! 	   && sym->attr.function && sym->attr.pointer))
      {
        if (context)
  	gfc_error ("%qs in variable definition context (%s) at %L is not"
--- 6263,6269 ----
        && !(sym->attr.flavor == FL_PROCEDURE && sym == sym->result)
        && !(sym->attr.flavor == FL_PROCEDURE && sym->attr.proc_pointer)
        && !(sym->attr.flavor == FL_PROCEDURE
! 	   && sym->attr.function && attr.pointer))
      {
        if (context)
  	gfc_error ("%qs in variable definition context (%s) at %L is not"
*************** gfc_check_vardef_context (gfc_expr* e, b
*** 6530,6532 ****
--- 6539,6557 ----
  
    return true;
  }
+ 
+ gfc_expr*
+ gfc_pdt_find_component_copy_initializer (gfc_symbol *sym, const char *name)
+ {
+   /* The actual length of a pdt is in its components.  In the
+      initializer of the current ref is only the default value.
+      Therefore traverse the chain of components and pick the correct
+      one's initializer expressions.  */
+   for (gfc_component *comp = sym->ts.u.derived->components; comp != NULL;
+        comp = comp->next)
+     {
+       if (!strcmp (comp->name, name))
+ 	return gfc_copy_expr (comp->initializer);
+     }
+   return NULL;
+ }
diff -Nrcpad gcc-12.3.0/gcc/fortran/frontend-passes.cc gcc-12.4.0/gcc/fortran/frontend-passes.cc
*** gcc-12.3.0/gcc/fortran/frontend-passes.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/frontend-passes.cc	Thu Jun 20 08:08:06 2024
*************** traverse_io_block (gfc_code *code, bool
*** 1326,1332 ****
        if (iters[i])
  	{
  	  gfc_expr *var = iters[i]->var;
! 	  for (int j = i - 1; j < i; j++)
  	    {
  	      if (iters[j]
  		  && (var_in_expr (var, iters[j]->start)
--- 1326,1332 ----
        if (iters[i])
  	{
  	  gfc_expr *var = iters[i]->var;
! 	  for (int j = 0; j < i; j++)
  	    {
  	      if (iters[j]
  		  && (var_in_expr (var, iters[j]->start)
*************** check_externals_expr (gfc_expr **ep, int
*** 5794,5799 ****
--- 5794,5802 ----
    if (e->expr_type != EXPR_FUNCTION)
      return 0;
  
+   if (e->symtree && e->symtree->n.sym->attr.subroutine)
+     return 0;
+ 
    sym = e->value.function.esym;
    if (sym == NULL)
      return 0;
diff -Nrcpad gcc-12.3.0/gcc/fortran/gfortran.h gcc-12.4.0/gcc/fortran/gfortran.h
*** gcc-12.3.0/gcc/fortran/gfortran.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/gfortran.h	Thu Jun 20 08:08:06 2024
*************** gfc_expr* gfc_find_stat_co (gfc_expr *);
*** 3667,3672 ****
--- 3667,3673 ----
  gfc_expr* gfc_build_intrinsic_call (gfc_namespace *, gfc_isym_id, const char*,
  				    locus, unsigned, ...);
  bool gfc_check_vardef_context (gfc_expr*, bool, bool, bool, const char*);
+ gfc_expr* gfc_pdt_find_component_copy_initializer (gfc_symbol *, const char *);
  
  
  /* st.cc */
*************** void gfc_module_done_2 (void);
*** 3800,3805 ****
--- 3801,3808 ----
  void gfc_dump_module (const char *, int);
  bool gfc_check_symbol_access (gfc_symbol *);
  void gfc_free_use_stmts (gfc_use_list *);
+ void gfc_save_module_list ();
+ void gfc_restore_old_module_list ();
  const char *gfc_dt_lower_string (const char *);
  const char *gfc_dt_upper_string (const char *);
  
diff -Nrcpad gcc-12.3.0/gcc/fortran/gfortran.info gcc-12.4.0/gcc/fortran/gfortran.info
*** gcc-12.3.0/gcc/fortran/gfortran.info	Mon May  8 12:27:48 2023
--- gcc-12.4.0/gcc/fortran/gfortran.info	Thu Jun 20 08:26:18 2024
***************
*** 1,4 ****
! This is gfortran.info, produced by makeinfo version 6.5 from
  gfortran.texi.
  
  Copyright (C) 1999-2022 Free Software Foundation, Inc.
--- 1,4 ----
! This is gfortran.info, produced by makeinfo version 6.8 from
  gfortran.texi.
  
  Copyright (C) 1999-2022 Free Software Foundation, Inc.
*************** the other form by either removing 'no-'
*** 1597,1603 ****
  
       Use of '-fno-underscoring' is not recommended unless you are
       experimenting with issues such as integration of GNU Fortran into
!      existing system environments (vis-a`-vis existing libraries, tools,
       and so on).
  
       For example, with '-funderscoring', and assuming that 'j()' and
--- 1597,1603 ----
  
       Use of '-fno-underscoring' is not recommended unless you are
       experimenting with issues such as integration of GNU Fortran into
!      existing system environments (vis-à-vis existing libraries, tools,
       and so on).
  
       For example, with '-funderscoring', and assuming that 'j()' and
*************** significant help to the GNU Fortran proj
*** 19616,19622 ****
     - Steven Bosscher
     - Paul Brook
     - Tobias Burnus
!    - Franc,ois-Xavier Coudert
     - Bud Davis
     - Jerry DeLisle
     - Erik Edelmann
--- 19616,19622 ----
     - Steven Bosscher
     - Paul Brook
     - Tobias Burnus
!    - François-Xavier Coudert
     - Bud Davis
     - Jerry DeLisle
     - Erik Edelmann
*************** significant help to the GNU Fortran proj
*** 19638,19644 ****
     - Tim Prince
     - Christopher D. Rickett
     - Richard Sandiford
!    - Tobias Schlu"ter
     - Roger Sayle
     - Paul Thomas
     - Andy Vaught
--- 19638,19644 ----
     - Tim Prince
     - Christopher D. Rickett
     - Richard Sandiford
!    - Tobias Schlüter
     - Roger Sayle
     - Paul Thomas
     - Andy Vaught
*************** patches, and much needed feedback and en
*** 19651,19657 ****
  project:
  
     - Bill Clodius
!    - Dominique d'Humie`res
     - Kate Hedstrom
     - Erik Schnetter
     - Gerhard Steinmetz
--- 19651,19657 ----
  project:
  
     - Bill Clodius
!    - Dominique d'Humières
     - Kate Hedstrom
     - Erik Schnetter
     - Gerhard Steinmetz
*************** Node: Option Index767842
*** 23171,23173 ****
--- 23171,23178 ----
  Node: Keyword Index786903
  
  End Tag Table
+ 
+ 
+ Local Variables:
+ coding: utf-8
+ End:
diff -Nrcpad gcc-12.3.0/gcc/fortran/interface.cc gcc-12.4.0/gcc/fortran/interface.cc
*** gcc-12.3.0/gcc/fortran/interface.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/interface.cc	Thu Jun 20 08:08:06 2024
*************** gfc_compare_interfaces (gfc_symbol *s1,
*** 1746,1751 ****
--- 1746,1759 ----
        return false;
      }
  
+   if (s2->attr.subroutine && s1->attr.flavor == FL_VARIABLE)
+     {
+       if (errmsg != NULL)
+ 	snprintf (errmsg, err_len, "subroutine proc pointer '%s' passed "
+ 		  "to dummy variable '%s'", name2, s1->name);
+       return false;
+     }
+ 
    /* Do strict checks on all characteristics
       (for dummy procedures and procedure pointer assignments).  */
    if (!generic_flag && strict_flag)
*************** compare_parameter (gfc_symbol *formal, g
*** 2381,2392 ****
      {
        gfc_symbol *act_sym = actual->symtree->n.sym;
  
!       if (formal->attr.flavor != FL_PROCEDURE)
  	{
  	  if (where)
  	    gfc_error ("Invalid procedure argument at %L", &actual->where);
  	  return false;
  	}
  
        if (!gfc_compare_interfaces (formal, act_sym, act_sym->name, 0, 1, err,
  				   sizeof(err), NULL, NULL))
--- 2389,2410 ----
      {
        gfc_symbol *act_sym = actual->symtree->n.sym;
  
!       if (formal->attr.flavor != FL_PROCEDURE && !act_sym->ts.interface)
  	{
  	  if (where)
  	    gfc_error ("Invalid procedure argument at %L", &actual->where);
  	  return false;
  	}
+       else if (act_sym->ts.interface
+ 	       && !gfc_compare_interfaces (formal, act_sym->ts.interface,
+ 					   act_sym->name, 0, 1, err,
+ 					   sizeof(err),NULL, NULL))
+ 	{
+ 	  if (where)
+ 	    gfc_error_opt (0, "Interface mismatch in dummy procedure %qs at %L:"
+ 			   " %s", formal->name, &actual->where, err);
+ 	  return false;
+ 	}
  
        if (!gfc_compare_interfaces (formal, act_sym, act_sym->name, 0, 1, err,
  				   sizeof(err), NULL, NULL))
diff -Nrcpad gcc-12.3.0/gcc/fortran/module.cc gcc-12.4.0/gcc/fortran/module.cc
*** gcc-12.3.0/gcc/fortran/module.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/module.cc	Thu Jun 20 08:08:06 2024
*************** static const char *module_name;
*** 195,201 ****
--- 195,206 ----
  /* The name of the .smod file that the submodule will write to.  */
  static const char *submodule_name;
  
+ /* The list of use statements to apply to the current namespace
+    before parsing the non-use statements.  */
  static gfc_use_list *module_list;
+ /* The end of the MODULE_LIST list above at the time the recognition
+    of the current statement started.  */
+ static gfc_use_list **old_module_list_tail;
  
  /* If we're reading an intrinsic module, this is its ID.  */
  static intmod_id current_intmod;
*************** gfc_use_modules (void)
*** 7542,7547 ****
--- 7547,7554 ----
        gfc_use_module (module_list);
        free (module_list);
      }
+   module_list = NULL;
+   old_module_list_tail = &module_list;
    gfc_rename_list = NULL;
  }
  
*************** gfc_free_use_stmts (gfc_use_list *use_st
*** 7565,7570 ****
--- 7572,7601 ----
  }
  
  
+ /* Remember the end of the MODULE_LIST list, so that the list can be restored
+    to its previous state if the current statement is erroneous.  */
+ 
+ void
+ gfc_save_module_list ()
+ {
+   gfc_use_list **tail = &module_list;
+   while (*tail != NULL)
+     tail = &(*tail)->next;
+   old_module_list_tail = tail;
+ }
+ 
+ 
+ /* Restore the MODULE_LIST list to its previous value and free the use
+    statements that are no longer part of the list.  */
+ 
+ void
+ gfc_restore_old_module_list ()
+ {
+   gfc_free_use_stmts (*old_module_list_tail);
+   *old_module_list_tail = NULL;
+ }
+ 
+ 
  void
  gfc_module_init_2 (void)
  {
diff -Nrcpad gcc-12.3.0/gcc/fortran/parse.cc gcc-12.4.0/gcc/fortran/parse.cc
*** gcc-12.3.0/gcc/fortran/parse.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/parse.cc	Thu Jun 20 08:08:06 2024
*************** next_statement (void)
*** 1600,1605 ****
--- 1600,1606 ----
    locus old_locus;
  
    gfc_enforce_clean_symbol_state ();
+   gfc_save_module_list ();
  
    gfc_new_block = NULL;
  
*************** reject_statement (void)
*** 2875,2880 ****
--- 2876,2884 ----
  
    gfc_reject_data (gfc_current_ns);
  
+   /* Don't queue use-association of a module if we reject the use statement.  */
+   gfc_restore_old_module_list ();
+ 
    gfc_new_block = NULL;
    gfc_undo_symbols ();
    gfc_clear_warning ();
diff -Nrcpad gcc-12.3.0/gcc/fortran/primary.cc gcc-12.4.0/gcc/fortran/primary.cc
*** gcc-12.3.0/gcc/fortran/primary.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/primary.cc	Thu Jun 20 08:08:06 2024
*************** gfc_match_varspec (gfc_expr *primary, in
*** 2207,2212 ****
--- 2207,2221 ----
        match mm;
        old_loc = gfc_current_locus;
        mm = gfc_match_name (name);
+ 
+       /* Check to see if this has a default type.  */
+       if (sym->ts.type == BT_UNKNOWN && tgt_expr == NULL
+ 	  && gfc_get_default_type (sym->name, sym->ns)->type != BT_UNKNOWN)
+ 	{
+ 	  gfc_set_default_type (sym, 0, sym->ns);
+ 	  primary->ts = sym->ts;
+ 	}
+ 
        if (mm == MATCH_YES && is_inquiry_ref (name, &tmp))
  	inquiry = true;
        gfc_current_locus = old_loc;
*************** gfc_variable_attr (gfc_expr *expr, gfc_t
*** 2664,2669 ****
--- 2673,2690 ----
    if (ts != NULL && expr->ts.type == BT_UNKNOWN)
      *ts = sym->ts;
  
+   /* Catch left-overs from match_actual_arg, where an actual argument of a
+      procedure is given a temporary ts.type == BT_PROCEDURE.  The fixup is
+      needed for structure constructors in DATA statements, where a pointer
+      is associated with a data target, and the argument has not been fully
+      resolved yet.  Components references are dealt with further below.  */
+   if (ts != NULL
+       && expr->ts.type == BT_PROCEDURE
+       && expr->ref == NULL
+       && attr.flavor != FL_PROCEDURE
+       && attr.target)
+     *ts = sym->ts;
+ 
    has_inquiry_part = false;
    for (ref = expr->ref; ref; ref = ref->next)
      if (ref->type == REF_INQUIRY)
*************** gfc_convert_to_structure_constructor (gf
*** 3196,3205 ****
  	goto cleanup;
  
        /* For a constant string constructor, make sure the length is
! 	 correct; truncate of fill with blanks if needed.  */
        if (this_comp->ts.type == BT_CHARACTER && !this_comp->attr.allocatable
  	  && this_comp->ts.u.cl && this_comp->ts.u.cl->length
  	  && this_comp->ts.u.cl->length->expr_type == EXPR_CONSTANT
  	  && actual->expr->ts.type == BT_CHARACTER
  	  && actual->expr->expr_type == EXPR_CONSTANT)
  	{
--- 3217,3227 ----
  	goto cleanup;
  
        /* For a constant string constructor, make sure the length is
! 	 correct; truncate or fill with blanks if needed.  */
        if (this_comp->ts.type == BT_CHARACTER && !this_comp->attr.allocatable
  	  && this_comp->ts.u.cl && this_comp->ts.u.cl->length
  	  && this_comp->ts.u.cl->length->expr_type == EXPR_CONSTANT
+ 	  && this_comp->ts.u.cl->length->ts.type == BT_INTEGER
  	  && actual->expr->ts.type == BT_CHARACTER
  	  && actual->expr->expr_type == EXPR_CONSTANT)
  	{
diff -Nrcpad gcc-12.3.0/gcc/fortran/resolve.cc gcc-12.4.0/gcc/fortran/resolve.cc
*** gcc-12.3.0/gcc/fortran/resolve.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/resolve.cc	Thu Jun 20 08:08:06 2024
*************** resolve_common_vars (gfc_common_head *co
*** 965,972 ****
  
        /* gfc_add_in_common may have been called before, but the reported errors
  	 have been ignored to continue parsing.
! 	 We do the checks again here.  */
!       if (!csym->attr.use_assoc)
  	{
  	  gfc_add_in_common (&csym->attr, csym->name, &common_block->where);
  	  gfc_notify_std (GFC_STD_F2018_OBS, "COMMON block at %L",
--- 965,972 ----
  
        /* gfc_add_in_common may have been called before, but the reported errors
  	 have been ignored to continue parsing.
! 	 We do the checks again here, unless the symbol is USE associated.  */
!       if (!csym->attr.use_assoc && !csym->attr.used_in_submodule)
  	{
  	  gfc_add_in_common (&csym->attr, csym->name, &common_block->where);
  	  gfc_notify_std (GFC_STD_F2018_OBS, "COMMON block at %L",
*************** gfc_resolve_ref (gfc_expr *expr)
*** 5461,5467 ****
  	case REF_INQUIRY:
  	  /* Implement requirement in note 9.7 of F2018 that the result of the
  	     LEN inquiry be a scalar.  */
! 	  if (ref->u.i == INQUIRY_LEN && array_ref && expr->ts.deferred)
  	    {
  	      array_ref->u.ar.type = AR_ELEMENT;
  	      expr->rank = 0;
--- 5461,5469 ----
  	case REF_INQUIRY:
  	  /* Implement requirement in note 9.7 of F2018 that the result of the
  	     LEN inquiry be a scalar.  */
! 	  if (ref->u.i == INQUIRY_LEN && array_ref
! 	      && ((expr->ts.type == BT_CHARACTER && !expr->ts.u.cl->length)
! 		  || expr->ts.type == BT_INTEGER))
  	    {
  	      array_ref->u.ar.type = AR_ELEMENT;
  	      expr->rank = 0;
*************** resolve_select_rank (gfc_code *code, gfc
*** 9923,9933 ****
  			       || gfc_expr_attr (code->expr1).pointer))
  	gfc_error ("RANK (*) at %L cannot be used with the pointer or "
  		   "allocatable selector at %L", &c->where, &code->expr1->where);
- 
-       if (case_value == -1 && (gfc_expr_attr (code->expr1).allocatable
- 			       || gfc_expr_attr (code->expr1).pointer))
- 	gfc_error ("RANK (*) at %L cannot be used with the pointer or "
- 		   "allocatable selector at %L", &c->where, &code->expr1->where);
      }
  
    /* Add EXEC_SELECT to switch on rank.  */
--- 9925,9930 ----
*************** resolve_fl_var_and_proc (gfc_symbol *sym
*** 12913,12919 ****
  
        if (allocatable)
  	{
! 	  if (dimension && as->type != AS_ASSUMED_RANK)
  	    {
  	      gfc_error ("Allocatable array %qs at %L must have a deferred "
  			 "shape or assumed rank", sym->name, &sym->declared_at);
--- 12910,12919 ----
  
        if (allocatable)
  	{
! 	  if (dimension
! 	      && as
! 	      && as->type != AS_ASSUMED_RANK
! 	      && !sym->attr.select_rank_temporary)
  	    {
  	      gfc_error ("Allocatable array %qs at %L must have a deferred "
  			 "shape or assumed rank", sym->name, &sym->declared_at);
diff -Nrcpad gcc-12.3.0/gcc/fortran/simplify.cc gcc-12.4.0/gcc/fortran/simplify.cc
*** gcc-12.3.0/gcc/fortran/simplify.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/simplify.cc	Thu Jun 20 08:08:06 2024
*************** gfc_simplify_len (gfc_expr *e, gfc_expr
*** 4525,4543 ****
        return range_check (result, "LEN");
      }
    else if (e->expr_type == EXPR_VARIABLE && e->ts.type == BT_CHARACTER
! 	   && e->symtree->n.sym
! 	   && e->symtree->n.sym->ts.type != BT_DERIVED
! 	   && e->symtree->n.sym->assoc && e->symtree->n.sym->assoc->target
! 	   && e->symtree->n.sym->assoc->target->ts.type == BT_DERIVED
! 	   && e->symtree->n.sym->assoc->target->symtree->n.sym
! 	   && UNLIMITED_POLY (e->symtree->n.sym->assoc->target->symtree->n.sym))
! 
!     /* The expression in assoc->target points to a ref to the _data component
!        of the unlimited polymorphic entity.  To get the _len component the last
!        _data ref needs to be stripped and a ref to the _len component added.  */
!     return gfc_get_len_component (e->symtree->n.sym->assoc->target, k);
!   else
!     return NULL;
  }
  
  
--- 4525,4574 ----
        return range_check (result, "LEN");
      }
    else if (e->expr_type == EXPR_VARIABLE && e->ts.type == BT_CHARACTER
! 	   && e->symtree->n.sym)
!     {
!       if (e->symtree->n.sym->ts.type != BT_DERIVED
! 	  && e->symtree->n.sym->assoc && e->symtree->n.sym->assoc->target
! 	  && e->symtree->n.sym->assoc->target->ts.type == BT_DERIVED
! 	  && e->symtree->n.sym->assoc->target->symtree->n.sym
! 	  && UNLIMITED_POLY (e->symtree->n.sym->assoc->target->symtree->n.sym))
! 	/* The expression in assoc->target points to a ref to the _data
! 	   component of the unlimited polymorphic entity.  To get the _len
! 	   component the last _data ref needs to be stripped and a ref to the
! 	   _len component added.  */
! 	return gfc_get_len_component (e->symtree->n.sym->assoc->target, k);
!       else if (e->symtree->n.sym->ts.type == BT_DERIVED
! 	       && e->ref && e->ref->type == REF_COMPONENT
! 	       && e->ref->u.c.component->attr.pdt_string
! 	       && e->ref->u.c.component->ts.type == BT_CHARACTER
! 	       && e->ref->u.c.component->ts.u.cl->length)
! 	{
! 	  if (gfc_init_expr_flag)
! 	    {
! 	      gfc_expr* tmp;
! 	      tmp = gfc_pdt_find_component_copy_initializer (e->symtree->n.sym,
! 							     e->ref->u.c
! 							     .component->ts.u.cl
! 							     ->length->symtree
! 							     ->name);
! 	      if (tmp)
! 		return tmp;
! 	    }
! 	  else
! 	    {
! 	      gfc_expr *len_expr = gfc_copy_expr (e);
! 	      gfc_free_ref_list (len_expr->ref);
! 	      len_expr->ref = NULL;
! 	      gfc_find_component (len_expr->symtree->n.sym->ts.u.derived, e->ref
! 				  ->u.c.component->ts.u.cl->length->symtree
! 				  ->name,
! 				  false, true, &len_expr->ref);
! 	      len_expr->ts = len_expr->ref->u.c.component->ts;
! 	      return len_expr;
! 	    }
! 	}
!     }
!   return NULL;
  }
  
  
diff -Nrcpad gcc-12.3.0/gcc/fortran/symbol.cc gcc-12.4.0/gcc/fortran/symbol.cc
*** gcc-12.3.0/gcc/fortran/symbol.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/symbol.cc	Thu Jun 20 08:08:06 2024
*************** gfc_copy_formal_args_intr (gfc_symbol *d
*** 4719,4724 ****
--- 4719,4731 ----
        formal_arg->sym->attr.flavor = FL_VARIABLE;
        formal_arg->sym->attr.dummy = 1;
  
+       /* Do not treat an actual deferred-length character argument wrongly
+ 	 as template for the formal argument.  */
+       if (formal_arg->sym->ts.type == BT_CHARACTER
+ 	  && !(formal_arg->sym->attr.allocatable
+ 	       || formal_arg->sym->attr.pointer))
+ 	formal_arg->sym->ts.deferred = false;
+ 
        if (formal_arg->sym->ts.type == BT_CHARACTER)
  	formal_arg->sym->ts.u.cl = gfc_new_charlen (gfc_current_ns, NULL);
  
diff -Nrcpad gcc-12.3.0/gcc/fortran/trans-array.cc gcc-12.4.0/gcc/fortran/trans-array.cc
*** gcc-12.3.0/gcc/fortran/trans-array.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/trans-array.cc	Thu Jun 20 08:08:06 2024
*************** gfc_conv_array_ref (gfc_se * se, gfc_arr
*** 3911,3917 ****
      }
  
    decl = se->expr;
!   if (IS_CLASS_ARRAY (sym) && sym->attr.dummy && ar->as->type != AS_DEFERRED)
      decl = sym->backend_decl;
  
    cst_offset = offset = gfc_index_zero_node;
--- 3911,3920 ----
      }
  
    decl = se->expr;
!   if (UNLIMITED_POLY(sym)
!       && IS_CLASS_ARRAY (sym)
!       && sym->attr.dummy
!       && ar->as->type != AS_DEFERRED)
      decl = sym->backend_decl;
  
    cst_offset = offset = gfc_index_zero_node;
diff -Nrcpad gcc-12.3.0/gcc/fortran/trans-expr.cc gcc-12.4.0/gcc/fortran/trans-expr.cc
*** gcc-12.3.0/gcc/fortran/trans-expr.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/trans-expr.cc	Thu Jun 20 08:08:06 2024
*************** conv_inquiry (gfc_se * se, gfc_ref * ref
*** 2854,2864 ****
--- 2854,2866 ----
      case INQUIRY_KIND:
        res = build_int_cst (gfc_typenode_for_spec (&expr->ts),
  			   ts->kind);
+       se->string_length = NULL_TREE;
        break;
  
      case INQUIRY_LEN:
        res = fold_convert (gfc_typenode_for_spec (&expr->ts),
  			  se->string_length);
+       se->string_length = NULL_TREE;
        break;
  
      default:
*************** gfc_conv_procedure_call (gfc_se * se, gf
*** 7428,7434 ****
  	     (and other intrinsics?) and dummy functions.  In the case of SPREAD,
  	     we take the character length of the first argument for the result.
  	     For dummies, we have to look through the formal argument list for
! 	     this function and use the character length found there.*/
  	  if (ts.deferred)
  	    cl.backend_decl = gfc_create_var (gfc_charlen_type_node, "slen");
  	  else if (!sym->attr.dummy)
--- 7430,7441 ----
  	     (and other intrinsics?) and dummy functions.  In the case of SPREAD,
  	     we take the character length of the first argument for the result.
  	     For dummies, we have to look through the formal argument list for
! 	     this function and use the character length found there.
! 	     Likewise, we handle the case of deferred-length character dummy
! 	     arguments to intrinsics that determine the characteristics of
! 	     the result, which cannot be deferred-length.  */
! 	  if (expr->value.function.isym)
! 	    ts.deferred = false;
  	  if (ts.deferred)
  	    cl.backend_decl = gfc_create_var (gfc_charlen_type_node, "slen");
  	  else if (!sym->attr.dummy)
*************** gfc_conv_structure (gfc_se * se, gfc_exp
*** 9293,9299 ****
    cm = expr->ts.u.derived->components;
  
    for (c = gfc_constructor_first (expr->value.constructor);
!        c; c = gfc_constructor_next (c), cm = cm->next)
      {
        /* Skip absent members in default initializers and allocatable
  	 components.  Although the latter have a default initializer
--- 9300,9306 ----
    cm = expr->ts.u.derived->components;
  
    for (c = gfc_constructor_first (expr->value.constructor);
!        c && cm; c = gfc_constructor_next (c), cm = cm->next)
      {
        /* Skip absent members in default initializers and allocatable
  	 components.  Although the latter have a default initializer
diff -Nrcpad gcc-12.3.0/gcc/fortran/trans-intrinsic.cc gcc-12.4.0/gcc/fortran/trans-intrinsic.cc
*** gcc-12.3.0/gcc/fortran/trans-intrinsic.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/trans-intrinsic.cc	Thu Jun 20 08:08:06 2024
*************** gfc_conv_intrinsic_bound (gfc_se * se, g
*** 3083,3089 ****
  				      lbound, gfc_index_one_node);
  	}
        else if (op == GFC_ISYM_SHAPE)
! 	se->expr = size;
        else
  	gcc_unreachable ();
  
--- 3083,3091 ----
  				      lbound, gfc_index_one_node);
  	}
        else if (op == GFC_ISYM_SHAPE)
! 	se->expr = fold_build2_loc (input_location, MAX_EXPR,
! 				    gfc_array_index_type, size,
! 				    gfc_index_zero_node);
        else
  	gcc_unreachable ();
  
diff -Nrcpad gcc-12.3.0/gcc/fwprop.cc gcc-12.4.0/gcc/fwprop.cc
*** gcc-12.3.0/gcc/fwprop.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fwprop.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 25,30 ****
--- 25,31 ----
  #include "coretypes.h"
  #include "backend.h"
  #include "rtl.h"
+ #include "rtlanal.h"
  #include "df.h"
  #include "rtl-ssa.h"
  
*************** reg_single_def_p (rtx x)
*** 353,373 ****
    return REG_P (x) && crtl->ssa->single_dominating_def (REGNO (x));
  }
  
- /* Return true if X contains a paradoxical subreg.  */
- 
- static bool
- contains_paradoxical_subreg_p (rtx x)
- {
-   subrtx_var_iterator::array_type array;
-   FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST)
-     {
-       x = *iter;
-       if (SUBREG_P (x) && paradoxical_subreg_p (x))
- 	return true;
-     }
-   return false;
- }
- 
  /* Try to substitute (set DEST SRC), which defines DEF, into note NOTE of
     USE_INSN.  Return the number of substitutions on success, otherwise return
     -1 and leave USE_INSN unchanged.
--- 354,359 ----
diff -Nrcpad gcc-12.3.0/gcc/generic-match-head.cc gcc-12.4.0/gcc/generic-match-head.cc
*** gcc-12.3.0/gcc/generic-match-head.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/generic-match-head.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 39,44 ****
--- 39,46 ----
  #include "dbgcnt.h"
  #include "tm.h"
  #include "tree-pass.h"
+ #include "attribs.h"
+ #include "asan.h"
  
  /* Routine to determine if the types T1 and T2 are effectively
     the same for GENERIC.  If T1 or T2 is not a type, the test
diff -Nrcpad gcc-12.3.0/gcc/gengtype-lex.cc gcc-12.4.0/gcc/gengtype-lex.cc
*** gcc-12.3.0/gcc/gengtype-lex.cc	Mon May  8 12:16:07 2023
--- gcc-12.4.0/gcc/gengtype-lex.cc	Thu Jun 20 08:11:52 2024
*************** int yy_flex_debug = 0;
*** 1188,1194 ****
  #define YY_MORE_ADJ 0
  #define YY_RESTORE_YY_MORE_OFFSET
  char *yytext;
! #line 1 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  /* -*- indented-text -*- */
  /* Process source files and output type information.
     Copyright (C) 2002-2022 Free Software Foundation, Inc.
--- 1188,1194 ----
  #define YY_MORE_ADJ 0
  #define YY_RESTORE_YY_MORE_OFFSET
  char *yytext;
! #line 1 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  /* -*- indented-text -*- */
  /* Process source files and output type information.
     Copyright (C) 2002-2022 Free Software Foundation, Inc.
*************** You should have received a copy of the G
*** 1209,1215 ****
  along with GCC; see the file COPYING3.  If not see
  <http://www.gnu.org/licenses/>.  */
  #define YY_NO_INPUT 1
! #line 24 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  #ifdef HOST_GENERATOR_FILE
  #include "config.h"
  #define GENERATOR_FILE 1
--- 1209,1215 ----
  along with GCC; see the file COPYING3.  If not see
  <http://www.gnu.org/licenses/>.  */
  #define YY_NO_INPUT 1
! #line 24 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  #ifdef HOST_GENERATOR_FILE
  #include "config.h"
  #define GENERATOR_FILE 1
*************** update_lineno (const char *l, size_t len
*** 1238,1244 ****
  }
  
  #line 1235 "gengtype-lex.cc"
! #line 59 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
      /* Include '::' in identifiers to capture C++ scope qualifiers.  */
  
  #line 1239 "gengtype-lex.cc"
--- 1238,1244 ----
  }
  
  #line 1235 "gengtype-lex.cc"
! #line 59 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
      /* Include '::' in identifiers to capture C++ scope qualifiers.  */
  
  #line 1239 "gengtype-lex.cc"
*************** YY_DECL
*** 1462,1468 ****
  		}
  
  	{
! #line 67 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  
    /* Do this on entry to yylex():  */
    *yylval = 0;
--- 1462,1468 ----
  		}
  
  	{
! #line 67 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  
    /* Do this on entry to yylex():  */
    *yylval = 0;
*************** YY_LINENO_REWIND_TO(yy_cp - 1);
*** 1534,1540 ****
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 78 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return TYPEDEF;
--- 1534,1540 ----
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 78 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return TYPEDEF;
*************** YY_LINENO_REWIND_TO(yy_cp - 1);
*** 1547,1553 ****
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 82 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return STRUCT;
--- 1547,1553 ----
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 82 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return STRUCT;
*************** YY_LINENO_REWIND_TO(yy_cp - 1);
*** 1560,1566 ****
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 86 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return UNION;
--- 1560,1566 ----
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 86 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return UNION;
*************** YY_LINENO_REWIND_TO(yy_cp - 1);
*** 1573,1579 ****
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 90 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return STRUCT;
--- 1573,1579 ----
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 90 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return STRUCT;
*************** YY_LINENO_REWIND_TO(yy_cp - 1);
*** 1586,1592 ****
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 94 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return EXTERN;
--- 1586,1592 ----
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 94 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return EXTERN;
*************** YY_LINENO_REWIND_TO(yy_cp - 1);
*** 1599,1605 ****
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 98 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return STATIC;
--- 1599,1605 ----
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 98 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return STATIC;
*************** YY_RULE_SETUP
*** 1610,1634 ****
  
  case 7:
  YY_RULE_SETUP
! #line 106 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { BEGIN(in_struct_comment); }
  	YY_BREAK
  case 8:
  /* rule 8 can match eol */
  YY_RULE_SETUP
! #line 107 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 9:
  /* rule 9 can match eol */
  YY_RULE_SETUP
! #line 109 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { update_lineno (yytext, yyleng); }
  	YY_BREAK
  case 10:
  /* rule 10 can match eol */
  YY_RULE_SETUP
! #line 110 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 11:
--- 1610,1634 ----
  
  case 7:
  YY_RULE_SETUP
! #line 106 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { BEGIN(in_struct_comment); }
  	YY_BREAK
  case 8:
  /* rule 8 can match eol */
  YY_RULE_SETUP
! #line 107 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 9:
  /* rule 9 can match eol */
  YY_RULE_SETUP
! #line 109 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { update_lineno (yytext, yyleng); }
  	YY_BREAK
  case 10:
  /* rule 10 can match eol */
  YY_RULE_SETUP
! #line 110 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 11:
*************** YY_LINENO_REWIND_TO(yy_bp + 5);
*** 1638,1644 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 5;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 112 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  /* don't care */
  	YY_BREAK
  case 12:
--- 1638,1644 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 5;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 112 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  /* don't care */
  	YY_BREAK
  case 12:
*************** case 12:
*** 1647,1663 ****
  YY_LINENO_REWIND_TO(yy_cp - 1);
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
! #line 114 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  case 13:
  /* rule 13 can match eol */
! #line 115 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  case 14:
  /* rule 14 can match eol */
! #line 116 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  case 15:
  /* rule 15 can match eol */
  YY_RULE_SETUP
! #line 116 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
      *yylval = XDUPVAR (const char, yytext, yyleng, yyleng + 1);
      return IGNORABLE_CXX_KEYWORD;
--- 1647,1663 ----
  YY_LINENO_REWIND_TO(yy_cp - 1);
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
! #line 114 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  case 13:
  /* rule 13 can match eol */
! #line 115 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  case 14:
  /* rule 14 can match eol */
! #line 116 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  case 15:
  /* rule 15 can match eol */
  YY_RULE_SETUP
! #line 116 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
      *yylval = XDUPVAR (const char, yytext, yyleng, yyleng + 1);
      return IGNORABLE_CXX_KEYWORD;
*************** YY_LINENO_REWIND_TO(yy_bp + 3);
*** 1670,1676 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 3;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 120 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return GTY_TOKEN; }
  	YY_BREAK
  case 17:
--- 1670,1676 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 3;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 120 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return GTY_TOKEN; }
  	YY_BREAK
  case 17:
*************** YY_LINENO_REWIND_TO(yy_bp + 5);
*** 1680,1686 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 5;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 121 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return UNION; }
  	YY_BREAK
  case 18:
--- 1680,1686 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 5;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 121 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return UNION; }
  	YY_BREAK
  case 18:
*************** YY_LINENO_REWIND_TO(yy_bp + 6);
*** 1690,1696 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 6;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 122 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return STRUCT; }
  	YY_BREAK
  case 19:
--- 1690,1696 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 6;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 122 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return STRUCT; }
  	YY_BREAK
  case 19:
*************** YY_LINENO_REWIND_TO(yy_bp + 5);
*** 1700,1706 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 5;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 123 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return STRUCT; }
  	YY_BREAK
  case 20:
--- 1700,1706 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 5;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 123 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return STRUCT; }
  	YY_BREAK
  case 20:
*************** YY_LINENO_REWIND_TO(yy_bp + 7);
*** 1710,1716 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 7;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 124 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return TYPEDEF; }
  	YY_BREAK
  case 21:
--- 1710,1716 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 7;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 124 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return TYPEDEF; }
  	YY_BREAK
  case 21:
*************** YY_LINENO_REWIND_TO(yy_bp + 4);
*** 1720,1726 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 4;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 125 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return ENUM; }
  	YY_BREAK
  case 22:
--- 1720,1726 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 4;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 125 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return ENUM; }
  	YY_BREAK
  case 22:
*************** YY_LINENO_REWIND_TO(yy_bp + 9);
*** 1730,1736 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 9;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 126 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return PTR_ALIAS; }
  	YY_BREAK
  case 23:
--- 1730,1736 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 9;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 126 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return PTR_ALIAS; }
  	YY_BREAK
  case 23:
*************** YY_LINENO_REWIND_TO(yy_bp + 10);
*** 1740,1746 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 10;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 127 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return NESTED_PTR; }
  	YY_BREAK
  case 24:
--- 1740,1746 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 10;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 127 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return NESTED_PTR; }
  	YY_BREAK
  case 24:
*************** YY_LINENO_REWIND_TO(yy_bp + 4);
*** 1750,1761 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 4;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 128 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return USER_GTY; }
  	YY_BREAK
  case 25:
  YY_RULE_SETUP
! #line 129 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext, yyleng, yyleng+1);
    return NUM;
--- 1750,1761 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 4;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 128 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return USER_GTY; }
  	YY_BREAK
  case 25:
  YY_RULE_SETUP
! #line 129 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext, yyleng, yyleng+1);
    return NUM;
*************** case 26:
*** 1767,1777 ****
  YY_LINENO_REWIND_TO(yy_cp - 1);
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
! #line 135 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  case 27:
  /* rule 27 can match eol */
  YY_RULE_SETUP
! #line 135 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    size_t len;
  
--- 1767,1777 ----
  YY_LINENO_REWIND_TO(yy_cp - 1);
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
! #line 135 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  case 27:
  /* rule 27 can match eol */
  YY_RULE_SETUP
! #line 135 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    size_t len;
  
*************** YY_LINENO_REWIND_TO(yy_cp - 1);
*** 1790,1796 ****
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 146 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext, yyleng, yyleng+1);
    return ID;
--- 1790,1796 ----
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 146 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext, yyleng, yyleng+1);
    return ID;
*************** YY_RULE_SETUP
*** 1799,1805 ****
  case 29:
  /* rule 29 can match eol */
  YY_RULE_SETUP
! #line 151 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng-1);
    return STRING;
--- 1799,1805 ----
  case 29:
  /* rule 29 can match eol */
  YY_RULE_SETUP
! #line 151 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng-1);
    return STRING;
*************** YY_RULE_SETUP
*** 1809,1815 ****
  case 30:
  /* rule 30 can match eol */
  YY_RULE_SETUP
! #line 156 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng-1);
    return ARRAY;
--- 1809,1815 ----
  case 30:
  /* rule 30 can match eol */
  YY_RULE_SETUP
! #line 156 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng-1);
    return ARRAY;
*************** YY_RULE_SETUP
*** 1818,1824 ****
  case 31:
  /* rule 31 can match eol */
  YY_RULE_SETUP
! #line 160 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng);
    return CHAR;
--- 1818,1824 ----
  case 31:
  /* rule 31 can match eol */
  YY_RULE_SETUP
! #line 160 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng);
    return CHAR;
*************** YY_RULE_SETUP
*** 1826,1849 ****
  	YY_BREAK
  case 32:
  YY_RULE_SETUP
! #line 165 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return ELLIPSIS; }
  	YY_BREAK
  case 33:
  YY_RULE_SETUP
! #line 166 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return yytext[0]; }
  	YY_BREAK
  /* ignore pp-directives */
  case 34:
  /* rule 34 can match eol */
  YY_RULE_SETUP
! #line 169 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {lexer_line.line++;}
  	YY_BREAK
  case 35:
  YY_RULE_SETUP
! #line 171 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    error_at_line (&lexer_line, "unexpected character `%s'", yytext);
  }
--- 1826,1849 ----
  	YY_BREAK
  case 32:
  YY_RULE_SETUP
! #line 165 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return ELLIPSIS; }
  	YY_BREAK
  case 33:
  YY_RULE_SETUP
! #line 166 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return yytext[0]; }
  	YY_BREAK
  /* ignore pp-directives */
  case 34:
  /* rule 34 can match eol */
  YY_RULE_SETUP
! #line 169 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {lexer_line.line++;}
  	YY_BREAK
  case 35:
  YY_RULE_SETUP
! #line 171 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    error_at_line (&lexer_line, "unexpected character `%s'", yytext);
  }
*************** YY_RULE_SETUP
*** 1851,1886 ****
  
  case 36:
  YY_RULE_SETUP
! #line 176 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { BEGIN(in_comment); }
  	YY_BREAK
  case 37:
  /* rule 37 can match eol */
  YY_RULE_SETUP
! #line 177 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 38:
  /* rule 38 can match eol */
  YY_RULE_SETUP
! #line 178 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 39:
! #line 180 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  case 40:
  /* rule 40 can match eol */
! #line 181 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  case 41:
  /* rule 41 can match eol */
  YY_RULE_SETUP
! #line 181 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  case 42:
  /* rule 42 can match eol */
  YY_RULE_SETUP
! #line 182 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { update_lineno (yytext, yyleng); }
  	YY_BREAK
  case 43:
--- 1851,1886 ----
  
  case 36:
  YY_RULE_SETUP
! #line 176 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { BEGIN(in_comment); }
  	YY_BREAK
  case 37:
  /* rule 37 can match eol */
  YY_RULE_SETUP
! #line 177 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 38:
  /* rule 38 can match eol */
  YY_RULE_SETUP
! #line 178 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 39:
! #line 180 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  case 40:
  /* rule 40 can match eol */
! #line 181 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  case 41:
  /* rule 41 can match eol */
  YY_RULE_SETUP
! #line 181 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  case 42:
  /* rule 42 can match eol */
  YY_RULE_SETUP
! #line 182 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { update_lineno (yytext, yyleng); }
  	YY_BREAK
  case 43:
*************** YY_LINENO_REWIND_TO(yy_bp + 1);
*** 1890,1910 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 183 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  
  case 44:
  /* rule 44 can match eol */
  YY_RULE_SETUP
! #line 186 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 45:
! #line 188 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  case 46:
  YY_RULE_SETUP
! #line 188 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  case 47:
--- 1890,1910 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 183 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  
  case 44:
  /* rule 44 can match eol */
  YY_RULE_SETUP
! #line 186 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 45:
! #line 188 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  case 46:
  YY_RULE_SETUP
! #line 188 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  case 47:
*************** YY_LINENO_REWIND_TO(yy_bp + 1);
*** 1914,1938 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 189 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  
  case 48:
  YY_RULE_SETUP
! #line 192 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { BEGIN(INITIAL); } 
  	YY_BREAK
  case 49:
  YY_RULE_SETUP
! #line 193 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { BEGIN(in_struct); }
  	YY_BREAK
  case 50:
! #line 196 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  case 51:
  YY_RULE_SETUP
! #line 196 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    error_at_line (&lexer_line, 
  		 "unterminated comment or string; unexpected EOF");
--- 1914,1938 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 189 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  
  case 48:
  YY_RULE_SETUP
! #line 192 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { BEGIN(INITIAL); } 
  	YY_BREAK
  case 49:
  YY_RULE_SETUP
! #line 193 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { BEGIN(in_struct); }
  	YY_BREAK
  case 50:
! #line 196 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  case 51:
  YY_RULE_SETUP
! #line 196 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    error_at_line (&lexer_line, 
  		 "unterminated comment or string; unexpected EOF");
*************** YY_RULE_SETUP
*** 1941,1952 ****
  case 52:
  /* rule 52 can match eol */
  YY_RULE_SETUP
! #line 201 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  case 53:
  YY_RULE_SETUP
! #line 203 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  YY_FATAL_ERROR( "flex scanner jammed" );
  	YY_BREAK
  #line 1947 "gengtype-lex.cc"
--- 1941,1952 ----
  case 52:
  /* rule 52 can match eol */
  YY_RULE_SETUP
! #line 201 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  case 53:
  YY_RULE_SETUP
! #line 203 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  YY_FATAL_ERROR( "flex scanner jammed" );
  	YY_BREAK
  #line 1947 "gengtype-lex.cc"
*************** void yyfree (void * ptr )
*** 2924,2930 ****
  
  #define YYTABLES_NAME "yytables"
  
! #line 203 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  
  
  void
--- 2924,2930 ----
  
  #define YYTABLES_NAME "yytables"
  
! #line 203 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  
  
  void
diff -Nrcpad gcc-12.3.0/gcc/genmatch.cc gcc-12.4.0/gcc/genmatch.cc
*** gcc-12.3.0/gcc/genmatch.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/genmatch.cc	Thu Jun 20 08:08:06 2024
*************** expr::gen_transform (FILE *f, int indent
*** 2548,2554 ****
  	{
  	  fprintf_indent (f, indent, "if (TREE_TYPE (_o%d[0]) != %s)\n",
  			  depth, type);
! 	  indent += 2;
  	}
        if (opr->kind == id_base::CODE)
  	fprintf_indent (f, indent, "_r%d = fold_build%d_loc (loc, %s, %s",
--- 2548,2555 ----
  	{
  	  fprintf_indent (f, indent, "if (TREE_TYPE (_o%d[0]) != %s)\n",
  			  depth, type);
! 	  fprintf_indent (f, indent + 2, "{\n");
! 	  indent += 4;
  	}
        if (opr->kind == id_base::CODE)
  	fprintf_indent (f, indent, "_r%d = fold_build%d_loc (loc, %s, %s",
*************** expr::gen_transform (FILE *f, int indent
*** 2571,2577 ****
  	}
        if (*opr == CONVERT_EXPR)
  	{
! 	  indent -= 2;
  	  fprintf_indent (f, indent, "else\n");
  	  fprintf_indent (f, indent, "  _r%d = _o%d[0];\n", depth, depth);
  	}
--- 2572,2579 ----
  	}
        if (*opr == CONVERT_EXPR)
  	{
! 	  fprintf_indent (f, indent - 2, "}\n");
! 	  indent -= 4;
  	  fprintf_indent (f, indent, "else\n");
  	  fprintf_indent (f, indent, "  _r%d = _o%d[0];\n", depth, depth);
  	}
diff -Nrcpad gcc-12.3.0/gcc/ggc-common.cc gcc-12.4.0/gcc/ggc-common.cc
*** gcc-12.3.0/gcc/ggc-common.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ggc-common.cc	Thu Jun 20 08:08:06 2024
*************** gt_pch_save (FILE *f)
*** 670,676 ****
      {
        gcc_assert ((uintptr_t) addr >= (uintptr_t) mmi.preferred_base
  		  && ((uintptr_t) addr + sizeof (void *)
! 		      < (uintptr_t) mmi.preferred_base + mmi.size));
        if (addr == last_addr)
  	continue;
        if (last_addr == NULL)
--- 670,676 ----
      {
        gcc_assert ((uintptr_t) addr >= (uintptr_t) mmi.preferred_base
  		  && ((uintptr_t) addr + sizeof (void *)
! 		      <= (uintptr_t) mmi.preferred_base + mmi.size));
        if (addr == last_addr)
  	continue;
        if (last_addr == NULL)
diff -Nrcpad gcc-12.3.0/gcc/gimple-fold.cc gcc-12.4.0/gcc/gimple-fold.cc
*** gcc-12.3.0/gcc/gimple-fold.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/gimple-fold.cc	Thu Jun 20 08:08:06 2024
*************** get_base_constructor (tree base, poly_in
*** 7770,7781 ****
      }
  }
  
! /* CTOR is CONSTRUCTOR of an array type.  Fold a reference of SIZE bits
!    to the memory at bit OFFSET.     When non-null, TYPE is the expected
!    type of the reference; otherwise the type of the referenced element
!    is used instead. When SIZE is zero, attempt to fold a reference to
!    the entire element which OFFSET refers to.  Increment *SUBOFF by
!    the bit offset of the accessed element.  */
  
  static tree
  fold_array_ctor_reference (tree type, tree ctor,
--- 7770,7780 ----
      }
  }
  
! /* CTOR is a CONSTRUCTOR of an array or vector type.  Fold a reference of SIZE
!    bits to the memory at bit OFFSET.  If non-null, TYPE is the expected type of
!    the reference; otherwise the type of the referenced element is used instead.
!    When SIZE is zero, attempt to fold a reference to the entire element OFFSET
!    refers to.  Increment *SUBOFF by the bit offset of the accessed element.  */
  
  static tree
  fold_array_ctor_reference (tree type, tree ctor,
*************** fold_array_ctor_reference (tree type, tr
*** 7940,7952 ****
    return type ? build_zero_cst (type) : NULL_TREE;
  }
  
! /* CTOR is CONSTRUCTOR of an aggregate or vector.  Fold a reference
!    of SIZE bits to the memory at bit OFFSET.   When non-null, TYPE
!    is the expected type of the reference; otherwise the type of
!    the referenced member is used instead.  When SIZE is zero,
!    attempt to fold a reference to the entire member which OFFSET
!    refers to; in this case.  Increment *SUBOFF by the bit offset
!    of the accessed member.  */
  
  static tree
  fold_nonarray_ctor_reference (tree type, tree ctor,
--- 7939,7949 ----
    return type ? build_zero_cst (type) : NULL_TREE;
  }
  
! /* CTOR is a CONSTRUCTOR of a record or union type.  Fold a reference of SIZE
!    bits to the memory at bit OFFSET.  If non-null, TYPE is the expected type of
!    the reference; otherwise the type of the referenced member is used instead.
!    When SIZE is zero, attempt to fold a reference to the entire member OFFSET
!    refers to.  Increment *SUBOFF by the bit offset of the accessed member.  */
  
  static tree
  fold_nonarray_ctor_reference (tree type, tree ctor,
*************** fold_nonarray_ctor_reference (tree type,
*** 7958,7965 ****
    unsigned HOST_WIDE_INT cnt;
    tree cfield, cval;
  
!   FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), cnt, cfield,
! 			    cval)
      {
        tree byte_offset = DECL_FIELD_OFFSET (cfield);
        tree field_offset = DECL_FIELD_BIT_OFFSET (cfield);
--- 7955,7961 ----
    unsigned HOST_WIDE_INT cnt;
    tree cfield, cval;
  
!   FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), cnt, cfield, cval)
      {
        tree byte_offset = DECL_FIELD_OFFSET (cfield);
        tree field_offset = DECL_FIELD_BIT_OFFSET (cfield);
*************** fold_nonarray_ctor_reference (tree type,
*** 8031,8036 ****
--- 8027,8045 ----
  	    return NULL_TREE;
  
  	  offset_int inner_offset = offset_int (offset) - bitoffset;
+ 
+ 	  /* Integral bit-fields are left-justified on big-endian targets, so
+ 	     we must arrange for native_encode_int to start at their MSB.  */
+ 	  if (DECL_BIT_FIELD (cfield) && INTEGRAL_TYPE_P (TREE_TYPE (cfield)))
+ 	    {
+ 	      if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN)
+ 		return NULL_TREE;
+ 	      const unsigned int encoding_size
+ 		= GET_MODE_BITSIZE (SCALAR_INT_TYPE_MODE (TREE_TYPE (cfield)));
+ 	      if (BYTES_BIG_ENDIAN)
+ 		inner_offset += encoding_size - wi::to_offset (field_size);
+ 	    }
+ 
  	  return fold_ctor_reference (type, cval,
  				      inner_offset.to_uhwi (), size,
  				      from_decl, suboff);
*************** fold_nonarray_ctor_reference (tree type,
*** 8043,8049 ****
    return build_zero_cst (type);
  }
  
! /* CTOR is value initializing memory.  Fold a reference of TYPE and
     bit size POLY_SIZE to the memory at bit POLY_OFFSET.  When POLY_SIZE
     is zero, attempt to fold a reference to the entire subobject
     which OFFSET refers to.  This is used when folding accesses to
--- 8052,8058 ----
    return build_zero_cst (type);
  }
  
! /* CTOR is a value initializing memory.  Fold a reference of TYPE and
     bit size POLY_SIZE to the memory at bit POLY_OFFSET.  When POLY_SIZE
     is zero, attempt to fold a reference to the entire subobject
     which OFFSET refers to.  This is used when folding accesses to
*************** fold_ctor_reference (tree type, tree cto
*** 8084,8090 ****
  	}
        return ret;
      }
!   /* For constants and byte-aligned/sized reads try to go through
       native_encode/interpret.  */
    if (CONSTANT_CLASS_P (ctor)
        && BITS_PER_UNIT == 8
--- 8093,8100 ----
  	}
        return ret;
      }
! 
!   /* For constants and byte-aligned/sized reads, try to go through
       native_encode/interpret.  */
    if (CONSTANT_CLASS_P (ctor)
        && BITS_PER_UNIT == 8
*************** fold_ctor_reference (tree type, tree cto
*** 8100,8106 ****
        if (len > 0)
  	return native_interpret_expr (type, buf, len);
      }
!   if (TREE_CODE (ctor) == CONSTRUCTOR)
      {
        unsigned HOST_WIDE_INT dummy = 0;
        if (!suboff)
--- 8110,8121 ----
        if (len > 0)
  	return native_interpret_expr (type, buf, len);
      }
! 
!   /* For constructors, try first a recursive local processing, but in any case
!      this requires the native storage order.  */
!   if (TREE_CODE (ctor) == CONSTRUCTOR
!       && !(AGGREGATE_TYPE_P (TREE_TYPE (ctor))
! 	   && TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (ctor))))
      {
        unsigned HOST_WIDE_INT dummy = 0;
        if (!suboff)
*************** fold_ctor_reference (tree type, tree cto
*** 8115,8123 ****
  	ret = fold_nonarray_ctor_reference (type, ctor, offset, size,
  					    from_decl, suboff);
  
!       /* Fall back to native_encode_initializer.  Needs to be done
! 	 only in the outermost fold_ctor_reference call (because it itself
! 	 recurses into CONSTRUCTORs) and doesn't update suboff.  */
        if (ret == NULL_TREE
  	  && suboff == &dummy
  	  && BITS_PER_UNIT == 8
--- 8130,8138 ----
  	ret = fold_nonarray_ctor_reference (type, ctor, offset, size,
  					    from_decl, suboff);
  
!       /* Otherwise fall back to native_encode_initializer.  This may be done
! 	 only from the outermost fold_ctor_reference call (because it itself
! 	 recurses into CONSTRUCTORs and doesn't update suboff).  */
        if (ret == NULL_TREE
  	  && suboff == &dummy
  	  && BITS_PER_UNIT == 8
diff -Nrcpad gcc-12.3.0/gcc/gimple-match-head.cc gcc-12.4.0/gcc/gimple-match-head.cc
*** gcc-12.3.0/gcc/gimple-match-head.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/gimple-match-head.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 45,50 ****
--- 45,52 ----
  #include "dbgcnt.h"
  #include "tm.h"
  #include "gimple-range.h"
+ #include "attribs.h"
+ #include "asan.h"
  
  /* Forward declarations of the private auto-generated matchers.
     They expect valueized operands in canonical order and do not
diff -Nrcpad gcc-12.3.0/gcc/gimple-range-cache.cc gcc-12.4.0/gcc/gimple-range-cache.cc
*** gcc-12.3.0/gcc/gimple-range-cache.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/gimple-range-cache.cc	Thu Jun 20 08:08:06 2024
*************** block_range_cache::set_bb_range (tree na
*** 448,454 ****
  {
    unsigned v = SSA_NAME_VERSION (name);
    if (v >= m_ssa_ranges.length ())
!     m_ssa_ranges.safe_grow_cleared (num_ssa_names + 1);
  
    if (!m_ssa_ranges[v])
      {
--- 448,454 ----
  {
    unsigned v = SSA_NAME_VERSION (name);
    if (v >= m_ssa_ranges.length ())
!     m_ssa_ranges.safe_grow_cleared (num_ssa_names);
  
    if (!m_ssa_ranges[v])
      {
*************** void
*** 515,521 ****
  block_range_cache::dump (FILE *f)
  {
    unsigned x;
!   for (x = 0; x < m_ssa_ranges.length (); ++x)
      {
        if (m_ssa_ranges[x])
  	{
--- 515,521 ----
  block_range_cache::dump (FILE *f)
  {
    unsigned x;
!   for (x = 1; x < m_ssa_ranges.length (); ++x)
      {
        if (m_ssa_ranges[x])
  	{
*************** block_range_cache::dump (FILE *f, basic_
*** 538,546 ****
    bool summarize_varying = false;
    for (x = 1; x < m_ssa_ranges.length (); ++x)
      {
        if (!gimple_range_ssa_p (ssa_name (x)))
  	continue;
!       if (m_ssa_ranges[x] && m_ssa_ranges[x]->get_bb_range (r, bb))
  	{
  	  if (!print_varying && r.varying_p ())
  	    {
--- 538,549 ----
    bool summarize_varying = false;
    for (x = 1; x < m_ssa_ranges.length (); ++x)
      {
+       if (!m_ssa_ranges[x])
+ 	continue;
+ 
        if (!gimple_range_ssa_p (ssa_name (x)))
  	continue;
!       if (m_ssa_ranges[x]->get_bb_range (r, bb))
  	{
  	  if (!print_varying && r.varying_p ())
  	    {
*************** block_range_cache::dump (FILE *f, basic_
*** 557,567 ****
    if (summarize_varying)
      {
        fprintf (f, "VARYING_P on entry : ");
!       for (x = 1; x < num_ssa_names; ++x)
  	{
  	  if (!gimple_range_ssa_p (ssa_name (x)))
  	    continue;
! 	  if (m_ssa_ranges[x] && m_ssa_ranges[x]->get_bb_range (r, bb))
  	    {
  	      if (r.varying_p ())
  		{
--- 560,573 ----
    if (summarize_varying)
      {
        fprintf (f, "VARYING_P on entry : ");
!       for (x = 1; x < m_ssa_ranges.length (); ++x)
  	{
+ 	  if (!m_ssa_ranges[x])
+ 	    continue;
+ 
  	  if (!gimple_range_ssa_p (ssa_name (x)))
  	    continue;
! 	  if (m_ssa_ranges[x]->get_bb_range (r, bb))
  	    {
  	      if (r.varying_p ())
  		{
diff -Nrcpad gcc-12.3.0/gcc/gimple-range-gori.cc gcc-12.4.0/gcc/gimple-range-gori.cc
*** gcc-12.3.0/gcc/gimple-range-gori.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/gimple-range-gori.cc	Thu Jun 20 08:08:06 2024
*************** gori_compute::logical_combine (irange &r
*** 880,885 ****
--- 880,886 ----
  	res = false;
        if (idx)
  	tracer.trailer (idx, "logical_combine", res, NULL_TREE, r);
+       return res;
      }
  
    switch (code)
diff -Nrcpad gcc-12.3.0/gcc/gimple-ssa-backprop.cc gcc-12.4.0/gcc/gimple-ssa-backprop.cc
*** gcc-12.3.0/gcc/gimple-ssa-backprop.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/gimple-ssa-backprop.cc	Thu Jun 20 08:08:06 2024
*************** strip_sign_op_1 (tree rhs)
*** 688,694 ****
      switch (gimple_assign_rhs_code (assign))
        {
        case ABS_EXPR:
-       case ABSU_EXPR:
        case NEGATE_EXPR:
  	return gimple_assign_rhs1 (assign);
  
--- 688,693 ----
diff -Nrcpad gcc-12.3.0/gcc/gimple-ssa-sprintf.cc gcc-12.4.0/gcc/gimple-ssa-sprintf.cc
*** gcc-12.3.0/gcc/gimple-ssa-sprintf.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/gimple-ssa-sprintf.cc	Thu Jun 20 08:08:06 2024
*************** format_character (const directive &dir,
*** 2166,2173 ****
  
    res.knownrange = true;
  
!   if (dir.specifier == 'C'
!       || dir.modifier == FMT_LEN_l)
      {
        /* A wide character can result in as few as zero bytes.  */
        res.range.min = 0;
--- 2166,2172 ----
  
    res.knownrange = true;
  
!   if (dir.specifier == 'C' || dir.modifier == FMT_LEN_l)
      {
        /* A wide character can result in as few as zero bytes.  */
        res.range.min = 0;
*************** format_character (const directive &dir,
*** 2178,2187 ****
  	{
  	  if (min == 0 && max == 0)
  	    {
! 	      /* The NUL wide character results in no bytes.  */
! 	      res.range.max = 0;
! 	      res.range.likely = 0;
! 	      res.range.unlikely = 0;
  	    }
  	  else if (min >= 0 && min < 128)
  	    {
--- 2177,2189 ----
  	{
  	  if (min == 0 && max == 0)
  	    {
! 	      /* In strict reading of older ISO C or POSIX, this required
! 		 no characters to be emitted.  ISO C23 changes that, so
! 		 does POSIX, to match what has been implemented in most of the
! 		 implementations, namely emitting a single NUL character.
! 		 Let's use 0 for minimum and 1 for all the other values.  */
! 	      res.range.max = 1;
! 	      res.range.likely = res.range.unlikely = 1;
  	    }
  	  else if (min >= 0 && min < 128)
  	    {
*************** format_character (const directive &dir,
*** 2189,2199 ****
  		 is not a 1-to-1 mapping to the source character set or
  		 if the source set is not ASCII.  */
  	      bool one_2_one_ascii
! 		= (target_to_host_charmap[0] == 1 && target_to_host ('a') == 97);
  
  	      /* A wide character in the ASCII range most likely results
  		 in a single byte, and only unlikely in up to MB_LEN_MAX.  */
! 	      res.range.max = one_2_one_ascii ? 1 : target_mb_len_max ();;
  	      res.range.likely = 1;
  	      res.range.unlikely = target_mb_len_max ();
  	      res.mayfail = !one_2_one_ascii;
--- 2191,2202 ----
  		 is not a 1-to-1 mapping to the source character set or
  		 if the source set is not ASCII.  */
  	      bool one_2_one_ascii
! 		= (target_to_host_charmap[0] == 1
! 		   && target_to_host ('a') == 97);
  
  	      /* A wide character in the ASCII range most likely results
  		 in a single byte, and only unlikely in up to MB_LEN_MAX.  */
! 	      res.range.max = one_2_one_ascii ? 1 : target_mb_len_max ();
  	      res.range.likely = 1;
  	      res.range.unlikely = target_mb_len_max ();
  	      res.mayfail = !one_2_one_ascii;
*************** format_character (const directive &dir,
*** 2224,2230 ****
        /* A plain '%c' directive.  Its output is exactly 1.  */
        res.range.min = res.range.max = 1;
        res.range.likely = res.range.unlikely = 1;
-       res.knownrange = true;
      }
  
    /* Bump up the byte counters if WIDTH is greater.  */
--- 2227,2232 ----
diff -Nrcpad gcc-12.3.0/gcc/gimple-ssa-store-merging.cc gcc-12.4.0/gcc/gimple-ssa-store-merging.cc
*** gcc-12.3.0/gcc/gimple-ssa-store-merging.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/gimple-ssa-store-merging.cc	Thu Jun 20 08:08:06 2024
*************** imm_store_chain_info::output_merged_stor
*** 4605,4616 ****
  		    }
  		  else if ((BYTES_BIG_ENDIAN ? start_gap : end_gap) > 0)
  		    {
! 		      const unsigned HOST_WIDE_INT imask
! 			= (HOST_WIDE_INT_1U << info->bitsize) - 1;
  		      tem = gimple_build (&seq, loc,
  					  BIT_AND_EXPR, TREE_TYPE (tem), tem,
! 					  build_int_cst (TREE_TYPE (tem),
! 							 imask));
  		    }
  		  const HOST_WIDE_INT shift
  		    = (BYTES_BIG_ENDIAN ? end_gap : start_gap);
--- 4605,4617 ----
  		    }
  		  else if ((BYTES_BIG_ENDIAN ? start_gap : end_gap) > 0)
  		    {
! 		      wide_int imask
! 			= wi::mask (info->bitsize, false,
! 				    TYPE_PRECISION (TREE_TYPE (tem)));
  		      tem = gimple_build (&seq, loc,
  					  BIT_AND_EXPR, TREE_TYPE (tem), tem,
! 					  wide_int_to_tree (TREE_TYPE (tem),
! 							    imask));
  		    }
  		  const HOST_WIDE_INT shift
  		    = (BYTES_BIG_ENDIAN ? end_gap : start_gap);
diff -Nrcpad gcc-12.3.0/gcc/gimple-ssa-warn-access.cc gcc-12.4.0/gcc/gimple-ssa-warn-access.cc
*** gcc-12.3.0/gcc/gimple-ssa-warn-access.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/gimple-ssa-warn-access.cc	Thu Jun 20 08:08:06 2024
*************** new_delete_mismatch_p (const demangle_co
*** 1688,1693 ****
--- 1688,1694 ----
  
      case DEMANGLE_COMPONENT_FUNCTION_PARAM:
      case DEMANGLE_COMPONENT_TEMPLATE_PARAM:
+     case DEMANGLE_COMPONENT_UNNAMED_TYPE:
        return newc.u.s_number.number != delc.u.s_number.number;
  
      case DEMANGLE_COMPONENT_CHARACTER:
diff -Nrcpad gcc-12.3.0/gcc/gimplify.cc gcc-12.4.0/gcc/gimplify.cc
*** gcc-12.3.0/gcc/gimplify.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/gimplify.cc	Thu Jun 20 08:08:06 2024
*************** gimplify_switch_expr (tree *expr_p, gimp
*** 2764,2769 ****
--- 2764,2770 ----
  
        switch_stmt = gimple_build_switch (SWITCH_COND (switch_expr),
  					 default_case, labels);
+       gimple_set_location (switch_stmt, EXPR_LOCATION (switch_expr));
        /* For the benefit of -Wimplicit-fallthrough, if switch_body_seq
  	 ends with a GIMPLE_LABEL holding SWITCH_BREAK_LABEL_P LABEL_DECL,
  	 wrap the GIMPLE_SWITCH up to that GIMPLE_LABEL into a GIMPLE_BIND,
*************** gimplify_asm_expr (tree *expr_p, gimple_
*** 6847,6853 ****
        stmt = gimple_build_asm_vec (TREE_STRING_POINTER (ASM_STRING (expr)),
  				   inputs, outputs, clobbers, labels);
  
!       gimple_asm_set_volatile (stmt, ASM_VOLATILE_P (expr) || noutputs == 0);
        gimple_asm_set_input (stmt, ASM_INPUT_P (expr));
        gimple_asm_set_inline (stmt, ASM_INLINE_P (expr));
  
--- 6848,6859 ----
        stmt = gimple_build_asm_vec (TREE_STRING_POINTER (ASM_STRING (expr)),
  				   inputs, outputs, clobbers, labels);
  
!       /* asm is volatile if it was marked by the user as volatile or
! 	 there are no outputs or this is an asm goto.  */
!       gimple_asm_set_volatile (stmt,
! 			       ASM_VOLATILE_P (expr)
! 			       || noutputs == 0
! 			       || labels);
        gimple_asm_set_input (stmt, ASM_INPUT_P (expr));
        gimple_asm_set_inline (stmt, ASM_INLINE_P (expr));
  
diff -Nrcpad gcc-12.3.0/gcc/go/ChangeLog gcc-12.4.0/gcc/go/ChangeLog
*** gcc-12.3.0/gcc/go/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/go/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,15 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2023-06-28  Paul E. Murphy  <murphyp@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-06-22  Paul E. Murphy  <murphyp@linux.ibm.com>
+ 
+ 	* go-backend.cc [TARGET_AIX]: Rename and update usage to TARGET_AIX_OS.
+ 	* go-lang.cc: Likewise.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/go/go-backend.cc gcc-12.4.0/gcc/go/go-backend.cc
*** gcc-12.3.0/gcc/go/go-backend.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/go/go-backend.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 45,52 ****
  #define GO_EXPORT_SECTION_NAME ".go_export"
  #endif
  
! #ifndef TARGET_AIX
! #define TARGET_AIX 0
  #endif
  
  /* This file holds all the cases where the Go frontend needs
--- 45,52 ----
  #define GO_EXPORT_SECTION_NAME ".go_export"
  #endif
  
! #ifndef TARGET_AIX_OS
! #define TARGET_AIX_OS 0
  #endif
  
  /* This file holds all the cases where the Go frontend needs
*************** go_write_export_data (const char *bytes,
*** 107,113 ****
      {
        gcc_assert (targetm_common.have_named_sections);
        sec = get_section (GO_EXPORT_SECTION_NAME,
! 			 TARGET_AIX ? SECTION_EXCLUDE : SECTION_DEBUG,
  			 NULL);
      }
  
--- 107,113 ----
      {
        gcc_assert (targetm_common.have_named_sections);
        sec = get_section (GO_EXPORT_SECTION_NAME,
! 			 TARGET_AIX_OS ? SECTION_EXCLUDE : SECTION_DEBUG,
  			 NULL);
      }
  
diff -Nrcpad gcc-12.3.0/gcc/go/go-lang.cc gcc-12.4.0/gcc/go/go-lang.cc
*** gcc-12.3.0/gcc/go/go-lang.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/go/go-lang.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 39,46 ****
  #include "go-c.h"
  #include "go-gcc.h"
  
! #ifndef TARGET_AIX
! #define TARGET_AIX 0
  #endif
  
  /* Language-dependent contents of a type.  */
--- 39,46 ----
  #include "go-c.h"
  #include "go-gcc.h"
  
! #ifndef TARGET_AIX_OS
! #define TARGET_AIX_OS 0
  #endif
  
  /* Language-dependent contents of a type.  */
*************** go_langhook_init (void)
*** 119,127 ****
    args.compiling_runtime = go_compiling_runtime;
    args.debug_escape_level = go_debug_escape_level;
    args.debug_escape_hash = go_debug_escape_hash;
!   args.nil_check_size_threshold = TARGET_AIX ? -1 : 4096;
    args.debug_optimization = go_debug_optimization;
!   args.need_eqtype = TARGET_AIX ? true : false;
    args.linemap = go_get_linemap();
    args.backend = go_get_backend();
    go_create_gogo (&args);
--- 119,127 ----
    args.compiling_runtime = go_compiling_runtime;
    args.debug_escape_level = go_debug_escape_level;
    args.debug_escape_hash = go_debug_escape_hash;
!   args.nil_check_size_threshold = TARGET_AIX_OS ? -1 : 4096;
    args.debug_optimization = go_debug_optimization;
!   args.need_eqtype = TARGET_AIX_OS ? true : false;
    args.linemap = go_get_linemap();
    args.backend = go_get_backend();
    go_create_gogo (&args);
diff -Nrcpad gcc-12.3.0/gcc/go/gofrontend/expressions.cc gcc-12.4.0/gcc/go/gofrontend/expressions.cc
*** gcc-12.3.0/gcc/go/gofrontend/expressions.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/go/gofrontend/expressions.cc	Thu Jun 20 08:08:06 2024
*************** Call_expression::intrinsify(Gogo* gogo,
*** 12325,12331 ****
            return Runtime::make_call(code, loc, 3, a1, a2, a3);
          }
      }
!   else if (package == "internal/abi")
      {
        if (is_method)
  	return NULL;
--- 12325,12332 ----
            return Runtime::make_call(code, loc, 3, a1, a2, a3);
          }
      }
!   else if (package == "internal/abi"
! 	   || package == "bootstrap/internal/abi") // for bootstrapping gc
      {
        if (is_method)
  	return NULL;
diff -Nrcpad gcc-12.3.0/gcc/go/gofrontend/gogo.cc gcc-12.4.0/gcc/go/gofrontend/gogo.cc
*** gcc-12.3.0/gcc/go/gofrontend/gogo.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/go/gofrontend/gogo.cc	Thu Jun 20 08:08:06 2024
*************** class Create_function_descriptors : publ
*** 3331,3336 ****
--- 3331,3339 ----
    int
    expression(Expression**);
  
+   static bool
+   skip_descriptor(Gogo* gogo, const Named_object*);
+ 
   private:
    Gogo* gogo_;
  };
*************** class Create_function_descriptors : publ
*** 3341,3346 ****
--- 3344,3352 ----
  int
  Create_function_descriptors::function(Named_object* no)
  {
+   if (Create_function_descriptors::skip_descriptor(this->gogo_, no))
+     return TRAVERSE_CONTINUE;
+ 
    if (no->is_function()
        && no->func_value()->enclosing() == NULL
        && !no->func_value()->is_method()
*************** Create_function_descriptors::expression(
*** 3428,3433 ****
--- 3434,3461 ----
    return TRAVERSE_CONTINUE;
  }
  
+ // The gc compiler has some special cases that it always compiles as
+ // intrinsics.  For those we don't want to generate a function
+ // descriptor, as there will be no code for it to refer to.
+ 
+ bool
+ Create_function_descriptors::skip_descriptor(Gogo* gogo,
+ 					     const Named_object* no)
+ {
+   const std::string& pkgpath(no->package() == NULL
+ 			     ? gogo->pkgpath()
+ 			     : no->package()->pkgpath());
+ 
+   // internal/abi is the standard library package,
+   // bootstrap/internal/abi is the name used when bootstrapping the gc
+   // compiler.
+ 
+   return ((pkgpath == "internal/abi"
+ 	   || pkgpath == "bootstrap/internal/abi")
+ 	  && (no->name() == "FuncPCABI0"
+ 	      || no->name() == "FuncPCABIInternal"));
+ }
+ 
  // Create function descriptors as needed.  We need a function
  // descriptor for all exported functions and for all functions that
  // are referenced without being called.
*************** Gogo::create_function_descriptors()
*** 3449,3455 ****
        if (no->is_function_declaration()
  	  && !no->func_declaration_value()->type()->is_method()
  	  && !Linemap::is_predeclared_location(no->location())
! 	  && !Gogo::is_hidden_name(no->name()))
  	fndecls.push_back(no);
      }
    for (std::vector<Named_object*>::const_iterator p = fndecls.begin();
--- 3477,3484 ----
        if (no->is_function_declaration()
  	  && !no->func_declaration_value()->type()->is_method()
  	  && !Linemap::is_predeclared_location(no->location())
! 	  && !Gogo::is_hidden_name(no->name())
! 	  && !Create_function_descriptors::skip_descriptor(this, no))
  	fndecls.push_back(no);
      }
    for (std::vector<Named_object*>::const_iterator p = fndecls.begin();
diff -Nrcpad gcc-12.3.0/gcc/internal-fn.cc gcc-12.4.0/gcc/internal-fn.cc
*** gcc-12.3.0/gcc/internal-fn.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/internal-fn.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 52,57 ****
--- 52,59 ----
  #include "explow.h"
  #include "rtl-iter.h"
  #include "gimple-range.h"
+ #include "tree-ssa-live.h"
+ #include "tree-outof-ssa.h"
  
  /* For lang_hooks.types.type_for_mode.  */
  #include "langhooks.h"
*************** expand_mul_overflow (location_t loc, tre
*** 1393,1399 ****
--- 1395,1405 ----
    rtx target = NULL_RTX;
    signop sign;
    enum insn_code icode;
+   int save_flag_trapv = flag_trapv;
  
+   /* We don't want any __mulv?i3 etc. calls from the expansion of
+      these internal functions, so disable -ftrapv temporarily.  */
+   flag_trapv = 0;
    done_label = gen_label_rtx ();
    do_error = gen_label_rtx ();
  
*************** expand_mul_overflow (location_t loc, tre
*** 2235,2240 ****
--- 2241,2247 ----
        else
  	expand_arith_overflow_result_store (lhs, target, mode, res);
      }
+   flag_trapv = save_flag_trapv;
  }
  
  /* Expand UBSAN_CHECK_* internal function if it has vector operands.  */
*************** expand_vector_ubsan_overflow (location_t
*** 2255,2261 ****
--- 2262,2272 ----
    rtx resvr = NULL_RTX;
    unsigned HOST_WIDE_INT const_cnt = 0;
    bool use_loop_p = (!cnt.is_constant (&const_cnt) || const_cnt > 4);
+   int save_flag_trapv = flag_trapv;
  
+   /* We don't want any __mulv?i3 etc. calls from the expansion of
+      these internal functions, so disable -ftrapv temporarily.  */
+   flag_trapv = 0;
    if (lhs)
      {
        optab op;
*************** expand_vector_ubsan_overflow (location_t
*** 2385,2390 ****
--- 2396,2402 ----
      }
    else if (resvr)
      emit_move_insn (lhsr, resvr);
+   flag_trapv = save_flag_trapv;
  }
  
  /* Expand UBSAN_CHECK_ADD call STMT.  */
*************** expand_arith_overflow (enum tree_code co
*** 2463,2469 ****
--- 2475,2485 ----
    prec0 = MIN (prec0, pr);
    pr = get_min_precision (arg1, uns1_p ? UNSIGNED : SIGNED);
    prec1 = MIN (prec1, pr);
+   int save_flag_trapv = flag_trapv;
  
+   /* We don't want any __mulv?i3 etc. calls from the expansion of
+      these internal functions, so disable -ftrapv temporarily.  */
+   flag_trapv = 0;
    /* If uns0_p && uns1_p, precop is minimum needed precision
       of unsigned type to hold the exact result, otherwise
       precop is minimum needed precision of signed type to
*************** expand_arith_overflow (enum tree_code co
*** 2504,2509 ****
--- 2520,2526 ----
  	  ops.location = loc;
  	  rtx tem = expand_expr_real_2 (&ops, NULL_RTX, mode, EXPAND_NORMAL);
  	  expand_arith_overflow_result_store (lhs, target, mode, tem);
+ 	  flag_trapv = save_flag_trapv;
  	  return;
  	}
  
*************** expand_arith_overflow (enum tree_code co
*** 2527,2542 ****
--- 2544,2562 ----
  	      if (integer_zerop (arg0) && !unsr_p)
  		{
  		  expand_neg_overflow (loc, lhs, arg1, false, NULL);
+ 		  flag_trapv = save_flag_trapv;
  		  return;
  		}
  	      /* FALLTHRU */
  	    case PLUS_EXPR:
  	      expand_addsub_overflow (loc, code, lhs, arg0, arg1, unsr_p,
  				      unsr_p, unsr_p, false, NULL);
+ 	      flag_trapv = save_flag_trapv;
  	      return;
  	    case MULT_EXPR:
  	      expand_mul_overflow (loc, lhs, arg0, arg1, unsr_p,
  				   unsr_p, unsr_p, false, NULL);
+ 	      flag_trapv = save_flag_trapv;
  	      return;
  	    default:
  	      gcc_unreachable ();
*************** expand_arith_overflow (enum tree_code co
*** 2582,2587 ****
--- 2602,2608 ----
  	  else
  	    expand_mul_overflow (loc, lhs, arg0, arg1, unsr_p,
  				 uns0_p, uns1_p, false, NULL);
+ 	  flag_trapv = save_flag_trapv;
  	  return;
  	}
  
*************** expand_call_mem_ref (tree type, gcall *s
*** 2663,2670 ****
    tree tmp = addr;
    if (TREE_CODE (tmp) == SSA_NAME)
      {
!       gimple *def = SSA_NAME_DEF_STMT (tmp);
!       if (gimple_assign_single_p (def))
  	tmp = gimple_assign_rhs1 (def);
      }
  
--- 2684,2691 ----
    tree tmp = addr;
    if (TREE_CODE (tmp) == SSA_NAME)
      {
!       gimple *def = get_gimple_for_ssa_name (tmp);
!       if (def && gimple_assign_single_p (def))
  	tmp = gimple_assign_rhs1 (def);
      }
  
diff -Nrcpad gcc-12.3.0/gcc/ipa-cp.cc gcc-12.4.0/gcc/ipa-cp.cc
*** gcc-12.3.0/gcc/ipa-cp.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ipa-cp.cc	Thu Jun 20 08:08:06 2024
*************** ipacp_value_safe_for_type (tree param_ty
*** 1402,1408 ****
  
  /* Return true iff X and Y should be considered equal values by IPA-CP.  */
  
! static bool
  values_equal_for_ipcp_p (tree x, tree y)
  {
    gcc_checking_assert (x != NULL_TREE && y != NULL_TREE);
--- 1402,1408 ----
  
  /* Return true iff X and Y should be considered equal values by IPA-CP.  */
  
! bool
  values_equal_for_ipcp_p (tree x, tree y)
  {
    gcc_checking_assert (x != NULL_TREE && y != NULL_TREE);
diff -Nrcpad gcc-12.3.0/gcc/ipa-icf-gimple.cc gcc-12.4.0/gcc/ipa-icf-gimple.cc
*** gcc-12.3.0/gcc/ipa-icf-gimple.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ipa-icf-gimple.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 41,47 ****
--- 41,51 ----
  #include "gimple-walk.h"
  
  #include "tree-ssa-alias-compare.h"
+ #include "alloc-pool.h"
+ #include "symbol-summary.h"
  #include "ipa-icf-gimple.h"
+ #include "sreal.h"
+ #include "ipa-prop.h"
  
  namespace ipa_icf_gimple {
  
*************** func_checker::compare_gimple_call (gcall
*** 714,719 ****
--- 718,748 ----
        && !compatible_types_p (TREE_TYPE (t1), TREE_TYPE (t2)))
      return return_false_with_msg ("GIMPLE internal call LHS type mismatch");
  
+   if (!gimple_call_internal_p (s1))
+     {
+       cgraph_edge *e1 = cgraph_node::get (m_source_func_decl)->get_edge (s1);
+       cgraph_edge *e2 = cgraph_node::get (m_target_func_decl)->get_edge (s2);
+       class ipa_edge_args *args1 = ipa_edge_args_sum->get (e1);
+       class ipa_edge_args *args2 = ipa_edge_args_sum->get (e2);
+       if ((args1 != nullptr) != (args2 != nullptr))
+ 	return return_false_with_msg ("ipa_edge_args mismatch");
+       if (args1)
+ 	{
+ 	  int n1 = ipa_get_cs_argument_count (args1);
+ 	  int n2 = ipa_get_cs_argument_count (args2);
+ 	  if (n1 != n2)
+ 	    return return_false_with_msg ("ipa_edge_args nargs mismatch");
+ 	  for (int i = 0; i < n1; i++)
+ 	    {
+ 	      struct ipa_jump_func *jf1 = ipa_get_ith_jump_func (args1, i);
+ 	      struct ipa_jump_func *jf2 = ipa_get_ith_jump_func (args2, i);
+ 	      if (((jf1 != nullptr) != (jf2 != nullptr))
+ 		  || (jf1 && !ipa_jump_functions_equivalent_p (jf1, jf2)))
+ 		return return_false_with_msg ("jump function mismatch");
+ 	    }
+ 	}
+     }
+ 
    return compare_operand (t1, t2, get_operand_access_type (&map, t1));
  }
  
diff -Nrcpad gcc-12.3.0/gcc/ipa-icf.cc gcc-12.4.0/gcc/ipa-icf.cc
*** gcc-12.3.0/gcc/ipa-icf.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ipa-icf.cc	Thu Jun 20 08:08:06 2024
*************** sem_item_optimizer::merge_classes (unsig
*** 3389,3394 ****
--- 3389,3395 ----
  	  continue;
  
  	sem_item *source = c->members[0];
+ 	bool this_merged_p = false;
  
  	if (DECL_NAME (source->decl)
  	    && MAIN_NAME_P (DECL_NAME (source->decl)))
*************** sem_item_optimizer::merge_classes (unsig
*** 3435,3441 ****
  	    if (dbg_cnt (merged_ipa_icf))
  	      {
  		bool merged = source->merge (alias);
! 		merged_p |= merged;
  
  		if (merged && alias->type == VAR)
  		  {
--- 3436,3442 ----
  	    if (dbg_cnt (merged_ipa_icf))
  	      {
  		bool merged = source->merge (alias);
! 		this_merged_p |= merged;
  
  		if (merged && alias->type == VAR)
  		  {
*************** sem_item_optimizer::merge_classes (unsig
*** 3444,3449 ****
--- 3445,3479 ----
  		  }
  	      }
  	  }
+ 
+ 	merged_p |= this_merged_p;
+ 	if (this_merged_p
+ 	    && source->type == FUNC
+ 	    && (!flag_wpa || flag_checking))
+ 	  {
+ 	    unsigned i;
+ 	    tree name;
+ 	    FOR_EACH_SSA_NAME (i, name, DECL_STRUCT_FUNCTION (source->decl))
+ 	      {
+ 		/* We need to either merge or reset SSA_NAME_*_INFO.
+ 		   For merging we don't preserve the mapping between
+ 		   original and alias SSA_NAMEs from successful equals
+ 		   calls.  */
+ 		if (POINTER_TYPE_P (TREE_TYPE (name)))
+ 		  {
+ 		    if (SSA_NAME_PTR_INFO (name))
+ 		      {
+ 			gcc_checking_assert (!flag_wpa);
+ 			SSA_NAME_PTR_INFO (name) = NULL;
+ 		      }
+ 		  }
+ 		else if (SSA_NAME_RANGE_INFO (name))
+ 		  {
+ 		    gcc_checking_assert (!flag_wpa);
+ 		    SSA_NAME_RANGE_INFO (name) = NULL;
+ 		  }
+ 	      }
+ 	  }
        }
  
    if (!m_merged_variables.is_empty ())
diff -Nrcpad gcc-12.3.0/gcc/ipa-param-manipulation.cc gcc-12.4.0/gcc/ipa-param-manipulation.cc
*** gcc-12.3.0/gcc/ipa-param-manipulation.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ipa-param-manipulation.cc	Thu Jun 20 08:08:06 2024
*************** isra_get_ref_base_and_offset (tree expr,
*** 625,638 ****
    return true;
  }
  
  /* Modify actual arguments of a function call in statement currently belonging
     to CS, and make it call CS->callee->decl.  Return the new statement that
     replaced the old one.  When invoked, cfun and current_function_decl have to
!    be set to the caller.  */
  
  gcall *
  ipa_param_adjustments::modify_call (cgraph_edge *cs,
! 				    bool update_references)
  {
    gcall *stmt = cs->call_stmt;
    tree callee_decl = cs->callee->decl;
--- 625,689 ----
    return true;
  }
  
+ /* Remove all statements that use NAME directly or indirectly.  KILLED_SSAS
+    contains the SSA_NAMEs that are already being or have been processed and new
+    ones need to be added to it.  The function only has to process situations
+    handled by ssa_name_only_returned_p in ipa-sra.cc with the exception that it
+    can assume it must never reach a use in a return statement.  */
+ 
+ static void
+ purge_all_uses (tree name, hash_set <tree> *killed_ssas)
+ {
+   imm_use_iterator imm_iter;
+   gimple *stmt;
+   auto_vec <tree, 4> worklist;
+ 
+   worklist.safe_push (name);
+   while (!worklist.is_empty ())
+     {
+       tree cur_name = worklist.pop ();
+       FOR_EACH_IMM_USE_STMT (stmt, imm_iter, cur_name)
+ 	{
+ 	  if (gimple_debug_bind_p (stmt))
+ 	    {
+ 	      /* When runing within tree-inline, we will never end up here but
+ 		 adding the SSAs to killed_ssas will do the trick in this case
+ 		 and the respective debug statements will get reset. */
+ 	      gimple_debug_bind_reset_value (stmt);
+ 	      update_stmt (stmt);
+ 	      continue;
+ 	    }
+ 
+ 	  tree lhs = NULL_TREE;
+ 	  if (is_gimple_assign (stmt))
+ 	    lhs = gimple_assign_lhs (stmt);
+ 	  else if (gimple_code (stmt) == GIMPLE_PHI)
+ 	    lhs = gimple_phi_result (stmt);
+ 	  gcc_assert (lhs
+ 		      && (TREE_CODE (lhs) == SSA_NAME)
+ 		      && !gimple_vdef (stmt));
+ 	  if (!killed_ssas->add (lhs))
+ 	    {
+ 	      worklist.safe_push (lhs);
+ 	      gimple_stmt_iterator gsi = gsi_for_stmt (stmt);
+ 	      gsi_remove (&gsi, true);
+ 	    }
+ 	}
+     }
+ }
+ 
  /* Modify actual arguments of a function call in statement currently belonging
     to CS, and make it call CS->callee->decl.  Return the new statement that
     replaced the old one.  When invoked, cfun and current_function_decl have to
!    be set to the caller.  When called from within tree-inline, KILLED_SSAs has
!    to contain the pointer to killed_new_ssa_names within the copy_body_data
!    structure and SSAs discovered to be useless (if LHS is removed) will be
!    added to it, otherwise it needs to be NULL.  */
  
  gcall *
  ipa_param_adjustments::modify_call (cgraph_edge *cs,
! 				    bool update_references,
! 				    hash_set <tree> *killed_ssas)
  {
    gcall *stmt = cs->call_stmt;
    tree callee_decl = cs->callee->decl;
*************** ipa_param_adjustments::modify_call (cgra
*** 719,724 ****
--- 770,781 ----
  	  }
        if (repl)
  	{
+ 	  if (!useless_type_conversion_p(apm->type, repl->typed.type))
+ 	    {
+ 	      repl = force_value_to_type (apm->type, repl);
+ 	      repl = force_gimple_operand_gsi (&gsi, repl,
+ 					       true, NULL, true, GSI_SAME_STMT);
+ 	    }
  	  vargs.quick_push (repl);
  	  continue;
  	}
*************** ipa_param_adjustments::modify_call (cgra
*** 942,973 ****
  
    gcall *new_stmt = gimple_build_call_vec (callee_decl, vargs);
  
!   tree ssa_to_remove = NULL;
    if (tree lhs = gimple_call_lhs (stmt))
      {
        if (!m_skip_return)
  	gimple_call_set_lhs (new_stmt, lhs);
        else if (TREE_CODE (lhs) == SSA_NAME)
  	{
! 	  /* LHS should now by a default-def SSA.  Unfortunately default-def
! 	     SSA_NAMEs need a backing variable (or at least some code examining
! 	     SSAs assumes it is non-NULL).  So we either have to re-use the
! 	     decl we have at hand or introdice a new one.  */
! 	  tree repl = create_tmp_var (TREE_TYPE (lhs), "removed_return");
! 	  repl = get_or_create_ssa_default_def (cfun, repl);
! 	  SSA_NAME_IS_DEFAULT_DEF (repl) = true;
! 	  imm_use_iterator ui;
! 	  use_operand_p use_p;
! 	  gimple *using_stmt;
! 	  FOR_EACH_IMM_USE_STMT (using_stmt, ui, lhs)
  	    {
! 	      FOR_EACH_IMM_USE_ON_STMT (use_p, ui)
! 		{
! 		  SET_USE (use_p, repl);
! 		}
! 	      update_stmt (using_stmt);
  	    }
! 	  ssa_to_remove = lhs;
  	}
      }
  
--- 999,1018 ----
  
    gcall *new_stmt = gimple_build_call_vec (callee_decl, vargs);
  
!   hash_set <tree> *ssas_to_remove = NULL;
    if (tree lhs = gimple_call_lhs (stmt))
      {
        if (!m_skip_return)
  	gimple_call_set_lhs (new_stmt, lhs);
        else if (TREE_CODE (lhs) == SSA_NAME)
  	{
! 	  if (!killed_ssas)
  	    {
! 	      ssas_to_remove = new hash_set<tree> (8);
! 	      killed_ssas = ssas_to_remove;
  	    }
! 	  killed_ssas->add (lhs);
! 	  purge_all_uses (lhs, killed_ssas);
  	}
      }
  
*************** ipa_param_adjustments::modify_call (cgra
*** 986,993 ****
        fprintf (dump_file, "\n");
      }
    gsi_replace (&gsi, new_stmt, true);
!   if (ssa_to_remove)
!     release_ssa_name (ssa_to_remove);
    if (update_references)
      do
        {
--- 1031,1041 ----
        fprintf (dump_file, "\n");
      }
    gsi_replace (&gsi, new_stmt, true);
!   if (ssas_to_remove)
!     {
!       ipa_release_ssas_in_hash (ssas_to_remove);
!       delete ssas_to_remove;
!     }
    if (update_references)
      do
        {
*************** ipa_edge_modifications_finalize ()
*** 2398,2401 ****
--- 2446,2475 ----
    ipa_edge_modifications = NULL;
  }
  
+ /* Helper used to sort a vector of SSA_NAMES. */
  
+ static int
+ compare_ssa_versions (const void *va, const void *vb)
+ {
+   const_tree const a = *(const_tree const*)va;
+   const_tree const b = *(const_tree const*)vb;
+ 
+   if (SSA_NAME_VERSION (a) < SSA_NAME_VERSION (b))
+     return -1;
+   if (SSA_NAME_VERSION (a) > SSA_NAME_VERSION (b))
+     return 1;
+   return 0;
+ }
+ 
+ /* Call release_ssa_name on all elements in KILLED_SSAS in a defined order.  */
+ 
+ void
+ ipa_release_ssas_in_hash (hash_set <tree> *killed_ssas)
+ {
+   auto_vec<tree, 16> ssas_to_release;
+   for (tree sn : *killed_ssas)
+     ssas_to_release.safe_push (sn);
+   ssas_to_release.qsort (compare_ssa_versions);
+   for (tree sn : ssas_to_release)
+     release_ssa_name (sn);
+ }
diff -Nrcpad gcc-12.3.0/gcc/ipa-param-manipulation.h gcc-12.4.0/gcc/ipa-param-manipulation.h
*** gcc-12.3.0/gcc/ipa-param-manipulation.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ipa-param-manipulation.h	Thu Jun 20 08:08:06 2024
*************** public:
*** 224,230 ****
  
    /* Modify a call statement arguments (and possibly remove the return value)
       as described in the data fields of this class.  */
!   gcall *modify_call (cgraph_edge *cs, bool update_references);
    /* Return if the first parameter is left intact.  */
    bool first_param_intact_p ();
    /* Build a function type corresponding to the modified call.  */
--- 224,231 ----
  
    /* Modify a call statement arguments (and possibly remove the return value)
       as described in the data fields of this class.  */
!   gcall *modify_call (cgraph_edge *cs, bool update_references,
! 		      hash_set <tree> *killed_ssas);
    /* Return if the first parameter is left intact.  */
    bool first_param_intact_p ();
    /* Build a function type corresponding to the modified call.  */
*************** void push_function_arg_decls (vec<tree>
*** 430,435 ****
  void push_function_arg_types (vec<tree> *types, tree fntype);
  void ipa_verify_edge_has_no_modifications (cgraph_edge *cs);
  void ipa_edge_modifications_finalize ();
! 
  
  #endif	/* IPA_PARAM_MANIPULATION_H */
--- 431,436 ----
  void push_function_arg_types (vec<tree> *types, tree fntype);
  void ipa_verify_edge_has_no_modifications (cgraph_edge *cs);
  void ipa_edge_modifications_finalize ();
! void ipa_release_ssas_in_hash (hash_set <tree> *killed_ssas);
  
  #endif	/* IPA_PARAM_MANIPULATION_H */
diff -Nrcpad gcc-12.3.0/gcc/ipa-prop.cc gcc-12.4.0/gcc/ipa-prop.cc
*** gcc-12.3.0/gcc/ipa-prop.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ipa-prop.cc	Thu Jun 20 08:08:06 2024
*************** ipcp_transform_function (struct cgraph_n
*** 6096,6101 ****
--- 6096,6258 ----
    return modified_mem_access ? TODO_update_ssa_only_virtuals : 0;
  }
  
+ /* Return true if the two pass_through components of two jump functions are
+    known to be equivalent.  AGG_JF denotes whether they are part of aggregate
+    functions or not.  The function can be used before the IPA phase of IPA-CP
+    or inlining because it cannot cope with refdesc changes these passes can
+    carry out.  */
+ 
+ static bool
+ ipa_agg_pass_through_jf_equivalent_p (ipa_pass_through_data *ipt1,
+ 				      ipa_pass_through_data *ipt2,
+ 				      bool agg_jf)
+ 
+ {
+   gcc_assert (agg_jf ||
+ 	      (!ipt1->refdesc_decremented && !ipt2->refdesc_decremented));
+   if (ipt1->operation != ipt2->operation
+       || ipt1->formal_id != ipt2->formal_id
+       || (!agg_jf && (ipt1->agg_preserved != ipt2->agg_preserved)))
+     return false;
+   if (((ipt1->operand != NULL_TREE) != (ipt2->operand != NULL_TREE))
+       || (ipt1->operand
+ 	  && !values_equal_for_ipcp_p (ipt1->operand, ipt2->operand)))
+     return false;
+   return true;
+ }
+ 
+ /* Return true if the two aggregate jump functions are known to be equivalent.
+    The function can be used before the IPA phase of IPA-CP or inlining because
+    it cannot cope with refdesc changes these passes can carry out.  */
+ 
+ static bool
+ ipa_agg_jump_functions_equivalent_p (ipa_agg_jf_item *ajf1,
+ 				     ipa_agg_jf_item *ajf2)
+ {
+   if (ajf1->offset != ajf2->offset
+       || ajf1->jftype != ajf2->jftype
+       || !types_compatible_p (ajf1->type, ajf2->type))
+     return false;
+ 
+   switch (ajf1->jftype)
+     {
+     case IPA_JF_CONST:
+       if (!values_equal_for_ipcp_p (ajf1->value.constant,
+ 				    ajf2->value.constant))
+ 	return false;
+       break;
+     case IPA_JF_PASS_THROUGH:
+       {
+ 	ipa_pass_through_data *ipt1 = &ajf1->value.pass_through;
+ 	ipa_pass_through_data *ipt2 = &ajf2->value.pass_through;
+ 	if (!ipa_agg_pass_through_jf_equivalent_p (ipt1, ipt2, true))
+ 	  return false;
+       }
+       break;
+     case IPA_JF_LOAD_AGG:
+       {
+ 	ipa_load_agg_data *ila1 = &ajf1->value.load_agg;
+ 	ipa_load_agg_data *ila2 = &ajf2->value.load_agg;
+ 	if (!ipa_agg_pass_through_jf_equivalent_p (&ila1->pass_through,
+ 						   &ila2->pass_through, true))
+ 	  return false;
+ 	if (ila1->offset != ila2->offset
+ 	    || ila1->by_ref != ila2->by_ref
+ 	    || !types_compatible_p (ila1->type, ila2->type))
+ 	  return false;
+       }
+       break;
+     default:
+ 	gcc_unreachable ();
+     }
+   return true;
+ }
+ 
+ /* Return true if the two jump functions are known to be equivalent.  The
+    function can be used before the IPA phase of IPA-CP or inlining because it
+    cannot cope with refdesc changes these passes can carry out.  */
+ 
+ bool
+ ipa_jump_functions_equivalent_p (ipa_jump_func *jf1, ipa_jump_func *jf2)
+ {
+   if (jf1->type != jf2->type)
+     return false;
+ 
+   switch (jf1->type)
+     {
+     case IPA_JF_UNKNOWN:
+       break;
+     case IPA_JF_CONST:
+       {
+ 	tree cst1 = ipa_get_jf_constant (jf1);
+ 	tree cst2 = ipa_get_jf_constant (jf2);
+ 	if (!values_equal_for_ipcp_p (cst1, cst2))
+ 	  return false;
+ 
+ 	ipa_cst_ref_desc *rd1 = jfunc_rdesc_usable (jf1);
+ 	ipa_cst_ref_desc *rd2 = jfunc_rdesc_usable (jf2);
+ 	if (rd1 && rd2)
+ 	  {
+ 	    gcc_assert (rd1->refcount == 1
+ 			&& rd2->refcount == 1);
+ 	    gcc_assert (!rd1->next_duplicate && !rd2->next_duplicate);
+ 	  }
+ 	else if (rd1)
+ 	  return false;
+ 	else if (rd2)
+ 	  return false;
+       }
+       break;
+     case IPA_JF_PASS_THROUGH:
+       {
+ 	ipa_pass_through_data *ipt1 = &jf1->value.pass_through;
+ 	ipa_pass_through_data *ipt2 = &jf2->value.pass_through;
+ 	if (!ipa_agg_pass_through_jf_equivalent_p (ipt1, ipt2, false))
+ 	  return false;
+       }
+       break;
+     case IPA_JF_ANCESTOR:
+       {
+ 	ipa_ancestor_jf_data *ia1 = &jf1->value.ancestor;
+ 	ipa_ancestor_jf_data *ia2 = &jf2->value.ancestor;
+ 
+ 	if (ia1->formal_id != ia2->formal_id
+ 	    || ia1->agg_preserved != ia2->agg_preserved
+ 	    || ia1->keep_null != ia2->keep_null
+ 	    || ia1->offset != ia2->offset)
+ 	  return false;
+       }
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   if (((jf1->bits != nullptr) != (jf2->bits != nullptr))
+       || (jf1->bits && ((jf1->bits->value != jf2->bits->value)
+ 			|| (jf1->bits->mask != jf2->bits->mask))))
+     return false;
+ 
+   if (((jf1->m_vr != nullptr) != (jf2->m_vr != nullptr))
+       || (jf1->m_vr && *jf1->m_vr != *jf2->m_vr))
+     return false;
+ 
+   unsigned alen = vec_safe_length (jf1->agg.items);
+   if (vec_safe_length (jf2->agg.items) != alen)
+     return false;
+ 
+   if (!alen)
+     return true;
+ 
+   if (jf1->agg.by_ref != jf2->agg.by_ref)
+     return false;
+ 
+   for (unsigned i = 0 ; i < alen; i++)
+     if (!ipa_agg_jump_functions_equivalent_p (&(*jf1->agg.items)[i],
+ 					      &(*jf2->agg.items)[i]))
+       return false;
+ 
+   return true;
+ }
  
  /* Return true if OTHER describes same agg value.  */
  bool
diff -Nrcpad gcc-12.3.0/gcc/ipa-prop.h gcc-12.4.0/gcc/ipa-prop.h
*** gcc-12.3.0/gcc/ipa-prop.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ipa-prop.h	Thu Jun 20 08:08:06 2024
*************** bool ipcp_get_parm_bits (tree, tree *, w
*** 1229,1239 ****
--- 1229,1242 ----
  bool unadjusted_ptr_and_unit_offset (tree op, tree *ret,
  				     poly_int64 *offset_ret);
  
+ bool ipa_jump_functions_equivalent_p (ipa_jump_func *jf1, ipa_jump_func *jf2);
+ 
  /* From tree-sra.cc:  */
  tree build_ref_for_offset (location_t, tree, poly_int64, bool, tree,
  			   gimple_stmt_iterator *, bool);
  
  /* In ipa-cp.cc  */
  void ipa_cp_cc_finalize (void);
+ bool values_equal_for_ipcp_p (tree x, tree y);
  
  #endif /* IPA_PROP_H */
diff -Nrcpad gcc-12.3.0/gcc/jit/ChangeLog gcc-12.4.0/gcc/jit/ChangeLog
*** gcc-12.3.0/gcc/jit/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/jit/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,16 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-04-22  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-04-02  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* Make-lang.in: Implement exports list, and use a shared
+ 	libgcc.
+ 	* libgccjit.exports: New file.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/jit/Make-lang.in gcc-12.4.0/gcc/jit/Make-lang.in
*** gcc-12.3.0/gcc/jit/Make-lang.in	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/jit/Make-lang.in	Thu Jun 20 08:08:06 2024
*************** else
*** 55,61 ****
  
  ifneq (,$(findstring darwin,$(host)))
  
! LIBGCCJIT_AGE = 1
  LIBGCCJIT_BASENAME = libgccjit
  
  LIBGCCJIT_SONAME = \
--- 55,71 ----
  
  ifneq (,$(findstring darwin,$(host)))
  
! # NOTE that we are building here for the host, and so tests for target-
! # specific functionality will only work when host == target.  This causes
! # fails when building cross-compilers with different object formats (at
! # least when the respective linkers do not accept the same command line
! # options).  Fortunately, for Darwin we can safely hard-code the relevant
! # host options, since all usable linkers support them).
! 
! LIBGCCJIT_CURRENT = 24
! LIBGCCJIT_REVISION = 0
! LIBGCCJIT_AGE = 24
! LIBGCCJIT_COMPAT = 0
  LIBGCCJIT_BASENAME = libgccjit
  
  LIBGCCJIT_SONAME = \
*************** LIBGCCJIT_SONAME = \
*** 63,80 ****
  LIBGCCJIT_FILENAME = $(LIBGCCJIT_BASENAME).$(LIBGCCJIT_VERSION_NUM).dylib
  LIBGCCJIT_LINKER_NAME = $(LIBGCCJIT_BASENAME).dylib
  
! # Conditionalize the use of the LD_VERSION_SCRIPT_OPTION and
! # LD_SONAME_OPTION depending if configure found them, using $(if)
! # We have to define a COMMA here, otherwise the commas in the "true"
! # result are treated as separators by the $(if).
  COMMA := ,
  LIBGCCJIT_VERSION_SCRIPT_OPTION = \
! 	$(if $(LD_VERSION_SCRIPT_OPTION),\
! 	  -Wl$(COMMA)$(LD_VERSION_SCRIPT_OPTION)$(COMMA)$(srcdir)/jit/libgccjit.map)
  
  LIBGCCJIT_SONAME_OPTION = \
! 	$(if $(LD_SONAME_OPTION), \
! 	     -Wl$(COMMA)$(LD_SONAME_OPTION)$(COMMA)$(LIBGCCJIT_SONAME))
  
  LIBGCCJIT_SONAME_SYMLINK = $(LIBGCCJIT_FILENAME)
  LIBGCCJIT_LINKER_NAME_SYMLINK = $(LIBGCCJIT_LINKER_NAME)
--- 73,90 ----
  LIBGCCJIT_FILENAME = $(LIBGCCJIT_BASENAME).$(LIBGCCJIT_VERSION_NUM).dylib
  LIBGCCJIT_LINKER_NAME = $(LIBGCCJIT_BASENAME).dylib
  
! # Darwin does not have a version script option. Exported symbols are controlled
! # by the following, and library versioning is done using libtool.
! # We have to define a COMMA here, otherwise the commas are treated as
! # separators.
  COMMA := ,
  LIBGCCJIT_VERSION_SCRIPT_OPTION = \
!   -Wl$(COMMA)-exported_symbols_list$(COMMA)$(srcdir)/jit/libgccjit.exports
  
+ # For Darwin host, we need a l64 or ld64-compatible linker, that uses
+ # -install_name to introduce this.
  LIBGCCJIT_SONAME_OPTION = \
!   -Wl$(COMMA)-install_name$(COMMA)$(LIBGCCJIT_SONAME)
  
  LIBGCCJIT_SONAME_SYMLINK = $(LIBGCCJIT_FILENAME)
  LIBGCCJIT_LINKER_NAME_SYMLINK = $(LIBGCCJIT_LINKER_NAME)
*************** ifneq (,$(findstring mingw,$(target)))
*** 143,157 ****
  # Create import library
  LIBGCCJIT_EXTRA_OPTS = -Wl,--out-implib,$(LIBGCCJIT_IMPORT_LIB)
  else
- 
  ifneq (,$(findstring darwin,$(host)))
! # TODO : Construct a Darwin-style symbol export file.
! LIBGCCJIT_EXTRA_OPTS = -Wl,-compatibility_version,$(LIBGCCJIT_VERSION_NUM) \
! 	-Wl,-current_version,$(LIBGCCJIT_VERSION_NUM).$(LIBGCCJIT_MINOR_NUM).$(LIBGCCJIT_AGE) \
! 	$(LIBGCCJIT_VERSION_SCRIPT_OPTION) \
! 	$(LIBGCCJIT_SONAME_OPTION)
  else
! 
  LIBGCCJIT_EXTRA_OPTS = $(LIBGCCJIT_VERSION_SCRIPT_OPTION) \
  	$(LIBGCCJIT_SONAME_OPTION)
  endif
--- 153,170 ----
  # Create import library
  LIBGCCJIT_EXTRA_OPTS = -Wl,--out-implib,$(LIBGCCJIT_IMPORT_LIB)
  else
  ifneq (,$(findstring darwin,$(host)))
! LIBGCCJIT_VERS = $(LIBGCCJIT_CURRENT).$(LIBGCCJIT_REVISION).$(LIBGCCJIT_AGE)
! LIBGCCJIT_EXTRA_OPTS = -Wl,-current_version,$(LIBGCCJIT_VERS) \
!  -Wl,-compatibility_version,$(LIBGCCJIT_COMPAT) \
!   $(LIBGCCJIT_VERSION_SCRIPT_OPTION) $(LIBGCCJIT_SONAME_OPTION)
! # Use the default (shared) libgcc.
! JIT_LDFLAGS = $(filter-out -static-libgcc, $(LDFLAGS))
! ifeq (,$(findstring darwin8,$(host)))
! JIT_LDFLAGS += -Wl,-rpath,@loader_path
! endif
  else
! JIT_LDFLAGS = $(LDFLAGS)
  LIBGCCJIT_EXTRA_OPTS = $(LIBGCCJIT_VERSION_SCRIPT_OPTION) \
  	$(LIBGCCJIT_SONAME_OPTION)
  endif
*************** $(LIBGCCJIT_FILENAME): $(jit_OBJS) \
*** 165,171 ****
  	$(LIBDEPS) $(srcdir)/jit/libgccjit.map \
  	$(EXTRA_GCC_OBJS) $(jit.prev)
  	@$(call LINK_PROGRESS,$(INDEX.jit),start)
! 	+$(LLINKER) $(ALL_LINKERFLAGS) $(LDFLAGS) -o $@ -shared \
  	     $(jit_OBJS) libbackend.a libcommon-target.a libcommon.a \
  	     $(CPPLIB) $(LIBDECNUMBER) $(EXTRA_GCC_LIBS) $(LIBS) $(BACKENDLIBS) \
  	     $(EXTRA_GCC_OBJS) \
--- 178,184 ----
  	$(LIBDEPS) $(srcdir)/jit/libgccjit.map \
  	$(EXTRA_GCC_OBJS) $(jit.prev)
  	@$(call LINK_PROGRESS,$(INDEX.jit),start)
! 	+$(LLINKER) $(ALL_LINKERFLAGS) $(JIT_LDFLAGS) -o $@ -shared \
  	     $(jit_OBJS) libbackend.a libcommon-target.a libcommon.a \
  	     $(CPPLIB) $(LIBDECNUMBER) $(EXTRA_GCC_LIBS) $(LIBS) $(BACKENDLIBS) \
  	     $(EXTRA_GCC_OBJS) \
diff -Nrcpad gcc-12.3.0/gcc/jit/libgccjit.exports gcc-12.4.0/gcc/jit/libgccjit.exports
*** gcc-12.3.0/gcc/jit/libgccjit.exports	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/jit/libgccjit.exports	Thu Jun 20 08:08:06 2024
***************
*** 0 ****
--- 1,219 ----
+ # Linker export list for Darwin libgccjit.dylib
+ 
+ #   Contributed by Iain Sandoe <iain@sandoe.co.uk>.
+ #
+ # This file is part of GCC.
+ #
+ # GCC is free software you can redistribute it and/or modify it
+ # under the terms of the GNU General Public License as published by
+ # the Free Software Foundation either version 3, or (at your option)
+ # any later version.
+ #
+ # GCC is distributed in the hope that it will be useful, but
+ # WITHOUT ANY WARRANTY without even the implied warranty of
+ # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ # General Public License for more details.
+ #
+ # You should have received a copy of the GNU General Public License
+ # along with GCC see the file COPYING3.  If not see
+ # <http://www.gnu.org/licenses/>.  */
+ 
+ # The initial release of the library.
+ # Keep this list sorted alphabetically:
+ _gcc_jit_block_add_assignment
+ _gcc_jit_block_add_assignment_op
+ _gcc_jit_block_add_comment
+ _gcc_jit_block_add_eval
+ _gcc_jit_block_as_object
+ _gcc_jit_block_end_with_conditional
+ _gcc_jit_block_end_with_jump
+ _gcc_jit_block_end_with_return
+ _gcc_jit_block_end_with_void_return
+ _gcc_jit_block_get_function
+ _gcc_jit_context_acquire
+ _gcc_jit_context_compile
+ _gcc_jit_context_compile_to_file
+ _gcc_jit_context_dump_to_file
+ _gcc_jit_context_dump_reproducer_to_file
+ _gcc_jit_context_enable_dump
+ _gcc_jit_context_get_builtin_function
+ _gcc_jit_context_get_first_error
+ _gcc_jit_context_get_last_error
+ _gcc_jit_context_get_type
+ _gcc_jit_context_get_int_type
+ _gcc_jit_context_new_array_access
+ _gcc_jit_context_new_array_type
+ _gcc_jit_context_new_binary_op
+ _gcc_jit_context_new_call
+ _gcc_jit_context_new_call_through_ptr
+ _gcc_jit_context_new_cast
+ _gcc_jit_context_new_child_context
+ _gcc_jit_context_new_comparison
+ _gcc_jit_context_new_field
+ _gcc_jit_context_new_function
+ _gcc_jit_context_new_function_ptr_type
+ _gcc_jit_context_new_global
+ _gcc_jit_context_new_location
+ _gcc_jit_context_new_opaque_struct
+ _gcc_jit_context_new_param
+ _gcc_jit_context_new_rvalue_from_double
+ _gcc_jit_context_new_rvalue_from_int
+ _gcc_jit_context_new_rvalue_from_long
+ _gcc_jit_context_new_rvalue_from_ptr
+ _gcc_jit_context_new_string_literal
+ _gcc_jit_context_new_struct_type
+ _gcc_jit_context_new_unary_op
+ _gcc_jit_context_new_union_type
+ _gcc_jit_context_null
+ _gcc_jit_context_one
+ _gcc_jit_context_release
+ _gcc_jit_context_set_bool_option
+ _gcc_jit_context_set_int_option
+ _gcc_jit_context_set_logfile
+ _gcc_jit_context_set_str_option
+ _gcc_jit_context_zero
+ _gcc_jit_field_as_object
+ _gcc_jit_function_as_object
+ _gcc_jit_function_dump_to_dot
+ _gcc_jit_function_get_param
+ _gcc_jit_function_new_block
+ _gcc_jit_function_new_local
+ _gcc_jit_location_as_object
+ _gcc_jit_lvalue_as_object
+ _gcc_jit_lvalue_as_rvalue
+ _gcc_jit_lvalue_access_field
+ _gcc_jit_lvalue_get_address
+ _gcc_jit_object_get_context
+ _gcc_jit_object_get_debug_string
+ _gcc_jit_param_as_lvalue
+ _gcc_jit_param_as_object
+ _gcc_jit_param_as_rvalue
+ _gcc_jit_result_get_code
+ _gcc_jit_result_get_global
+ _gcc_jit_result_release
+ _gcc_jit_rvalue_access_field
+ _gcc_jit_rvalue_as_object
+ _gcc_jit_rvalue_dereference
+ _gcc_jit_rvalue_dereference_field
+ _gcc_jit_rvalue_get_type
+ _gcc_jit_struct_as_type
+ _gcc_jit_struct_set_fields
+ _gcc_jit_type_as_object
+ _gcc_jit_type_get_const
+ _gcc_jit_type_get_pointer
+ _gcc_jit_type_get_volatile
+ 
+ # Add support for adding arbitrary command-line options (PR jit/66628).
+ # LIBGCCJIT_ABI_1
+ _gcc_jit_context_add_command_line_option
+ 
+ # Add support for disabling the check for unreachable blocks (PR jit/66546).
+ # LIBGCCJIT_ABI_2
+ _gcc_jit_context_set_bool_allow_unreachable_blocks
+ 
+ # Add support for switch statements.
+ # LIBGCCJIT_ABI_3
+ _gcc_jit_block_end_with_switch
+ _gcc_jit_case_as_object
+ _gcc_jit_context_new_case
+ 
+ # Add timing API.
+ #LIBGCCJIT_ABI_4
+ _gcc_jit_context_get_timer
+ _gcc_jit_context_set_timer
+ _gcc_jit_timer_new
+ _gcc_jit_timer_release
+ _gcc_jit_timer_push
+ _gcc_jit_timer_pop
+ _gcc_jit_timer_print
+ 
+ # LIBGCCJIT_ABI_5
+ _gcc_jit_context_set_bool_use_external_driver
+ 
+ # LIBGCCJIT_ABI_6
+ _gcc_jit_rvalue_set_bool_require_tail_call
+ 
+ # LIBGCCJIT_ABI_7
+ _gcc_jit_type_get_aligned
+ 
+ # LIBGCCJIT_ABI_8
+ _gcc_jit_type_get_vector
+ 
+ # LIBGCCJIT_ABI_9
+ _gcc_jit_function_get_address
+ 
+ # LIBGCCJIT_ABI_10
+ _gcc_jit_context_new_rvalue_from_vector
+ 
+ # LIBGCCJIT_ABI_11
+ _gcc_jit_context_add_driver_option
+ 
+ # LIBGCCJIT_ABI_12
+ _gcc_jit_context_new_bitfield
+ 
+ # LIBGCCJIT_ABI_13
+ _gcc_jit_version_major
+ _gcc_jit_version_minor
+ _gcc_jit_version_patchlevel
+ 
+ # LIBGCCJIT_ABI_14
+ _gcc_jit_global_set_initializer
+ 
+ # LIBGCCJIT_ABI_15
+ _gcc_jit_block_add_extended_asm
+ _gcc_jit_block_end_with_extended_asm_goto
+ _gcc_jit_extended_asm_as_object
+ _gcc_jit_extended_asm_set_volatile_flag
+ _gcc_jit_extended_asm_set_inline_flag
+ _gcc_jit_extended_asm_add_output_operand
+ _gcc_jit_extended_asm_add_input_operand
+ _gcc_jit_extended_asm_add_clobber
+ _gcc_jit_context_add_top_level_asm
+ 
+ # LIBGCCJIT_ABI_16
+ _gcc_jit_function_get_return_type
+ _gcc_jit_function_get_param_count
+ _gcc_jit_function_type_get_return_type
+ _gcc_jit_function_type_get_param_count
+ _gcc_jit_function_type_get_param_type
+ _gcc_jit_type_unqualified
+ _gcc_jit_type_dyncast_array
+ _gcc_jit_type_is_bool
+ _gcc_jit_type_dyncast_function_ptr_type
+ _gcc_jit_type_is_integral
+ _gcc_jit_type_is_pointer
+ _gcc_jit_type_dyncast_vector
+ _gcc_jit_vector_type_get_element_type
+ _gcc_jit_vector_type_get_num_units
+ _gcc_jit_struct_get_field
+ _gcc_jit_type_is_struct
+ _gcc_jit_struct_get_field_count
+ 
+ # LIBGCCJIT_ABI_17
+ _gcc_jit_lvalue_set_tls_model
+ 
+ # LIBGCCJIT_ABI_18
+ _gcc_jit_lvalue_set_link_section
+ 
+ #LIBGCCJIT_ABI_19
+ _gcc_jit_context_new_array_constructor
+ _gcc_jit_context_new_struct_constructor
+ _gcc_jit_context_new_union_constructor
+ _gcc_jit_global_set_initializer_rvalue
+ 
+ # LIBGCCJIT_ABI_20
+ _gcc_jit_compatible_types
+ _gcc_jit_type_get_size
+ 
+ # LIBGCCJIT_ABI_21
+ _gcc_jit_context_new_bitcast
+ 
+ # LIBGCCJIT_ABI_22
+ _gcc_jit_lvalue_set_register_name
+ 
+ # LIBGCCJIT_ABI_23
+ _gcc_jit_context_set_bool_print_errors_to_stderr
+ 
+ # LIBGCCJIT_ABI_24
+ _gcc_jit_lvalue_set_alignment
+ _gcc_jit_lvalue_get_alignment
diff -Nrcpad gcc-12.3.0/gcc/lra-constraints.cc gcc-12.4.0/gcc/lra-constraints.cc
*** gcc-12.3.0/gcc/lra-constraints.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/lra-constraints.cc	Thu Jun 20 08:08:06 2024
*************** lra_constraints (bool first_p)
*** 5139,5144 ****
--- 5139,5149 ----
  					   loc_equivalence_callback, curr_insn);
  	      if (old != *curr_id->operand_loc[0])
  		{
+ 		  /* If we substitute pseudo by shared equivalence, we can fail
+ 		     to update LRA reg info and this can result in many
+ 		     unexpected consequences.  So keep rtl unshared:  */
+ 		  *curr_id->operand_loc[0]
+ 		    = copy_rtx (*curr_id->operand_loc[0]);
  		  lra_update_insn_regno_info (curr_insn);
  		  changed_p = true;
  		}
diff -Nrcpad gcc-12.3.0/gcc/lra-eliminations.cc gcc-12.4.0/gcc/lra-eliminations.cc
*** gcc-12.3.0/gcc/lra-eliminations.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/lra-eliminations.cc	Thu Jun 20 08:08:06 2024
*************** lra_eliminate_regs_1 (rtx_insn *insn, rt
*** 397,404 ****
  	      rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
  
  	      if (! update_p && ! full_p)
! 		return gen_rtx_PLUS (Pmode, to, XEXP (x, 1));
! 	      
  	      if (maybe_ne (update_sp_offset, 0))
  		offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0;
  	      else
--- 397,404 ----
  	      rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
  
  	      if (! update_p && ! full_p)
! 		return simplify_gen_binary (PLUS, Pmode, to, XEXP (x, 1));
! 
  	      if (maybe_ne (update_sp_offset, 0))
  		offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0;
  	      else
diff -Nrcpad gcc-12.3.0/gcc/lra.cc gcc-12.4.0/gcc/lra.cc
*** gcc-12.3.0/gcc/lra.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/lra.cc	Thu Jun 20 08:08:06 2024
*************** lra (FILE *f)
*** 2535,2543 ****
    if (inserted_p)
      commit_edge_insertions ();
  
!   /* Replacing pseudos with their memory equivalents might have
!      created shared rtx.  Subsequent passes would get confused
!      by this, so unshare everything here.  */
    unshare_all_rtl_again (get_insns ());
  
    if (flag_checking)
--- 2535,2542 ----
    if (inserted_p)
      commit_edge_insertions ();
  
!   /* Subsequent passes expect that rtl is unshared, so unshare everything
!      here.  */
    unshare_all_rtl_again (get_insns ());
  
    if (flag_checking)
diff -Nrcpad gcc-12.3.0/gcc/lto/ChangeLog gcc-12.4.0/gcc/lto/ChangeLog
*** gcc-12.3.0/gcc/lto/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/lto/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/lto-wrapper.cc gcc-12.4.0/gcc/lto-wrapper.cc
*** gcc-12.3.0/gcc/lto-wrapper.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/lto-wrapper.cc	Thu Jun 20 08:08:06 2024
*************** find_option (vec<cl_decoded_option> &opt
*** 193,207 ****
    return find_option (options, option->opt_index);
  }
  
! /* Merge -flto FOPTION into vector of DECODED_OPTIONS.  */
  
  static void
  merge_flto_options (vec<cl_decoded_option> &decoded_options,
! 		    cl_decoded_option *foption)
  {
    int existing_opt = find_option (decoded_options, foption);
    if (existing_opt == -1)
      decoded_options.safe_push (*foption);
    else
      {
        if (strcmp (foption->arg, decoded_options[existing_opt].arg) != 0)
--- 193,210 ----
    return find_option (options, option->opt_index);
  }
  
! /* Merge -flto FOPTION into vector of DECODED_OPTIONS.  If FORCE is true
!    then FOPTION overrides previous settings.  */
  
  static void
  merge_flto_options (vec<cl_decoded_option> &decoded_options,
! 		    cl_decoded_option *foption, bool force)
  {
    int existing_opt = find_option (decoded_options, foption);
    if (existing_opt == -1)
      decoded_options.safe_push (*foption);
+   else if (force)
+     decoded_options[existing_opt].arg = foption->arg;
    else
      {
        if (strcmp (foption->arg, decoded_options[existing_opt].arg) != 0)
*************** merge_and_complain (vec<cl_decoded_optio
*** 466,472 ****
  	  break;
  
  	case OPT_flto_:
! 	  merge_flto_options (decoded_options, foption);
  	  break;
  	}
      }
--- 469,475 ----
  	  break;
  
  	case OPT_flto_:
! 	  merge_flto_options (decoded_options, foption, false);
  	  break;
  	}
      }
*************** run_gcc (unsigned argc, char *argv[])
*** 1540,1547 ****
  	  break;
  
  	case OPT_flto_:
! 	  /* Merge linker -flto= option with what we have in IL files.  */
! 	  merge_flto_options (fdecoded_options, option);
  	  if (strcmp (option->arg, "jobserver") == 0)
  	    jobserver_requested = true;
  	  break;
--- 1543,1550 ----
  	  break;
  
  	case OPT_flto_:
! 	  /* Override IL file settings with a linker -flto= option.  */
! 	  merge_flto_options (fdecoded_options, option, true);
  	  if (strcmp (option->arg, "jobserver") == 0)
  	    jobserver_requested = true;
  	  break;
diff -Nrcpad gcc-12.3.0/gcc/match.pd gcc-12.4.0/gcc/match.pd
*** gcc-12.3.0/gcc/match.pd	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/match.pd	Thu Jun 20 08:08:06 2024
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 904,909 ****
--- 904,923 ----
         && tree_nop_conversion_p (type, TREE_TYPE (@1)))
     (lshift @0 @2)))
  
+ /* Shifts by precision or greater result in zero.  */
+ (for shift (lshift rshift)
+  (simplify
+   (shift @0 uniform_integer_cst_p@1)
+   (if ((GIMPLE || !sanitize_flags_p (SANITIZE_SHIFT_EXPONENT))
+        /* Leave arithmetic right shifts of possibly negative values alone.  */
+        && (TYPE_UNSIGNED (type)
+            || shift == LSHIFT_EXPR
+ 	   || tree_expr_nonnegative_p (@0))
+        /* Use a signed compare to leave negative shift counts alone.  */
+        && wi::ges_p (wi::to_wide (uniform_integer_cst_p (@1)),
+ 		     element_precision (type)))
+    { build_zero_cst (type); })))
+ 
  /* Fold (1 << (C - x)) where C = precision(type) - 1
     into ((1 << C) >> x). */
  (simplify
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 1723,1729 ****
  /* (x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2) */
  (simplify
    (bit_and (bit_ior @0 CONSTANT_CLASS_P@1) CONSTANT_CLASS_P@2)
!   (bit_ior (bit_and @0 @2) (bit_and @1 @2)))
  
  /* Combine successive equal operations with constants.  */
  (for bitop (bit_and bit_ior bit_xor)
--- 1737,1743 ----
  /* (x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2) */
  (simplify
    (bit_and (bit_ior @0 CONSTANT_CLASS_P@1) CONSTANT_CLASS_P@2)
!   (bit_ior (bit_and @0 @2) (bit_and! @1 @2)))
  
  /* Combine successive equal operations with constants.  */
  (for bitop (bit_and bit_ior bit_xor)
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 1732,1738 ****
    (if (!CONSTANT_CLASS_P (@0))
     /* This is the canonical form regardless of whether (bitop @1 @2) can be
        folded to a constant.  */
!    (bitop @0 (bitop @1 @2))
     /* In this case we have three constants and (bitop @0 @1) doesn't fold
        to a constant.  This can happen if @0 or @1 is a POLY_INT_CST and if
        the values involved are such that the operation can't be decided at
--- 1746,1752 ----
    (if (!CONSTANT_CLASS_P (@0))
     /* This is the canonical form regardless of whether (bitop @1 @2) can be
        folded to a constant.  */
!    (bitop @0 (bitop! @1 @2))
     /* In this case we have three constants and (bitop @0 @1) doesn't fold
        to a constant.  This can happen if @0 or @1 is a POLY_INT_CST and if
        the values involved are such that the operation can't be decided at
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 2635,2647 ****
  	 forever if something doesn't simplify into a constant.  */
        (if (!CONSTANT_CLASS_P (@0))
         (if (outer_op == PLUS_EXPR)
! 	(plus (view_convert @0) (inner_op @2 (view_convert @1)))
! 	(minus (view_convert @0) (neg_inner_op @2 (view_convert @1)))))
        (if (!ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0))
  	   || TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0)))
         (if (outer_op == PLUS_EXPR)
! 	(view_convert (plus @0 (inner_op (view_convert @2) @1)))
! 	(view_convert (minus @0 (neg_inner_op (view_convert @2) @1))))
         /* If the constant operation overflows we cannot do the transform
  	  directly as we would introduce undefined overflow, for example
  	  with (a - 1) + INT_MIN.  */
--- 2649,2661 ----
  	 forever if something doesn't simplify into a constant.  */
        (if (!CONSTANT_CLASS_P (@0))
         (if (outer_op == PLUS_EXPR)
! 	(plus (view_convert @0) (inner_op! @2 (view_convert @1)))
! 	(minus (view_convert @0) (neg_inner_op! @2 (view_convert @1)))))
        (if (!ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0))
  	   || TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0)))
         (if (outer_op == PLUS_EXPR)
! 	(view_convert (plus @0 (inner_op! (view_convert @2) @1)))
! 	(view_convert (minus @0 (neg_inner_op! (view_convert @2) @1))))
         /* If the constant operation overflows we cannot do the transform
  	  directly as we would introduce undefined overflow, for example
  	  with (a - 1) + INT_MIN.  */
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 2672,2681 ****
       /* If all 3 captures are CONSTANT_CLASS_P, punt, as we might recurse
  	forever if something doesn't simplify into a constant.  */
       (if (!CONSTANT_CLASS_P (@0))
!       (minus (outer_op (view_convert @1) @2) (view_convert @0)))
       (if (!ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0))
  	  || TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0)))
!       (view_convert (minus (outer_op @1 (view_convert @2)) @0))
        (if (types_match (type, @0))
         (with { tree cst = const_binop (outer_op, type, @1, @2); }
  	(if (cst && !TREE_OVERFLOW (cst))
--- 2686,2695 ----
       /* If all 3 captures are CONSTANT_CLASS_P, punt, as we might recurse
  	forever if something doesn't simplify into a constant.  */
       (if (!CONSTANT_CLASS_P (@0))
!       (minus (outer_op! (view_convert @1) @2) (view_convert @0)))
       (if (!ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0))
  	  || TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0)))
!       (view_convert (minus (outer_op! @1 (view_convert @2)) @0))
        (if (types_match (type, @0))
         (with { tree cst = const_binop (outer_op, type, @1, @2); }
  	(if (cst && !TREE_OVERFLOW (cst))
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 2691,2700 ****
      /* If all 3 captures are CONSTANT_CLASS_P, punt, as we might recurse
        forever if something doesn't simplify into a constant.  */
      (if (!CONSTANT_CLASS_P (@0))
!      (plus (view_convert @0) (minus @1 (view_convert @2))))
      (if (!ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0))
  	 || TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0)))
!      (view_convert (plus @0 (minus (view_convert @1) @2)))
       (if (types_match (type, @0))
        (with { tree cst = const_binop (MINUS_EXPR, type, @1, @2); }
         (if (cst && !TREE_OVERFLOW (cst))
--- 2705,2714 ----
      /* If all 3 captures are CONSTANT_CLASS_P, punt, as we might recurse
        forever if something doesn't simplify into a constant.  */
      (if (!CONSTANT_CLASS_P (@0))
!      (plus (view_convert @0) (minus! @1 (view_convert @2))))
      (if (!ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0))
  	 || TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0)))
!      (view_convert (plus @0 (minus! (view_convert @1) @2)))
       (if (types_match (type, @0))
        (with { tree cst = const_binop (MINUS_EXPR, type, @1, @2); }
         (if (cst && !TREE_OVERFLOW (cst))
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 3711,3729 ****
        int inside_ptr = POINTER_TYPE_P (inside_type);
        int inside_float = FLOAT_TYPE_P (inside_type);
        int inside_vec = VECTOR_TYPE_P (inside_type);
!       unsigned int inside_prec = TYPE_PRECISION (inside_type);
        int inside_unsignedp = TYPE_UNSIGNED (inside_type);
        int inter_int = INTEGRAL_TYPE_P (inter_type);
        int inter_ptr = POINTER_TYPE_P (inter_type);
        int inter_float = FLOAT_TYPE_P (inter_type);
        int inter_vec = VECTOR_TYPE_P (inter_type);
!       unsigned int inter_prec = TYPE_PRECISION (inter_type);
        int inter_unsignedp = TYPE_UNSIGNED (inter_type);
        int final_int = INTEGRAL_TYPE_P (type);
        int final_ptr = POINTER_TYPE_P (type);
        int final_float = FLOAT_TYPE_P (type);
        int final_vec = VECTOR_TYPE_P (type);
!       unsigned int final_prec = TYPE_PRECISION (type);
        int final_unsignedp = TYPE_UNSIGNED (type);
      }
     (switch
--- 3725,3743 ----
        int inside_ptr = POINTER_TYPE_P (inside_type);
        int inside_float = FLOAT_TYPE_P (inside_type);
        int inside_vec = VECTOR_TYPE_P (inside_type);
!       unsigned int inside_prec = element_precision (inside_type);
        int inside_unsignedp = TYPE_UNSIGNED (inside_type);
        int inter_int = INTEGRAL_TYPE_P (inter_type);
        int inter_ptr = POINTER_TYPE_P (inter_type);
        int inter_float = FLOAT_TYPE_P (inter_type);
        int inter_vec = VECTOR_TYPE_P (inter_type);
!       unsigned int inter_prec = element_precision (inter_type);
        int inter_unsignedp = TYPE_UNSIGNED (inter_type);
        int final_int = INTEGRAL_TYPE_P (type);
        int final_ptr = POINTER_TYPE_P (type);
        int final_float = FLOAT_TYPE_P (type);
        int final_vec = VECTOR_TYPE_P (type);
!       unsigned int final_prec = element_precision (type);
        int final_unsignedp = TYPE_UNSIGNED (type);
      }
     (switch
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 3811,3816 ****
--- 3825,3831 ----
  (simplify
     (float (fix_trunc @0))
     (if (!flag_trapping_math
+ 	&& !HONOR_SIGNED_ZEROS (type)
  	&& types_match (type, TREE_TYPE (@0))
  	&& direct_internal_fn_supported_p (IFN_TRUNC, type,
  					  OPTIMIZE_FOR_BOTH))
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 4186,4191 ****
--- 4201,4210 ----
  /* (v ? w : 0) ? a : b is just (v & w) ? a : b
     Currently disabled after pass lvec because ARM understands
     VEC_COND_EXPR<v==w,-1,0> but not a plain v==w fed to BIT_IOR_EXPR.  */
+ #if GIMPLE
+ /* These can only be done in gimple as fold likes to convert:
+    (CMP) & N into (CMP) ? N : 0
+    and we try to match the same pattern again and again. */
  (simplify
   (vec_cond (vec_cond:s @0 @3 integer_zerop) @1 @2)
   (if (optimize_vectors_before_lowering_p () && types_match (@0, @3))
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 4220,4225 ****
--- 4239,4245 ----
   (vec_cond @0 @3 (vec_cond:s @1 @2 @3))
   (if (optimize_vectors_before_lowering_p () && types_match (@0, @1))
    (vec_cond (bit_and (bit_not @0) @1) @2 @3)))
+ #endif
  
  /* Canonicalize mask ? { 0, ... } : { -1, ...} to ~mask if the mask
     types are compatible.  */
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 5359,5377 ****
  		   >= TYPE_PRECISION (TREE_TYPE (@10)))
  		  && (TYPE_UNSIGNED (TREE_TYPE (@00))
  		      == TYPE_UNSIGNED (TREE_TYPE (@10))))
! 	      || (TREE_CODE (@10) == INTEGER_CST
  		  && INTEGRAL_TYPE_P (TREE_TYPE (@00))
! 		  && int_fits_type_p (@10, TREE_TYPE (@00)))))
        (cmp @00 (convert @10))
!       (if (TREE_CODE (@10) == INTEGER_CST
  	   && INTEGRAL_TYPE_P (TREE_TYPE (@00))
! 	   && !int_fits_type_p (@10, TREE_TYPE (@00)))
         (with
  	{
  	  tree min = lower_bound_in_type (TREE_TYPE (@10), TREE_TYPE (@00));
  	  tree max = upper_bound_in_type (TREE_TYPE (@10), TREE_TYPE (@00));
! 	  bool above = integer_nonzerop (const_binop (LT_EXPR, type, max, @10));
! 	  bool below = integer_nonzerop (const_binop (LT_EXPR, type, @10, min));
  	}
  	(if (above || below)
  	 (if (cmp == EQ_EXPR || cmp == NE_EXPR)
--- 5379,5397 ----
  		   >= TYPE_PRECISION (TREE_TYPE (@10)))
  		  && (TYPE_UNSIGNED (TREE_TYPE (@00))
  		      == TYPE_UNSIGNED (TREE_TYPE (@10))))
! 	      || (TREE_CODE (@1) == INTEGER_CST
  		  && INTEGRAL_TYPE_P (TREE_TYPE (@00))
! 		  && int_fits_type_p (@1, TREE_TYPE (@00)))))
        (cmp @00 (convert @10))
!       (if (TREE_CODE (@1) == INTEGER_CST
  	   && INTEGRAL_TYPE_P (TREE_TYPE (@00))
! 	   && !int_fits_type_p (@1, TREE_TYPE (@00)))
         (with
  	{
  	  tree min = lower_bound_in_type (TREE_TYPE (@10), TREE_TYPE (@00));
  	  tree max = upper_bound_in_type (TREE_TYPE (@10), TREE_TYPE (@00));
! 	  bool above = integer_nonzerop (const_binop (LT_EXPR, type, max, @1));
! 	  bool below = integer_nonzerop (const_binop (LT_EXPR, type, @1, min));
  	}
  	(if (above || below)
  	 (if (cmp == EQ_EXPR || cmp == NE_EXPR)
diff -Nrcpad gcc-12.3.0/gcc/objc/ChangeLog gcc-12.4.0/gcc/objc/ChangeLog
*** gcc-12.3.0/gcc/objc/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/objc/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,63 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-05-09  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-05-02  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* objc-next-runtime-abi-02.cc (WEAK_PROTOCOLS_AFTER): New.
+ 	(next_runtime_abi_02_protocol_decl): Use WEAK_PROTOCOLS_AFTER
+ 	to determine this ABI change.
+ 	(build_v2_protocol_list_address_table): Likewise.
+ 
+ 2024-04-20  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-01-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* objc-act.cc (objc_init): Initialize interface and class
+ 	name hash maps before the preprocessor uses them.
+ 
+ 2024-04-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-01-28  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* objc-next-runtime-abi-02.cc (build_v2_address_table): Prevent
+ 	over-alignment of Objective-C metadata by setting DECL_USER_ALIGN
+ 	on relevant variables.
+ 	(build_v2_protocol_list_address_table): Likewise.
+ 	(generate_v2_protocol_list): Likewise.
+ 	(generate_v2_meth_descriptor_table): Likewise.
+ 	(generate_v2_meth_type_list): Likewise.
+ 	(generate_v2_property_table): Likewise.
+ 	(generate_v2_dispatch_table): Likewise.
+ 	(generate_v2_ivars_list): Likewise.
+ 	(generate_v2_class_structs): Likewise.
+ 	(build_ehtype): Likewise.
+ 	* objc-runtime-shared-support.cc (generate_strings): Likewise.
+ 
+ 2024-04-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-01-12  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* objc-next-runtime-abi-02.cc
+ 	(build_v2_objc_method_fixup_call): Early exit for cases
+ 	where the sender or receiver are known to be in error.
+ 
+ 2024-04-12  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2022-05-03  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* objc-next-runtime-abi-02.cc (next_runtime_abi_02_protocol_decl): Do
+ 	not dead-strip the runtime meta-data symbols.
+ 	(build_v2_classrefs_table): Likewise.
+ 	(build_v2_protocol_list_address_table): Likewise.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/objc/objc-act.cc gcc-12.4.0/gcc/objc/objc-act.cc
*** gcc-12.3.0/gcc/objc/objc-act.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/objc/objc-act.cc	Thu Jun 20 08:08:06 2024
*************** bool
*** 347,352 ****
--- 347,357 ----
  objc_init (void)
  {
    bool ok;
+ 
+   /* Set up stuff used by the preprocessor as well as FE parser.  */
+   interface_hash_init ();
+   hash_init ();
+ 
  #ifdef OBJCPLUS
    if (cxx_init () == false)
  #else
*************** objc_init (void)
*** 376,383 ****
  
    /* Set up stuff used by FE parser and all runtimes.  */
    errbuf = XNEWVEC (char, 1024 * 10);
-   interface_hash_init ();
-   hash_init ();
    objc_encoding_init ();
    /* ... and then check flags and set-up for the selected runtime ... */
    if (flag_next_runtime && flag_objc_abi >= 2)
--- 381,386 ----
diff -Nrcpad gcc-12.3.0/gcc/objc/objc-next-runtime-abi-02.cc gcc-12.4.0/gcc/objc/objc-next-runtime-abi-02.cc
*** gcc-12.3.0/gcc/objc/objc-next-runtime-abi-02.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/objc/objc-next-runtime-abi-02.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 72,77 ****
--- 72,78 ----
  #define TAG_MSGSENDSUPER_STRET	"objc_msgSendSuper2_stret"
  
  #define USE_FIXUP_BEFORE	100600
+ #define WEAK_PROTOCOLS_AFTER	100700
  #define TAG_FIXUP		"_fixup"
  
  
*************** next_runtime_abi_02_protocol_decl (tree
*** 1025,1031 ****
    /* static struct _objc_protocol _OBJC_Protocol_<mumble>; */
    snprintf (buf, BUFSIZE, "_OBJC_Protocol_%s",
  	    IDENTIFIER_POINTER (PROTOCOL_NAME (p)));
!   if (flag_next_runtime >= USE_FIXUP_BEFORE)
      {
        decl = create_hidden_decl (objc_v2_protocol_template, buf);
        DECL_WEAK (decl) = true;
--- 1026,1032 ----
    /* static struct _objc_protocol _OBJC_Protocol_<mumble>; */
    snprintf (buf, BUFSIZE, "_OBJC_Protocol_%s",
  	    IDENTIFIER_POINTER (PROTOCOL_NAME (p)));
!   if (flag_next_runtime >= WEAK_PROTOCOLS_AFTER)
      {
        decl = create_hidden_decl (objc_v2_protocol_template, buf);
        DECL_WEAK (decl) = true;
*************** next_runtime_abi_02_protocol_decl (tree
*** 1033,1038 ****
--- 1034,1040 ----
    else
      decl = start_var_decl (objc_v2_protocol_template, buf);
    OBJCMETA (decl, objc_meta, meta_protocol);
+   DECL_PRESERVE_P (decl) = 1;
    return decl;
  }
  
*************** build_v2_objc_method_fixup_call (int sup
*** 1656,1661 ****
--- 1658,1665 ----
    rcv_p = (super_flag ? objc_super_type : objc_object_type);
  
    lookup_object = build_c_cast (input_location, rcv_p, lookup_object);
+   if (sender == error_mark_node || lookup_object == error_mark_node)
+     return error_mark_node;
  
    /* Use SAVE_EXPR to avoid evaluating the receiver twice.  */
    lookup_object = save_expr (lookup_object);
*************** build_v2_classrefs_table (void)
*** 2115,2122 ****
  	  expr = convert (objc_class_type, build_fold_addr_expr (expr));
  	}
        /* The runtime wants this, even if it appears unused, so we must force the
! 	 output.
!       DECL_PRESERVE_P (decl) = 1; */
        finish_var_decl (decl, expr);
      }
  }
--- 2119,2126 ----
  	  expr = convert (objc_class_type, build_fold_addr_expr (expr));
  	}
        /* The runtime wants this, even if it appears unused, so we must force the
! 	 output.  */
!       DECL_PRESERVE_P (decl) = 1;
        finish_var_decl (decl, expr);
      }
  }
*************** build_v2_address_table (vec<tree, va_gc>
*** 2243,2248 ****
--- 2247,2253 ----
    DECL_PRESERVE_P (decl) = 1;
    expr = objc_build_constructor (type, initlist);
    OBJCMETA (decl, objc_meta, attr);
+   DECL_USER_ALIGN (decl) = 1;
    finish_var_decl (decl, expr);
  }
  
*************** build_v2_protocol_list_address_table (vo
*** 2308,2314 ****
        gcc_assert (ref->id && TREE_CODE (ref->id) == PROTOCOL_INTERFACE_TYPE);
        snprintf (buf, BUFSIZE, "_OBJC_LabelProtocol_%s",
  		IDENTIFIER_POINTER (PROTOCOL_NAME (ref->id)));
!       if (flag_next_runtime >= USE_FIXUP_BEFORE)
  	{
  	  decl = create_hidden_decl (objc_protocol_type, buf, /*is def=*/true);
  	  DECL_WEAK (decl) = true;
--- 2313,2319 ----
        gcc_assert (ref->id && TREE_CODE (ref->id) == PROTOCOL_INTERFACE_TYPE);
        snprintf (buf, BUFSIZE, "_OBJC_LabelProtocol_%s",
  		IDENTIFIER_POINTER (PROTOCOL_NAME (ref->id)));
!       if (flag_next_runtime >= WEAK_PROTOCOLS_AFTER)
  	{
  	  decl = create_hidden_decl (objc_protocol_type, buf, /*is def=*/true);
  	  DECL_WEAK (decl) = true;
*************** build_v2_protocol_list_address_table (vo
*** 2317,2322 ****
--- 2322,2329 ----
  	decl = create_global_decl (objc_protocol_type, buf, /*is def=*/true);
        expr = convert (objc_protocol_type, build_fold_addr_expr (ref->refdecl));
        OBJCMETA (decl, objc_meta, meta_label_protocollist);
+       DECL_PRESERVE_P (decl) = 1;
+       DECL_USER_ALIGN (decl) = 1;
        finish_var_decl (decl, expr);
      }
  
*************** generate_v2_protocol_list (tree i_or_p,
*** 2395,2400 ****
--- 2402,2408 ----
    /* ObjC2 puts all these in the base section.  */
    OBJCMETA (refs_decl, objc_meta, meta_base);
    DECL_PRESERVE_P (refs_decl) = 1;
+   DECL_USER_ALIGN (refs_decl) = 1;
    finish_var_decl (refs_decl,
  		   objc_build_constructor (TREE_TYPE (refs_decl),initlist));
    return refs_decl;
*************** generate_v2_meth_descriptor_table (tree
*** 2503,2508 ****
--- 2511,2517 ----
    CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, initlist);
    /* Get into the right section.  */
    OBJCMETA (decl, objc_meta, attr);
+   DECL_USER_ALIGN (decl) = 1;
    finish_var_decl (decl, objc_build_constructor (method_list_template, v));
    return decl;
  }
*************** generate_v2_meth_type_list (vec<tree>& a
*** 2521,2533 ****
  	    IDENTIFIER_POINTER (PROTOCOL_NAME (protocol)));
    tree decl = start_var_decl (list_type, nam);
    free (nam);
-   OBJCMETA (decl, objc_meta, meta_base);
    vec<constructor_elt, va_gc> *v = NULL;
  
    for (unsigned i = 0; i < size; ++i)
      CONSTRUCTOR_APPEND_ELT (v, NULL_TREE,
  			    add_objc_string (METHOD_ENCODING (all_meths[i]),
  					     meth_var_types));
    finish_var_decl (decl, objc_build_constructor (list_type, v));
    return decl;
  }
--- 2530,2543 ----
  	    IDENTIFIER_POINTER (PROTOCOL_NAME (protocol)));
    tree decl = start_var_decl (list_type, nam);
    free (nam);
    vec<constructor_elt, va_gc> *v = NULL;
  
    for (unsigned i = 0; i < size; ++i)
      CONSTRUCTOR_APPEND_ELT (v, NULL_TREE,
  			    add_objc_string (METHOD_ENCODING (all_meths[i]),
  					     meth_var_types));
+   OBJCMETA (decl, objc_meta, meta_base);
+   DECL_USER_ALIGN (decl) = 1;
    finish_var_decl (decl, objc_build_constructor (list_type, v));
    return decl;
  }
*************** generate_v2_property_table (tree context
*** 2650,2655 ****
--- 2660,2666 ----
    CONSTRUCTOR_APPEND_ELT (inits, NULL_TREE, initlist);
  
    OBJCMETA (decl, objc_meta, meta_base);
+   DECL_USER_ALIGN (decl) = 1;
    finish_var_decl (decl, objc_build_constructor (TREE_TYPE (decl), inits));
    return decl;
  }
*************** generate_v2_dispatch_table (tree chain,
*** 2861,2866 ****
--- 2872,2878 ----
    CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, initlist);
  
    OBJCMETA (decl, objc_meta, attr);
+   DECL_USER_ALIGN (decl) = 1;
    finish_var_decl (decl,
  		   objc_build_constructor (TREE_TYPE (decl), v));
    return decl;
*************** generate_v2_ivars_list (tree chain, cons
*** 3158,3163 ****
--- 3170,3176 ----
  			  build_int_cst (integer_type_node, size));
    CONSTRUCTOR_APPEND_ELT (inits, NULL_TREE, initlist);
    OBJCMETA (decl, objc_meta, attr);
+   DECL_USER_ALIGN (decl) = 1;
    finish_var_decl (decl, objc_build_constructor (TREE_TYPE (decl), inits));
    generating_instance_variables = 0;
    return decl;
*************** generate_v2_class_structs (struct imp_en
*** 3425,3431 ****
    decl = start_var_decl (objc_v2_class_ro_template,
  			 newabi_append_ro (IDENTIFIER_POINTER
  						(DECL_NAME (metaclass_decl))));
- 
    /* TODO: ivarLayout needs t be built.  */
    initlist =
  	build_v2_class_ro_t_initializer (TREE_TYPE (decl), name_expr,
--- 3438,3443 ----
*************** generate_v2_class_structs (struct imp_en
*** 3435,3440 ****
--- 3447,3453 ----
  					class_ivars, NULL_TREE);
    /* The ROs sit in the default const section.  */
    OBJCMETA (decl, objc_meta, meta_base);
+   DECL_USER_ALIGN (decl) = 1;
    finish_var_decl (decl, initlist);
  
    /* static struct class_t _OBJC_METACLASS_Foo = { ... }; */
*************** generate_v2_class_structs (struct imp_en
*** 3446,3451 ****
--- 3459,3465 ----
  				      build_fold_addr_expr (UOBJC_V2_CACHE_decl),
  				      build_fold_addr_expr (UOBJC_V2_VTABLE_decl));
    /* The class section attributes are set when they are created.  */
+   DECL_USER_ALIGN (metaclass_decl) = 1;
    finish_var_decl (metaclass_decl, initlist);
    impent->meta_decl = metaclass_decl;
  
*************** generate_v2_class_structs (struct imp_en
*** 3525,3530 ****
--- 3539,3545 ----
  					 inst_ivars, props);
    /* The ROs sit in the default const section.  */
    OBJCMETA (decl, objc_meta, meta_base);
+   DECL_USER_ALIGN (decl) = 1;
    finish_var_decl (decl, initlist);
  
    /* static struct class_t _OBJC_CLASS_Foo = { ... }; */
*************** generate_v2_class_structs (struct imp_en
*** 3536,3541 ****
--- 3551,3557 ----
  					build_fold_addr_expr (UOBJC_V2_VTABLE_decl));
  
    /* The class section attributes are set when they are created.  */
+   DECL_USER_ALIGN (class_decl) = 1;
    finish_var_decl (class_decl, initlist);
    impent->class_decl = class_decl;
  
*************** build_ehtype (tree name, const char *eh_
*** 3710,3715 ****
--- 3726,3732 ----
      DECL_WEAK (ehtype_decl) = 1;
    inits = objc2_build_ehtype_initializer (name_expr, class_name_expr);
    OBJCMETA (ehtype_decl, objc_meta, meta_ehtype);
+   DECL_USER_ALIGN (ehtype_decl) = 1;
    finish_var_decl (ehtype_decl, inits);
    return ehtype_decl;
  }
diff -Nrcpad gcc-12.3.0/gcc/objc/objc-runtime-shared-support.cc gcc-12.4.0/gcc/objc/objc-runtime-shared-support.cc
*** gcc-12.3.0/gcc/objc/objc-runtime-shared-support.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/objc/objc-runtime-shared-support.cc	Thu Jun 20 08:08:06 2024
*************** generate_strings (void)
*** 684,689 ****
--- 684,690 ----
        decl = TREE_PURPOSE (chain);
        string_expr = my_build_string (IDENTIFIER_LENGTH (string) + 1,
  				     IDENTIFIER_POINTER (string));
+       DECL_USER_ALIGN (decl) = 1;
        finish_var_decl (decl, string_expr);
      }
  
*************** generate_strings (void)
*** 693,698 ****
--- 694,700 ----
        decl = TREE_PURPOSE (chain);
        string_expr = my_build_string (IDENTIFIER_LENGTH (string) + 1,
  				     IDENTIFIER_POINTER (string));
+       DECL_USER_ALIGN (decl) = 1;
        finish_var_decl (decl, string_expr);
      }
  
*************** generate_strings (void)
*** 702,707 ****
--- 704,710 ----
        decl = TREE_PURPOSE (chain);
        string_expr = my_build_string (IDENTIFIER_LENGTH (string) + 1,
  				     IDENTIFIER_POINTER (string));
+       DECL_USER_ALIGN (decl) = 1;
        finish_var_decl (decl, string_expr);
      }
  
*************** generate_strings (void)
*** 711,716 ****
--- 714,720 ----
        decl = TREE_PURPOSE (chain);
        string_expr = my_build_string (IDENTIFIER_LENGTH (string) + 1,
  				     IDENTIFIER_POINTER (string));
+       DECL_USER_ALIGN (decl) = 1;
        finish_var_decl (decl, string_expr);
      }
  }
diff -Nrcpad gcc-12.3.0/gcc/objcp/ChangeLog gcc-12.4.0/gcc/objcp/ChangeLog
*** gcc-12.3.0/gcc/objcp/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/objcp/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/omp-expand.cc gcc-12.4.0/gcc/omp-expand.cc
*** gcc-12.3.0/gcc/omp-expand.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/omp-expand.cc	Thu Jun 20 08:08:06 2024
*************** expand_omp_for_init_vars (struct omp_for
*** 2564,2570 ****
  	      tree factor = fd->factor;
  	      gcond *cond_stmt
  		= expand_omp_build_cond (gsi, NE_EXPR, factor,
! 					 build_zero_cst (TREE_TYPE (factor)));
  	      edge e = split_block (gsi_bb (*gsi), cond_stmt);
  	      basic_block bb0 = e->src;
  	      e->flags = EDGE_TRUE_VALUE;
--- 2564,2571 ----
  	      tree factor = fd->factor;
  	      gcond *cond_stmt
  		= expand_omp_build_cond (gsi, NE_EXPR, factor,
! 					 build_zero_cst (TREE_TYPE (factor)),
! 					 true);
  	      edge e = split_block (gsi_bb (*gsi), cond_stmt);
  	      basic_block bb0 = e->src;
  	      e->flags = EDGE_TRUE_VALUE;
diff -Nrcpad gcc-12.3.0/gcc/po/ChangeLog gcc-12.4.0/gcc/po/ChangeLog
*** gcc-12.3.0/gcc/po/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/po/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/range-op.cc gcc-12.4.0/gcc/range-op.cc
*** gcc-12.3.0/gcc/range-op.cc	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/range-op.cc	Thu Jun 20 08:08:07 2024
*************** operator_addr_expr::op1_range (irange &r
*** 3825,3831 ****
  			       const irange &op2,
  			       relation_kind rel ATTRIBUTE_UNUSED) const
  {
!   return operator_addr_expr::fold_range (r, type, lhs, op2);
  }
  
  
--- 3825,3841 ----
  			       const irange &op2,
  			       relation_kind rel ATTRIBUTE_UNUSED) const
  {
!    if (empty_range_varying (r, type, lhs, op2))
!     return true;
! 
!   // Return a non-null pointer of the LHS type (passed in op2), but only
!   // if we cant overflow, eitherwise a no-zero offset could wrap to zero.
!   // See PR 111009.
!   if (!contains_zero_p (lhs) && TYPE_OVERFLOW_UNDEFINED (type))
!     r = range_nonzero (type);
!   else
!     r.set_varying (type);
!   return true;
  }
  
  
diff -Nrcpad gcc-12.3.0/gcc/rtl-ssa/blocks.cc gcc-12.4.0/gcc/rtl-ssa/blocks.cc
*** gcc-12.3.0/gcc/rtl-ssa/blocks.cc	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/rtl-ssa/blocks.cc	Thu Jun 20 08:08:07 2024
*************** function_info::place_phis (build_info &b
*** 639,645 ****
        if (bitmap_empty_p (&frontiers[b1]))
  	continue;
  
!       bitmap b1_def = &DF_LR_BB_INFO (BASIC_BLOCK_FOR_FN (m_fn, b1))->def;
        bitmap_iterator bmi;
        unsigned int b2;
        EXECUTE_IF_SET_IN_BITMAP (&frontiers[b1], 0, b2, bmi)
--- 639,650 ----
        if (bitmap_empty_p (&frontiers[b1]))
  	continue;
  
!       // Defs in B1 that are possibly in LR_IN in the dominance frontier
!       // blocks.
!       auto_bitmap b1_def;
!       bitmap_and (b1_def, &DF_LR_BB_INFO (BASIC_BLOCK_FOR_FN (m_fn, b1))->def,
! 		  DF_LR_OUT (BASIC_BLOCK_FOR_FN (m_fn, b1)));
! 
        bitmap_iterator bmi;
        unsigned int b2;
        EXECUTE_IF_SET_IN_BITMAP (&frontiers[b1], 0, b2, bmi)
diff -Nrcpad gcc-12.3.0/gcc/rtlanal.cc gcc-12.4.0/gcc/rtlanal.cc
*** gcc-12.3.0/gcc/rtlanal.cc	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/rtlanal.cc	Thu Jun 20 08:08:07 2024
*************** set_noop_p (const_rtx set)
*** 1639,1650 ****
      return 1;
  
    if (MEM_P (dst) && MEM_P (src))
!     return rtx_equal_p (dst, src) && !side_effects_p (dst);
  
    if (GET_CODE (dst) == ZERO_EXTRACT)
!     return rtx_equal_p (XEXP (dst, 0), src)
! 	   && !BITS_BIG_ENDIAN && XEXP (dst, 2) == const0_rtx
! 	   && !side_effects_p (src);
  
    if (GET_CODE (dst) == STRICT_LOW_PART)
      dst = XEXP (dst, 0);
--- 1639,1653 ----
      return 1;
  
    if (MEM_P (dst) && MEM_P (src))
!     return (rtx_equal_p (dst, src)
! 	    && !side_effects_p (dst)
! 	    && !side_effects_p (src));
  
    if (GET_CODE (dst) == ZERO_EXTRACT)
!     return (rtx_equal_p (XEXP (dst, 0), src)
! 	    && !BITS_BIG_ENDIAN && XEXP (dst, 2) == const0_rtx
! 	    && !side_effects_p (src)
! 	    && !side_effects_p (XEXP (dst, 0)));
  
    if (GET_CODE (dst) == STRICT_LOW_PART)
      dst = XEXP (dst, 0);
*************** vec_series_lowpart_p (machine_mode resul
*** 6990,6992 ****
--- 6993,7010 ----
      }
    return false;
  }
+ 
+ /* Return true if X contains a paradoxical subreg.  */
+ 
+ bool
+ contains_paradoxical_subreg_p (rtx x)
+ {
+   subrtx_var_iterator::array_type array;
+   FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST)
+     {
+       x = *iter;
+       if (SUBREG_P (x) && paradoxical_subreg_p (x))
+ 	return true;
+     }
+   return false;
+ }
diff -Nrcpad gcc-12.3.0/gcc/rtlanal.h gcc-12.4.0/gcc/rtlanal.h
*** gcc-12.3.0/gcc/rtlanal.h	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/rtlanal.h	Thu Jun 20 08:08:07 2024
*************** vec_series_highpart_p (machine_mode resu
*** 338,341 ****
--- 338,343 ----
  bool
  vec_series_lowpart_p (machine_mode result_mode, machine_mode op_mode, rtx sel);
  
+ bool
+ contains_paradoxical_subreg_p (rtx x);
  #endif
diff -Nrcpad gcc-12.3.0/gcc/symtab.cc gcc-12.4.0/gcc/symtab.cc
*** gcc-12.3.0/gcc/symtab.cc	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/symtab.cc	Thu Jun 20 08:08:07 2024
*************** symtab_node::verify (void)
*** 1368,1373 ****
--- 1368,1465 ----
    timevar_pop (TV_CGRAPH_VERIFY);
  }
  
+ /* Return true and set *DATA to true if NODE is an ifunc resolver.  */
+ 
+ static bool
+ check_ifunc_resolver (cgraph_node *node, void *data)
+ {
+   if (node->ifunc_resolver)
+     {
+       bool *is_ifunc_resolver = (bool *) data;
+       *is_ifunc_resolver = true;
+       return true;
+     }
+   return false;
+ }
+ 
+ static bitmap ifunc_ref_map;
+ 
+ /* Return true if any caller of NODE is an ifunc resolver.  */
+ 
+ static bool
+ is_caller_ifunc_resolver (cgraph_node *node)
+ {
+   bool is_ifunc_resolver = false;
+ 
+   for (cgraph_edge *e = node->callers; e; e = e->next_caller)
+     {
+       /* Return true if caller is known to be an IFUNC resolver.  */
+       if (e->caller->called_by_ifunc_resolver)
+ 	return true;
+ 
+       /* Check for recursive call.  */
+       if (e->caller == node)
+ 	continue;
+ 
+       /* Skip if it has been visited.  */
+       unsigned int uid = e->caller->get_uid ();
+       if (!bitmap_set_bit (ifunc_ref_map, uid))
+ 	continue;
+ 
+       if (is_caller_ifunc_resolver (e->caller))
+ 	{
+ 	  /* Return true if caller is an IFUNC resolver.  */
+ 	  e->caller->called_by_ifunc_resolver = true;
+ 	  return true;
+ 	}
+ 
+       /* Check if caller's alias is an IFUNC resolver.  */
+       e->caller->call_for_symbol_and_aliases (check_ifunc_resolver,
+ 					      &is_ifunc_resolver,
+ 					      true);
+       if (is_ifunc_resolver)
+ 	{
+ 	  /* Return true if caller's alias is an IFUNC resolver.  */
+ 	  e->caller->called_by_ifunc_resolver = true;
+ 	  return true;
+ 	}
+     }
+ 
+   return false;
+ }
+ 
+ /* Check symbol table for callees of IFUNC resolvers.  */
+ 
+ void
+ symtab_node::check_ifunc_callee_symtab_nodes (void)
+ {
+   symtab_node *node;
+ 
+   bitmap_obstack_initialize (NULL);
+   ifunc_ref_map = BITMAP_ALLOC (NULL);
+ 
+   FOR_EACH_SYMBOL (node)
+     {
+       cgraph_node *cnode = dyn_cast <cgraph_node *> (node);
+       if (!cnode)
+ 	continue;
+ 
+       unsigned int uid = cnode->get_uid ();
+       if (bitmap_bit_p (ifunc_ref_map, uid))
+ 	continue;
+       bitmap_set_bit (ifunc_ref_map, uid);
+ 
+       bool is_ifunc_resolver = false;
+       cnode->call_for_symbol_and_aliases (check_ifunc_resolver,
+ 					  &is_ifunc_resolver, true);
+       if (is_ifunc_resolver || is_caller_ifunc_resolver (cnode))
+ 	cnode->called_by_ifunc_resolver = true;
+     }
+ 
+   BITMAP_FREE (ifunc_ref_map);
+   bitmap_obstack_release (NULL);
+ }
+ 
  /* Verify symbol table for internal consistency.  */
  
  DEBUG_FUNCTION void
diff -Nrcpad gcc-12.3.0/gcc/system.h gcc-12.4.0/gcc/system.h
*** gcc-12.3.0/gcc/system.h	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/system.h	Thu Jun 20 08:08:07 2024
*************** extern int fprintf_unlocked (FILE *, con
*** 194,220 ****
  #undef fread_unlocked
  #undef fwrite_unlocked
  
! /* Include <string> before "safe-ctype.h" to avoid GCC poisoning
!    the ctype macros through safe-ctype.h */
! 
! #ifdef __cplusplus
! #ifdef INCLUDE_STRING
! # include <string>
! #endif
! #endif
! 
! /* There are an extraordinary number of issues with <ctype.h>.
!    The last straw is that it varies with the locale.  Use libiberty's
!    replacement instead.  */
! #include "safe-ctype.h"
! 
! #include <sys/types.h>
! 
! #include <errno.h>
! 
! #if !defined (errno) && defined (HAVE_DECL_ERRNO) && !HAVE_DECL_ERRNO
! extern int errno;
! #endif
  
  #ifdef __cplusplus
  #if defined (INCLUDE_ALGORITHM) || !defined (HAVE_SWAP_IN_UTILITY)
--- 194,201 ----
  #undef fread_unlocked
  #undef fwrite_unlocked
  
! /* Include C++ standard headers before "safe-ctype.h" to avoid GCC
!    poisoning the ctype macros through safe-ctype.h */
  
  #ifdef __cplusplus
  #if defined (INCLUDE_ALGORITHM) || !defined (HAVE_SWAP_IN_UTILITY)
*************** extern int errno;
*** 229,234 ****
--- 210,218 ----
  #ifdef INCLUDE_SET
  # include <set>
  #endif
+ #ifdef INCLUDE_STRING
+ # include <string>
+ #endif
  #ifdef INCLUDE_VECTOR
  # include <vector>
  #endif
*************** extern int errno;
*** 245,250 ****
--- 229,247 ----
  # include <type_traits>
  #endif
  
+ /* There are an extraordinary number of issues with <ctype.h>.
+    The last straw is that it varies with the locale.  Use libiberty's
+    replacement instead.  */
+ #include "safe-ctype.h"
+ 
+ #include <sys/types.h>
+ 
+ #include <errno.h>
+ 
+ #if !defined (errno) && defined (HAVE_DECL_ERRNO) && !HAVE_DECL_ERRNO
+ extern int errno;
+ #endif
+ 
  /* Some of glibc's string inlines cause warnings.  Plus we'd rather
     rely on (and therefore test) GCC's string builtins.  */
  #define __NO_STRING_INLINES
diff -Nrcpad gcc-12.3.0/gcc/testsuite/ChangeLog gcc-12.4.0/gcc/testsuite/ChangeLog
*** gcc-12.3.0/gcc/testsuite/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/testsuite/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,6257 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-12  Vladimir N. Makarov  <vmakarov@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-09-25  Vladimir N. Makarov  <vmakarov@redhat.com>
+ 
+ 	PR middle-end/111497
+ 	* g++.target/i386/pr111497.C: new test.
+ 
+ 2024-06-12  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2022-12-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/40635
+ 	* gcc.dg/uninit-pr40635.c: New testcase.
+ 
+ 2024-06-12  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2024-06-12  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 		    Yvan ROUX  <yvan.roux@foss.st.com>
+ 
+ 	PR target/115253
+ 	* gcc.target/arm/cmse/extend-return.c: Update test case
+ 	condition for Armv8.1-M.
+ 
+ 2024-06-11  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	Backported from master:
+ 	2024-05-20  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	PR tree-optimization/115143
+ 	* gcc.c-torture/compile/pr115143-1.c: New test.
+ 	* gcc.c-torture/compile/pr115143-2.c: New test.
+ 	* gcc.c-torture/compile/pr115143-3.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-06-06  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c/114493
+ 	* gcc.dg/pr114493-1.c: New test.
+ 	* gcc.dg/pr114493-2.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-06-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/108789
+ 	* gcc.c-torture/execute/pr108789.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-05-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/114902
+ 	PR rtl-optimization/115092
+ 	* gcc.dg/pr114902.c: New test.
+ 	* gcc.dg/pr115092.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-05-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR sanitizer/114956
+ 	* gcc.dg/asan/pr114956.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/114876
+ 	* gcc.dg/pr114876.c: New test.
+ 	* gcc.dg/tree-ssa/builtin-sprintf-warn-1.c: Adjust expected
+ 	diagnostics.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-25  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR fortran/114825
+ 	* gfortran.dg/gomp/pr114825.f90: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-19  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/114768
+ 	* gcc.dg/pr114768.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-18  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/114753
+ 	* gcc.dg/pr114753.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/114634
+ 	* g++.dg/ext/attrib68.C: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-12  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/114691
+ 	* g++.dg/ext/pr114691.C: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/110027
+ 	* gcc.dg/asan/pr110027.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/114580
+ 	* g++.dg/cpp2a/is-constant-evaluated15.C: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/114566
+ 	* gcc.target/i386/avx512f-pr114566.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/114537
+ 	* g++.dg/cpp2a/bit-cast16.C: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-14  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/113907
+ 	* gcc.dg/pr113907-1.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-14  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/114310
+ 	* gcc.dg/pr114310.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR rtl-optimization/110079
+ 	* gcc.dg/pr110079.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/114184
+ 	* gcc.target/i386/pr114184.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-22  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c/114007
+ 	* gcc.dg/c23-attr-syntax-8.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-12  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/113674
+ 	* c-c++-common/Wattributes-3.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/113603
+ 	* gcc.c-torture/compile/pr113603.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-18  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/113122
+ 	* gcc.target/i386/pr113122-1.c: New test.
+ 	* gcc.target/i386/pr113122-2.c: New test.
+ 	* gcc.target/i386/pr113122-3.c: New test.
+ 	* gcc.target/i386/pr113122-4.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/113372
+ 	PR middle-end/90348
+ 	PR middle-end/110115
+ 	PR middle-end/111422
+ 	* gcc.c-torture/execute/pr90348.c: New test.
+ 	* gcc.c-torture/execute/pr110115.c: New test.
+ 	* gcc.c-torture/execute/pr111422.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c/113262
+ 	* gcc.dg/pr113262.c: New test.
+ 
+ 2024-06-11  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-08-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/111070
+ 	* gcc.dg/pr111070.c: New testcase.
+ 
+ 2024-06-10  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gnat.dg/incomplete8.adb: New test.
+ 
+ 2024-06-04  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	Backported from master:
+ 	2024-02-16  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	PR c++/97990
+ 	* g++.dg/torture/vector-struct-1.C: New test.
+ 
+ 2024-06-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-06-26  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/110381
+ 	* gcc.dg/vect/pr110381.c: New testcase.
+ 
+ 2024-06-04  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	Backported from master:
+ 	2024-01-29  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR target/113281
+ 	* gcc.dg/vect/pr113281-1.c: New test.
+ 	* gcc.dg/vect/pr113281-2.c: Likewise.
+ 	* gcc.dg/vect/pr113281-3.c: Likewise.
+ 	* gcc.dg/vect/pr113281-4.c: Likewise.
+ 	* gcc.dg/vect/pr113281-5.c: Likewise.
+ 
+ 2024-06-04  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	Backported from master:
+ 	2024-05-24  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR tree-optimization/115192
+ 	* gcc.dg/vect/pr115192.c: New test.
+ 
+ 2024-06-03  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	Backported from master:
+ 	2024-05-31  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/115297
+ 	* gcc.target/alpha/pr115297.c: New test.
+ 
+ 2024-05-28  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-05-22  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR sanitizer/115172
+ 	* gcc.dg/asan/pr115172.c: New test.
+ 
+ 2024-05-28  Tobias Burnus  <tburnus@baylibre.com>
+ 
+ 	Backported from master:
+ 	2024-05-20  Tobias Burnus  <tburnus@baylibre.com>
+ 
+ 	PR fortran/115150
+ 	* gfortran.dg/shape_12.f90: New test.
+ 
+ 2024-05-28  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	Backported from master:
+ 	2024-05-14  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/113907
+ 	* gcc.dg/lto/pr113907_0.c: New.
+ 	* gcc.dg/lto/pr113907_1.c: Likewise.
+ 	* gcc.dg/lto/pr113907_2.c: Likewise.
+ 
+ 2024-05-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-28  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/100667
+ 	* g++.dg/ext/is_constructible8.C: New test.
+ 
+ 2024-05-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-09-22  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/111529
+ 	* g++.dg/ext/unroll-4.C: New test.
+ 
+ 2024-05-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-25  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/113598
+ 	* g++.dg/cpp0x/initlist-pmf2.C: New test.
+ 
+ 2024-05-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-02  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/114561
+ 	PR c++/114562
+ 	* g++.dg/conversion/ref10.C: New test.
+ 	* g++.dg/conversion/ref11.C: New test.
+ 
+ 2024-05-22  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2024-05-22  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	* gcc.target/arm/cmse/extend-param.c: Add regression test. Add
+ 	-fshort-enums.
+ 	* gcc.target/arm/cmse/extend-return.c: Add -fshort-enums option.
+ 
+ 2024-05-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-01-31  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/110176
+ 	* gcc.dg/torture/pr110176.c: New testcase.
+ 
+ 2024-05-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-08-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/111039
+ 	* gcc.dg/pr111039.c: New testcase.
+ 
+ 2024-05-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-11-20  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/112281
+ 	* gcc.dg/torture/pr112281-1.c: New testcase.
+ 	* gcc.dg/torture/pr112281-2.c: Likewise.
+ 
+ 2024-05-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-11-13  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/112495
+ 	* gcc.target/i386/pr112495.c: New testcase.
+ 
+ 2024-05-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-01-11  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/112505
+ 	* gcc.dg/vect/pr112505.c: New testcase.
+ 
+ 2024-05-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-01-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/112718
+ 	* gcc.dg/debug/pr112718.c: New testcase.
+ 
+ 2024-05-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-12-14  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/112793
+ 	* g++.dg/vect/pr112793.cc: New testcase.
+ 
+ 2024-05-16  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-03-26  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/114027
+ 	* gcc.dg/vect/pr114027.c: Fix iteration count.
+ 
+ 2024-05-16  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-02-22  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/114027
+ 	* gcc.dg/vect/pr114027.c: New testcase.
+ 
+ 2024-05-16  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-05-08  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/114375
+ 	* gcc.dg/vect/vect-pr114375.c: New testcase.
+ 
+ 2024-05-16  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-03-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/114231
+ 	* gcc.dg/vect/pr114231.c: New testcase.
+ 
+ 2024-05-16  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-05-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR gcov-profile/114715
+ 	* gcc.misc-tests/gcov-24.c: New testcase.
+ 
+ 2024-05-15  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	Backported from master:
+ 	2024-04-08  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/108007
+ 	PR ipa/112616
+ 	* gcc.dg/ipa/pr108007.c: New test.
+ 	* gcc.dg/ipa/pr112616.c: Likewise.
+ 	* g++.dg/ipa/pr113757.C: New file.
+ 
+ 2024-05-15  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	Backported from master:
+ 	2024-04-05  Patrick O'Neill  <patrick@rivosinc.com>
+ 		    Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/114247
+ 	* gcc.dg/ipa/pr114247.c: New test.
+ 
+ 2024-05-13  Andrew MacLeod  <amacleod@redhat.com>
+ 
+ 	PR tree-optimization/111009
+ 	* gcc.dg/pr111009.c: New.
+ 
+ 2024-05-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-05-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/89224
+ 	* g++.dg/torture/vector-subaccess-1.C: Add -Wno-psabi as additional
+ 	options.
+ 
+ 2024-05-09  Andrew Pinski  <apinski@marvell.com>
+ 
+ 	Backported from master:
+ 	2023-09-25  Andrew Pinski  <apinski@marvell.com>
+ 
+ 	PR tree-optimization/110386
+ 	* gcc.c-torture/compile/pr110386-1.c: New test.
+ 	* gcc.c-torture/compile/pr110386-2.c: New test.
+ 
+ 2024-05-08  Marek Polacek  <polacek@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-22  Marek Polacek  <polacek@redhat.com>
+ 
+ 	* g++.dg/warn/Wmismatched-new-delete-8.C: Use __SIZE_TYPE__.
+ 
+ 2024-05-08  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	Backported from master:
+ 	2024-02-22  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	PR tree-optimization/109804
+ 	* g++.dg/warn/Wmismatched-new-delete-8.C: New test.
+ 
+ 2024-05-08  Andrew Pinski  <apinski@marvell.com>
+ 
+ 	Backported from master:
+ 	2023-09-10  Andrew Pinski  <apinski@marvell.com>
+ 
+ 	PR tree-optimization/111331
+ 	* gcc.c-torture/execute/pr111331-1.c: New test.
+ 	* gcc.c-torture/execute/pr111331-2.c: New test.
+ 	* gcc.c-torture/execute/pr111331-3.c: New test.
+ 
+ 2024-05-08  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	Backported from master:
+ 	2024-03-11  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	PR middle-end/95351
+ 	* gcc.dg/float_opposite_arm-1.c: New test.
+ 
+ 2024-05-08  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	Backported from master:
+ 	2024-05-07  Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	PR c++/89224
+ 	* g++.dg/torture/vector-subaccess-1.C: New test.
+ 	* gcc.dg/pr83415.c: Change warning to error.
+ 
+ 2024-05-07  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Backported from master:
+ 	2024-05-06  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR ipa/92606
+ 	* gcc.target/avr/torture/pr92606.c: New test.
+ 
+ 2024-05-06  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2024-04-02  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/106999
+ 	* gfortran.dg/pr106999.f90: New test.
+ 
+ 2024-05-06  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2024-05-06  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/114739
+ 	* gfortran.dg/pr114739.f90: New test.
+ 	* gfortran.dg/derived_comp_array_ref_8.f90: Add 'implicit none'
+ 	for consistency with expected error message.
+ 	* gfortran.dg/nullify_4.f90: ditto
+ 	* gfortran.dg/pointer_init_6.f90: ditto
+ 	* gfortran.dg/pr107397.f90: ditto
+ 	* gfortran.dg/pr88138.f90: ditto
+ 
+ 2024-05-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-04-10  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/114672
+ 	* gcc.dg/torture/pr114672.c: New testcase.
+ 
+ 2024-05-02  Will Schmidt  <will_schmidt@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2024-04-12  Will Schmidt  <will_schmidt@linux.ibm.com>
+ 		    Peter Bergner  <bergner@linux.ibm.com>
+ 
+ 	PR target/101865
+ 	* gcc.target/powerpc/predefine-p7-novsx.c: New test.
+ 	* gcc.target/powerpc/predefine-p8-noaltivec-novsx.c: New test.
+ 	* gcc.target/powerpc/predefine-p8-noaltivec.c: New test.
+ 	* gcc.target/powerpc/predefine-p8-novsx.c: New test.
+ 	* gcc.target/powerpc/predefine-p8-pragma-vsx.c: New test.
+ 	* gcc.target/powerpc/predefine-p9-novsx.c: New test.
+ 
+ 2024-05-01  Jeevitha  <jeevitha@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2024-03-07  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>
+ 
+ 	PR target/113950
+ 	* gcc.target/powerpc/pr113950.c: New testcase.
+ 
+ 2024-04-30  Joe Ramsay  <Joe.Ramsay@arm.com>
+ 
+ 	Backported from master:
+ 	2024-03-15  Joe Ramsay  <Joe.Ramsay@arm.com>
+ 
+ 	* gcc.target/aarch64/no_merge_trunc_signed_zero.c: New test.
+ 
+ 2024-04-30  Yang Yujie  <yangyujie@loongson.cn>
+ 
+ 	Backported from master:
+ 	2023-12-12  Yang Yujie  <yangyujie@loongson.cn>
+ 
+ 	* gcc.target/loongarch/eh_return-normal-return.c: New test.
+ 
+ 2024-04-26  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2023-05-23  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/103716
+ 	* gfortran.dg/pr103716.f90 : New test.
+ 
+ 2024-04-26  Andre Vehreschild  <vehre@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2023-07-12  Andre Vehreschild  <vehre@gcc.gnu.org>
+ 
+ 	* gfortran.dg/pdt_33.f03: New test.
+ 
+ 2024-04-25  Richard Ball  <richard.ball@arm.com>
+ 
+ 	Backported from master:
+ 	2024-04-25  Richard Ball  <richard.ball@arm.com>
+ 
+ 	* gcc.target/arm/cmse/extend-param.c: New test.
+ 	* gcc.target/arm/cmse/extend-return.c: New test.
+ 
+ 2024-04-25  Kewen Lin  <linkw@linux.ibm.com>
+ 	    Andrew Pinski  <quic_apinski@quicinc.com>
+ 
+ 	PR target/88309
+ 	* gcc.target/powerpc/pr88309.c: New test.
+ 
+ 2024-04-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-26  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR sanitizer/111736
+ 	* gcc.dg/tsan/pr111736.c: New test.
+ 
+ 2024-04-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-22  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR sanitizer/111736
+ 	* gcc.dg/ubsan/pr111736.c: New test.
+ 
+ 2024-04-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-03-21  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/111736
+ 	* gcc.target/i386/pr111736.c: New testcase.
+ 
+ 2024-04-22  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-04-02  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR testsuite/114034
+ 	* g++.dg/gcov/gcov-dump-1.C: Remove extra -lgcov.
+ 	* g++.dg/gcov/gcov-dump-2.C: Likewise.
+ 
+ 2024-04-21  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-04-02  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR testsuite/114036
+ 	* gcc.misc-tests/gcov-14.c: Allow for 'Foo' to be undefined
+ 	on Darwin link lines.
+ 
+ 2024-04-21  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-03-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR target/114049
+ 	* gcc.dg/framework-1.c: Use an IOKit header instead of a
+ 	Kernel one.
+ 
+ 2024-04-21  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2024-02-10  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	* gcc.dg/ssp-2.c: Ignore warning that
+ 	-multiply_defined is obsolete
+ 
+ 2024-04-21  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2024-02-10  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	* gcc.dg/darwin-ld-2.c: Ignore warning
+ 	that -bind_at_load is deprecated.
+ 
+ 2024-04-21  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2023-12-11  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	PR testsuite/112297
+ 	* gcc.target/i386/pr100936.c: Require nonpic target.
+ 
+ 2024-04-21  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2023-10-30  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	* gcc.target/i386/pr105554.c: Require ifunc.
+ 
+ 2024-04-21  Francois-Xavier Coudert  <fxcoudert@gmail.com>
+ 
+ 	Backported from master:
+ 	2023-09-29  Francois-Xavier Coudert  <fxcoudert@gmail.com>
+ 
+ 	* gcc.dg/debug/dwarf2/inline4.c: Ajdust regexp to match darwin
+ 	output.
+ 
+ 2024-04-20  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2023-10-30  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	* gcc.dg/pie-2.c: Skip test on darwin.
+ 
+ 2024-04-20  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-10-02  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* g++.dg/debug/dwarf2/pr85550.C: Skip for Darwin.
+ 
+ 2024-04-20  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2023-09-08  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	* gcc.dg/darwin-segaddr.c: Adjust for darwin linker warning.
+ 	* gcc.dg/pie-7.c: Likewise.
+ 
+ 2024-04-20  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2023-08-20  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	* gcc.dg/darwin-minversion-link.c: Account for macOS 13 and 14.
+ 
+ 2024-04-20  Francois-Xavier Coudert  <fxcoudert@gmail.com>
+ 
+ 	Backported from master:
+ 	2023-08-20  Francois-Xavier Coudert  <fxcoudert@gmail.com>
+ 
+ 	* gcc.dg/ipa/ipa-icf-38.c: Require alias support.
+ 
+ 2024-04-20  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2023-08-20  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	PR analyzer/104042
+ 	* gcc.dg/analyzer/analyzer.exp: Pass -D_FORTIFY_SOURCE=0 on Darwin.
+ 
+ 2024-04-20  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-02-02  Iain Sandoe  <iain@sandoe.co.uk>
+ 		    Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	* lib/target-supports.exp (check_effective_target_shared):
+ 	Allow the external symbols referenced in the test to be undefined.
+ 
+ 2024-04-20  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-01-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* jit.dg/test-setting-alignment.c:  Handle Darwin in
+ 	jit-verify-assemble output.
+ 
+ 2024-04-20  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-01-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* jit.dg/jit.exp: Accept target clauses in jit-verify-assembler
+ 	handling.
+ 
+ 2024-04-20  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-01-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* jit.dg/test-link-section-assembler.c: Accept any whitespace
+ 	between the .section directive and its arguments.
+ 
+ 2024-04-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-06-23  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h: Make
+ 	this header use pragma system_header.
+ 
+ 2024-04-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-01-28  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* obj-c++.dg/encode-10.mm: Remove unneeded '-lobjc' option addition.
+ 	* obj-c++.dg/encode-9.mm: Likewise.
+ 
+ 2024-04-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-01-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR target/105522
+ 	* gcc.dg/pr105522.c: New file.
+ 
+ 2024-04-19  Iain Sandoe  <iains.gcc@gmail.com>
+ 
+ 	Backported from master:
+ 	2023-11-29  Iain Sandoe  <iains.gcc@gmail.com>
+ 
+ 	* lib/target-supports.exp: Test an asm line that fails on broken
+ 	Darwin assembler versions.
+ 
+ 2024-04-15  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	Backported from master:
+ 	2024-04-03  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	PR tree-optimization/114115
+ 	* gcc.dg/pr114115.c: New test.
+ 
+ 2024-04-15  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	* g++.target/aarch64/acle/ls64.C: Add +ls64.
+ 	* g++.target/aarch64/acle/ls64_lto.C: Likewise.
+ 	* gcc.target/aarch64/acle/ls64_lto.c: Likewise.
+ 	* gcc.target/aarch64/acle/pr110100.c: Likewise.
+ 	* gcc.target/aarch64/acle/pr110132.c: Likewise.
+ 	* gcc.target/aarch64/pragma_cpp_predefs_2.c: Correct header checks.
+ 
+ 2024-04-15  Tamar Christina  <tamar.christina@arm.com>
+ 
+ 	PR tree-optimization/113552
+ 	* gcc.target/aarch64/pr113552.c: New test.
+ 	* gcc.target/aarch64/simd_pcs_attribute-3.c: Remove bogus check.
+ 
+ 2024-04-11  Kito Cheng  <kito.cheng@sifive.com>
+ 
+ 	Backported from master:
+ 	2024-02-29  Kito Cheng  <kito.cheng@sifive.com>
+ 
+ 	* gcc.target/riscv/pr114130.c: New.
+ 
+ 2024-04-06  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2024-03-28  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/114474
+ 	* gfortran.dg/data_pointer_3.f90: New test.
+ 
+ 2024-04-02  Qing Zhao  <qing.zhao@oracle.com>
+ 
+ 	Backported from master:
+ 	2023-09-15  Qing Zhao  <qing.zhao@oracle.com>
+ 
+ 	PR tree-optimization/111407
+ 	* gcc.dg/pr111407.c: New test.
+ 
+ 2024-04-02  Mikael Morin  <mikael@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2024-03-22  Mikael Morin  <mikael@gcc.gnu.org>
+ 
+ 	PR fortran/107426
+ 	* gfortran.dg/pr89943_3.f90: Update error pattern.
+ 	* gfortran.dg/pr89943_4.f90: Likewise.
+ 	* gfortran.dg/use_31.f90: New test.
+ 
+ 2024-03-29  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2024-03-29  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/50410
+ 	* gfortran.dg/data_initialized_4.f90: New test.
+ 
+ 2024-03-27  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	Backported from master:
+ 	2024-03-05  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR sanitizer/97696
+ 	* gcc.target/aarch64/sve/pr97696.c: New test.
+ 
+ 2024-03-20  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2024-03-18  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/103715
+ 	* gfortran.dg/pr103715.f90: New test.
+ 
+ 2024-03-19  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/111822
+ 	* g++.target/i386/pr111822.C (dg-do): Compile only for ia32 targets.
+ 	(dg-options): Add -march=x86-64.
+ 
+ 2024-03-14  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	Backported from master:
+ 	2024-03-14  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	* g++.target/i386/pr111822.C: New test.
+ 
+ 2024-03-10  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2024-03-10  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/112285
+ 	PR d/112290
+ 	* gdc.dg/pr112285.d: New test.
+ 	* gdc.dg/pr112290.d: New test.
+ 	* gdc.test/compilable/previewin.d: Adjust testcase.
+ 
+ 2024-03-09  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	Backported from master:
+ 	2024-03-09  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	* g++.target/loongarch/atomic-cas-int.C: New test.
+ 
+ 2024-03-07  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gnat.dg/predicate15.adb: New test.
+ 
+ 2024-03-03  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2024-03-03  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/114171
+ 	* gdc.dg/torture/pr114171.d: New test.
+ 
+ 2024-03-03  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2024-02-12  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/113758
+ 	* gdc.dg/torture/pr113758.d: New test.
+ 
+ 2024-03-03  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2024-02-12  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/113125
+ 	* gdc.dg/imports/pr113125.d: New test.
+ 	* gdc.dg/pr113125.d: New test.
+ 
+ 2024-03-01  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2024-02-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/110221
+ 	* gfortran.dg/pr110221.f: New testcase.
+ 
+ 2024-02-27  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gnat.dg/opt104.ads, gnat.dg/opt104.adb: New test.
+ 
+ 2024-02-27  Jeevitha  <jeevitha@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-08-31  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>
+ 
+ 	PR target/110411
+ 	* gcc.target/powerpc/pr110411-1.c: New testcase.
+ 	* gcc.target/powerpc/pr110411-2.c: New testcase.
+ 
+ 2024-02-27  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	Backported from master:
+ 	2024-02-26  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	PR target/114098
+ 	* gcc.target/i386/amxtile-4.c: New test.
+ 
+ 2024-02-26  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gnat.dg/access10.adb: New test.
+ 
+ 2024-02-23  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	Backported from master:
+ 	2024-02-23  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/108120
+ 	* gcc.target/arm/neon-recip-div-1.c: New file.
+ 
+ 2024-02-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	Backported from master:
+ 	2023-12-20  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	* gcc.target/aarch64/pr112787.c: New test.
+ 
+ 2024-02-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/107385
+ 	* gcc.dg/pr107385.c: Require lra effective target.
+ 
+ 2024-02-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/107385
+ 	* gcc.dg/pr107385.c: New test.
+ 
+ 2024-02-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/113921
+ 	* gcc.target/i386/pr113921.c: New test.
+ 
+ 2024-02-14  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	Backported from master:
+ 	2024-02-07  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	PR target/111677
+ 	* gcc.target/aarch64/torture/pr111677.c: New test.
+ 
+ 2024-02-14  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/113896
+ 	* g++.dg/torture/pr113896.C: New testcase.
+ 
+ 2024-02-09  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2024-01-27  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/104908
+ 	* gfortran.dg/pr104908.f90: New test.
+ 
+ 2024-02-06  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-06  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/107291
+ 	* g++.dg/cpp2a/spaceship-eq17.C: New test.
+ 
+ 2024-02-05  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-06-02  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/95226
+ 	PR c++/109359
+ 	* g++.dg/ext/frounding-math1.C: New test.
+ 
+ 2024-02-05  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-05  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/111286
+ 	* g++.dg/cpp0x/initlist-array22.C: New test.
+ 
+ 2024-02-02  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-02  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/110084
+ 	* g++.dg/cpp2a/spaceship-synth-neg3.C: Check error message.
+ 	* g++.dg/cpp2a/spaceship-eq16.C: New test.
+ 
+ 2024-02-02  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	Backported from master:
+ 	2024-01-24  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR tree-optimization/110422
+ 	* gcc.dg/torture/pr110422.c: New test.
+ 
+ 2024-02-01  Marek Polacek  <polacek@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-01  Marek Polacek  <polacek@redhat.com>
+ 
+ 	PR c++/112437
+ 	* g++.dg/cpp2a/concepts-throw1.C: New test.
+ 	* g++.dg/eh/throw4.C: New test.
+ 
+ 2024-01-27  Lewis Hyatt  <lhyatt@gmail.com>
+ 
+ 	PR preprocessor/105608
+ 	* g++.dg/pch/line-map-1.C: New test.
+ 	* g++.dg/pch/line-map-1.Hs: New test.
+ 	* g++.dg/pch/line-map-2.C: New test.
+ 	* g++.dg/pch/line-map-2.Hs: New test.
+ 	* g++.dg/pch/line-map-3.Hs: New file.
+ 
+ 2024-01-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/113347
+ 	* g++.dg/eh/return3.C: New test.
+ 
+ 2024-01-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-12-20  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/103185
+ 	* g++.dg/cpp1z/array-prvalue2.C: New test.
+ 	* g++.dg/cpp1z/eval-order3.C: Test swapped operands.
+ 
+ 2024-01-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-12-20  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/113088
+ 	PR c++/33799
+ 	* g++.dg/eh/return2.C: New test.
+ 
+ 2024-01-24  Jason Merrill  <jason@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-08-31  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/92407
+ 	* g++.dg/opt/nrv22.C: New test.
+ 
+ 2024-01-15  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-15  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/109899
+ 	* g++.dg/cpp0x/initlist-array21.C: New test.
+ 
+ 2024-01-08  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Backported from master:
+ 	2024-01-08  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/112952
+ 	* gcc.target/avr/attribute-io.h: New file.
+ 	* gcc.target/avr/pr112952-0.c: New test.
+ 	* gcc.target/avr/pr112952-1.c: New test.
+ 	* gcc.target/avr/pr112952-2.c: New test.
+ 	* gcc.target/avr/pr112952-3.c: New test.
+ 
+ 2023-12-24  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-09-22  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/111485
+ 	* g++.dg/cpp2a/concepts-ttp5.C: New test.
+ 	* g++.dg/cpp2a/concepts-ttp6.C: New test.
+ 
+ 2023-12-20  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-04-25  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/108975
+ 	* g++.dg/cpp0x/lambda/lambda-const11a.C: New test.
+ 
+ 2023-12-19  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-12-19  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/112816
+ 	* gcc.target/i386/sse2-pr112816-2.c: New test.
+ 
+ 2023-12-18  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-12-18  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/113013
+ 	* gcc.dg/pr113013.c: New test.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-12-08  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR sanitizer/112727
+ 	* c-c++-common/ubsan/pr112727.c: New test.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-29  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/112733
+ 	* gcc.dg/pr112733.c: New test.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-12-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/112845
+ 	* gcc.dg/pr112845.c: New file.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-12-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/112837
+ 	* gcc.dg/pr112837.c: New test.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-12-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/112816
+ 	* gcc.target/i386/sse2-pr112816.c: New test.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-12-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/112795
+ 	* g++.dg/ext/unroll-5.C: New test.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-25  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/111408
+ 	* gcc.c-torture/execute/pr111408.c: New test.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-13  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/111967
+ 	* gcc.dg/tree-ssa/pr111967.c: New test.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c/112339
+ 	* c-c++-common/ubsan/Wno-attributes-1.c: New test.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-07-19  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/110731
+ 	* gcc.dg/pr110731.c: New test.
+ 
+ 2023-12-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-08-24  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/111080
+ 	* gcc.dg/debug/dwarf2/pr111080.c: New testcase.
+ 
+ 2023-12-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-08-25  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/111137
+ 	* gcc.dg/torture/pr111137.c: New testcase.
+ 
+ 2023-12-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-08-31  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/111253
+ 	* gcc.dg/Wfree-nonheap-object-7.c: New testcase.
+ 
+ 2023-12-12  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	Backported from master:
+ 	2023-12-12  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	* gcc.target/i386/pr112891.c: New test.
+ 	* gcc.target/i386/pr112891-2.c: New test.
+ 
+ 2023-12-01  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2023-11-26  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/111880
+ 	* gfortran.dg/pr111880.f90: New test.
+ 
+ 2023-11-27  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-16  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/111703
+ 	PR c++/107939
+ 	* g++.dg/cpp2a/concepts-fn8.C: Extend test.
+ 	* g++.dg/diagnostic/constexpr4.C: New test.
+ 
+ 2023-11-27  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-15  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/111703
+ 	PR c++/112269
+ 	* g++.dg/cpp2a/concepts-fn8.C: New test.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-10-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/111917
+ 	* gcc.dg/torture/pr111917.c: New testcase.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-10-17  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/111818
+ 	* gcc.dg/torture/pr111818.c: New testcase.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-09-28  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/111614
+ 	* gcc.dg/torture/pr111614.c: New testcase.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-10-12  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/111764
+ 	* gcc.dg/vect/pr111764.c: New testcase.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-10-20  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/111445
+ 	* gcc.dg/torture/pr111445.c: New testcase.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-08-18  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/111019
+ 	* g++.dg/torture/pr111019.C: New testcase.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-08-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/110702
+ 	* gcc.dg/torture/pr110702.c: New testcase.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-07-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/110556
+ 	* gcc.dg/torture/pr110556.c: New testcase.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-07-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/110515
+ 	* g++.dg/opt/pr110515.C: New testcase.
+ 
+ 2023-11-27  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-06-20  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR debug/110295
+ 	* g++.dg/debug/pr110295.C: New testcase.
+ 
+ 2023-11-24  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	Backported from master:
+ 	2023-11-23  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/112672
+ 	* gcc.target/i386/pr112672.c: New test.
+ 
+ 2023-11-22  Maciej W. Rozycki  <macro@embecosm.com>
+ 
+ 	Backported from master:
+ 	2023-11-22  Maciej W. Rozycki  <macro@embecosm.com>
+ 
+ 	PR target/111815
+ 	* gcc.dg/torture/pr111815.c: New test.
+ 
+ 2023-11-17  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/112301
+ 	PR c++/102191
+ 	PR c++/33799
+ 	* g++.dg/eh/return1.C: Add more cases.
+ 
+ 2023-11-17  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/33799
+ 	* g++.dg/eh/return1.C: Add label cases.
+ 
+ 2023-11-16  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gnat.dg/varsize4.adb (Func): Initialize Byte_Read parameter.
+ 
+ 2023-11-16  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gnat.dg/varsize4.ads, gnat.dg/varsize4.adb: New test.
+ 	* gnat.dg/varsize4_pkg.ads: New helper.
+ 
+ 2023-11-16  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	Backported from master:
+ 	2023-11-15  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	* gcc.target/loongarch/cas-acquire.c: New test.
+ 
+ 2023-11-15  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-11-06  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	PR target/111828
+ 	* lib/target-supports.exp
+ 	(check_effective_target_powerpc_as_p10_htm): New proc.
+ 	* g++.target/powerpc/pr111828-1.C: New test.
+ 	* g++.target/powerpc/pr111828-2.C: New test.
+ 
+ 2023-11-10  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	Backported from master:
+ 	2023-11-10  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	* g++.target/i386/pr112443.C: New test.
+ 
+ 2023-10-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2023-10-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/110712
+ 	* gdc.dg/pr110712.d: New test.
+ 
+ 2023-10-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2023-10-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/112270
+ 	* gdc.dg/pr112270.d: New test.
+ 
+ 2023-10-26  chenxiaolong  <chenxiaolong@loongson.cn>
+ 
+ 	Backported from master:
+ 	2023-10-25  chenxiaolong  <chenxiaolong@loongson.cn>
+ 
+ 	* gcc.target/loongarch/builtin_thread_pointer.c: New test.
+ 
+ 2023-10-26  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	Backported from master:
+ 	2023-07-06  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	* gcc.target/i386/pr110170-3.c: New test.
+ 
+ 2023-10-23  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-10-12  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	PR target/111367
+ 	* g++.target/powerpc/pr111367.C: New test.
+ 
+ 2023-10-21  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2023-10-17  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/111837
+ 	* gfortran.dg/implied_do_io_8.f90: New test.
+ 
+ 2023-10-16  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-09-25  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	PR target/111380
+ 	* gcc.target/powerpc/pr111380-1.c: New test.
+ 	* gcc.target/powerpc/pr111380-2.c: New test.
+ 
+ 2023-10-16  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-09-25  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	PR target/111366
+ 	* g++.target/powerpc/pr111366.C: New test.
+ 
+ 2023-10-07  Andrew Pinski  <pinskia@gmail.com>
+ 
+ 	Backported from master:
+ 	2023-10-06  Andrew Pinski  <pinskia@gmail.com>
+ 
+ 	PR middle-end/111699
+ 	* gcc.c-torture/compile/pr111699-1.c: New test.
+ 
+ 2023-10-02  Pat Haugen  <pthaugen@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-09-19  Pat Haugen  <pthaugen@linux.ibm.com>
+ 
+ 	* gcc.target/powerpc/clone1.c: Add xfails.
+ 	* gcc.target/powerpc/clone3.c: Likewise.
+ 	* gcc.target/powerpc/mod-1.c: Update scan strings and add xfails.
+ 	* gcc.target/powerpc/mod-2.c: Likewise.
+ 	* gcc.target/powerpc/p10-vdivq-vmodq.c: Add xfails.
+ 
+ 2023-09-29  Wilco Dijkstra  <wilco.dijkstra@arm.com>
+ 
+ 	Backported from master:
+ 	2023-09-28  Wilco Dijkstra  <wilco.dijkstra@arm.com>
+ 
+ 	PR target/111121
+ 	* gcc.target/aarch64/mops_4.c: Add memmove testcases.
+ 
+ 2023-09-26  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gnat.dg/opt102.adb:New test.
+ 	* gnat.dg/opt102_pkg.adb, gnat.dg/opt102_pkg.ads: New helper.
+ 
+ 2023-09-20  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	Backported from master:
+ 	2023-09-15  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	PR target/111411
+ 	* gcc.dg/rtl/aarch64/pr111411.c: New test.
+ 
+ 2023-09-12  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/111340
+ 	* gcc.target/i386/pr111340.c: New test.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* gcc.target/aarch64/stack-protector-8.c: New test.
+ 	* gcc.target/aarch64/stack-protector-9.c: Likewise.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* gcc.target/aarch64/sve/pcs/stack_clash_3.c: Avoid redundant probes.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* gcc.target/aarch64/stack-check-prologue-17.c: Expect the probe
+ 	to be at offset 1024 rather than offset 0.
+ 	* gcc.target/aarch64/stack-check-prologue-18.c: Likewise.
+ 	* gcc.target/aarch64/stack-check-prologue-19.c: Likewise.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* gcc.target/aarch64/stack-check-prologue-18.c: New test.
+ 	* gcc.target/aarch64/stack-check-prologue-19.c: Likewise.
+ 	* gcc.target/aarch64/stack-check-prologue-20.c: Likewise.
+ 
+ 2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+ 
+ 	* gcc.target/aarch64/stack-check-prologue-17.c: New test.
+ 
+ 2023-09-12  Haochen Gui  <guihaoc@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2023-08-31  Haochen Gui  <guihaoc@gcc.gnu.org>
+ 
+ 	PR target/96762
+ 	* gcc.target/powerpc/pr96762.c: New.
+ 
+ 2023-09-11  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	Backported from master:
+ 	2023-09-11  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	* gcc.target/i386/pr111306.c: New test.
+ 
+ 2023-08-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-08-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/110914
+ 	* gcc.c-torture/execute/pr110914.c: New test.
+ 
+ 2023-08-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-08-30  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/111015
+ 	* gcc.dg/pr111015.c: New test.
+ 
+ 2023-08-16  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	Backported from master:
+ 	2023-08-16  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	* gcc.target/i386/avx2-gather-2.c: Adjust options to keep
+ 	gather vectorization.
+ 	* gcc.target/i386/avx2-gather-6.c: Ditto.
+ 	* gcc.target/i386/avx512f-pr88464-1.c: Ditto.
+ 	* gcc.target/i386/avx512f-pr88464-5.c: Ditto.
+ 	* gcc.target/i386/avx512vl-pr88464-1.c: Ditto.
+ 	* gcc.target/i386/avx512vl-pr88464-11.c: Ditto.
+ 	* gcc.target/i386/avx512vl-pr88464-3.c: Ditto.
+ 	* gcc.target/i386/avx512vl-pr88464-9.c: Ditto.
+ 	* gcc.target/i386/pr88531-1b.c: Ditto.
+ 	* gcc.target/i386/pr88531-1c.c: Ditto.
+ 
+ 2023-08-15  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/110959
+ 	* gdc.dg/pr110959.d: New test.
+ 	* gdc.test/runnable/test23010.d: New test.
+ 
+ 2023-08-11  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/106310
+ 	* g++.dg/template/template-keyword4.C: New test.
+ 
+ 2023-08-11  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/106890
+ 	PR c++/109666
+ 	* g++.dg/cpp0x/nsdmi-array2.C: New test.
+ 	* g++.dg/cpp0x/nsdmi-template25.C: New test.
+ 
+ 2023-08-11  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/108099
+ 	* g++.dg/ext/int128-7.C: New test.
+ 	* g++.dg/ext/int128-8.C: New test.
+ 	* g++.dg/ext/unsigned-typedef2.C: New test.
+ 	* g++.dg/ext/unsigned-typedef3.C: New test.
+ 
+ 2023-08-07  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-05-09  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/109761
+ 	* g++.dg/cpp0x/noexcept78.C: New test.
+ 
+ 2023-08-06  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-12-19  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR fortran/107397
+ 	* gfortran.dg/pr107397.f90: Adjust expected diagnostic wording and
+ 	add space between dg-error string and closing }.
+ 
+ 2023-08-06  Steve Kargl  <kargl@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2022-12-18  Steve Kargl  <kargl@gcc.gnu.org>
+ 
+ 	PR fortran/107397
+ 	* gfortran.dg/pr107397.f90: New test.
+ 
+ 2023-08-01  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-07-26  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	PR target/110741
+ 	* g++.target/powerpc/pr110741.C: New test.
+ 
+ 2023-07-20  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2023-07-17  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/95947
+ 	PR fortran/110658
+ 	* gfortran.dg/deferred_character_37.f90: New test.
+ 
+ 2023-07-19  Maciej W. Rozycki  <macro@embecosm.com>
+ 
+ 	Backported from master:
+ 	2023-07-11  Maciej W. Rozycki  <macro@embecosm.com>
+ 
+ 	* gcc.dg/vect/pr97428.c: Limit to `vect_double' targets.
+ 
+ 2023-07-14  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	Backported from master:
+ 	2023-07-14  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/110206
+ 	* gcc.target/i386/pr110206.c: New test.
+ 
+ 2023-07-14  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2023-07-11  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/110288
+ 	* gfortran.dg/findloc_10.f90: New test.
+ 
+ 2023-07-13  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	Backported from master:
+ 	2023-07-13  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	PR target/106966
+ 	* gcc.target/alpha/pr106966.c: New test.
+ 
+ 2023-07-12  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-06-29  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/110468
+ 	* g++.dg/cpp0x/noexcept79.C: New test.
+ 
+ 2023-07-08  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2023-07-08  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/110585
+ 	* gfortran.dg/findloc_9.f90: New test.
+ 
+ 2023-07-07  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2023-07-07  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/108842
+ 	* gdc.dg/pr98277.d: Add more tests.
+ 	* gdc.dg/pr108842.d: New test.
+ 
+ 2023-07-05  Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-06-23   Michael Meissner  <meissner@linux.ibm.com>
+ 		    Aaron Sawdey   <acsawdey@linux.ibm.com>
+ 
+ 	PR target/105325
+ 	* g++.target/powerpc/pr105325.C: New test.
+ 	* gcc.target/powerpc/fusion-p10-ldcmpi.c: Update insn counts.
+ 
+ 2023-07-02  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2023-07-02  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/110516
+ 	* gdc.dg/torture/pr110516a.d: New test.
+ 	* gdc.dg/torture/pr110516b.d: New test.
+ 
+ 2023-07-01  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2023-07-01  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/110514
+ 	* gdc.dg/pr110514a.d: New test.
+ 	* gdc.dg/pr110514b.d: New test.
+ 	* gdc.dg/pr110514c.d: New test.
+ 	* gdc.dg/pr110514d.d: New test.
+ 
+ 2023-06-30  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gcc.c-torture/execute/20230630-1.c: New test.
+ 	* gcc.c-torture/execute/20230630-2.c: Likewise.
+ 	* gcc.c-torture/execute/20230630-3.c: Likewise
+ 	* gcc.c-torture/execute/20230630-4.c: Likewise
+ 
+ 2023-06-29  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	* gcc.target/i386/pr110309.c: New test.
+ 
+ 2023-06-29  Hongyu Wang  <hongyu.wang@intel.com>
+ 
+ 	Backported from master:
+ 	2023-06-26  Hongyu Wang  <hongyu.wang@intel.com>
+ 
+ 	* gcc.target/i386/mvc17.c: New test.
+ 
+ 2023-06-28  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	* gcc.target/i386/avx-vzeroupper-29.c: New testcase.
+ 	* gcc.target/i386/avx-vzeroupper-12.c: Adjust testcase.
+ 	* gcc.target/i386/avx-vzeroupper-7.c: Ditto.
+ 	* gcc.target/i386/avx-vzeroupper-9.c: Ditto.
+ 
+ 2023-06-27  Andrew Pinski  <apinski@marvell.com>
+ 
+ 	Backported from master:
+ 	2023-06-27  Andrew Pinski  <apinski@marvell.com>
+ 
+ 	PR middle-end/110420
+ 	PR middle-end/103979
+ 	PR middle-end/98619
+ 	* gcc.c-torture/compile/asmgoto-6.c: New test.
+ 
+ 2023-06-26  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2023-06-26  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/110359
+ 	* gdc.dg/pr110359.d: New test.
+ 
+ 2023-06-26  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2023-06-26  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/110113
+ 	* gdc.test/compilable/test23978.d: New test.
+ 
+ 2023-06-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-06-19  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/110298
+ 	* gcc.dg/torture/pr110298.c: New testcase.
+ 
+ 2023-06-22  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	Backported from master:
+ 	2023-06-07  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	PR target/110132
+ 	* lib/target-supports.exp (check_effective_target_aarch64_asm_FUNC_ok):
+ 	Extend to ls64.
+ 	* g++.target/aarch64/acle/acle.exp: New.
+ 	* g++.target/aarch64/acle/ls64.C: New test.
+ 	* g++.target/aarch64/acle/ls64_lto.C: New test.
+ 	* gcc.target/aarch64/acle/ls64_lto.c: New test.
+ 	* gcc.target/aarch64/acle/pr110132.c: New test.
+ 
+ 2023-06-22  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	Backported from master:
+ 	2023-06-07  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	PR target/110100
+ 	* gcc.target/aarch64/acle/pr110100.c: New test.
+ 
+ 2023-06-20  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-06-13  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	PR testsuite/110230
+ 	PR target/109932
+ 	* gcc.target/powerpc/pr109932-1.c: Adjust with int128 effective target.
+ 	* gcc.target/powerpc/pr109932-2.c: Ditto.
+ 
+ 2023-06-20  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-06-12  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	PR target/109932
+ 	* gcc.target/powerpc/pr109932-1.c: New test.
+ 	* gcc.target/powerpc/pr109932-2.c: New test.
+ 
+ 2023-06-20  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-06-12  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	PR target/110011
+ 	* gcc.target/powerpc/pr110011.c: New test.
+ 
+ 2023-06-15  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	Backported from master:
+ 	2023-03-07  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	* gcc.target/aarch64/shrink_wrap_1.c (dg-options): Add
+ 	-fno-stack-protector.
+ 	* gcc.target/aarch64/stack-check-cfa-1.c (dg-options): Add
+ 	-fno-stack-protector.
+ 	* gcc.target/aarch64/stack-check-cfa-2.c (dg-options): Add
+ 	-fno-stack-protector.
+ 	* gcc.target/aarch64/test_frame_17.c (dg-options): Add
+ 	-fno-stack-protector.
+ 
+ 2023-06-15  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	Backported from master:
+ 	2023-03-07  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	* gcc.target/aarch64/pr104005.c (dg-options): Add
+ 	-fno-stack-protector.
+ 
+ 2023-06-15  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	Backported from master:
+ 	2023-03-07  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	* gcc.target/aarch64/auto-init-7.c (dg-options): Add
+ 	-fno-stack-protector.
+ 
+ 2023-06-15  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	Backported from master:
+ 	2023-03-07  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	* gcc.target/aarch64/pr103147-10.c (dg-options): Add
+ 	-fno-stack-protector.
+ 	* g++.target/aarch64/pr103147-10.C: Likewise.
+ 
+ 2023-06-15  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	Backported from master:
+ 	2023-03-07  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	* gcc.target/aarch64/sve/pcs/aarch64-sve-pcs.exp (sve_flags):
+ 	Add -fno-stack-protector.
+ 
+ 2023-06-15  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	Backported from master:
+ 	2023-03-07  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	PR testsuite/70150
+ 	* gcc.target/aarch64/fuse_adrp_add_1.c (dg-options): Add
+ 	-fno-pie.
+ 
+ 2023-06-15  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	Backported from master:
+ 	2023-03-07  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	PR testsuite/70150
+ 	* gcc.dg/tls/pr78796.c (dg-additional-options): Add -fno-pie
+ 	-no-pie for aarch64-*-*.
+ 	* gcc.target/aarch64/pr63304_1.c (dg-options): Add -fno-pie.
+ 	* gcc.target/aarch64/pr70120-2.c (dg-options): Add -fno-pie.
+ 	* gcc.target/aarch64/pr78733.c (dg-options): Add -fno-pie.
+ 	* gcc.target/aarch64/pr79041-2.c (dg-options): Add -fno-pie.
+ 	* gcc.target/aarch64/pr94530.c (dg-options): Add -fno-pie.
+ 	* gcc.target/aarch64/pr94577.c (dg-options): Add -fno-pie.
+ 	* gcc.target/aarch64/reload-valid-spoff.c (dg-options): Add
+ 	-fno-pie.
+ 
+ 2023-06-15  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	Backported from master:
+ 	2023-03-07  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	PR testsuite/70150
+ 	* gcc.target/aarch64/aapcs64/aapcs64.exp (additional_flags):
+ 	Add -fno-pie -no-pie.
+ 
+ 2023-06-10  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/109650
+ 	Backport from 2023-05-10 master r14-1688.
+ 	* gcc.target/avr/torture/pr109650-1.c: New test.
+ 	* gcc.target/avr/torture/pr109650-2.c: New test.
+ 
+ 2023-06-09  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-06-02  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR target/110044
+ 	* gcc.target/powerpc/darwin-abi-13-0.c: New test.
+ 	* gcc.target/powerpc/darwin-abi-13-1.c: New test.
+ 	* gcc.target/powerpc/darwin-abi-13-2.c: New test.
+ 	* gcc.target/powerpc/darwin-structs-0.h: New test.
+ 
+ 2023-06-09  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	* gcc.target/i386/pr110108-2.c: New test.
+ 
+ 2023-06-08  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	Backported from master:
+ 	2023-05-25  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	PR target/109800
+ 	* gcc.target/arm/pure-code/pr109800.c: New test.
+ 
+ 2023-06-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	Backported from master:
+ 	2023-05-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	PR target/109939
+ 	* gcc.target/arm/pr109939.c: New test.
+ 
+ 2023-06-04  Steve Kargl  <kargl@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2023-06-02  Steve Kargl  <kargl@gcc.gnu.org>
+ 
+ 	PR fortran/100607
+ 	* gfortran.dg/select_rank_6.f90: New test.
+ 
+ 2023-05-30  Christophe Lyon  <christophe.lyon@linaro.org>
+ 
+ 	Backported from master:
+ 	2023-05-30  Christophe Lyon  <christophe.lyon@linaro.org>
+ 
+ 	* gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c:
+ 	Support both definitions of int32_t.
+ 
+ 2023-05-25  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/82931
+ 	* gcc.target/avr/pr82931.c: New test.
+ 
+ 2023-05-22   Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	PR target/70243
+ 	* gcc.target/powerpc/pr70243.c: New test.  Back port from master
+ 	04/10/2023 change.
+ 
+ 2023-05-22  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-05-21  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/109505
+ 	* gcc.target/aarch64/sve/pr109505.c: New test.
+ 
+ 2023-05-20  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2023-05-15  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/109846
+ 	* gfortran.dg/ptr-func-5.f90: New test.
+ 
+ 2023-05-20  Triffid Hunter  <triffid.hunter@gmail.com>
+ 
+ 	PR target/105753
+ 	Backport from 2023-05-20 https://gcc.gnu.org/r14-1016
+ 	* gcc.target/avr/torture/pr105753.c: New test.
+ 
+ 2023-05-19  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-05-15  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	* g++.dg/cpp23/feat-cxx2b.C: Test __cpp_auto_cast.
+ 
+ 2023-05-18  Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	* gcc.target/arm/acle/cde-mve-full-assembly.c: Drop blank
+ 	after tab after vmsr, and lower the case of P0.
+ 
+ 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/srshr.c: Update shift value.
+ 	* gcc.target/arm/mve/intrinsics/srshrl.c: Update shift value.
+ 	* gcc.target/arm/mve/intrinsics/uqshl.c: Update shift value.
+ 	* gcc.target/arm/mve/intrinsics/uqshll.c: Update shift value.
+ 	* gcc.target/arm/mve/intrinsics/urshr.c: Update shift value.
+ 	* gcc.target/arm/mve/intrinsics/urshrl.c: Update shift value.
+ 	* gcc.target/arm/mve/intrinsics/vadciq_m_s32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vadciq_m_u32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vadciq_s32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vadciq_u32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vadcq_m_s32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vadcq_m_u32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vadcq_s32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vadcq_u32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vsbciq_s32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vsbciq_u32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vsbcq_s32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vsbcq_u32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/mve_const_shifts.c: New test.
+ 
+ 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	PR target/109697
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: XFAIL check.
+ 	* gcc.target/arm/mve/pr108177-1.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-10.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-11.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-12.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-13.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-13-run.c: use mve_fp
+ 	* gcc.target/arm/mve/pr108177-14.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-14-run.c: use mve_fp
+ 	* gcc.target/arm/mve/pr108177-2.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-3.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-4.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-5.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-6.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-7.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-8.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-9.c: Relax registers.
+ 
+ 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vaddq_m.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vaddq_n.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u8.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vddupq_n_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vddupq_n_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vddupq_n_u8.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u8.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u8.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u8.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vidupq_n_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vidupq_n_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vidupq_n_u8.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u8.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u8.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_s64.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_u64.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_s64.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_u64.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_s64.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_u64.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_s64.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_u64.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_f16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_f16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_f16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_f16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_f32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_s32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_f32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_s32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_f32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_s32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_f32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_s32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset_p.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_p_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c: Removed.
+ 
+ 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c: Add testcases.
+ 	* gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c: Add testcases.
+ 
+ 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	Backported from master:
+ 	2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	* gcc.target/arm/mve/mve_vadcq_vsbcq_fpscr_overwrite.c: New.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/asrl.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/lsll.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/sqrshr.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/sqshl.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/sqshll.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/srshr.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/srshrl.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/uqrshl.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/uqrshll_sat48.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/uqshl.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/uqshll.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/urshr.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/urshrl.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vadciq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vadciq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vadciq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vadciq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vadcq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vadcq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vadcq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vadcq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vctp16q.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vctp16q_m.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vctp32q.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vctp32q_m.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vctp64q.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vctp64q_m.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vctp8q.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vctp8q_m.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmsq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmsq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavxq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovnbq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovnbq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovnbq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovnbq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovntq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovntq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovntq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovntq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpnot.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovntq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovntq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovntq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovntq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev16q_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev16q_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndaq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndaq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndmq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndmq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndnq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndnq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndpq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndpq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndxq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndxq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsbciq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsbciq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsbcq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsbcq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_r_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_r_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_r_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_r_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_r_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_r_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_f32.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_u32.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vld1q_f16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_z_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_z_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_z_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_z_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_z_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_z_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld4q_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld4q_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld4q_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld4q_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld4q_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld4q_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld4q_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld4q_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst2q_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst2q_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst2q_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst2q_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst2q_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst2q_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst2q_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst2q_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst4q_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst4q_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst4q_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst4q_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst4q_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst4q_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst4q_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst4q_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_u32.c: Likewise.
+ 
+ 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	Backported from master:
+ 	2023-04-06  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c: Remove unused variables.
+ 	* gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c: Remove unused variables.
+ 
+ 2023-05-18  Murray Steele  <murray.steele@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-18  Murray Steele  <murray.steele@arm.com>
+ 
+ 	* gcc.target/arm/mve/general/preserve_user_namespace_1.c: New test.
+ 
+ 2023-05-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-24  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	* gcc.target/arm/mve/pr108177-1-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-1.c: New test.
+ 	* gcc.target/arm/mve/pr108177-10-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-10.c: New test.
+ 	* gcc.target/arm/mve/pr108177-11-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-11.c: New test.
+ 	* gcc.target/arm/mve/pr108177-12-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-12.c: New test.
+ 	* gcc.target/arm/mve/pr108177-13-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-13.c: New test.
+ 	* gcc.target/arm/mve/pr108177-14-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-14.c: New test.
+ 	* gcc.target/arm/mve/pr108177-2-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-2.c: New test.
+ 	* gcc.target/arm/mve/pr108177-3-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-3.c: New test.
+ 	* gcc.target/arm/mve/pr108177-4-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-4.c: New test.
+ 	* gcc.target/arm/mve/pr108177-5-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-5.c: New test.
+ 	* gcc.target/arm/mve/pr108177-6-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-6.c: New test.
+ 	* gcc.target/arm/mve/pr108177-7-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-7.c: New test.
+ 	* gcc.target/arm/mve/pr108177-8-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-8.c: New test.
+ 	* gcc.target/arm/mve/pr108177-9-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-9.c: New test.
+ 	* gcc.target/arm/mve/pr108177-main.x: New test include.
+ 	* gcc.target/arm/mve/pr108177.x: New test include.
+ 
+ 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	Backported from master:
+ 	2023-04-04  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Tighten test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Tighten test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Tighten test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Tighten test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s64.c: Tighten test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s8.c: Tighten test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u16.c: Tighten test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u32.c: Tighten test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u64.c: Tighten test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u8.c: Tighten test.
+ 
+ 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-16  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+ 
+ 	PR target/96795
+ 	PR target/107515
+ 	* gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c: New test.
+ 	* gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c: New test.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c: Add missing extern
+ 	"C".
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vld2q_f16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vld2q_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld2q_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld2q_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld2q_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld2q_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld2q_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld2q_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqnegq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqnegq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqnegq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqabsq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqabsq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqabsq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_f16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_f16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vnegq_f16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_x_s8.c: Likewise.
+ 	* gcc.target/arm/simd/mve-vneg.c: Update test.
+ 	* gcc.target/arm/simd/mve-vshr.c: Likewise
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vclzq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_x_u8.c: Likewise.
+ 	* gcc.target/arm/simd/mve-vclz.c: Update test.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vclsq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks. Use extern
+ 	"C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vclsq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclsq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclsq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclsq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclsq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclsq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclsq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclsq_x_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-12-08  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_s16.c: Extern functions
+ 	as "C".
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmaq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmaq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_u8.c: Likewise.
+ 
+ 2023-05-18  Christophe Lyon  <christophe.lyon@arm.com>
+ 
+ 	Backported from master:
+ 	2022-09-30  Christophe Lyon  <christophe.lyon@arm.com>
+ 
+ 	* gcc.target/arm/mve/mve_load_memory_modes.c: Update expected
+ 	registers.
+ 	* gcc.target/arm/mve/mve_store_memory_modes.c: Likewise.
+ 
+ 2023-05-18  Christophe Lyon  <christophe.lyon@arm.com>
+ 
+ 	Backported from master:
+ 	2022-10-03  Christophe Lyon  <christophe.lyon@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_m_s16-clobber.c: New test.
+ 
+ 2023-05-18  Christophe Lyon  <christophe.lyon@arm.com>
+ 
+ 	Backported from master:
+ 	2022-12-01  Christophe Lyon  <christophe.lyon@arm.com>
+ 
+ 	* gcc.target/arm/simd/mve-compare-1.c: Update.
+ 	* gcc.target/arm/simd/mve-compare-scalar-1.c: Update.
+ 	* gcc.target/arm/simd/mve-vabs.c: Update.
+ 	* gcc.target/arm/simd/mve-vadd-1.c: Update.
+ 	* gcc.target/arm/simd/mve-vadd-scalar-1.c: Update.
+ 	* gcc.target/arm/simd/mve-vcmp.c: Update.
+ 	* gcc.target/arm/simd/pr101325.c: Update.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c: Improve tests.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_s16.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_s32.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_s8.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_u16.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_u32.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_u8.c:
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c:
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c:
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c:
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c: Improve tests.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Improve tests.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c: Improve tests.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c: Improve tests.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vsubq_f16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vmulq_f16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vabsq_f16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vabdq_f16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_s16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vminaq_m_s16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmaq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmaq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c: Improve tests.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c : Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c : Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_n_u16.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c : Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c:
+ 	Update test.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c:
+ 	Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c:
+ 	Likewise.
+ 
+ 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  <andrea.corallo@arm.com>
+ 
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u8.c: Likewise.
+ 
+ 2023-05-17  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-05-17  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/109868
+ 	* g++.dg/init/pr109868.C: New test.
+ 
+ 2023-05-15  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/109241
+ 	* g++.dg/cpp1y/lambda-generic-local-class2.C: New test.
+ 
+ 2023-05-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR testsuite/108776
+ 	* c-c++-common/rotate-11.c: Add --param logical-op-non-short-circuit=1.
+ 
+ 2023-05-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-05-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	* gcc.dg/vect/pr108950.c: Re-order dg-require-effective-target
+ 	and dg-do.
+ 
+ 2023-05-10  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2023-05-10  Richard Biener  <rguenther@suse.de>
+ 
+ 	* g++.dg/torture/pr106922.C: Force _GLIBCXX_USE_CXX11_ABI to 1.
+ 
+ 2023-05-09  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-04-01  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/109160
+ 	* g++.dg/cpp2a/concepts-placeholder12.C: New test.
+ 
+ 2023-05-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-05-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/109778
+ 	* gcc.dg/lto/pr109778_0.c: New test.
+ 	* gcc.dg/lto/pr109778_1.c: New file.
+ 
+ 2023-05-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-05-09  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/109778
+ 	* gcc.c-torture/execute/pr109778.c: New test.
+ 
+ 2023-05-09  Martin Uecker  <uecker@tugraz.at>
+ 
+ 	Backported from master:
+ 	2023-02-18  Martin Uecker  <uecker@tugraz.at>
+ 
+ 	PR c/105660
+ 	PR c/105660
+ 	* gcc.dg/pr105660-1.c: New test.
+ 	* gcc.dg/pr105660-2.c: New test.
+ 
+ 2023-05-09  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2023-04-26  Kewen Lin  <linkw@linux.ibm.com>
+ 
+ 	PR target/109069
+ 	* gcc.target/powerpc/pr109069-1.c: New test.
+ 	* gcc.target/powerpc/pr109069-2-run.c: New test.
+ 	* gcc.target/powerpc/pr109069-2.c: New test.
+ 	* gcc.target/powerpc/pr109069-2.h: New test.
+ 
+ 2023-05-09  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR c++/106740
+ 	PR c++/105852
+ 	* g++.dg/template/friend78.C: New test.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/testsuite/c-c++-common/Wattributes-3.c gcc-12.4.0/gcc/testsuite/c-c++-common/Wattributes-3.c
*** gcc-12.3.0/gcc/testsuite/c-c++-common/Wattributes-3.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/c-c++-common/Wattributes-3.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,13 ----
+ /* PR c++/113674 */
+ /* { dg-do compile { target { c || c++11 } } } */
+ /* { dg-options "" } */
+ 
+ [[____noreturn____]] int foo (int i)		/* { dg-warning "'__noreturn__' attribute (directive )?ignored" } */
+ {
+   return i;
+ }
+ 
+ [[____maybe_unused____]] int bar (int i)	/* { dg-warning "'__maybe_unused__' attribute (directive )?ignored" } */
+ {
+   return i;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/c-c++-common/rotate-11.c gcc-12.4.0/gcc/testsuite/c-c++-common/rotate-11.c
*** gcc-12.3.0/gcc/testsuite/c-c++-common/rotate-11.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/c-c++-common/rotate-11.c	Thu Jun 20 08:08:07 2024
***************
*** 1,6 ****
  /* PR tree-optimization/108440 */
  /* { dg-do compile { target { { ilp32 || lp64 } || llp64 } } } */
! /* { dg-options "-O2 -fdump-tree-optimized" } */
  /* { dg-final { scan-tree-dump-times " r<< " 5 "optimized" } } */
  /* { dg-final { scan-tree-dump-times " \\\& 7;" 4 "optimized" } } */
  
--- 1,6 ----
  /* PR tree-optimization/108440 */
  /* { dg-do compile { target { { ilp32 || lp64 } || llp64 } } } */
! /* { dg-options "-O2 -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */
  /* { dg-final { scan-tree-dump-times " r<< " 5 "optimized" } } */
  /* { dg-final { scan-tree-dump-times " \\\& 7;" 4 "optimized" } } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/c-c++-common/ubsan/Wno-attributes-1.c gcc-12.4.0/gcc/testsuite/c-c++-common/ubsan/Wno-attributes-1.c
*** gcc-12.3.0/gcc/testsuite/c-c++-common/ubsan/Wno-attributes-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/c-c++-common/ubsan/Wno-attributes-1.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,9 ----
+ /* PR c/112339 */
+ /* { dg-do compile { target { c++11 || c } } } */
+ /* { dg-options "-Wno-attributes=foo::no_sanitize -fsanitize=undefined" } */
+ /* { dg-additional-options "-std=c2x" { target c } } */
+ 
+ [[foo::no_sanitize("bounds")]] void
+ foo (void)
+ {
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/c-c++-common/ubsan/pr112727.c gcc-12.4.0/gcc/testsuite/c-c++-common/ubsan/pr112727.c
*** gcc-12.3.0/gcc/testsuite/c-c++-common/ubsan/pr112727.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/c-c++-common/ubsan/pr112727.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,17 ----
+ /* PR sanitizer/112727 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fsanitize=shift-exponent,bounds-strict -Wuninitialized" } */
+ 
+ #ifndef __cplusplus
+ #define bool _Bool
+ #endif
+ 
+ struct S { bool s[8]; };
+ 
+ void
+ foo (const struct S *x)
+ {
+   unsigned n = 0;
+   for (unsigned j = 0; j < 8; j++)
+     n |= ((!x->s[j]) ? 1 : 0) << (16 + j);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/conversion/ref10.C gcc-12.4.0/gcc/testsuite/g++.dg/conversion/ref10.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/conversion/ref10.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/conversion/ref10.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,5 ----
+ // PR c++/114561
+ 
+ void create(void* u) {
+   const void* const& r = ( (void)0, u );
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/conversion/ref11.C gcc-12.4.0/gcc/testsuite/g++.dg/conversion/ref11.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/conversion/ref11.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/conversion/ref11.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,33 ----
+ // PR c++/114562
+ // { dg-do compile { target c++11 } }
+ 
+ template <typename T>
+ struct Optional {
+   Optional(T&&);
+ };
+ 
+ struct MyClass {
+   MyClass(Optional<const void*>);
+ };
+ 
+ // const void* NONE = nullptr; // Correct Error
+ void* NONE = nullptr; // Crash
+ 
+ void beforeParam();
+ 
+ template<typename T>
+ struct Create {
+   template <typename U> static T create(U &&) noexcept;
+ };
+ 
+ 
+ template <typename T>
+ template<typename U>
+ T Create<T>::create(U && u) noexcept {
+   return T( ( (beforeParam()), (u) ) ); // { dg-error "cannot bind rvalue reference" }
+   // return T( (u) ); // Correct Error
+ }
+ 
+ void test_func() {
+   Create<MyClass>::create(NONE);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/initlist-array21.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/initlist-array21.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/initlist-array21.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/initlist-array21.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,12 ----
+ // PR c++/109899
+ // { dg-do compile { target c++11 } }
+ 
+ struct A { A(); ~A(); };
+ 
+ template<class T>
+ using array = T[42];
+ 
+ template<class T>
+ void f() {
+   array<A>{};
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/initlist-array22.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/initlist-array22.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/initlist-array22.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/initlist-array22.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,12 ----
+ // PR c++/111286
+ // { dg-do compile { target c++11 } }
+ // { dg-additional-options -Wno-unused }
+ 
+ struct A {
+   A() noexcept {}
+ };
+ 
+ void foo() {
+   using T = const A (&)[1];
+   T{};
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/initlist-pmf2.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/initlist-pmf2.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/initlist-pmf2.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/initlist-pmf2.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,12 ----
+ // PR c++/113598
+ // { dg-additional-options -Wno-c++11-extensions }
+ 
+ struct Cpu
+ {
+   int op_nop();
+ };
+ typedef int(Cpu::*OpCode)();
+ void f()
+ {
+   new OpCode[256]{&Cpu::op_nop};
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const11a.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const11a.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const11a.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const11a.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,21 ----
+ // PR c++/108975
+ // A version of lambda-const11.C using a generic lambda.
+ // { dg-do compile { target c++14 } }
+ 
+ template<int> void g();
+ template<int> struct A { };
+ 
+ template<class T>
+ void f() {
+   constexpr int dim = 1;
+   auto l = [&](auto) {
+     int n[dim * 1];
+     using ty1 = decltype(g<dim * 2>());
+     using ty2 = A<dim * 3>;
+   };
+   l(0);
+   // In f<int>, we shouldn't actually capture dim.
+   static_assert (sizeof(l) == 1, "");
+ }
+ 
+ template void f<int>();
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/noexcept78.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/noexcept78.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/noexcept78.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/noexcept78.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,16 ----
+ // PR c++/109761
+ // { dg-do compile { target c++11 } }
+ 
+ struct base {
+   virtual void foo() noexcept { }
+   virtual ~base() { }
+ };
+ 
+ struct outer : base {
+   struct nested {
+     void foo() noexcept(noexcept(g())); // { dg-bogus "looser" }
+     ~nested() noexcept(noexcept(g()));  // { dg-bogus "looser" }
+   };
+   static void g();
+ };
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/noexcept79.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/noexcept79.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/noexcept79.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/noexcept79.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,18 ----
+ // PR c++/110468
+ // { dg-do compile { target c++11 } }
+ 
+ template<int T>
+ struct variant {
+   variant() noexcept(T > 0);
+ };
+ 
+ template<int N>
+ struct A {
+   variant<N> m = {};
+ };
+ 
+ struct B {
+   B(A<1>);
+ };
+ 
+ B b = {{}};
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/nsdmi-array2.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/nsdmi-array2.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/nsdmi-array2.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/nsdmi-array2.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,15 ----
+ // PR c++/109666
+ // { dg-do compile { target c++11 } }
+ 
+ struct Point {
+   int value_;
+ };
+ template <int n> struct StaticVector {
+   static StaticVector create() {
+     StaticVector output;
+     return output;
+   }
+   Point _M_elems[n]{};
+ 
+ };
+ void f() { StaticVector<3>::create(); }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/nsdmi-template25.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/nsdmi-template25.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/nsdmi-template25.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/nsdmi-template25.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,18 ----
+ // PR c++/106890
+ // { dg-do compile { target c++11 } }
+ 
+ struct A
+ {
+   int p;
+ };
+ 
+ template<typename T>
+ struct B : virtual public A
+ {
+   B() { }
+   B(int) { }
+ 
+   int k = this->p;
+ };
+ 
+ template struct B<int>;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp1y/lambda-generic-local-class2.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp1y/lambda-generic-local-class2.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp1y/lambda-generic-local-class2.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp1y/lambda-generic-local-class2.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,13 ----
+ // PR c++/109241
+ // { dg-do compile { target c++14 } }
+ // { dg-options "" } no pedantic
+ 
+ void g() {
+   [](auto) {
+     [](auto) {
+       ({
+         struct A {};
+       });
+     };
+   }(1);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp1z/array-prvalue2.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp1z/array-prvalue2.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp1z/array-prvalue2.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp1z/array-prvalue2.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,5 ----
+ // PR c++/103185
+ // { dg-do compile { target c++11 } }
+ 
+ using intarr = int[];
+ static_assert(__is_same(decltype(0[intarr{0}]), int&&), "");
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp1z/eval-order3.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp1z/eval-order3.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp1z/eval-order3.C	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp1z/eval-order3.C	Thu Jun 20 08:08:07 2024
*************** void g()
*** 166,171 ****
--- 166,176 ----
    ip(24)[f(25)-25] = 0;
    last=0;
  
+   // even with swapped operands
+   (f(20)-20)[afn(21)].memfn(f(22),23);
+   (f(24)-24)[ip(25)] = 0;
+   last=0;
+ 
    // a << b
    aref(24) << f(25);
    iref(26) << f(27);
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp23/feat-cxx2b.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp23/feat-cxx2b.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp23/feat-cxx2b.C	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp23/feat-cxx2b.C	Thu Jun 20 08:08:07 2024
***************
*** 557,559 ****
--- 557,565 ----
  #elif __cpp_multidimensional_subscript != 202110
  #  error "__cpp_multidimensional_subscript != 202110"
  #endif
+ 
+ #ifndef __cpp_auto_cast
+ #  error "__cpp_auto_cast"
+ #elif __cpp_auto_cast != 202110
+ #  error "__cpp_auto_cast != 202110"
+ #endif
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/bit-cast16.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/bit-cast16.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/bit-cast16.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/bit-cast16.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,16 ----
+ // PR c++/114537
+ // { dg-do compile { target c++20 } }
+ 
+ namespace std {
+ template<typename T, typename F>
+ constexpr T
+ bit_cast (const F& f) noexcept
+ {
+   return __builtin_bit_cast (T, f);
+ }
+ }
+ 
+ struct A { signed char b : 1 = 0; signed char c : 7 = 0; };
+ struct D { unsigned char e; };
+ constexpr unsigned char f = std::bit_cast<D> (A{}).e;
+ static_assert (f == 0);
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-fn8.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-fn8.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-fn8.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-fn8.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,26 ----
+ // PR c++/111703
+ // { dg-do compile { target c++20 } }
+ 
+ template<class T>
+ constexpr bool always_true() { return true; }
+ 
+ struct P {
+   P() = default;
+ 
+   template<class T>
+     requires (always_true<T>()) // { dg-bogus "used before its definition" }
+   constexpr P(const T&) { }
+ 
+   int n, m;
+ };
+ 
+ void (*f)(P);
+ P (*h)(P);
+ 
+ template<class T>
+ constexpr bool g() {
+   P x;
+   f(x); // { dg-bogus "from here" }
+   f(h(x)); // { dg-bogus "from here" }
+   return true;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-placeholder12.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-placeholder12.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-placeholder12.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-placeholder12.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,29 ----
+ // PR c++/109160
+ // { dg-do compile { target c++20 } }
+ 
+ template<class T, bool B>
+ concept C = B;
+ 
+ template<int> struct X { };
+ 
+ template<bool B>
+ struct A {
+   template<C<B> auto V> static void f();
+   template<C<B> auto V> static void g(X<V>);
+   template<C<B> auto V> static inline int value;
+   template<C<B> auto V> struct D { };
+ };
+ 
+ int main() {
+   A<true>::f<0>();
+   A<false>::f<0>(); // { dg-error "no match|constraints" }
+ 
+   A<true>::g(X<0>{});
+   A<false>::g(X<0>{}); // { dg-error "no match|constraints" }
+ 
+   bool v1 = A<true>::value<0>;
+   bool v2 = A<false>::value<0>;  // { dg-error "constraints" }
+ 
+   A<true>::D<0> d1;
+   A<false>::D<0> d2; // { dg-error "constraints" }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-throw1.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-throw1.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-throw1.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-throw1.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,8 ----
+ // PR c++/112437
+ // { dg-do compile { target c++20 } }
+ 
+ struct S {};
+ template <class T>
+ concept Throwable = requires(T x) { throw x; };
+ 
+ bool a = Throwable<S>;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-ttp5.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-ttp5.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-ttp5.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-ttp5.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,24 ----
+ // PR c++/111485
+ // { dg-do compile { target c++20 } }
+ 
+ template<class T> constexpr bool always_true = true;
+ 
+ template<class T> concept C = always_true<T>;
+ template<class T> concept D = C<T> || true;
+ 
+ template<template<C> class TT> struct example;
+ template<template<D> class UU> using example_t = example<UU>;
+ 
+ template<class T>
+ struct A {
+   template<template<C> class TT> struct example;
+ 
+   template<template<D> class UU> using example_t = example<UU>;
+ 
+   template<class U>
+   struct B {
+     template<template<D> class UU> using example_t = example<UU>;
+   };
+ };
+ 
+ template struct A<int>::B<int>;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-ttp6.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-ttp6.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-ttp6.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-ttp6.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,17 ----
+ // PR c++/111485
+ // { dg-do compile { target c++20 } }
+ 
+ template<class T, bool V> constexpr bool always_true = true;
+ 
+ template<class T, bool V> concept C = always_true<T, V>;
+ 
+ template<bool V, template<class T> requires C<T, V> class TT>
+ void f();
+ 
+ template<class T> requires C<T, true>
+ struct A;
+ 
+ int main() {
+   f<true, A>();
+   f<false, A>(); // { dg-error "no match|constraint mismatch" }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated15.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated15.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated15.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated15.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,28 ----
+ // PR c++/114580
+ // { dg-do compile { target c++17 } }
+ // { dg-options "-Wtautological-compare" }
+ 
+ namespace std {
+   constexpr inline bool
+   is_constant_evaluated () noexcept
+   {
+ #if __cpp_if_consteval >= 202106L
+     if consteval { return true; } else { return false; }
+ #else
+     return __builtin_is_constant_evaluated ();
+ #endif
+   }
+ }
+ 
+ template <typename T>
+ void foo ()
+ {
+   if constexpr ((T) std::is_constant_evaluated ())	// { dg-warning "'std::is_constant_evaluated' always evaluates to true in 'if constexpr'" }
+     ;							// { dg-bogus "'std::is_constant_evaluated' always evaluates to false in a non-'constexpr' function" }
+ }
+ 
+ void
+ bar ()
+ {
+   foo <bool> ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/spaceship-eq16.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/spaceship-eq16.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/spaceship-eq16.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/spaceship-eq16.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,11 ----
+ // PR c++/110084
+ // { dg-do compile { target c++20 } }
+ 
+ template <class T>
+ class BadTuple {
+   constexpr bool operator==(const BadTuple&) const;
+ };
+ template<class T>
+ constexpr bool BadTuple<T>::operator==(const BadTuple<T>&) const = default;
+ 
+ BadTuple<int> a;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/spaceship-eq17.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/spaceship-eq17.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/spaceship-eq17.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/spaceship-eq17.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,5 ----
+ // PR c++/107291
+ // { dg-do compile { target c++20 } }
+ 
+ struct S4;					   // { dg-message "declared here" }
+ bool operator==(S4 const &, S4 const &) = default; // { dg-error "not a friend" }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg3.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg3.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg3.C	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg3.C	Thu Jun 20 08:08:07 2024
*************** template<auto V>
*** 5,11 ****
  struct A {};
  
  struct B {
!     constexpr auto operator<=>(const B&) const = default; // { dg-error "" }
      int value;
  };
  
--- 5,11 ----
  struct A {};
  
  struct B {
!     constexpr auto operator<=>(const B&) const = default; // { dg-error "strong_ordering" }
      int value;
  };
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/debug/dwarf2/pr85550.C gcc-12.4.0/gcc/testsuite/g++.dg/debug/dwarf2/pr85550.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/debug/dwarf2/pr85550.C	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/g++.dg/debug/dwarf2/pr85550.C	Thu Jun 20 08:08:07 2024
***************
*** 2,7 ****
--- 2,8 ----
  // { dg-do link }
  // { dg-options "-O2 -g -fdebug-types-section" }
  // { dg-skip-if "AIX DWARF5" { powerpc-ibm-aix* } }
+ // { dg-skip-if "No debug linker support" { *-*-darwin* } }
  
  struct A {
    int bar () const { return 0; }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/debug/pr110295.C gcc-12.4.0/gcc/testsuite/g++.dg/debug/pr110295.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/debug/pr110295.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/debug/pr110295.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,19 ----
+ // { dg-do compile }
+ // { dg-options "-g" }
+ 
+ template <typename T>
+ struct QCachedT
+ {
+   void operator delete(void *, T *) {}
+ };
+ template<int a>
+ void exercise()
+ {
+   struct thing_t
+     : QCachedT<thing_t>
+   {
+   };
+   thing_t *list[1];
+   new thing_t; // { dg-warning "" }
+ }
+ int main() { exercise<1>(); }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/diagnostic/constexpr4.C gcc-12.4.0/gcc/testsuite/g++.dg/diagnostic/constexpr4.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/diagnostic/constexpr4.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/diagnostic/constexpr4.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,9 ----
+ // Verify we diagnose a call to a non-constant function pointer ahead of time.
+ // { dg-do compile { target c++11 } }
+ 
+ bool (*f)(int);
+ 
+ template<int N>
+ void g() {
+   static_assert(f(N), ""); // { dg-error "non-constant|'f' is not usable" }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/eh/return1.C gcc-12.4.0/gcc/testsuite/g++.dg/eh/return1.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/eh/return1.C	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/g++.dg/eh/return1.C	Thu Jun 20 08:08:07 2024
*************** extern "C" int printf (const char *, ...
*** 16,28 ****
  
  struct X
  {
!   X(bool throws) : throws_(throws) { ++c; DEBUG; }
!   X(const X& x); // not defined
    ~X() THROWS
    {
!     ++d; DEBUG;
      if (throws_) { throw 1; }
    }
  private:
    bool throws_;
  };
--- 16,29 ----
  
  struct X
  {
!   X(bool throws) : i(-42), throws_(throws) { ++c; DEBUG; }
!   X(const X& x): i(x.i), throws_(x.throws_) { ++c; DEBUG; }
    ~X() THROWS
    {
!     i = ++d; DEBUG;
      if (throws_) { throw 1; }
    }
+   int i;
  private:
    bool throws_;
  };
*************** X f()
*** 33,38 ****
--- 34,46 ----
    return X(false);
  }
  
+ X f2()
+ {
+  foo:
+   X x(true);
+   return X(false);
+ }
+ 
  X g()
  {
    return X(true),X(false);
*************** X i()
*** 54,59 ****
--- 62,146 ----
    return X(false);
  }
  
+ X i2()
+ {
+   try {
+   foo:
+     X x(true);
+     return X(false);
+   } catch(...) {}
+   return X(false);
+ }
+ 
+ // c++/112301
+ X i3()
+ {
+   try {
+     X x(true);
+     return X(false);
+   } catch(...) { throw; }
+ }
+ 
+ X i4()
+ {
+   try {
+     X x(true);
+     X x2(false);
+     return x2;
+   } catch(...) { throw; }
+ }
+ 
+ X i4a()
+ {
+   try {
+     X x2(false);
+     X x(true);
+     return x2;
+   } catch(...) { throw; }
+ }
+ 
+ X i4b()
+ {
+   X x(true);
+   X x2(false);
+   return x2;
+ }
+ 
+ X i4c()
+ {
+   X x2(false);
+   X x(true);
+   return x2;
+ }
+ 
+ X i5()
+ {
+   X x2(false);
+ 
+   try {
+     X x(true);
+     return x2;
+   } catch(...) {
+     if (x2.i != -42)
+       d += 42;
+     throw;
+   }
+ }
+ 
+ X i6()
+ {
+   X x2(false);
+ 
+   try {
+     X x(true);
+     return x2;
+   } catch(...) {
+     if (x2.i != -42)
+       d += 42;
+   }
+   return x2;
+ }
+ 
  X j()
  {
    try {
*************** int main()
*** 84,89 ****
--- 171,178 ----
    try { f(); }
    catch (...) {}
  
+   try { f2(); } catch (...) {}
+ 
    try { g(); }
    catch (...) {}
  
*************** int main()
*** 93,98 ****
--- 182,196 ----
    try { i(); }
    catch (...) {}
  
+   try { i2(); } catch (...) {}
+   try { i3(); } catch (...) {}
+   try { i4(); } catch (...) {}
+   try { i4a(); } catch (...) {}
+   try { i4b(); } catch (...) {}
+   try { i4c(); } catch (...) {}
+   try { i5(); } catch (...) {}
+   try { i6(); } catch (...) {}
+ 
    try { j(); } catch (...) {}
  
    try { k<X>(); } catch (...) {}
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/eh/return2.C gcc-12.4.0/gcc/testsuite/g++.dg/eh/return2.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/eh/return2.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/eh/return2.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,26 ----
+ // PR c++/113088
+ 
+ #if __cplusplus >= 201103L
+ #define THROWS noexcept(false)
+ #else
+ #define THROWS
+ #endif
+ 
+ struct X {
+   ~X() {}
+ };
+ 
+ struct Y {
+   ~Y() THROWS {}
+ };
+ 
+ X foo() {
+   try {
+     return X();
+   } catch (...) {
+     Y();
+     return X();
+   }
+ 
+   try { } catch (...) { }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/eh/return3.C gcc-12.4.0/gcc/testsuite/g++.dg/eh/return3.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/eh/return3.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/eh/return3.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,17 ----
+ // PR c++/113347
+ 
+ #if __cplusplus < 201103L
+ #define THROWS
+ #else
+ #define THROWS noexcept(false)
+ #endif
+ 
+ struct A { ~A(); };
+ struct B { ~B() THROWS; };
+ 
+ A f()
+ {
+   A a;
+   return a;
+   B();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/eh/throw4.C gcc-12.4.0/gcc/testsuite/g++.dg/eh/throw4.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/eh/throw4.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/eh/throw4.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,13 ----
+ // PR c++/112437
+ // { dg-do compile }
+ 
+ struct S {};
+ 
+ S
+ foo (S s)
+ try {
+   throw s;
+ }
+ catch (...) {
+   throw s;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/attrib68.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/attrib68.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/attrib68.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/attrib68.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,8 ----
+ // PR c++/114634
+ // { dg-do compile }
+ 
+ template <int N>
+ struct A
+ {
+   enum { e __attribute__ ((aligned (16))) };	// { dg-error "alignment may not be specified for 'e'" }
+ };
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/frounding-math1.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/frounding-math1.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/frounding-math1.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/frounding-math1.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,8 ----
+ // PR c++/109359
+ // { dg-additional-options -frounding-math }
+ 
+ // For a while we were emitting two doubles (4 .long directives) as the value
+ // of a float array; it should only be two .longs.
+ 
+ // { dg-final { scan-assembler-times "long" 2 { target x86_64-*-* } } }
+ float xs[] = {0.001914, 0.630539};
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/int128-7.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/int128-7.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/int128-7.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/int128-7.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,4 ----
+ // PR c++/108099
+ // { dg-do compile { target { c++11 && int128 } } }
+ 
+ using i128 = signed __int128_t;	// { dg-error "specified with" }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/int128-8.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/int128-8.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/int128-8.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/int128-8.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,24 ----
+ // PR c++/108099
+ // { dg-do compile { target { c++11 && int128 } } }
+ // { dg-options "" }
+ 
+ using u128 = unsigned __int128_t;
+ using s128 = signed __int128_t;
+ template <typename T, T v> struct integral_constant {
+   static constexpr T value = v;
+ };
+ typedef integral_constant <bool, false> false_type;
+ typedef integral_constant <bool, true> true_type;
+ template <class T, class U>
+ struct is_same : false_type {};
+ template <class T>
+ struct is_same <T, T> : true_type {};
+ static_assert (is_same <__int128, s128>::value, "");
+ static_assert (is_same <signed __int128, s128>::value, "");
+ static_assert (is_same <__int128_t, s128>::value, "");
+ static_assert (is_same <unsigned __int128, u128>::value, "");
+ static_assert (is_same <__uint128_t, u128>::value, "");
+ static_assert (sizeof (s128) == sizeof (__int128), "");
+ static_assert (sizeof (u128) == sizeof (unsigned __int128), "");
+ static_assert (s128(-1) < 0, "");
+ static_assert (u128(-1) > 0, "");
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/is_constructible8.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/is_constructible8.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/is_constructible8.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/is_constructible8.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,16 ----
+ // PR c++/100667
+ // { dg-do compile { target c++11 } }
+ 
+ struct T;
+ 
+ #define SA(X) static_assert ((X), #X);
+ 
+ SA (__is_constructible(T&&, T));
+ SA (__is_constructible(const T&, T));
+ SA (!__is_constructible(T&, T));
+ SA (__is_nothrow_constructible(T&&, T));
+ SA (__is_nothrow_constructible(const T&, T));
+ SA (!__is_nothrow_constructible(T&, T));
+ SA (__is_trivially_constructible(T&&, T));
+ SA (__is_trivially_constructible(const T&, T));
+ SA (!__is_trivially_constructible(T&, T));
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/pr114691.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/pr114691.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/pr114691.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/pr114691.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,22 ----
+ // PR c++/114691
+ // { dg-do compile }
+ // { dg-options "-O2 -Wall" }
+ 
+ void qux (int);
+ int foo (int);
+ 
+ void
+ bar (int x)
+ {
+   #pragma GCC ivdep
+   while (int y = foo (x))	// { dg-bogus "ignoring loop annotation" }
+     qux (y);
+ }
+ 
+ void
+ baz (int x)
+ {
+   #pragma GCC ivdep
+   for (; int y = foo (x); )	// { dg-bogus "ignoring loop annotation" }
+     qux (y);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/unroll-4.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/unroll-4.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/unroll-4.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/unroll-4.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,16 ----
+ // PR c++/111529
+ // { dg-do compile { target c++11 } }
+ // { dg-additional-options -Wno-c++20-extensions }
+ 
+ template <int>
+ void f() {
+   []<int>() {
+     #pragma GCC unroll 9
+     for (int i = 1; i; --i) {
+     }
+   };
+ }
+ 
+ int main() {
+   f<0>();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/unroll-5.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/unroll-5.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/unroll-5.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/unroll-5.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,23 ----
+ // PR c++/112795
+ // { dg-do compile { target c++11 } }
+ // { dg-options "-O2 -fdump-tree-cunrolli-details" }
+ 
+ void baz (int);
+ constexpr int n = 3;
+ 
+ template <int N>
+ void
+ foo ()
+ {
+ #pragma GCC unroll(n)
+   for (int i = 0; i != n; ++i)
+     baz (i);
+ }
+ 
+ void
+ qux ()
+ {
+   foo <2> ();
+ }
+ 
+ // { dg-final { scan-tree-dump "loop with 3 iterations completely unrolled" "cunrolli" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/unsigned-typedef2.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/unsigned-typedef2.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/unsigned-typedef2.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/unsigned-typedef2.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,25 ----
+ // PR c++/108099
+ // { dg-do compile { target c++11 } }
+ // { dg-options "" }
+ 
+ typedef long long t64;
+ template <typename T, T v> struct integral_constant {
+   static constexpr T value = v;
+ };
+ typedef integral_constant <bool, false> false_type;
+ typedef integral_constant <bool, true> true_type;
+ template <class T, class U>
+ struct is_same : false_type {};
+ template <class T>
+ struct is_same <T, T> : true_type {};
+ 
+ using s64 = signed t64;
+ static_assert (is_same <long long, s64>::value, "");
+ static_assert (is_same <signed long long, s64>::value, "");
+ static_assert (sizeof (s64) == sizeof (long long), "");
+ static_assert (s64(-1) < 0, "");
+ 
+ using u64 = unsigned t64;
+ static_assert (is_same <unsigned long long, u64>::value, "");
+ static_assert (sizeof (u64) == sizeof (unsigned long long), "");
+ static_assert (u64(-1) > 0, "");
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/unsigned-typedef3.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/unsigned-typedef3.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/unsigned-typedef3.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/unsigned-typedef3.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,25 ----
+ // PR c++/108099
+ // { dg-do compile { target c++11 } }
+ // { dg-options "" }
+ 
+ typedef unsigned long long t64;
+ template <typename T, T v> struct integral_constant {
+   static constexpr T value = v;
+ };
+ typedef integral_constant <bool, false> false_type;
+ typedef integral_constant <bool, true> true_type;
+ template <class T, class U>
+ struct is_same : false_type {};
+ template <class T>
+ struct is_same <T, T> : true_type {};
+ 
+ using s64 = signed t64;
+ static_assert (is_same <long long, s64>::value, "");
+ static_assert (is_same <signed long long, s64>::value, "");
+ static_assert (sizeof (s64) == sizeof (long long), "");
+ static_assert (s64(-1) < 0, "");
+ 
+ using u64 = unsigned t64;
+ static_assert (is_same <unsigned long long, u64>::value, "");
+ static_assert (sizeof (u64) == sizeof (unsigned long long), "");
+ static_assert (u64(-1) > 0, "");
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/gcov/gcov-dump-1.C gcc-12.4.0/gcc/testsuite/g++.dg/gcov/gcov-dump-1.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/gcov/gcov-dump-1.C	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/g++.dg/gcov/gcov-dump-1.C	Thu Jun 20 08:08:07 2024
***************
*** 1,4 ****
! /* { dg-options "-fprofile-generate -ftest-coverage -lgcov" } */
  /* { dg-do run { target native } } */
  
  int value;
--- 1,4 ----
! /* { dg-options "-fprofile-generate -ftest-coverage " } */
  /* { dg-do run { target native } } */
  
  int value;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/gcov/gcov-dump-2.C gcc-12.4.0/gcc/testsuite/g++.dg/gcov/gcov-dump-2.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/gcov/gcov-dump-2.C	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/g++.dg/gcov/gcov-dump-2.C	Thu Jun 20 08:08:07 2024
***************
*** 1,4 ****
! /* { dg-options "-fprofile-generate -ftest-coverage -lgcov" } */
  /* { dg-do run { target native } } */
  
  int value;
--- 1,4 ----
! /* { dg-options "-fprofile-generate -ftest-coverage " } */
  /* { dg-do run { target native } } */
  
  int value;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/init/pr109868.C gcc-12.4.0/gcc/testsuite/g++.dg/init/pr109868.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/init/pr109868.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/init/pr109868.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,13 ----
+ // PR c++/109868
+ // { dg-do compile }
+ // { dg-options "-O2" }
+ 
+ struct A { virtual void foo (); };
+ struct B { long b; int : 0; };
+ struct C : A { B c; };
+ 
+ void
+ bar (C *p)
+ {
+   *p = C ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ipa/pr113757.C gcc-12.4.0/gcc/testsuite/g++.dg/ipa/pr113757.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ipa/pr113757.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ipa/pr113757.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,14 ----
+ // { dg-do compile }
+ // { dg-options "-O2 -fPIC" }
+ // { dg-require-effective-target fpic }
+ 
+ long size();
+ struct ll {  virtual int hh();  };
+ ll  *slice_owner;
+ int ll::hh() { __builtin_exit(0); }
+ int nn() {
+   if (size())
+     return 0;
+   return slice_owner->hh();
+ }
+ int (*a)() = nn;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/opt/nrv22.C gcc-12.4.0/gcc/testsuite/g++.dg/opt/nrv22.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/opt/nrv22.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/opt/nrv22.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,30 ----
+ // PR c++/92407
+ // { dg-do run }
+ 
+ struct A
+ {
+   A () { a++; }
+   A (const A &) { a++; }
+   ~A () { a--; }
+   static int a;
+ };
+ int A::a = 0;
+ 
+ A
+ foo ()
+ {
+   int cnt = 10;
+ lab:
+   A a;
+   if (cnt--)
+     goto lab;
+   return a;
+ }
+ 
+ int
+ main ()
+ {
+   foo ();
+   if (A::a)
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/opt/pr110515.C gcc-12.4.0/gcc/testsuite/g++.dg/opt/pr110515.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/opt/pr110515.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/opt/pr110515.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,223 ----
+ // { dg-do run }
+ // { dg-require-effective-target c++11 }
+ // { dg-options "-O2" }
+ 
+ typedef __UINT64_TYPE__ u64;
+ 
+ struct SmallDenseMap {
+   static constexpr u64 EmptyKey = 0xC0FFEUL;
+   struct V { u64 v; };
+ 
+   bool contains(u64 Val) {
+     V *TheSlot = nullptr;
+     return (LookupSlotFor(Val, TheSlot) ? 1 : 0);
+   }
+ 
+   void try_emplace(u64 Key) {
+     V *TheSlot = nullptr;
+     if (LookupSlotFor(Key, TheSlot))
+       return;
+ 
+     // Otherwise, insert the new element.
+     InsertIntoSlot(TheSlot, Key);
+   }
+ 
+   void moveFromOldSlots(V *OldSlotsBegin, V *OldSlotsEnd) {
+     Size = 0;
+ 
+     V *B_ = u.o.Slots;
+     V *E_ = B_ + u.o.Capacity;
+     for (; B_ != E_; ++B_)
+       B_->v = EmptyKey;
+ 
+     // Insert all the old elements.
+     V *O = OldSlotsBegin;
+     V *E = OldSlotsEnd;
+     for (; O != E; ++O) {
+       if (O->v != EmptyKey) {
+         // Insert the key/value into the new table.
+         V * N = nullptr;
+         LookupSlotFor(O->v, N);
+         N->v = O->v;
+         Size++;
+       }
+     }
+   }
+ 
+   void InsertIntoSlot(V *TheSlot, u64 Key) {
+     unsigned NewSize = Size + 1;
+     unsigned Capacity = getCapacity();
+     // Make sure we always keep at least one Empty value
+     if (NewSize >= Capacity) {
+       //fprintf(stderr, "GROW: size=%u capacity=%u -> ...\n", Size, Capacity);
+       grow();
+       LookupSlotFor(Key, TheSlot);
+       Capacity = getCapacity();
+       //fprintf(stderr, "GROW: ... -> size=%u capacity=%u\n", NewSize, Capacity);
+     }
+ 
+     Size++;
+ 
+     TheSlot->v = Key;
+   }
+ 
+   bool LookupSlotFor(u64 Val,
+                        V *&FoundSlot) {
+     V *SlotsPtr = getSlots();
+     const unsigned Capacity = getCapacity();
+ 
+     for (unsigned i = 0; i < Capacity; ++i) {
+       V *ThisSlot = SlotsPtr + i;
+       if (Val == ThisSlot->v) {
+         FoundSlot = ThisSlot;
+         return true;
+       }
+ 
+       if (ThisSlot->v == EmptyKey) {
+         FoundSlot = ThisSlot;
+         return false;
+       }
+     }
+     // Guarantee that within an array there is a match
+     // or Empty value where to insert a new vaue.
+     __builtin_trap();
+   }
+ 
+   // Needs to bea at least 1 to hld one empty value
+   static constexpr unsigned InlineSlots = 2;
+ 
+   bool Small;
+   unsigned Size;
+ 
+   struct LargeRep {
+     V *Slots;
+     unsigned Capacity;
+   };
+ 
+   union {
+       V i[InlineSlots]; // Small = true
+       LargeRep o;       // Small = false
+   } u;
+ 
+   explicit SmallDenseMap() : Small(true), Size(0) {
+     Size = 0;
+ 
+     V *B = u.i;
+     V *E = B + InlineSlots;
+     for (; B != E; ++B)
+       B->v = EmptyKey;
+   }
+ 
+   void grow() {
+     // assert:
+     if (!Small) __builtin_trap();
+ 
+     // First move the inline Slots into a temporary storage.
+     V TmpStorage[InlineSlots];
+     V *TmpBegin = TmpStorage;
+     V *TmpEnd = TmpBegin;
+ 
+     // Loop over the Slots, moving non-empty, non-tombstones into the
+     // temporary storage. Have the loop move the TmpEnd forward as it goes.
+     V *P = u.i;
+     V *E = P + InlineSlots;
+     for (; P != E; ++P) {
+         if (P->v != EmptyKey) {
+             TmpEnd->v = P->v;
+             ++TmpEnd;
+         }
+     }
+ 
+     Small = false;
+     u.o = LargeRep{new V[128], 128};
+     moveFromOldSlots(TmpBegin, TmpEnd);
+   }
+ 
+   V *getSlots() {
+     if (Small) {
+       V * inl = u.i;
+       return inl;
+     }
+     else {
+       LargeRep * rep = &u.o;
+       return rep->Slots;
+     }
+   }
+ 
+   unsigned getCapacity() {
+     if (Small) {
+       return InlineSlots;
+     }
+     else {
+       LargeRep * rep = &u.o;
+       return rep->Capacity;
+     }
+   }
+ };
+ 
+ #pragma GCC optimize(0)
+ 
+ struct P {
+     u64 f;
+     bool s;
+ };
+ 
+ static u64 ws = 0;
+ static P WorkList[128];
+ 
+ __attribute__((noipa))
+ static void popupateIni() {
+   for (u64 Var : (u64[]){8,7,6,5,4,3,0}) {
+     WorkList[ws++] = P{Var, false};
+   }
+ }
+ 
+ __attribute__((noipa))
+ static void checkCycle(u64 Var) {
+     // Detect cycles.
+     static bool seen[256];
+     if (Var >= 256 || seen[Var]) __builtin_trap();
+     seen[Var] = true;
+ }
+ 
+ 
+ __attribute__((noipa))
+ static void populateDeps(u64 Var) {
+ 
+     WorkList[ws++] = P{Var, true};
+     if (Var == 8)
+         WorkList[ws++] = P{0, false};
+ }
+ 
+ 
+ __attribute__((noipa)) __attribute__((optimize(3)))
+ static void bug() {
+ 
+   // triggers growth on insert
+   SmallDenseMap Visited;
+ 
+   popupateIni();
+ 
+   while (ws > 0) {
+     P Item = WorkList[--ws];
+     u64 Var = Item.f;
+     bool visitedAllDependencies = Item.s;
+ 
+     if (Visited.contains(Var)) {
+       continue;
+     }
+ 
+     if (visitedAllDependencies) {
+       Visited.try_emplace(Var);
+       continue;
+     }
+ 
+     checkCycle(Var);
+     populateDeps(Var);
+   }
+ }
+ 
+ __attribute__((noipa))
+ int main() {
+     bug();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-1.C gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-1.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-1.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-1.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,4 ----
+ /* PR preprocessor/105608 */
+ /* { dg-do compile } */
+ #define MACRO_ON_A_LONG_LINE "this line is long enough that it forces the line table to create an LC_RENAME map, which formerly triggered an ICE after PCH restore"
+ #include "line-map-1.H"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-1.Hs gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-1.Hs
*** gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-1.Hs	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-1.Hs	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1 ----
+ /* This space intentionally left blank.  */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-2.C gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-2.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-2.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-2.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,6 ----
+ /* PR preprocessor/105608 */
+ /* { dg-do compile } */
+ /* { dg-additional-options "-save-temps" } */
+ #define MACRO_ON_A_LONG_LINE "this line is long enough that it forces the line table to create an LC_RENAME map, which formerly triggered an ICE after PCH restore"
+ #include "line-map-2.H"
+ #error "suppress PCH assembly comparison, which does not work with -save-temps" /* { dg-error "." } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-2.Hs gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-2.Hs
*** gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-2.Hs	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-2.Hs	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1 ----
+ /* This space intentionally left blank.  */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-3.Hs gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-3.Hs
*** gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-3.Hs	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-3.Hs	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1 ----
+ /* This space intentionally left blank.  */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/template/friend78.C gcc-12.4.0/gcc/testsuite/g++.dg/template/friend78.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/template/friend78.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/template/friend78.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,18 ----
+ // PR c++/106740
+ // { dg-additional-options -Wno-non-template-friend }
+ 
+ template <typename> struct EnumClass { friend int toString(EnumClass); };
+ struct AmhsConvInfoCoFw {
+   enum AftnTypeXMsgTypeEnum {};
+   typedef EnumClass<AftnTypeXMsgTypeEnum> AftnTypeXMsgType;
+   const int getAftnTypeXMsgTypeAsStr() const;
+   struct MtcuAxgwInfo {
+     AftnTypeXMsgType mAftnTypeXMsgType;
+   };
+ };
+ const int AmhsConvInfoCoFw::getAftnTypeXMsgTypeAsStr() const {
+   MtcuAxgwInfo __trans_tmp_1;
+   toString(__trans_tmp_1.mAftnTypeXMsgType);
+   return 0;
+ }
+ int toString(AmhsConvInfoCoFw::AftnTypeXMsgType);
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/template/template-keyword4.C gcc-12.4.0/gcc/testsuite/g++.dg/template/template-keyword4.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/template/template-keyword4.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/template/template-keyword4.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,18 ----
+ // PR c++/106310
+ 
+ template <class T>
+ struct set{};
+ 
+ template< typename T >
+ struct Base
+ {
+   template< int > int set(T const &);
+ };
+ 
+ template< typename T >
+ struct Derived : Base< T >
+ {
+   void f(T const &arg) {
+     this->template set< 0 >(arg);
+   }
+ };
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/torture/pr106922.C gcc-12.4.0/gcc/testsuite/g++.dg/torture/pr106922.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/torture/pr106922.C	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/g++.dg/torture/pr106922.C	Thu Jun 20 08:08:07 2024
***************
*** 4,11 ****
--- 4,19 ----
  // -O1 doesn't iterate VN and thus has bogus uninit diagnostics
  // { dg-skip-if "" { *-*-* } { "-O1" } { "" } }
  
+ // The testcase still emits bogus diagnostics with the pre-C++11 ABI
+ #undef _GLIBCXX_USE_CXX11_ABI
+ #define _GLIBCXX_USE_CXX11_ABI 1
+ 
  #include <vector>
  
+ // When the library is not dual-ABI and defaults to old just compile
+ // an empty TU
+ #if _GLIBCXX_USE_CXX11_ABI
+ 
  #include <optional>
  template <class T>
  using Optional = std::optional<T>;
*************** void test()
*** 46,48 ****
--- 54,57 ----
          externals.external2 = internal2;
      }
  }
+ #endif
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/torture/pr111019.C gcc-12.4.0/gcc/testsuite/g++.dg/torture/pr111019.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/torture/pr111019.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/torture/pr111019.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,65 ----
+ // { dg-do run }
+ // { dg-additional-options "-fstrict-aliasing" }
+ 
+ #include <cassert>
+ #include <memory>
+ #include <string>
+ 
+ class Base
+ {
+ public:
+   Base* previous = nullptr;
+   Base* next = nullptr;
+   Base* target = nullptr;
+ };
+ 
+ class Target : public Base
+ {
+ public:
+   __attribute__((always_inline)) ~Target()
+   {
+     while (this->next)
+     {
+       Base* n = this->next;
+ 
+       if (n->previous)
+         n->previous->next = n->next;
+       if (n->next)
+         n->next->previous = n->previous;
+       n->previous = nullptr;
+       n->next = nullptr;
+       n->target = nullptr;
+     }
+   }
+ };
+ 
+ template <typename T>
+ class TargetWithData final : public Target
+ {
+ public:
+   TargetWithData(T data)
+     : data(data)
+   {}
+   T data;
+ };
+ 
+ void test()
+ {
+   printf("test\n");
+   Base ptr;
+   {
+     auto data = std::make_unique<TargetWithData<std::string>>(std::string("asdf"));
+     ptr.target = &*data;
+     ptr.previous = &*data;
+     data->next = &ptr;
+ 
+     assert(ptr.target != nullptr);
+   }
+   assert(ptr.target == nullptr);
+ }
+ 
+ int main(int, char**)
+ {
+   test();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/torture/pr113896.C gcc-12.4.0/gcc/testsuite/g++.dg/torture/pr113896.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/torture/pr113896.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/torture/pr113896.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,35 ----
+ // { dg-do run }
+ // { dg-additional-options "-ffast-math" }
+ 
+ double a1 = 1.0;
+ double a2 = 1.0;
+ 
+ void __attribute__((noipa))
+ f(double K[2], bool b)
+ {
+     double A[] = {
+         b ? a1 : a2,
+         0,
+         0,
+         0
+     };
+ 
+     double sum{};
+     for(double  a : A) sum += a;
+     for(double& a : A) a /= sum;
+ 
+     if (b) {
+         K[0] = A[0]; // 1.0
+         K[1] = A[1]; // 0.0
+     } else {
+         K[0] = A[0] + A[1];
+     }
+ }
+ 
+ int main()
+ {
+   double K[2]{};
+   f(K, true);
+   if (K[0] != 1. || K[1] != 0.)
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/torture/vector-struct-1.C gcc-12.4.0/gcc/testsuite/g++.dg/torture/vector-struct-1.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/torture/vector-struct-1.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/torture/vector-struct-1.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,18 ----
+ /* PR c++/97990 */
+ /* This used to crash with lto and strict aliasing enabled as the
+    vector type variant still had TYPE_ALIAS_SET set on it. */
+ 
+ typedef __attribute__((__vector_size__(sizeof(short)))) short TSimd;
+ TSimd hh(int);
+ struct y6
+ {
+   TSimd VALUE;
+   ~y6();
+ };
+ template <class T1,class T2>
+ auto f2(T1 p1, T2){
+   return hh(p1) <= 0;
+ }
+ void f1(){
+   f2(0, y6{});
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/torture/vector-subaccess-1.C gcc-12.4.0/gcc/testsuite/g++.dg/torture/vector-subaccess-1.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/torture/vector-subaccess-1.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/torture/vector-subaccess-1.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,24 ----
+ /* PR c++/89224 */
+ /* { dg-additional-options "-Wno-psabi" } */
+ 
+ /* The access of `vector[i]` has the same qualifiers as the original
+    vector which was missing. */
+ 
+ typedef __attribute__((vector_size(16))) unsigned char  Int8x8_t;
+ 
+ template <class T>
+ void g(T &x) {
+     __builtin_abort();
+ }
+ template <class T>
+ void g(const T &x) {
+   __builtin_exit(0);
+ }
+ void f(const Int8x8_t x) {
+   g(x[0]);
+ }
+ int main(void)
+ {
+     Int8x8_t x ={};
+     f(x);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/vect/pr112793.cc gcc-12.4.0/gcc/testsuite/g++.dg/vect/pr112793.cc
*** gcc-12.3.0/gcc/testsuite/g++.dg/vect/pr112793.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/vect/pr112793.cc	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,32 ----
+ // { dg-do compile }
+ // { dg-require-effective-target c++11 }
+ // { dg-additional-options "-march=znver2" { target x86_64-*-* i?86-*-* } }
+ 
+ typedef double T;
+ T c, s;
+ T a[16];
+ struct Matrix4 {
+   Matrix4(){}
+   Matrix4(T e, T f, T i, T j) {
+     r[1] = r[4] = e;
+     r[5] = f;
+     r[8] = i;
+     r[9] = j;
+   }
+   Matrix4 operator*(Matrix4 a) {
+     return Matrix4(
+        r[0] * a.r[4] + r[4] + r[15] + r[6],
+        r[1] * a.r[4] + 1 + 2 + 3,  r[0] * r[8] + 1 + 2 + 3,
+        r[1] * r[8] + r[1] + r[14] + r[2] * r[3]);
+   }
+   T r[16] = {};
+ };
+ Matrix4 t1, t2;
+ Matrix4 tt;
+ Matrix4 getRotAltAzToEquatorial()
+ {
+   t2.r[4] =  0;
+   t1.r[1] =  -s;
+   t1.r[8] = 0;
+   return t1 * t2;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/warn/Wmismatched-new-delete-8.C gcc-12.4.0/gcc/testsuite/g++.dg/warn/Wmismatched-new-delete-8.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/warn/Wmismatched-new-delete-8.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/warn/Wmismatched-new-delete-8.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,42 ----
+ /* PR tree-optimization/109804 */
+ /* { dg-do compile { target c++11 } } */
+ /* { dg-options "-Wall" } */
+ 
+ /* Here we used to ICE in new_delete_mismatch_p because
+    we didn't handle unnamed types from the demangler (DEMANGLE_COMPONENT_UNNAMED_TYPE). */
+ 
+ template <typename T, typename ARGS>
+ static inline T * construct_at(void *at, ARGS && args)
+ {
+  struct Placeable : T
+  {
+   Placeable(ARGS && args) : T(args) { }
+   void * operator new (__SIZE_TYPE__, void *ptr) { return ptr; }
+   void operator delete (void *, void *) { }
+  };
+  return new (at) Placeable(static_cast<ARGS &&>(args));
+ }
+ template <typename MT>
+ struct Reconstructible
+ {
+   char _space[sizeof(MT)];
+   Reconstructible() { }
+ };
+ template <typename MT>
+ struct Constructible : Reconstructible<MT>
+ {
+  Constructible(){}
+ };
+ struct A { };
+ struct B
+ {
+  Constructible<A> a { };
+  B(int) { }
+ };
+ Constructible<B> b { };
+ void f()
+ {
+   enum { ENUM_A = 1 };
+   enum { ENUM_B = 1 };
+   construct_at<B>(b._space, ENUM_B);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/aarch64/acle/acle.exp gcc-12.4.0/gcc/testsuite/g++.target/aarch64/acle/acle.exp
*** gcc-12.3.0/gcc/testsuite/g++.target/aarch64/acle/acle.exp	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/aarch64/acle/acle.exp	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,35 ----
+ # Copyright (C) 2014-2023 Free Software Foundation, Inc.
+ 
+ # This program is free software; you can redistribute it and/or modify
+ # it under the terms of the GNU General Public License as published by
+ # the Free Software Foundation; either version 3 of the License, or
+ # (at your option) any later version.
+ #
+ # This program is distributed in the hope that it will be useful,
+ # but WITHOUT ANY WARRANTY; without even the implied warranty of
+ # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ # GNU General Public License for more details.
+ #
+ # You should have received a copy of the GNU General Public License
+ # along with GCC; see the file COPYING3.  If not see
+ # <http://www.gnu.org/licenses/>.
+ 
+ # GCC testsuite that uses the `dg.exp' driver.
+ 
+ # Exit immediately if this isn't an AArch64 target.
+ if ![istarget aarch64*-*-*] then {
+   return
+ }
+ 
+ # Load support procs.
+ load_lib g++-dg.exp
+ 
+ # Initialize `dg'.
+ dg-init
+ 
+ # Main loop.
+ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] \
+ 	"" ""
+ 
+ # All done.
+ dg-finish
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/aarch64/acle/ls64.C gcc-12.4.0/gcc/testsuite/g++.target/aarch64/acle/ls64.C
*** gcc-12.3.0/gcc/testsuite/g++.target/aarch64/acle/ls64.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/aarch64/acle/ls64.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do compile } */
+ /* { dg-additional-options "-march=armv8.7-a+ls64" } */
+ #include <arm_acle.h>
+ int main()
+ {
+   data512_t d = __arm_ld64b ((const void *)0x1000);
+   __arm_st64b ((void *)0x2000, d);
+   uint64_t x = __arm_st64bv ((void *)0x3000, d);
+   x += __arm_st64bv0 ((void *)0x4000, d);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/aarch64/acle/ls64_lto.C gcc-12.4.0/gcc/testsuite/g++.target/aarch64/acle/ls64_lto.C
*** gcc-12.3.0/gcc/testsuite/g++.target/aarch64/acle/ls64_lto.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/aarch64/acle/ls64_lto.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do link { target aarch64_asm_ls64_ok } } */
+ /* { dg-additional-options "-march=armv8.7-a+ls64 -flto" } */
+ #include <arm_acle.h>
+ int main()
+ {
+   data512_t d = __arm_ld64b ((const void *)0x1000);
+   __arm_st64b ((void *)0x2000, d);
+   uint64_t x = __arm_st64bv ((void *)0x3000, d);
+   x += __arm_st64bv0 ((void *)0x4000, d);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/aarch64/pr103147-10.C gcc-12.4.0/gcc/testsuite/g++.target/aarch64/pr103147-10.C
*** gcc-12.3.0/gcc/testsuite/g++.target/aarch64/pr103147-10.C	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/g++.target/aarch64/pr103147-10.C	Thu Jun 20 08:08:07 2024
***************
*** 1,4 ****
! /* { dg-options "-O2 -fpack-struct -mstrict-align" } */
  /* { dg-final { check-function-bodies "**" "" "" } } */
  
  #include <arm_neon.h>
--- 1,4 ----
! /* { dg-options "-O2 -fpack-struct -mstrict-align -fno-stack-protector" } */
  /* { dg-final { check-function-bodies "**" "" "" } } */
  
  #include <arm_neon.h>
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/i386/pr111497.C gcc-12.4.0/gcc/testsuite/g++.target/i386/pr111497.C
*** gcc-12.3.0/gcc/testsuite/g++.target/i386/pr111497.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/i386/pr111497.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,22 ----
+ // { dg-do compile { target ia32 } }
+ // { dg-options "-march=i686 -mtune=generic -fPIC -O2 -g" }
+ 
+ class A;
+ struct B { const char *b1; int b2; };
+ struct C : B { C (const char *x, int y) { b1 = x; b2 = y; } };
+ struct D : C { D (B x) : C (x.b1, x.b2) {} };
+ struct E { E (A *); };
+ struct F : E { D f1, f2, f3, f4, f5, f6; F (A *, const B &, const B &, const B &); };
+ struct G : F { G (A *, const B &, const B &, const B &); };
+ struct H { int h; };
+ struct I { H i; };
+ struct J { I *j; };
+ struct A : J {};
+ inline F::F (A *x, const B &y, const B &z, const B &w)
+   : E(x), f1(y), f2(z), f3(w), f4(y), f5(z), f6(w) {}
+ G::G (A *x, const B &y, const B &z, const B &w) : F(x, y, z, w)
+ {
+   H *h = &x->j->i;
+   if (h)
+     h->h++;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/i386/pr111822.C gcc-12.4.0/gcc/testsuite/g++.target/i386/pr111822.C
*** gcc-12.3.0/gcc/testsuite/g++.target/i386/pr111822.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/i386/pr111822.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,45 ----
+ /* PR target/111822 */
+ /* { dg-do compile { target ia32 } } */
+ /* { dg-options "-O2 -flive-range-shrinkage -fno-dce -fnon-call-exceptions -march=x86-64" } */
+ 
+ typedef union {
+   int *pNativeClosure;
+   struct SQRefCounted *pRefCounted;
+ } SQObjectValue;
+ typedef struct {
+   SQObjectValue _unVal;
+ } SQObject;
+ typedef long SQFUNCTION(struct SQVM *);
+ struct SQVM {
+   void CallNative();
+ };
+ struct SQRefCounted {
+   long long _uiRef;
+ };
+ void Null();
+ struct SQObjectPtr : SQObject {
+   SQObjectPtr() {}
+   SQObjectPtr(int *pNativeClosure) {
+     _unVal.pNativeClosure = pNativeClosure;
+     _unVal.pRefCounted->_uiRef++;
+   }
+   ~SQObjectPtr() { --_unVal.pRefCounted->_uiRef; }
+ };
+ struct CallInfo {
+   SQObjectPtr _closure;
+ };
+ long long _top;
+ SQFUNCTION _function;
+ int *CallNative_nclosure;
+ void SQVM::CallNative() {
+   long long oldtop = _top;
+   CallInfo lci;
+   lci._closure = CallNative_nclosure;
+   try {
+     _function(this);
+   } catch (...) {
+     _top = oldtop;
+   }
+   while (oldtop)
+     Null();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/i386/pr112443.C gcc-12.4.0/gcc/testsuite/g++.target/i386/pr112443.C
*** gcc-12.3.0/gcc/testsuite/g++.target/i386/pr112443.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/i386/pr112443.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,108 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target avx512bw } */
+ /* { dg-require-effective-target avx512vl } */
+ /* { dg-options "-O2 -std=c++17 -mavx512bw -mavx512vl" } */
+ 
+ #include <cstdint>
+ #include <x86intrin.h>
+ #include <functional>
+ #include <ostream>
+ 
+ #define AVX512BW
+ #define AVX512VL
+ 
+ #include "avx512f-helper.h"
+ 
+ struct TensorIteratorBase{
+   char* in;
+   char* out;
+ 
+   void for_each(std::function<void(char*, char*, int64_t size)> loop){
+     loop(out, in, 32);
+   }    
+ };
+ 
+ class Vectorized {
+ protected:
+   __m256i values;
+ 
+   static inline __m256i invert(const __m256i& v) {
+     const auto ones = _mm256_set1_epi64x(-1);
+     return _mm256_xor_si256(ones, v);
+   }
+ public:
+   operator __m256i() const {
+     return values;
+   }
+ 
+   static constexpr int size() {
+     return 32;
+   }
+ 
+   Vectorized() {}
+   Vectorized(__m256i v) : values(v) {}
+   Vectorized(uint8_t v) { values = _mm256_set1_epi8(v); }
+   static Vectorized blendv(const Vectorized& a, const Vectorized& b,
+ 			   const Vectorized& mask) {
+     return _mm256_blendv_epi8(a, b, mask);
+   }
+   static Vectorized loadu(const void* ptr) {
+     return _mm256_loadu_si256(reinterpret_cast<const __m256i*>(ptr));
+   }
+   void store(void* ptr) const {
+     _mm256_storeu_si256(reinterpret_cast<__m256i*>(ptr), values);
+   }
+ 
+   Vectorized operator<(const Vectorized& other) const {
+     __m256i max = _mm256_max_epu8(values, other);
+     return invert(_mm256_cmpeq_epi8(max, values));
+   }
+   Vectorized operator-(const Vectorized& b) {
+     return _mm256_sub_epi8(values, b);
+   }
+ };
+ 
+ std::ostream& operator<<(std::ostream& stream, const Vectorized& vec) {
+   uint8_t buf[Vectorized::size()];
+   vec.store(buf);
+   stream << "vec[";
+   for (int i = 0; i != Vectorized::size(); i++) {
+     if (i != 0)
+       stream << ", ";
+     stream << buf[i]*1;
+   }
+   stream << "]";
+   return stream;
+ }
+ 
+ void run(TensorIteratorBase iter){
+   Vectorized zero_vec(0);
+   Vectorized one_vec(1);
+ 
+   iter.for_each([=](char* out, char* in, int64_t size) {
+     for (int64_t i = 0; i <= size - Vectorized::size(); i += Vectorized::size()) {
+       auto self_vec = Vectorized::loadu(in + i);
+       auto left = Vectorized::blendv(zero_vec, one_vec, zero_vec < self_vec);
+       auto right = Vectorized::blendv(zero_vec, one_vec, self_vec < zero_vec);
+       auto outv = left - right;
+       outv.store(out + i);
+     }
+   });
+ }
+ 
+ void
+ test_256 (){
+   char in[32];
+   char out[32];
+   for(auto& x: in) x = 1;
+   run(TensorIteratorBase{in, out});
+   Vectorized::loadu (out);
+   for (int i = 0; i != 32; i++)
+     if (out[i] != 1)
+       __builtin_abort ();
+ }
+ 
+ void
+ test_128 ()
+ {
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/loongarch/atomic-cas-int.C gcc-12.4.0/gcc/testsuite/g++.target/loongarch/atomic-cas-int.C
*** gcc-12.3.0/gcc/testsuite/g++.target/loongarch/atomic-cas-int.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/loongarch/atomic-cas-int.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,32 ----
+ /* { dg-do run } */
+ /* { dg-options "-O2" } */
+ 
+ #include <atomic>
+ #include <cstdio>
+ 
+ __attribute__ ((noinline)) long
+ val_without_const_folding (long val)
+ {
+   return val;
+ }
+ 
+ int
+ main ()
+ {
+   int oldval = 0xaa;
+   int newval = 0xbb;
+   std::atomic<int> amo;
+ 
+   amo.store (oldval);
+ 
+   long longval = val_without_const_folding (0xff80000000000000 + oldval);
+   oldval = static_cast<int> (longval);
+ 
+   amo.compare_exchange_strong (oldval, newval);
+ 
+   if (newval != amo.load (std::memory_order_relaxed))
+     __builtin_abort ();
+ 
+   return 0;
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr105325.C gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr105325.C
*** gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr105325.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr105325.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,28 ----
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target lp64 } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-require-effective-target powerpc_prefixed_addr } */
+ /* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
+ 
+ /* PR target/105324.  Test that power10 fusion does not generate an LWA/CMPDI
+    with a large offset that the assembler rejects.  Instead it should a
+    PLWZ/CMPWI combination.
+ 
+    Originally, the code was dying because the fusion load + compare -1/0/1
+    patterns did not handle the possibility that the load might be prefixed.
+    The -fstack-protector option is needed to show the bug.  */
+ 
+ struct Ath__array1D {
+   int _current;
+   int getCnt() { return _current; }
+ };
+ struct extMeasure {
+   int _mapTable[10000];
+   Ath__array1D _metRCTable;
+ };
+ void measureRC() {
+   extMeasure m;
+   for (; m._metRCTable.getCnt();)
+     for (;;)
+       ;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr110741.C gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr110741.C
*** gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr110741.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr110741.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,552 ----
+ /* { dg-do run { target { power10_hw } } } */
+ /* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+ 
+ #include <altivec.h>
+ 
+ typedef unsigned char uint8_t;
+ 
+ template <uint8_t kTernLogOp>
+ static inline vector unsigned long long
+ VSXTernaryLogic (vector unsigned long long a, vector unsigned long long b,
+ 		 vector unsigned long long c)
+ {
+   return vec_ternarylogic (a, b, c, kTernLogOp);
+ }
+ 
+ static vector unsigned long long
+ VSXTernaryLogic (vector unsigned long long a, vector unsigned long long b,
+ 		 vector unsigned long long c, int ternary_logic_op)
+ {
+   switch (ternary_logic_op & 0xFF)
+     {
+     case 0:
+       return VSXTernaryLogic<0> (a, b, c);
+     case 1:
+       return VSXTernaryLogic<1> (a, b, c);
+     case 2:
+       return VSXTernaryLogic<2> (a, b, c);
+     case 3:
+       return VSXTernaryLogic<3> (a, b, c);
+     case 4:
+       return VSXTernaryLogic<4> (a, b, c);
+     case 5:
+       return VSXTernaryLogic<5> (a, b, c);
+     case 6:
+       return VSXTernaryLogic<6> (a, b, c);
+     case 7:
+       return VSXTernaryLogic<7> (a, b, c);
+     case 8:
+       return VSXTernaryLogic<8> (a, b, c);
+     case 9:
+       return VSXTernaryLogic<9> (a, b, c);
+     case 10:
+       return VSXTernaryLogic<10> (a, b, c);
+     case 11:
+       return VSXTernaryLogic<11> (a, b, c);
+     case 12:
+       return VSXTernaryLogic<12> (a, b, c);
+     case 13:
+       return VSXTernaryLogic<13> (a, b, c);
+     case 14:
+       return VSXTernaryLogic<14> (a, b, c);
+     case 15:
+       return VSXTernaryLogic<15> (a, b, c);
+     case 16:
+       return VSXTernaryLogic<16> (a, b, c);
+     case 17:
+       return VSXTernaryLogic<17> (a, b, c);
+     case 18:
+       return VSXTernaryLogic<18> (a, b, c);
+     case 19:
+       return VSXTernaryLogic<19> (a, b, c);
+     case 20:
+       return VSXTernaryLogic<20> (a, b, c);
+     case 21:
+       return VSXTernaryLogic<21> (a, b, c);
+     case 22:
+       return VSXTernaryLogic<22> (a, b, c);
+     case 23:
+       return VSXTernaryLogic<23> (a, b, c);
+     case 24:
+       return VSXTernaryLogic<24> (a, b, c);
+     case 25:
+       return VSXTernaryLogic<25> (a, b, c);
+     case 26:
+       return VSXTernaryLogic<26> (a, b, c);
+     case 27:
+       return VSXTernaryLogic<27> (a, b, c);
+     case 28:
+       return VSXTernaryLogic<28> (a, b, c);
+     case 29:
+       return VSXTernaryLogic<29> (a, b, c);
+     case 30:
+       return VSXTernaryLogic<30> (a, b, c);
+     case 31:
+       return VSXTernaryLogic<31> (a, b, c);
+     case 32:
+       return VSXTernaryLogic<32> (a, b, c);
+     case 33:
+       return VSXTernaryLogic<33> (a, b, c);
+     case 34:
+       return VSXTernaryLogic<34> (a, b, c);
+     case 35:
+       return VSXTernaryLogic<35> (a, b, c);
+     case 36:
+       return VSXTernaryLogic<36> (a, b, c);
+     case 37:
+       return VSXTernaryLogic<37> (a, b, c);
+     case 38:
+       return VSXTernaryLogic<38> (a, b, c);
+     case 39:
+       return VSXTernaryLogic<39> (a, b, c);
+     case 40:
+       return VSXTernaryLogic<40> (a, b, c);
+     case 41:
+       return VSXTernaryLogic<41> (a, b, c);
+     case 42:
+       return VSXTernaryLogic<42> (a, b, c);
+     case 43:
+       return VSXTernaryLogic<43> (a, b, c);
+     case 44:
+       return VSXTernaryLogic<44> (a, b, c);
+     case 45:
+       return VSXTernaryLogic<45> (a, b, c);
+     case 46:
+       return VSXTernaryLogic<46> (a, b, c);
+     case 47:
+       return VSXTernaryLogic<47> (a, b, c);
+     case 48:
+       return VSXTernaryLogic<48> (a, b, c);
+     case 49:
+       return VSXTernaryLogic<49> (a, b, c);
+     case 50:
+       return VSXTernaryLogic<50> (a, b, c);
+     case 51:
+       return VSXTernaryLogic<51> (a, b, c);
+     case 52:
+       return VSXTernaryLogic<52> (a, b, c);
+     case 53:
+       return VSXTernaryLogic<53> (a, b, c);
+     case 54:
+       return VSXTernaryLogic<54> (a, b, c);
+     case 55:
+       return VSXTernaryLogic<55> (a, b, c);
+     case 56:
+       return VSXTernaryLogic<56> (a, b, c);
+     case 57:
+       return VSXTernaryLogic<57> (a, b, c);
+     case 58:
+       return VSXTernaryLogic<58> (a, b, c);
+     case 59:
+       return VSXTernaryLogic<59> (a, b, c);
+     case 60:
+       return VSXTernaryLogic<60> (a, b, c);
+     case 61:
+       return VSXTernaryLogic<61> (a, b, c);
+     case 62:
+       return VSXTernaryLogic<62> (a, b, c);
+     case 63:
+       return VSXTernaryLogic<63> (a, b, c);
+     case 64:
+       return VSXTernaryLogic<64> (a, b, c);
+     case 65:
+       return VSXTernaryLogic<65> (a, b, c);
+     case 66:
+       return VSXTernaryLogic<66> (a, b, c);
+     case 67:
+       return VSXTernaryLogic<67> (a, b, c);
+     case 68:
+       return VSXTernaryLogic<68> (a, b, c);
+     case 69:
+       return VSXTernaryLogic<69> (a, b, c);
+     case 70:
+       return VSXTernaryLogic<70> (a, b, c);
+     case 71:
+       return VSXTernaryLogic<71> (a, b, c);
+     case 72:
+       return VSXTernaryLogic<72> (a, b, c);
+     case 73:
+       return VSXTernaryLogic<73> (a, b, c);
+     case 74:
+       return VSXTernaryLogic<74> (a, b, c);
+     case 75:
+       return VSXTernaryLogic<75> (a, b, c);
+     case 76:
+       return VSXTernaryLogic<76> (a, b, c);
+     case 77:
+       return VSXTernaryLogic<77> (a, b, c);
+     case 78:
+       return VSXTernaryLogic<78> (a, b, c);
+     case 79:
+       return VSXTernaryLogic<79> (a, b, c);
+     case 80:
+       return VSXTernaryLogic<80> (a, b, c);
+     case 81:
+       return VSXTernaryLogic<81> (a, b, c);
+     case 82:
+       return VSXTernaryLogic<82> (a, b, c);
+     case 83:
+       return VSXTernaryLogic<83> (a, b, c);
+     case 84:
+       return VSXTernaryLogic<84> (a, b, c);
+     case 85:
+       return VSXTernaryLogic<85> (a, b, c);
+     case 86:
+       return VSXTernaryLogic<86> (a, b, c);
+     case 87:
+       return VSXTernaryLogic<87> (a, b, c);
+     case 88:
+       return VSXTernaryLogic<88> (a, b, c);
+     case 89:
+       return VSXTernaryLogic<89> (a, b, c);
+     case 90:
+       return VSXTernaryLogic<90> (a, b, c);
+     case 91:
+       return VSXTernaryLogic<91> (a, b, c);
+     case 92:
+       return VSXTernaryLogic<92> (a, b, c);
+     case 93:
+       return VSXTernaryLogic<93> (a, b, c);
+     case 94:
+       return VSXTernaryLogic<94> (a, b, c);
+     case 95:
+       return VSXTernaryLogic<95> (a, b, c);
+     case 96:
+       return VSXTernaryLogic<96> (a, b, c);
+     case 97:
+       return VSXTernaryLogic<97> (a, b, c);
+     case 98:
+       return VSXTernaryLogic<98> (a, b, c);
+     case 99:
+       return VSXTernaryLogic<99> (a, b, c);
+     case 100:
+       return VSXTernaryLogic<100> (a, b, c);
+     case 101:
+       return VSXTernaryLogic<101> (a, b, c);
+     case 102:
+       return VSXTernaryLogic<102> (a, b, c);
+     case 103:
+       return VSXTernaryLogic<103> (a, b, c);
+     case 104:
+       return VSXTernaryLogic<104> (a, b, c);
+     case 105:
+       return VSXTernaryLogic<105> (a, b, c);
+     case 106:
+       return VSXTernaryLogic<106> (a, b, c);
+     case 107:
+       return VSXTernaryLogic<107> (a, b, c);
+     case 108:
+       return VSXTernaryLogic<108> (a, b, c);
+     case 109:
+       return VSXTernaryLogic<109> (a, b, c);
+     case 110:
+       return VSXTernaryLogic<110> (a, b, c);
+     case 111:
+       return VSXTernaryLogic<111> (a, b, c);
+     case 112:
+       return VSXTernaryLogic<112> (a, b, c);
+     case 113:
+       return VSXTernaryLogic<113> (a, b, c);
+     case 114:
+       return VSXTernaryLogic<114> (a, b, c);
+     case 115:
+       return VSXTernaryLogic<115> (a, b, c);
+     case 116:
+       return VSXTernaryLogic<116> (a, b, c);
+     case 117:
+       return VSXTernaryLogic<117> (a, b, c);
+     case 118:
+       return VSXTernaryLogic<118> (a, b, c);
+     case 119:
+       return VSXTernaryLogic<119> (a, b, c);
+     case 120:
+       return VSXTernaryLogic<120> (a, b, c);
+     case 121:
+       return VSXTernaryLogic<121> (a, b, c);
+     case 122:
+       return VSXTernaryLogic<122> (a, b, c);
+     case 123:
+       return VSXTernaryLogic<123> (a, b, c);
+     case 124:
+       return VSXTernaryLogic<124> (a, b, c);
+     case 125:
+       return VSXTernaryLogic<125> (a, b, c);
+     case 126:
+       return VSXTernaryLogic<126> (a, b, c);
+     case 127:
+       return VSXTernaryLogic<127> (a, b, c);
+     case 128:
+       return VSXTernaryLogic<128> (a, b, c);
+     case 129:
+       return VSXTernaryLogic<129> (a, b, c);
+     case 130:
+       return VSXTernaryLogic<130> (a, b, c);
+     case 131:
+       return VSXTernaryLogic<131> (a, b, c);
+     case 132:
+       return VSXTernaryLogic<132> (a, b, c);
+     case 133:
+       return VSXTernaryLogic<133> (a, b, c);
+     case 134:
+       return VSXTernaryLogic<134> (a, b, c);
+     case 135:
+       return VSXTernaryLogic<135> (a, b, c);
+     case 136:
+       return VSXTernaryLogic<136> (a, b, c);
+     case 137:
+       return VSXTernaryLogic<137> (a, b, c);
+     case 138:
+       return VSXTernaryLogic<138> (a, b, c);
+     case 139:
+       return VSXTernaryLogic<139> (a, b, c);
+     case 140:
+       return VSXTernaryLogic<140> (a, b, c);
+     case 141:
+       return VSXTernaryLogic<141> (a, b, c);
+     case 142:
+       return VSXTernaryLogic<142> (a, b, c);
+     case 143:
+       return VSXTernaryLogic<143> (a, b, c);
+     case 144:
+       return VSXTernaryLogic<144> (a, b, c);
+     case 145:
+       return VSXTernaryLogic<145> (a, b, c);
+     case 146:
+       return VSXTernaryLogic<146> (a, b, c);
+     case 147:
+       return VSXTernaryLogic<147> (a, b, c);
+     case 148:
+       return VSXTernaryLogic<148> (a, b, c);
+     case 149:
+       return VSXTernaryLogic<149> (a, b, c);
+     case 150:
+       return VSXTernaryLogic<150> (a, b, c);
+     case 151:
+       return VSXTernaryLogic<151> (a, b, c);
+     case 152:
+       return VSXTernaryLogic<152> (a, b, c);
+     case 153:
+       return VSXTernaryLogic<153> (a, b, c);
+     case 154:
+       return VSXTernaryLogic<154> (a, b, c);
+     case 155:
+       return VSXTernaryLogic<155> (a, b, c);
+     case 156:
+       return VSXTernaryLogic<156> (a, b, c);
+     case 157:
+       return VSXTernaryLogic<157> (a, b, c);
+     case 158:
+       return VSXTernaryLogic<158> (a, b, c);
+     case 159:
+       return VSXTernaryLogic<159> (a, b, c);
+     case 160:
+       return VSXTernaryLogic<160> (a, b, c);
+     case 161:
+       return VSXTernaryLogic<161> (a, b, c);
+     case 162:
+       return VSXTernaryLogic<162> (a, b, c);
+     case 163:
+       return VSXTernaryLogic<163> (a, b, c);
+     case 164:
+       return VSXTernaryLogic<164> (a, b, c);
+     case 165:
+       return VSXTernaryLogic<165> (a, b, c);
+     case 166:
+       return VSXTernaryLogic<166> (a, b, c);
+     case 167:
+       return VSXTernaryLogic<167> (a, b, c);
+     case 168:
+       return VSXTernaryLogic<168> (a, b, c);
+     case 169:
+       return VSXTernaryLogic<169> (a, b, c);
+     case 170:
+       return VSXTernaryLogic<170> (a, b, c);
+     case 171:
+       return VSXTernaryLogic<171> (a, b, c);
+     case 172:
+       return VSXTernaryLogic<172> (a, b, c);
+     case 173:
+       return VSXTernaryLogic<173> (a, b, c);
+     case 174:
+       return VSXTernaryLogic<174> (a, b, c);
+     case 175:
+       return VSXTernaryLogic<175> (a, b, c);
+     case 176:
+       return VSXTernaryLogic<176> (a, b, c);
+     case 177:
+       return VSXTernaryLogic<177> (a, b, c);
+     case 178:
+       return VSXTernaryLogic<178> (a, b, c);
+     case 179:
+       return VSXTernaryLogic<179> (a, b, c);
+     case 180:
+       return VSXTernaryLogic<180> (a, b, c);
+     case 181:
+       return VSXTernaryLogic<181> (a, b, c);
+     case 182:
+       return VSXTernaryLogic<182> (a, b, c);
+     case 183:
+       return VSXTernaryLogic<183> (a, b, c);
+     case 184:
+       return VSXTernaryLogic<184> (a, b, c);
+     case 185:
+       return VSXTernaryLogic<185> (a, b, c);
+     case 186:
+       return VSXTernaryLogic<186> (a, b, c);
+     case 187:
+       return VSXTernaryLogic<187> (a, b, c);
+     case 188:
+       return VSXTernaryLogic<188> (a, b, c);
+     case 189:
+       return VSXTernaryLogic<189> (a, b, c);
+     case 190:
+       return VSXTernaryLogic<190> (a, b, c);
+     case 191:
+       return VSXTernaryLogic<191> (a, b, c);
+     case 192:
+       return VSXTernaryLogic<192> (a, b, c);
+     case 193:
+       return VSXTernaryLogic<193> (a, b, c);
+     case 194:
+       return VSXTernaryLogic<194> (a, b, c);
+     case 195:
+       return VSXTernaryLogic<195> (a, b, c);
+     case 196:
+       return VSXTernaryLogic<196> (a, b, c);
+     case 197:
+       return VSXTernaryLogic<197> (a, b, c);
+     case 198:
+       return VSXTernaryLogic<198> (a, b, c);
+     case 199:
+       return VSXTernaryLogic<199> (a, b, c);
+     case 200:
+       return VSXTernaryLogic<200> (a, b, c);
+     case 201:
+       return VSXTernaryLogic<201> (a, b, c);
+     case 202:
+       return VSXTernaryLogic<202> (a, b, c);
+     case 203:
+       return VSXTernaryLogic<203> (a, b, c);
+     case 204:
+       return VSXTernaryLogic<204> (a, b, c);
+     case 205:
+       return VSXTernaryLogic<205> (a, b, c);
+     case 206:
+       return VSXTernaryLogic<206> (a, b, c);
+     case 207:
+       return VSXTernaryLogic<207> (a, b, c);
+     case 208:
+       return VSXTernaryLogic<208> (a, b, c);
+     case 209:
+       return VSXTernaryLogic<209> (a, b, c);
+     case 210:
+       return VSXTernaryLogic<210> (a, b, c);
+     case 211:
+       return VSXTernaryLogic<211> (a, b, c);
+     case 212:
+       return VSXTernaryLogic<212> (a, b, c);
+     case 213:
+       return VSXTernaryLogic<213> (a, b, c);
+     case 214:
+       return VSXTernaryLogic<214> (a, b, c);
+     case 215:
+       return VSXTernaryLogic<215> (a, b, c);
+     case 216:
+       return VSXTernaryLogic<216> (a, b, c);
+     case 217:
+       return VSXTernaryLogic<217> (a, b, c);
+     case 218:
+       return VSXTernaryLogic<218> (a, b, c);
+     case 219:
+       return VSXTernaryLogic<219> (a, b, c);
+     case 220:
+       return VSXTernaryLogic<220> (a, b, c);
+     case 221:
+       return VSXTernaryLogic<221> (a, b, c);
+     case 222:
+       return VSXTernaryLogic<222> (a, b, c);
+     case 223:
+       return VSXTernaryLogic<223> (a, b, c);
+     case 224:
+       return VSXTernaryLogic<224> (a, b, c);
+     case 225:
+       return VSXTernaryLogic<225> (a, b, c);
+     case 226:
+       return VSXTernaryLogic<226> (a, b, c);
+     case 227:
+       return VSXTernaryLogic<227> (a, b, c);
+     case 228:
+       return VSXTernaryLogic<228> (a, b, c);
+     case 229:
+       return VSXTernaryLogic<229> (a, b, c);
+     case 230:
+       return VSXTernaryLogic<230> (a, b, c);
+     case 231:
+       return VSXTernaryLogic<231> (a, b, c);
+     case 232:
+       return VSXTernaryLogic<232> (a, b, c);
+     case 233:
+       return VSXTernaryLogic<233> (a, b, c);
+     case 234:
+       return VSXTernaryLogic<234> (a, b, c);
+     case 235:
+       return VSXTernaryLogic<235> (a, b, c);
+     case 236:
+       return VSXTernaryLogic<236> (a, b, c);
+     case 237:
+       return VSXTernaryLogic<237> (a, b, c);
+     case 238:
+       return VSXTernaryLogic<238> (a, b, c);
+     case 239:
+       return VSXTernaryLogic<239> (a, b, c);
+     case 240:
+       return VSXTernaryLogic<240> (a, b, c);
+     case 241:
+       return VSXTernaryLogic<241> (a, b, c);
+     case 242:
+       return VSXTernaryLogic<242> (a, b, c);
+     case 243:
+       return VSXTernaryLogic<243> (a, b, c);
+     case 244:
+       return VSXTernaryLogic<244> (a, b, c);
+     case 245:
+       return VSXTernaryLogic<245> (a, b, c);
+     case 246:
+       return VSXTernaryLogic<246> (a, b, c);
+     case 247:
+       return VSXTernaryLogic<247> (a, b, c);
+     case 248:
+       return VSXTernaryLogic<248> (a, b, c);
+     case 249:
+       return VSXTernaryLogic<249> (a, b, c);
+     case 250:
+       return VSXTernaryLogic<250> (a, b, c);
+     case 251:
+       return VSXTernaryLogic<251> (a, b, c);
+     case 252:
+       return VSXTernaryLogic<252> (a, b, c);
+     case 253:
+       return VSXTernaryLogic<253> (a, b, c);
+     case 254:
+       return VSXTernaryLogic<254> (a, b, c);
+     case 255:
+       return VSXTernaryLogic<255> (a, b, c);
+     default:
+       return a;
+     }
+ }
+ 
+ int
+ main (int argc, char **argv)
+ {
+   vector unsigned long long a = {0xD8, 0xDB};
+   vector unsigned long long b = {0x6C, 0x6C};
+   vector unsigned long long c = {0x56, 0x56};
+   vector unsigned long long ternlog_result = VSXTernaryLogic (a, b, c, 0xB6);
+ 
+   if (ternlog_result[0] != 0xffffffffffffff3dull
+       || ternlog_result[1] != 0xffffffffffffff3eull)
+     __builtin_abort ();
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr111366.C gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr111366.C
*** gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr111366.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr111366.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,48 ----
+ /* { dg-do compile } */
+ /* Use -Wno-attributes to suppress the possible warning on always_inline.  */
+ /* { dg-options "-O2 -mdejagnu-cpu=power9 -Wno-attributes" } */
+ 
+ /* Verify it doesn't emit any error messages.  */
+ 
+ #include <stddef.h>
+ #define HWY_PRAGMA(tokens) _Pragma (#tokens)
+ #define HWY_PUSH_ATTRIBUTES(targets_str) HWY_PRAGMA (GCC target targets_str)
+ __attribute__ ((always_inline)) void
+ PreventElision ()
+ {
+   asm("");
+ }
+ #define HWY_BEFORE_NAMESPACE() HWY_PUSH_ATTRIBUTES (",cpu=power10")
+ HWY_BEFORE_NAMESPACE () namespace detail
+ {
+   template <typename, size_t, int> struct CappedTagChecker
+   {
+   };
+ }
+ template <typename T, size_t kLimit, int kPow2 = 0>
+ using CappedTag = detail::CappedTagChecker<T, kLimit, kPow2>;
+ template <typename, size_t, size_t kMinArg, class Test> struct ForeachCappedR
+ {
+   static void Do (size_t, size_t)
+   {
+     CappedTag<int, kMinArg> d;
+     Test () (int(), d);
+   }
+ };
+ template <class Test> struct ForPartialVectors
+ {
+   template <typename T> void operator() (T)
+   {
+     ForeachCappedR<T, 1, 1, Test>::Do (1, 1);
+   }
+ };
+ struct TestFloorLog2
+ {
+   template <class T, class DF> void operator() (T, DF) { PreventElision (); }
+ };
+ void
+ TestAllFloorLog2 ()
+ {
+   ForPartialVectors<TestFloorLog2> () (float());
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr111367.C gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr111367.C
*** gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr111367.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr111367.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,22 ----
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-mdejagnu-cpu=power10 -fstack-protector-strong" } */
+ 
+ /* Verify object file can be generated successfully.  */
+ 
+ struct SortAscending
+ {
+ };
+ 
+ typedef unsigned long long size_t;
+ 
+ void VQSort (long long *, size_t, SortAscending);
+ 
+ void
+ BenchAllColdSort ()
+ {
+   typedef long long T;
+   constexpr size_t kSize = 10 * 1000;
+   alignas (16) T items[kSize];
+   VQSort (items, kSize, SortAscending ());
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr111828-1.C gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr111828-1.C
*** gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr111828-1.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr111828-1.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,49 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_as_p10_htm } */
+ /* Use -Wno-attributes to suppress the possible warning on always_inline.  */
+ /* { dg-options "-O2 -mdejagnu-cpu=power9 -Wno-attributes" } */
+ 
+ /* Verify it doesn't emit any error messages.  */
+ 
+ #include <stddef.h>
+ #define HWY_PRAGMA(tokens) _Pragma (#tokens)
+ #define HWY_PUSH_ATTRIBUTES(targets_str) HWY_PRAGMA (GCC target targets_str)
+ __attribute__ ((always_inline)) void
+ PreventElision (int output)
+ {
+   asm("nop" : "+r"(output) : : "memory");
+ }
+ #define HWY_BEFORE_NAMESPACE() HWY_PUSH_ATTRIBUTES (",cpu=power10")
+ HWY_BEFORE_NAMESPACE () namespace detail
+ {
+   template <typename, size_t, int> struct CappedTagChecker
+   {
+   };
+ }
+ template <typename T, size_t kLimit, int kPow2 = 0>
+ using CappedTag = detail::CappedTagChecker<T, kLimit, kPow2>;
+ template <typename, size_t, size_t kMinArg, class Test> struct ForeachCappedR
+ {
+   static void Do (size_t, size_t)
+   {
+     CappedTag<int, kMinArg> d;
+     Test () (int(), d);
+   }
+ };
+ template <class Test> struct ForPartialVectors
+ {
+   template <typename T> void operator() (T)
+   {
+     ForeachCappedR<T, 1, 1, Test>::Do (1, 1);
+   }
+ };
+ struct TestFloorLog2
+ {
+   template <class T, class DF> void operator() (T, DF) { PreventElision (0x10); }
+ };
+ void
+ TestAllFloorLog2 ()
+ {
+   ForPartialVectors<TestFloorLog2> () (float());
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr111828-2.C gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr111828-2.C
*** gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr111828-2.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr111828-2.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,52 ----
+ /* { dg-do compile } */
+ /* { dg-skip-if "HTM inline asm supported" { powerpc_as_p10_htm } } */
+ /* Use -Wno-attributes to suppress the possible warning on always_inline.  */
+ /* { dg-options "-O2 -mdejagnu-cpu=power9 -Wno-attributes" } */
+ 
+ /* Verify it emits error messages on non-empty inline asm.  */
+ 
+ #include <stddef.h>
+ #define HWY_PRAGMA(tokens) _Pragma (#tokens)
+ #define HWY_PUSH_ATTRIBUTES(targets_str) HWY_PRAGMA (GCC target targets_str)
+ __attribute__ ((always_inline)) void
+ PreventElision (int output) /* { dg-error "inlining failed in call to .* target specific option mismatch" } */
+ {
+   asm("nop" : "+r"(output) : : "memory");
+ }
+ #define HWY_BEFORE_NAMESPACE() HWY_PUSH_ATTRIBUTES (",cpu=power10")
+ HWY_BEFORE_NAMESPACE () namespace detail
+ {
+   template <typename, size_t, int> struct CappedTagChecker
+   {
+   };
+ }
+ template <typename T, size_t kLimit, int kPow2 = 0>
+ using CappedTag = detail::CappedTagChecker<T, kLimit, kPow2>;
+ template <typename, size_t, size_t kMinArg, class Test> struct ForeachCappedR
+ {
+   static void Do (size_t, size_t)
+   {
+     CappedTag<int, kMinArg> d;
+     Test () (int(), d);
+   }
+ };
+ template <class Test> struct ForPartialVectors
+ {
+   template <typename T> void operator() (T)
+   {
+     ForeachCappedR<T, 1, 1, Test>::Do (1, 1);
+   }
+ };
+ struct TestFloorLog2
+ {
+   template <class T, class DF> void operator() (T, DF)
+   {
+     PreventElision (0x10); /* { dg-message "called from here" } */
+   }
+ };
+ void
+ TestAllFloorLog2 ()
+ {
+   ForPartialVectors<TestFloorLog2> () (float());
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/asmgoto-6.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/asmgoto-6.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/asmgoto-6.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/asmgoto-6.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,26 ----
+ 
+ /* { dg-do compile } */
+ /* PR middle-end/110420 */
+ /* PR middle-end/103979 */
+ /* PR middle-end/98619 */
+ /* Test that the middle-end does not remove the asm goto
+    with an output. */
+ 
+ static int t;
+ void g(void);
+ 
+ void f(void)
+ {
+   int  __gu_val;
+   asm goto("#my asm "
+      : "=&r"(__gu_val)
+      :
+      :
+      : Efault);
+   t = __gu_val;
+   g();
+ Efault:
+ }
+ 
+ /* Make sure "my asm " is still in the assembly. */
+ /* { dg-final { scan-assembler "my asm " } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr110386-1.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr110386-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr110386-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr110386-1.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,9 ----
+ 
+ int f(int a)
+ {
+         int c = c < 0 ? c : -c;
+         c = -c;
+         unsigned b =  c;
+         unsigned t = b*a;
+         return t*t;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr110386-2.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr110386-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr110386-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr110386-2.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+ /* { dg-options "-mavx" } */
+ 
+ #include <immintrin.h>
+ 
+ __m128i do_stuff(__m128i XMM0) {
+ 	__m128i ABS0 = _mm_abs_epi32(XMM0);
+ 	__m128i MUL0 = _mm_mullo_epi32(ABS0, XMM0);
+ 	__m128i MUL1 = _mm_mullo_epi32(MUL0, MUL0);
+ 	return MUL1;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr111699-1.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr111699-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr111699-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr111699-1.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,7 ----
+ typedef unsigned char __attribute__((__vector_size__ (8))) V;
+ 
+ void
+ foo (V *v)
+ {
+   *v =  (V) 0x107B9A7FF >= (*v <= 0);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr113603.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr113603.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr113603.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr113603.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,40 ----
+ /* PR tree-optimization/113603 */
+ 
+ int a, e;
+ signed char b;
+ int *c;
+ signed char *d;
+ short f;
+ signed char g[3];
+ 
+ int *
+ foo (void)
+ {
+   for (int i = 0; i < 3; i++)
+     g[i] = 2;
+   int j[100][100] = { {}, {4} };
+   signed char *k = &g[1];
+   do
+     {
+       for (;;)
+ 	{
+ 	  if (c)
+ 	    break;
+ 	  return &a;
+ 	}
+       for (f = 0;; f++)
+ 	{
+ 	  for (b = 0; b < 2; b++)
+ 	    *c = j[b][f];
+ 	  if (e)
+ 	    d = k;
+ 	  *k = *d;
+ 	  if (*c)
+ 	    break;
+ 	  if (f)
+ 	    break;
+ 	}
+     }
+   while (f);
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr115143-1.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr115143-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr115143-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr115143-1.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,21 ----
+ /* PR tree-optimization/115143 */
+ /* This used to ICE.
+    minmax part of phiopt would transform,
+    would transform `a!=0?min(a, b) : 0` into `min(a,b)`
+    which was correct except b was defined by a phi in the inner
+    bb which was not handled. */
+ short a, d;
+ char b;
+ long c;
+ unsigned long e, f;
+ void g(unsigned long h) {
+   if (c ? e : b)
+     if (e)
+       if (d) {
+         a = f ? ({
+           unsigned long i = d ? f : 0, j = e ? h : 0;
+           i < j ? i : j;
+         }) : 0;
+       }
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr115143-2.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr115143-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr115143-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr115143-2.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,30 ----
+ /* { dg-options "-fgimple" } */
+ /* PR tree-optimization/115143 */
+ /* This used to ICE.
+    minmax part of phiopt would transform,
+    would transform `a!=0?min(a, b) : 0` into `min(a,b)`
+    which was correct except b was defined by a phi in the inner
+    bb which was not handled. */
+ unsigned __GIMPLE (ssa,startwith("phiopt"))
+ foo (unsigned a, unsigned b)
+ {
+   unsigned j;
+   unsigned _23;
+   unsigned _12;
+ 
+   __BB(2):
+   if (a_6(D) != 0u)
+     goto __BB3;
+   else
+     goto __BB4;
+ 
+   __BB(3):
+   j_10 = __PHI (__BB2: b_11(D));
+   _23 = __MIN (a_6(D), j_10);
+   goto __BB4;
+ 
+   __BB(4):
+   _12 = __PHI (__BB3: _23, __BB2: 0u);
+   return _12;
+ 
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr115143-3.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr115143-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr115143-3.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr115143-3.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,29 ----
+ /* { dg-options "-fgimple" } */
+ /* PR tree-optimization/115143 */
+ /* This used to ICE.
+    minmax part of phiopt would transform,
+    would transform `a!=0?min(a, b) : 0` into `min(a,b)`
+    which was correct except b was defined by a phi in the inner
+    bb which was not handled. */
+ unsigned __GIMPLE (ssa,startwith("phiopt"))
+ foo (unsigned a, unsigned b)
+ {
+   unsigned j;
+   unsigned _23;
+   unsigned _12;
+ 
+   __BB(2):
+   if (a_6(D) > 0u)
+     goto __BB3;
+   else
+     goto __BB4;
+ 
+   __BB(3):
+   j_10 = __PHI (__BB2: b_7(D));
+   _23 = __MIN (a_6(D), j_10);
+   goto __BB4;
+ 
+   __BB(4):
+   _12 = __PHI (__BB3: _23, __BB2: 0u);
+   return _12;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/20230630-1.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/20230630-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/20230630-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/20230630-1.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,23 ----
+ struct S {
+   short int i : 12;
+   char c1 : 1;
+   char c2 : 1;
+   char c3 : 1;
+   char c4 : 1;
+ };
+ 
+ int main (void)
+ {
+   struct S s0 = { 341, 1, 1, 1, 1 };
+   char *p = (char *) &s0;
+ 
+ #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+   if (*p != 85)
+     __builtin_abort ();
+ #elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   if (*p != 21)
+     __builtin_abort ();
+ #endif
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/20230630-2.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/20230630-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/20230630-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/20230630-2.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,29 ----
+ #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+ #define REVERSE_SSO __attribute__((scalar_storage_order("big-endian")));
+ #else
+ #define REVERSE_SSO __attribute__((scalar_storage_order("little-endian")));
+ #endif
+ 
+ struct S {
+   short int i : 12;
+   char c1 : 1;
+   char c2 : 1;
+   char c3 : 1;
+   char c4 : 1;
+ } REVERSE_SSO;
+ 
+ int main (void)
+ {
+   struct S s0 = { 341, 1, 1, 1, 1 };
+   char *p = (char *) &s0;
+ 
+ #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+   if (*p != 21)
+     __builtin_abort ();
+ #elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   if (*p != 85)
+     __builtin_abort ();
+ #endif
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/20230630-3.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/20230630-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/20230630-3.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/20230630-3.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,27 ----
+ struct S {
+   int i : 24;
+   char c1 : 1;
+   char c2 : 1;
+   char c3 : 1;
+   char c4 : 1;
+   char c5 : 1;
+   char c6 : 1;
+   char c7 : 1;
+   char c8 : 1;
+ };
+ 
+ int main (void)
+ {
+   struct S s0 = { 1193046, 1, 1, 1, 1, 1, 1, 1, 1 };
+   char *p = (char *) &s0;
+ 
+ #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+   if (*p != 86)
+     __builtin_abort ();
+ #elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   if (*p != 18)
+     __builtin_abort ();
+ #endif
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/20230630-4.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/20230630-4.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/20230630-4.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/20230630-4.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,33 ----
+ #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+ #define REVERSE_SSO __attribute__((scalar_storage_order("big-endian")));
+ #else
+ #define REVERSE_SSO __attribute__((scalar_storage_order("little-endian")));
+ #endif
+ 
+ struct S {
+   int i : 24;
+   char c1 : 1;
+   char c2 : 1;
+   char c3 : 1;
+   char c4 : 1;
+   char c5 : 1;
+   char c6 : 1;
+   char c7 : 1;
+   char c8 : 1;
+ } REVERSE_SSO;
+ 
+ int main (void)
+ {
+   struct S s0 = { 1193046, 1, 1, 1, 1, 1, 1, 1, 1 };
+   char *p = (char *) &s0;
+ 
+ #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+   if (*p != 18)
+     __builtin_abort ();
+ #elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   if (*p != 86)
+     __builtin_abort ();
+ #endif
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr108789.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr108789.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr108789.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr108789.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,39 ----
+ /* PR middle-end/108789 */
+ 
+ int
+ add (unsigned *r, const unsigned *a, const unsigned *b)
+ {
+   return __builtin_add_overflow (*a, *b, r);
+ }
+ 
+ int
+ mul (unsigned *r, const unsigned *a, const unsigned *b)
+ {
+   return __builtin_mul_overflow (*a, *b, r);
+ }
+ 
+ int
+ main ()
+ {
+   unsigned x;
+ 
+   /* 1073741824U + 1073741824U should not overflow.  */
+   x = (__INT_MAX__ + 1U) / 2;
+   if (add (&x, &x, &x))
+     __builtin_abort ();
+ 
+   /* 256U * 256U should not overflow */
+   x = 1U << (sizeof (int) * __CHAR_BIT__ / 4);
+   if (mul (&x, &x, &x))
+     __builtin_abort ();
+ 
+   /* 2147483648U + 2147483648U should overflow */
+   x = __INT_MAX__ + 1U;
+   if (!add (&x, &x, &x))
+     __builtin_abort ();
+ 
+   /* 65536U * 65536U should overflow */
+   x = 1U << (sizeof (int) * __CHAR_BIT__ / 2);
+   if (!mul (&x, &x, &x))
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr109778.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr109778.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr109778.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr109778.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,26 ----
+ /* PR tree-optimization/109778 */
+ 
+ int a, b, c, d, *e = &c;
+ 
+ static inline unsigned
+ foo (unsigned char x)
+ {
+   x = 1 | x << 1;
+   x = x >> 4 | x << 4;
+   return x;
+ }
+ 
+ static inline void
+ bar (unsigned x)
+ {
+   *e = 8 > foo (x + 86) - 86;
+ }
+ 
+ int
+ main ()
+ {
+   d = a && b;
+   bar (d + 4);
+   if (c != 1)
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr110115.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr110115.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr110115.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr110115.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,45 ----
+ /* PR middle-end/110115 */
+ 
+ int a;
+ signed char b;
+ 
+ static int
+ foo (signed char *e, int f)
+ {
+   int d;
+   for (d = 0; d < f; d++)
+     e[d] = 0;
+   return d;
+ }
+ 
+ int
+ bar (signed char e, int f)
+ {
+   signed char h[20];
+   int i = foo (h, f);
+   return i;
+ }
+ 
+ int
+ baz ()
+ {
+   switch (a)
+     {
+     case 'f':
+       return 0;
+     default:
+       return ~0;
+     }
+ }
+ 
+ int
+ main ()
+ {
+   {
+     signed char *k[3];
+     int d;
+     for (d = 0; bar (8, 15) - 15 + d < 1; d++)
+       k[baz () + 1] = &b;
+     *k[0] = -*k[0];
+   }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr110914.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr110914.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr110914.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr110914.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,22 ----
+ /* PR tree-optimization/110914 */
+ 
+ __attribute__ ((noipa)) int
+ foo (const char *s, unsigned long l)
+ {
+   unsigned char r = 0;
+   __builtin_memcpy (&r, s, l != 0);
+   return r;
+ }
+ 
+ int
+ main ()
+ {
+   const char *p = "123456";
+   int a = foo (p, __builtin_strlen (p) - 5);
+   int b = foo (p, __builtin_strlen (p) - 6);
+   if (a != '1')
+     __builtin_abort ();
+   if (b != 0)
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111331-1.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111331-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111331-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111331-1.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,17 ----
+ int a;
+ int b;
+ int c(int d, int e, int f) {
+   if (d < e)
+     return e;
+   if (d > f)
+     return f;
+   return d;
+ }
+ int main() {
+   int g = -1;
+   a = c(b + 30, 29, g + 29);
+   volatile t = a;
+   if (t != 28)
+     __builtin_abort();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111331-2.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111331-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111331-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111331-2.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,19 ----
+ 
+ int a;
+ int b;
+ 
+ int main() {
+   int d = b+30;
+   {
+         int t;
+         if (d < 29)
+           t =  29;
+         else
+           t = (d > 28) ? 28 : d;
+     a = t;
+   }
+   volatile int t = a;
+   if (a != 28)
+     __builtin_abort();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111331-3.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111331-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111331-3.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111331-3.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,15 ----
+ int a;
+ int b;
+ 
+ int main() {
+   int d = b+30;
+   {
+     int t;
+     t = d < 29 ? 29 : ((d > 28) ? 28 : d);
+     a = t;
+   }
+   volatile int t = a;
+   if (a != 28)
+     __builtin_abort();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111408.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111408.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111408.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111408.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,26 ----
+ /* PR target/111408 */
+ 
+ int a, b, c, d;
+ short e;
+ 
+ int
+ foo ()
+ {
+   c = a % (sizeof (int) * 8);
+   if (b & 1 << c)
+     return -1;
+   return 0;
+ }
+ 
+ int
+ main ()
+ {
+   for (; e != 1; e++)
+     {
+       int g = foo ();
+       if (g + d - 9 + d)
+ 	continue;
+       for (;;)
+ 	__builtin_abort ();
+     }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111422.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111422.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111422.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111422.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,39 ----
+ /* PR middle-end/111422 */
+ 
+ int a, b;
+ int *c = &b;
+ unsigned d;
+ signed char e;
+ int f = 1;
+ 
+ int
+ foo (int k, signed char *l)
+ {
+   if (k < 6)
+     return a;
+   l[0] = l[1] = l[k - 1] = 8;
+   return 0;
+ }
+ 
+ int
+ bar (int k)
+ {
+   signed char g[11];
+   int h = foo (k, g);
+   return h;
+ }
+ 
+ int
+ main ()
+ {
+   for (; b < 8; b = b + 1)
+     ;
+   int j;
+   int *n[8];
+   for (j = 0; 18446744073709551608ULL + bar (*c) + *c + j < 2; j++)
+     n[j] = &f;
+   for (; e <= 4; e++)
+     d = *n[0] == f;
+   if (d != 1)
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr90348.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr90348.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr90348.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr90348.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,38 ----
+ /* PR middle-end/90348 */
+ 
+ void __attribute__ ((noipa))
+ set_one (unsigned char *ptr)
+ {
+   *ptr = 1;
+ }
+ 
+ void __attribute__ ((noipa))
+ check_zero (unsigned char const *in, unsigned int len)
+ {
+   for (unsigned int i = 0; i < len; ++i)
+     if (in[i] != 0)
+       __builtin_abort ();
+ }
+ 
+ static void
+ set_one_on_stack (void)
+ {
+   unsigned char buf[1];
+   set_one (buf);
+ }
+ 
+ int
+ main ()
+ {
+   for (int i = 0; i <= 4; ++i)
+     {
+       unsigned char in[4];
+       for (int j = 0; j < i; ++j)
+ 	{
+ 	  in[j] = 0;
+ 	  set_one_on_stack ();
+ 	}
+       check_zero (in, i);
+     }
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/Wfree-nonheap-object-7.c gcc-12.4.0/gcc/testsuite/gcc.dg/Wfree-nonheap-object-7.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/Wfree-nonheap-object-7.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/Wfree-nonheap-object-7.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,26 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -Wfree-nonheap-object" } */
+ 
+ struct local_caches *get_local_caches_lcs;
+ void *calloc(long, long);
+ void *realloc();
+ 
+ struct local_caches {
+   int *t_mem_caches;
+ };
+ 
+ struct local_caches *get_local_caches() {
+   if (get_local_caches_lcs)
+     return get_local_caches_lcs;
+   get_local_caches_lcs = calloc(1, 0);
+   return get_local_caches_lcs;
+ }
+ 
+ void libtrace_ocache_free() {
+   struct local_caches lcs = *get_local_caches(), __trans_tmp_1 = lcs;
+   {
+     struct local_caches *lcs = &__trans_tmp_1;
+     lcs->t_mem_caches += 10;
+     __trans_tmp_1.t_mem_caches = realloc(__trans_tmp_1.t_mem_caches, sizeof(int)); // { dg-warning "called on pointer (?:(?!PHI).)*nonzero offset" }
+   }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/analyzer/analyzer.exp gcc-12.4.0/gcc/testsuite/gcc.dg/analyzer/analyzer.exp
*** gcc-12.3.0/gcc/testsuite/gcc.dg/analyzer/analyzer.exp	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/analyzer/analyzer.exp	Thu Jun 20 08:08:07 2024
*************** if [info exists DEFAULT_CFLAGS] then {
*** 32,37 ****
--- 32,45 ----
  # If a testcase doesn't have special options, use these.
  set DEFAULT_CFLAGS "-fanalyzer -Wanalyzer-too-complex -fanalyzer-call-summaries"
  
+ if { [istarget "*-*-darwin*" ] } {
+   # On macOS, system headers redefine by default some macros (memcpy,
+   # memmove, etc) to checked versions, which defeats the analyzer. We
+   # want to turn this off.
+   # See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104042
+   set DEFAULT_CFLAGS "$DEFAULT_CFLAGS -D_FORTIFY_SOURCE=0"
+ }
+ 
  # Initialize `dg'.
  dg-init
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/asan/pr110027.c gcc-12.4.0/gcc/testsuite/gcc.dg/asan/pr110027.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/asan/pr110027.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/asan/pr110027.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,50 ----
+ /* PR middle-end/110027 */
+ /* { dg-do run } */
+ /* { dg-additional-options "-fstack-protector-strong" { target fstack_protector } } */
+ /* { dg-set-target-env-var ASAN_OPTIONS "detect_stack_use_after_return=1" } */
+ 
+ struct __attribute__((aligned (128))) S { char s[128]; };
+ struct __attribute__((aligned (64))) T { char s[192]; };
+ struct __attribute__((aligned (32))) U { char s[256]; };
+ struct __attribute__((aligned (64))) V { char s[320]; };
+ struct __attribute__((aligned (128))) W { char s[512]; };
+ 
+ __attribute__((noipa)) void
+ foo (void *p, void *q, void *r, void *s)
+ {
+   if (((__UINTPTR_TYPE__) p & 31) != 0
+       || ((__UINTPTR_TYPE__) q & 127) != 0
+       || ((__UINTPTR_TYPE__) r & 63) != 0)
+     __builtin_abort ();
+   (void *) s;
+ }
+ 
+ __attribute__((noipa)) int
+ bar (void)
+ {
+   struct U u;
+   struct S s;
+   struct T t;
+   char p[4];
+   foo (&u, &s, &t, &p);
+   return 42;
+ }
+ 
+ __attribute__((noipa)) int
+ baz (void)
+ {
+   struct W w;
+   struct U u;
+   struct V v;
+   char p[4];
+   foo (&u, &w, &v, &p);
+   return 42;
+ }
+ 
+ int
+ main ()
+ {
+   bar ();
+   baz ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/asan/pr114956.c gcc-12.4.0/gcc/testsuite/gcc.dg/asan/pr114956.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/asan/pr114956.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/asan/pr114956.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,26 ----
+ /* PR sanitizer/114956 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fsanitize=address,null" } */
+ 
+ int **a;
+ void qux (int *);
+ 
+ __attribute__((always_inline)) static inline int *
+ foo (void)
+ {
+   int b[1];
+   qux (b);
+   return a[1];
+ }
+ 
+ __attribute__((no_sanitize_address)) void
+ bar (void)
+ {
+   *a = foo ();
+ }
+ 
+ void
+ baz (void)
+ {
+   bar ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/asan/pr115172.c gcc-12.4.0/gcc/testsuite/gcc.dg/asan/pr115172.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/asan/pr115172.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/asan/pr115172.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,20 ----
+ /* PR sanitizer/115172 */
+ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+ /* { dg-options "-O2 -fsanitize=address,bool -ffat-lto-objects -fdump-tree-asan1" } */
+ /* { dg-final { scan-tree-dump-not "\.ASAN_CHECK " "asan1" } } */
+ 
+ #ifdef __x86_64__
+ #define SEG __seg_gs
+ #else
+ #define SEG __seg_fs
+ #endif
+ 
+ extern struct S { _Bool b; } s;
+ void bar (void);
+ 
+ void
+ foo (void)
+ {
+   if (*(volatile _Bool SEG *) (__UINTPTR_TYPE__) &s.b)
+     bar ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/c23-attr-syntax-8.c gcc-12.4.0/gcc/testsuite/gcc.dg/c23-attr-syntax-8.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/c23-attr-syntax-8.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/c23-attr-syntax-8.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,12 ----
+ /* PR c/114007 */
+ /* { dg-do compile } */
+ /* { dg-options "-std=c11" } */
+ 
+ #if __has_c_attribute (gnu::unused)
+ [[gnu::unused]]
+ #endif
+ int i;
+ #if __has_cpp_attribute (gnu::unused)
+ [[gnu::unused]]
+ #endif
+ int j;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/darwin-ld-2.c gcc-12.4.0/gcc/testsuite/gcc.dg/darwin-ld-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/darwin-ld-2.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/darwin-ld-2.c	Thu Jun 20 08:08:08 2024
***************
*** 3,8 ****
--- 3,9 ----
  
  /* { dg-options "-bind_at_load" } */
  /* { dg-do link { target *-*-darwin* } } */
+ /* { dg-prune-output "-bind_at_load is deprecated" } */
  
  int main()
  {
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/darwin-minversion-link.c gcc-12.4.0/gcc/testsuite/gcc.dg/darwin-minversion-link.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/darwin-minversion-link.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/darwin-minversion-link.c	Thu Jun 20 08:08:08 2024
***************
*** 17,22 ****
--- 17,24 ----
  /* { dg-additional-options "-mmacosx-version-min=010.015.06 -DCHECK=101506" { target *-*-darwin19* } } */
  /* { dg-additional-options "-mmacosx-version-min=011.000.00 -DCHECK=110000" { target *-*-darwin20* } } */
  /* { dg-additional-options "-mmacosx-version-min=012.000.00 -DCHECK=120000" { target *-*-darwin21* } } */
+ /* { dg-additional-options "-mmacosx-version-min=013.000.00 -DCHECK=130000" { target *-*-darwin22* } } */
+ /* { dg-additional-options "-mmacosx-version-min=014.000.00 -DCHECK=140000" { target *-*-darwin23* } } */
  
  int
  main ()
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/darwin-segaddr.c gcc-12.4.0/gcc/testsuite/gcc.dg/darwin-segaddr.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/darwin-segaddr.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/darwin-segaddr.c	Thu Jun 20 08:08:08 2024
***************
*** 2,7 ****
--- 2,8 ----
  /* { dg-do run { target *-*-darwin* } } */
  /* { dg-options "-O0 -segaddr __TEST 0x200000 -fno-pie" { target { *-*-darwin* && { ! lp64 } } } } */
  /* { dg-options "-O0 -segaddr __TEST 0x110000000 -fno-pie" { target { *-*-darwin* && lp64 } } } */
+ /* { dg-prune-output "-no_pie is deprecated when targeting new OS versions" } */
  
  extern void abort ();
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/debug/dwarf2/inline4.c gcc-12.4.0/gcc/testsuite/gcc.dg/debug/dwarf2/inline4.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/debug/dwarf2/inline4.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/debug/dwarf2/inline4.c	Thu Jun 20 08:08:08 2024
***************
*** 2,8 ****
     the DW_TAG_inlined_subroutine and the DW_TAG_variable for the local.  */
  /* { dg-options "-O -gdwarf -dA" } */
  /* { dg-do compile } */
! /* { dg-final { scan-assembler "DW_TAG_inlined_subroutine\[^\\(\]*\\(\[^\\)\]*\\)\[^\\(\]*\\(DIE \\(0x\[0-9a-f\]*\\) DW_TAG_formal_parameter\[^\\(\]*\\(DIE \\(0x\[0-9a-f\]*\\) DW_TAG_variable" } } */
  /* { dg-final { scan-assembler-times "DW_TAG_inlined_subroutine" 2 } } */
  
  static int foo (int i)
--- 2,8 ----
     the DW_TAG_inlined_subroutine and the DW_TAG_variable for the local.  */
  /* { dg-options "-O -gdwarf -dA" } */
  /* { dg-do compile } */
! /* { dg-final { scan-assembler "DW_TAG_inlined_subroutine\[^\\(\]*\(\|\\(\[^\\)\]*\\)\)\[^\\(\]*\\(DIE \\(0x\[0-9a-f\]*\\) DW_TAG_formal_parameter\[^\\(\]*\\(DIE \\(0x\[0-9a-f\]*\\) DW_TAG_variable" } } */
  /* { dg-final { scan-assembler-times "DW_TAG_inlined_subroutine" 2 } } */
  
  static int foo (int i)
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/debug/dwarf2/pr111080.c gcc-12.4.0/gcc/testsuite/gcc.dg/debug/dwarf2/pr111080.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/debug/dwarf2/pr111080.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/debug/dwarf2/pr111080.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,18 ----
+ /* { dg-do compile } */
+ /* { dg-options "-save-temps -gdwarf-3 -dA" } */
+ 
+ struct foo {
+         int field_number_1;
+         int field_number_2;
+         int field_number_3;
+         int field_number_4;
+         int field_number_5;
+ };
+ 
+ typedef int fun_t(struct foo *restrict);
+ 
+ int main() {
+         return 0;
+ }
+ 
+ /* { dg-final { scan-assembler-not "DW_TAG_structure_type" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/debug/pr112718.c gcc-12.4.0/gcc/testsuite/gcc.dg/debug/pr112718.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/debug/pr112718.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/debug/pr112718.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target lto } */
+ /* { dg-options "-g -fdebug-types-section -flto -ffat-lto-objects" } */
+ 
+ struct {
+   int h;
+   unsigned char data[20 + 24 * 6];
+ } _EC_X9_62_PRIME_192V2;
+ struct {
+   int h;
+   unsigned char data[20 + 24 * 6];
+ } _EC_X9_62_PRIME_192V3;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/float_opposite_arm-1.c gcc-12.4.0/gcc/testsuite/gcc.dg/float_opposite_arm-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/float_opposite_arm-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/float_opposite_arm-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,17 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O1 -fdump-tree-original -fdump-tree-optimized" } */
+ /* { dg-add-options ieee } */
+ /* PR middle-end/95351 */
+ 
+ int Foo(double possiblyNAN, double b, double c)
+ {
+     return (possiblyNAN <= 2.0) || ((possiblyNAN  > 2.0) && (b > c));
+ }
+ 
+ /* Make sure we don't remove either >/<=  */
+ 
+ /* { dg-final { scan-tree-dump "possiblyNAN > 2.0e.0" "original" } } */
+ /* { dg-final { scan-tree-dump "possiblyNAN_\[0-9\]+.D. > 2.0e.0" "optimized" } } */
+ 
+ /* { dg-final { scan-tree-dump "possiblyNAN <= 2.0e.0" "original" } } */
+ /* { dg-final { scan-tree-dump "possiblyNAN_\[0-9\]+.D. <= 2.0e.0" "optimized" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/framework-1.c gcc-12.4.0/gcc/testsuite/gcc.dg/framework-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/framework-1.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/framework-1.c	Thu Jun 20 08:08:08 2024
***************
*** 1,4 ****
  /* { dg-do compile { target *-*-darwin* } } */
  /* { dg-options "-F." } */
  
! #include <Kernel/string.h>
--- 1,10 ----
  /* { dg-do compile { target *-*-darwin* } } */
  /* { dg-options "-F." } */
  
! /* The intent of the test is to show that we find a framework that
!    is installed in /System/Library/Frameworks when the user has added
!    a '-F' option.  The trick is to choose some header that is present
!    for all the Darwin versions we support and that does not contain any
!    content we cannot parse.  */
! 
! #include <IOKit/IOReturn.h>
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/ipa/ipa-icf-38.c gcc-12.4.0/gcc/testsuite/gcc.dg/ipa/ipa-icf-38.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/ipa/ipa-icf-38.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/ipa/ipa-icf-38.c	Thu Jun 20 08:08:08 2024
***************
*** 1,4 ****
--- 1,5 ----
  /* { dg-do link } */
+ /* { dg-require-alias "" } */
  /* { dg-options "-O2 -fdump-ipa-icf-optimized -flto -fdump-tree-optimized" } */
  /* { dg-require-effective-target lto } */
  /* { dg-additional-sources "ipa-icf-38a.c" }*/
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/ipa/pr108007.c gcc-12.4.0/gcc/testsuite/gcc.dg/ipa/pr108007.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/ipa/pr108007.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/ipa/pr108007.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,32 ----
+ /* { dg-do run } */
+ /* { dg-options "-Os -fno-dce -fno-tree-dce -g" } */
+ 
+ /* This tests that when IPA-SRA removes a LHS of a call statement which, in the
+    original source, is fed into a useless operation which however can trap when
+    given nonsensical input, that we remove it even when the user has turned off
+    normal DCE.  */
+ 
+ int a, b, d, e, f = 10000000, h;
+ short c, g;
+ static int *i() {
+   g = f;
+  L:
+   h = e = ~g;
+   g = ~f % g & e;
+   if (!g)
+     goto L;
+   c++;
+   while (g < 1)
+     ;
+   return &a;
+ }
+ static void k() {
+   int *l, m = 2;
+   l = i();
+   for (; d < 1; d++)
+     m |= *l >= b;
+ }
+ int main() {
+   k();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/ipa/pr112616.c gcc-12.4.0/gcc/testsuite/gcc.dg/ipa/pr112616.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/ipa/pr112616.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/ipa/pr112616.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,28 ----
+ /* { dg-do run } */
+ /* { dg-options "-O2" } */
+ 
+ unsigned a;
+ int b, d, e, f = 2, g, h = 1, *i = &b;
+ volatile int c = 1;
+ static int *o() {
+   long m = ~a;
+   int j = f / b, k = f - 1, n = m << -1 / ~g / k;
+   if (j && n)
+     c;
+   return &e;
+ }
+ static long p() {
+   int *q = 0, **r = &q;
+   if (c) {
+     *i = h;
+     *r = o();
+   }
+   return *q;
+ }
+ int main() {
+   p();
+   int *l = 0;
+   if (d)
+     c = *l;
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/ipa/pr114247.c gcc-12.4.0/gcc/testsuite/gcc.dg/ipa/pr114247.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/ipa/pr114247.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/ipa/pr114247.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,31 ----
+ /* { dg-do run } */
+ /* { dg-options "-O2 -fsigned-char -fno-strict-aliasing -fwrapv" } */
+ 
+ union a {
+   unsigned short b;
+   int c;
+   signed short d;
+ };
+ int e, f = 1, g;
+ long h;
+ const int **i;
+ void j(union a k, int l, unsigned m) {
+   const int *a[100];
+   i = &a[0];
+   h = k.d;
+ }
+ static int o(union a k) {
+   k.d = -1;
+   while (1)
+     if (f)
+       break;
+   j(k, g, e);
+   return 0;
+ }
+ int main() {
+   union a n = {1};
+   o(n);
+   if (h != -1)
+     __builtin_abort();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr109778_0.c gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr109778_0.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr109778_0.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr109778_0.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,22 ----
+ /* PR tree-optimization/109778 */
+ /* { dg-lto-do run } */
+ /* { dg-lto-options { "-O2 -flto" } } */
+ /* { dg-require-effective-target int32 } */
+ 
+ int bar (int);
+ 
+ __attribute__((noipa)) int
+ foo (int x)
+ {
+   x = bar (x);
+   x = (x << 16) | (int) ((unsigned) x >> 16);
+   return x & 0x10000000;
+ }
+ 
+ int
+ main ()
+ {
+   if (foo (0) || foo (-1))
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr109778_1.c gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr109778_1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr109778_1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr109778_1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,7 ----
+ int
+ bar (int x)
+ {
+   x &= 0x22222222;
+   x |= (int) 0xf1234567U;
+   return x;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr113907_0.c gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr113907_0.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr113907_0.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr113907_0.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,18 ----
+ /* { dg-lto-do run } */
+ /* { dg-lto-options {{-O3 -flto}} }  */
+ 
+ struct bar {int a;};
+ struct foo {int a;};
+ struct barp {struct bar *f; struct bar *g;};
+ extern struct foo **ptr;
+ int test2 (void *);
+ int test3 (void *);
+ int
+ testb(void)
+ {
+   struct bar *fp;
+   test2 ((void *)&fp);
+   fp = (void *) 0;
+   (*ptr)++;
+   test3 ((void *)&fp);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr113907_1.c gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr113907_1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr113907_1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr113907_1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,35 ----
+ __attribute__((used)) int val,val2 = 1;
+ 
+ struct foo {int a;};
+ 
+ struct foo **ptr;
+ 
+ __attribute__ ((noipa))
+ int
+ test2 (void *a)
+ {
+   ptr = (struct foo **)a;
+ }
+ int test3 (void *a);
+ 
+ int
+ test(void)
+ {
+   struct foo *fp;
+   test2 ((void *)&fp);
+   fp = (void *) 0;
+   (*ptr)++;
+   test3 ((void *)&fp);
+ }
+ 
+ int testb (void);
+ 
+ int
+ main()
+ {
+   for (int i = 0; i < val2; i++)
+   if (val)
+     testb ();
+   else
+     test();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr113907_2.c gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr113907_2.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr113907_2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr113907_2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-options "-O3 -flto -fno-strict-aliasing" }  */
+ 
+ __attribute__ ((noinline))
+ int
+ test3 (void *a)
+ {
+   if (!*(void **)a)
+           __builtin_abort ();
+   return 0;
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pie-2.c gcc-12.4.0/gcc/testsuite/gcc.dg/pie-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pie-2.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pie-2.c	Thu Jun 20 08:08:08 2024
***************
*** 2,7 ****
--- 2,8 ----
  /* { dg-options "-fPIE" } */
  /* { dg-require-effective-target pie } */
  /* { dg-skip-if "__PIC__ is always 1 for MIPS" { mips*-*-* } } */
+ /* { dg-skip-if "__PIE__ is often not defined on darwin" { *-*-darwin* } } */
  
  #if __PIC__ != 2
  # error __PIC__ is not 2!
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pie-7.c gcc-12.4.0/gcc/testsuite/gcc.dg/pie-7.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pie-7.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pie-7.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
--- 1,6 ----
  /* { dg-do run { target pie } } */
  /* { dg-options "-fno-pie -no-pie" } */
+ /* { dg-prune-output "-no_pie is deprecated when targeting new OS versions" } */
  
  int main(void)
  {
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr105522.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr105522.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr105522.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr105522.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,17 ----
+ /* { dg-do compile { target *-*-darwin* } } */
+ typedef const struct __CFString * CFStringRef;
+ 
+ /* This used to ICE on powerpc darwin, in decode_addr_const.  */
+ const void
+ * create_usage_match(const unsigned int page, const unsigned int usage, int
+ *okay)
+ {
+ 
+   const void *keys[2] = 
+     { (void *) ((CFStringRef) __builtin___CFStringMakeConstantString (""
+       "DeviceUsagePage" ""))
+       , (void *) ((CFStringRef) __builtin___CFStringMakeConstantString (""
+       "DeviceUsage" ""))
+     };
+   return keys[1];
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr105660-1.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr105660-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr105660-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr105660-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,13 ----
+ /* PR105660
+  * { dg-do compile }
+  * { dg-options "-std=c17" }
+  */
+ 
+ void gatherConservativeVars(int, int, int, int, int, int, int Hnvar, int,
+                             int Hnyt, int Hnxyt, int, int Hstep, double[Hnyt],
+                             double[Hnvar][Hstep][Hnxyt]);
+ void gatherConservativeVars(int, int, int, int, int, int, int Hnvar, int, int Hnyt,
+                             int Hnxyt, int, int Hstep, double[Hnyt],
+                             double[Hnvar][Hstep][Hnxyt]);
+ 
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr105660-2.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr105660-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr105660-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr105660-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ /* PR105660
+  * { dg-do compile }
+  * { dg-options "-Wall -std=c17" }
+  */
+ 
+ 
+ struct bat_gen_conf_s;
+ void batch_generator_create2(struct bat_gen_conf_s* config, int D, int N, const long bat_dims[D][N], const long tot_dims[D][N], const long tot_strs[D][N], const _Complex float* data[D]);
+ void batch_generator_create2(struct bat_gen_conf_s* config, int D, int N, const long bat_dims[D][N], const long tot_dims[D][N], const long tot_strs[D][N], const _Complex float* data[D]);
+ 
+ 
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr107385.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr107385.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr107385.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr107385.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* PR middle-end/107385 */
+ /* { dg-do run { target lra } } */
+ /* { dg-options "-O2" } */
+ 
+ __attribute__((noipa)) int
+ foo (void)
+ {
+   int x;
+   asm goto ("": "=r" (x) : "0" (15) :: lab);
+   x = 6;
+ lab:
+   return x;
+ }
+ 
+ int
+ main ()
+ {
+   if (foo () != 6)
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr110079.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr110079.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr110079.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr110079.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,43 ----
+ /* PR rtl-optimization/110079 */
+ /* { dg-do compile { target lra } } */
+ /* { dg-options "-O2" } */
+ /* { dg-additional-options "-freorder-blocks-and-partition" { target freorder } } */
+ 
+ int a;
+ __attribute__((cold)) int bar (char *);
+ __attribute__((hot)) int baz (char *);
+ 
+ void
+ foo (void)
+ {
+ l1:
+   while (a)
+     ;
+   bar ("");
+   asm goto ("" : : : : l2);
+   asm ("");
+ l2:
+   goto l1;
+ }
+ 
+ void
+ qux (void)
+ {
+   asm goto ("" : : : : l1);
+   bar ("");
+   goto l1;
+ l1:
+   baz ("");
+ }
+ 
+ void
+ corge (void)
+ {
+   asm goto ("" : : : : l1);
+   baz ("");
+ l2:
+   return;
+ l1:
+   bar ("");
+   goto l2;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr110731.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr110731.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr110731.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr110731.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,17 ----
+ /* PR tree-optimization/110731 */
+ /* { dg-do run { target int128 } } */
+ /* { dg-options "-O2" } */
+ 
+ __int128
+ foo (void)
+ {
+   struct S { __int128 f : 119; } s = { ((__int128) -18014398509481984) << 64 };
+   return s.f / 2;
+ }
+ 
+ int
+ main ()
+ {
+   if (foo () != (((__int128) -9007199254740992) << 64))
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr111009.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr111009.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr111009.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr111009.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,38 ----
+ /* PR tree-optimization/111009 */
+ /* { dg-do run } */
+ /* { dg-options "-O3 -fno-strict-overflow" } */
+ 
+ struct dso {
+  struct dso * next;
+  int maj;
+ };
+ 
+ __attribute__((noipa)) static void __dso_id__cmp_(void) {}
+ 
+ __attribute__((noipa))
+ static int bug(struct dso * d, struct dso *dso)
+ {
+  struct dso **p = &d;
+  struct dso *curr = 0;
+ 
+  while (*p) {
+   curr = *p;
+   // prevent null deref below
+   if (!dso) return 1;
+   if (dso == curr) return 1;
+ 
+   int *a = &dso->maj;
+   // null deref
+   if (!(a && *a)) __dso_id__cmp_();
+ 
+   p = &curr->next;
+  }
+  return 0;
+ }
+ 
+ __attribute__((noipa))
+ int main(void) {
+     struct dso d = { 0, 0, };
+     bug(&d, 0);
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr111015.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr111015.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr111015.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr111015.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,28 ----
+ /* PR tree-optimization/111015 */
+ /* { dg-do run { target int128 } } */
+ /* { dg-options "-O2" } */
+ 
+ struct S { unsigned a : 4, b : 4; unsigned __int128 c : 70; } d;
+ 
+ __attribute__((noipa)) void
+ foo (unsigned __int128 x, unsigned char y, unsigned char z)
+ {
+   d.a = y;
+   d.b = z;
+   d.c = x;
+ }
+ 
+ int
+ main ()
+ {
+   foo (-1, 12, 5);
+   if (d.a != 12
+       || d.b != 5
+       || d.c != (-1ULL | (((unsigned __int128) 0x3f) << 64)))
+     __builtin_abort ();
+   foo (0x123456789abcdef0ULL | (((unsigned __int128) 26) << 64), 7, 11);
+   if (d.a != 7
+       || d.b != 11
+       || d.c != (0x123456789abcdef0ULL | (((unsigned __int128) 26) << 64)))
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr111039.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr111039.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr111039.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr111039.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,15 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O" } */
+ 
+ int _setjmp ();
+ void abcd ();
+ void abcde ();
+ void compiler_corruption_function(int flags)
+ {
+   int nowait = flags & 1048576, isexpand = flags & 8388608;
+   abcd();
+   _setjmp(flags);
+   if (nowait && isexpand)
+     flags &= 0;
+   abcde();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr111070.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr111070.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr111070.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr111070.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O" } */
+ 
+ /* common */
+ char c;
+ /* arrays must be 8 byte aligned, regardless of size */
+ char c_ary[1];
+ 
+ /* data */
+ char d = 1;
+ char d_ary[1] = {1};
+ 
+ int main ()
+ {
+   if (((unsigned long)&c_ary[0] & 7) != 0)
+     return 1;
+   if (((unsigned long)&d_ary[0] & 7) != 0)
+     return 1;
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr111407.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr111407.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr111407.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr111407.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,21 ----
+ /* PR tree-optimization/111407*/
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+ enum { SEND_TOFILE } __sigsetjmp();
+ void fclose();
+ void foldergets();
+ void sendpart_stats(int *p1, int a1, int b1) {
+  int *a = p1;
+  fclose();
+  p1 = 0;
+  long t = b1;
+  if (__sigsetjmp()) {
+    {
+      long t1 = a1;
+      a1+=1;
+      fclose(a1*(long)t1);
+    }
+  }
+  if (p1)
+    fclose();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr112733.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr112733.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr112733.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr112733.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ /* PR middle-end/112733 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+ 
+ signed char a, c;
+ short b;
+ 
+ void
+ foo (void)
+ {
+   signed char *e = &a;
+   c = foo != 0;
+   *e &= c;
+   for (; b; --b)
+     *e &= -128;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr112837.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr112837.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr112837.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr112837.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,11 ----
+ /* PR target/112837 */
+ /* { dg-do compile } */
+ /* { dg-options "-fcompare-elim -fprofile" } */
+ /* { dg-additional-options "-fpie" { target pie } } */
+ /* { dg-require-profiling "-fprofile" } */
+ 
+ void
+ foo (int i)
+ {
+   foo (i);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr112845.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr112845.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr112845.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr112845.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,9 ----
+ /* PR target/112845 */
+ /* { dg-do compile { target cet } } */
+ /* { dg-options "-Os -fcf-protection" } */
+ 
+ unsigned long long
+ foo (void)
+ {
+   return 0xfa1e0ff3ULL << 3;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr113013.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr113013.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr113013.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr113013.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,14 ----
+ /* PR tree-optimization/113013 */
+ /* { dg-do compile } */
+ /* { dg-options "-std=gnu99 -O2" } */
+ 
+ struct S { short x; } s;
+ void *foo () __attribute__((__alloc_size__(1)));
+ struct S *p;
+ 
+ __SIZE_TYPE__
+ bar (void)
+ {
+   p = foo (s);
+   return __builtin_dynamic_object_size (p, 0);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr113262.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr113262.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr113262.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr113262.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* PR c/113262 */
+ /* { dg-do compile } */
+ /* { dg-options "" } */
+ 
+ int [[gnu::copy ("")]] a;	/* { dg-error "'copy' attribute argument cannot be a string" } */
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr113907-1.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr113907-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr113907-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr113907-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,49 ----
+ /* PR middle-end/113907 */
+ /* { dg-do run } */
+ /* { dg-options "-O2" } */
+ /* { dg-additional-options "-minline-all-stringops" { target i?86-*-* x86_64-*-* } } */
+ 
+ static inline int
+ foo (int len, void *indata, void *outdata)
+ {
+   if (len < 0 || (len & 7) != 0)
+     return 0;
+   if (len != 0 && indata != outdata)
+     __builtin_memcpy (outdata, indata, len);
+   return len;
+ }
+ 
+ static inline int
+ bar (int len, void *indata, void *outdata)
+ {
+   if (len < 0 || (len & 1) != 0)
+     return 0;
+   if (len != 0 && indata != outdata)
+     __builtin_memcpy (outdata, indata, len);
+   return len;
+ }
+ 
+ int (*volatile p1) (int, void *, void *) = foo;
+ int (*volatile p2) (int, void *, void *) = bar;
+ 
+ __attribute__((noipa)) int
+ baz (int len, void *indata, void *outdata)
+ {
+   if ((len & 6) != 0)
+     bar (len, indata, outdata);
+   else
+     foo (len, indata, outdata);
+ }
+ 
+ struct S { char buf[64]; } s __attribute__((aligned (8)));
+ 
+ int
+ main ()
+ {
+   for (int i = 0; i < 64; ++i)
+     s.buf[i] = ' ' + i;
+   p2 (2, s.buf, s.buf + 33);
+   for (int i = 0; i < 64; ++i)
+     if (s.buf[i] != ' ' + ((i >= 33 && i < 35) ? i - 33 : i))
+       __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr114115.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr114115.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr114115.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr114115.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,24 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O0 -fprofile-generate -fdump-tree-optimized" } */
+ /* { dg-require-profiling "-fprofile-generate" } */
+ /* { dg-require-ifunc "" } */
+ 
+ void *foo_ifunc2() __attribute__((ifunc("foo_resolver")));
+ 
+ void bar(void)
+ {
+ }
+ 
+ static int f3()
+ {
+   bar ();
+   return 5;
+ }
+ 
+ void (*foo_resolver(void))(void)
+ {
+   f3();
+   return bar;
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "__gcov_indirect_call_profiler_v" "optimized" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr114310.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr114310.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr114310.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr114310.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* PR target/114310 */
+ /* { dg-do run { target int128 } } */
+ 
+ volatile __attribute__((aligned (sizeof (__int128_t)))) __int128_t v = 10;
+ 
+ int
+ main ()
+ {
+ #if __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16
+   if (__sync_val_compare_and_swap (&v, (__int128_t) 10, (__int128_t) 0) != 10)
+     __builtin_abort ();
+   if (__sync_val_compare_and_swap (&v, (__int128_t) 10, (__int128_t) 15) != 0)
+     __builtin_abort ();
+   if (__sync_val_compare_and_swap (&v, (__int128_t) 0, (__int128_t) 42) != 0)
+     __builtin_abort ();
+   if (__sync_val_compare_and_swap (&v, (__int128_t) 31, (__int128_t) 35) != 42)
+     __builtin_abort ();
+ #endif
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr114493-1.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr114493-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr114493-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr114493-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,19 ----
+ /* PR c/114493 */
+ /* { dg-do compile { target lto } } */
+ /* { dg-options "-O2 -flto" } */
+ 
+ void foo (void);
+ struct S;
+ struct S bar (struct S **);
+ struct S qux (const struct S **);
+ 
+ struct __attribute__((__may_alias__)) S {
+   int s;
+ };
+ 
+ struct S
+ baz (void)
+ {
+   foo ();
+   return (struct S) {};
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr114493-2.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr114493-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr114493-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr114493-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,26 ----
+ /* PR c/114493 */
+ /* { dg-do compile { target lto } } */
+ /* { dg-options "-O2 -flto -std=c2x" } */
+ 
+ void foo (void);
+ struct S;
+ struct S bar (struct S **);
+ struct S qux (const struct S **);
+ 
+ void
+ corge (void)
+ {
+   struct S { int s; } s;
+   s.s = 0;
+ }
+ 
+ struct __attribute__((__may_alias__)) S {
+   int s;
+ };
+ 
+ struct S
+ baz (void)
+ {
+   foo ();
+   return (struct S) {};
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr114753.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr114753.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr114753.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr114753.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,14 ----
+ /* PR middle-end/114753 */
+ /* { dg-do run } */
+ /* { dg-options "-O2 -ftrapv" } */
+ 
+ int
+ main ()
+ {
+   volatile long long i = __LONG_LONG_MAX__;
+   volatile long long j = 2;
+   long long k;
+   if (!__builtin_mul_overflow (i, j, &k) || k != -2LL)
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr114768.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr114768.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr114768.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr114768.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,10 ----
+ /* PR rtl-optimization/114768 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fdump-rtl-final" } */
+ /* { dg-final { scan-rtl-dump "\\\(mem/v:" "final" } } */
+ 
+ void
+ foo (int *p)
+ {
+   *p = *(volatile int *) p;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr114876.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr114876.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr114876.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr114876.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,34 ----
+ /* PR tree-optimization/114876 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fdump-tree-optimized" } */
+ /* { dg-final { scan-tree-dump-not "return \[01\];" "optimized" } } */
+ /* { dg-final { scan-tree-dump "return 3;" "optimized" } } */
+ /* { dg-final { scan-tree-dump "return 4;" "optimized" } } */
+ 
+ int
+ foo (void)
+ {
+   char buf[64];
+   return __builtin_sprintf (buf, "%lc%lc%lc", (__WINT_TYPE__) 0, (__WINT_TYPE__) 0, (__WINT_TYPE__) 0);
+ }
+ 
+ int
+ bar (void)
+ {
+   char buf[64];
+   return __builtin_sprintf (buf, "%c%c%c", 0, 0, 0);
+ }
+ 
+ int
+ baz (void)
+ {
+   char buf[64];
+   return __builtin_sprintf (buf, "%lc%lc%lca", (__WINT_TYPE__) 0, (__WINT_TYPE__) 0, (__WINT_TYPE__) 0);
+ }
+ 
+ int
+ qux (void)
+ {
+   char buf[64];
+   return __builtin_sprintf (buf, "%c%c%ca", 0, 0, 0);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr114902.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr114902.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr114902.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr114902.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,23 ----
+ /* PR rtl-optimization/114902 */
+ /* { dg-do run } */
+ /* { dg-options "-O1 -fno-tree-fre -fno-tree-forwprop -fno-tree-ccp -fno-tree-dominator-opts" } */
+ 
+ __attribute__((noipa))
+ int foo (int x)
+ {
+   int a = ~x;
+   int t = a & 1;
+   int e = -t;
+   int b = e >= -1;
+   if (b)
+     return 0;
+   __builtin_trap ();
+ }
+ 
+ int
+ main ()
+ {
+   foo (-1);
+   foo (0);
+   foo (1);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr115092.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr115092.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr115092.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr115092.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ /* PR rtl-optimization/115092 */
+ /* { dg-do run } */
+ /* { dg-options "-O1 -fgcse -ftree-pre -fno-tree-dominator-opts -fno-tree-fre -fno-guess-branch-probability" } */
+ 
+ int a, b, c = 1, d, e;
+ 
+ int
+ main ()
+ {
+   int f, g = a;
+   b = -2;
+   f = -(1 >> ((c && b) & ~a));
+   if (f <= b)
+     d = g / e;
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr83415.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr83415.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr83415.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr83415.c	Thu Jun 20 08:08:08 2024
*************** int
*** 7,12 ****
  main (int argc, short *argv[])
  {
    int i = argc;
!   y[i] = 7 - i; /* { dg-warning "read-only" } */
    return 0;
  }
--- 7,12 ----
  main (int argc, short *argv[])
  {
    int i = argc;
!   y[i] = 7 - i; /* { dg-error "read-only" } */
    return 0;
  }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/rtl/aarch64/pr111411.c gcc-12.4.0/gcc/testsuite/gcc.dg/rtl/aarch64/pr111411.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/rtl/aarch64/pr111411.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/rtl/aarch64/pr111411.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,57 ----
+ /* { dg-do compile { target aarch64*-*-* } } */
+ /* { dg-require-effective-target lp64 } */
+ /* { dg-options "-O -fdisable-rtl-postreload -fpeephole2 -fno-schedule-fusion" } */
+ 
+ extern int data[];
+ 
+ void __RTL (startwith ("ira")) foo (void *ptr)
+ {
+   (function "foo"
+     (param "ptr"
+       (DECL_RTL (reg/v:DI <0> [ ptr ]))
+       (DECL_RTL_INCOMING (reg/v:DI x0 [ ptr ]))
+     ) ;; param "ptr"
+     (insn-chain
+       (block 2
+ 	(edge-from entry (flags "FALLTHRU"))
+ 	(cnote 3 [bb 2] NOTE_INSN_BASIC_BLOCK)
+ 	(insn 4 (set (reg:DI <0>) (reg:DI x0)))
+ 	(insn 5 (set (reg:DI <1>)
+ 		     (plus:DI (reg:DI <0>) (const_int 768))))
+ 	(insn 6 (set (mem:SI (plus:DI (reg:DI <0>)
+ 				      (const_int 508)) [1 &data+508 S4 A4])
+ 		     (const_int 0)))
+ 	(insn 7 (set (mem:SI (plus:DI (reg:DI <1>)
+ 				      (const_int -256)) [1 &data+512 S4 A4])
+ 		     (const_int 0)))
+ 	(edge-to exit (flags "FALLTHRU"))
+       ) ;; block 2
+     ) ;; insn-chain
+   ) ;; function
+ }
+ 
+ void __RTL (startwith ("ira")) bar (void *ptr)
+ {
+   (function "bar"
+     (param "ptr"
+       (DECL_RTL (reg/v:DI <0> [ ptr ]))
+       (DECL_RTL_INCOMING (reg/v:DI x0 [ ptr ]))
+     ) ;; param "ptr"
+     (insn-chain
+       (block 2
+ 	(edge-from entry (flags "FALLTHRU"))
+ 	(cnote 3 [bb 2] NOTE_INSN_BASIC_BLOCK)
+ 	(insn 4 (set (reg:DI <0>) (reg:DI x0)))
+ 	(insn 5 (set (reg:DI <1>)
+ 		     (plus:DI (reg:DI <0>) (const_int 768))))
+ 	(insn 6 (set (mem:SI (plus:DI (reg:DI <1>)
+ 				      (const_int -256)) [1 &data+512 S4 A4])
+ 		     (const_int 0)))
+ 	(insn 7 (set (mem:SI (plus:DI (reg:DI <0>)
+ 				      (const_int 508)) [1 &data+508 S4 A4])
+ 		     (const_int 0)))
+ 	(edge-to exit (flags "FALLTHRU"))
+       ) ;; block 2
+     ) ;; insn-chain
+   ) ;; function
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/ssp-2.c gcc-12.4.0/gcc/testsuite/gcc.dg/ssp-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/ssp-2.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/ssp-2.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
--- 1,7 ----
  /* { dg-do run { target native } } */
  /* { dg-options "-fstack-protector" } */
  /* { dg-options "-fstack-protector -Wl,-multiply_defined,suppress" { target *-*-darwin* } } */
+ /* { dg-prune-output "-multiply_defined is obsolete" } */
  /* { dg-require-effective-target fstack_protector } */
  
  #include <stdlib.h>
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/tls/pr78796.c gcc-12.4.0/gcc/testsuite/gcc.dg/tls/pr78796.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/tls/pr78796.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/tls/pr78796.c	Thu Jun 20 08:08:08 2024
***************
*** 1,7 ****
  /* PR target/78796 */
  /* { dg-do run } */
  /* { dg-options "-O2" } */
! /* { dg-additional-options "-mcmodel=large" { target aarch64-*-* } } */
  /* { dg-require-effective-target tls_runtime } */
  /* { dg-add-options tls } */
  
--- 1,7 ----
  /* PR target/78796 */
  /* { dg-do run } */
  /* { dg-options "-O2" } */
! /* { dg-additional-options "-mcmodel=large -fno-pie -no-pie" { target aarch64-*-* } } */
  /* { dg-require-effective-target tls_runtime } */
  /* { dg-add-options tls } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110176.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110176.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110176.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110176.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,46 ----
+ /* { dg-do run } */
+ 
+ int f(_Bool t)
+ {
+         int tt = t;
+         unsigned x = -1;
+         int xx = x;
+         return xx <= tt;
+ }
+ 
+ int a, b;
+ void c() {}
+ __attribute__((noipa))
+ void h() {__builtin_abort();}
+ int d() {
+   unsigned f[1];
+   int i;
+   if (a)
+     goto h;
+   f[0] = -1;
+   while (1) {
+     c();
+     for (; a < 1; a++) {
+       if (0) {
+       j:
+         continue;
+       }
+       i = f[0];
+       if (a)
+         break;
+       b = i >= (b == 0);
+     }
+     if (!b) {
+       if (0) {
+       h:
+         goto j;
+       }
+       return 0;
+     }
+     h();
+   }
+ }
+ int main() {
+   d();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110298.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110298.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110298.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110298.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ 
+ int a, b, c, d, e;
+ int f() {
+   c = 0;
+   for (; c >= 0; c--) {
+     d = 0;
+     for (; d <= 0; d++) {
+       e = 0;
+       for (; d + c + e >= 0; e--)
+         ;
+       a = 1;
+       b = 0;
+       for (; a; ++b)
+         a *= 2;
+       for (; b + d >= 0;)
+         return 0;
+     }
+   }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110422.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110422.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110422.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110422.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do compile } */
+ 
+ struct T { int x; };
+ int foo(void) {
+   struct T v;
+   asm goto("" : "+r"(v.x) : : : lab);
+   return 0;
+ lab:
+   return -5;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110556.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110556.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110556.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110556.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,42 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target lp64 } */
+ /* { dg-additional-options "-fno-tree-fre -fno-delete-dead-exceptions -fnon-call-exceptions" } */
+ 
+ typedef __INT32_TYPE__ int32_t;
+ typedef __INT64_TYPE__ int64_t;
+ 
+ static int64_t __attribute__((noinline,noclone))
+ safe_mul_func_int64_t_s_s(int64_t si1, int64_t si2)
+ {
+   return ((((si1 > 0) && (si2 > 0) && (si1 > ( (9223372036854775807L) / si2)))
+            || ((si1 > 0) && (si2 <= 0) && (si2 < ( (-9223372036854775807L -1) / si1)))
+            || ((si1 <= 0) && (si2 > 0) && (si1 < ( (-9223372036854775807L -1) / si2)))
+            || ((si1 <= 0) && (si2 <= 0) && (si1 != 0) && (si2 < ( (9223372036854775807L) / si1))))
+           ? ((si1)) : si1 * si2);
+ }
+ 
+ static int32_t g_93 = 0x947A4BBFL;
+ static int32_t tt = 6;
+ int64_t ty, ty1;
+ 
+ static void func_34(void)
+ {
+  ty=safe_mul_func_int64_t_s_s (g_93, -1L) ;
+ }
+ static void func_30(void)
+ {
+   ty1=safe_mul_func_int64_t_s_s(0, tt);
+ }
+ static void func_6(void)
+ {
+  for (int g_9 = 5; (g_9 >= 0); g_9 -= 1)
+  {
+   func_34();
+   func_30 ();
+  }
+ }
+ 
+ int main ()
+ {
+  func_6();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110702.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110702.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110702.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110702.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,31 ----
+ /* { dg-do run } */
+ 
+ void abort (void);
+ 
+ int a, b, c, d;
+ long e[9][7][4];
+ 
+ void f()
+ {
+   for (; a >= 0; a--)
+     {
+       b = 0;
+       for (; b <= 3; b++)
+ 	{
+ 	  c = 0;
+ 	  for (; c <= 3; c++)
+ 	    {
+ 	      int *g = &d;
+ 	      *g = e[0][0][b] | e[a][b][a];
+ 	    }
+ 	}
+     }
+ }
+ 
+ int main()
+ {
+   f();
+   if (a != -1)
+     abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111137.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111137.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111137.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111137.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,30 ----
+ /* { dg-do run } */
+ 
+ int b[3][8];
+ short d;
+ volatile int t = 1;
+ 
+ void __attribute__((noipa))
+ foo()
+ {
+   int  g = t;
+   for (int e = 1; e >= 0; e--)
+     {
+       d = 1;
+       for (; d >= 0; d--)
+ 	{
+ 	  b[0][d * 2 + 1] = 0;
+ 	  b[g - 1 + d][0] ^= 1;
+ 	  b[0][d * 2 + 2] = 0;
+ 	  b[g - 1 + d][1] ^= 1;
+ 	}
+     }
+ }
+ 
+ int
+ main()
+ {
+   foo ();
+   if (b[0][1] != 1)
+     __builtin_abort();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111445.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111445.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111445.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111445.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,29 ----
+ /* { dg-do run } */
+ 
+ extern void abort (void);
+ short a, b;
+ unsigned char c = 255;
+ unsigned cnt;
+ void __attribute__((noipa))
+ check (int x)
+ {
+   if (x != 0)
+     abort ();
+   cnt++;
+ }
+ int main()
+ {
+   int d;
+   unsigned char e;
+   d = 0;
+   for (; a >= 0; a--) {
+     int *f = &d;
+     *f = c;
+   }
+   e = 0;
+   for (; (unsigned char)(d - 255) + e <= 1; e++)
+     check (b);
+   if (cnt != 2)
+     abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111614.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111614.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111614.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111614.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,23 ----
+ /* { dg-do compile } */
+ 
+ int a, b, c, d, e;
+ static void f() {
+   int *g = &b;
+   b = 1;
+   for (; b >= 0; b--) {
+     c = 0;
+     for (; c <= 1; c++)
+       e = 0;
+     for (; e <= 1; e++) {
+       int h, i = h = 13;
+       for (; h; h--)
+         i = i << a;
+       d &= i + c + 9 + *g;
+     }
+   }
+ }
+ int main() {
+   f();
+   for (;;)
+     ;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111815.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111815.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111815.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111815.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,26 ----
+ /* { dg-do run } */
+ 
+ char x[] = {
+    0,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11, 12, 13, 14, 15,
+   16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
+ };
+ 
+ __attribute__ ((noinline)) char *
+ p (char *a, int o, int i)
+ {
+   return a + ++o + (1 << ++i);
+ }
+ 
+ int
+ main (void)
+ {
+   if (*p (x, 0, 0) != 3)
+     return 1;
+   if (*p (x, 1, 2) != 10)
+     return 1;
+   if (*p (x, 2, 1) != 7)
+     return 1;
+   if (*p (x, 3, 3) != 20)
+     return 1;
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111818.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111818.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111818.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111818.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-do compile } */
+ 
+ static void foo(const volatile unsigned int x, void *p)
+ {
+   __builtin_memcpy(p, (void *)&x, sizeof x);
+ }
+ 
+ void bar(void *number)
+ {
+   foo(0, number);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111917.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111917.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111917.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111917.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,23 ----
+ /* { dg-do compile } */
+ /* { dg-additional-options "-funswitch-loops" } */
+ 
+ long t;
+ long a() {
+   long b = t, c = t;
+   for (; b < 31; b++)
+     c <<= 1;
+   return c;
+ }
+ long t1;
+ static
+ int d() {
+   if (!t1)
+     return 0;
+ e:
+ f:
+   for (; a();)
+     ;
+   goto f;
+   return 0;
+ }
+ int main() { d(); }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr112281-1.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr112281-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr112281-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr112281-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,18 ----
+ /* { dg-do run } */
+ /* { dg-additional-options "-ftree-loop-distribution" } */
+ 
+ struct {
+   int : 8;
+   int a;
+ } b, d[4] = {{0}, {0}, {0}, {5}};
+ int c, e;
+ int main() {
+   for (c = 2; c; c--)
+     for (e = 0; e < 2; e++) {
+       d[c] = b = d[c + 1];
+       d[c + 1].a = 0;
+     }
+   if (b.a != 0)
+     __builtin_abort();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr112281-2.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr112281-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr112281-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr112281-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,18 ----
+ /* { dg-do run } */
+ /* { dg-additional-options "-ftree-loop-distribution" } */
+ 
+ struct {
+   int : 8;
+   int a;
+ } b, d[4] = {{5}, {0}, {0}, {0}};
+ int c, e;
+ int main() {
+   for (c = 0; c < 2; c++)
+     for (e = 0; e < 2; e++) {
+       d[c + 1] = b = d[c];
+       d[c].a = 0;
+     }
+   if (b.a != 0)
+     __builtin_abort();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr114672.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr114672.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr114672.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr114672.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ 
+ struct {
+   __INT64_TYPE__ m : 60;
+ } s;
+ 
+ short a;
+ short b;
+ 
+ void
+ foo ()
+ {
+   s.m += a * b;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-warn-1.c gcc-12.4.0/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-warn-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-warn-1.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-warn-1.c	Thu Jun 20 08:08:08 2024
*************** void test_sprintf_chk_c_const (void)
*** 200,210 ****
    T (3, "%c%c", '1', '2');
  
    /* Wide characters.  */
!   T (0, "%lc",     (wint_t)0);   /* { dg-warning "nul past the end" } */
!   T (1, "%lc",     (wint_t)0);
!   T (1, "%lc%lc",  (wint_t)0, (wint_t)0);
    T (2, "%lc",     (wint_t)0);
!   T (2, "%lc%lc",  (wint_t)0, (wint_t)0);
  
    /* The following could result in as few as no bytes and in as many as
       MB_CUR_MAX, but since the MB_CUR_MAX value is a runtime property
--- 200,210 ----
    T (3, "%c%c", '1', '2');
  
    /* Wide characters.  */
!   T (0, "%lc",     (wint_t)0);   /* { dg-warning ".%lc. directive writing up to 1 bytes into a region of size 0" } */
!   T (1, "%lc",     (wint_t)0);   /* { dg-warning "nul past the end" } */
!   T (1, "%lc%lc",  (wint_t)0, (wint_t)0);   /* { dg-warning ".%lc. directive writing up to 1 bytes into a region of size between 0 and 1" } */
    T (2, "%lc",     (wint_t)0);
!   T (2, "%lc%lc",  (wint_t)0, (wint_t)0);   /* { dg-warning "nul past the end" } */
  
    /* The following could result in as few as no bytes and in as many as
       MB_CUR_MAX, but since the MB_CUR_MAX value is a runtime property
*************** void test_snprintf_c_const (char *d)
*** 1550,1556 ****
  
    /* Wide characters.  */
    T (0, "%lc",  (wint_t)0);
!   T (1, "%lc",  (wint_t)0);
    T (2, "%lc",  (wint_t)0);
  
    /* The following could result in as few as a single byte and in as many
--- 1550,1556 ----
  
    /* Wide characters.  */
    T (0, "%lc",  (wint_t)0);
!   T (1, "%lc",  (wint_t)0);      /* { dg-warning "output may be truncated before the last format character" } */
    T (2, "%lc",  (wint_t)0);
  
    /* The following could result in as few as a single byte and in as many
*************** void test_snprintf_chk_c_const (void)
*** 1603,1609 ****
  
    /* Wide characters.  */
    T (0, "%lc",  (wint_t)0);
!   T (1, "%lc",  (wint_t)0);
    T (2, "%lc",  (wint_t)0);
  
    /* The following could result in as few as a single byte and in as many
--- 1603,1609 ----
  
    /* Wide characters.  */
    T (0, "%lc",  (wint_t)0);
!   T (1, "%lc",  (wint_t)0);      /* { dg-warning "output may be truncated before the last format character" } */
    T (2, "%lc",  (wint_t)0);
  
    /* The following could result in as few as a single byte and in as many
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/tree-ssa/pr111967.c gcc-12.4.0/gcc/testsuite/gcc.dg/tree-ssa/pr111967.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/tree-ssa/pr111967.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/tree-ssa/pr111967.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,15 ----
+ /* PR tree-optimization/111967 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fno-tree-forwprop -fdump-tree-evrp-all" } */
+ 
+ void bar (char *);
+ int a;
+ char *b;
+ 
+ void
+ foo (void)
+ {
+   long c = a & 3;
+   if (c)
+     bar (b + c);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/tsan/pr111736.c gcc-12.4.0/gcc/testsuite/gcc.dg/tsan/pr111736.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/tsan/pr111736.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/tsan/pr111736.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,17 ----
+ /* PR sanitizer/111736 */
+ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+ /* { dg-options "-fsanitize=thread -fdump-tree-optimized -ffat-lto-objects" } */
+ /* { dg-final { scan-tree-dump-not "__tsan_read" "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "__tsan_write" "optimized" } } */
+ 
+ #ifdef __x86_64__
+ #define SEG __seg_fs
+ #else
+ #define SEG __seg_gs
+ #endif
+ 
+ void
+ foo (int SEG *p, int SEG *q)
+ {
+   *q = *p;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/ubsan/pr111736.c gcc-12.4.0/gcc/testsuite/gcc.dg/ubsan/pr111736.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/ubsan/pr111736.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/ubsan/pr111736.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,23 ----
+ /* PR sanitizer/111736 */
+ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+ /* { dg-options "-fsanitize=null,alignment -fdump-tree-optimized -ffat-lto-objects" } */
+ /* { dg-final { scan-tree-dump-times "__ubsan_handle_type_mismatch" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "p_\[0-9]*.D. \[=!]= 0" "optimized" } } */
+ 
+ #ifdef __x86_64__
+ #define SEG __seg_fs
+ #else
+ #define SEG __seg_gs
+ #endif
+ 
+ int
+ foo (int SEG *p, int *q)
+ {
+   return *p;
+ }
+ 
+ __attribute__((no_sanitize("alignment"))) int
+ bar (int SEG *p, int *q)
+ {
+   return *p;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/uninit-pr40635.c gcc-12.4.0/gcc/testsuite/gcc.dg/uninit-pr40635.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/uninit-pr40635.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/uninit-pr40635.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,33 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O -Wuninitialized" } */
+ 
+ struct hostent {
+     char **h_addr_list;
+ };
+ struct hostent *gethostbyname(const char*);
+ int socket(void);
+ int close(int);
+ int connect(int, const char*);
+ 
+ int get_tcp_socket(const char *machine)
+ {
+   struct hostent *hp;
+   int s42, x;
+   char **addr;
+ 
+   hp = gethostbyname(machine);
+   x = 0;
+   for (addr = hp->h_addr_list; *addr; addr++)
+     {
+       s42 = socket();
+       if (s42 < 0)
+ 	return -1;
+       x = connect(s42, *addr);
+       if (x == 0)
+ 	break;
+       close(s42);
+     }
+   if (x < 0)
+     return -1;
+   return s42;  /* { dg-warning "uninitialized" } */
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr108950.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr108950.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr108950.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr108950.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
- /* { dg-require-effective-target vect_simd_clones } */
  /* { dg-do compile } */
  
  int m;
  short int n;
--- 1,5 ----
  /* { dg-do compile } */
+ /* { dg-require-effective-target vect_simd_clones } */
  
  int m;
  short int n;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr110381.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr110381.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr110381.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr110381.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,44 ----
+ /* { dg-require-effective-target vect_float_strict } */
+ 
+ #include "tree-vect.h"
+ 
+ struct FOO {
+    double a;
+    double b;
+    double c;
+ };
+ 
+ double __attribute__((noipa))
+ sum_8_foos(const struct FOO* foos)
+ {
+   double sum = 0;
+ 
+   for (int i = 0; i < 8; ++i)
+     {
+       struct FOO foo = foos[i];
+ 
+       /* Need to use an in-order reduction here, preserving
+          the load permutation.  */
+       sum += foo.a;
+       sum += foo.c;
+       sum += foo.b;
+     }
+ 
+   return sum;
+ }
+ 
+ int main()
+ {
+   struct FOO foos[8];
+ 
+   check_vect ();
+ 
+   __builtin_memset (foos, 0, sizeof (foos));
+   foos[0].a = __DBL_MAX__;
+   foos[0].b = 5;
+   foos[0].c = -__DBL_MAX__;
+ 
+   if (sum_8_foos (foos) != 5)
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr111764.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr111764.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr111764.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr111764.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ #include "tree-vect.h"
+ 
+ short b = 2;
+ 
+ int main()
+ {
+   check_vect ();
+ 
+   for (int a = 1; a <= 9; a++)
+     b = b * b;
+   if (b != 0)
+     __builtin_abort ();
+ 
+   return 0;
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr112505.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr112505.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr112505.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr112505.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-additional-options "-O3" } */
+ 
+ short int w9;
+ struct T {
+   short a : 14;
+   int b;
+ };
+ struct T v;
+ void zc()
+ {
+   for(int i = 0; i < 4; i ++)
+     w9 *= v.b ? v.a-- < 0 : 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-1.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,17 ----
+ #include "tree-vect.h"
+ 
+ unsigned char a;
+ 
+ int main() {
+   check_vect ();
+ 
+   short b = a = 0;
+   for (; a != 19; a++)
+     if (a)
+       b = 32872 >> a;
+ 
+   if (b == 0)
+     return 0;
+   else
+     return 1;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-2.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,50 ----
+ /* { dg-do compile } */
+ 
+ #define N 128
+ 
+ short x[N];
+ short y[N];
+ 
+ void
+ f1 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= y[i];
+ }
+ 
+ void
+ f2 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= (y[i] < 32 ? y[i] : 32);
+ }
+ 
+ void
+ f3 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= (y[i] < 31 ? y[i] : 31);
+ }
+ 
+ void
+ f4 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= (y[i] & 31);
+ }
+ 
+ void
+ f5 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= 0x8000 >> y[i];
+ }
+ 
+ void
+ f6 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= 0x8000 >> (y[i] & 31);
+ }
+ 
+ /* { dg-final { scan-tree-dump-not {can narrow[^\n]+>>} "vect" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-3.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-3.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-3.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,39 ----
+ /* { dg-do compile } */
+ 
+ #define N 128
+ 
+ short x[N];
+ short y[N];
+ 
+ void
+ f1 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= (y[i] < 30 ? y[i] : 30);
+ }
+ 
+ void
+ f2 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= ((y[i] & 15) + 2);
+ }
+ 
+ void
+ f3 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= (y[i] < 16 ? y[i] : 16);
+ }
+ 
+ void
+ f4 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] = 32768 >> ((y[i] & 15) + 3);
+ }
+ 
+ /* { dg-final { scan-tree-dump {can narrow to signed:31 without loss [^\n]+>>} "vect" } } */
+ /* { dg-final { scan-tree-dump {can narrow to signed:18 without loss [^\n]+>>} "vect" } } */
+ /* { dg-final { scan-tree-dump {can narrow to signed:17 without loss [^\n]+>>} "vect" } } */
+ /* { dg-final { scan-tree-dump {can narrow to unsigned:19 without loss [^\n]+>>} "vect" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-4.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-4.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-4.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-4.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,55 ----
+ /* { dg-do compile } */
+ 
+ #define N 128
+ 
+ short x[N];
+ short y[N];
+ 
+ void
+ f1 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= (y[i] & 15);
+ }
+ 
+ void
+ f2 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= ((y[i] & 7) + 8);
+ }
+ 
+ void
+ f3 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= ((y[i] & 7) ^ 11);
+ }
+ 
+ void
+ f4 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= (y[i] < 15 ? y[i] : 15);
+ }
+ 
+ void
+ f5 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= (y[i] < 15 ? y[i] : 1);
+ }
+ 
+ void
+ f6 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] = 32768 >> (y[i] & 15);
+ }
+ 
+ /* { dg-final { scan-tree-dump {:11:[^\n]+can narrow to signed:16 without loss [^\n]+>>} "vect" } } */
+ /* { dg-final { scan-tree-dump {:18:[^\n]+can narrow to signed:16 without loss [^\n]+>>} "vect" } } */
+ /* { dg-final { scan-tree-dump {:25:[^\n]+can narrow to signed:16 without loss [^\n]+>>} "vect" } } */
+ /* { dg-final { scan-tree-dump {:32:[^\n]+can narrow to signed:16 without loss [^\n]+>>} "vect" } } */
+ /* { dg-final { scan-tree-dump {:39:[^\n]+can narrow to signed:16 without loss [^\n]+>>} "vect" } } */
+ /* { dg-final { scan-tree-dump {can narrow to unsigned:16 without loss [^\n]+>>} "vect" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-5.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-5.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-5.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-5.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,66 ----
+ /* { dg-do compile } */
+ 
+ #define N 128
+ 
+ short x[N];
+ short y[N];
+ 
+ void
+ f1 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     {
+       int a = y[i];
+       int b = ~a;
+       x[i] = b;
+     }
+ }
+ 
+ void
+ f2 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     {
+       int a = y[i];
+       int b = -a;
+       x[i] = b;
+     }
+ }
+ 
+ void
+ f3 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     {
+       int a = x[i];
+       int b = a / y[i];
+       x[i] = b;
+     }
+ }
+ 
+ void
+ f4 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     {
+       int a = x[i];
+       int b = a < y[i] ? a : y[i];
+       x[i] = b;
+     }
+ }
+ 
+ void
+ f5 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     {
+       int a = x[i];
+       int b = a > y[i] ? a : y[i];
+       x[i] = b;
+     }
+ }
+ 
+ /* { dg-final { scan-tree-dump {can narrow to signed:17 without loss [^\n]+= -} "vect" } } */
+ /* { dg-final { scan-tree-dump {can narrow to signed:16 without loss [^\n]+= ~} "vect" } } */
+ /* { dg-final { scan-tree-dump {can narrow to signed:16 without loss [^\n]+ MIN_EXPR} "vect" } } */
+ /* { dg-final { scan-tree-dump {can narrow to signed:16 without loss [^\n]+ MAX_EXPR} "vect" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr114027.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr114027.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr114027.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr114027.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,26 ----
+ #include "tree-vect.h"
+ 
+ int __attribute__((noipa))
+ foo (int *f, int n)
+ {
+   int res = 0;
+   for (int i = 0; i < n; ++i)
+     {
+       if (f[2*i])
+         res = 2;
+       if (f[2*i+1])
+         res = -2;
+     }
+   return res;
+ }
+ 
+ int f[] = { 1, 1, 1, 1, 1, 1, 1, 1,
+             1, 1, 1, 1, 1, 1, 1, 0 };
+ 
+ int
+ main ()
+ {
+   if (foo (f, 8) != 2)
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr114231.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr114231.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr114231.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr114231.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ /* { dg-do compile } */
+ 
+ void f(long*);
+ int ff[2];
+ void f2(long, long, unsigned long);
+ void k(unsigned long x, unsigned long y)
+ {
+   long t = x >> ff[0];
+   long t1 = ff[1];
+   unsigned long t2 = y >> ff[0];
+   f2(t1, t+t2, t2);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr115192.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr115192.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr115192.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr115192.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,28 ----
+ #include "tree-vect.h"
+ 
+ int data[4 * 16 * 16] __attribute__((aligned(16)));
+ 
+ __attribute__((noipa)) void
+ foo (__SIZE_TYPE__ n)
+ {
+   for (__SIZE_TYPE__ i = 1; i < n; ++i)
+     {
+       data[i * n * 4] = data[(i - 1) * n * 4] + 1;
+       data[i * n * 4 + 1] = data[(i - 1) * n * 4 + 1] + 2;
+     }
+ }
+ 
+ int
+ main ()
+ {
+   check_vect ();
+ 
+   data[0] = 10;
+   data[1] = 20;
+ 
+   foo (3);
+ 
+   if (data[24] != 12 || data[25] != 24)
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr97428.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr97428.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr97428.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr97428.c	Thu Jun 20 08:08:08 2024
***************
*** 1,4 ****
--- 1,5 ----
  /* { dg-do compile } */
+ /* { dg-require-effective-target vect_double } */
  
  typedef struct { double re, im; } dcmlx_t;
  typedef struct { double re[4], im[4]; } dcmlx4_t;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/vect-pr114375.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/vect-pr114375.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/vect-pr114375.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/vect-pr114375.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,44 ----
+ /* { dg-additional-options "-mavx2" { target avx2_runtime } } */
+ 
+ #include "tree-vect.h"
+ 
+ int a[512];
+ int b[512];
+ int c[512];
+ 
+ void __attribute__((noipa))
+ foo(int * __restrict p)
+ {
+   for (int i = 0; i < 64; ++i)
+     {
+       int tem = 2, tem2 = 2;
+       if (a[4*i + 1])
+         tem = p[4*i];
+       if (a[4*i])
+         tem2 = p[4*i + 2];
+       b[2*i] = tem2;
+       b[2*i+1] = tem;
+       if (a[4*i + 2])
+         tem = p[4*i + 1];
+       if (a[4*i + 3])
+         tem2 = p[4*i + 3];
+       c[2*i] = tem2;
+       c[2*i+1] = tem;
+     }
+ }
+ int main()
+ {
+   check_vect ();
+ 
+   for (int i = 0; i < 512; ++i)
+     a[i] = (i >> 1) & 1;
+ 
+   foo (a);
+ 
+   if (c[0] != 1 || c[1] != 0 || c[2] != 1 || c[3] != 0
+       || b[0] != 2 || b[1] != 2 || b[2] != 2 || b[3] != 2)
+     abort ();
+ 
+   return 0;
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.misc-tests/gcov-14.c gcc-12.4.0/gcc/testsuite/gcc.misc-tests/gcov-14.c
*** gcc-12.3.0/gcc/testsuite/gcc.misc-tests/gcov-14.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.misc-tests/gcov-14.c	Thu Jun 20 08:08:08 2024
***************
*** 3,9 ****
  /* { dg-do run { target native } } */
  /* { dg-options "-O2 -fprofile-arcs -ftest-coverage -fgnu89-inline" } */
  /* The following line arranges that Darwin has behavior like elf weak import.  */
! /* { dg-additional-options "-flat_namespace -undefined suppress" { target *-*-darwin* }  } */
  /* { dg-require-weak "" } */
  /* { dg-skip-if "undefined weak not supported" { { hppa*-*-hpux* } && { ! lp64 } } } */
  /* { dg-skip-if "undefined weak not supported" { powerpc-ibm-aix* } } */
--- 3,9 ----
  /* { dg-do run { target native } } */
  /* { dg-options "-O2 -fprofile-arcs -ftest-coverage -fgnu89-inline" } */
  /* The following line arranges that Darwin has behavior like elf weak import.  */
! /* { dg-additional-options "-Wl,-U,_Foo" { target *-*-darwin* }  } */
  /* { dg-require-weak "" } */
  /* { dg-skip-if "undefined weak not supported" { { hppa*-*-hpux* } && { ! lp64 } } } */
  /* { dg-skip-if "undefined weak not supported" { powerpc-ibm-aix* } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.misc-tests/gcov-24.c gcc-12.4.0/gcc/testsuite/gcc.misc-tests/gcov-24.c
*** gcc-12.3.0/gcc/testsuite/gcc.misc-tests/gcov-24.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.misc-tests/gcov-24.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,30 ----
+ /* { dg-options "-fprofile-arcs -ftest-coverage" } */
+ /* { dg-do run { target native } } */
+ 
+ int main()
+ {
+   int a = 1;
+   int b = 2;
+   int c = -3;
+   switch(a) /* count(1) */
+     {
+     case 1: /* count(1) */
+     c = 3;
+     switch(b) { /* count(1) */
+       case 1: /* count(#####) */
+       c = 4;
+       break;
+       case 2: /* count(1) */
+       c = 5;
+       break;
+     }
+     break;
+     case 2: /* count(#####) */
+     c = 6;
+     break;
+     default: /* count(#####) */
+     break;
+     }
+ }
+ 
+ /* { dg-final { run-gcov gcov-24.c } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp	Thu Jun 20 08:08:08 2024
*************** if { ![istarget aarch64*-*-*] } then {
*** 27,33 ****
  
  torture-init
  set-torture-options $C_TORTURE_OPTIONS
! set additional_flags "-W -Wall -Wno-abi"
  
  # Test parameter passing.  This uses abitest.S which relies on weak
  # symbols.
--- 27,33 ----
  
  torture-init
  set-torture-options $C_TORTURE_OPTIONS
! set additional_flags "-W -Wall -Wno-abi -fno-pie -no-pie"
  
  # Test parameter passing.  This uses abitest.S which relies on weak
  # symbols.
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/acle/ls64_lto.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/acle/ls64_lto.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/acle/ls64_lto.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/acle/ls64_lto.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do link { target aarch64_asm_ls64_ok } } */
+ /* { dg-additional-options "-march=armv8.7-a+ls64 -flto" } */
+ #include <arm_acle.h>
+ int main(void)
+ {
+   data512_t d = __arm_ld64b ((const void *)0x1000);
+   __arm_st64b ((void *)0x2000, d);
+   uint64_t x = __arm_st64bv ((void *)0x3000, d);
+   x += __arm_st64bv0 ((void *)0x4000, d);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/acle/pr110100.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/acle/pr110100.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/acle/pr110100.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/acle/pr110100.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,7 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=armv8.7-a+ls64 -O2" } */
+ #include <arm_acle.h>
+ void do_st64b(data512_t data) {
+   __arm_st64b((void*)0x10000000, data);
+ }
+ /* { dg-final { scan-assembler {mov\tx([123])?[0-9], 268435456} } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/acle/pr110132.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/acle/pr110132.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/acle/pr110132.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/acle/pr110132.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,15 ----
+ /* { dg-do compile } */
+ /* { dg-additional-options "-march=armv8.7-a+ls64" } */
+ 
+ /* Check that ls64 builtins can be invoked using a preprocesed testcase
+    without triggering bogus builtin warnings, see PR110132.
+ 
+    Note that this is purely to test GCC internals and user code should
+    include arm_acle.h to make use of these builtins.  */
+ 
+ #pragma GCC aarch64 "arm_acle.h"
+ typedef __arm_data512_t data512_t;
+ void f(void *p, data512_t d)
+ {
+   __arm_st64b (p, d);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/auto-init-7.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/auto-init-7.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/auto-init-7.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/auto-init-7.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* Verify zero initialization for array, union, and structure type automatic variables.  */
  /* { dg-do compile } */
! /* { dg-options "-ftrivial-auto-var-init=zero -fdump-rtl-expand" } */
  
  struct S
  {
--- 1,6 ----
  /* Verify zero initialization for array, union, and structure type automatic variables.  */
  /* { dg-do compile } */
! /* { dg-options "-ftrivial-auto-var-init=zero -fdump-rtl-expand -fno-stack-protector" } */
  
  struct S
  {
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/fuse_adrp_add_1.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/fuse_adrp_add_1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/fuse_adrp_add_1.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/fuse_adrp_add_1.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* { dg-do compile } */
  /* { dg-require-effective-target aarch64_small } */
! /* { dg-options "-O3 -mcpu=cortex-a57" } */
  
  enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
                   XGRF_REGS, ALL_REGS, LIM_REG_CLASSES };
--- 1,6 ----
  /* { dg-do compile } */
  /* { dg-require-effective-target aarch64_small } */
! /* { dg-options "-O3 -mcpu=cortex-a57 -fno-pie" } */
  
  enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
                   XGRF_REGS, ALL_REGS, LIM_REG_CLASSES };
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/mops_4.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/mops_4.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/mops_4.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/mops_4.c	Thu Jun 20 08:08:08 2024
*************** copy3 (int *x, int *y, long z, long *res
*** 51,56 ****
--- 51,104 ----
  }
  
  /*
+ ** move1:
+ **	mov	(x[0-9]+), x0
+ **	cpyp	\[\1\]!, \[x1\]!, x2!
+ **	cpym	\[\1\]!, \[x1\]!, x2!
+ **	cpye	\[\1\]!, \[x1\]!, x2!
+ **	str	x0, \[x3\]
+ **	ret
+ */
+ void
+ move1 (int *x, int *y, long z, int **res)
+ {
+   __builtin_memmove (x, y, z);
+   *res = x;
+ }
+ 
+ /*
+ ** move2:
+ **	mov	(x[0-9]+), x1
+ **	cpyp	\[x0\]!, \[\1\]!, x2!
+ **	cpym	\[x0\]!, \[\1\]!, x2!
+ **	cpye	\[x0\]!, \[\1\]!, x2!
+ **	str	x1, \[x3\]
+ **	ret
+ */
+ void
+ move2 (int *x, int *y, long z, int **res)
+ {
+   __builtin_memmove (x, y, z);
+   *res = y;
+ }
+ 
+ /*
+ ** move3:
+ **	mov	(x[0-9]+), x2
+ **	cpyp	\[x0\]!, \[x1\]!, \1!
+ **	cpym	\[x0\]!, \[x1\]!, \1!
+ **	cpye	\[x0\]!, \[x1\]!, \1!
+ **	str	x2, \[x3\]
+ **	ret
+ */
+ void
+ move3 (int *x, int *y, long z, long *res)
+ {
+   __builtin_memmove (x, y, z);
+   *res = z;
+ }
+ 
+ /*
  ** set1:
  **	mov	(x[0-9]+), x0
  **	setp	\[\1\]!, x2!, x1
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/no_merge_trunc_signed_zero.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/no_merge_trunc_signed_zero.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/no_merge_trunc_signed_zero.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/no_merge_trunc_signed_zero.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,24 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fno-trapping-math -fsigned-zeros" } */
+ 
+ #include <math.h>
+ 
+ float
+ f1 (float x)
+ {
+   return (int) rintf(x);
+ }
+ 
+ double
+ f2 (double x)
+ {
+   return (long) rint(x);
+ }
+ 
+ /* { dg-final { scan-assembler "frintx\\ts\[0-9\]+, s\[0-9\]+" } } */
+ /* { dg-final { scan-assembler "cvtzs\\ts\[0-9\]+, s\[0-9\]+" } } */
+ /* { dg-final { scan-assembler "scvtf\\ts\[0-9\]+, s\[0-9\]+" } } */
+ /* { dg-final { scan-assembler "frintx\\td\[0-9\]+, d\[0-9\]+" } } */
+ /* { dg-final { scan-assembler "cvtzs\\td\[0-9\]+, d\[0-9\]+" } } */
+ /* { dg-final { scan-assembler "scvtf\\td\[0-9\]+, d\[0-9\]+" } } */
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr103147-10.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr103147-10.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr103147-10.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr103147-10.c	Thu Jun 20 08:08:08 2024
***************
*** 1,4 ****
! /* { dg-options "-O2 -fpack-struct -mstrict-align" } */
  /* { dg-final { check-function-bodies "**" "" "" } } */
  
  #include <arm_neon.h>
--- 1,4 ----
! /* { dg-options "-O2 -fpack-struct -mstrict-align -fno-stack-protector" } */
  /* { dg-final { check-function-bodies "**" "" "" } } */
  
  #include <arm_neon.h>
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr104005.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr104005.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr104005.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr104005.c	Thu Jun 20 08:08:08 2024
***************
*** 1,4 ****
! /* { dg-options "-O2 -funroll-loops" } */
  
  typedef int v2 __attribute__((vector_size(8)));
  
--- 1,4 ----
! /* { dg-options "-O2 -funroll-loops -fno-stack-protector" } */
  
  typedef int v2 __attribute__((vector_size(8)));
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr112787.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr112787.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr112787.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr112787.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-do compile } */
+ /* { dg-additional-options "-O2 -march=armv9-a -mcpu=neoverse-n2" } */
+ 
+ typedef int __attribute__((__vector_size__ (64))) vec;
+ 
+ vec fn (vec a, vec b)
+ {
+   return a + b;
+ }
+ 
+ /* { dg-final { scan-assembler-times {add\tv[0-9]+} 4 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr113552.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr113552.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr113552.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr113552.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,17 ----
+ /* { dg-do compile } */
+ /* { dg-options "-Ofast -march=armv8-a" } */
+ 
+ __attribute__ ((__simd__ ("notinbranch"), const))
+ double cos (double);
+ 
+ void foo (float *a, double *b)
+ {
+     for (int i = 0; i < 12; i+=3)
+       {
+         b[i] = cos (5.0 * a[i]);
+         b[i+1] = cos (5.0 * a[i+1]);
+         b[i+2] = cos (5.0 * a[i+2]);
+       }
+ }
+ 
+ /* { dg-final { scan-assembler-times {bl\t_ZGVnN2v_cos} 6 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr63304_1.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr63304_1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr63304_1.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr63304_1.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* { dg-do assemble } */
  /* { dg-require-effective-target lp64 } */
! /* { dg-options "-O1 --save-temps" } */
  #pragma GCC push_options
  #pragma GCC target ("+nothing+simd,cmodel=small")
  
--- 1,6 ----
  /* { dg-do assemble } */
  /* { dg-require-effective-target lp64 } */
! /* { dg-options "-O1 --save-temps -fno-pie" } */
  #pragma GCC push_options
  #pragma GCC target ("+nothing+simd,cmodel=small")
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr70120-2.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr70120-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr70120-2.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr70120-2.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* { dg-do compile } */
  /* { dg-require-effective-target lp64 } */
! /* { dg-options "-Og -freorder-functions -g3 -mcmodel=large" } */
  
  typedef short v32u16 __attribute__ ((vector_size (32)));
  typedef int v32u32 __attribute__ ((vector_size (32)));
--- 1,6 ----
  /* { dg-do compile } */
  /* { dg-require-effective-target lp64 } */
! /* { dg-options "-Og -freorder-functions -g3 -mcmodel=large -fno-pie" } */
  
  typedef short v32u16 __attribute__ ((vector_size (32)));
  typedef int v32u32 __attribute__ ((vector_size (32)));
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr78733.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr78733.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr78733.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr78733.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-O2 -mcmodel=large -mpc-relative-literal-loads" } */
  /* { dg-require-effective-target lp64 } */
  /* { dg-skip-if "-mcmodel=large, no support for -fpic" { aarch64-*-* }  { "-fpic" } { "" } } */
  
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-O2 -mcmodel=large -mpc-relative-literal-loads -fno-pie" } */
  /* { dg-require-effective-target lp64 } */
  /* { dg-skip-if "-mcmodel=large, no support for -fpic" { aarch64-*-* }  { "-fpic" } { "" } } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr79041-2.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr79041-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr79041-2.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr79041-2.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-O2 -mcmodel=large -mpc-relative-literal-loads" } */
  /* { dg-require-effective-target lp64 } */
  /* { dg-skip-if "-mcmodel=large, no support for -fpic" { aarch64-*-* }  { "-fpic" } { "" } } */
  
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-O2 -mcmodel=large -mpc-relative-literal-loads -fno-pie" } */
  /* { dg-require-effective-target lp64 } */
  /* { dg-skip-if "-mcmodel=large, no support for -fpic" { aarch64-*-* }  { "-fpic" } { "" } } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr94530.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr94530.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr94530.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr94530.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* { dg-do compile } */
  /* { dg-require-effective-target lp64 } */
! /* { dg-options "-Os -mcpu=falkor -mpc-relative-literal-loads -mcmodel=large" } */
  
  extern void bar(const char *);
  
--- 1,6 ----
  /* { dg-do compile } */
  /* { dg-require-effective-target lp64 } */
! /* { dg-options "-Os -mcpu=falkor -mpc-relative-literal-loads -mcmodel=large -fno-pie" } */
  
  extern void bar(const char *);
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr94577.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr94577.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr94577.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr94577.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-mcmodel=large -mabi=ilp32" } */
  
  void
  foo ()
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-mcmodel=large -mabi=ilp32 -fno-pie" } */
  
  void
  foo ()
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_2.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_2.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_2.c	Thu Jun 20 08:08:08 2024
***************
*** 242,249 ****
  
  #pragma GCC push_options
  #pragma GCC target ("arch=armv8.7-a")
! #ifndef __ARM_FEATURE_LS64
! #error "__ARM_FEATURE_LS64 is not defined but should be!"
  #endif
  #pragma GCC pop_options
  
--- 242,249 ----
  
  #pragma GCC push_options
  #pragma GCC target ("arch=armv8.7-a")
! #ifdef __ARM_FEATURE_LS64
! #error "__ARM_FEATURE_LS64 is defined but should not be!"
  #endif
  #pragma GCC pop_options
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/reload-valid-spoff.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/reload-valid-spoff.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/reload-valid-spoff.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/reload-valid-spoff.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* { dg-do compile } */
  /* { dg-require-effective-target lp64 } */
! /* { dg-options "-O2 -mcmodel=large -fno-builtin" }  */
  /* { dg-skip-if "-mcmodel=large -fPIC not currently supported" { aarch64-*-* }  { "-fPIC" } { "" } } */
  
  typedef long unsigned int size_t;
--- 1,6 ----
  /* { dg-do compile } */
  /* { dg-require-effective-target lp64 } */
! /* { dg-options "-O2 -mcmodel=large -fno-builtin -fno-pie" }  */
  /* { dg-skip-if "-mcmodel=large -fPIC not currently supported" { aarch64-*-* }  { "-fPIC" } { "" } } */
  
  typedef long unsigned int size_t;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/shrink_wrap_1.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/shrink_wrap_1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/shrink_wrap_1.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/shrink_wrap_1.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile { target { aarch64*-*-* } } } */
! /* { dg-options "-O2" } */
  /* { dg-final { check-function-bodies "**" "" } } */
  
  /*
--- 1,5 ----
  /* { dg-do compile { target { aarch64*-*-* } } } */
! /* { dg-options "-O2 -fno-stack-protector" } */
  /* { dg-final { check-function-bodies "**" "" } } */
  
  /*
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c	Thu Jun 20 08:08:08 2024
*************** double foo(double x)
*** 18,24 ****
  }
  
  /* { dg-final { scan-assembler-not {\.variant_pcs\tfoo} } } */
! /* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnM1v_foo} 1 } } */
  /* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnM2v_foo} 1 } } */
! /* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnN1v_foo} 1 } } */
  /* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnN2v_foo} 1 } } */
--- 18,24 ----
  }
  
  /* { dg-final { scan-assembler-not {\.variant_pcs\tfoo} } } */
! /* { dg-final { scan-assembler-not {\.variant_pcs\t_ZGVnM1v_foo} } } */
  /* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnM2v_foo} 1 } } */
! /* { dg-final { scan-assembler-not {\.variant_pcs\t_ZGVnN1v_foo} } } */
  /* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnN2v_foo} 1 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-1.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-1.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-1.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-O2 -fstack-clash-protection --param stack-clash-protection-guard-size=16 -funwind-tables" } */
  /* { dg-require-effective-target supports_stack_clash_protection } */
  
  #define SIZE 128*1024
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-O2 -fstack-clash-protection --param stack-clash-protection-guard-size=16 -funwind-tables -fno-stack-protector" } */
  /* { dg-require-effective-target supports_stack_clash_protection } */
  
  #define SIZE 128*1024
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-2.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-2.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-2.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-O2 -fstack-clash-protection --param stack-clash-protection-guard-size=16 -funwind-tables" } */
  /* { dg-require-effective-target supports_stack_clash_protection } */
  
  #define SIZE 1280*1024 + 512
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-O2 -fstack-clash-protection --param stack-clash-protection-guard-size=16 -funwind-tables -fno-stack-protector" } */
  /* { dg-require-effective-target supports_stack_clash_protection } */
  
  #define SIZE 1280*1024 + 512
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,55 ----
+ /* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
+ 
+ void f(int, ...);
+ void g();
+ 
+ /*
+ ** test1:
+ **	...
+ **	str	x30, \[sp\]
+ **	sub	sp, sp, #1024
+ **	cbnz	w0, .*
+ **	bl	g
+ **	...
+ */
+ int test1(int z) {
+   __uint128_t x = 0;
+   int y[0x400];
+   if (z)
+     {
+       f(0, 0, 0, 0, 0, 0, 0, &y,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x);
+     }
+   g();
+   return 1;
+ }
+ 
+ /*
+ ** test2:
+ **	...
+ **	str	x30, \[sp\]
+ **	sub	sp, sp, #1040
+ **	str	xzr, \[sp, #?1024\]
+ **	cbnz	w0, .*
+ **	bl	g
+ **	...
+ */
+ int test2(int z) {
+   __uint128_t x = 0;
+   int y[0x400];
+   if (z)
+     {
+       f(0, 0, 0, 0, 0, 0, 0, &y,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x);
+     }
+   g();
+   return 1;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,100 ----
+ /* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
+ 
+ void f(int, ...);
+ void g();
+ 
+ /*
+ ** test1:
+ **	...
+ **	str	x30, \[sp\]
+ **	sub	sp, sp, #4064
+ **	str	xzr, \[sp, #?1024\]
+ **	cbnz	w0, .*
+ **	bl	g
+ **	...
+ **	str	x26, \[sp, #?4128\]
+ **	...
+ */
+ int test1(int z) {
+   __uint128_t x = 0;
+   int y[0x400];
+   if (z)
+     {
+       asm volatile ("" :::
+ 		    "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26");
+       f(0, 0, 0, 0, 0, 0, 0, &y,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x);
+     }
+   g();
+   return 1;
+ }
+ 
+ /*
+ ** test2:
+ **	...
+ **	str	x30, \[sp\]
+ **	sub	sp, sp, #1040
+ **	str	xzr, \[sp, #?1024\]
+ **	cbnz	w0, .*
+ **	bl	g
+ **	...
+ */
+ int test2(int z) {
+   __uint128_t x = 0;
+   int y[0x400];
+   if (z)
+     {
+       asm volatile ("" :::
+ 		    "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26");
+       f(0, 0, 0, 0, 0, 0, 0, &y,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x);
+     }
+   g();
+   return 1;
+ }
+ 
+ /*
+ ** test3:
+ **	...
+ **	str	x30, \[sp\]
+ **	sub	sp, sp, #1024
+ **	cbnz	w0, .*
+ **	bl	g
+ **	...
+ */
+ int test3(int z) {
+   __uint128_t x = 0;
+   int y[0x400];
+   if (z)
+     {
+       asm volatile ("" :::
+ 		    "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26");
+       f(0, 0, 0, 0, 0, 0, 0, &y,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x);
+     }
+   g();
+   return 1;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,100 ----
+ /* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12 -fsanitize=shadow-call-stack -ffixed-x18" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
+ 
+ void f(int, ...);
+ void g();
+ 
+ /*
+ ** test1:
+ **	...
+ **	str	x30, \[sp\]
+ **	sub	sp, sp, #4064
+ **	str	xzr, \[sp, #?1024\]
+ **	cbnz	w0, .*
+ **	bl	g
+ **	...
+ **	str	x26, \[sp, #?4128\]
+ **	...
+ */
+ int test1(int z) {
+   __uint128_t x = 0;
+   int y[0x400];
+   if (z)
+     {
+       asm volatile ("" :::
+ 		    "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26");
+       f(0, 0, 0, 0, 0, 0, 0, &y,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x);
+     }
+   g();
+   return 1;
+ }
+ 
+ /*
+ ** test2:
+ **	...
+ **	str	x30, \[sp\]
+ **	sub	sp, sp, #1040
+ **	str	xzr, \[sp, #?1024\]
+ **	cbnz	w0, .*
+ **	bl	g
+ **	...
+ */
+ int test2(int z) {
+   __uint128_t x = 0;
+   int y[0x400];
+   if (z)
+     {
+       asm volatile ("" :::
+ 		    "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26");
+       f(0, 0, 0, 0, 0, 0, 0, &y,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x);
+     }
+   g();
+   return 1;
+ }
+ 
+ /*
+ ** test3:
+ **	...
+ **	str	x30, \[sp\]
+ **	sub	sp, sp, #1024
+ **	cbnz	w0, .*
+ **	bl	g
+ **	...
+ */
+ int test3(int z) {
+   __uint128_t x = 0;
+   int y[0x400];
+   if (z)
+     {
+       asm volatile ("" :::
+ 		    "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26");
+       f(0, 0, 0, 0, 0, 0, 0, &y,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x);
+     }
+   g();
+   return 1;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,3 ----
+ /* { dg-options "-O2 -fstack-protector-all -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12 -fsanitize=shadow-call-stack -ffixed-x18" } */
+ 
+ #include "stack-check-prologue-19.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,95 ----
+ /* { dg-options " -O -fstack-protector-strong -mstack-protector-guard=sysreg -mstack-protector-guard-reg=tpidr2_el0 -mstack-protector-guard-offset=16" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
+ 
+ void g(void *);
+ __SVBool_t *h(void *);
+ 
+ /*
+ ** test1:
+ **	sub	sp, sp, #288
+ **	stp	x29, x30, \[sp, #?272\]
+ **	add	x29, sp, #?272
+ **	mrs	(x[0-9]+), tpidr2_el0
+ **	ldr	(x[0-9]+), \[\1, #?16\]
+ **	str	\2, \[sp, #?264\]
+ **	mov	\2, #?0
+ **	add	x0, sp, #?8
+ **	bl	g
+ **	...
+ **	mrs	.*
+ **	...
+ **	bne	.*
+ **	...
+ **	ldp	x29, x30, \[sp, #?272\]
+ **	add	sp, sp, #?288
+ **	ret
+ **	bl	__stack_chk_fail
+ */
+ int test1() {
+   int y[0x40];
+   g(y);
+   return 1;
+ }
+ 
+ /*
+ ** test2:
+ **	stp	x29, x30, \[sp, #?-16\]!
+ **	mov	x29, sp
+ **	sub	sp, sp, #1040
+ **	mrs	(x[0-9]+), tpidr2_el0
+ **	ldr	(x[0-9]+), \[\1, #?16\]
+ **	str	\2, \[sp, #?1032\]
+ **	mov	\2, #?0
+ **	add	x0, sp, #?8
+ **	bl	g
+ **	...
+ **	mrs	.*
+ **	...
+ **	bne	.*
+ **	...
+ **	add	sp, sp, #?1040
+ **	ldp	x29, x30, \[sp\], #?16
+ **	ret
+ **	bl	__stack_chk_fail
+ */
+ int test2() {
+   int y[0x100];
+   g(y);
+   return 1;
+ }
+ 
+ #pragma GCC target "+sve"
+ 
+ /*
+ ** test3:
+ **	stp	x29, x30, \[sp, #?-16\]!
+ **	mov	x29, sp
+ **	addvl	sp, sp, #-18
+ **	...
+ **	str	p4, \[sp\]
+ **	...
+ **	sub	sp, sp, #272
+ **	mrs	(x[0-9]+), tpidr2_el0
+ **	ldr	(x[0-9]+), \[\1, #?16\]
+ **	str	\2, \[sp, #?264\]
+ **	mov	\2, #?0
+ **	add	x0, sp, #?8
+ **	bl	h
+ **	...
+ **	mrs	.*
+ **	...
+ **	bne	.*
+ **	...
+ **	add	sp, sp, #?272
+ **	...
+ **	ldr	p4, \[sp\]
+ **	...
+ **	addvl	sp, sp, #18
+ **	ldp	x29, x30, \[sp\], #?16
+ **	ret
+ **	bl	__stack_chk_fail
+ */
+ __SVBool_t test3() {
+   int y[0x40];
+   return *h(y);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,33 ----
+ /* { dg-options "-O2 -mcpu=neoverse-v1 -fstack-protector-all" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
+ 
+ /*
+ ** main:
+ **	...
+ **	stp	x29, x30, \[sp, #?-[0-9]+\]!
+ **	...
+ **	sub	sp, sp, #[0-9]+
+ **	...
+ **	str	x[0-9]+, \[x29, #?-8\]
+ **	...
+ */
+ int f(const char *);
+ void g(void *);
+ int main(int argc, char* argv[])
+ {
+   int a;
+   int b;
+   char c[2+f(argv[1])];
+   int d[0x100];
+   char y;
+ 
+   y=42; a=4; b=10;
+   c[0] = 'h'; c[1] = '\0';
+ 
+   c[f(argv[2])] = '\0';
+ 
+   __builtin_printf("%d %d\n%s\n", a, b, c);
+   g(d);
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/sve/pcs/aarch64-sve-pcs.exp gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/sve/pcs/aarch64-sve-pcs.exp
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/sve/pcs/aarch64-sve-pcs.exp	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/sve/pcs/aarch64-sve-pcs.exp	Thu Jun 20 08:08:08 2024
*************** if ![info exists DEFAULT_CFLAGS] then {
*** 37,47 ****
  # Initialize `dg'.
  dg-init
  
! # Force SVE if we're not testing it already.
  if { [check_effective_target_aarch64_sve] } {
!     set sve_flags ""
  } else {
!     set sve_flags "-march=armv8.2-a+sve"
  }
  
  # Main loop.
--- 37,48 ----
  # Initialize `dg'.
  dg-init
  
! # Force SVE if we're not testing it already.  And, disable stack protector
! # to avoid test failures with --enable-default-ssp.
  if { [check_effective_target_aarch64_sve] } {
!     set sve_flags "-fno-stack-protector"
  } else {
!     set sve_flags "-march=armv8.2-a+sve -fno-stack-protector"
  }
  
  # Main loop.
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c	Thu Jun 20 08:08:08 2024
***************
*** 11,21 ****
  **	mov	x11, sp
  **	...
  **	sub	sp, sp, x13
- **	str	p4, \[sp\]
  **	cbz	w0, [^\n]*
  **	...
  **	ptrue	p0\.b, all
- **	ldr	p4, \[sp\]
  **	addvl	sp, sp, #1
  **	ldr	x24, \[sp\], 32
  **	ret
--- 11,20 ----
  **	mov	x11, sp
  **	...
  **	sub	sp, sp, x13
  **	cbz	w0, [^\n]*
+ **	str	p4, \[sp\]
  **	...
  **	ptrue	p0\.b, all
  **	addvl	sp, sp, #1
  **	ldr	x24, \[sp\], 32
  **	ret
*************** test_1 (int n)
*** 39,51 ****
  **	mov	x11, sp
  **	...
  **	sub	sp, sp, x13
- **	str	p4, \[sp\]
  **	cbz	w0, [^\n]*
  **	str	p5, \[sp, #1, mul vl\]
  **	str	p6, \[sp, #2, mul vl\]
  **	...
  **	ptrue	p0\.b, all
- **	ldr	p4, \[sp\]
  **	addvl	sp, sp, #1
  **	ldr	x24, \[sp\], 32
  **	ret
--- 38,49 ----
  **	mov	x11, sp
  **	...
  **	sub	sp, sp, x13
  **	cbz	w0, [^\n]*
+ **	str	p4, \[sp\]
  **	str	p5, \[sp, #1, mul vl\]
  **	str	p6, \[sp, #2, mul vl\]
  **	...
  **	ptrue	p0\.b, all
  **	addvl	sp, sp, #1
  **	ldr	x24, \[sp\], 32
  **	ret
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/sve/pr109505.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/sve/pr109505.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/sve/pr109505.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/sve/pr109505.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ /* PR tree-optimization/109505 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -march=armv8.2-a+sve" } */
+ 
+ #pragma GCC aarch64 "arm_sve.h"
+ 
+ unsigned long
+ foo (unsigned long x)
+ {
+   unsigned long y = svcntb ();
+   return (x | 15) & y;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/sve/pr97696.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/sve/pr97696.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/sve/pr97696.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/sve/pr97696.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,29 ----
+ /* { dg-skip-if "" { no_fsanitize_address } } */
+ /* { dg-options "-fsanitize=address -fsanitize-address-use-after-scope" } */
+ 
+ #include <arm_sve.h>
+ 
+ __attribute__((noinline, noclone)) int
+ foo (char *a)
+ {
+   int i, j = 0;
+   asm volatile ("" : "+r" (a) : : "memory");
+   for (i = 0; i < 12; i++)
+     j += a[i];
+   return j;
+ }
+ 
+ int
+ main ()
+ {
+   int i, j = 0;
+   for (i = 0; i < 4; i++)
+     {
+       char a[12];
+       __SVInt8_t freq;
+       __builtin_bcmp (&freq, a, 10);
+       __builtin_memset (a, 0, sizeof (a));
+       j += foo (a);
+     }
+   return j;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/test_frame_17.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/test_frame_17.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/test_frame_17.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/test_frame_17.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-O2" } */
  
  /* Test reuse of stack adjustment temporaries.  */
  
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-O2 -fno-stack-protector" } */
  
  /* Test reuse of stack adjustment temporaries.  */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/torture/pr111677.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/torture/pr111677.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/torture/pr111677.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/torture/pr111677.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,28 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target fopenmp } */
+ /* { dg-options "-ffast-math -fstack-protector-strong -fopenmp" } */
+ typedef struct {
+   long size_z;
+   int width;
+ } dt_bilateral_t;
+ typedef float dt_aligned_pixel_t[4];
+ #pragma omp declare simd
+ void dt_bilateral_splat(dt_bilateral_t *b) {
+   float *buf;
+   long offsets[8];
+   for (; b;) {
+     int firstrow;
+     for (int j = firstrow; j; j++)
+       for (int i; i < b->width; i++) {
+         dt_aligned_pixel_t contrib;
+         for (int k = 0; k < 4; k++)
+           buf[offsets[k]] += contrib[k];
+       }
+     float *dest;
+     for (int j = (long)b; j; j++) {
+       float *src = (float *)b->size_z;
+       for (int i = 0; i < (long)b; i++)
+         dest[i] += src[i];
+     }
+   }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/alpha/pr106966.c gcc-12.4.0/gcc/testsuite/gcc.target/alpha/pr106966.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/alpha/pr106966.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/alpha/pr106966.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,13 ----
+ /* PR target/106906 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -mbuild-constants" } */
+ 
+ void
+ do_console (unsigned short *vga)
+ {
+   vga[0] = 'H';
+   vga[1] = 'e';
+   vga[2] = 'l';
+   vga[3] = 'l';
+   vga[4] = 'o';
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/alpha/pr115297.c gcc-12.4.0/gcc/testsuite/gcc.target/alpha/pr115297.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/alpha/pr115297.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/alpha/pr115297.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,13 ----
+ /* PR target/115297 */
+ /* { dg-do compile } */
+ /* { dg-options "-O1" } */
+ 
+ enum { BPF_F_USER_BUILD_ID } __bpf_get_stack_size;
+ long __bpf_get_stack_flags, bpf_get_stack___trans_tmp_2;
+ 
+ void bpf_get_stack() {
+   unsigned elem_size;
+   int err = elem_size = __bpf_get_stack_flags ?: sizeof(long);
+   if (__builtin_expect(__bpf_get_stack_size % elem_size, 0))
+     bpf_get_stack___trans_tmp_2 = err;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/acle/cde-mve-full-assembly.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/acle/cde-mve-full-assembly.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/acle/cde-mve-full-assembly.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/acle/cde-mve-full-assembly.c	Thu Jun 20 08:08:08 2024
***************
*** 567,646 ****
     contain back references).  */
  /*
  ** test_cde_vcx1q_mfloat16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mfloat32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_muint8x16_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_muint16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_muint32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_muint64x2_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mint8x16_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mint16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mint32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mint64x2_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
--- 567,646 ----
     contain back references).  */
  /*
  ** test_cde_vcx1q_mfloat16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mfloat32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_muint8x16_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_muint16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_muint32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_muint64x2_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mint8x16_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mint16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mint32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mint64x2_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
***************
*** 649,728 ****
  
  /*
  ** test_cde_vcx1qa_mfloat16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mfloat32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_muint8x16_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_muint16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_muint32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_muint64x2_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mint8x16_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mint16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mint32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mint64x2_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
--- 649,728 ----
  
  /*
  ** test_cde_vcx1qa_mfloat16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mfloat32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_muint8x16_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_muint16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_muint32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_muint64x2_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mint8x16_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mint16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mint32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mint64x2_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
***************
*** 731,738 ****
  
  /*
  ** test_cde_vcx2q_mfloat16x8_tuint16x8_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 731,738 ----
  
  /*
  ** test_cde_vcx2q_mfloat16x8_tuint16x8_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 740,747 ****
  */
  /*
  ** test_cde_vcx2q_mfloat16x8_tfloat32x4_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 740,747 ----
  */
  /*
  ** test_cde_vcx2q_mfloat16x8_tfloat32x4_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 749,756 ****
  */
  /*
  ** test_cde_vcx2q_mfloat32x4_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 749,756 ----
  */
  /*
  ** test_cde_vcx2q_mfloat32x4_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 758,765 ****
  */
  /*
  ** test_cde_vcx2q_mint64x2_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 758,765 ----
  */
  /*
  ** test_cde_vcx2q_mint64x2_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 767,774 ****
  */
  /*
  ** test_cde_vcx2q_mint8x16_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 767,774 ----
  */
  /*
  ** test_cde_vcx2q_mint8x16_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 776,783 ****
  */
  /*
  ** test_cde_vcx2q_muint16x8_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 776,783 ----
  */
  /*
  ** test_cde_vcx2q_muint16x8_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 785,792 ****
  */
  /*
  ** test_cde_vcx2q_muint8x16_tint64x2_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 785,792 ----
  */
  /*
  ** test_cde_vcx2q_muint8x16_tint64x2_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 794,801 ****
  */
  /*
  ** test_cde_vcx2q_muint8x16_tint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 794,801 ----
  */
  /*
  ** test_cde_vcx2q_muint8x16_tint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 803,810 ****
  */
  /*
  ** test_cde_vcx2q_muint8x16_tuint16x8_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 803,810 ----
  */
  /*
  ** test_cde_vcx2q_muint8x16_tuint16x8_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 812,819 ****
  */
  /*
  ** test_cde_vcx2q_muint8x16_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 812,819 ----
  */
  /*
  ** test_cde_vcx2q_muint8x16_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 823,830 ****
  
  /*
  ** test_cde_vcx2qa_mfloat16x8_tuint16x8_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 823,830 ----
  
  /*
  ** test_cde_vcx2qa_mfloat16x8_tuint16x8_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 832,839 ****
  */
  /*
  ** test_cde_vcx2qa_mfloat16x8_tfloat32x4_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 832,839 ----
  */
  /*
  ** test_cde_vcx2qa_mfloat16x8_tfloat32x4_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 841,848 ****
  */
  /*
  ** test_cde_vcx2qa_mfloat32x4_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 841,848 ----
  */
  /*
  ** test_cde_vcx2qa_mfloat32x4_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 850,857 ****
  */
  /*
  ** test_cde_vcx2qa_mint64x2_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 850,857 ----
  */
  /*
  ** test_cde_vcx2qa_mint64x2_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 859,866 ****
  */
  /*
  ** test_cde_vcx2qa_mint8x16_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 859,866 ----
  */
  /*
  ** test_cde_vcx2qa_mint8x16_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 868,875 ****
  */
  /*
  ** test_cde_vcx2qa_muint16x8_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 868,875 ----
  */
  /*
  ** test_cde_vcx2qa_muint16x8_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 877,884 ****
  */
  /*
  ** test_cde_vcx2qa_muint8x16_tint64x2_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 877,884 ----
  */
  /*
  ** test_cde_vcx2qa_muint8x16_tint64x2_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 886,893 ****
  */
  /*
  ** test_cde_vcx2qa_muint8x16_tint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 886,893 ----
  */
  /*
  ** test_cde_vcx2qa_muint8x16_tint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 895,902 ****
  */
  /*
  ** test_cde_vcx2qa_muint8x16_tuint16x8_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 895,902 ----
  */
  /*
  ** test_cde_vcx2qa_muint8x16_tuint16x8_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 904,911 ****
  */
  /*
  ** test_cde_vcx2qa_muint8x16_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 904,911 ----
  */
  /*
  ** test_cde_vcx2qa_muint8x16_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 915,922 ****
  
  /*
  ** test_cde_vcx3q_muint8x16_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 915,922 ----
  
  /*
  ** test_cde_vcx3q_muint8x16_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 924,931 ****
  */
  /*
  ** test_cde_vcx3q_mfloat16x8_tfloat16x8_tfloat16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 924,931 ----
  */
  /*
  ** test_cde_vcx3q_mfloat16x8_tfloat16x8_tfloat16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 933,940 ****
  */
  /*
  ** test_cde_vcx3q_mfloat32x4_tuint64x2_tfloat16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 933,940 ----
  */
  /*
  ** test_cde_vcx3q_mfloat32x4_tuint64x2_tfloat16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 942,949 ****
  */
  /*
  ** test_cde_vcx3q_muint16x8_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 942,949 ----
  */
  /*
  ** test_cde_vcx3q_muint16x8_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 951,958 ****
  */
  /*
  ** test_cde_vcx3q_muint8x16_tuint16x8_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 951,958 ----
  */
  /*
  ** test_cde_vcx3q_muint8x16_tuint16x8_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 960,967 ****
  */
  /*
  ** test_cde_vcx3q_muint8x16_tuint8x16_tuint16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 960,967 ----
  */
  /*
  ** test_cde_vcx3q_muint8x16_tuint8x16_tuint16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 969,976 ****
  */
  /*
  ** test_cde_vcx3q_mint8x16_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 969,976 ----
  */
  /*
  ** test_cde_vcx3q_mint8x16_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 978,985 ****
  */
  /*
  ** test_cde_vcx3q_muint8x16_tint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 978,985 ----
  */
  /*
  ** test_cde_vcx3q_muint8x16_tint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 987,994 ****
  */
  /*
  ** test_cde_vcx3q_muint8x16_tuint8x16_tint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 987,994 ----
  */
  /*
  ** test_cde_vcx3q_muint8x16_tuint8x16_tint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 996,1003 ****
  */
  /*
  ** test_cde_vcx3q_mint64x2_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 996,1003 ----
  */
  /*
  ** test_cde_vcx3q_mint64x2_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1005,1012 ****
  */
  /*
  ** test_cde_vcx3q_muint8x16_tint64x2_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1005,1012 ----
  */
  /*
  ** test_cde_vcx3q_muint8x16_tint64x2_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1014,1021 ****
  */
  /*
  ** test_cde_vcx3q_muint8x16_tuint8x16_tint64x2_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1014,1021 ----
  */
  /*
  ** test_cde_vcx3q_muint8x16_tuint8x16_tint64x2_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1023,1030 ****
  */
  /*
  ** test_cde_vcx3q_muint8x16_tint64x2_tint64x2_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1023,1030 ----
  */
  /*
  ** test_cde_vcx3q_muint8x16_tint64x2_tint64x2_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1034,1041 ****
  
  /*
  ** test_cde_vcx3qa_muint8x16_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1034,1041 ----
  
  /*
  ** test_cde_vcx3qa_muint8x16_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1043,1050 ****
  */
  /*
  ** test_cde_vcx3qa_mfloat16x8_tfloat16x8_tfloat16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1043,1050 ----
  */
  /*
  ** test_cde_vcx3qa_mfloat16x8_tfloat16x8_tfloat16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1052,1059 ****
  */
  /*
  ** test_cde_vcx3qa_mfloat32x4_tuint64x2_tfloat16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1052,1059 ----
  */
  /*
  ** test_cde_vcx3qa_mfloat32x4_tuint64x2_tfloat16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1061,1068 ****
  */
  /*
  ** test_cde_vcx3qa_muint16x8_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1061,1068 ----
  */
  /*
  ** test_cde_vcx3qa_muint16x8_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1070,1077 ****
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tuint16x8_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1070,1077 ----
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tuint16x8_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1079,1086 ****
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tuint8x16_tuint16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1079,1086 ----
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tuint8x16_tuint16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1088,1095 ****
  */
  /*
  ** test_cde_vcx3qa_mint8x16_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1088,1095 ----
  */
  /*
  ** test_cde_vcx3qa_mint8x16_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1097,1104 ****
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1097,1104 ----
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1106,1113 ****
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tuint8x16_tint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1106,1113 ----
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tuint8x16_tint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1115,1122 ****
  */
  /*
  ** test_cde_vcx3qa_mint64x2_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1115,1122 ----
  */
  /*
  ** test_cde_vcx3qa_mint64x2_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1124,1131 ****
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tint64x2_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1124,1131 ----
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tint64x2_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1133,1140 ****
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tuint8x16_tint64x2_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1133,1140 ----
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tuint8x16_tint64x2_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1142,1149 ****
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tint64x2_tint64x2_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1142,1149 ----
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tint64x2_tint64x2_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/cmse/extend-param.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/cmse/extend-param.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/cmse/extend-param.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/cmse/extend-param.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,109 ----
+ /* { dg-do compile } */
+ /* { dg-options "-mcmse -fshort-enums" } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ #include <arm_cmse.h>
+ #include <stdbool.h>
+ 
+ #define ARRAY_SIZE (256)
+ char array[ARRAY_SIZE];
+ 
+ enum offset
+ {
+     zero = 0,
+     one = 1,
+     two = 2
+ };
+ 
+ /*
+ **__acle_se_unsignSecureFunc:
+ **	...
+ **	uxtb	r0, r0
+ **	...
+ */
+ __attribute__((cmse_nonsecure_entry)) char unsignSecureFunc (unsigned char index) {
+     if (index >= ARRAY_SIZE)
+       return 0;
+     return array[index];
+ }
+ 
+ /*
+ **__acle_se_signSecureFunc:
+ **	...
+ **	sxtb	r0, r0
+ **	...
+ */
+ __attribute__((cmse_nonsecure_entry)) char signSecureFunc (signed char index) {
+     if (index >= ARRAY_SIZE)
+       return 0;
+     return array[index];
+ }
+ 
+ /*
+ **__acle_se_shortUnsignSecureFunc:
+ **	...
+ **	uxth	r0, r0
+ **	...
+ */
+ __attribute__((cmse_nonsecure_entry)) char shortUnsignSecureFunc (unsigned short index) {
+     if (index >= ARRAY_SIZE)
+       return 0;
+     return array[index];
+ }
+ 
+ /*
+ **__acle_se_shortSignSecureFunc:
+ **	...
+ **	sxth	r0, r0
+ **	...
+ */
+ __attribute__((cmse_nonsecure_entry)) char shortSignSecureFunc (signed short index) {
+     if (index >= ARRAY_SIZE)
+       return 0;
+     return array[index];
+ }
+ 
+ /*
+ **__acle_se_enumSecureFunc:
+ **	...
+ **	uxtb	r0, r0
+ **	...
+ */
+ __attribute__((cmse_nonsecure_entry)) char enumSecureFunc (enum offset index) {
+ 
+   // Compiler may optimize away bounds check as value is an unsigned char.
+ 
+   // According to AAPCS caller will zero extend to ensure value is < 256.
+ 
+   if (index >= ARRAY_SIZE)
+     return 0;
+   return array[index];
+ }
+ 
+ /*
+ **__acle_se_boolSecureFunc:
+ **	...
+ **	uxtb	r0, r0
+ **	...
+ */
+ __attribute__((cmse_nonsecure_entry)) char boolSecureFunc (bool index) {
+   if (index >= ARRAY_SIZE)
+     return 0;
+   return array[index];
+ }
+ 
+ /*
+ **__acle_se_boolCharShortEnumSecureFunc:
+ **	...
+ **	uxtb	r0, r0
+ **	uxtb	r1, r1
+ **	uxth	r2, r2
+ **	uxtb	r3, r3
+ **	...
+ */
+ __attribute__((cmse_nonsecure_entry,optimize(0))) char boolCharShortEnumSecureFunc (bool a, unsigned char b, unsigned short c, enum offset d) {
+   size_t index = a + b + c + d;
+   if (index >= ARRAY_SIZE)
+     return 0;
+   return array[index];
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/cmse/extend-return.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/cmse/extend-return.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/cmse/extend-return.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/cmse/extend-return.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,142 ----
+ /* { dg-do compile } */
+ /* { dg-options "-mcmse -fshort-enums" } */
+ /* ARMv8-M expectation with target { ! arm_cmse_clear_ok }.  */
+ /* ARMv8.1-M expectation with target arm_cmse_clear_ok.  */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ #include <arm_cmse.h>
+ #include <stdbool.h>
+ 
+ enum offset
+ {
+     zero = 0,
+     one = 1,
+     two = 2
+ };
+ 
+ typedef unsigned char __attribute__ ((cmse_nonsecure_call)) ns_unsign_foo_t (void);
+ typedef signed char __attribute__ ((cmse_nonsecure_call)) ns_sign_foo_t (void);
+ typedef unsigned short __attribute__ ((cmse_nonsecure_call)) ns_short_unsign_foo_t (void);
+ typedef signed short __attribute__ ((cmse_nonsecure_call)) ns_short_sign_foo_t (void);
+ typedef enum offset __attribute__ ((cmse_nonsecure_call)) ns_enum_foo_t (void);
+ typedef bool __attribute__ ((cmse_nonsecure_call)) ns_bool_foo_t (void);
+ 
+ /*
+ **unsignNonsecure0:  { target arm_cmse_clear_ok }
+ **	...
+ **	blxns	r[0-3]
+ **	...
+ **	uxtb	r0, r0
+ **	...
+ */
+ /*
+ **unsignNonsecure0: { target { ! arm_cmse_clear_ok } }
+ **	...
+ **	bl	__gnu_cmse_nonsecure_call
+ **	uxtb	r0, r0
+ **	...
+ */
+ unsigned char unsignNonsecure0 (ns_unsign_foo_t * ns_foo_p)
+ {
+   return ns_foo_p ();
+ }
+ 
+ /*
+ **signNonsecure0:  { target arm_cmse_clear_ok }
+ **	...
+ **	blxns	r[0-3]
+ **	...
+ **	sxtb	r0, r0
+ **	...
+ */
+ /*
+ **signNonsecure0: { target { ! arm_cmse_clear_ok } }
+ **	...
+ **	bl	__gnu_cmse_nonsecure_call
+ **	sxtb	r0, r0
+ **	...
+ */
+ signed char signNonsecure0 (ns_sign_foo_t * ns_foo_p)
+ {
+   return ns_foo_p ();
+ }
+ 
+ /*
+ **shortUnsignNonsecure0:  { target arm_cmse_clear_ok }
+ **	...
+ **	blxns	r[0-3]
+ **	...
+ **	uxth	r0, r0
+ **	...
+ */
+ /*
+ **shortUnsignNonsecure0: { target { ! arm_cmse_clear_ok } }
+ **	...
+ **	bl	__gnu_cmse_nonsecure_call
+ **	uxth	r0, r0
+ **	...
+ */
+ unsigned short shortUnsignNonsecure0 (ns_short_unsign_foo_t * ns_foo_p)
+ {
+   return ns_foo_p ();
+ }
+ 
+ /*
+ **shortSignNonsecure0:  { target arm_cmse_clear_ok }
+ **	...
+ **	blxns	r[0-3]
+ **	...
+ **	sxth	r0, r0
+ **	...
+ */
+ /*
+ **shortSignNonsecure0: { target { ! arm_cmse_clear_ok } }
+ **	...
+ **	bl	__gnu_cmse_nonsecure_call
+ **	sxth	r0, r0
+ **	...
+ */
+ signed short shortSignNonsecure0 (ns_short_sign_foo_t * ns_foo_p)
+ {
+   return ns_foo_p ();
+ }
+ 
+ /*
+ **enumNonsecure0:  { target arm_cmse_clear_ok }
+ **	...
+ **	blxns	r[0-3]
+ **	...
+ **	uxtb	r0, r0
+ **	...
+ */
+ /*
+ **enumNonsecure0: { target { ! arm_cmse_clear_ok } }
+ **	...
+ **	bl	__gnu_cmse_nonsecure_call
+ **	uxtb	r0, r0
+ **	...
+ */
+ unsigned char __attribute__((noipa)) enumNonsecure0 (ns_enum_foo_t * ns_foo_p)
+ {
+   return ns_foo_p ();
+ }
+ 
+ /*
+ **boolNonsecure0:  { target arm_cmse_clear_ok }
+ **	...
+ **	blxns	r[0-3]
+ **	...
+ **	uxtb	r0, r0
+ **	...
+ */
+ /*
+ **boolNonsecure0: { target { ! arm_cmse_clear_ok } }
+ **	...
+ **	bl	__gnu_cmse_nonsecure_call
+ **	uxtb	r0, r0
+ **	...
+ */
+ unsigned char boolNonsecure0 (ns_bool_foo_t * ns_foo_p)
+ {
+   return ns_foo_p ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/general/preserve_user_namespace_1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/general/preserve_user_namespace_1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/general/preserve_user_namespace_1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/general/preserve_user_namespace_1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #define __ARM_MVE_PRESERVE_USER_NAMESPACE
+ #include <arm_mve.h>
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! asrl_reg (int64_t longval3, int32_t x)
  {
!   return asrl (longval3, x);
  }
  
! /* { dg-final { scan-assembler "asrl\\tr\[0-9\]+, r\[0-9\]+, r\[0-9\]+" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	asrl	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t value, int32_t shift)
  {
!   return asrl (value, shift);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! lsll_reg (uint64_t longval3, int32_t x)
  {
!   return lsll (longval3, x);
  }
  
! /* { dg-final { scan-assembler "lsll\\tr\[0-9\]+, r\[0-9\]+, r\[0-9\]+" } } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	lsll	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint64_t value, int32_t shift)
  {
!   return lsll (value, shift);
  }
  
! /*
! **foo1:
! **	...
! **	lsll	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint64_t
! foo1 (int32_t shift)
! {
!   return lsll (1, shift);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c	Thu Jan  1 00:00:00 1970
***************
*** 1,47 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include <arm_mve.h>
- int8x16_t foo (int8x16_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- int16x8_t foo1 (int16x8_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- int32x4_t foo2 (int32x4_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- uint8x16_t foo3 (uint8x16_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- uint16x8_t foo4 (uint16x8_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- uint32x4_t foo5 (uint32x4_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- float16x8_t foo6 (float16x8_t a)
- {
-   return vaddq (a, (float16_t)23.6);
- }
- float32x4_t foo7 (float32x4_t a)
- {
-   return vaddq (a, (float32_t)23.46);
- }
- float16x8_t foo8 (float16x8_t a)
- {
-   return vaddq (a, 23.6);
- }
- float32x4_t foo9 (float32x4_t a)
- {
-   return vaddq (a, 23.46);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,61 ----
+ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
+ /* { dg-add-options arm_v8_1m_mve_fp } */
+ /* { dg-additional-options "-O2 -Wno-pedantic -Wno-long-long -Wno-incompatible-pointer-types" { target c } } */
+ /* { dg-additional-options "-O2 -Wno-pedantic -Wno-long-long -fpermissive" { target c++ } } */
+ #include "arm_mve.h"
+ 
+ float f1;
+ double f2;
+ float16_t f3;
+ float32_t f4;
+ __fp16 f5;
+ #ifndef __cplusplus
+ _Float16 f6;
+ #endif
+ 
+ float16x8_t floatvec;
+ 
+ /* Test a few different supported ways of passing a scalar int value.
+ The intrinsic vmulq was chosen arbitrarily, but it is representative of
+ all intrinsics that take a non-const scalar value.  */
+ void
+ test_scalars (void)
+ {
+     /* Test a few different supported ways of passing a float value.  */
+     floatvec = vmulq(floatvec, 0.5);
+     floatvec = vmulq(floatvec, 0.5f);
+     floatvec = vmulq(floatvec, (__fp16) 0.5);
+     floatvec = vmulq(floatvec, f1);
+     floatvec = vmulq(floatvec, f2);
+     floatvec = vmulq(floatvec, f3);
+     floatvec = vmulq(floatvec, f4);
+     floatvec = vmulq(floatvec, f5);
+ #ifndef __cplusplus
+     floatvec = vmulq(floatvec, f6);
+     floatvec = vmulq(floatvec, 0.15f16);
+     floatvec = vmulq(floatvec, (_Float16) 0.15);
+ #endif
+ }
+ 
+ /* Next, test a number of valid pointer overloads.  */
+ void
+ foo11 (__fp16 * addr, float16x8_t value)
+ {
+   vst1q (addr, value);
+ }
+ 
+ #ifndef __cplusplus
+ void
+ foo12 (_Float16 * addr, float16x8_t value)
+ {
+   vst1q (addr, value);
+ }
+ #endif
+ 
+ void
+ foo13 (float * addr, float32x4_t value)
+ {
+   vst1q (addr, value);
+ }
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,100 ----
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-additional-options "-O2 -Wno-pedantic -Wno-long-long -Wno-incompatible-pointer-types" { target c } } */
+ /* { dg-additional-options "-O2 -Wno-pedantic -Wno-long-long -fpermissive" { target c++ } } */
+ #include "arm_mve.h"
+ 
+ int i1;
+ short i2;
+ long i3;
+ long long i4;
+ int8_t i5;
+ int16_t i6;
+ int32_t i7;
+ int64_t i8;
+ 
+ int16x8_t intvec;
+ 
+ /* Test a few different supported ways of passing a scalar int value.
+ The intrinsic vmulq was chosen arbitrarily, but it is representative of
+ all intrinsics that take a non-const scalar value.  */
+ void
+ test_scalars (void)
+ {
+     intvec = vmulq(intvec, 2);
+     intvec = vmulq(intvec, (int32_t) 2);
+     intvec = vmulq(intvec, (short) 2);
+     intvec = vmulq(intvec, i1);
+     intvec = vmulq(intvec, i2);
+     intvec = vmulq(intvec, i3);
+     intvec = vmulq(intvec, i4);
+     intvec = vmulq(intvec, i5);
+     intvec = vmulq(intvec, i6);
+     intvec = vmulq(intvec, i7);
+     intvec = vmulq(intvec, i8);
+ }
+ 
+ /* Next, test a number of valid pointer overloads.  */
+ void
+ foo1 (signed char * addr, int8x16_t value)
+ {
+   vst1q (addr, value);
+ }
+ 
+ void
+ foo2 (short * addr, int16x8_t value)
+ {
+   vst1q (addr, value);
+ }
+ 
+ /* Glibc defines int32_t as 'int' while newlib defines it as 'long int'.
+ 
+    Although these correspond to the same size, g++ complains when using the
+    'wrong' version:
+   invalid conversion from 'long int*' to 'int32_t*' {aka 'int*'} [-fpermissive]
+ 
+   The trick below is to make this test pass whether using glibc-based or
+   newlib-based toolchains.  */
+ 
+ #if defined(__GLIBC__)
+ #define word_type int
+ #else
+ #define word_type long int
+ #endif
+ void
+ foo3 (word_type * addr, int32x4_t value)
+ {
+   vst1q (addr, value);
+ }
+ 
+ void
+ foo5 (long long * addr, uint64x2_t value)
+ {
+   vldrdq_gather_offset (addr, value);
+ }
+ 
+ void
+ foo6 (unsigned char * addr, uint8x16_t value)
+ {
+   vst1q (addr, value);
+ }
+ 
+ void
+ foo7 (unsigned short * addr, uint16x8_t value)
+ {
+   vst1q (addr, value);
+ }
+ 
+ void
+ foo8 (unsigned word_type * addr, uint32x4_t value)
+ {
+   vst1q (addr, value);
+ }
+ 
+ void
+ foo10 (unsigned long long * addr, uint64x2_t value)
+ {
+   vldrdq_gather_offset (addr, value);
+ }
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_m.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_m.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_m.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_m.c	Thu Jan  1 00:00:00 1970
***************
*** 1,48 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include <arm_mve.h>
- mve_pred16_t p;
- 
- int32x4_t fn1 (int32x4_t vecIdx)
- {
-   return vaddq_m(vuninitializedq_s32(), vecIdx, 1, p);
- }
- 
- int16x8_t fn2 (int16x8_t vecIdx)
- {
-   return vaddq_m(vuninitializedq_s16(), vecIdx, 1, p);
- }
- 
- int8x16_t fn3 (int8x16_t vecIdx)
- {
-   return vaddq_m(vuninitializedq_s8(), vecIdx, 1, p);
- }
- 
- uint32x4_t fn4 (uint32x4_t vecIdx)
- {
-   return vaddq_m(vuninitializedq_u32(), vecIdx, 1, p);
- }
- 
- uint16x8_t fn5 (uint16x8_t vecIdx)
- {
-   return vaddq_m(vuninitializedq_u16(), vecIdx, 1, p);
- }
- 
- uint8x16_t fn6 (uint8x16_t vecIdx)
- {
-   return vaddq_m(vuninitializedq_u8(), vecIdx, 1, p);
- }
- 
- float32x4_t fn7 (float32x4_t vecIdx)
- {
-   return vaddq_m(vuninitializedq_f32(), vecIdx, (float32_t) 1.23, p);
- }
- 
- float16x8_t fn8 (float16x8_t vecIdx)
- {
-   return vaddq_m(vuninitializedq_f16(), vecIdx, (float16_t) 1.40, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_n.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_n.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_n.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_n.c	Thu Jan  1 00:00:00 1970
***************
*** 1,31 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include <arm_mve.h>
- int8x16_t foo (int8x16_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- int16x8_t foo1 (int16x8_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- int32x4_t foo2 (int32x4_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- uint8x16_t foo3 (uint8x16_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- uint16x8_t foo4 (uint16x8_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- uint32x4_t foo5 (uint32x4_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint16x8_t
- foo1 (uint16x8_t inactive, int32_t a, mve_pred16_t p)
- {
-   return vddupq_m (inactive, a, 1, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (uint32x4_t inactive, int32_t a, mve_pred16_t p)
- {
-   return vddupq_m (inactive, a, 4, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u8.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint8x16_t
- foo1 (uint8x16_t inactive, int32_t a, mve_pred16_t p)
- {
-   return vddupq_m (inactive, a, 4, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint16x8_t
- foo1 (int32_t a)
- {
-   return vddupq_u16 (a, 4);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (int32_t a)
- {
-   return vddupq_u32 (a, 1);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u8.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint8x16_t
- foo1 (int32_t a)
- {
-   return vddupq_u8 (a, 1);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint16x8_t
- foo1 (int32_t a, mve_pred16_t p)
- {
-   return vddupq_x_u16 (a, 1, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint32x4_t
- foo1 (int32_t a, mve_pred16_t p)
- {
-   return vddupq_x_u32 (a, 4, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u8.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint8x16_t
- foo1 (int32_t a, mve_pred16_t p)
- {
-   return vddupq_x_u8 (a, 4, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint16x8_t
- foo1 (int32_t a, uint32_t b, mve_pred16_t p)
- {
-   return vdwdupq_x_u16 (a, b, 1, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (int32_t a, uint32_t b, mve_pred16_t p)
- {
-   return vdwdupq_x_u32 (a, b, 4, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u8.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint8x16_t
- foo1 (int32_t a, uint32_t b, mve_pred16_t p)
- {
-   return vdwdupq_x_u8 (a, b, 4, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint16x8_t
- foo1 (uint16x8_t inactive, int32_t a, mve_pred16_t p)
- {
-   return vidupq_m (inactive, a, 4, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint32x4_t
- foo1 (uint32x4_t inactive, int32_t a, mve_pred16_t p)
- {
-   return vidupq_m (inactive, a, 1, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u8.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint8x16_t
- foo1 (uint8x16_t inactive, int32_t a, mve_pred16_t p)
- {
-   return vidupq_m (inactive, a, 1, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint16x8_t
- foo1 (int32_t a)
- {
-   return vidupq_u16 (a, 4);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint32x4_t
- foo1 (int32_t a)
- {
-   return vidupq_u32 (a, 1);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u8.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint8x16_t
- foo1 (int32_t a)
- {
-   return vidupq_u8 (a, 1);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint16x8_t
- foo1 (int32_t a, mve_pred16_t p)
- {
-   return vidupq_x_u16 (a, 4, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint32x4_t
- foo1 (int32_t a, mve_pred16_t p)
- {
-   return vidupq_x_u32 (a, 1, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u8.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint8x16_t
- foo1 (int32_t a, mve_pred16_t p)
- {
-   return vidupq_x_u8 (a, 1, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint16x8_t
- foo1 (int32_t a, uint32_t b, mve_pred16_t p)
- {
-   return viwdupq_x_u16 (a, b, 2, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (int32_t a, uint32_t b, mve_pred16_t p)
- {
-   return viwdupq_x_u32 (a, b, 4, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u8.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint8x16_t
- foo1 (int32_t a, uint32_t b, mve_pred16_t p)
- {
-   return viwdupq_x_u8 (a, b, 8, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_s64.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int64x2_t
- foo1 (int64_t * base, uint64x2_t offset)
- {
-   return vldrdq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_u64.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint64x2_t
- foo1 (uint64_t * base, uint64x2_t offset)
- {
-   return vldrdq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_s64.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int64x2_t
- foo1 (int64_t * base, uint64x2_t offset, mve_pred16_t p)
- {
-   return vldrdq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_u64.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint64x2_t
- foo1 (uint64_t * base, uint64x2_t offset, mve_pred16_t p)
- {
-   return vldrdq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_s64.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int64x2_t
- foo1 (int64_t * base, uint64x2_t offset)
- {
-   return vldrdq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_u64.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint64x2_t
- foo1 (uint64_t * base, uint64x2_t offset)
- {
-   return vldrdq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_s64.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int64x2_t
- foo1 (int64_t * base, uint64x2_t offset, mve_pred16_t p)
- {
-   return vldrdq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_u64.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint64x2_t
- foo1 (uint64_t * base, uint64x2_t offset, mve_pred16_t p)
- {
-   return vldrdq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_f16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16_t * base, uint16x8_t offset)
- {
-   return vldrhq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int16x8_t
- foo1 (int16_t * base, uint16x8_t offset)
- {
-   return vldrhq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int32x4_t
- foo1 (int16_t * base, uint32x4_t offset)
- {
-   return vldrhq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint16x8_t
- foo1 (uint16_t * base, uint16x8_t offset)
- {
-   return vldrhq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (uint16_t * base, uint32x4_t offset)
- {
-   return vldrhq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_f16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16_t * base, uint16x8_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int16x8_t
- foo1 (int16_t * base, uint16x8_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int32x4_t
- foo1 (int16_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint16x8_t
- foo1 (uint16_t * base, uint16x8_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (uint16_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_f16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16_t * base, uint16x8_t offset)
- {
-   return vldrhq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- int16x8_t
- foo1 (int16_t * base, uint16x8_t offset)
- {
-   return vldrhq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- int32x4_t
- foo1 (int16_t * base, uint32x4_t offset)
- {
-   return vldrhq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint16x8_t
- foo1 (uint16_t * base, uint16x8_t offset)
- {
-   return vldrhq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (uint16_t * base, uint32x4_t offset)
- {
-   return vldrhq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_f16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16_t * base, uint16x8_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler "vldrht.f16"  }  } */
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int16x8_t
- foo1 (int16_t * base, uint16x8_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler "vldrht.u16"  }  } */
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int32x4_t
- foo1 (int16_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint16x8_t
- foo1 (uint16_t * base, uint16x8_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint32x4_t
- foo1 (uint16_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_f32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32_t * base, uint32x4_t offset)
- {
-   return vldrwq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_s32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- int32x4_t
- foo1 (int32_t * base, uint32x4_t offset)
- {
-   return vldrwq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (uint32_t * base, uint32x4_t offset)
- {
-   return vldrwq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_f32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrwq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_s32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- int32x4_t
- foo1 (int32_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrwq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (uint32_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrwq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_f32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32_t * base, uint32x4_t offset)
- {
-   return vldrwq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_s32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- int32x4_t
- foo1 (int32_t * base, uint32x4_t offset)
- {
-   return vldrwq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (uint32_t * base, uint32x4_t offset)
- {
-   return vldrwq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_f32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrwq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_s32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- int32x4_t
- foo1 (int32_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrwq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (uint32_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrwq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset.c	Thu Jan  1 00:00:00 1970
***************
*** 1,141 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- int
- foowu32( uint32_t * pDataSrc, uint32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     uint32x4_t vecIn1 = vldrwq_u32 ((uint32_t const *) pDataSrc);
-     uint32x4_t vecIn2 = vldrwq_u32 ((uint32_t const *) &pDataSrc[4]);
-     vstrwq_scatter_shifted_offset_u32 (pDataDest, vecOffs1, vecIn1);
-     vstrwq_scatter_shifted_offset_u32 (pDataDest, vecOffs2, vecIn2);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foowf32( float32_t * pDataSrc, float32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     float32x4_t vecIn1 = vldrwq_f32 ((float32_t const *) pDataSrc);
-     float32x4_t vecIn2 = vldrwq_f32 ((float32_t const *) &pDataSrc[4]);
-     vstrwq_scatter_shifted_offset_f32 (pDataDest, vecOffs1, vecIn1);
-     vstrwq_scatter_shifted_offset_f32 (pDataDest, vecOffs2, vecIn2);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foohu16( uint16_t * pDataSrc, uint16_t * pDataDest)
- {
-     const uint16x8_t vecOffs1 = { 0, 3, 6, 1, 4, 7, 2, 5};
-     const uint16x8_t vecOffs2 = { 9, 11, 13, 10, 12, 15, 8, 14};
-     uint16x8_t vecIn1 = vldrhq_u16 ((uint16_t const *) pDataSrc);
-     uint16x8_t vecIn2 = vldrhq_u16 ((uint16_t const *) &pDataSrc[8]);
-     vstrhq_scatter_shifted_offset_u16 (pDataDest, vecOffs1, vecIn1);
-     vstrhq_scatter_shifted_offset_u16 (pDataDest, vecOffs2, vecIn2);
-     pDataDest[16] = pDataSrc[16];
-     return 0;
- }
- 
- int
- foohu32( uint32_t * pDataSrc, uint32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     uint32x4_t vecIn1 = vldrhq_u32 ((uint16_t const *) pDataSrc);
-     uint32x4_t vecIn2 = vldrhq_u32 ((uint16_t const *) &pDataSrc[4]);
-     vstrhq_scatter_shifted_offset_u32 ((uint16_t *)pDataDest, vecOffs1, vecIn1);
-     vstrhq_scatter_shifted_offset_u32 ((uint16_t *)pDataDest, vecOffs2, vecIn2);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foohf16( float16_t * pDataSrc, float16_t * pDataDest)
- {
-     const uint16x8_t vecOffs1 = { 0, 3, 6, 1, 4, 7, 2, 5};
-     const uint16x8_t vecOffs2 = { 9, 11, 13, 10, 12, 15, 8, 14};
-     float16x8_t vecIn1 = vldrhq_f16 ((float16_t const *) pDataSrc);
-     float16x8_t vecIn2 = vldrhq_f16 ((float16_t const *) &pDataSrc[8]);
-     vstrhq_scatter_shifted_offset_f16 (pDataDest, vecOffs1, vecIn1);
-     vstrhq_scatter_shifted_offset_f16 (pDataDest, vecOffs2, vecIn2);
-     pDataDest[16] = pDataSrc[16];
-     return 0;
- }
- 
- int
- foodu64( uint64_t * pDataSrc, uint64_t * pDataDest)
- {
-     const uint64x2_t vecOffs1 = { 0, 1};
-     const uint64x2_t vecOffs2 = { 2, 3};
-     uint32x4_t vecIn1 = vldrwq_u32 ((uint32_t const *) pDataSrc);
-     uint32x4_t vecIn2 = vldrwq_u32 ((uint32_t const *) &pDataSrc[2]);
- 
-     vstrdq_scatter_shifted_offset_u64 (pDataDest, vecOffs1, (uint64x2_t) vecIn1);
-     vstrdq_scatter_shifted_offset_u64 (pDataDest, vecOffs2, (uint64x2_t) vecIn2);
- 
-     pDataDest[2] = pDataSrc[2];
-     return 0;
- }
- 
- int
- foows32( int32_t * pDataSrc, int32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     int32x4_t vecIn1 = vldrwq_s32 ((int32_t const *) pDataSrc);
-     int32x4_t vecIn2 = vldrwq_s32 ((int32_t const *) &pDataSrc[4]);
-     vstrwq_scatter_shifted_offset_s32 (pDataDest, vecOffs1, vecIn1);
-     vstrwq_scatter_shifted_offset_s32 (pDataDest, vecOffs2, vecIn2);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foohs16( int16_t * pDataSrc, int16_t * pDataDest)
- {
-     const uint16x8_t vecOffs1 = { 0, 3, 6, 1, 4, 7, 2, 5};
-     const uint16x8_t vecOffs2 = { 9, 11, 13, 10, 12, 15, 8, 14};
-     int16x8_t vecIn1 = vldrhq_s16 ((int16_t const *) pDataSrc);
-     int16x8_t vecIn2 = vldrhq_s16 ((int16_t const *) &pDataSrc[8]);
-     vstrhq_scatter_shifted_offset_s16 (pDataDest, vecOffs1, vecIn1);
-     vstrhq_scatter_shifted_offset_s16 (pDataDest, vecOffs2, vecIn2);
-     pDataDest[16] = pDataSrc[16];
-     return 0;
- }
- 
- int
- foohs32( int32_t * pDataSrc, int32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     int32x4_t vecIn1 = vldrhq_s32 ((int16_t const *) pDataSrc);
-     int32x4_t vecIn2 = vldrhq_s32 ((int16_t const *) &pDataSrc[4]);
-     vstrhq_scatter_shifted_offset_s32 ((int16_t *)pDataDest, vecOffs1, vecIn1);
-     vstrhq_scatter_shifted_offset_s32 ((int16_t *)pDataDest, vecOffs2, vecIn2);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foods64( int64_t * pDataSrc, int64_t * pDataDest)
- {
-     const uint64x2_t vecOffs1 = { 0, 1};
-     const uint64x2_t vecOffs2 = { 2, 3};
-     int32x4_t vecIn1 = vldrwq_s32 ((int32_t const *) pDataSrc);
-     int32x4_t vecIn2 = vldrwq_s32 ((int32_t const *) &pDataSrc[2]);
- 
-     vstrdq_scatter_shifted_offset_s64 (pDataDest, vecOffs1, (int64x2_t) vecIn1);
-     vstrdq_scatter_shifted_offset_s64 (pDataDest, vecOffs2, (int64x2_t) vecIn2);
- 
-     pDataDest[2] = pDataSrc[2];
-     return 0;
- }
- 
- /* { dg-final { scan-assembler-times "vstr\[a-z\]" 20 } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset_p.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset_p.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset_p.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset_p.c	Thu Jan  1 00:00:00 1970
***************
*** 1,142 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- mve_pred16_t __p;
- int
- foowu32( uint32_t * pDataSrc, uint32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     uint32x4_t vecIn1 = vldrwq_z_u32 ((uint32_t const *) pDataSrc, __p);
-     uint32x4_t vecIn2 = vldrwq_z_u32 ((uint32_t const *) &pDataSrc[4], __p);
-     vstrwq_scatter_shifted_offset_p_u32 (pDataDest, vecOffs1, vecIn1, __p);
-     vstrwq_scatter_shifted_offset_p_u32 (pDataDest, vecOffs2, vecIn2, __p);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foowf32( float32_t * pDataSrc, float32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     float32x4_t vecIn1 = vldrwq_z_f32 ((float32_t const *) pDataSrc, __p);
-     float32x4_t vecIn2 = vldrwq_z_f32 ((float32_t const *) &pDataSrc[4], __p);
-     vstrwq_scatter_shifted_offset_p_f32 (pDataDest, vecOffs1, vecIn1, __p);
-     vstrwq_scatter_shifted_offset_p_f32 (pDataDest, vecOffs2, vecIn2, __p);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foohu16( uint16_t * pDataSrc, uint16_t * pDataDest)
- {
-     const uint16x8_t vecOffs1 = { 0, 3, 6, 1, 4, 7, 2, 5};
-     const uint16x8_t vecOffs2 = { 9, 11, 13, 10, 12, 15, 8, 14};
-     uint16x8_t vecIn1 = vldrhq_z_u16 ((uint16_t const *) pDataSrc, __p);
-     uint16x8_t vecIn2 = vldrhq_z_u16 ((uint16_t const *) &pDataSrc[8], __p);
-     vstrhq_scatter_shifted_offset_p_u16 (pDataDest, vecOffs1, vecIn1, __p);
-     vstrhq_scatter_shifted_offset_p_u16 (pDataDest, vecOffs2, vecIn2, __p);
-     pDataDest[16] = pDataSrc[16];
-     return 0;
- }
- 
- int
- foohu32( uint32_t * pDataSrc, uint32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     uint32x4_t vecIn1 = vldrhq_z_u32 ((uint16_t const *) pDataSrc, __p);
-     uint32x4_t vecIn2 = vldrhq_z_u32 ((uint16_t const *) &pDataSrc[4], __p);
-     vstrhq_scatter_shifted_offset_p_u32 ((uint16_t *)pDataDest, vecOffs1, vecIn1, __p);
-     vstrhq_scatter_shifted_offset_p_u32 ((uint16_t *)pDataDest, vecOffs2, vecIn2, __p);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foohf16( float16_t * pDataSrc, float16_t * pDataDest)
- {
-     const uint16x8_t vecOffs1 = { 0, 3, 6, 1, 4, 7, 2, 5};
-     const uint16x8_t vecOffs2 = { 9, 11, 13, 10, 12, 15, 8, 14};
-     float16x8_t vecIn1 = vldrhq_z_f16 ((float16_t const *) pDataSrc, __p);
-     float16x8_t vecIn2 = vldrhq_z_f16 ((float16_t const *) &pDataSrc[8], __p);
-     vstrhq_scatter_shifted_offset_p_f16 (pDataDest, vecOffs1, vecIn1, __p);
-     vstrhq_scatter_shifted_offset_p_f16 (pDataDest, vecOffs2, vecIn2, __p);
-     pDataDest[16] = pDataSrc[16];
-     return 0;
- }
- 
- int
- foodu64( uint64_t * pDataSrc, uint64_t * pDataDest)
- {
-     const uint64x2_t vecOffs1 = { 0, 1};
-     const uint64x2_t vecOffs2 = { 2, 3};
-     uint32x4_t vecIn1 = vldrwq_z_u32 ((uint32_t const *) pDataSrc, __p);
-     uint32x4_t vecIn2 = vldrwq_z_u32 ((uint32_t const *) &pDataSrc[2], __p);
- 
-     vstrdq_scatter_shifted_offset_p_u64 (pDataDest, vecOffs1, (uint64x2_t) vecIn1, __p);
-     vstrdq_scatter_shifted_offset_p_u64 (pDataDest, vecOffs2, (uint64x2_t) vecIn2, __p);
- 
-     pDataDest[2] = pDataSrc[2];
-     return 0;
- }
- 
- int
- foows32( int32_t * pDataSrc, int32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     int32x4_t vecIn1 = vldrwq_z_s32 ((int32_t const *) pDataSrc, __p);
-     int32x4_t vecIn2 = vldrwq_z_s32 ((int32_t const *) &pDataSrc[4], __p);
-     vstrwq_scatter_shifted_offset_p_s32 (pDataDest, vecOffs1, vecIn1, __p);
-     vstrwq_scatter_shifted_offset_p_s32 (pDataDest, vecOffs2, vecIn2, __p);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foohs16( int16_t * pDataSrc, int16_t * pDataDest)
- {
-     const uint16x8_t vecOffs1 = { 0, 3, 6, 1, 4, 7, 2, 5};
-     const uint16x8_t vecOffs2 = { 9, 11, 13, 10, 12, 15, 8, 14};
-     int16x8_t vecIn1 = vldrhq_z_s16 ((int16_t const *) pDataSrc, __p);
-     int16x8_t vecIn2 = vldrhq_z_s16 ((int16_t const *) &pDataSrc[8], __p);
-     vstrhq_scatter_shifted_offset_p_s16 (pDataDest, vecOffs1, vecIn1, __p);
-     vstrhq_scatter_shifted_offset_p_s16 (pDataDest, vecOffs2, vecIn2, __p);
-     pDataDest[16] = pDataSrc[16];
-     return 0;
- }
- 
- int
- foohs32( int32_t * pDataSrc, int32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     int32x4_t vecIn1 = vldrhq_z_s32 ((int16_t const *) pDataSrc, __p);
-     int32x4_t vecIn2 = vldrhq_z_s32 ((int16_t const *) &pDataSrc[4], __p);
-     vstrhq_scatter_shifted_offset_p_s32 ((int16_t *)pDataDest, vecOffs1, vecIn1, __p);
-     vstrhq_scatter_shifted_offset_p_s32 ((int16_t *)pDataDest, vecOffs2, vecIn2, __p);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foods64( int64_t * pDataSrc, int64_t * pDataDest)
- {
-     const uint64x2_t vecOffs1 = { 0, 1};
-     const uint64x2_t vecOffs2 = { 2, 3};
-     int32x4_t vecIn1 = vldrwq_z_s32 ((int32_t const *) pDataSrc, __p);
-     int32x4_t vecIn2 = vldrwq_z_s32 ((int32_t const *) &pDataSrc[2], __p);
- 
-     vstrdq_scatter_shifted_offset_p_s64 (pDataDest, vecOffs1, (int64x2_t) vecIn1, __p);
-     vstrdq_scatter_shifted_offset_p_s64 (pDataDest, vecOffs2, (int64x2_t) vecIn2, __p);
- 
-     pDataDest[2] = pDataSrc[2];
-     return 0;
- }
- 
- /* { dg-final { scan-assembler-times "vstr\[a-z\]t" 20 } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! sqrshr_reg (int32_t longval3, int32_t x)
  {
!   return sqrshr (longval3, x);
  }
  
! /* { dg-final { scan-assembler "sqrshr\\tr\[0-9\]+, r\[0-9\]+" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	sqrshr	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t value, int32_t shift)
  {
!   return sqrshr (value, shift);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! sqrshrl_reg (int64_t longval3, int32_t x)
  {
!   return sqrshrl_sat48 (longval3, x);
  }
  
! /* { dg-final { scan-assembler "sqrshrl\\tr\[0-9\]+, r\[0-9\]+, #48, r\[0-9\]+" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	sqrshrl	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #48, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t value, int32_t shift)
  {
!   return sqrshrl_sat48 (value, shift);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! sqshl_imm (int32_t longval3)
  {
!   return sqshl (longval3, 25);
  }
  
! /* { dg-final { scan-assembler "sqshl\\tr\[0-9\]+, #25" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	sqshl	(?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t value)
  {
!   return sqshl (value, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! sqshll_imm(int64_t value)
  {
!   return sqshll (value, 21);
  }
  
! /* { dg-final { scan-assembler "sqshll\\tr\[0-9\]+, r\[0-9\]+, #21" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	sqshll	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t value)
  {
!   return sqshll (value, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! srshr_imm (int32_t longval3)
  {
!   return srshr (longval3, 25);
  }
  
! /* { dg-final { scan-assembler "srshr\\tr\[0-9\]+, #25" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	srshr	(?:ip|fp|r[0-9]+), #1(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t value)
  {
!   return srshr (value, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! srshrl_imm(int64_t value)
  {
!   return srshrl (value, 21);
  }
  
! /* { dg-final { scan-assembler "srshrl\\tr\[0-9\]+, r\[0-9\]+, #21" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	srshrl	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #1(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t value)
  {
!   return srshrl (value, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! uqrshl_reg (uint32_t longval3, int32_t x)
  {
!   return uqrshl (longval3, x);
  }
  
! /* { dg-final { scan-assembler "uqrshl\\tr\[0-9\]+, r\[0-9\]+" } } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	uqrshl	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32_t value, int32_t shift)
  {
!   return uqrshl (value, shift);
  }
  
! /*
! **foo1:
! **	...
! **	uqrshl	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32_t
! foo1 (int32_t shift)
! {
!   return uqrshl (1, shift);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! uqrshll_reg (uint64_t longval3, int32_t x)
  {
!   return uqrshll_sat48 (longval3, x);
  }
  
! /* { dg-final { scan-assembler "uqrshll\\tr\[0-9\]+, r\[0-9\]+, #48, r\[0-9\]+" } } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	uqrshll	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #48, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint64_t value, int32_t shift)
  {
!   return uqrshll_sat48 (value, shift);
  }
  
! /*
! **foo1:
! **	...
! **	uqrshll	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #48, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint64_t
! foo1 (int32_t shift)
! {
!   return uqrshll_sat48 (1, shift);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! uqshl_imm (uint32_t longval3)
  {
!   return uqshl (longval3, 21);
  }
  
! /* { dg-final { scan-assembler "uqshl\\tr\[0-9\]+, #21" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	uqshl	(?:ip|fp|r[0-9]+), #1(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32_t value)
  {
!   return uqshl (value, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! uqshll_imm(uint64_t value)
  {
!   return uqshll (value, 21);
  }
  
! /* { dg-final { scan-assembler "uqshll\\tr\[0-9\]+, r\[0-9\]+, #21" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	uqshll	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #1(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint64_t value)
  {
!   return uqshll (value, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! uint64_t
! urshr_imm (uint32_t longval3)
  {
!   return urshr (longval3, 21);
  }
  
! /* { dg-final { scan-assembler "urshr\\tr\[0-9\]+, #21" } } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
! 
! /*
! **foo:
! **	...
! **	urshr	(?:ip|fp|r[0-9]+), #1(?:	@.*|)
! **	...
! */
! uint32_t
! foo (uint32_t value)
  {
!   return urshr (value, 1);
  }
  
! /*
! **foo1:
! **	...
! **	urshr	(?:ip|fp|r[0-9]+), #1(?:	@.*|)
! **	...
! */
! uint32_t
! foo1 ()
! {
!   return urshr (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! urshrl_imm(uint64_t value)
  {
!   return urshrl (value, 21);
  }
  
! /* { dg-final { scan-assembler "urshrl\\tr\[0-9\]+, r\[0-9\]+, #21" } } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	urshrl	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #1(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint64_t value)
  {
!   return urshrl (value, 1);
  }
  
! /*
! **foo1:
! **	...
! **	urshrl	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #1(?:	@.*|)
! **	...
! */
! uint64_t
! foo1 ()
! {
!   return urshrl (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vabavq_p_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vabavt.s16"  }  } */
  
  uint32_t
  foo1 (uint32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vabavt.s16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vabavq_p_s16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vabavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int16x8_t b, int16x8_t c, mve_pred16_t p)
! {
!   return vabavq_p (1, b, c, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vabavq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vabavt.s32"  }  } */
  
  uint32_t
  foo1 (uint32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vabavt.s32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vabavq_p_s32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vabavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int32x4_t b, int32x4_t c, mve_pred16_t p)
! {
!   return vabavq_p (1, b, c, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vabavq_p_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vabavt.s8"  }  } */
  
  uint32_t
  foo1 (uint32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vabavt.s8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vabavq_p_s8 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vabavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int8x16_t b, int8x16_t c, mve_pred16_t p)
! {
!   return vabavq_p (1, b, c, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p)
  {
    return vabavq_p_u16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vabavt.u16"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vabavt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p)
  {
    return vabavq_p_u16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vabavt.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint16x8_t b, uint16x8_t c, mve_pred16_t p)
! {
!   return vabavq_p (1, b, c, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
    return vabavq_p_u32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vabavt.u32"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vabavt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
    return vabavq_p_u32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vabavt.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint32x4_t b, uint32x4_t c, mve_pred16_t p)
! {
!   return vabavq_p (1, b, c, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint8x16_t b, uint8x16_t c, mve_pred16_t p)
  {
    return vabavq_p_u8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vabavt.u8"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint8x16_t b, uint8x16_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vabavt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint8x16_t b, uint8x16_t c, mve_pred16_t p)
  {
    return vabavq_p_u8 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint8x16_t b, uint8x16_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vabavt.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint8x16_t b, uint8x16_t c, mve_pred16_t p)
! {
!   return vabavq_p (1, b, c, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, int16x8_t b, int16x8_t c)
  {
    return vabavq_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vabav.s16"  }  } */
  
  uint32_t
  foo1 (uint32_t a, int16x8_t b, int16x8_t c)
  {
    return vabavq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vabav.s16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabav.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int16x8_t b, int16x8_t c)
  {
    return vabavq_s16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabav.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int16x8_t b, int16x8_t c)
  {
    return vabavq (a, b, c);
  }
  
! /*
! **foo2:
! **	...
! **	vabav.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int16x8_t b, int16x8_t c)
! {
!   return vabavq (1, b, c);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, int32x4_t b, int32x4_t c)
  {
    return vabavq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vabav.s32"  }  } */
  
  uint32_t
  foo1 (uint32_t a, int32x4_t b, int32x4_t c)
  {
    return vabavq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vabav.s32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabav.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int32x4_t b, int32x4_t c)
  {
    return vabavq_s32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabav.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int32x4_t b, int32x4_t c)
  {
    return vabavq (a, b, c);
  }
  
! /*
! **foo2:
! **	...
! **	vabav.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int32x4_t b, int32x4_t c)
! {
!   return vabavq (1, b, c);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, int8x16_t b, int8x16_t c)
  {
    return vabavq_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vabav.s8"  }  } */
  
  uint32_t
  foo1 (uint32_t a, int8x16_t b, int8x16_t c)
  {
    return vabavq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vabav.s8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabav.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int8x16_t b, int8x16_t c)
  {
    return vabavq_s8 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabav.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int8x16_t b, int8x16_t c)
  {
    return vabavq (a, b, c);
  }
  
! /*
! **foo2:
! **	...
! **	vabav.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int8x16_t b, int8x16_t c)
! {
!   return vabavq (1, b, c);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint16x8_t b, uint16x8_t c)
  {
    return vabavq_u16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vabav.u16"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint16x8_t b, uint16x8_t c)
  {
    return vabavq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vabav.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabav.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint16x8_t b, uint16x8_t c)
  {
    return vabavq_u16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabav.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint16x8_t b, uint16x8_t c)
  {
    return vabavq (a, b, c);
  }
  
! /*
! **foo2:
! **	...
! **	vabav.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint16x8_t b, uint16x8_t c)
! {
!   return vabavq (1, b, c);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint32x4_t b, uint32x4_t c)
  {
    return vabavq_u32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vabav.u32"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, uint32x4_t c)
  {
    return vabavq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vabav.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabav.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint32x4_t b, uint32x4_t c)
  {
    return vabavq_u32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabav.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, uint32x4_t c)
  {
    return vabavq (a, b, c);
  }
  
! /*
! **foo2:
! **	...
! **	vabav.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint32x4_t b, uint32x4_t c)
! {
!   return vabavq (1, b, c);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint8x16_t b, uint8x16_t c)
  {
    return vabavq_u8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vabav.u8"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint8x16_t b, uint8x16_t c)
  {
    return vabavq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vabav.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabav.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint8x16_t b, uint8x16_t c)
  {
    return vabavq_u8 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabav.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint8x16_t b, uint8x16_t c)
  {
    return vabavq (a, b, c);
  }
  
! /*
! **foo2:
! **	...
! **	vabav.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint8x16_t b, uint8x16_t c)
! {
!   return vabavq (1, b, c);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vabdq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vabd.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vabdq (a, b);
  }
  
! /* { dg-final { scan-assembler "vabd.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabd.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vabdq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabd.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vabdq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vabdq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vabd.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vabdq (a, b);
  }
  
! /* { dg-final { scan-assembler "vabd.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabd.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vabdq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabd.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vabdq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vabdq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vabdt.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vabdq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vabdq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vabdt.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vabdq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vabdq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vabdt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vabdq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vabdq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vabdt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vabdq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vabdq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vabdt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vabdq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vabdq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vabdt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vabdq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vabdq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vabdt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vabdq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vabdq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vabdt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vabdq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vabdq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vabd.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vabdq (a, b);
  }
  
! /* { dg-final { scan-assembler "vabd.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabd.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vabdq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabd.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vabdq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vabdq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vabd.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vabdq (a, b);
  }
  
! /* { dg-final { scan-assembler "vabd.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabd.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vabdq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabd.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vabdq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vabdq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vabd.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vabdq (a, b);
  }
  
! /* { dg-final { scan-assembler "vabd.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabd.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vabdq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabd.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vabdq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vabdq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vabd.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vabdq (a, b);
  }
  
! /* { dg-final { scan-assembler "vabd.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabd.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vabdq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabd.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vabdq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vabdq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vabd.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vabdq (a, b);
  }
  
! /* { dg-final { scan-assembler "vabd.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabd.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vabdq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabd.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vabdq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vabdq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vabd.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vabdq (a, b);
  }
  
! /* { dg-final { scan-assembler "vabd.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabd.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vabdq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabd.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vabdq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vabdq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vabdq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vabdq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vabdq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vabdq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vabdt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vabdq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vabdq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vabdq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vabdq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vabdq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vabdq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vabdq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vabdq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vabdq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vabdq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vabdq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vabsq_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vabs.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabs.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vabsq_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vabs.f16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vabsq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a)
  {
    return vabsq_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vabs.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabs.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a)
  {
    return vabsq_f32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vabs.f32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (float32x4_t a)
! {
!   return vabsq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vabsq_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vabsq_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vabsq_m_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vabsq_m_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vabsq_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vabsq_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vabsq_m_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vabsq_m_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vabsq_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vabsq_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vabsq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vabs.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vabsq (a);
  }
  
! /* { dg-final { scan-assembler "vabs.s16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabs.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vabsq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabs.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vabsq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vabsq_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vabs.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vabsq (a);
  }
  
! /* { dg-final { scan-assembler "vabs.s32"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabs.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vabsq_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabs.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vabsq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vabsq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vabs.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vabsq (a);
  }
  
! /* { dg-final { scan-assembler "vabs.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabs.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vabsq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabs.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vabsq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vabsq_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vabsq_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vabsq_x_f32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vabsq_x_f32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vabsq_x_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vabsq_x_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vabsq_x_s32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vabsq_x_s32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vabsq_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vabsq_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry_out, mve_pred16_t p)
  {
    return vadciq_m_s32 (inactive, a, b, carry_out, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vadcit.i32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry_out, mve_pred16_t p)
  {
    return vadciq_m (inactive, a, b, carry_out, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vadcit.i32"  }  } */
--- 1,57 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vadcit.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry_out, mve_pred16_t p)
  {
    return vadciq_m_s32 (inactive, a, b, carry_out, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vadcit.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry_out, mve_pred16_t p)
  {
    return vadciq_m (inactive, a, b, carry_out, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry_out, mve_pred16_t p)
  {
    return vadciq_m_u32 (inactive, a, b, carry_out, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vadcit.i32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry_out, mve_pred16_t p)
  {
    return vadciq_m (inactive, a, b, carry_out, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vadcit.i32"  }  } */
--- 1,57 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vadcit.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry_out, mve_pred16_t p)
  {
    return vadciq_m_u32 (inactive, a, b, carry_out, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vadcit.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry_out, mve_pred16_t p)
  {
    return vadciq_m (inactive, a, b, carry_out, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, unsigned * carry_out)
  {
    return vadciq_s32 (a, b, carry_out);
  }
  
- /* { dg-final { scan-assembler "vadci.i32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, unsigned * carry_out)
  {
    return vadciq (a, b, carry_out);
  }
  
! /* { dg-final { scan-assembler "vadci.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadci.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t a, int32x4_t b, unsigned *carry_out)
  {
    return vadciq_s32 (a, b, carry_out);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadci.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, unsigned *carry_out)
  {
    return vadciq (a, b, carry_out);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, unsigned * carry_out)
  {
    return vadciq_u32 (a, b, carry_out);
  }
  
- /* { dg-final { scan-assembler "vadci.i32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, unsigned * carry_out)
  {
    return vadciq (a, b, carry_out);
  }
  
! /* { dg-final { scan-assembler "vadci.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadci.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, unsigned *carry_out)
  {
    return vadciq_u32 (a, b, carry_out);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadci.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, unsigned *carry_out)
  {
    return vadciq (a, b, carry_out);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry, mve_pred16_t p)
  {
    return vadcq_m_s32 (inactive, a, b, carry, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vadct.i32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry, mve_pred16_t p)
  {
    return vadcq_m (inactive, a, b, carry, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vadct.i32"  }  } */
--- 1,77 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vadct.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t p)
  {
    return vadcq_m_s32 (inactive, a, b, carry, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vadct.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t p)
  {
    return vadcq_m (inactive, a, b, carry, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry, mve_pred16_t p)
  {
    return vadcq_m_u32 (inactive, a, b, carry, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vadct.i32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry, mve_pred16_t p)
  {
    return vadcq_m (inactive, a, b, carry, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vadct.i32"  }  } */
--- 1,77 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vadct.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred16_t p)
  {
    return vadcq_m_u32 (inactive, a, b, carry, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vadct.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred16_t p)
  {
    return vadcq_m (inactive, a, b, carry, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, unsigned * carry)
  {
    return vadcq_s32 (a, b, carry);
  }
  
- /* { dg-final { scan-assembler "vadc.i32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, unsigned * carry)
  {
    return vadcq (a, b, carry);
  }
  
! /* { dg-final { scan-assembler "vadc.i32"  }  } */
--- 1,69 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vadc.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t a, int32x4_t b, unsigned *carry)
  {
    return vadcq_s32 (a, b, carry);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vadc.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, unsigned *carry)
  {
    return vadcq (a, b, carry);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, unsigned * carry)
  {
    return vadcq_u32 (a, b, carry);
  }
  
- /* { dg-final { scan-assembler "vadc.i32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, unsigned * carry)
  {
    return vadcq (a, b, carry);
  }
  
! /* { dg-final { scan-assembler "vadc.i32"  }  } */
--- 1,69 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vadc.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, unsigned *carry)
  {
    return vadcq_u32 (a, b, carry);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vadc.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, unsigned *carry)
  {
    return vadcq (a, b, carry);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddlvaq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vaddlvat.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddlvaq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vaddlvat.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddlvat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddlvaq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddlvat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddlvaq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
  foo (uint64_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddlvaq_p_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vaddlvat.u32"  }  } */
  
  uint64_t
  foo1 (uint64_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddlvaq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vaddlvat.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddlvat.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo (uint64_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddlvaq_p_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddlvat.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo1 (uint64_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddlvaq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddlvat.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint64_t
! foo2 (uint32x4_t b, mve_pred16_t p)
! {
!   return vaddlvaq_p (1, b, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b)
  {
    return vaddlvaq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vaddlva.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b)
  {
    return vaddlvaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vaddlva.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddlva.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b)
  {
    return vaddlvaq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddlva.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b)
  {
    return vaddlvaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
  foo (uint64_t a, uint32x4_t b)
  {
    return vaddlvaq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vaddlva.u32"  }  } */
  
  uint64_t
  foo1 (uint64_t a, uint32x4_t b)
  {
    return vaddlvaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vaddlva.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddlva.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo (uint64_t a, uint32x4_t b)
  {
    return vaddlvaq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddlva.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo1 (uint64_t a, uint32x4_t b)
  {
    return vaddlvaq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vaddlva.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint64_t
! foo2 (uint32x4_t b)
! {
!   return vaddlvaq (1, b);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vaddlvq_p_s32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vaddlvt.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vaddlvq_p (a, p);
  }
  
! /* { dg-final { scan-assembler "vaddlvt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddlvt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vaddlvq_p_s32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddlvt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vaddlvq_p (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vaddlvq_p_u32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vaddlvt.u32"  }  } */
  
  uint64_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vaddlvq_p (a, p);
  }
  
! /* { dg-final { scan-assembler "vaddlvt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddlvt.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vaddlvq_p_u32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddlvt.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vaddlvq_p (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a)
  {
    return vaddlvq_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vaddlv.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a)
  {
!   return vaddlvq_s32 (a);
  }
  
! /* { dg-final { scan-assembler "vaddlv.s32"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddlv.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a)
  {
    return vaddlvq_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddlv.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a)
  {
!   return vaddlvq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
  foo (uint32x4_t a)
  {
!     return vaddlvq_u32 (a);
  }
  
- /* { dg-final { scan-assembler "vaddlv.u32"  }  } */
  
  uint64_t
  foo1 (uint32x4_t a)
  {
!     return vaddlvq (a);
  }
  
! /* { dg-final { scan-assembler "vaddlv.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddlv.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo (uint32x4_t a)
  {
!   return vaddlvq_u32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddlv.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo1 (uint32x4_t a)
  {
!   return vaddlvq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vaddq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vaddq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vaddq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vaddq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vaddq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vaddq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vaddq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vaddq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vaddq_m (inactive, a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vaddq_m_n_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.f16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vaddq_m_n_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo2 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
! {
!   return vaddq_m (inactive, a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vaddq_m (inactive, a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vaddq_m_n_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.f32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vaddq_m_n_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo2 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
! {
!   return vaddq_m (inactive, a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vaddq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vaddq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vaddq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vaddq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vaddq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vaddq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vaddq_m_n_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vaddq_m_n_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
! {
!   return vaddq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vaddq_m_n_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vaddq_m_n_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
! {
!   return vaddq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vaddq_m_n_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vaddq_m_n_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
! {
!   return vaddq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16_t b)
  {
    return vaddq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.f16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16_t b)
  {
    return vaddq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vadd.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo2 (float16x8_t a)
! {
!   return vaddq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32_t b)
  {
    return vaddq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.f32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32_t b)
  {
    return vaddq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vadd.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo2 (float32x4_t a)
! {
!   return vaddq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vaddq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vaddq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vaddq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vaddq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vaddq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vaddq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vaddq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vaddq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vadd.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a)
! {
!   return vaddq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vaddq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vaddq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vadd.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a)
! {
!   return vaddq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vaddq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vaddq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vadd.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a)
! {
!   return vaddq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vaddq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vaddq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vaddq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vaddq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vaddq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vaddq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vaddq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vaddq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vaddq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vaddq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vaddq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vaddq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vaddq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vaddq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vaddq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vaddq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vaddq_x (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vaddq_x_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.f16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vaddq_x_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo2 (float16x8_t a, mve_pred16_t p)
! {
!   return vaddq_x (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vaddq_x (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vaddq_x_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.f32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vaddq_x_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo2 (float32x4_t a, mve_pred16_t p)
! {
!   return vaddq_x (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vaddq_x_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vaddq_x_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vaddq_x_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vaddq_x_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vaddq_x_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vaddq_x_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vaddq_x_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vaddq_x_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a, mve_pred16_t p)
! {
!   return vaddq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vaddq_x_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vaddq_x_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a, mve_pred16_t p)
! {
!   return vaddq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vaddq_x_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vaddq_x_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a, mve_pred16_t p)
! {
!   return vaddq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddvaq_p_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vaddvat.s16"  }  } */
  
  int32_t
  foo1 (int32_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vaddvat.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddvaq_p_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddvaq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vaddvat.s32"  }  } */
  
  int32_t
  foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vaddvat.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddvaq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddvaq_p_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vaddvat.s8"  }  } */
  
  int32_t
  foo1 (int32_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vaddvat.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddvaq_p_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddvaq_p_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vaddvat.u16"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vaddvat.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddvaq_p_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddvat.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint16x8_t b, mve_pred16_t p)
! {
!   return vaddvaq_p (1, b, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddvaq_p_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vaddvat.u32"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vaddvat.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddvaq_p_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddvat.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint32x4_t b, mve_pred16_t p)
! {
!   return vaddvaq_p (1, b, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddvaq_p_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vaddvat.u8"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vaddvat.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddvaq_p_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddvat.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint8x16_t b, mve_pred16_t p)
! {
!   return vaddvaq_p (1, b, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int16x8_t b)
  {
    return vaddvaq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vaddva.s16"  }  } */
  
  int32_t
  foo1 (int32_t a, int16x8_t b)
  {
    return vaddvaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vaddva.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddva.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int16x8_t b)
  {
    return vaddvaq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddva.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int16x8_t b)
  {
    return vaddvaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int32x4_t b)
  {
    return vaddvaq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vaddva.s32"  }  } */
  
  int32_t
  foo1 (int32_t a, int32x4_t b)
  {
    return vaddvaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vaddva.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddva.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b)
  {
    return vaddvaq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddva.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b)
  {
    return vaddvaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int8x16_t b)
  {
    return vaddvaq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vaddva.s8"  }  } */
  
  int32_t
  foo1 (int32_t a, int8x16_t b)
  {
    return vaddvaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vaddva.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddva.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int8x16_t b)
  {
    return vaddvaq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddva.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int8x16_t b)
  {
    return vaddvaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint16x8_t b)
  {
    return vaddvaq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vaddva.u16"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint16x8_t b)
  {
    return vaddvaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vaddva.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddva.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint16x8_t b)
  {
    return vaddvaq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddva.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint16x8_t b)
  {
    return vaddvaq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vaddva.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint16x8_t b)
! {
!   return vaddvaq (1, b);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint32x4_t b)
  {
    return vaddvaq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vaddva.u32"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint32x4_t b)
  {
    return vaddvaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vaddva.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddva.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint32x4_t b)
  {
    return vaddvaq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddva.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint32x4_t b)
  {
    return vaddvaq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vaddva.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint32x4_t b)
! {
!   return vaddvaq (1, b);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint8x16_t b)
  {
    return vaddvaq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vaddva.u8"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint8x16_t b)
  {
    return vaddvaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vaddva.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddva.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint8x16_t b)
  {
    return vaddvaq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddva.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint8x16_t b)
  {
    return vaddvaq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vaddva.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint8x16_t b)
! {
!   return vaddvaq (1, b);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vaddvq_p_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vaddvt.s16"  }  } */
  
  int32_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! /* { dg-final { scan-assembler "vaddvt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vaddvq_p_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vaddvq_p_s32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vaddvt.s32"  }  } */
  
  int32_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! /* { dg-final { scan-assembler "vaddvt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vaddvq_p_s32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vaddvq_p_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vaddvt.s8"  }  } */
  
  int32_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! /* { dg-final { scan-assembler "vaddvt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vaddvq_p_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vaddvq_p_u16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vaddvt.u16"  }  } */
  
  uint32_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! /* { dg-final { scan-assembler "vaddvt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vaddvq_p_u16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vaddvq_p_u32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vaddvt.u32"  }  } */
  
  uint32_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! /* { dg-final { scan-assembler "vaddvt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vaddvq_p_u32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vaddvq_p_u8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vaddvt.u8"  }  } */
  
  uint32_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! /* { dg-final { scan-assembler "vaddvt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vaddvq_p_u8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int16x8_t a)
  {
    return vaddvq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vaddv.s16"  }  } */
  
  int32_t
  foo1 (int16x8_t a)
  {
!   return vaddvq_s16 (a);
  }
  
! /* { dg-final { scan-assembler "vaddv.s16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddv.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int16x8_t a)
  {
    return vaddvq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddv.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int16x8_t a)
  {
!   return vaddvq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32x4_t a)
  {
    return vaddvq_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vaddv.s32"  }  } */
  
  int32_t
  foo1 (int32x4_t a)
  {
!   return vaddvq_s32 (a);
  }
  
! /* { dg-final { scan-assembler "vaddv.s32"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddv.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32x4_t a)
  {
    return vaddvq_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddv.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32x4_t a)
  {
!   return vaddvq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int8x16_t a)
  {
    return vaddvq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vaddv.s8"  }  } */
  
  int32_t
  foo1 (int8x16_t a)
  {
    return vaddvq (a);
  }
  
! /* { dg-final { scan-assembler "vaddv.s8"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddv.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int8x16_t a)
  {
    return vaddvq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddv.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int8x16_t a)
  {
    return vaddvq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint16x8_t a)
  {
!     return vaddvq_u16 (a);
  }
  
- /* { dg-final { scan-assembler "vaddv.u16"  }  } */
  
  uint32_t
  foo1 (uint16x8_t a)
  {
!     return vaddvq (a);
  }
  
! /* { dg-final { scan-assembler "vaddv.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddv.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint16x8_t a)
  {
!   return vaddvq_u16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddv.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint16x8_t a)
  {
!   return vaddvq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32x4_t a)
  {
!     return vaddvq_u32 (a);
  }
  
- /* { dg-final { scan-assembler "vaddv.u32"  }  } */
  
  uint32_t
  foo1 (uint32x4_t a)
  {
!     return vaddvq (a);
  }
  
! /* { dg-final { scan-assembler "vaddv.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddv.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32x4_t a)
  {
!   return vaddvq_u32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddv.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32x4_t a)
  {
!   return vaddvq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint8x16_t a)
  {
!     return vaddvq_u8 (a);
  }
  
- /* { dg-final { scan-assembler "vaddv.u8"  }  } */
  
  uint32_t
  foo1 (uint8x16_t a)
  {
!     return vaddvq (a);
  }
  
! /* { dg-final { scan-assembler "vaddv.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddv.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint8x16_t a)
  {
!   return vaddvq_u8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddv.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint8x16_t a)
  {
!   return vaddvq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vandq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vand"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vandq (a, b);
  }
  
! /* { dg-final { scan-assembler "vand"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vandq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vandq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vandq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vand"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vandq (a, b);
  }
  
! /* { dg-final { scan-assembler "vand"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vandq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vandq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vandq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vandt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vandq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vandq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vandt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vandq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vandq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vandt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vandq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vandq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vandt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vandq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vandq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vandt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vandq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vandq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vandt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vandq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vandq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vandt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vandq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vandq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vandt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vandq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vandq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vand"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vandq (a, b);
  }
  
! /* { dg-final { scan-assembler "vand"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vandq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vandq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vandq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vand"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vandq (a, b);
  }
  
! /* { dg-final { scan-assembler "vand"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vandq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vandq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vandq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vand"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vandq (a, b);
  }
  
! /* { dg-final { scan-assembler "vand"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vandq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vandq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vandq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vand"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vandq (a, b);
  }
  
! /* { dg-final { scan-assembler "vand"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vandq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vandq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vandq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vand"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vandq (a, b);
  }
  
! /* { dg-final { scan-assembler "vand"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vandq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vandq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vandq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vand"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vandq (a, b);
  }
  
! /* { dg-final { scan-assembler "vand"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vandq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vandq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vandq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vandq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vandq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vandq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vandq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vandq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vandq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vandq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vandq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vandq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vandq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vandq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vandq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vandq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vandq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vandq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vbicq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbic"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vbicq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbic"  }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vbicq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vbicq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vbicq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbic"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vbicq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbic"  }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vbicq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vbicq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vbicq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbict"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vbicq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vbicq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbict"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vbicq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vbicq_m_n_s16 (a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
!   return vbicq_m_n (a, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vbicq_m_n_s16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
!   return vbicq_m_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vbicq_m_n_s32 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vbicq_m_n (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vbicq_m_n_s32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vbicq_m_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vbicq_m_n_u16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vbicq_m_n (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vbicq_m_n_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vbicq_m_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vbicq_m_n_u32 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vbicq_m_n (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vbicq_m_n_u32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vbicq_m_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vbicq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbict"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vbicq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vbicq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbict"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vbicq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vbicq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbict"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vbicq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vbicq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbict"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vbicq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vbicq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbict"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vbicq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vbicq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbict"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vbicq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vbicq_n_s16 (a, 1);
  }
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vbicq (a, 1);
  }
  
! /* { dg-final { scan-assembler-times "vbic.i16" 2 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vbicq_n_s16 (a, 1);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vbic.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vbicq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vbicq_n_s32 (a, 1);
  }
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vbicq (a, 1);
  }
  
! /* { dg-final { scan-assembler-times "vbic.i32" 2 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vbicq_n_s32 (a, 1);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vbic.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vbicq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
    return vbicq_n_u16 (a, 1);
  }
  
  uint16x8_t
  foo1 (uint16x8_t a)
  {
    return vbicq (a, 1);
  }
  
! /* { dg-final { scan-assembler-times "vbic.i16" 2 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
    return vbicq_n_u16 (a, 1);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vbic.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a)
  {
    return vbicq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a)
  {
    return vbicq_n_u32 (a, 1);
  }
  
  uint32x4_t
  foo1 (uint32x4_t a)
  {
    return vbicq (a, 1);
  }
  
! /* { dg-final { scan-assembler-times "vbic.i32" 2 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a)
  {
    return vbicq_n_u32 (a, 1);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vbic.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a)
  {
    return vbicq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vbicq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbic"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vbicq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbic"  }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vbicq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vbicq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vbicq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbic"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vbicq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbic"  }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vbicq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vbicq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vbicq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbic"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vbicq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbic"  }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vbicq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vbicq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vbicq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbic"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vbicq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbic"  }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vbicq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vbicq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vbicq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbic"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vbicq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbic"  }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vbicq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vbicq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vbicq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbic"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vbicq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbic"  }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vbicq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vbicq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vbicq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vbicq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vbicq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vbicq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vbicq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vbicq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vbicq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vbicq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vbicq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vbicq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vbicq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vbicq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vbicq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vbicq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vbicq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vbicq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, int32_t b)
  {
    return vbrsrq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbrsr.16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbrsr.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbrsr.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, int32_t b)
  {
    return vbrsrq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbrsr.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, int32_t b)
  {
    return vbrsrq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbrsr.32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbrsr.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbrsr.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, int32_t b)
  {
    return vbrsrq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbrsr.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vbrsrq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbrsr.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbrsr.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbrsr.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vbrsrq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbrsr.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vbrsrq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbrsr.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbrsr.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbrsr.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vbrsrq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbrsr.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vbrsrq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbrsr.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbrsr.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbrsr.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vbrsrq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbrsr.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vbrsrq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbrsr.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbrsr.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbrsr.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vbrsrq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbrsr.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vbrsrq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbrsr.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbrsr.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbrsr.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vbrsrq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbrsr.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vbrsrq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbrsr.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbrsr.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbrsr.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vbrsrq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbrsr.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcaddq_rot270_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcaddq_rot270_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcaddq_rot270_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcaddq_rot270_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcaddq_rot270_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcaddq_rot270_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcaddq_rot270_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcaddq_rot270_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcaddq_rot270_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcaddq_rot270_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcaddq_rot270_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcaddq_rot270_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcaddq_rot270_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcaddq_rot270_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcaddq_rot270_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcaddq_rot270_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcaddq_rot90_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcaddq_rot90_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcaddq_rot90_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcaddq_rot90_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcaddq_rot90_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcaddq_rot90_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcaddq_rot90_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcaddq_rot90_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcaddq_rot90_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcaddq_rot90_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcaddq_rot90_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcaddq_rot90_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcaddq_rot90_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcaddq_rot90_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcaddq_rot90_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcaddq_rot90_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vclsq_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclst.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vclsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vclsq_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vclsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vclsq_m_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclst.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vclsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vclsq_m_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vclsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vclsq_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclst.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vclsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vclsq_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vclsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vclsq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vcls.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vclsq (a);
  }
  
! /* { dg-final { scan-assembler "vcls.s16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcls.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vclsq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcls.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vclsq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vclsq_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vcls.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vclsq (a);
  }
  
! /* { dg-final { scan-assembler "vcls.s32"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcls.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vclsq_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcls.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vclsq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vclsq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vcls.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vclsq (a);
  }
  
! /* { dg-final { scan-assembler "vcls.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcls.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vclsq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcls.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vclsq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vclsq_x_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclst.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vclsq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vclsq_x_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vclsq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vclsq_x_s32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclst.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vclsq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vclsq_x_s32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vclsq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vclsq_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclst.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vclsq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vclsq_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vclsq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vclzq_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vclzq_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vclzq_m_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vclzq_m_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vclzq_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vclzq_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vclzq_m_u16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vclzq_m_u16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vclzq_m_u32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vclzq_m_u32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vclzq_m_u8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vclzq_m_u8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vclzq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vclz.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vclzq (a);
  }
  
! /* { dg-final { scan-assembler "vclz.i16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vclz.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vclzq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vclz.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vclzq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vclzq_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vclz.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vclzq (a);
  }
  
! /* { dg-final { scan-assembler "vclz.i32"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vclz.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vclzq_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vclz.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vclzq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vclzq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vclz.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vclzq (a);
  }
  
! /* { dg-final { scan-assembler "vclz.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vclz.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vclzq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vclz.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vclzq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
!     return vclzq_u16 (a);
  }
  
- /* { dg-final { scan-assembler "vclz.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!     return vclzq (a);
  }
  
! /* { dg-final { scan-assembler "vclz.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vclz.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vclzq_u16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vclz.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vclzq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a)
  {
!     return vclzq_u32 (a);
  }
  
- /* { dg-final { scan-assembler "vclz.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!     return vclzq (a);
  }
  
! /* { dg-final { scan-assembler "vclz.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vclz.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a)
  {
!   return vclzq_u32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vclz.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!   return vclzq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a)
  {
!     return vclzq_u8 (a);
  }
  
- /* { dg-final { scan-assembler "vclz.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!     return vclzq (a);
  }
  
! /* { dg-final { scan-assembler "vclz.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vclz.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a)
  {
!   return vclzq_u8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vclz.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!   return vclzq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vclzq_x_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vclzq_x_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vclzq_x_s32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vclzq_x_s32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vclzq_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vclzq_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vclzq_x_u16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vclzq_x_u16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vclzq_x_u32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vclzq_x_u32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vclzq_x_u8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vclzq_x_u8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_f16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vcmla.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vcmla.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmla.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_f16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmla.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_f32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vcmla.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vcmla.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmla.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_f32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmla.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_m_f16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmlat.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmlat.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_m_f16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_m (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_m_f32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmlat.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmlat.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_m_f32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_m (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot180_f16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vcmla.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot180 (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vcmla.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmla.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot180_f16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmla.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot180 (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot180_f32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vcmla.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot180 (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vcmla.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmla.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot180_f32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmla.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot180 (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot180_m_f16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmlat.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot180_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmlat.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot180_m_f16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot180_m (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot180_m_f32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmlat.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot180_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmlat.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot180_m_f32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot180_m (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot270_f16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vcmla.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot270 (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vcmla.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmla.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot270_f16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmla.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot270 (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot270_f32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vcmla.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot270 (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vcmla.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmla.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot270_f32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmla.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot270 (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot270_m_f16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmlat.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot270_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmlat.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot270_m_f16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot270_m (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot270_m_f32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmlat.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot270_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmlat.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot270_m_f32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot270_m (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot90_f16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vcmla.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot90 (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vcmla.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmla.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot90_f16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmla.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot90 (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot90_f32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vcmla.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot90 (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vcmla.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmla.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot90_f32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmla.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot90 (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot90_m_f16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmlat.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot90_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmlat.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot90_m_f16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot90_m (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot90_m_f32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmlat.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot90_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmlat.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot90_m_f32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot90_m (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u16	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u16	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.u16	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint16x8_t a, mve_pred16_t p)
! {
!   return vcmpcsq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u32	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u32	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.u32	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint32x4_t a, mve_pred16_t p)
! {
!   return vcmpcsq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u8	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u8	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.u8	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint8x16_t a, mve_pred16_t p)
! {
!   return vcmpcsq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u16	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u16	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u32	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u32	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u8	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u8	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vcmpcsq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vcmpcsq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u16	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vcmpcsq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u16	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vcmpcsq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.u16	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint16x8_t a)
! {
!   return vcmpcsq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vcmpcsq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vcmpcsq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u32	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vcmpcsq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u32	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vcmpcsq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.u32	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint32x4_t a)
! {
!   return vcmpcsq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vcmpcsq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vcmpcsq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u8"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u8	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vcmpcsq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u8	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vcmpcsq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.u8	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint8x16_t a)
! {
!   return vcmpcsq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcmpcsq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcmpcsq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u16	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcmpcsq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u16	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcmpcsq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcmpcsq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcmpcsq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u32	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcmpcsq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u32	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcmpcsq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcmpcsq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcmpcsq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u8	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcmpcsq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u8	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcmpcsq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpeqq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpeqq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpeqq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpeqq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vcmpeqq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a, mve_pred16_t p)
! {
!   return vcmpeqq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vcmpeqq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a, mve_pred16_t p)
! {
!   return vcmpeqq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint16x8_t a, mve_pred16_t p)
! {
!   return vcmpeqq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint32x4_t a, mve_pred16_t p)
! {
!   return vcmpeqq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint8x16_t a, mve_pred16_t p)
! {
!   return vcmpeqq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b)
- {
-   return vcmpeqq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpeqq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpeqq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a)
! {
!   return vcmpeqq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b)
- {
-   return vcmpeqq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpeqq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpeqq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a)
! {
!   return vcmpeqq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpeqq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpeqq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpeqq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpeqq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpeqq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpeqq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vcmpeqq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vcmpeqq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint16x8_t a)
! {
!   return vcmpeqq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vcmpeqq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vcmpeqq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint32x4_t a)
! {
!   return vcmpeqq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vcmpeqq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i8"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vcmpeqq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint8x16_t a)
! {
!   return vcmpeqq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpeqq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpeqq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpeqq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpeqq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpeqq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpeqq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcmpeqq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcmpeqq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcmpeqq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcmpeqq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcmpeqq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcmpeqq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpgeq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpgeq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpgeq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpgeq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpgeq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpgeq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vcmpgeq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a, mve_pred16_t p)
! {
!   return vcmpgeq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vcmpgeq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a, mve_pred16_t p)
! {
!   return vcmpgeq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b)
- {
-   return vcmpgeq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpgeq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpgeq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a)
! {
!   return vcmpgeq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b)
- {
-   return vcmpgeq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpgeq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpgeq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a)
! {
!   return vcmpgeq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpgeq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpgeq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpgeq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpgeq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpgeq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpgeq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpgeq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s8	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpgeq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s8	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpgeq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpgeq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpgeq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpgeq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpgeq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpgeq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpgeq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpgeq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s8	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpgeq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s8	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpgeq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpgtq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpgtq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpgtq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpgtq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpgtq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpgtq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vcmpgtq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a, mve_pred16_t p)
! {
!   return vcmpgtq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vcmpgtq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a, mve_pred16_t p)
! {
!   return vcmpgtq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b)
- {
-   return vcmpgtq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpgtq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpgtq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a)
! {
!   return vcmpgtq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b)
- {
-   return vcmpgtq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpgtq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpgtq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a)
! {
!   return vcmpgtq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpgtq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpgtq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpgtq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpgtq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpgtq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpgtq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpgtq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s8	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpgtq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s8	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpgtq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpgtq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpgtq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpgtq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpgtq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpgtq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpgtq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpgtq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s8	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpgtq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s8	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpgtq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmphiq_m_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u16	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmphiq_m_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u16	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.u16	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint16x8_t a, mve_pred16_t p)
! {
!   return vcmphiq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmphiq_m_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u32	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmphiq_m_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u32	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.u32	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint32x4_t a, mve_pred16_t p)
! {
!   return vcmphiq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmphiq_m_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u8	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmphiq_m_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u8	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.u8	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint8x16_t a, mve_pred16_t p)
! {
!   return vcmphiq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmphiq_m_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u16	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmphiq_m_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u16	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmphiq_m_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u32	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmphiq_m_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u32	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmphiq_m_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u8	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmphiq_m_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u8	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vcmphiq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vcmphiq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u16	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vcmphiq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u16	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vcmphiq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.u16	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint16x8_t a)
! {
!   return vcmphiq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vcmphiq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vcmphiq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u32	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vcmphiq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u32	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vcmphiq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.u32	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint32x4_t a)
! {
!   return vcmphiq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vcmphiq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vcmphiq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u8"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u8	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vcmphiq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u8	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vcmphiq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.u8	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint8x16_t a)
! {
!   return vcmphiq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcmphiq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcmphiq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u16	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcmphiq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u16	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcmphiq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcmphiq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcmphiq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u32	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcmphiq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u32	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcmphiq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcmphiq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcmphiq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u8	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcmphiq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u8	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcmphiq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpleq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpleq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpleq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpleq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpleq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpleq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpleq_m_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpleq_m_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpleq_m_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpleq_m_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vcmpleq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a, mve_pred16_t p)
! {
!   return vcmpleq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vcmpleq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a, mve_pred16_t p)
! {
!   return vcmpleq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpleq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpleq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpleq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpleq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpleq_m_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpleq_m_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b)
- {
-   return vcmpleq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpleq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpleq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpleq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a)
! {
!   return vcmpleq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b)
- {
-   return vcmpleq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpleq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpleq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpleq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a)
! {
!   return vcmpleq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpleq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpleq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpleq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpleq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpleq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpleq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpleq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s8	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpleq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s8	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpleq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpleq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpleq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpleq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpleq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpleq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpleq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpleq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s8	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpleq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s8	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpleq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpltq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpltq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpltq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpltq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpltq_m_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpltq_m_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpltq_m_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpltq_m_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vcmpltq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a, mve_pred16_t p)
! {
!   return vcmpltq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vcmpltq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a, mve_pred16_t p)
! {
!   return vcmpltq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpltq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpltq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpltq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpltq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpltq_m_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpltq_m_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b)
- {
-   return vcmpltq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpltq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpltq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpltq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a)
! {
!   return vcmpltq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b)
- {
-   return vcmpltq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpltq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpltq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpltq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a)
! {
!   return vcmpltq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpltq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpltq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpltq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpltq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpltq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s8	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpltq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s8	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpltq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpltq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpltq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpltq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpltq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s8	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpltq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s8	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpneq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpneq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpneq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpneq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vcmpneq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a, mve_pred16_t p)
! {
!   return vcmpneq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vcmpneq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a, mve_pred16_t p)
! {
!   return vcmpneq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint16x8_t a, mve_pred16_t p)
! {
!   return vcmpneq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint32x4_t a, mve_pred16_t p)
! {
!   return vcmpneq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint8x16_t a, mve_pred16_t p)
! {
!   return vcmpneq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b)
- {
-   return vcmpneq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpneq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpneq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpneq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a)
! {
!   return vcmpneq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b)
- {
-   return vcmpneq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpneq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpneq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpneq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a)
! {
!   return vcmpneq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpneq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpneq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpneq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpneq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpneq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpneq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vcmpneq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vcmpneq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vcmpneq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint16x8_t a)
! {
!   return vcmpneq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vcmpneq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vcmpneq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vcmpneq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint32x4_t a)
! {
!   return vcmpneq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vcmpneq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i8"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vcmpneq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vcmpneq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint8x16_t a)
! {
!   return vcmpneq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpneq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpneq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpneq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpneq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpneq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpneq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcmpneq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcmpneq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcmpneq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcmpneq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcmpneq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcmpneq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmulq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmul.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmul.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmul.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmulq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmul.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmulq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmul.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmul.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmul.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmulq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmul.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot180_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmul.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot180 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmul.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmul.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot180_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmul.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot180 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot180_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmul.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot180 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmul.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmul.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot180_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmul.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot180 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot270_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmul.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmul.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmul.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot270_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmul.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot270_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmul.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmul.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmul.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot270_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmul.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot90_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmul.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmul.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmul.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot90_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmul.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot90_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmul.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmul.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmul.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot90_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmul.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_f16 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  float16x8_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_f16 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! float16x8_t
! foo1 ()
! {
!   return vcreateq_f16 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_f32 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  float32x4_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_f32 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! float32x4_t
! foo1 ()
! {
!   return vcreateq_f32 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_s16 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  int16x8_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_s16 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! int16x8_t
! foo1 ()
! {
!   return vcreateq_s16 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_s32 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  int32x4_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_s32 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! int32x4_t
! foo1 ()
! {
!   return vcreateq_s32 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_s64 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  int64x2_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_s64 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! int64x2_t
! foo1 ()
! {
!   return vcreateq_s64 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_s8 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  int8x16_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_s8 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! int8x16_t
! foo1 ()
! {
!   return vcreateq_s8 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_u16 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  uint16x8_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_u16 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! uint16x8_t
! foo1 ()
! {
!   return vcreateq_u16 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_u32 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  uint32x4_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_u32 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! uint32x4_t
! foo1 ()
! {
!   return vcreateq_u32 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_u64 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  uint64x2_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_u64 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! uint64x2_t
! foo1 ()
! {
!   return vcreateq_u64 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_u8 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  uint8x16_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_u8 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! uint8x16_t
! foo1 ()
! {
!   return vcreateq_u8 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32_t a)
  {
    return vctp16q (a);
  }
  
! /* { dg-final { scan-assembler "vctp.16"  }  } */
! 
  mve_pred16_t
! foo1 (uint32_t a)
  {
!   return vctp16q (a);
  }
  
! /* { dg-final { scan-assembler "vctp.16"  }  } */
--- 1,44 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vctp.16	(?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32_t a)
  {
    return vctp16q (a);
  }
  
! /*
! **foo1:
! **	...
! **	vctp.16	(?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
  mve_pred16_t
! foo1 ()
  {
!   return vctp16q (1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q_m.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q_m.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q_m.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q_m.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vctp16q_m (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vctpt.16"  }  } */
! 
  mve_pred16_t
! foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vctp16q_m (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,52 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vctpt.16	(?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vctp16q_m (a, p);
  }
  
! /*
! **foo1:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vctpt.16	(?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
  mve_pred16_t
! foo1 (mve_pred16_t p)
  {
!   return vctp16q_m (1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32_t a)
  {
    return vctp32q (a);
  }
  
! /* { dg-final { scan-assembler "vctp.32"  }  } */
! 
  mve_pred16_t
! foo1 (uint32_t a)
  {
!   return vctp32q (a);
  }
  
! /* { dg-final { scan-assembler "vctp.32"  }  } */
--- 1,44 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vctp.32	(?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32_t a)
  {
    return vctp32q (a);
  }
  
! /*
! **foo1:
! **	...
! **	vctp.32	(?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
  mve_pred16_t
! foo1 ()
  {
!   return vctp32q (1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q_m.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q_m.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q_m.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q_m.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vctp32q_m (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vctpt.32"  }  } */
! 
  mve_pred16_t
! foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vctp32q_m (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,52 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vctpt.32	(?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vctp32q_m (a, p);
  }
  
! /*
! **foo1:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vctpt.32	(?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
  mve_pred16_t
! foo1 (mve_pred16_t p)
  {
!   return vctp32q_m (1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32_t a)
  {
    return vctp64q (a);
  }
  
! /* { dg-final { scan-assembler "vctp.64"  }  } */
! 
  mve_pred16_t
! foo1 (uint32_t a)
  {
!   return vctp64q (a);
  }
  
! /* { dg-final { scan-assembler "vctp.64"  }  } */
--- 1,44 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vctp.64	(?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32_t a)
  {
    return vctp64q (a);
  }
  
! /*
! **foo1:
! **	...
! **	vctp.64	(?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
  mve_pred16_t
! foo1 ()
  {
!   return vctp64q (1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q_m.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q_m.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q_m.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q_m.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vctp64q_m (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vctpt.64"  }  } */
! 
  mve_pred16_t
! foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vctp64q_m (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,52 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vctpt.64	(?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vctp64q_m (a, p);
  }
  
! /*
! **foo1:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vctpt.64	(?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
  mve_pred16_t
! foo1 (mve_pred16_t p)
  {
!   return vctp64q_m (1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32_t a)
  {
    return vctp8q (a);
  }
  
! /* { dg-final { scan-assembler "vctp.8"  }  } */
! 
  mve_pred16_t
! foo1 (uint32_t a)
  {
!   return vctp8q (a);
  }
  
! /* { dg-final { scan-assembler "vctp.8"  }  } */
--- 1,44 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vctp.8	(?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32_t a)
  {
    return vctp8q (a);
  }
  
! /*
! **foo1:
! **	...
! **	vctp.8	(?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
  mve_pred16_t
! foo1 ()
  {
!   return vctp8q (1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q_m.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q_m.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q_m.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q_m.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vctp8q_m (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vctpt.8"  }  } */
! 
  mve_pred16_t
! foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vctp8q_m (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,52 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vctpt.8	(?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vctp8q_m (a, p);
  }
  
! /*
! **foo1:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vctpt.8	(?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
  mve_pred16_t
! foo1 (mve_pred16_t p)
  {
!   return vctp8q_m (1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_m_s16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtat.s16.f16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_m_s16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_m_s32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtat.s32.f32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_m_s32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_m_u16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtat.u16.f16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_m_u16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_m_u32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtat.u32.f32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_m_u32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtaq_s16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvta.s16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvta.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtaq_s16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtaq_s32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvta.s32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvta.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtaq_s32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a)
  {
!     return vcvtaq_u16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvta.u16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvta.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a)
  {
!   return vcvtaq_u16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a)
  {
!     return vcvtaq_u32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvta.u32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvta.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a)
  {
!   return vcvtaq_u32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_x_s16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtat.s16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_x_s16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_x_s32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtat.s32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_x_s32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_x_u16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtat.u16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_x_u16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_x_u32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtat.u32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_x_u32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float32x4_t b)
  {
    return vcvtbq_f16_f32 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcvtb.f16.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtb.f16.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float32x4_t b)
  {
    return vcvtbq_f16_f32 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float16x8_t a)
  {
    return vcvtbq_f32_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtb.f32.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtb.f32.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float16x8_t a)
  {
    return vcvtbq_f32_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcvtbq_m_f16_f32 (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtbt.f16.f32"  }  } */
! 
! float16x8_t
! foo1 (float16x8_t a, float32x4_t b, mve_pred16_t p)
! {
!   return vcvtbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtbt.f16.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcvtbq_m_f16_f32 (a, b, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtbq_m_f32_f16 (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtbt.f32.f16"  }  } */
! 
! float32x4_t
! foo1 (float32x4_t inactive, float16x8_t a, mve_pred16_t p)
! {
!   return vcvtbq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtbt.f32.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtbq_m_f32_f16 (inactive, a, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtbq_x_f32_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtbt.f32.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtbt.f32.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtbq_x_f32_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_m_s16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtmt.s16.f16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_m_s16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_m_s32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtmt.s32.f32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_m_s32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_m_u16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtmt.u16.f16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_m_u16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_m_u32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtmt.u32.f32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_m_u32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtmq_s16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtm.s16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtm.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtmq_s16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtmq_s32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtm.s32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtm.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtmq_s32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a)
  {
!     return vcvtmq_u16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtm.u16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtm.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a)
  {
!   return vcvtmq_u16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a)
  {
!     return vcvtmq_u32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtm.u32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtm.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a)
  {
!   return vcvtmq_u32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_x_s16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtmt.s16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_x_s16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_x_s32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtmt.s32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_x_s32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_x_u16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtmt.u16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_x_u16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_x_u32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtmt.u32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_x_u32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_m_s16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtnt.s16.f16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_m_s16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_m_s32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtnt.s32.f32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_m_s32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_m_u16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtnt.u16.f16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_m_u16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_m_u32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtnt.u32.f32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_m_u32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtnq_s16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtn.s16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtn.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtnq_s16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtnq_s32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtn.s32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtn.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtnq_s32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a)
  {
!     return vcvtnq_u16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtn.u16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtn.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a)
  {
!   return vcvtnq_u16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a)
  {
    return vcvtnq_u32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtn.u32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtn.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a)
  {
    return vcvtnq_u32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_x_s16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtnt.s16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_x_s16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_x_s32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtnt.s32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_x_s32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_x_u16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtnt.u16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_x_u16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_x_u32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtnt.u32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_x_u32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_m_s16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtpt.s16.f16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_m_s16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_m_s32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtpt.s32.f32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_m_s32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_m_u16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtpt.u16.f16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_m_u16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_m_u32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtpt.u32.f32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_m_u32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtpq_s16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtp.s16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtp.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtpq_s16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtpq_s32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtp.s32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtp.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtpq_s32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a)
  {
!     return vcvtpq_u16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtp.u16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtp.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a)
  {
!   return vcvtpq_u16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a)
  {
!     return vcvtpq_u32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtp.u32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtp.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a)
  {
!   return vcvtpq_u32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_x_s16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtpt.s16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_x_s16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_x_s32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtpt.s32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_x_s32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_x_u16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtpt.u16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_x_u16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_x_u32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtpt.u32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_x_u32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (int16x8_t a)
  {
    return vcvtq_f16_s16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvt.f16.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.f16.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (int16x8_t a)
  {
    return vcvtq_f16_s16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vcvt.f16.s16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (int16x8_t a)
! {
!   return vcvtq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (uint16x8_t a)
  {
    return vcvtq_f16_u16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvt.f16.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.f16.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (uint16x8_t a)
  {
    return vcvtq_f16_u16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vcvt.f16.u16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (uint16x8_t a)
! {
!   return vcvtq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (int32x4_t a)
  {
    return vcvtq_f32_s32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvt.f32.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.f32.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (int32x4_t a)
  {
    return vcvtq_f32_s32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vcvt.f32.s32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (int32x4_t a)
! {
!   return vcvtq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (uint32x4_t a)
  {
    return vcvtq_f32_u32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvt.f32.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.f32.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (uint32x4_t a)
  {
    return vcvtq_f32_u32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vcvt.f32.u32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (uint32x4_t a)
! {
!   return vcvtq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_f16_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f16.s16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_f16_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_f16_u16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f16.u16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_f16_u16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_f32_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f32.s32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_f32_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_f32_u32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f32.u32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_f32_u32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_f16_s16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f16.s16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f16.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_f16_s16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_f16_u16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f16.u16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f16.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_f16_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_f32_s32 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f32.s32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f32.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_f32_s32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vcvtq_m_n_f32_u32 (inactive, a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f32.u32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vcvtq_m_n (inactive, a, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f32.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vcvtq_m_n_f32_u32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vcvtq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_s16_f16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.s16.f16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.s16.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s16.f16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_s16_f16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s16.f16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_s32_f32 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.s32.f32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.s32.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s32.f32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_s32_f32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s32.f32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_u16_f16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.u16.f16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.u16.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u16.f16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_u16_f16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u16.f16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_u32_f32 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.u32.f32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.u32.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u32.f32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_u32_f32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u32.f32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_s16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.s16.f16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_s16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_s32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.s32.f32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_s32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_u16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.u16.f16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_u16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_u32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.u32.f32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_u32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (int16x8_t a)
  {
    return vcvtq_n_f16_s16 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vcvt.f16.s16"  }  } */
  
  float16x8_t
  foo1 (int16x8_t a)
  {
    return vcvtq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vcvt.f16.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.f16.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (int16x8_t a)
  {
    return vcvtq_n_f16_s16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcvt.f16.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (int16x8_t a)
  {
    return vcvtq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (uint16x8_t a)
  {
    return vcvtq_n_f16_u16 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vcvt.f16.u16"  }  } */
  
  float16x8_t
  foo1 (uint16x8_t a)
  {
    return vcvtq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vcvt.f16.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.f16.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (uint16x8_t a)
  {
    return vcvtq_n_f16_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcvt.f16.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (uint16x8_t a)
  {
    return vcvtq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (int32x4_t a)
  {
    return vcvtq_n_f32_s32 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vcvt.f32.s32"  }  } */
  
  float32x4_t
  foo1 (int32x4_t a)
  {
    return vcvtq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vcvt.f32.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.f32.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (int32x4_t a)
  {
    return vcvtq_n_f32_s32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcvt.f32.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (int32x4_t a)
  {
    return vcvtq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (uint32x4_t a)
  {
    return vcvtq_n_f32_u32 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vcvt.f32.u32"  }  } */
  
  float32x4_t
  foo1 (uint32x4_t a)
  {
    return vcvtq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vcvt.f32.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.f32.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (uint32x4_t a)
  {
    return vcvtq_n_f32_u32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcvt.f32.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (uint32x4_t a)
  {
    return vcvtq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtq_n_s16_f16 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vcvt.s16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.s16.f16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtq_n_s16_f16 (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtq_n_s32_f32 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vcvt.s32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.s32.f32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtq_n_s32_f32 (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a)
  {
    return vcvtq_n_u16_f16 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vcvt.u16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.u16.f16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a)
  {
    return vcvtq_n_u16_f16 (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a)
  {
    return vcvtq_n_u32_f32 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vcvt.u32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.u32.f32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a)
  {
    return vcvtq_n_u32_f32 (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtq_s16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvt.s16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtq_s16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtq_s32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvt.s32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtq_s32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a)
  {
!     return vcvtq_u16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvt.u16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a)
  {
!   return vcvtq_u16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a)
  {
!     return vcvtq_u32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvt.u32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a)
  {
!   return vcvtq_u32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_f16_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f16.s16"  }  } */
  
  float16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f16.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_f16_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_f16_u16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f16.u16"  }  } */
  
  float16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f16.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_f16_u16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_f32_s32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f32.s32"  }  } */
  
  float32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f32.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_f32_s32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_f32_u32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f32.u32"  }  } */
  
  float32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f32.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_f32_u32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_f16_s16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f16.s16"  }  } */
  
  float16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f16.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_f16_s16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_f16_u16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f16.u16"  }  } */
  
  float16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f16.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_f16_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_f32_s32 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f32.s32"  }  } */
  
  float32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_n (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f32.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_f32_s32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
!   return vcvtq_x_n_f32_u32 (a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f32.u32"  }  } */
  
  float32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
!   return vcvtq_x_n (a, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f32.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
!   return vcvtq_x_n_f32_u32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
!   return vcvtq_x_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_s16_f16 (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.s16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s16.f16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_s16_f16 (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_s32_f32 (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.s32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s32.f32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_s32_f32 (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_u16_f16 (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.u16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u16.f16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_u16_f16 (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_u32_f32 (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.u32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u32.f32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_u32_f32 (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_s16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.s16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_s16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_s32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.s32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_s32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_u16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.u16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_u16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_u32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.u32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_u32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float32x4_t b)
  {
    return vcvttq_f16_f32 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcvtt.f16.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtt.f16.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float32x4_t b)
  {
    return vcvttq_f16_f32 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float16x8_t a)
  {
    return vcvttq_f32_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtt.f32.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtt.f32.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float16x8_t a)
  {
    return vcvttq_f32_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcvttq_m_f16_f32 (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvttt.f16.f32"  }  } */
! 
! float16x8_t
! foo1 (float16x8_t a, float32x4_t b, mve_pred16_t p)
! {
!   return vcvttq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvttt.f16.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcvttq_m_f16_f32 (a, b, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvttq_m_f32_f16 (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvttt.f32.f16"  }  } */
! 
! float32x4_t
! foo1 (float32x4_t inactive, float16x8_t a, mve_pred16_t p)
! {
!   return vcvttq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvttt.f32.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvttq_m_f32_f16 (inactive, a, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvttq_x_f32_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvttt.f32.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvttt.f32.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvttq_x_f32_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vddupq_m_n_u16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vddupq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vddupq_m_n_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vddupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, mve_pred16_t p)
! {
!   return vddupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vddupq_m_n_u32 (inactive, a, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vddupq_m (inactive, a, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vddupq_m_n_u32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vddupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, mve_pred16_t p)
! {
!   return vddupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vddupq_m_n_u8 (inactive, a, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vddupq_m (inactive, a, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vddupq_m_n_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vddupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, mve_pred16_t p)
! {
!   return vddupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vddupq_m_wb_u16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vddupq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vddupq_m_wb_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vddupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, mve_pred16_t p)
! {
!   return vddupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_m_wb_u32 (inactive, a, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_m (inactive, a, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_m_wb_u32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, mve_pred16_t p)
! {
!   return vddupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_m_wb_u8 (inactive, a, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_m (inactive, a, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_m_wb_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, mve_pred16_t p)
! {
!   return vddupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t a)
  {
!   return vddupq_n_u16 (a, 4);
  }
  
- /* { dg-final { scan-assembler "vddup.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t a)
  {
!   return vddupq_u16 (a, 4);
  }
  
! /* { dg-final { scan-assembler "vddup.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t a)
  {
!   return vddupq_n_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t a)
  {
!   return vddupq_u16 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 ()
! {
!   return vddupq_u16 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a)
  {
    return vddupq_n_u32 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vddup.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t a)
  {
    return vddupq_u32 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vddup.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a)
  {
    return vddupq_n_u32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t a)
  {
    return vddupq_u32 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 ()
! {
!   return vddupq_u32 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t a)
  {
    return vddupq_n_u8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vddup.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t a)
  {
    return vddupq_u8 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vddup.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t a)
  {
    return vddupq_n_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t a)
  {
    return vddupq_u8 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 ()
! {
!   return vddupq_u8 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t *a)
  {
!   return vddupq_wb_u16 (a, 4);
  }
  
- /* { dg-final { scan-assembler "vddup.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t *a)
  {
!   return vddupq_u16 (a, 4);
  }
  
! /* { dg-final { scan-assembler "vddup.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t *a)
  {
!   return vddupq_wb_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t *a)
  {
!   return vddupq_u16 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 ()
! {
!   return vddupq_u16 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t *a)
  {
    return vddupq_wb_u32 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vddup.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t *a)
  {
    return vddupq_u32 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vddup.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t *a)
  {
    return vddupq_wb_u32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t *a)
  {
    return vddupq_u32 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 ()
! {
!   return vddupq_u32 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t *a)
  {
    return vddupq_wb_u8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vddup.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t *a)
  {
    return vddupq_u8 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vddup.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t *a)
  {
    return vddupq_wb_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t *a)
  {
    return vddupq_u8 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 ()
! {
!   return vddupq_u8 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vddupq_x_n_u16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
    return vddupq_x_u16 (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vddupq_x_n_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
    return vddupq_x_u16 (a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (mve_pred16_t p)
! {
!   return vddupq_x_u16 (1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a, mve_pred16_t p)
  {
!   return vddupq_x_n_u32 (a, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vddupq_x_u32 (a, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a, mve_pred16_t p)
  {
!   return vddupq_x_n_u32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vddupq_x_u32 (a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (mve_pred16_t p)
! {
!   return vddupq_x_u32 (1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t a, mve_pred16_t p)
  {
!   return vddupq_x_n_u8 (a, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vddupq_x_u8 (a, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t a, mve_pred16_t p)
  {
!   return vddupq_x_n_u8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vddupq_x_u8 (a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (mve_pred16_t p)
! {
!   return vddupq_x_u8 (1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! uint32_t *a;
  
  uint16x8_t
! foo (mve_pred16_t p)
  {
!   return vddupq_x_wb_u16 (a, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u16"  }  } */
  
  uint16x8_t
! foo1 (mve_pred16_t p)
  {
!   return vddupq_x_u16 (a, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_x_wb_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint32_t *a, mve_pred16_t p)
+ {
+   return vddupq_x_u16 (a, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 (mve_pred16_t p)
  {
!   return vddupq_x_u16 (1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! uint32_t *a;
  
  uint32x4_t
! foo (mve_pred16_t p)
  {
!   return vddupq_x_wb_u32 (a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u32"  }  } */
  
  uint32x4_t
! foo1 (mve_pred16_t p)
  {
!   return vddupq_x_u32 (a, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_x_wb_u32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32_t *a, mve_pred16_t p)
+ {
+   return vddupq_x_u32 (a, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo2 (mve_pred16_t p)
  {
!   return vddupq_x_u32 (1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! uint32_t *a;
  
  uint8x16_t
! foo (mve_pred16_t p)
  {
!   return vddupq_x_wb_u8 (a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u8"  }  } */
  
  uint8x16_t
! foo1 (mve_pred16_t p)
  {
!   return vddupq_x_u8 (a, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_x_wb_u8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint32_t *a, mve_pred16_t p)
+ {
+   return vddupq_x_u8 (a, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 (mve_pred16_t p)
  {
!   return vddupq_x_u8 (1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16_t a, mve_pred16_t p)
  {
    return vdupq_m_n_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdupt.16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16_t a, mve_pred16_t p)
  {
    return vdupq_m_n_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo2 (float16x8_t inactive, mve_pred16_t p)
! {
!   return vdupq_m (inactive, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32_t a, mve_pred16_t p)
  {
    return vdupq_m_n_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdupt.32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32_t a, mve_pred16_t p)
  {
    return vdupq_m_n_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo2 (float32x4_t inactive, mve_pred16_t p)
! {
!   return vdupq_m (inactive, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16_t a, mve_pred16_t p)
  {
    return vdupq_m_n_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdupt.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16_t a, mve_pred16_t p)
  {
    return vdupq_m_n_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32_t a, mve_pred16_t p)
  {
    return vdupq_m_n_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdupt.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32_t a, mve_pred16_t p)
  {
    return vdupq_m_n_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8_t a, mve_pred16_t p)
  {
    return vdupq_m_n_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdupt.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8_t a, mve_pred16_t p)
  {
    return vdupq_m_n_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16_t a, mve_pred16_t p)
  {
    return vdupq_m_n_u16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdupt.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16_t a, mve_pred16_t p)
  {
    return vdupq_m_n_u16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, mve_pred16_t p)
! {
!   return vdupq_m (inactive, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vdupq_m_n_u32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdupt.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vdupq_m_n_u32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, mve_pred16_t p)
! {
!   return vdupq_m (inactive, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8_t a, mve_pred16_t p)
  {
    return vdupq_m_n_u8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdupt.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8_t a, mve_pred16_t p)
  {
    return vdupq_m_n_u8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, mve_pred16_t p)
! {
!   return vdupq_m (inactive, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16_t a)
  {
    return vdupq_n_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vdup.16"  }  } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdup.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16_t a)
  {
    return vdupq_n_f16 (a);
  }
  
! /*
! **foo1:
! **	...
! **	vdup.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 ()
! {
!   return vdupq_n_f16 (1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32_t a)
  {
    return vdupq_n_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vdup.32"  }  } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdup.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32_t a)
  {
    return vdupq_n_f32 (a);
  }
  
! /*
! **foo1:
! **	...
! **	vdup.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 ()
! {
!   return vdupq_n_f32 (1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16_t a)
  {
    return vdupq_n_s16 (a);
  }
  
! /* { dg-final { scan-assembler "vdup.16"  }  } */
--- 1,28 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdup.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16_t a)
  {
    return vdupq_n_s16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32_t a)
  {
    return vdupq_n_s32 (a);
  }
  
! /* { dg-final { scan-assembler "vdup.32"  }  } */
--- 1,28 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdup.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32_t a)
  {
    return vdupq_n_s32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8_t a)
  {
    return vdupq_n_s8 (a);
  }
  
! /* { dg-final { scan-assembler "vdup.8"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdup.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8_t a)
  {
    return vdupq_n_s8 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16_t a)
  {
!     return vdupq_n_u16 (a);
  }
  
! /* { dg-final { scan-assembler "vdup.16"  }  } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdup.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16_t a)
  {
!   return vdupq_n_u16 (a);
  }
  
! /*
! **foo1:
! **	...
! **	vdup.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo1 ()
! {
!   return vdupq_n_u16 (1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a)
  {
!     return vdupq_n_u32 (a);
  }
  
! /* { dg-final { scan-assembler "vdup.32"  }  } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdup.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a)
  {
!   return vdupq_n_u32 (a);
  }
  
! /*
! **foo1:
! **	...
! **	vdup.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo1 ()
! {
!   return vdupq_n_u32 (1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8_t a)
  {
!     return vdupq_n_u8 (a);
  }
  
! /* { dg-final { scan-assembler "vdup.8"  }  } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdup.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8_t a)
  {
!   return vdupq_n_u8 (a);
  }
  
! /*
! **foo1:
! **	...
! **	vdup.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo1 ()
! {
!   return vdupq_n_u8 (1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16_t a, mve_pred16_t p)
  {
    return vdupq_x_n_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdupt.16"  }  } */
--- 1,48 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16_t a, mve_pred16_t p)
  {
    return vdupq_x_n_f16 (a, p);
  }
  
! /*
! **foo1:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (mve_pred16_t p)
! {
!   return vdupq_x_n_f16 (1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32_t a, mve_pred16_t p)
  {
    return vdupq_x_n_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdupt.32"  }  } */
--- 1,48 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32_t a, mve_pred16_t p)
  {
    return vdupq_x_n_f32 (a, p);
  }
  
! /*
! **foo1:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (mve_pred16_t p)
! {
!   return vdupq_x_n_f32 (1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16_t a, mve_pred16_t p)
  {
    return vdupq_x_n_s16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdupt.16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16_t a, mve_pred16_t p)
  {
    return vdupq_x_n_s16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32_t a, mve_pred16_t p)
  {
    return vdupq_x_n_s32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdupt.32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32_t a, mve_pred16_t p)
  {
    return vdupq_x_n_s32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8_t a, mve_pred16_t p)
  {
    return vdupq_x_n_s8 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdupt.8"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8_t a, mve_pred16_t p)
  {
    return vdupq_x_n_s8 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16_t a, mve_pred16_t p)
  {
    return vdupq_x_n_u16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdupt.16"  }  } */
--- 1,48 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16_t a, mve_pred16_t p)
  {
    return vdupq_x_n_u16 (a, p);
  }
  
! /*
! **foo1:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo1 (mve_pred16_t p)
! {
!   return vdupq_x_n_u16 (1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vdupq_x_n_u32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdupt.32"  }  } */
--- 1,48 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vdupq_x_n_u32 (a, p);
  }
  
! /*
! **foo1:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo1 (mve_pred16_t p)
! {
!   return vdupq_x_n_u32 (1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8_t a, mve_pred16_t p)
  {
    return vdupq_x_n_u8 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdupt.8"  }  } */
--- 1,48 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8_t a, mve_pred16_t p)
  {
    return vdupq_x_n_u8 (a, p);
  }
  
! /*
! **foo1:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo1 (mve_pred16_t p)
! {
!   return vdupq_x_n_u8 (1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_m (inactive, a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m_n_u16 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, mve_pred16_t p)
! {
!   return vdwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m_n_u32 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, mve_pred16_t p)
! {
!   return vdwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m_n_u8 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, mve_pred16_t p)
! {
!   return vdwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16x8_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u16"  }  } */
  
  uint16x8_t
! foo1 (uint16x8_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m_wb_u16 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
+ {
+   return vdwdupq_m (inactive, a, b, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 (uint16x8_t inactive, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, 1, 1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_m (inactive, a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m_wb_u32 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, mve_pred16_t p)
! {
!   return vdwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8x16_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u8"  }  } */
  
  uint8x16_t
! foo1 (uint8x16_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m_wb_u8 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
+ {
+   return vdwdupq_m (inactive, a, b, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 (uint8x16_t inactive, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, 1, 1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t a, uint32_t b)
  {
!   return vdwdupq_n_u16 (a, b, 2);
  }
  
- /* { dg-final { scan-assembler "vdwdup.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return vdwdupq_u16 (a, b, 2);
  }
  
! /* { dg-final { scan-assembler "vdwdup.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t a, uint32_t b)
  {
!   return vdwdupq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vdwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return vdwdupq_u16 (a, b, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vdwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 ()
! {
!   return vdwdupq_u16 (1, 1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a, uint32_t b)
  {
!   return vdwdupq_n_u32 (a, b, 8);
  }
  
- /* { dg-final { scan-assembler "vdwdup.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return vdwdupq_u32 (a, b, 8);
  }
  
! /* { dg-final { scan-assembler "vdwdup.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a, uint32_t b)
  {
!   return vdwdupq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vdwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return vdwdupq_u32 (a, b, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vdwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 ()
! {
!   return vdwdupq_u32 (1, 1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t a, uint32_t b)
  {
!   return vdwdupq_n_u8 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "vdwdup.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return vdwdupq_u8 (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "vdwdup.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t a, uint32_t b)
  {
!   return vdwdupq_n_u8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vdwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return vdwdupq_u8 (a, b, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vdwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 ()
! {
!   return vdwdupq_u8 (1, 1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_wb_u16 (a, b, 2);
  }
  
- /* { dg-final { scan-assembler "vdwdup.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_u16 (a, b, 2);
  }
  
! /* { dg-final { scan-assembler "vdwdup.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_wb_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vdwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_u16 (a, b, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vdwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 ()
! {
!   return vdwdupq_u16 (1, 1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_wb_u32 (a, b, 8);
  }
  
- /* { dg-final { scan-assembler "vdwdup.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_u32 (a, b, 8);
  }
  
! /* { dg-final { scan-assembler "vdwdup.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_wb_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vdwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_u32 (a, b, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vdwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 ()
! {
!   return vdwdupq_u32 (1, 1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_wb_u8 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "vdwdup.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_u8 (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "vdwdup.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_wb_u8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vdwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_u8 (a, b, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vdwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 ()
! {
!   return vdwdupq_u8 (1, 1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_x_n_u16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_x_u16 (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_x_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_x_u16 (a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (mve_pred16_t p)
! {
!   return vdwdupq_x_u16 (1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_n_u32 (a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_u32 (a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_u32 (a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (mve_pred16_t p)
! {
!   return vdwdupq_x_u32 (1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_n_u8 (a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_u8 (a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_n_u8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_u8 (a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (mve_pred16_t p)
! {
!   return vdwdupq_x_u8 (1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_wb_u16 (a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u16"  }  } */
  
  uint16x8_t
! foo1 (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_u16 (a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_wb_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint32_t *a, uint32_t b, mve_pred16_t p)
+ {
+   return vdwdupq_x_u16 (a, b, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 (mve_pred16_t p)
  {
!   return vdwdupq_x_u16 (1, 1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_x_wb_u32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_x_u32 (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t *a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_x_wb_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32_t *a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_x_u32 (a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (mve_pred16_t p)
! {
!   return vdwdupq_x_u32 (1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_wb_u8 (a, b, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u8"  }  } */
  
  uint8x16_t
! foo1 (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_u8 (a, b, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_wb_u8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint32_t *a, uint32_t b, mve_pred16_t p)
+ {
+   return vdwdupq_x_u8 (a, b, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 (mve_pred16_t p)
  {
!   return vdwdupq_x_u8 (1, 1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return veorq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "veor"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return veorq (a, b);
  }
  
! /* { dg-final { scan-assembler "veor"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return veorq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return veorq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return veorq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "veor"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return veorq (a, b);
  }
  
! /* { dg-final { scan-assembler "veor"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return veorq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return veorq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return veorq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return veorq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return veorq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return veorq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return veorq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return veorq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return veorq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return veorq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return veorq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return veorq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return veorq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return veorq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return veorq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return veorq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return veorq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return veorq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return veorq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "veor"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return veorq (a, b);
  }
  
! /* { dg-final { scan-assembler "veor"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return veorq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return veorq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return veorq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "veor"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return veorq (a, b);
  }
  
! /* { dg-final { scan-assembler "veor"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return veorq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return veorq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return veorq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "veor"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return veorq (a, b);
  }
  
! /* { dg-final { scan-assembler "veor"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return veorq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return veorq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return veorq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "veor"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return veorq (a, b);
  }
  
! /* { dg-final { scan-assembler "veor"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return veorq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return veorq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return veorq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "veor"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return veorq (a, b);
  }
  
! /* { dg-final { scan-assembler "veor"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return veorq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return veorq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return veorq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "veor"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return veorq (a, b);
  }
  
! /* { dg-final { scan-assembler "veor"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return veorq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return veorq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return veorq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return veorq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return veorq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return veorq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return veorq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return veorq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return veorq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return veorq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return veorq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return veorq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return veorq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return veorq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return veorq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return veorq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return veorq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return veorq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
!   return vfmaq_f16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vfma.f16"  }  } */
  
  float16x8_t
! foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
!   return vfmaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vfma.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vfma.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16x8_t add, float16x8_t m1, float16x8_t m2)
  {
!   return vfmaq_f16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vfma.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16x8_t add, float16x8_t m1, float16x8_t m2)
  {
!   return vfmaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
!   return vfmaq_f32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vfma.f32"  }  } */
  
  float32x4_t
! foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
!   return vfmaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vfma.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vfma.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32x4_t add, float32x4_t m1, float32x4_t m2)
  {
!   return vfmaq_f32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vfma.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32x4_t add, float32x4_t m1, float32x4_t m2)
  {
!   return vfmaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
!   return vfmaq_m_f16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vfmat.f16"  }  } */
  
  float16x8_t
! foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
!   return vfmaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vfmat.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16x8_t add, float16x8_t m1, float16x8_t m2, mve_pred16_t p)
  {
!   return vfmaq_m_f16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16x8_t add, float16x8_t m1, float16x8_t m2, mve_pred16_t p)
  {
!   return vfmaq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
!   return vfmaq_m_f32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vfmat.f32"  }  } */
  
  float32x4_t
! foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
!   return vfmaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vfmat.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32x4_t add, float32x4_t m1, float32x4_t m2, mve_pred16_t p)
  {
!   return vfmaq_m_f32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32x4_t add, float32x4_t m1, float32x4_t m2, mve_pred16_t p)
  {
!   return vfmaq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p)
- {
-   return vfmaq_m (a, b, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p)
  {
!   return vfmaq_m_n_f16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vfmat.f16"  }  } */
  
  float16x8_t
! foo1 (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p)
  {
!   return vfmaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vfmat.f16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16x8_t add, float16x8_t m1, float16_t m2, mve_pred16_t p)
  {
!   return vfmaq_m_n_f16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float16x8_t
+ foo1 (float16x8_t add, float16x8_t m1, float16_t m2, mve_pred16_t p)
+ {
+   return vfmaq_m (add, m1, m2, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo2 (float16x8_t add, float16x8_t m1, mve_pred16_t p)
  {
!   return vfmaq_m (add, m1, 1.1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p)
- {
-   return vfmaq_m (a, b, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p)
  {
!   return vfmaq_m_n_f32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vfmat.f32"  }  } */
  
  float32x4_t
! foo1 (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p)
  {
!   return vfmaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vfmat.f32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32x4_t add, float32x4_t m1, float32_t m2, mve_pred16_t p)
  {
!   return vfmaq_m_n_f32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float32x4_t
+ foo1 (float32x4_t add, float32x4_t m1, float32_t m2, mve_pred16_t p)
+ {
+   return vfmaq_m (add, m1, m2, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo2 (float32x4_t add, float32x4_t m1, mve_pred16_t p)
  {
!   return vfmaq_m (add, m1, 1.1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t a, float16x8_t b, float16_t c)
- {
-   return vfmaq (a, b, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16x8_t a, float16x8_t b, float16_t c)
  {
!   return vfmaq_n_f16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vfma.f16"  }  } */
  
  float16x8_t
! foo1 (float16x8_t a, float16x8_t b, float16_t c)
  {
!   return vfmaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vfma.f16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vfma.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16x8_t add, float16x8_t m1, float16_t m2)
  {
!   return vfmaq_n_f16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vfma.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float16x8_t
+ foo1 (float16x8_t add, float16x8_t m1, float16_t m2)
+ {
+   return vfmaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vfma.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo2 (float16x8_t add, float16x8_t m1)
  {
!   return vfmaq (add, m1, 1.1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t a, float32x4_t b, float32_t c)
- {
-   return vfmaq (a, b, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32x4_t a, float32x4_t b, float32_t c)
  {
!   return vfmaq_n_f32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vfma.f32"  }  } */
  
  float32x4_t
! foo1 (float32x4_t a, float32x4_t b, float32_t c)
  {
!   return vfmaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vfma.f32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vfma.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32x4_t add, float32x4_t m1, float32_t m2)
  {
!   return vfmaq_n_f32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vfma.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float32x4_t
+ foo1 (float32x4_t add, float32x4_t m1, float32_t m2)
+ {
+   return vfmaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vfma.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo2 (float32x4_t add, float32x4_t m1)
  {
!   return vfmaq (add, m1, 1.1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p)
- {
-   return vfmasq_m (a, b, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p)
  {
!   return vfmasq_m_n_f16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vfmast.f16"  }  } */
  
  float16x8_t
! foo1 (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p)
  {
!   return vfmasq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vfmast.f16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmast.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16x8_t m1, float16x8_t m2, float16_t add, mve_pred16_t p)
  {
!   return vfmasq_m_n_f16 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmast.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float16x8_t
+ foo1 (float16x8_t m1, float16x8_t m2, float16_t add, mve_pred16_t p)
+ {
+   return vfmasq_m (m1, m2, add, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmast.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo2 (float16x8_t m1, float16x8_t m2, mve_pred16_t p)
  {
!   return vfmasq_m (m1, m2, 1.1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p)
- {
-   return vfmasq_m (a, b, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p)
  {
!   return vfmasq_m_n_f32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vfmast.f32"  }  } */
  
  float32x4_t
! foo1 (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p)
  {
!   return vfmasq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vfmast.f32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmast.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32x4_t m1, float32x4_t m2, float32_t add, mve_pred16_t p)
  {
!   return vfmasq_m_n_f32 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmast.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float32x4_t
+ foo1 (float32x4_t m1, float32x4_t m2, float32_t add, mve_pred16_t p)
+ {
+   return vfmasq_m (m1, m2, add, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmast.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo2 (float32x4_t m1, float32x4_t m2, mve_pred16_t p)
  {
!   return vfmasq_m (m1, m2, 1.1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t a, float16x8_t b, float16_t c)
- {
-   return vfmasq (a, b, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16x8_t a, float16x8_t b, float16_t c)
  {
!   return vfmasq_n_f16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vfmas.f16"  }  } */
  
  float16x8_t
! foo1 (float16x8_t a, float16x8_t b, float16_t c)
  {
!   return vfmasq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vfmas.f16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vfmas.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16x8_t m1, float16x8_t m2, float16_t add)
  {
!   return vfmasq_n_f16 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vfmas.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float16x8_t
+ foo1 (float16x8_t m1, float16x8_t m2, float16_t add)
+ {
+   return vfmasq (m1, m2, add);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vfmas.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo2 (float16x8_t m1, float16x8_t m2)
  {
!   return vfmasq (m1, m2, 1.1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t a, float32x4_t b, float32_t c)
- {
-   return vfmasq (a, b, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32x4_t a, float32x4_t b, float32_t c)
  {
!   return vfmasq_n_f32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vfmas.f32"  }  } */
  
  float32x4_t
! foo1 (float32x4_t a, float32x4_t b, float32_t c)
  {
!   return vfmasq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vfmas.f32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vfmas.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32x4_t m1, float32x4_t m2, float32_t add)
  {
!   return vfmasq_n_f32 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vfmas.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float32x4_t
+ foo1 (float32x4_t m1, float32x4_t m2, float32_t add)
+ {
+   return vfmasq (m1, m2, add);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vfmas.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo2 (float32x4_t m1, float32x4_t m2)
  {
!   return vfmasq (m1, m2, 1.1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
!   return vfmsq_f16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vfms.f16"  }  } */
  
  float16x8_t
! foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
!   return vfmsq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vfms.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vfms.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16x8_t add, float16x8_t m1, float16x8_t m2)
  {
!   return vfmsq_f16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vfms.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16x8_t add, float16x8_t m1, float16x8_t m2)
  {
!   return vfmsq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
!   return vfmsq_f32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vfms.f32"  }  } */
  
  float32x4_t
! foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
!   return vfmsq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vfms.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vfms.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32x4_t add, float32x4_t m1, float32x4_t m2)
  {
!   return vfmsq_f32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vfms.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32x4_t add, float32x4_t m1, float32x4_t m2)
  {
!   return vfmsq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
!   return vfmsq_m_f16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vfmst.f16"  }  } */
  
  float16x8_t
! foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
!   return vfmsq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vfmst.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmst.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16x8_t add, float16x8_t m1, float16x8_t m2, mve_pred16_t p)
  {
!   return vfmsq_m_f16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmst.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16x8_t add, float16x8_t m1, float16x8_t m2, mve_pred16_t p)
  {
!   return vfmsq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
!   return vfmsq_m_f32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vfmst.f32"  }  } */
  
  float32x4_t
! foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
!   return vfmsq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vfmst.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmst.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32x4_t add, float32x4_t m1, float32x4_t m2, mve_pred16_t p)
  {
!   return vfmsq_m_f32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmst.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32x4_t add, float32x4_t m1, float32x4_t m2, mve_pred16_t p)
  {
!   return vfmsq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhaddt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
! {
!   return vhaddq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhaddt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
! {
!   return vhaddq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhaddt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
! {
!   return vhaddq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhaddq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhaddq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhaddq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhaddq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhaddq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhaddq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhaddq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhaddq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhaddq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhaddq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhaddq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhaddq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vhaddq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vhaddq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vhaddq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vhaddq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vhaddq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vhaddq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vhaddq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vhaddq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vhaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vhadd.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a)
! {
!   return vhaddq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vhaddq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vhaddq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vhaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vhadd.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a)
! {
!   return vhaddq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vhaddq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vhaddq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vhaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vhadd.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a)
! {
!   return vhaddq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vhaddq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vhaddq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vhaddq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vhaddq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vhaddq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vhaddq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vhaddq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vhaddq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vhaddq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vhaddq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vhaddq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vhaddq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhaddt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a, mve_pred16_t p)
! {
!   return vhaddq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhaddt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a, mve_pred16_t p)
! {
!   return vhaddq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhaddt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a, mve_pred16_t p)
! {
!   return vhaddq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhaddq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhaddq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhaddq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhaddq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhaddq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhaddq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhaddq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhaddq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhaddq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhaddq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhaddq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhaddq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhcaddt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhcaddt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhcaddt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vhcaddq_rot270_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhcadd.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vhcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vhcadd.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhcadd.s16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vhcaddq_rot270_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhcadd.s16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vhcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vhcaddq_rot270_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhcadd.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vhcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vhcadd.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhcadd.s32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vhcaddq_rot270_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhcadd.s32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vhcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vhcaddq_rot270_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhcadd.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vhcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vhcadd.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhcadd.s8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vhcaddq_rot270_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhcadd.s8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vhcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhcaddt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhcaddt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhcaddt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vhcaddq_rot90_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhcadd.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vhcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vhcadd.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhcadd.s16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vhcaddq_rot90_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhcadd.s16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vhcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vhcaddq_rot90_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhcadd.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vhcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vhcadd.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhcadd.s32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vhcaddq_rot90_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhcadd.s32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vhcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vhcaddq_rot90_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhcadd.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vhcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vhcadd.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhcadd.s8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vhcaddq_rot90_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhcadd.s8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vhcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhsubt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
! {
!   return vhsubq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhsubt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
! {
!   return vhsubq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhsubt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
! {
!   return vhsubq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhsubq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhsubq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhsubq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhsubq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhsubq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhsubq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhsubq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhsubq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhsubq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhsubq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhsubq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhsubq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vhsubq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vhsubq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vhsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vhsubq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vhsubq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vhsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vhsubq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vhsubq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vhsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vhsubq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vhsubq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vhsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vhsub.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a)
! {
!   return vhsubq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vhsubq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vhsubq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vhsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vhsub.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a)
! {
!   return vhsubq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vhsubq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vhsubq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vhsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vhsub.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a)
! {
!   return vhsubq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vhsubq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vhsubq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vhsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vhsubq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vhsubq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vhsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vhsubq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vhsubq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vhsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vhsubq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vhsubq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vhsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vhsubq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vhsubq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vhsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vhsubq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vhsubq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vhsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhsubt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a, mve_pred16_t p)
! {
!   return vhsubq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhsubt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a, mve_pred16_t p)
! {
!   return vhsubq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhsubt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a, mve_pred16_t p)
! {
!   return vhsubq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhsubq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhsubq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhsubq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhsubq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhsubq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhsubq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhsubq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhsubq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhsubq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhsubq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhsubq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhsubq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vidupq_m_n_u16 (inactive, a, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vidupq_m (inactive, a, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vidupq_m_n_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vidupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, mve_pred16_t p)
! {
!   return vidupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vidupq_m_n_u32 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vidupq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vidupq_m_n_u32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vidupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, mve_pred16_t p)
! {
!   return vidupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vidupq_m_n_u8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vidupq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vidupq_m_n_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vidupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, mve_pred16_t p)
! {
!   return vidupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vidupq_m_wb_u16 (inactive, a, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vidupq_m (inactive, a, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vidupq_m_wb_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vidupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, mve_pred16_t p)
! {
!   return vidupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vidupq_m_wb_u32 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vidupq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vidupq_m_wb_u32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vidupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, mve_pred16_t p)
! {
!   return vidupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vidupq_m_wb_u8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vidupq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vidupq_m_wb_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vidupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, mve_pred16_t p)
! {
!   return vidupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t a)
  {
!   return vidupq_n_u16 (a, 4);
  }
  
- /* { dg-final { scan-assembler "vidup.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t a)
  {
!   return vidupq_u16 (a, 4);
  }
  
! /* { dg-final { scan-assembler "vidup.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vidup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t a)
  {
!   return vidupq_n_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vidup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t a)
  {
!   return vidupq_u16 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vidup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 ()
! {
!   return vidupq_u16 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a)
  {
    return vidupq_n_u32 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vidup.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t a)
  {
    return vidupq_u32 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vidup.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vidup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a)
  {
    return vidupq_n_u32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vidup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t a)
  {
    return vidupq_u32 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vidup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 ()
! {
!   return vidupq_u32 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t a)
  {
    return vidupq_n_u8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vidup.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t a)
  {
    return vidupq_u8 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vidup.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vidup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t a)
  {
    return vidupq_n_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vidup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t a)
  {
    return vidupq_u8 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vidup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 ()
! {
!   return vidupq_u8 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t *a)
  {
!   return vidupq_wb_u16 (a, 4);
  }
  
- /* { dg-final { scan-assembler "vidup.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t *a)
  {
!   return vidupq_u16 (a, 4);
  }
  
! /* { dg-final { scan-assembler "vidup.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vidup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t *a)
  {
!   return vidupq_wb_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vidup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t *a)
  {
!   return vidupq_u16 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vidup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 ()
! {
!   return vidupq_u16 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t *a)
  {
    return vidupq_wb_u32 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vidup.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t *a)
  {
    return vidupq_u32 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vidup.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vidup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t *a)
  {
    return vidupq_wb_u32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vidup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t *a)
  {
    return vidupq_u32 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vidup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 ()
! {
!   return vidupq_u32 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t *a)
  {
    return vidupq_wb_u8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vidup.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t *a)
  {
    return vidupq_u8 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vidup.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vidup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t *a)
  {
    return vidupq_wb_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vidup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t *a)
  {
    return vidupq_u8 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vidup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 ()
! {
!   return vidupq_u8 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t a, mve_pred16_t p)
  {
!   return vidupq_x_n_u16 (a, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vidupq_x_u16 (a, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t a, mve_pred16_t p)
  {
!   return vidupq_x_n_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vidupq_x_u16 (a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (mve_pred16_t p)
! {
!   return vidupq_x_u16 (1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vidupq_x_n_u32 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
    return vidupq_x_u32 (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vidupq_x_n_u32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
    return vidupq_x_u32 (a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (mve_pred16_t p)
! {
!   return vidupq_x_u32 (1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vidupq_x_n_u8 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
    return vidupq_x_u8 (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vidupq_x_n_u8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
    return vidupq_x_u8 (a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (mve_pred16_t p)
! {
!   return vidupq_x_u8 (1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! uint32_t *a;
  
  uint16x8_t
! foo (mve_pred16_t p)
  {
!   return vidupq_x_wb_u16 (a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u16"  }  } */
  
  uint16x8_t
! foo1 (mve_pred16_t p)
  {
!   return vidupq_x_u16 (a, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint32_t *a, mve_pred16_t p)
  {
!   return vidupq_x_wb_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint32_t *a, mve_pred16_t p)
+ {
+   return vidupq_x_u16 (a, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 (mve_pred16_t p)
  {
!   return vidupq_x_u16 (1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! uint32_t *a;
  
  uint32x4_t
! foo (mve_pred16_t p)
  {
!   return vidupq_x_wb_u32 (a, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u32"  }  } */
  
  uint32x4_t
! foo1 (mve_pred16_t p)
  {
!   return vidupq_x_u32 (a, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t *a, mve_pred16_t p)
  {
!   return vidupq_x_wb_u32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32_t *a, mve_pred16_t p)
+ {
+   return vidupq_x_u32 (a, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo2 (mve_pred16_t p)
  {
!   return vidupq_x_u32 (1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! uint32_t * a;
  
  uint8x16_t
! foo (mve_pred16_t p)
  {
!   return vidupq_x_wb_u8 (a, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u8"  }  } */
  
  uint8x16_t
! foo1 (mve_pred16_t p)
  {
!   return vidupq_x_u8 (a, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint32_t *a, mve_pred16_t p)
  {
!   return vidupq_x_wb_u8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint32_t *a, mve_pred16_t p)
+ {
+   return vidupq_x_u8 (a, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 (mve_pred16_t p)
  {
!   return vidupq_x_u8 (1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_n_u16 (inactive, a, b, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_n_u16 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, mve_pred16_t p)
! {
!   return viwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_n_u32 (inactive, a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_n_u32 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, mve_pred16_t p)
! {
!   return viwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_n_u8 (inactive, a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_n_u8 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, mve_pred16_t p)
! {
!   return viwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_wb_u16 (inactive, a, b, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_wb_u16 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, mve_pred16_t p)
! {
!   return viwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_wb_u32 (inactive, a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_wb_u32 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, mve_pred16_t p)
! {
!   return viwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_wb_u8 (inactive, a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_wb_u8 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, mve_pred16_t p)
! {
!   return viwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t a, uint32_t b)
  {
!   return viwdupq_n_u16 (a, b, 2);
  }
  
- /* { dg-final { scan-assembler "viwdup.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return viwdupq_u16 (a, b, 2);
  }
  
! /* { dg-final { scan-assembler "viwdup.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	viwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t a, uint32_t b)
  {
!   return viwdupq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	viwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return viwdupq_u16 (a, b, 1);
  }
  
! /*
! **foo2:
! **	...
! **	viwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 ()
! {
!   return viwdupq_u16 (1, 1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a, uint32_t b)
  {
!   return viwdupq_n_u32 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "viwdup.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return viwdupq_u32 (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "viwdup.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	viwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a, uint32_t b)
  {
!   return viwdupq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	viwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return viwdupq_u32 (a, b, 1);
  }
  
! /*
! **foo2:
! **	...
! **	viwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 ()
! {
!   return viwdupq_u32 (1, 1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t a, uint32_t b)
  {
    return viwdupq_n_u8 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "viwdup.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t a, uint32_t b)
  {
    return viwdupq_u8 (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "viwdup.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	viwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t a, uint32_t b)
  {
    return viwdupq_n_u8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	viwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t a, uint32_t b)
  {
    return viwdupq_u8 (a, b, 1);
  }
  
! /*
! **foo2:
! **	...
! **	viwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 ()
! {
!   return viwdupq_u8 (1, 1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint32_t * a, uint32_t b)
  {
!   return viwdupq_wb_u16 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "viwdup.u16"  }  } */
  
  uint16x8_t
! foo1 (uint32_t * a, uint32_t b)
  {
!   return viwdupq_u16 (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "viwdup.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	viwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint32_t *a, uint32_t b)
  {
!   return viwdupq_wb_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	viwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint32_t *a, uint32_t b)
+ {
+   return viwdupq_u16 (a, b, 1);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	viwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 ()
  {
!   return viwdupq_u16 (1, 1, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t * a, uint32_t b)
  {
!   return viwdupq_wb_u32 (a, b, 8);
  }
  
- /* { dg-final { scan-assembler "viwdup.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32_t * a, uint32_t b)
  {
!   return viwdupq_u32 (a, b, 8);
  }
  
! /* { dg-final { scan-assembler "viwdup.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	viwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t *a, uint32_t b)
  {
!   return viwdupq_wb_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	viwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32_t *a, uint32_t b)
+ {
+   return viwdupq_u32 (a, b, 1);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	viwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo2 ()
  {
!   return viwdupq_u32 (1, 1, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint32_t * a, uint32_t b)
  {
!   return viwdupq_wb_u8 (a, b, 2);
  }
  
- /* { dg-final { scan-assembler "viwdup.u8"  }  } */
  
  uint8x16_t
! foo1 (uint32_t * a, uint32_t b)
  {
!   return viwdupq_u8 (a, b, 2);
  }
  
! /* { dg-final { scan-assembler "viwdup.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	viwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint32_t *a, uint32_t b)
  {
!   return viwdupq_wb_u8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	viwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint32_t *a, uint32_t b)
+ {
+   return viwdupq_u8 (a, b, 1);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	viwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 ()
  {
!   return viwdupq_u8 (1, 1, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_n_u16 (a, b, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_u16 (a, b, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_u16 (a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (mve_pred16_t p)
! {
!   return viwdupq_x_u16 (1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_n_u32 (a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_u32 (a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_u32 (a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (mve_pred16_t p)
! {
!   return viwdupq_x_u32 (1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_n_u8 (a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_u8 (a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_n_u8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_u8 (a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (mve_pred16_t p)
! {
!   return viwdupq_x_u8 (1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_wb_u16 (a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u16"  }  } */
  
  uint16x8_t
! foo1 (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_u16 (a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_wb_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint32_t *a, uint32_t b, mve_pred16_t p)
+ {
+   return viwdupq_x_u16 (a, b, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 (mve_pred16_t p)
  {
!   return viwdupq_x_u16 (1, 1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_wb_u32 (a, b, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_u32 (a, b, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_wb_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32_t *a, uint32_t b, mve_pred16_t p)
+ {
+   return viwdupq_x_u32 (a, b, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo2 (mve_pred16_t p)
  {
!   return viwdupq_x_u32 (1, 1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_wb_u8 (a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u8"  }  } */
  
  uint8x16_t
! foo1 (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_u8 (a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_wb_u8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint32_t *a, uint32_t b, mve_pred16_t p)
+ {
+   return viwdupq_x_u8 (a, b, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 (mve_pred16_t p)
  {
!   return viwdupq_x_u8 (1, 1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16_t const * base)
  {
    return vld1q_f16 (base);
  }
  
  float16x8_t
! foo1 (float16_t const * base)
  {
    return vld1q (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrh.16" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16_t const *base)
  {
    return vld1q_f16 (base);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vldrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16_t const *base)
  {
    return vld1q (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32_t const * base)
  {
    return vld1q_f32 (base);
  }
  
  float32x4_t
! foo1 (float32_t const * base)
  {
    return vld1q (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrw.32" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32_t const *base)
  {
    return vld1q_f32 (base);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vldrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32_t const *base)
  {
    return vld1q (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16_t const * base)
  {
    return vld1q_s16 (base);
  }
  
  int16x8_t
! foo1 (int16_t const * base)
  {
    return vld1q (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrh.16" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16_t const *base)
  {
    return vld1q_s16 (base);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vldrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16_t const *base)
  {
    return vld1q (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32_t const * base)
  {
    return vld1q_s32 (base);
  }
  
  int32x4_t
! foo1 (int32_t const * base)
  {
    return vld1q (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrw.32" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32_t const *base)
  {
    return vld1q_s32 (base);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vldrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32_t const *base)
  {
    return vld1q (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8_t const * base)
  {
    return vld1q_s8 (base);
  }
  
  int8x16_t
! foo1 (int8_t const * base)
  {
    return vld1q (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrb.8" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8_t const *base)
  {
    return vld1q_s8 (base);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vldrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8_t const *base)
  {
    return vld1q (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16_t const * base)
  {
    return vld1q_u16 (base);
  }
  
  uint16x8_t
! foo1 (uint16_t const * base)
  {
    return vld1q (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrh.16" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16_t const *base)
  {
    return vld1q_u16 (base);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vldrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint16_t const *base)
  {
    return vld1q (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t const * base)
  {
    return vld1q_u32 (base);
  }
  
  uint32x4_t
! foo1 (uint32_t const * base)
  {
    return vld1q (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrw.32" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t const *base)
  {
    return vld1q_u32 (base);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vldrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32_t const *base)
  {
    return vld1q (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8_t const * base)
  {
    return vld1q_u8 (base);
  }
  
  uint8x16_t
! foo1 (uint8_t const * base)
  {
    return vld1q (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrb.8" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8_t const *base)
  {
    return vld1q_u8 (base);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vldrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo1 (uint8_t const *base)
  {
    return vld1q (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16_t const * base, mve_pred16_t p)
  {
    return vld1q_z_f16 (base, p);
  }
  
  float16x8_t
! foo1 (float16_t const * base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 2 }  } */
! /* { dg-final { scan-assembler-times "vldrht.16" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16_t const *base, mve_pred16_t p)
  {
    return vld1q_z_f16 (base, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16_t const *base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32_t const * base, mve_pred16_t p)
  {
    return vld1q_z_f32 (base, p);
  }
  
  float32x4_t
! foo1 (float32_t const * base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 2 }  } */
! /* { dg-final { scan-assembler-times "vldrwt.32" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32_t const *base, mve_pred16_t p)
  {
    return vld1q_z_f32 (base, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32_t const *base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16_t const * base, mve_pred16_t p)
  {
    return vld1q_z_s16 (base, p);
  }
  
  int16x8_t
! foo1 (int16_t const * base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 2 }  } */
! /* { dg-final { scan-assembler-times "vldrht.16" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16_t const *base, mve_pred16_t p)
  {
    return vld1q_z_s16 (base, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16_t const *base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32_t const * base, mve_pred16_t p)
  {
    return vld1q_z_s32 (base, p);
  }
  
  int32x4_t
! foo1 (int32_t const * base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 2 }  } */
! /* { dg-final { scan-assembler-times "vldrwt.32" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32_t const *base, mve_pred16_t p)
  {
    return vld1q_z_s32 (base, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32_t const *base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8_t const * base, mve_pred16_t p)
  {
    return vld1q_z_s8 (base, p);
  }
  
  int8x16_t
! foo1 (int8_t const * base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 2 }  } */
! /* { dg-final { scan-assembler-times "vldrbt.8" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8_t const *base, mve_pred16_t p)
  {
    return vld1q_z_s8 (base, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8_t const *base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16_t const * base, mve_pred16_t p)
  {
    return vld1q_z_u16 (base, p);
  }
  
  uint16x8_t
! foo1 (uint16_t const * base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 2 }  } */
! /* { dg-final { scan-assembler-times "vldrht.16" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16_t const *base, mve_pred16_t p)
  {
    return vld1q_z_u16 (base, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint16_t const *base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t const * base, mve_pred16_t p)
  {
    return vld1q_z_u32 (base, p);
  }
  
  uint32x4_t
! foo1 (uint32_t const * base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 2 }  } */
! /* { dg-final { scan-assembler-times "vldrwt.32" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t const *base, mve_pred16_t p)
  {
    return vld1q_z_u32 (base, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32_t const *base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8_t const * base, mve_pred16_t p)
  {
    return vld1q_z_u8 (base, p);
  }
  
  uint8x16_t
! foo1 (uint8_t const * base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 2 }  } */
! /* { dg-final { scan-assembler-times "vldrbt.8" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8_t const *base, mve_pred16_t p)
  {
    return vld1q_z_u8 (base, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo1 (uint8_t const *base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8x2_t
! foo (float16_t const * addr)
  {
    return vld2q_f16 (addr);
  }
  
- /* { dg-final { scan-assembler "vld20.16"  }  } */
- /* { dg-final { scan-assembler "vld21.16"  }  } */
  
  float16x8x2_t
! foo1 (float16_t const * addr)
  {
    return vld2q (addr);
  }
  
! /* { dg-final { scan-assembler "vld20.16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float16x8x2_t
! foo (float16_t const *addr)
  {
    return vld2q_f16 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float16x8x2_t
! foo1 (float16_t const *addr)
  {
    return vld2q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4x2_t
! foo (float32_t const * addr)
  {
    return vld2q_f32 (addr);
  }
  
- /* { dg-final { scan-assembler "vld20.32"  }  } */
- /* { dg-final { scan-assembler "vld21.32"  }  } */
  
  float32x4x2_t
! foo1 (float32_t const * addr)
  {
    return vld2q (addr);
  }
  
! /* { dg-final { scan-assembler "vld20.32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float32x4x2_t
! foo (float32_t const *addr)
  {
    return vld2q_f32 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float32x4x2_t
! foo1 (float32_t const *addr)
  {
    return vld2q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8x2_t
! foo (int16_t const * addr)
  {
    return vld2q_s16 (addr);
  }
  
- /* { dg-final { scan-assembler "vld20.16"  }  } */
- /* { dg-final { scan-assembler "vld21.16"  }  } */
  
  int16x8x2_t
! foo1 (int16_t const * addr)
  {
    return vld2q (addr);
  }
  
! /* { dg-final { scan-assembler "vld20.16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8x2_t
! foo (int16_t const *addr)
  {
    return vld2q_s16 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8x2_t
! foo1 (int16_t const *addr)
  {
    return vld2q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4x2_t
! foo (int32_t const * addr)
  {
    return vld2q_s32 (addr);
  }
  
- /* { dg-final { scan-assembler "vld20.32"  }  } */
- /* { dg-final { scan-assembler "vld21.32"  }  } */
  
  int32x4x2_t
! foo1 (int32_t const * addr)
  {
    return vld2q (addr);
  }
  
! /* { dg-final { scan-assembler "vld20.32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4x2_t
! foo (int32_t const *addr)
  {
    return vld2q_s32 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4x2_t
! foo1 (int32_t const *addr)
  {
    return vld2q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16x2_t
! foo (int8_t const * addr)
  {
    return vld2q_s8 (addr);
  }
  
- /* { dg-final { scan-assembler "vld20.8"  }  } */
- /* { dg-final { scan-assembler "vld21.8"  }  } */
  
  int8x16x2_t
! foo1 (int8_t const * addr)
  {
    return vld2q (addr);
  }
  
! /* { dg-final { scan-assembler "vld20.8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld20.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int8x16x2_t
! foo (int8_t const *addr)
  {
    return vld2q_s8 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld20.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int8x16x2_t
! foo1 (int8_t const *addr)
  {
    return vld2q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8x2_t
! foo (uint16_t const * addr)
  {
    return vld2q_u16 (addr);
  }
  
- /* { dg-final { scan-assembler "vld20.16"  }  } */
- /* { dg-final { scan-assembler "vld21.16"  }  } */
  
  uint16x8x2_t
! foo1 (uint16_t const * addr)
  {
    return vld2q (addr);
  }
  
! /* { dg-final { scan-assembler "vld20.16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8x2_t
! foo (uint16_t const *addr)
  {
    return vld2q_u16 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8x2_t
! foo1 (uint16_t const *addr)
  {
    return vld2q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4x2_t
! foo (uint32_t const * addr)
  {
    return vld2q_u32 (addr);
  }
  
- /* { dg-final { scan-assembler "vld20.32"  }  } */
- /* { dg-final { scan-assembler "vld21.32"  }  } */
  
  uint32x4x2_t
! foo1 (uint32_t const * addr)
  {
    return vld2q (addr);
  }
  
! /* { dg-final { scan-assembler "vld20.32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4x2_t
! foo (uint32_t const *addr)
  {
    return vld2q_u32 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4x2_t
! foo1 (uint32_t const *addr)
  {
    return vld2q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16x2_t
! foo (uint8_t const * addr)
  {
    return vld2q_u8 (addr);
  }
  
- /* { dg-final { scan-assembler "vld20.8"  }  } */
- /* { dg-final { scan-assembler "vld21.8"  }  } */
  
  uint8x16x2_t
! foo1 (uint8_t const * addr)
  {
    return vld2q (addr);
  }
  
! /* { dg-final { scan-assembler "vld20.8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld20.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint8x16x2_t
! foo (uint8_t const *addr)
  {
    return vld2q_u8 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld20.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint8x16x2_t
! foo1 (uint8_t const *addr)
  {
    return vld2q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,24 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8x4_t
! foo (float16_t const * addr)
  {
    return vld4q_f16 (addr);
  }
  
- /* { dg-final { scan-assembler "vld40.16"  }  } */
- /* { dg-final { scan-assembler "vld41.16"  }  } */
- /* { dg-final { scan-assembler "vld42.16"  }  } */
- /* { dg-final { scan-assembler "vld43.16"  }  } */
  
  float16x8x4_t
! foo1 (float16_t const * addr)
  {
    return vld4q (addr);
  }
  
! /* { dg-final { scan-assembler "vld40.16"  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  float16x8x4_t
! foo (float16_t const *addr)
  {
    return vld4q_f16 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  float16x8x4_t
! foo1 (float16_t const *addr)
  {
    return vld4q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,24 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4x4_t
! foo (float32_t const * addr)
  {
    return vld4q_f32 (addr);
  }
  
- /* { dg-final { scan-assembler "vld40.32"  }  } */
- /* { dg-final { scan-assembler "vld41.32"  }  } */
- /* { dg-final { scan-assembler "vld42.32"  }  } */
- /* { dg-final { scan-assembler "vld43.32"  }  } */
  
  float32x4x4_t
! foo1 (float32_t const * addr)
  {
    return vld4q (addr);
  }
  
! /* { dg-final { scan-assembler "vld40.32"  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  float32x4x4_t
! foo (float32_t const *addr)
  {
    return vld4q_f32 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  float32x4x4_t
! foo1 (float32_t const *addr)
  {
    return vld4q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,24 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8x4_t
! foo (int16_t const * addr)
  {
    return vld4q_s16 (addr);
  }
  
- /* { dg-final { scan-assembler "vld40.16"  }  } */
- /* { dg-final { scan-assembler "vld41.16"  }  } */
- /* { dg-final { scan-assembler "vld42.16"  }  } */
- /* { dg-final { scan-assembler "vld43.16"  }  } */
  
  int16x8x4_t
! foo1 (int16_t const * addr)
  {
    return vld4q (addr);
  }
  
! /* { dg-final { scan-assembler "vld40.16"  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  int16x8x4_t
! foo (int16_t const *addr)
  {
    return vld4q_s16 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  int16x8x4_t
! foo1 (int16_t const *addr)
  {
    return vld4q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,24 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4x4_t
! foo (int32_t const * addr)
  {
    return vld4q_s32 (addr);
  }
  
- /* { dg-final { scan-assembler "vld40.32"  }  } */
- /* { dg-final { scan-assembler "vld41.32"  }  } */
- /* { dg-final { scan-assembler "vld42.32"  }  } */
- /* { dg-final { scan-assembler "vld43.32"  }  } */
  
  int32x4x4_t
! foo1 (int32_t const * addr)
  {
    return vld4q (addr);
  }
  
! /* { dg-final { scan-assembler "vld40.32"  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  int32x4x4_t
! foo (int32_t const *addr)
  {
    return vld4q_s32 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  int32x4x4_t
! foo1 (int32_t const *addr)
  {
    return vld4q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,24 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16x4_t
! foo (int8_t const * addr)
  {
    return vld4q_s8 (addr);
  }
  
- /* { dg-final { scan-assembler "vld40.8"  }  } */
- /* { dg-final { scan-assembler "vld41.8"  }  } */
- /* { dg-final { scan-assembler "vld42.8"  }  } */
- /* { dg-final { scan-assembler "vld43.8"  }  } */
  
  int8x16x4_t
! foo1 (int8_t const * addr)
  {
    return vld4q (addr);
  }
  
! /* { dg-final { scan-assembler "vld40.8"  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld40.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  int8x16x4_t
! foo (int8_t const *addr)
  {
    return vld4q_s8 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld40.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  int8x16x4_t
! foo1 (int8_t const *addr)
  {
    return vld4q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,24 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8x4_t
! foo (uint16_t const * addr)
  {
    return vld4q_u16 (addr);
  }
  
- /* { dg-final { scan-assembler "vld40.16"  }  } */
- /* { dg-final { scan-assembler "vld41.16"  }  } */
- /* { dg-final { scan-assembler "vld42.16"  }  } */
- /* { dg-final { scan-assembler "vld43.16"  }  } */
  
  uint16x8x4_t
! foo1 (uint16_t const * addr)
  {
    return vld4q (addr);
  }
  
! /* { dg-final { scan-assembler "vld40.16"  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  uint16x8x4_t
! foo (uint16_t const *addr)
  {
    return vld4q_u16 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  uint16x8x4_t
! foo1 (uint16_t const *addr)
  {
    return vld4q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,24 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4x4_t
! foo (uint32_t const * addr)
  {
    return vld4q_u32 (addr);
  }
  
- /* { dg-final { scan-assembler "vld40.32"  }  } */
- /* { dg-final { scan-assembler "vld41.32"  }  } */
- /* { dg-final { scan-assembler "vld42.32"  }  } */
- /* { dg-final { scan-assembler "vld43.32"  }  } */
  
  uint32x4x4_t
! foo1 (uint32_t const * addr)
  {
    return vld4q (addr);
  }
  
! /* { dg-final { scan-assembler "vld40.32"  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  uint32x4x4_t
! foo (uint32_t const *addr)
  {
    return vld4q_u32 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  uint32x4x4_t
! foo1 (uint32_t const *addr)
  {
    return vld4q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,24 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16x4_t
! foo (uint8_t const * addr)
  {
    return vld4q_u8 (addr);
  }
  
- /* { dg-final { scan-assembler "vld40.8"  }  } */
- /* { dg-final { scan-assembler "vld41.8"  }  } */
- /* { dg-final { scan-assembler "vld42.8"  }  } */
- /* { dg-final { scan-assembler "vld43.8"  }  } */
  
  uint8x16x4_t
! foo1 (uint8_t const * addr)
  {
    return vld4q (addr);
  }
  
! /* { dg-final { scan-assembler "vld40.8"  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld40.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  uint8x16x4_t
! foo (uint8_t const *addr)
  {
    return vld4q_u8 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld40.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  uint8x16x4_t
! foo1 (uint8_t const *addr)
  {
    return vld4q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int8_t const * base, uint16x8_t offset)
  {
    return vldrbq_gather_offset_s16 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrb.s16"  }  } */
  
  int16x8_t
! foo1 (int8_t const * base, uint16x8_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.s16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int8_t const *base, uint16x8_t offset)
  {
    return vldrbq_gather_offset_s16 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrb.s16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int8_t const *base, uint16x8_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int8_t const * base, uint32x4_t offset)
  {
    return vldrbq_gather_offset_s32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrb.s32"  }  } */
  
  int32x4_t
! foo1 (int8_t const * base, uint32x4_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int8_t const *base, uint32x4_t offset)
  {
    return vldrbq_gather_offset_s32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrb.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int8_t const *base, uint32x4_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8_t const * base, uint8x16_t offset)
  {
    return vldrbq_gather_offset_s8 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrb.u8"  }  } */
  
  int8x16_t
! foo1 (int8_t const * base, uint8x16_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrb.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.u8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8_t const *base, uint8x16_t offset)
  {
    return vldrbq_gather_offset_s8 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrb.u8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8_t const *base, uint8x16_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint8_t const * base, uint16x8_t offset)
  {
    return vldrbq_gather_offset_u16 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrb.u16"  }  } */
  
  uint16x8_t
! foo1 (uint8_t const * base, uint16x8_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrb.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint8_t const *base, uint16x8_t offset)
  {
    return vldrbq_gather_offset_u16 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrb.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint8_t const *base, uint16x8_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint8_t const * base, uint32x4_t offset)
  {
    return vldrbq_gather_offset_u32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrb.u32"  }  } */
  
  uint32x4_t
! foo1 (uint8_t const * base, uint32x4_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrb.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint8_t const *base, uint32x4_t offset)
  {
    return vldrbq_gather_offset_u32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrb.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint8_t const *base, uint32x4_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8_t const * base, uint8x16_t offset)
  {
    return vldrbq_gather_offset_u8 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrb.u8"  }  } */
  
  uint8x16_t
! foo1 (uint8_t const * base, uint8x16_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrb.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.u8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8_t const *base, uint8x16_t offset)
  {
    return vldrbq_gather_offset_u8 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrb.u8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo1 (uint8_t const *base, uint8x16_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int8_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_s16 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrbt.s16"  }  } */
  
  int16x8_t
! foo1 (int8_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.s16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int8_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_s16 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.s16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int8_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int8_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_s32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrbt.s32"  }  } */
  
  int32x4_t
! foo1 (int8_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int8_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_s32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int8_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8_t const * base, uint8x16_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_s8 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrbt.u8"  }  } */
  
  int8x16_t
! foo1 (int8_t const * base, uint8x16_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8_t const *base, uint8x16_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_s8 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8_t const *base, uint8x16_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint8_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_u16 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrbt.u16"  }  } */
  
  uint16x8_t
! foo1 (uint8_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint8_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_u16 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint8_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint8_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_u32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrbt.u32"  }  } */
  
  uint32x4_t
! foo1 (uint8_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint8_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_u32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint8_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8_t const * base, uint8x16_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_u8 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrbt.u8"  }  } */
  
  uint8x16_t
! foo1 (uint8_t const * base, uint8x16_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8_t const *base, uint8x16_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_u8 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo1 (uint8_t const *base, uint8x16_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int8_t const * base)
  {
    return vldrbq_s16 (base);
  }
  
! /* { dg-final { scan-assembler "vldrb.s16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.s16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int8_t const *base)
  {
    return vldrbq_s16 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int8_t const * base)
  {
    return vldrbq_s32 (base);
  }
  
! /* { dg-final { scan-assembler "vldrb.s32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int8_t const *base)
  {
    return vldrbq_s32 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8_t const * base)
  {
    return vldrbq_s8 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrb.8" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8_t const *base)
  {
    return vldrbq_s8 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint8_t const * base)
  {
    return vldrbq_u16 (base);
  }
  
! /* { dg-final { scan-assembler "vldrb.u16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint8_t const *base)
  {
    return vldrbq_u16 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint8_t const * base)
  {
    return vldrbq_u32 (base);
  }
  
! /* { dg-final { scan-assembler "vldrb.u32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint8_t const *base)
  {
    return vldrbq_u32 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8_t const * base)
  {
    return vldrbq_u8 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrb.8" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8_t const *base)
  {
    return vldrbq_u8 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int8_t const * base, mve_pred16_t p)
  {
    return vldrbq_z_s16 (base, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.s16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.s16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int8_t const *base, mve_pred16_t p)
  {
    return vldrbq_z_s16 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int8_t const * base, mve_pred16_t p)
  {
    return vldrbq_z_s32 (base, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.s32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int8_t const *base, mve_pred16_t p)
  {
    return vldrbq_z_s32 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8_t const * base, mve_pred16_t p)
  {
    return vldrbq_z_s8 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrbt.8" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8_t const *base, mve_pred16_t p)
  {
    return vldrbq_z_s8 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint8_t const * base, mve_pred16_t p)
  {
    return vldrbq_z_u16 (base, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.u16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint8_t const *base, mve_pred16_t p)
  {
    return vldrbq_z_u16 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint8_t const * base, mve_pred16_t p)
  {
    return vldrbq_z_u32 (base, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.u32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint8_t const *base, mve_pred16_t p)
  {
    return vldrbq_z_u32 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8_t const * base, mve_pred16_t p)
  {
    return vldrbq_z_u8 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrbt.8" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8_t const *base, mve_pred16_t p)
  {
    return vldrbq_z_u8 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (uint64x2_t addr)
  {
!   return vldrdq_gather_base_s64 (addr, 8);
  }
  
! /* { dg-final { scan-assembler "vldrd.64"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrd.64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (uint64x2_t addr)
  {
!   return vldrdq_gather_base_s64 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint64x2_t addr)
  {
!   return vldrdq_gather_base_u64 (addr, 8);
  }
  
! /* { dg-final { scan-assembler "vldrd.64"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrd.64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint64x2_t addr)
  {
!   return vldrdq_gather_base_u64 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,16 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
! foo (uint64x2_t * addr)
  {
!   return vldrdq_gather_base_wb_s64 (addr, 8);
  }
  
! /* { dg-final { scan-assembler "vldrd.64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler-times "vldrw.u32" 1 } } */
! /* { dg-final { scan-assembler-times "vstrw.32" 1 } } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrd.64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  int64x2_t
! foo (uint64x2_t *addr)
  {
!   return vldrdq_gather_base_wb_s64 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,16 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
! foo (uint64x2_t * addr)
  {
!   return vldrdq_gather_base_wb_u64 (addr, 8);
  }
  
! /* { dg-final { scan-assembler "vldrd.64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler-times "vldrw.u32" 1 } } */
! /* { dg-final { scan-assembler-times "vstrw.32" 1 } } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrd.64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  uint64x2_t
! foo (uint64x2_t *addr)
  {
!   return vldrdq_gather_base_wb_u64 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  #include "arm_mve.h"
  
! int64x2_t foo (uint64x2_t * addr, mve_pred16_t p)
  {
!     return vldrdq_gather_base_wb_z_s64 (addr, 1016, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vldrdt.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler-times "vldrw.u32" 1 } } */
! /* { dg-final { scan-assembler-times "vstrw.32" 1 } } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
+ 
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
! 
! /*
! **foo:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vldrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
! **	...
! */
! int64x2_t
! foo (uint64x2_t *addr, mve_pred16_t p)
  {
!   return vldrdq_gather_base_wb_z_s64 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  #include "arm_mve.h"
  
! uint64x2_t foo (uint64x2_t * addr, mve_pred16_t p)
  {
!     return vldrdq_gather_base_wb_z_u64 (addr, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vldrdt.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler-times "vldrw.u32" 1 } } */
! /* { dg-final { scan-assembler-times "vstrw.32" 1 } } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
+ 
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
! 
! /*
! **foo:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vldrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
! **	...
! */
! uint64x2_t
! foo (uint64x2_t *addr, mve_pred16_t p)
  {
!   return vldrdq_gather_base_wb_z_u64 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (uint64x2_t addr, mve_pred16_t p)
  {
!   return vldrdq_gather_base_z_s64 (addr, 8, p);
  }
  
! /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (uint64x2_t addr, mve_pred16_t p)
  {
!   return vldrdq_gather_base_z_s64 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint64x2_t addr, mve_pred16_t p)
  {
!   return vldrdq_gather_base_z_u64 (addr, 8, p);
  }
  
! /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint64x2_t addr, mve_pred16_t p)
  {
!   return vldrdq_gather_base_z_u64 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
! foo (int64_t const * base, uint64x2_t offset)
  {
    return vldrdq_gather_offset_s64 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrd.u64"  }  } */
  
  int64x2_t
! foo1 (int64_t const * base, uint64x2_t offset)
  {
    return vldrdq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrd.u64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrd.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int64x2_t
! foo (int64_t const *base, uint64x2_t offset)
  {
    return vldrdq_gather_offset_s64 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrd.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int64x2_t
! foo1 (int64_t const *base, uint64x2_t offset)
  {
    return vldrdq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
! foo (uint64_t const * base, uint64x2_t offset)
  {
    return vldrdq_gather_offset_u64 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrd.u64"  }  } */
  
  uint64x2_t
! foo1 (uint64_t const * base, uint64x2_t offset)
  {
    return vldrdq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrd.u64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrd.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
! foo (uint64_t const *base, uint64x2_t offset)
  {
    return vldrdq_gather_offset_u64 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrd.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
! foo1 (uint64_t const *base, uint64x2_t offset)
  {
    return vldrdq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
! foo (int64_t const * base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_offset_z_s64 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
  
  int64x2_t
! foo1 (int64_t const * base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int64x2_t
! foo (int64_t const *base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_offset_z_s64 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int64x2_t
! foo1 (int64_t const *base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
! foo (uint64_t const * base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_offset_z_u64 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
  
  uint64x2_t
! foo1 (uint64_t const * base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
! foo (uint64_t const *base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_offset_z_u64 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
! foo1 (uint64_t const *base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
! foo (int64_t const * base, uint64x2_t offset)
  {
    return vldrdq_gather_shifted_offset_s64 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrd.u64"  }  } */
  
  int64x2_t
! foo1 (int64_t const * base, uint64x2_t offset)
  {
    return vldrdq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrd.u64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrd.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  int64x2_t
! foo (int64_t const *base, uint64x2_t offset)
  {
    return vldrdq_gather_shifted_offset_s64 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrd.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  int64x2_t
! foo1 (int64_t const *base, uint64x2_t offset)
  {
    return vldrdq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
! foo (uint64_t const * base, uint64x2_t offset)
  {
    return vldrdq_gather_shifted_offset_u64 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrd.u64"  }  } */
  
  uint64x2_t
! foo1 (uint64_t const * base, uint64x2_t offset)
  {
    return vldrdq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrd.u64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrd.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
! foo (uint64_t const *base, uint64x2_t offset)
  {
    return vldrdq_gather_shifted_offset_u64 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrd.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
! foo1 (uint64_t const *base, uint64x2_t offset)
  {
    return vldrdq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
! foo (int64_t const * base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_shifted_offset_z_s64 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
  
  int64x2_t
! foo1 (int64_t const * base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  int64x2_t
! foo (int64_t const *base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_shifted_offset_z_s64 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  int64x2_t
! foo1 (int64_t const *base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
! foo (uint64_t const * base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_shifted_offset_z_u64 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
  
  uint64x2_t
! foo1 (uint64_t const * base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
! foo (uint64_t const *base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_shifted_offset_z_u64 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
! foo1 (uint64_t const *base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16_t const * base)
  {
    return vldrhq_f16 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrh.16" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16_t const *base)
  {
    return vldrhq_f16 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_offset_f16 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.f16"  }  } */
  
  float16x8_t
! foo1 (float16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.f16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_offset_f16 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.f16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_offset_s16 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.u16"  }  } */
  
  int16x8_t
! foo1 (int16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_offset_s16 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int16_t const * base, uint32x4_t offset)
  {
    return vldrhq_gather_offset_s32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.s32"  }  } */
  
  int32x4_t
! foo1 (int16_t const * base, uint32x4_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int16_t const *base, uint32x4_t offset)
  {
    return vldrhq_gather_offset_s32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int16_t const *base, uint32x4_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_offset_u16 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.u16"  }  } */
  
  uint16x8_t
! foo1 (uint16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_offset_u16 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint16_t const * base, uint32x4_t offset)
  {
    return vldrhq_gather_offset_u32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.u32"  }  } */
  
  uint32x4_t
! foo1 (uint16_t const * base, uint32x4_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint16_t const *base, uint32x4_t offset)
  {
    return vldrhq_gather_offset_u32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint16_t const *base, uint32x4_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_f16 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.f16"  }  } */
  
  float16x8_t
! foo1 (float16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.f16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_f16 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.f16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_s16 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.u16"  }  } */
  
  int16x8_t
! foo1 (int16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_s16 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int16_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_s32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.s32"  }  } */
  
  int32x4_t
! foo1 (int16_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int16_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_s32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int16_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_u16 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.u16"  }  } */
  
  uint16x8_t
! foo1 (uint16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_u16 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint16_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_u32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.u32"  }  } */
  
  uint32x4_t
! foo1 (uint16_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint16_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_u32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint16_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset_f16 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.f16"  }  } */
  
  float16x8_t
! foo1 (float16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.f16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset_f16 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.f16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset_s16 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.u16"  }  } */
  
  int16x8_t
! foo1 (int16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset_s16 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int16_t const * base, uint32x4_t offset)
  {
    return vldrhq_gather_shifted_offset_s32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.s32"  }  } */
  
  int32x4_t
! foo1 (int16_t const * base, uint32x4_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int16_t const *base, uint32x4_t offset)
  {
    return vldrhq_gather_shifted_offset_s32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int16_t const *base, uint32x4_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset_u16 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.u16"  }  } */
  
  uint16x8_t
! foo1 (uint16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset_u16 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint16_t const * base, uint32x4_t offset)
  {
    return vldrhq_gather_shifted_offset_u32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.u32"  }  } */
  
  uint32x4_t
! foo1 (uint16_t const * base, uint32x4_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint16_t const *base, uint32x4_t offset)
  {
    return vldrhq_gather_shifted_offset_u32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint16_t const *base, uint32x4_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_f16 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.f16"  }  } */
  
  float16x8_t
! foo1 (float16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.f16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_f16 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.f16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_s16 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.u16"  }  } */
  
  int16x8_t
! foo1 (int16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_s16 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int16_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_s32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.s32"  }  } */
  
  int32x4_t
! foo1 (int16_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int16_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_s32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int16_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_u16 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.u16"  }  } */
  
  uint16x8_t
! foo1 (uint16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_u16 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint16_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_u32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.u32"  }  } */
  
  uint32x4_t
! foo1 (uint16_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint16_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_u32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint16_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16_t const * base)
  {
    return vldrhq_s16 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrh.16" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16_t const *base)
  {
    return vldrhq_s16 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int16_t const * base)
  {
    return vldrhq_s32 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrh.s32" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int16_t const *base)
  {
    return vldrhq_s32 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16_t const * base)
  {
    return vldrhq_u16 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrh.16" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16_t const *base)
  {
    return vldrhq_u16 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint16_t const * base)
  {
    return vldrhq_u32 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrh.u32" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint16_t const *base)
  {
    return vldrhq_u32 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16_t const * base, mve_pred16_t p)
  {
    return vldrhq_z_f16 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrht.16" 1 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16_t const *base, mve_pred16_t p)
  {
    return vldrhq_z_f16 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16_t const * base, mve_pred16_t p)
  {
    return vldrhq_z_s16 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrht.16" 1 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16_t const *base, mve_pred16_t p)
  {
    return vldrhq_z_s16 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int16_t const * base, mve_pred16_t p)
  {
    return vldrhq_z_s32 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrht.s32" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int16_t const *base, mve_pred16_t p)
  {
    return vldrhq_z_s32 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16_t const * base, mve_pred16_t p)
  {
    return vldrhq_z_u16 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrht.16" 1 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16_t const *base, mve_pred16_t p)
  {
    return vldrhq_z_u16 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint16_t const * base, mve_pred16_t p)
  {
    return vldrhq_z_u32 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrht.u32" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint16_t const *base, mve_pred16_t p)
  {
    return vldrhq_z_u32 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32_t const * base)
  {
    return vldrwq_f32 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrw.32" 1 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32_t const *base)
  {
    return vldrwq_f32 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (uint32x4_t addr)
  {
!   return vldrwq_gather_base_f32 (addr, 4);
  }
  
! /* { dg-final { scan-assembler "vldrw.u32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (uint32x4_t addr)
  {
!   return vldrwq_gather_base_f32 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (uint32x4_t addr)
  {
!   return vldrwq_gather_base_s32 (addr, 4);
  }
  
! /* { dg-final { scan-assembler "vldrw.u32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (uint32x4_t addr)
  {
!   return vldrwq_gather_base_s32 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t addr)
  {
!   return vldrwq_gather_base_u32 (addr, 4);
  }
  
! /* { dg-final { scan-assembler "vldrw.u32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t addr)
  {
!   return vldrwq_gather_base_u32 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,16 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (uint32x4_t * addr)
  {
!   return vldrwq_gather_base_wb_f32 (addr, 8);
  }
  
! /* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
! /* { dg-final { scan-assembler "vldrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (uint32x4_t *addr)
  {
!   return vldrwq_gather_base_wb_f32 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,16 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (uint32x4_t * addr)
  {
!   return vldrwq_gather_base_wb_s32 (addr, 8);
  }
  
! /* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
! /* { dg-final { scan-assembler "vldrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (uint32x4_t *addr)
  {
!   return vldrwq_gather_base_wb_s32 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,16 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t * addr)
  {
!   return vldrwq_gather_base_wb_u32 (addr, 8);
  }
  
! /* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
! /* { dg-final { scan-assembler "vldrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t *addr)
  {
!   return vldrwq_gather_base_wb_u32 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,18 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (uint32x4_t * addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_wb_z_f32 (addr, 8, p);
  }
  
! /* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
! /* { dg-final { scan-assembler "vmsr\t P0, r\[0-9\]+.*" } } */
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vldrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (uint32x4_t *addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_wb_z_f32 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,18 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (uint32x4_t * addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_wb_z_s32 (addr, 8, p);
  }
  
! /* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
! /* { dg-final { scan-assembler "vmsr\t P0, r\[0-9\]+.*" } } */
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vldrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (uint32x4_t *addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_wb_z_s32 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,18 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t * addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_wb_z_u32 (addr, 8, p);
  }
  
! /* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
! /* { dg-final { scan-assembler "vmsr\t P0, r\[0-9\]+.*" } } */
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vldrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t *addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_wb_z_u32 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (uint32x4_t addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_z_f32 (addr, 4, p);
  }
  
! /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (uint32x4_t addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_z_f32 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (uint32x4_t addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_z_s32 (addr, 4, p);
  }
  
! /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (uint32x4_t addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_z_s32 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_z_u32 (addr, 4, p);
  }
  
! /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_z_u32 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_offset_f32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrw.u32"  }  } */
  
  float32x4_t
! foo1 (float32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrw.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_offset_f32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_offset_s32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrw.u32"  }  } */
  
  int32x4_t
! foo1 (int32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrw.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_offset_s32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_offset_u32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrw.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrw.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_offset_u32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z_f32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
  
  float32x4_t
! foo1 (float32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z_f32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z_s32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
  
  int32x4_t
! foo1 (int32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z_s32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z_u32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z_u32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset_f32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrw.u32"  }  } */
  
  float32x4_t
! foo1 (float32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrw.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset_f32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset_s32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrw.u32"  }  } */
  
  int32x4_t
! foo1 (int32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrw.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset_s32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset_u32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrw.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrw.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset_u32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z_f32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
  
  float32x4_t
! foo1 (float32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z_f32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z_s32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
  
  int32x4_t
! foo1 (int32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z_s32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z_u32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z_u32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32_t const * base)
  {
    return vldrwq_s32 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrw.32" 1 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32_t const *base)
  {
    return vldrwq_s32 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t const * base)
  {
    return vldrwq_u32 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrw.32" 1 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t const *base)
  {
    return vldrwq_u32 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32_t const * base, mve_pred16_t p)
  {
    return vldrwq_z_f32 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrwt.32" 1 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32_t const *base, mve_pred16_t p)
  {
    return vldrwq_z_f32 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32_t const * base, mve_pred16_t p)
  {
    return vldrwq_z_s32 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrwt.32" 1 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32_t const *base, mve_pred16_t p)
  {
    return vldrwq_z_s32 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t const * base, mve_pred16_t p)
  {
    return vldrwq_z_u32 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrwt.32" 1 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t const *base, mve_pred16_t p)
  {
    return vldrwq_z_u32 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxaq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxat.s16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxat.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxaq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxat.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxaq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxat.s32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxat.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxaq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxat.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxaq_m_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxat.s8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxat.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxaq_m_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxat.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vmaxaq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmaxa.s16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vmaxaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmaxa.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxa.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vmaxaq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxa.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vmaxaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vmaxaq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmaxa.s32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vmaxaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmaxa.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxa.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vmaxaq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxa.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vmaxaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vmaxaq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmaxa.s8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vmaxaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmaxa.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxa.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vmaxaq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxa.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vmaxaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo (uint16_t a, int16x8_t b, mve_pred16_t p)
  {
*************** foo (uint16_t a, int16x8_t b, mve_pred16
*** 11,28 ****
  }
  
  
  uint16_t
  foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxavq_p (a, b, p);
  }
  
! 
! int16_t
! foo2 (uint8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vmaxavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxavt.s16" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint16_t
! foo2 (int16x8_t b, mve_pred16_t p)
  {
!   return vmaxavq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int32x4_t b, mve_pred16_t p)
  {
*************** foo (uint32_t a, int32x4_t b, mve_pred16
*** 11,28 ****
  }
  
  
  uint32_t
  foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxavq_p (a, b, p);
  }
  
! 
! int32_t
! foo2 (uint16_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vmaxavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxavt.s32" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int32x4_t b, mve_pred16_t p)
  {
!   return vmaxavq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo (uint8_t a, int8x16_t b, mve_pred16_t p)
  {
*************** foo (uint8_t a, int8x16_t b, mve_pred16_
*** 11,28 ****
  }
  
  
  uint8_t
  foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxavq_p (a, b, p);
  }
  
! 
! int8_t
! foo2 (uint32_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vmaxavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxavt.s8" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint8_t
! foo2 (int8x16_t b, mve_pred16_t p)
  {
!   return vmaxavq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxav.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo (uint16_t a, int16x8_t b)
  {
*************** foo (uint16_t a, int16x8_t b)
*** 11,28 ****
  }
  
  
  uint16_t
  foo1 (uint16_t a, int16x8_t b)
  {
    return vmaxavq (a, b);
  }
  
! 
! int16_t
! foo2 (uint8_t a, int16x8_t b)
  {
!   return vmaxavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxav.s16" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxav.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo1 (uint16_t a, int16x8_t b)
  {
    return vmaxavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxav.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint16_t
! foo2 (int16x8_t b)
  {
!   return vmaxavq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxav.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int32x4_t b)
  {
*************** foo (uint32_t a, int32x4_t b)
*** 11,28 ****
  }
  
  
  uint32_t
  foo1 (uint32_t a, int32x4_t b)
  {
    return vmaxavq (a, b);
  }
  
! 
! int32_t
! foo2 (uint16_t a, int32x4_t b)
  {
!   return vmaxavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxav.s32" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxav.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int32x4_t b)
  {
    return vmaxavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxav.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int32x4_t b)
  {
!   return vmaxavq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxav.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo (uint8_t a, int8x16_t b)
  {
*************** foo (uint8_t a, int8x16_t b)
*** 11,28 ****
  }
  
  
  uint8_t
  foo1 (uint8_t a, int8x16_t b)
  {
    return vmaxavq (a, b);
  }
  
! 
! int8_t
! foo2 (uint32_t a, int8x16_t b)
  {
!   return vmaxavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxav.s8" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxav.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo1 (uint8_t a, int8x16_t b)
  {
    return vmaxavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxav.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint8_t
! foo2 (int8x16_t b)
  {
!   return vmaxavq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vmaxnmaq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmaxnma.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vmaxnmaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmaxnma.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxnma.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vmaxnmaq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxnma.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vmaxnmaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vmaxnmaq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmaxnma.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vmaxnmaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmaxnma.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxnma.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vmaxnmaq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxnma.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vmaxnmaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmaq_m_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxnmat.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmat.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmaq_m_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmat.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmaq_m_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxnmat.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmat.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmaq_m_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmat.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16_t
- foo1 (float16_t a, float16x8_t b)
- {
-   return vmaxnmavq (a, b);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxnmav.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo (float16_t a, float16x8_t b)
  {
*************** foo (float16_t a, float16x8_t b)
*** 11,28 ****
  }
  
  
  float16_t
  foo1 (float16_t a, float16x8_t b)
  {
    return vmaxnmavq (a, b);
  }
  
! 
  float16_t
! foo2 (float32_t a, float16x8_t b)
  {
!   return vmaxnmavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxnmav.f16" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxnmav.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo1 (float16_t a, float16x8_t b)
  {
    return vmaxnmavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxnmav.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float16_t
! foo2 (float16x8_t b)
  {
!   return vmaxnmavq (1.1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32_t
- foo1 (float32_t a, float32x4_t b)
- {
-   return vmaxnmavq (a, b);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxnmav.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo (float32_t a, float32x4_t b)
  {
*************** foo (float32_t a, float32x4_t b)
*** 11,28 ****
  }
  
  
  float32_t
  foo1 (float32_t a, float32x4_t b)
  {
    return vmaxnmavq (a, b);
  }
  
! 
  float32_t
! foo2 (float16_t a, float32x4_t b)
  {
!   return vmaxnmavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxnmav.f32" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxnmav.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo1 (float32_t a, float32x4_t b)
  {
    return vmaxnmavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxnmav.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float32_t
! foo2 (float32x4_t b)
  {
!   return vmaxnmavq (1.1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16_t
- foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
- {
-   return vmaxnmavq_p (a, b, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmavt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo (float16_t a, float16x8_t b, mve_pred16_t p)
  {
*************** foo (float16_t a, float16x8_t b, mve_pre
*** 11,28 ****
  }
  
  
  float16_t
  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmavq_p (a, b, p);
  }
  
! 
  float16_t
! foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
  {
!   return vmaxnmavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxnmavt.f16" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmavt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxnmavt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float16_t
! foo2 (float16x8_t b, mve_pred16_t p)
  {
!   return vmaxnmavq_p (1.1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32_t
- foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
- {
-   return vmaxnmavq_p (a, b, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmavt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo (float32_t a, float32x4_t b, mve_pred16_t p)
  {
*************** foo (float32_t a, float32x4_t b, mve_pre
*** 11,28 ****
  }
  
  
  float32_t
  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmavq_p (a, b, p);
  }
  
! 
  float32_t
! foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
  {
!   return vmaxnmavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxnmavt.f32" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmavt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxnmavt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float32_t
! foo2 (float32x4_t b, mve_pred16_t p)
  {
!   return vmaxnmavq_p (1.1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vmaxnmq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmaxnm.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vmaxnmq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmaxnm.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxnm.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vmaxnmq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxnm.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vmaxnmq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vmaxnmq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmaxnm.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vmaxnmq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmaxnm.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxnm.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vmaxnmq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxnm.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vmaxnmq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxnmt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmaxnmt.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxnmt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmaxnmt.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxnmt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxnmt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16_t
- foo1 (float16_t a, float16x8_t b)
- {
-   return vmaxnmvq (23.35, b);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxnmv.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo (float16_t a, float16x8_t b)
  {
*************** foo (float16_t a, float16x8_t b)
*** 11,28 ****
  }
  
  
  float16_t
  foo1 (float16_t a, float16x8_t b)
  {
    return vmaxnmvq (a, b);
  }
  
! 
  float16_t
! foo2 (float32_t a, float16x8_t b)
  {
!   return vmaxnmvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxnmv.f16" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxnmv.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo1 (float16_t a, float16x8_t b)
  {
    return vmaxnmvq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxnmv.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float16_t
! foo2 (float16x8_t b)
  {
!   return vmaxnmvq (1.1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32_t
- foo1 (float32_t a, float32x4_t b)
- {
-   return vmaxnmvq (34.56, b);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxnmv.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo (float32_t a, float32x4_t b)
  {
*************** foo (float32_t a, float32x4_t b)
*** 11,28 ****
  }
  
  
  float32_t
  foo1 (float32_t a, float32x4_t b)
  {
    return vmaxnmvq (a, b);
  }
  
! 
  float32_t
! foo2 (float16_t a, float32x4_t b)
  {
!   return vmaxnmvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxnmv.f32" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxnmv.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo1 (float32_t a, float32x4_t b)
  {
    return vmaxnmvq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxnmv.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float32_t
! foo2 (float32x4_t b)
  {
!   return vmaxnmvq (1.1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16_t
- foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
- {
-   return vmaxnmvq_p (a, b, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmvt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo (float16_t a, float16x8_t b, mve_pred16_t p)
  {
*************** foo (float16_t a, float16x8_t b, mve_pre
*** 11,28 ****
  }
  
  
  float16_t
  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmvq_p (a, b, p);
  }
  
! 
  float16_t
! foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
  {
!   return vmaxnmvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxnmvt.f16" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmvt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxnmvt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float16_t
! foo2 (float16x8_t b, mve_pred16_t p)
  {
!   return vmaxnmvq_p (1.1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32_t
- foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
- {
-   return vmaxnmvq_p (a, b, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmvt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo (float32_t a, float32x4_t b, mve_pred16_t p)
  {
*************** foo (float32_t a, float32x4_t b, mve_pre
*** 11,28 ****
  }
  
  
  float32_t
  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmvq_p (a, b, p);
  }
  
! 
  float32_t
! foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
  {
!   return vmaxnmvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxnmvt.f32" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmvt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxnmvt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float32_t
! foo2 (float32x4_t b, mve_pred16_t p)
  {
!   return vmaxnmvq_p (1.1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmaxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmaxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmaxt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmaxt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmaxt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmaxt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmaxq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmax.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmaxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmax.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmax.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmaxq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmax.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmaxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmaxq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmax.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmaxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmax.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmax.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmaxq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmax.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmaxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmaxq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmax.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmaxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmax.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmax.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmaxq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmax.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmaxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmaxq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmax.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmaxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmax.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmax.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmaxq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmax.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmaxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmaxq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmax.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmaxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmax.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmax.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmaxq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmax.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmaxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmaxq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmax.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmaxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmax.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmax.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmaxq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmax.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmaxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16_t
  foo (int16_t a, int16x8_t b, mve_pred16_t p)
  {
*************** foo (int16_t a, int16x8_t b, mve_pred16_
*** 11,28 ****
  }
  
  
  int16_t
  foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! 
! int16_t
! foo2 (int8_t a, int16x8_t b, mve_pred16_t p)
! {
!   return vmaxvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxvt.s16" 3 } } */
--- 26,49 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16_t
  foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b, mve_pred16_t p)
  {
*************** foo (int32_t a, int32x4_t b, mve_pred16_
*** 11,28 ****
  }
  
  
  int32_t
  foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! 
! int32_t
! foo2 (int16_t a, int32x4_t b, mve_pred16_t p)
! {
!   return vmaxvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxvt.s32" 3 } } */
--- 26,49 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8_t
  foo (int8_t a, int8x16_t b, mve_pred16_t p)
  {
*************** foo (int8_t a, int8x16_t b, mve_pred16_t
*** 11,28 ****
  }
  
  
  int8_t
  foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! 
! int8_t
! foo2 (int32_t a, int8x16_t b, mve_pred16_t p)
! {
!   return vmaxvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxvt.s8" 3 } } */
--- 26,49 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8_t
  foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo (uint16_t a, uint16x8_t b, mve_pred16_t p)
  {
*************** foo (uint16_t a, uint16x8_t b, mve_pred1
*** 11,28 ****
  }
  
  
  uint16_t
  foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! 
  uint16_t
! foo2 (uint32_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vmaxvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxvt.u16" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxvt.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  uint16_t
! foo2 (uint16x8_t b, mve_pred16_t p)
  {
!   return vmaxvq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
*************** foo (uint32_t a, uint32x4_t b, mve_pred1
*** 11,28 ****
  }
  
  
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! 
  uint32_t
! foo2 (uint8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vmaxvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxvt.u32" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxvt.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  uint32_t
! foo2 (uint32x4_t b, mve_pred16_t p)
  {
!   return vmaxvq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo (uint8_t a, uint8x16_t b, mve_pred16_t p)
  {
*************** foo (uint8_t a, uint8x16_t b, mve_pred16
*** 11,28 ****
  }
  
  
  uint8_t
  foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! 
  uint8_t
! foo2 (uint16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vmaxvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxvt.u8" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxvt.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  uint8_t
! foo2 (uint8x16_t b, mve_pred16_t p)
  {
!   return vmaxvq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxv.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16_t
  foo (int16_t a, int16x8_t b)
  {
*************** foo (int16_t a, int16x8_t b)
*** 11,28 ****
  }
  
  
  int16_t
  foo1 (int16_t a, int16x8_t b)
  {
    return vmaxvq (a, b);
  }
  
! 
! int16_t
! foo2 (int8_t a, int16x8_t b)
! {
!   return vmaxvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxv.s16" 3 } } */
--- 22,41 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxv.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16_t
  foo1 (int16_t a, int16x8_t b)
  {
    return vmaxvq (a, b);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxv.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b)
  {
*************** foo (int32_t a, int32x4_t b)
*** 11,28 ****
  }
  
  
  int32_t
  foo1 (int32_t a, int32x4_t b)
  {
    return vmaxvq (a, b);
  }
  
! 
! int32_t
! foo2 (int16_t a, int32x4_t b)
! {
!   return vmaxvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxv.s32" 3 } } */
--- 22,41 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxv.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b)
  {
    return vmaxvq (a, b);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxv.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8_t
  foo (int8_t a, int8x16_t b)
  {
*************** foo (int8_t a, int8x16_t b)
*** 11,28 ****
  }
  
  
  int8_t
  foo1 (int8_t a, int8x16_t b)
  {
    return vmaxvq (a, b);
  }
  
! 
! int8_t
! foo2 (int32_t a, int8x16_t b)
! {
!   return vmaxvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxv.s8" 3 } } */
--- 22,41 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxv.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8_t
  foo1 (int8_t a, int8x16_t b)
  {
    return vmaxvq (a, b);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxv.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo (uint16_t a, uint16x8_t b)
  {
*************** foo (uint16_t a, uint16x8_t b)
*** 11,28 ****
  }
  
  
  uint16_t
  foo1 (uint16_t a, uint16x8_t b)
  {
    return vmaxvq (a, b);
  }
  
! 
  uint16_t
! foo2 (uint32_t a, uint16x8_t b)
  {
!   return vmaxvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxv.u16" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxv.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo1 (uint16_t a, uint16x8_t b)
  {
    return vmaxvq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxv.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  uint16_t
! foo2 (uint16x8_t b)
  {
!   return vmaxvq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxv.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint32x4_t b)
  {
*************** foo (uint32_t a, uint32x4_t b)
*** 11,28 ****
  }
  
  
  uint32_t
  foo1 (uint32_t a, uint32x4_t b)
  {
    return vmaxvq (a, b);
  }
  
! 
  uint32_t
! foo2 (uint8_t a, uint32x4_t b)
  {
!   return vmaxvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxv.u32" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxv.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint32x4_t b)
  {
    return vmaxvq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxv.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  uint32_t
! foo2 (uint32x4_t b)
  {
!   return vmaxvq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxv.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo (uint8_t a, uint8x16_t b)
  {
*************** foo (uint8_t a, uint8x16_t b)
*** 11,28 ****
  }
  
  
  uint8_t
  foo1 (uint8_t a, uint8x16_t b)
  {
    return vmaxvq (a, b);
  }
  
! 
  uint8_t
! foo2 (uint16_t a, uint8x16_t b)
  {
!   return vmaxvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxv.u8" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxv.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo1 (uint8_t a, uint8x16_t b)
  {
    return vmaxvq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxv.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  uint8_t
! foo2 (uint8x16_t b)
  {
!   return vmaxvq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminaq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vminat.s16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminat.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminaq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminat.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminaq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vminat.s32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminat.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminaq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminat.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminaq_m_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vminat.s8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminat.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminaq_m_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminat.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vminaq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmina.s16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vminaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmina.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmina.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vminaq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmina.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vminaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vminaq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmina.s32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vminaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmina.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmina.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vminaq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmina.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vminaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vminaq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmina.s8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vminaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmina.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmina.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vminaq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmina.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vminaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo (uint16_t a, int16x8_t b, mve_pred16_t p)
  {
*************** foo (uint16_t a, int16x8_t b, mve_pred16
*** 11,28 ****
  }
  
  
  uint16_t
  foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminavq_p (a, b, p);
  }
  
! 
! int16_t
! foo2 (uint8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vminavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminavt.s16" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint16_t
! foo2 (int16x8_t b, mve_pred16_t p)
  {
!   return vminavq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int32x4_t b, mve_pred16_t p)
  {
*************** foo (uint32_t a, int32x4_t b, mve_pred16
*** 11,28 ****
  }
  
  
  uint32_t
  foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminavq_p (a, b, p);
  }
  
! 
! int32_t
! foo2 (uint16_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vminavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminavt.s32" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int32x4_t b, mve_pred16_t p)
  {
!   return vminavq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo (uint8_t a, int8x16_t b, mve_pred16_t p)
  {
*************** foo (uint8_t a, int8x16_t b, mve_pred16_
*** 11,28 ****
  }
  
  
  uint8_t
  foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminavq_p (a, b, p);
  }
  
! 
! int8_t
! foo2 (uint32_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vminavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminavt.s8" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint8_t
! foo2 (int8x16_t b, mve_pred16_t p)
  {
!   return vminavq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminav.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo (uint16_t a, int16x8_t b)
  {
*************** foo (uint16_t a, int16x8_t b)
*** 11,28 ****
  }
  
  
  uint16_t
  foo1 (uint16_t a, int16x8_t b)
  {
    return vminavq (a, b);
  }
  
! 
! int16_t
! foo2 (uint8_t a, int16x8_t b)
  {
!   return vminavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminav.s16" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminav.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo1 (uint16_t a, int16x8_t b)
  {
    return vminavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vminav.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint16_t
! foo2 (int16x8_t b)
  {
!   return vminavq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminav.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int32x4_t b)
  {
*************** foo (uint32_t a, int32x4_t b)
*** 11,28 ****
  }
  
  
  uint32_t
  foo1 (uint32_t a, int32x4_t b)
  {
    return vminavq (a, b);
  }
  
! 
! int32_t
! foo2 (uint16_t a, int32x4_t b)
  {
!   return vminavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminav.s32" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminav.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int32x4_t b)
  {
    return vminavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vminav.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int32x4_t b)
  {
!   return vminavq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminav.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo (uint8_t a, int8x16_t b)
  {
*************** foo (uint8_t a, int8x16_t b)
*** 11,28 ****
  }
  
  
  uint8_t
  foo1 (uint8_t a, int8x16_t b)
  {
    return vminavq (a, b);
  }
  
! 
! int8_t
! foo2 (uint32_t a, int8x16_t b)
  {
!   return vminavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminav.s8" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminav.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo1 (uint8_t a, int8x16_t b)
  {
    return vminavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vminav.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint8_t
! foo2 (int8x16_t b)
  {
!   return vminavq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vminnmaq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vminnma.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vminnmaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vminnma.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminnma.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vminnmaq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminnma.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vminnmaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vminnmaq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vminnma.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vminnmaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vminnma.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminnma.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vminnmaq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminnma.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vminnmaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmaq_m_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vminnmat.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmat.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmaq_m_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmat.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmaq_m_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vminnmat.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmat.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmaq_m_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmat.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16_t
- foo1 (float16_t a, float16x8_t b)
- {
-   return vminnmavq (a, b);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminnmav.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo (float16_t a, float16x8_t b)
  {
*************** foo (float16_t a, float16x8_t b)
*** 11,28 ****
  }
  
  
  float16_t
  foo1 (float16_t a, float16x8_t b)
  {
    return vminnmavq (a, b);
  }
  
! 
  float16_t
! foo2 (float32_t a, float16x8_t b)
  {
!   return vminnmavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminnmav.f16" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminnmav.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo1 (float16_t a, float16x8_t b)
  {
    return vminnmavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vminnmav.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float16_t
! foo2 (float16x8_t b)
  {
!   return vminnmavq (1.1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32_t
- foo1 (float32_t a, float32x4_t b)
- {
-   return vminnmavq (a, b);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminnmav.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo (float32_t a, float32x4_t b)
  {
*************** foo (float32_t a, float32x4_t b)
*** 11,28 ****
  }
  
  
  float32_t
  foo1 (float32_t a, float32x4_t b)
  {
    return vminnmavq (a, b);
  }
  
! 
  float32_t
! foo2 (float16_t a, float32x4_t b)
  {
!   return vminnmavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminnmav.f32" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminnmav.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo1 (float32_t a, float32x4_t b)
  {
    return vminnmavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vminnmav.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float32_t
! foo2 (float32x4_t b)
  {
!   return vminnmavq (1.1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16_t
- foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
- {
-   return vminnmavq_p (a, b, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmavt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo (float16_t a, float16x8_t b, mve_pred16_t p)
  {
*************** foo (float16_t a, float16x8_t b, mve_pre
*** 11,28 ****
  }
  
  
  float16_t
  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmavq_p (a, b, p);
  }
  
! 
  float16_t
! foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
  {
!   return vminnmavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminnmavt.f16" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmavt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminnmavt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float16_t
! foo2 (float16x8_t b, mve_pred16_t p)
  {
!   return vminnmavq_p (1.1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32_t
- foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
- {
-   return vminnmavq_p (a, b, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmavt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo (float32_t a, float32x4_t b, mve_pred16_t p)
  {
*************** foo (float32_t a, float32x4_t b, mve_pre
*** 11,28 ****
  }
  
  
  float32_t
  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmavq_p (a, b, p);
  }
  
! 
  float32_t
! foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
  {
!   return vminnmavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminnmavt.f32" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmavt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminnmavt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float32_t
! foo2 (float32x4_t b, mve_pred16_t p)
  {
!   return vminnmavq_p (1.1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vminnmq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vminnm.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vminnmq (a, b);
  }
  
! /* { dg-final { scan-assembler "vminnm.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminnm.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vminnmq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminnm.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vminnmq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vminnmq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vminnm.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vminnmq (a, b);
  }
  
! /* { dg-final { scan-assembler "vminnm.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminnm.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vminnmq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminnm.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vminnmq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vminnmt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vminnmt.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vminnmt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vminnmt.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vminnmt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vminnmt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16_t
- foo1 (float16_t a, float16x8_t b)
- {
-   return vminnmvq (a, b);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminnmv.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo (float16_t a, float16x8_t b)
  {
*************** foo (float16_t a, float16x8_t b)
*** 11,28 ****
  }
  
  
  float16_t
  foo1 (float16_t a, float16x8_t b)
  {
    return vminnmvq (a, b);
  }
  
! 
  float16_t
! foo2 (float32_t a, float16x8_t b)
  {
!   return vminnmvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminnmv.f16" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminnmv.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo1 (float16_t a, float16x8_t b)
  {
    return vminnmvq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vminnmv.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float16_t
! foo2 (float16x8_t b)
  {
!   return vminnmvq (1.1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32_t
- foo1 (float32_t a, float32x4_t b)
- {
-   return vminnmvq (a, b);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminnmv.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo (float32_t a, float32x4_t b)
  {
*************** foo (float32_t a, float32x4_t b)
*** 11,28 ****
  }
  
  
  float32_t
  foo1 (float32_t a, float32x4_t b)
  {
    return vminnmvq (a, b);
  }
  
! 
  float32_t
! foo2 (float16_t a, float32x4_t b)
  {
!   return vminnmvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminnmv.f32" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminnmv.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo1 (float32_t a, float32x4_t b)
  {
    return vminnmvq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vminnmv.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float32_t
! foo2 (float32x4_t b)
  {
!   return vminnmvq (1.1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16_t
- foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
- {
-   return vminnmvq_p (a, b, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmvt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo (float16_t a, float16x8_t b, mve_pred16_t p)
  {
*************** foo (float16_t a, float16x8_t b, mve_pre
*** 11,28 ****
  }
  
  
  float16_t
  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmvq_p (a, b, p);
  }
  
! 
  float16_t
! foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
  {
!   return vminnmvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminnmvt.f16" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmvt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminnmvt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float16_t
! foo2 (float16x8_t b, mve_pred16_t p)
  {
!   return vminnmvq_p (1.1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32_t
- foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
- {
-   return vminnmvq_p (a, b, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmvt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo (float32_t a, float32x4_t b, mve_pred16_t p)
  {
*************** foo (float32_t a, float32x4_t b, mve_pre
*** 11,28 ****
  }
  
  
  float32_t
  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmvq_p (a, b, p);
  }
  
! 
  float32_t
! foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
  {
!   return vminnmvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminnmvt.f32" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmvt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminnmvt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float32_t
! foo2 (float32x4_t b, mve_pred16_t p)
  {
!   return vminnmvq_p (1.1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmint.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmint.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmint.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmint.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmint.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmint.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vminq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmin.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vminq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmin.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmin.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vminq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmin.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vminq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vminq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmin.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vminq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmin.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmin.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vminq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmin.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vminq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vminq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmin.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vminq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmin.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmin.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vminq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmin.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vminq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vminq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmin.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vminq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmin.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmin.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vminq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmin.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vminq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vminq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmin.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vminq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmin.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmin.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vminq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmin.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vminq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vminq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmin.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vminq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmin.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmin.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vminq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmin.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vminq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16_t
  foo (int16_t a, int16x8_t b, mve_pred16_t p)
  {
*************** foo (int16_t a, int16x8_t b, mve_pred16_
*** 11,28 ****
  }
  
  
  int16_t
  foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! 
! int16_t
! foo2 (int8_t a, int16x8_t b, mve_pred16_t p)
! {
!   return vminvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminvt.s16" 3 } } */
--- 26,49 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16_t
  foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b, mve_pred16_t p)
  {
*************** foo (int32_t a, int32x4_t b, mve_pred16_
*** 11,28 ****
  }
  
  
  int32_t
  foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! 
! int32_t
! foo2 (int16_t a, int32x4_t b, mve_pred16_t p)
! {
!   return vminvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminvt.s32" 3 } } */
--- 26,49 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8_t
  foo (int8_t a, int8x16_t b, mve_pred16_t p)
  {
*************** foo (int8_t a, int8x16_t b, mve_pred16_t
*** 11,28 ****
  }
  
  
  int8_t
  foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! 
! int8_t
! foo2 (int32_t a, int8x16_t b, mve_pred16_t p)
! {
!   return vminvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminvt.s8" 3 } } */
--- 26,49 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8_t
  foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo (uint16_t a, uint16x8_t b, mve_pred16_t p)
  {
*************** foo (uint16_t a, uint16x8_t b, mve_pred1
*** 11,28 ****
  }
  
  
  uint16_t
  foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! 
  uint16_t
! foo2 (uint32_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vminvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminvt.u16" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminvt.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  uint16_t
! foo2 (uint16x8_t b, mve_pred16_t p)
  {
!   return vminvq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
*************** foo (uint32_t a, uint32x4_t b, mve_pred1
*** 11,28 ****
  }
  
  
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! 
  uint32_t
! foo2 (uint8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vminvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminvt.u32" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminvt.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  uint32_t
! foo2 (uint32x4_t b, mve_pred16_t p)
  {
!   return vminvq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo (uint8_t a, uint8x16_t b, mve_pred16_t p)
  {
*************** foo (uint8_t a, uint8x16_t b, mve_pred16
*** 11,28 ****
  }
  
  
  uint8_t
  foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! 
  uint8_t
! foo2 (uint16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vminvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminvt.u8" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminvt.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  uint8_t
! foo2 (uint8x16_t b, mve_pred16_t p)
  {
!   return vminvq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminv.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16_t
  foo (int16_t a, int16x8_t b)
  {
*************** foo (int16_t a, int16x8_t b)
*** 11,27 ****
  }
  
  
  int16_t
  foo1 (int16_t a, int16x8_t b)
  {
    return vminvq (a, b);
  }
  
! int16_t
! foo2 (int8_t a, int16x8_t b)
! {
!   return vminvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminv.s16" 3 } } */
--- 22,41 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminv.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16_t
  foo1 (int16_t a, int16x8_t b)
  {
    return vminvq (a, b);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminv.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b)
  {
*************** foo (int32_t a, int32x4_t b)
*** 11,27 ****
  }
  
  
  int32_t
  foo1 (int32_t a, int32x4_t b)
  {
    return vminvq (a, b);
  }
  
! int32_t
! foo2 (int8_t a, int32x4_t b)
! {
!   return vminvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminv.s32" 3 } } */
--- 22,41 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminv.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b)
  {
    return vminvq (a, b);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminv.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8_t
  foo (int8_t a, int8x16_t b)
  {
*************** foo (int8_t a, int8x16_t b)
*** 11,27 ****
  }
  
  
  int8_t
  foo1 (int8_t a, int8x16_t b)
  {
    return vminvq (a, b);
  }
  
! int8_t
! foo2 (int32_t a, int8x16_t b)
! {
!   return vminvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminv.s8" 3 } } */
--- 22,41 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminv.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8_t
  foo1 (int8_t a, int8x16_t b)
  {
    return vminvq (a, b);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminv.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo (uint16_t a, uint16x8_t b)
  {
*************** foo (uint16_t a, uint16x8_t b)
*** 11,28 ****
  }
  
  
  uint16_t
  foo1 (uint16_t a, uint16x8_t b)
  {
    return vminvq (a, b);
  }
  
! 
! uint8_t
! foo2 (uint32_t a, uint16x8_t b)
  {
!   return vminvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminv.u16" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminv.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo1 (uint16_t a, uint16x8_t b)
  {
    return vminvq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vminv.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint16_t
! foo2 (uint16x8_t b)
  {
!   return vminvq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminv.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint32x4_t b)
  {
*************** foo (uint32_t a, uint32x4_t b)
*** 11,27 ****
  }
  
  
  uint32_t
  foo1 (uint32_t a, uint32x4_t b)
  {
    return vminvq (a, b);
  }
  
  uint32_t
! foo2 (uint16_t a, uint32x4_t b)
  {
!   return vminvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminv.u32" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminv.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint32x4_t b)
  {
    return vminvq (a, b);
  }
  
+ /*
+ **foo2:
+ **	...
+ **	vminv.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo2 (uint32x4_t b)
  {
!   return vminvq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminv.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo (uint8_t a, uint8x16_t b)
  {
*************** foo (uint8_t a, uint8x16_t b)
*** 11,28 ****
  }
  
  
  uint8_t
  foo1 (uint8_t a, uint8x16_t b)
  {
    return vminvq (a, b);
  }
  
! 
! uint16_t
! foo2 (uint32_t a, uint8x16_t b)
  {
!   return vminvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminv.u8" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminv.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo1 (uint8_t a, uint8x16_t b)
  {
    return vminvq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vminv.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint8_t
! foo2 (uint8x16_t b)
  {
!   return vminvq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
!   return vmladavaq_p_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmladavat.s16"  }  } */
  
  int32_t
! foo1 (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
!   return vmladavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmladavat.s16"  }  } */
! /* { dg-final { scan-assembler "vmladavat.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p_s16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
!   return vmladavaq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmladavat.s32"  }  } */
  
  int32_t
! foo1 (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
!   return vmladavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmladavat.s32"  }  } */
! /* { dg-final { scan-assembler "vmladavat.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p_s32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
!   return vmladavaq_p_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmladavat.s8"  }  } */
  
  int32_t
! foo1 (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
!   return vmladavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmladavat.s8"  }  } */
! /* { dg-final { scan-assembler "vmladavat.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int8x16_t m1, int8x16_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p_s8 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int8x16_t m1, int8x16_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint32_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p)
  {
!   return vmladavaq_p_u16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmladavat.u16"  }  } */
  
  uint32_t
! foo1 (uint32_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p)
  {
!   return vmladavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmladavat.u16"  }  } */
! /* { dg-final { scan-assembler "vmladavat.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32_t add, uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p_u16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo1 (uint32_t add, uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p (add, m1, m2, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmladavat.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
! {
!   return vmladavaq_p (1, m1, m2, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint32_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
!   return vmladavaq_p_u32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmladavat.u32"  }  } */
  
  uint32_t
! foo1 (uint32_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
!   return vmladavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmladavat.u32"  }  } */
! /* { dg-final { scan-assembler "vmladavat.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32_t add, uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p_u32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo1 (uint32_t add, uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p (add, m1, m2, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmladavat.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
! {
!   return vmladavaq_p (1, m1, m2, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint32_t a, uint8x16_t b, uint8x16_t c, mve_pred16_t p)
  {
!   return vmladavaq_p_u8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmladavat.u8"  }  } */
  
  uint32_t
! foo1 (uint32_t a, uint8x16_t b, uint8x16_t c, mve_pred16_t p)
  {
!   return vmladavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmladavat.u8"  }  } */
! /* { dg-final { scan-assembler "vmladavat.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32_t add, uint8x16_t m1, uint8x16_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p_u8 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo1 (uint32_t add, uint8x16_t m1, uint8x16_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p (add, m1, m2, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmladavat.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint8x16_t m1, uint8x16_t m2, mve_pred16_t p)
! {
!   return vmladavaq_p (1, m1, m2, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int16x8_t b, int16x8_t c)
  {
!   return vmladavaq_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmladava.s16"  }  } */
  
  int32_t
! foo1 (int32_t a, int16x8_t b, int16x8_t c)
  {
!   return vmladavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmladava.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladava.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int16x8_t m1, int16x8_t m2)
  {
!   return vmladavaq_s16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladava.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int16x8_t m1, int16x8_t m2)
  {
!   return vmladavaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int32x4_t b, int32x4_t c)
  {
!   return vmladavaq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmladava.s32"  }  } */
  
  int32_t
! foo1 (int32_t a, int32x4_t b, int32x4_t c)
  {
!   return vmladavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmladava.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladava.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int32x4_t m1, int32x4_t m2)
  {
!   return vmladavaq_s32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladava.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int32x4_t m1, int32x4_t m2)
  {
!   return vmladavaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int8x16_t b, int8x16_t c)
  {
!   return vmladavaq_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmladava.s8"  }  } */
  
  int32_t
! foo1 (int32_t a, int8x16_t b, int8x16_t c)
  {
!   return vmladavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmladava.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladava.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int8x16_t m1, int8x16_t m2)
  {
!   return vmladavaq_s8 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladava.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int8x16_t m1, int8x16_t m2)
  {
!   return vmladavaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint32_t a, uint16x8_t b, uint16x8_t c)
  {
!   return vmladavaq_u16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmladava.u16"  }  } */
  
  uint32_t
! foo1 (uint32_t a, uint16x8_t b, uint16x8_t c)
  {
!   return vmladavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmladava.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladava.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32_t add, uint16x8_t m1, uint16x8_t m2)
  {
!   return vmladavaq_u16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladava.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32_t
+ foo1 (uint32_t add, uint16x8_t m1, uint16x8_t m2)
+ {
+   return vmladavaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmladava.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo2 (uint16x8_t m1, uint16x8_t m2)
  {
!   return vmladavaq (1, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint32_t a, uint32x4_t b, uint32x4_t c)
  {
!   return vmladavaq_u32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmladava.u32"  }  } */
  
  uint32_t
! foo1 (uint32_t a, uint32x4_t b, uint32x4_t c)
  {
!   return vmladavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmladava.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladava.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32_t add, uint32x4_t m1, uint32x4_t m2)
  {
!   return vmladavaq_u32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladava.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32_t
+ foo1 (uint32_t add, uint32x4_t m1, uint32x4_t m2)
+ {
+   return vmladavaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmladava.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo2 (uint32x4_t m1, uint32x4_t m2)
  {
!   return vmladavaq (1, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint32_t a, uint8x16_t b, uint8x16_t c)
  {
!   return vmladavaq_u8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmladava.u8"  }  } */
  
  uint32_t
! foo1 (uint32_t a, uint8x16_t b, uint8x16_t c)
  {
!   return vmladavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmladava.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladava.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32_t add, uint8x16_t m1, uint8x16_t m2)
  {
!   return vmladavaq_u8 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladava.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32_t
+ foo1 (uint32_t add, uint8x16_t m1, uint8x16_t m2)
+ {
+   return vmladavaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmladava.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo2 (uint8x16_t m1, uint8x16_t m2)
  {
!   return vmladavaq (1, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
!   return vmladavaxq_p_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmladavaxt.s16"  }  } */
  
  int32_t
! foo1 (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
!   return vmladavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmladavaxt.s16"  }  } */
! /* { dg-final { scan-assembler "vmladavaxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavaxt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmladavaxq_p_s16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavaxt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmladavaxq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
!   return vmladavaxq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmladavaxt.s32"  }  } */
  
  int32_t
! foo1 (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
!   return vmladavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmladavaxt.s32"  }  } */
! /* { dg-final { scan-assembler "vmladavaxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavaxt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmladavaxq_p_s32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavaxt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmladavaxq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
!   return vmladavaxq_p_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmladavaxt.s8"  }  } */
  
  int32_t
! foo1 (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
!   return vmladavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmladavaxt.s8"  }  } */
! /* { dg-final { scan-assembler "vmladavaxt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavaxt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int8x16_t m1, int8x16_t m2, mve_pred16_t p)
  {
!   return vmladavaxq_p_s8 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavaxt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int8x16_t m1, int8x16_t m2, mve_pred16_t p)
  {
!   return vmladavaxq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int16x8_t b, int16x8_t c)
  {
!   return vmladavaxq_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmladavax.s16"  }  } */
  
  int32_t
! foo1 (int32_t a, int16x8_t b, int16x8_t c)
  {
!   return vmladavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmladavax.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladavax.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int16x8_t m1, int16x8_t m2)
  {
!   return vmladavaxq_s16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladavax.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int16x8_t m1, int16x8_t m2)
  {
!   return vmladavaxq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int32x4_t b, int32x4_t c)
  {
!   return vmladavaxq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmladavax.s32"  }  } */
  
  int32_t
! foo1 (int32_t a, int32x4_t b, int32x4_t c)
  {
!   return vmladavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmladavax.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladavax.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int32x4_t m1, int32x4_t m2)
  {
!   return vmladavaxq_s32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladavax.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int32x4_t m1, int32x4_t m2)
  {
!   return vmladavaxq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int8x16_t b, int8x16_t c)
  {
!   return vmladavaxq_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmladavax.s8"  }  } */
  
  int32_t
! foo1 (int32_t a, int8x16_t b, int8x16_t c)
  {
!   return vmladavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmladavax.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladavax.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int8x16_t m1, int8x16_t m2)
  {
!   return vmladavaxq_s8 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladavax.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int8x16_t m1, int8x16_t m2)
  {
!   return vmladavaxq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vmladavq_p_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmladavt.s16"  }  } */
  
  int32_t
! foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vmladavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmladavt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmladavq_p_s16 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmladavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vmladavq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmladavt.s32"  }  } */
  
  int32_t
! foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vmladavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmladavt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmladavq_p_s32 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmladavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vmladavq_p_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmladavt.s8"  }  } */
  
  int32_t
! foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vmladavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmladavt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int8x16_t m1, int8x16_t m2, mve_pred16_t p)
  {
!   return vmladavq_p_s8 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int8x16_t m1, int8x16_t m2, mve_pred16_t p)
  {
!   return vmladavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vmladavq_p_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmladavt.u16"  }  } */
  
  uint32_t
! foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vmladavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmladavt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
  {
!   return vmladavq_p_u16 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo1 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
  {
!   return vmladavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vmladavq_p_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmladavt.u32"  }  } */
  
  uint32_t
! foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vmladavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmladavt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
  {
!   return vmladavq_p_u32 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo1 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
  {
!   return vmladavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vmladavq_p_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmladavt.u8"  }  } */
  
  uint32_t
! foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vmladavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmladavt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint8x16_t m1, uint8x16_t m2, mve_pred16_t p)
  {
!   return vmladavq_p_u8 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo1 (uint8x16_t m1, uint8x16_t m2, mve_pred16_t p)
  {
!   return vmladavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int16x8_t a, int16x8_t b)
  {
!   return vmladavq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmladav.s16"  }  } */
  
  int32_t
! foo1 (int16x8_t a, int16x8_t b)
  {
!   return vmladavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmladav.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladav.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int16x8_t m1, int16x8_t m2)
  {
!   return vmladavq_s16 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladav.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int16x8_t m1, int16x8_t m2)
  {
!   return vmladavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32x4_t a, int32x4_t b)
  {
!   return vmladavq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmladav.s32"  }  } */
  
  int32_t
! foo1 (int32x4_t a, int32x4_t b)
  {
!   return vmladavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmladav.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladav.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32x4_t m1, int32x4_t m2)
  {
!   return vmladavq_s32 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladav.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32x4_t m1, int32x4_t m2)
  {
!   return vmladavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int8x16_t a, int8x16_t b)
  {
!   return vmladavq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmladav.s8"  }  } */
  
  int32_t
! foo1 (int8x16_t a, int8x16_t b)
  {
!   return vmladavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmladav.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladav.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int8x16_t m1, int8x16_t m2)
  {
!   return vmladavq_s8 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladav.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int8x16_t m1, int8x16_t m2)
  {
!   return vmladavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint16x8_t a, uint16x8_t b)
  {
!   return vmladavq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmladav.u16"  }  } */
  
  uint32_t
! foo1 (uint16x8_t a, uint16x8_t b)
  {
!   return vmladavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmladav.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladav.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint16x8_t m1, uint16x8_t m2)
  {
!   return vmladavq_u16 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladav.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo1 (uint16x8_t m1, uint16x8_t m2)
  {
!   return vmladavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint32x4_t a, uint32x4_t b)
  {
!   return vmladavq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmladav.u32"  }  } */
  
  uint32_t
! foo1 (uint32x4_t a, uint32x4_t b)
  {
!   return vmladavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmladav.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladav.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32x4_t m1, uint32x4_t m2)
  {
!   return vmladavq_u32 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladav.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo1 (uint32x4_t m1, uint32x4_t m2)
  {
!   return vmladavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint8x16_t a, uint8x16_t b)
  {
!   return vmladavq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmladav.u8"  }  } */
  
  uint32_t
! foo1 (uint8x16_t a, uint8x16_t b)
  {
!   return vmladavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmladav.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladav.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint8x16_t m1, uint8x16_t m2)
  {
!   return vmladavq_u8 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladav.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo1 (uint8x16_t m1, uint8x16_t m2)
  {
!   return vmladavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vmladavxq_p_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmladavxt.s16"  }  } */
  
  int32_t
! foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vmladavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmladavxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavxt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmladavxq_p_s16 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavxt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmladavxq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vmladavxq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmladavxt.s32"  }  } */
  
  int32_t
! foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vmladavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmladavxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavxt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmladavxq_p_s32 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavxt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmladavxq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vmladavxq_p_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmladavxt.s8"  }  } */
  
  int32_t
! foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vmladavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmladavxt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavxt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int8x16_t m1, int8x16_t m2, mve_pred16_t p)
  {
!   return vmladavxq_p_s8 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavxt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int8x16_t m1, int8x16_t m2, mve_pred16_t p)
  {
!   return vmladavxq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int16x8_t a, int16x8_t b)
  {
!   return vmladavxq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmladavx.s16"  }  } */
  
  int32_t
! foo1 (int16x8_t a, int16x8_t b)
  {
!   return vmladavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmladavx.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladavx.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int16x8_t m1, int16x8_t m2)
  {
!   return vmladavxq_s16 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladavx.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int16x8_t m1, int16x8_t m2)
  {
!   return vmladavxq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32x4_t a, int32x4_t b)
  {
!   return vmladavxq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmladavx.s32"  }  } */
  
  int32_t
! foo1 (int32x4_t a, int32x4_t b)
  {
!   return vmladavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmladavx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladavx.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32x4_t m1, int32x4_t m2)
  {
!   return vmladavxq_s32 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladavx.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32x4_t m1, int32x4_t m2)
  {
!   return vmladavxq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int8x16_t a, int8x16_t b)
  {
!   return vmladavxq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmladavx.s8"  }  } */
  
  int32_t
! foo1 (int8x16_t a, int8x16_t b)
  {
!   return vmladavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmladavx.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladavx.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int8x16_t m1, int8x16_t m2)
  {
!   return vmladavxq_s8 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladavx.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int8x16_t m1, int8x16_t m2)
  {
!   return vmladavxq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
!   return vmlaldavaq_p_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavat.s16"  }  } */
  
  int64_t
! foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
!   return vmlaldavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavat.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavaq_p_s16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavaq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
!   return vmlaldavaq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavat.s32"  }  } */
  
  int64_t
! foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
!   return vmlaldavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavat.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavaq_p_s32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavaq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! foo (uint64_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p)
  {
!   return vmlaldavaq_p_u16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavat.u16"  }  } */
  
  uint64_t
! foo1 (uint64_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p)
  {
!   return vmlaldavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavat.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint64_t add, uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavaq_p_u16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint64_t
+ foo1 (uint64_t add, uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
+ {
+   return vmlaldavaq_p (add, m1, m2, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo2 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavaq_p (1, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! foo (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
!   return vmlaldavaq_p_u32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavat.u32"  }  } */
  
  uint64_t
! foo1 (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
!   return vmlaldavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavat.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint64_t add, uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavaq_p_u32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint64_t
+ foo1 (uint64_t add, uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
+ {
+   return vmlaldavaq_p (add, m1, m2, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo2 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavaq_p (1, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int64_t a, int16x8_t b, int16x8_t c)
  {
!   return vmlaldavaq_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlaldava.s16"  }  } */
  
  int64_t
! foo1 (int64_t a, int16x8_t b, int16x8_t c)
  {
!   return vmlaldavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlaldava.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldava.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t add, int16x8_t m1, int16x8_t m2)
  {
!   return vmlaldavaq_s16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldava.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int64_t add, int16x8_t m1, int16x8_t m2)
  {
!   return vmlaldavaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int64_t a, int32x4_t b, int32x4_t c)
  {
!   return vmlaldavaq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlaldava.s32"  }  } */
  
  int64_t
! foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
!   return vmlaldavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlaldava.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldava.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t add, int32x4_t m1, int32x4_t m2)
  {
!   return vmlaldavaq_s32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldava.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int64_t add, int32x4_t m1, int32x4_t m2)
  {
!   return vmlaldavaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! foo (uint64_t a, uint16x8_t b, uint16x8_t c)
  {
!   return vmlaldavaq_u16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlaldava.u16"  }  } */
  
  uint64_t
! foo1 (uint64_t a, uint16x8_t b, uint16x8_t c)
  {
!   return vmlaldavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlaldava.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldava.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint64_t add, uint16x8_t m1, uint16x8_t m2)
  {
!   return vmlaldavaq_u16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldava.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint64_t
+ foo1 (uint64_t add, uint16x8_t m1, uint16x8_t m2)
+ {
+   return vmlaldavaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmlaldava.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo2 (uint16x8_t m1, uint16x8_t m2)
  {
!   return vmlaldavaq (1, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! foo (uint64_t a, uint32x4_t b, uint32x4_t c)
  {
!   return vmlaldavaq_u32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlaldava.u32"  }  } */
  
  uint64_t
! foo1 (uint64_t a, uint32x4_t b, uint32x4_t c)
  {
!   return vmlaldavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlaldava.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldava.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint64_t add, uint32x4_t m1, uint32x4_t m2)
  {
!   return vmlaldavaq_u32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldava.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint64_t
+ foo1 (uint64_t add, uint32x4_t m1, uint32x4_t m2)
+ {
+   return vmlaldavaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmlaldava.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo2 (uint32x4_t m1, uint32x4_t m2)
  {
!   return vmlaldavaq (1, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
!   return vmlaldavaxq_p_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavaxt.s16"  }  } */
  
  int64_t
! foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
!   return vmlaldavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavaxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavaxt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavaxq_p_s16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavaxt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavaxq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
!   return vmlaldavaxq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavaxt.s32"  }  } */
  
  int64_t
! foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
!   return vmlaldavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavaxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavaxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavaxq_p_s32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavaxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavaxq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int64_t a, int16x8_t b, int16x8_t c)
  {
!   return vmlaldavaxq_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlaldavax.s16"  }  } */
  
  int64_t
! foo1 (int64_t a, int16x8_t b, int16x8_t c)
  {
!   return vmlaldavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlaldavax.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldavax.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t add, int16x8_t m1, int16x8_t m2)
  {
!   return vmlaldavaxq_s16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldavax.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int64_t add, int16x8_t m1, int16x8_t m2)
  {
!   return vmlaldavaxq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int64_t a, int32x4_t b, int32x4_t c)
  {
!   return vmlaldavaxq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlaldavax.s32"  }  } */
  
  int64_t
! foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
!   return vmlaldavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlaldavax.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldavax.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t add, int32x4_t m1, int32x4_t m2)
  {
!   return vmlaldavaxq_s32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldavax.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int64_t add, int32x4_t m1, int32x4_t m2)
  {
!   return vmlaldavaxq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vmlaldavq_p_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavt.s16"  }  } */
  
  int64_t
! foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vmlaldavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavq_p_s16 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vmlaldavq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavt.s32"  }  } */
  
  int64_t
! foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vmlaldavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavq_p_s32 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vmlaldavq_p_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavt.u16"  }  } */
  
  uint64_t
! foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vmlaldavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavt.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavq_p_u16 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavt.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo1 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vmlaldavq_p_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavt.u32"  }  } */
  
  uint64_t
! foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vmlaldavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavt.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavq_p_u32 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavt.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo1 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int16x8_t a, int16x8_t b)
  {
!   return vmlaldavq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlaldav.s16"  }  } */
  
  int64_t
! foo1 (int16x8_t a, int16x8_t b)
  {
!   return vmlaldavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlaldav.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldav.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int16x8_t m1, int16x8_t m2)
  {
!   return vmlaldavq_s16 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldav.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int16x8_t m1, int16x8_t m2)
  {
!   return vmlaldavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int32x4_t a, int32x4_t b)
  {
!   return vmlaldavq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlaldav.s32"  }  } */
  
  int64_t
! foo1 (int32x4_t a, int32x4_t b)
  {
!   return vmlaldavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlaldav.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldav.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int32x4_t m1, int32x4_t m2)
  {
!   return vmlaldavq_s32 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldav.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int32x4_t m1, int32x4_t m2)
  {
!   return vmlaldavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! foo (uint16x8_t a, uint16x8_t b)
  {
!   return vmlaldavq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlaldav.u16"  }  } */
  
  uint64_t
! foo1 (uint16x8_t a, uint16x8_t b)
  {
!   return vmlaldavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlaldav.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldav.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint16x8_t m1, uint16x8_t m2)
  {
!   return vmlaldavq_u16 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldav.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo1 (uint16x8_t m1, uint16x8_t m2)
  {
!   return vmlaldavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! foo (uint32x4_t a, uint32x4_t b)
  {
!   return vmlaldavq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlaldav.u32"  }  } */
  
  uint64_t
! foo1 (uint32x4_t a, uint32x4_t b)
  {
!   return vmlaldavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlaldav.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldav.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint32x4_t m1, uint32x4_t m2)
  {
!   return vmlaldavq_u32 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldav.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo1 (uint32x4_t m1, uint32x4_t m2)
  {
!   return vmlaldavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vmlaldavxq_p_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavxt.s16"  }  } */
  
  int64_t
! foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vmlaldavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavxt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavxq_p_s16 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavxt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavxq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vmlaldavxq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavxt.s32"  }  } */
  
  int64_t
! foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vmlaldavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavxq_p_s32 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavxq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int16x8_t a, int16x8_t b)
  {
!   return vmlaldavxq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlaldavx.s16"  }  } */
  
  int64_t
! foo1 (int16x8_t a, int16x8_t b)
  {
!   return vmlaldavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlaldavx.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldavx.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int16x8_t m1, int16x8_t m2)
  {
!   return vmlaldavxq_s16 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldavx.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int16x8_t m1, int16x8_t m2)
  {
!   return vmlaldavxq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int32x4_t a, int32x4_t b)
  {
!   return vmlaldavxq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlaldavx.s32"  }  } */
  
  int64_t
! foo1 (int32x4_t a, int32x4_t b)
  {
!   return vmlaldavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlaldavx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldavx.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int32x4_t m1, int32x4_t m2)
  {
!   return vmlaldavxq_s32 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldavx.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int32x4_t m1, int32x4_t m2)
  {
!   return vmlaldavxq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vmlaq_m_n_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlat.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vmlaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlat.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p)
  {
!   return vmlaq_m_n_s16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p)
  {
!   return vmlaq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vmlaq_m_n_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlat.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vmlaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlat.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p)
  {
!   return vmlaq_m_n_s32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p)
  {
!   return vmlaq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vmlaq_m_n_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlat.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vmlaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlat.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p)
  {
!   return vmlaq_m_n_s8 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p)
  {
!   return vmlaq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16x8_t a, uint16x8_t b, uint16_t c, mve_pred16_t p)
  {
!   return vmlaq_m_n_u16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlat.u16"  }  } */
  
  uint16x8_t
! foo1 (uint16x8_t a, uint16x8_t b, uint16_t c, mve_pred16_t p)
  {
!   return vmlaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlat.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16x8_t add, uint16x8_t m1, uint16_t m2, mve_pred16_t p)
  {
!   return vmlaq_m_n_u16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t add, uint16x8_t m1, uint16_t m2, mve_pred16_t p)
+ {
+   return vmlaq_m (add, m1, m2, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 (uint16x8_t add, uint16x8_t m1, mve_pred16_t p)
  {
!   return vmlaq_m (add, m1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, uint32_t c, mve_pred16_t p)
  {
!   return vmlaq_m_n_u32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlat.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, uint32_t c, mve_pred16_t p)
  {
!   return vmlaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlat.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t add, uint32x4_t m1, uint32_t m2, mve_pred16_t p)
  {
!   return vmlaq_m_n_u32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32x4_t add, uint32x4_t m1, uint32_t m2, mve_pred16_t p)
+ {
+   return vmlaq_m (add, m1, m2, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo2 (uint32x4_t add, uint32x4_t m1, mve_pred16_t p)
  {
!   return vmlaq_m (add, m1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8x16_t a, uint8x16_t b, uint8_t c, mve_pred16_t p)
  {
!   return vmlaq_m_n_u8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlat.u8"  }  } */
  
  uint8x16_t
! foo1 (uint8x16_t a, uint8x16_t b, uint8_t c, mve_pred16_t p)
  {
!   return vmlaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlat.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8x16_t add, uint8x16_t m1, uint8_t m2, mve_pred16_t p)
  {
!   return vmlaq_m_n_u8 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t add, uint8x16_t m1, uint8_t m2, mve_pred16_t p)
+ {
+   return vmlaq_m (add, m1, m2, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 (uint8x16_t add, uint8x16_t m1, mve_pred16_t p)
  {
!   return vmlaq_m (add, m1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vmlaq_n_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmla.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vmlaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmla.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmla.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t add, int16x8_t m1, int16_t m2)
  {
!   return vmlaq_n_s16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmla.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t add, int16x8_t m1, int16_t m2)
  {
!   return vmlaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vmlaq_n_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmla.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vmlaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmla.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmla.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t add, int32x4_t m1, int32_t m2)
  {
!   return vmlaq_n_s32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmla.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t add, int32x4_t m1, int32_t m2)
  {
!   return vmlaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vmlaq_n_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmla.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vmlaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmla.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmla.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t add, int8x16_t m1, int8_t m2)
  {
!   return vmlaq_n_s8 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmla.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t add, int8x16_t m1, int8_t m2)
  {
!   return vmlaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16x8_t a, uint16x8_t b, uint16_t c)
  {
!   return vmlaq_n_u16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmla.u16"  }  } */
  
  uint16x8_t
! foo1 (uint16x8_t a, uint16x8_t b, uint16_t c)
  {
!   return vmlaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmla.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmla.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16x8_t add, uint16x8_t m1, uint16_t m2)
  {
!   return vmlaq_n_u16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmla.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t add, uint16x8_t m1, uint16_t m2)
+ {
+   return vmlaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmla.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 (uint16x8_t add, uint16x8_t m1)
  {
!   return vmlaq (add, m1, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, uint32_t c)
  {
!   return vmlaq_n_u32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmla.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, uint32_t c)
  {
!   return vmlaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmla.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmla.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t add, uint32x4_t m1, uint32_t m2)
  {
!   return vmlaq_n_u32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmla.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32x4_t add, uint32x4_t m1, uint32_t m2)
+ {
+   return vmlaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmla.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo2 (uint32x4_t add, uint32x4_t m1)
  {
!   return vmlaq (add, m1, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8x16_t a, uint8x16_t b, uint8_t c)
  {
!   return vmlaq_n_u8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmla.u8"  }  } */
  
  uint8x16_t
! foo1 (uint8x16_t a, uint8x16_t b, uint8_t c)
  {
!   return vmlaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmla.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmla.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8x16_t add, uint8x16_t m1, uint8_t m2)
  {
!   return vmlaq_n_u8 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmla.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t add, uint8x16_t m1, uint8_t m2)
+ {
+   return vmlaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmla.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 (uint8x16_t add, uint8x16_t m1)
  {
!   return vmlaq (add, m1, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vmlasq_m_n_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlast.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vmlasq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlast.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p)
  {
!   return vmlasq_m_n_s16 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p)
  {
!   return vmlasq_m (m1, m2, add, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vmlasq_m_n_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlast.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vmlasq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlast.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p)
  {
!   return vmlasq_m_n_s32 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p)
  {
!   return vmlasq_m (m1, m2, add, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vmlasq_m_n_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlast.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vmlasq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlast.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p)
  {
!   return vmlasq_m_n_s8 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p)
  {
!   return vmlasq_m (m1, m2, add, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16x8_t a, uint16x8_t b, uint16_t c, mve_pred16_t p)
  {
!   return vmlasq_m_n_u16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlast.u16"  }  } */
  
  uint16x8_t
! foo1 (uint16x8_t a, uint16x8_t b, uint16_t c, mve_pred16_t p)
  {
!   return vmlasq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlast.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16x8_t m1, uint16x8_t m2, uint16_t add, mve_pred16_t p)
  {
!   return vmlasq_m_n_u16 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t m1, uint16x8_t m2, uint16_t add, mve_pred16_t p)
+ {
+   return vmlasq_m (m1, m2, add, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
  {
!   return vmlasq_m (m1, m2, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, uint32_t c, mve_pred16_t p)
  {
!   return vmlasq_m_n_u32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlast.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, uint32_t c, mve_pred16_t p)
  {
!   return vmlasq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlast.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t m1, uint32x4_t m2, uint32_t add, mve_pred16_t p)
  {
!   return vmlasq_m_n_u32 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32x4_t m1, uint32x4_t m2, uint32_t add, mve_pred16_t p)
+ {
+   return vmlasq_m (m1, m2, add, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo2 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
  {
!   return vmlasq_m (m1, m2, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8x16_t a, uint8x16_t b, uint8_t c, mve_pred16_t p)
  {
!   return vmlasq_m_n_u8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlast.u8"  }  } */
  
  uint8x16_t
! foo1 (uint8x16_t a, uint8x16_t b, uint8_t c, mve_pred16_t p)
  {
!   return vmlasq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlast.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8x16_t m1, uint8x16_t m2, uint8_t add, mve_pred16_t p)
  {
!   return vmlasq_m_n_u8 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t m1, uint8x16_t m2, uint8_t add, mve_pred16_t p)
+ {
+   return vmlasq_m (m1, m2, add, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 (uint8x16_t m1, uint8x16_t m2, mve_pred16_t p)
  {
!   return vmlasq_m (m1, m2, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vmlasq_n_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlas.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vmlasq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlas.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlas.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t m1, int16x8_t m2, int16_t add)
  {
!   return vmlasq_n_s16 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlas.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t m1, int16x8_t m2, int16_t add)
  {
!   return vmlasq (m1, m2, add);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vmlasq_n_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlas.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vmlasq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlas.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlas.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t m1, int32x4_t m2, int32_t add)
  {
!   return vmlasq_n_s32 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlas.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t m1, int32x4_t m2, int32_t add)
  {
!   return vmlasq (m1, m2, add);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vmlasq_n_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlas.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vmlasq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlas.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlas.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t m1, int8x16_t m2, int8_t add)
  {
!   return vmlasq_n_s8 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlas.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t m1, int8x16_t m2, int8_t add)
  {
!   return vmlasq (m1, m2, add);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16x8_t a, uint16x8_t b, uint16_t c)
  {
!   return vmlasq_n_u16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlas.u16"  }  } */
  
  uint16x8_t
! foo1 (uint16x8_t a, uint16x8_t b, uint16_t c)
  {
!   return vmlasq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlas.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlas.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16x8_t m1, uint16x8_t m2, uint16_t add)
  {
!   return vmlasq_n_u16 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlas.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t m1, uint16x8_t m2, uint16_t add)
+ {
+   return vmlasq (m1, m2, add);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmlas.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 (uint16x8_t m1, uint16x8_t m2)
  {
!   return vmlasq (m1, m2, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, uint32_t c)
  {
!   return vmlasq_n_u32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlas.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, uint32_t c)
  {
!   return vmlasq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlas.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlas.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t m1, uint32x4_t m2, uint32_t add)
  {
!   return vmlasq_n_u32 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlas.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32x4_t m1, uint32x4_t m2, uint32_t add)
+ {
+   return vmlasq (m1, m2, add);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmlas.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo2 (uint32x4_t m1, uint32x4_t m2)
  {
!   return vmlasq (m1, m2, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8x16_t a, uint8x16_t b, uint8_t c)
  {
!   return vmlasq_n_u8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlas.u8"  }  } */
  
  uint8x16_t
! foo1 (uint8x16_t a, uint8x16_t b, uint8_t c)
  {
!   return vmlasq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlas.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlas.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8x16_t m1, uint8x16_t m2, uint8_t add)
  {
!   return vmlasq_n_u8 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlas.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t m1, uint8x16_t m2, uint8_t add)
+ {
+   return vmlasq (m1, m2, add);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmlas.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 (uint8x16_t m1, uint8x16_t m2)
  {
!   return vmlasq (m1, m2, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavat.s16"  }  } */
  
  int32_t
  foo1 (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavat.s16"  }  } */
! /* { dg-final { scan-assembler "vmlsdavat.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavat.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p_s16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavat.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavat.s32"  }  } */
  
  int32_t
  foo1 (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavat.s32"  }  } */
! /* { dg-final { scan-assembler "vmlsdavat.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavat.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p_s32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavat.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavat.s8"  }  } */
  
  int32_t
  foo1 (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavat.s8"  }  } */
! /* { dg-final { scan-assembler "vmlsdavat.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavat.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p_s8 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavat.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsdavaq_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsdava.s16"  }  } */
  
  int32_t
  foo1 (int32_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsdavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsdava.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdava.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsdavaq_s16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdava.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsdavaq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsdavaq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsdava.s32"  }  } */
  
  int32_t
  foo1 (int32_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsdavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsdava.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdava.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsdavaq_s32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdava.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsdavaq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int8x16_t b, int8x16_t c)
  {
    return vmlsdavaq_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsdava.s8"  }  } */
  
  int32_t
  foo1 (int32_t a, int8x16_t b, int8x16_t c)
  {
    return vmlsdavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsdava.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdava.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int8x16_t b, int8x16_t c)
  {
    return vmlsdavaq_s8 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdava.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int8x16_t b, int8x16_t c)
  {
    return vmlsdavaq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavaxt.s16"  }  } */
  
  int32_t
  foo1 (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavaxt.s16"  }  } */
! /* { dg-final { scan-assembler "vmlsdavaxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavaxt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p_s16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavaxt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavaxt.s32"  }  } */
  
  int32_t
  foo1 (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavaxt.s32"  }  } */
! /* { dg-final { scan-assembler "vmlsdavaxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavaxt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p_s32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavaxt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavaxt.s8"  }  } */
  
  int32_t
  foo1 (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavaxt.s8"  }  } */
! /* { dg-final { scan-assembler "vmlsdavaxt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavaxt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p_s8 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavaxt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsdavaxq_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsdavax.s16"  }  } */
  
  int32_t
  foo1 (int32_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsdavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsdavax.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdavax.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsdavaxq_s16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdavax.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsdavaxq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsdavaxq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsdavax.s32"  }  } */
  
  int32_t
  foo1 (int32_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsdavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsdavax.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdavax.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsdavaxq_s32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdavax.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsdavaxq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int8x16_t b, int8x16_t c)
  {
    return vmlsdavaxq_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsdavax.s8"  }  } */
  
  int32_t
  foo1 (int32_t a, int8x16_t b, int8x16_t c)
  {
    return vmlsdavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsdavax.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdavax.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int8x16_t b, int8x16_t c)
  {
    return vmlsdavaxq_s8 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdavax.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int8x16_t b, int8x16_t c)
  {
    return vmlsdavaxq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsdavq_p_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavt.s16"  }  } */
  
  int32_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsdavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsdavq_p_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsdavq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsdavq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavt.s32"  }  } */
  
  int32_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsdavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsdavq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsdavq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmlsdavq_p_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavt.s8"  }  } */
  
  int32_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmlsdavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmlsdavq_p_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmlsdavq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmlsdavq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsdav.s16"  }  } */
  
  int32_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmlsdavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsdav.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdav.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmlsdavq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdav.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmlsdavq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmlsdavq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsdav.s32"  }  } */
  
  int32_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmlsdavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsdav.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdav.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmlsdavq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdav.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmlsdavq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmlsdavq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsdav.s8"  }  } */
  
  int32_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmlsdavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsdav.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdav.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmlsdavq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdav.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmlsdavq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavxt.s16"  }  } */
  
  int32_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavxt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavxt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavxt.s32"  }  } */
  
  int32_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavxt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavxt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavxt.s8"  }  } */
  
  int32_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavxt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavxt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavxt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmlsdavxq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsdavx.s16"  }  } */
  
  int32_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmlsdavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsdavx.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdavx.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmlsdavxq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdavx.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmlsdavxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmlsdavxq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsdavx.s32"  }  } */
  
  int32_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmlsdavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsdavx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdavx.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmlsdavxq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdavx.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmlsdavxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmlsdavxq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsdavx.s8"  }  } */
  
  int32_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmlsdavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsdavx.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdavx.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmlsdavxq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdavx.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmlsdavxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsldavaq_p_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsldavat.s16"  }  } */
  
  int64_t
  foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsldavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsldavat.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavat.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsldavaq_p_s16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavat.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsldavaq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsldavaq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsldavat.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsldavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsldavat.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsldavaq_p_s32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsldavaq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsldavaq_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsldava.s16"  }  } */
  
  int64_t
  foo1 (int64_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsldavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsldava.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsldava.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsldavaq_s16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsldava.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsldavaq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsldavaq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsldava.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsldavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsldava.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsldava.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsldavaq_s32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsldava.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsldavaq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsldavaxq_p_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsldavaxt.s16"  }  } */
  
  int64_t
  foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsldavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsldavaxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavaxt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsldavaxq_p_s16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavaxt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsldavaxq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsldavaxq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsldavaxt.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsldavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsldavaxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavaxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsldavaxq_p_s32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavaxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsldavaxq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsldavaxq_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsldavax.s16"  }  } */
  
  int64_t
  foo1 (int64_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsldavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsldavax.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsldavax.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsldavaxq_s16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsldavax.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsldavaxq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsldavaxq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsldavax.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsldavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsldavax.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsldavax.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsldavaxq_s32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsldavax.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsldavaxq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsldavq_p_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsldavt.s16"  }  } */
  
  int64_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsldavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsldavt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsldavq_p_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsldavq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsldavq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsldavt.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsldavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsldavt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsldavq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsldavq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmlsldavq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsldav.s16"  }  } */
  
  int64_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmlsldavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsldav.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsldav.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmlsldavq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsldav.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmlsldavq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmlsldavq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsldav.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmlsldavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsldav.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsldav.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmlsldavq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsldav.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmlsldavq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsldavxq_p_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsldavxt.s16"  }  } */
  
  int64_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsldavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsldavxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavxt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsldavxq_p_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavxt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsldavxq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsldavxq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsldavxt.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsldavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsldavxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsldavxq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsldavxq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmlsldavxq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsldavx.s16"  }  } */
  
  int64_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmlsldavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsldavx.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsldavx.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmlsldavxq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsldavx.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmlsldavxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmlsldavxq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsldavx.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmlsldavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsldavx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsldavx.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmlsldavxq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsldavx.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmlsldavxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovlbt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovlbt.s8"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_m_u16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovlbt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_m_u16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_m_u8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovlbt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_m_u8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a)
  {
    return vmovlbq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vmovlb.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a)
  {
    return vmovlbq (a);
  }
  
! /* { dg-final { scan-assembler "vmovlb.s16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovlb.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a)
  {
    return vmovlbq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovlb.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a)
  {
    return vmovlbq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a)
  {
    return vmovlbq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vmovlb.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a)
  {
    return vmovlbq (a);
  }
  
! /* { dg-final { scan-assembler "vmovlb.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovlb.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a)
  {
    return vmovlbq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovlb.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a)
  {
    return vmovlbq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a)
  {
!     return vmovlbq_u16 (a);
  }
  
- /* { dg-final { scan-assembler "vmovlb.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a)
  {
!     return vmovlbq (a);
  }
  
! /* { dg-final { scan-assembler "vmovlb.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovlb.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a)
  {
!   return vmovlbq_u16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovlb.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a)
  {
!   return vmovlbq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a)
  {
!     return vmovlbq_u8 (a);
  }
  
- /* { dg-final { scan-assembler "vmovlb.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a)
  {
!     return vmovlbq (a);
  }
  
! /* { dg-final { scan-assembler "vmovlb.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovlb.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a)
  {
!   return vmovlbq_u8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovlb.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a)
  {
!   return vmovlbq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_x_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovlbt.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_x_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovlbt.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_x_u16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovlbt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_x_u16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_x_u8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovlbt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_x_u8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmovltq_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovltt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmovltq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmovltq_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmovltq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmovltq_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovltt.s8"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmovltq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmovltq_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmovltq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmovltq_m_u16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovltt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmovltq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmovltq_m_u16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmovltq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmovltq_m_u8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovltt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmovltq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmovltq_m_u8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmovltq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a)
  {
    return vmovltq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vmovlt.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a)
  {
    return vmovltq (a);
  }
  
! /* { dg-final { scan-assembler "vmovlt.s16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovlt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a)
  {
    return vmovltq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovlt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a)
  {
    return vmovltq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a)
  {
    return vmovltq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vmovlt.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a)
  {
    return vmovltq (a);
  }
  
! /* { dg-final { scan-assembler "vmovlt.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovlt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a)
  {
    return vmovltq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovlt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a)
  {
    return vmovltq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a)
  {
!     return vmovltq_u16 (a);
  }
  
- /* { dg-final { scan-assembler "vmovlt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a)
  {
!     return vmovltq (a);
  }
  
! /* { dg-final { scan-assembler "vmovlt.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovlt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a)
  {
!   return vmovltq_u16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovlt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a)
  {
!   return vmovltq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a)
  {
!     return vmovltq_u8 (a);
  }
  
- /* { dg-final { scan-assembler "vmovlt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a)
  {
!     return vmovltq (a);
  }
  
! /* { dg-final { scan-assembler "vmovlt.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovlt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a)
  {
!   return vmovltq_u8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovlt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a)
  {
!   return vmovltq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vmovltq_x_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovltt.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vmovltq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vmovltq_x_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vmovltq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vmovltq_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovltt.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vmovltq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vmovltq_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vmovltq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vmovltq_x_u16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovltt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vmovltq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vmovltq_x_u16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vmovltq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vmovltq_x_u8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovltt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vmovltq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vmovltq_x_u8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vmovltq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmovnbq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovnbt.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmovnbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovnbt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmovnbq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovnbt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmovnbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmovnbq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovnbt.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmovnbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovnbt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmovnbq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovnbt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmovnbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmovnbq_m_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovnbt.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmovnbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovnbt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmovnbq_m_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovnbt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmovnbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmovnbq_m_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovnbt.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmovnbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovnbt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmovnbq_m_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovnbt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmovnbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vmovnbq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmovnb.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vmovnbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmovnb.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovnb.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vmovnbq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovnb.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vmovnbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vmovnbq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmovnb.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vmovnbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmovnb.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovnb.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vmovnbq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovnb.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vmovnbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vmovnbq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmovnb.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vmovnbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmovnb.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovnb.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vmovnbq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovnb.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vmovnbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vmovnbq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmovnb.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vmovnbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmovnb.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovnb.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vmovnbq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovnb.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vmovnbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmovntq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovntt.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmovntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovntt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmovntq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovntt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmovntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmovntq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovntt.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmovntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovntt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmovntq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovntt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmovntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmovntq_m_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovntt.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmovntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovntt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmovntq_m_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovntt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmovntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmovntq_m_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovntt.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmovntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovntt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmovntq_m_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovntt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmovntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vmovntq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmovnt.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vmovntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmovnt.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovnt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vmovntq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovnt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vmovntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vmovntq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmovnt.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vmovntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmovnt.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovnt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vmovntq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovnt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vmovntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vmovntq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmovnt.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vmovntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmovnt.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovnt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vmovntq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovnt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vmovntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vmovntq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmovnt.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vmovntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmovnt.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovnt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vmovntq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovnt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vmovntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulhq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulhq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulhq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulhq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulhq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulhq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulhq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulht.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulhq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulhq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulht.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulhq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulhq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulht.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulhq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmulhq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmulh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmulh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmulh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmulhq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmulh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmulhq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmulh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmulh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmulh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmulhq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmulh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmulhq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmulh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmulh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmulh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmulhq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmulh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmulhq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmulh.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmulh.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmulh.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmulhq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmulh.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmulhq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmulh.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmulh.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmulh.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmulhq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmulh.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmulhq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmulh.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmulh.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmulh.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmulhq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmulh.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulhq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulhq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulhq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulhq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulhq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulhq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulhq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulhq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulhq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulhq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulhq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulhq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmullbt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.s32"  }  } */
  
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmullbt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.s8"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmullbt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmullbt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.u32"  }  } */
  
  uint64x2_t
  foo1 (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmullbt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo1 (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmullbt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmullbq_int_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullb.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmullbq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullb.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmullbq_int_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullb.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmullbq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmullbq_int_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullb.s32"  }  } */
  
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmullbq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullb.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmullbq_int_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullb.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmullbq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmullbq_int_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullb.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmullbq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullb.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullb.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmullbq_int_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullb.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmullbq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmullbq_int_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullb.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmullbq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullb.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullb.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmullbq_int_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullb.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmullbq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmullbq_int_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullb.u32"  }  } */
  
  uint64x2_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmullbq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullb.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullb.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmullbq_int_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullb.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmullbq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmullbq_int_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullb.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmullbq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullb.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullb.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmullbq_int_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullb.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmullbq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.s32"  }  } */
  
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.u32"  }  } */
  
  uint64x2_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_poly_m_p16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.p16"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_poly_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmullbt.p16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_poly_m_p16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_poly_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_poly_m_p8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.p8"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_poly_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmullbt.p8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_poly_m_p8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_poly_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmullbq_poly_p16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullb.p16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmullbq_poly (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullb.p16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullb.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmullbq_poly_p16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullb.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmullbq_poly (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmullbq_poly_p8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullb.p8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmullbq_poly (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullb.p8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullb.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmullbq_poly_p8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullb.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmullbq_poly (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_poly_x_p16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.p16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_poly_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_poly_x_p16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_poly_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_poly_x_p8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.p8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_poly_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_poly_x_p8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_poly_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulltt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.s32"  }  } */
  
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulltt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.s8"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulltt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulltt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.u32"  }  } */
  
  uint64x2_t
  foo1 (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulltt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo1 (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulltt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmulltq_int_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullt.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmulltq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmulltq_int_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmulltq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmulltq_int_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullt.s32"  }  } */
  
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmulltq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullt.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmulltq_int_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmulltq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmulltq_int_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullt.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmulltq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullt.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmulltq_int_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmulltq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmulltq_int_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmulltq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullt.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmulltq_int_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmulltq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmulltq_int_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullt.u32"  }  } */
  
  uint64x2_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmulltq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullt.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmulltq_int_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmulltq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmulltq_int_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmulltq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullt.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmulltq_int_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmulltq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.s32"  }  } */
  
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.u32"  }  } */
  
  uint64x2_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_poly_m_p16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.p16"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_poly_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulltt.p16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_poly_m_p16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_poly_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_poly_m_p8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.p8"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_poly_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulltt.p8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_poly_m_p8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_poly_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmulltq_poly_p16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullt.p16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmulltq_poly (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullt.p16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmulltq_poly_p16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmulltq_poly (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmulltq_poly_p8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullt.p8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmulltq_poly (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullt.p8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmulltq_poly_p8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmulltq_poly (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_poly_x_p16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.p16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_poly_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_poly_x_p16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_poly_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_poly_x_p8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.p8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_poly_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_poly_x_p8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_poly_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vmulq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vmulq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vmulq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vmulq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmulq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmulq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmulq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmulq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vmulq_m (inactive, a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vmulq_m_n_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.f16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vmulq_m_n_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo2 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
! {
!   return vmulq_m (inactive, a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vmulq_m (inactive, a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vmulq_m_n_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.f32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vmulq_m_n_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo2 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
! {
!   return vmulq_m (inactive, a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vmulq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vmulq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vmulq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vmulq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vmulq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vmulq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vmulq_m_n_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vmulq_m_n_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
! {
!   return vmulq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vmulq_m_n_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vmulq_m_n_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
! {
!   return vmulq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vmulq_m_n_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vmulq_m_n_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
! {
!   return vmulq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t a, float16_t b)
- {
-   return vmulq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16_t b)
  {
    return vmulq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.f16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16_t b)
  {
    return vmulq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vmulq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmul.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo2 (float16x8_t a)
! {
!   return vmulq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t a, float32_t b)
- {
-   return vmulq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32_t b)
  {
    return vmulq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.f32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32_t b)
  {
    return vmulq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vmulq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmul.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo2 (float32x4_t a)
! {
!   return vmulq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vmulq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vmulq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vmulq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vmulq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vmulq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vmulq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vmulq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vmulq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vmulq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmul.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a)
! {
!   return vmulq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vmulq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vmulq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vmulq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmul.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a)
! {
!   return vmulq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vmulq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vmulq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vmulq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmul.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a)
! {
!   return vmulq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmulq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmulq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmulq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmulq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmulq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmulq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmulq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmulq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmulq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmulq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmulq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmulq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmulq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmulq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmulq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmulq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vmulq_x (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vmulq_x_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.f16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vmulq_x_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo2 (float16x8_t a, mve_pred16_t p)
! {
!   return vmulq_x (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vmulq_x (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vmulq_x_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.f32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vmulq_x_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo2 (float32x4_t a, mve_pred16_t p)
! {
!   return vmulq_x (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vmulq_x_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vmulq_x_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vmulq_x_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vmulq_x_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vmulq_x_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vmulq_x_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vmulq_x_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vmulq_x_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a, mve_pred16_t p)
! {
!   return vmulq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vmulq_x_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vmulq_x_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a, mve_pred16_t p)
! {
!   return vmulq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vmulq_x_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vmulq_x_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a, mve_pred16_t p)
! {
!   return vmulq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m_n_s16 (inactive, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m (inactive, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m_n_s16 (inactive, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m (inactive, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m_n_s32 (inactive, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m (inactive, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m_n_s32 (inactive, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m (inactive, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m_n_u16 (inactive, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m (inactive, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m_n_u16 (inactive, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m (inactive, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m_n_u32 (inactive, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m (inactive, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m_n_u32 (inactive, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m (inactive, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmvnq_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmvnq_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vmvnq_m_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vmvnq_m_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmvnq_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmvnq_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmvnq_m_u16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmvnq_m_u16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vmvnq_m_u32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vmvnq_m_u32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmvnq_m_u8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmvnq_m_u8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo ()
  {
    return vmvnq_n_s16 (1);
  }
  
! /* { dg-final { scan-assembler "vmvn.i16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo ()
  {
    return vmvnq_n_s16 (1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo ()
  {
!   return vmvnq_n_s32 (2);
  }
  
! /* { dg-final { scan-assembler "vmvn.i32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo ()
  {
!   return vmvnq_n_s32 (1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo ()
  {
!     return vmvnq_n_u16 (1);
  }
  
! /* { dg-final { scan-assembler "vmvn.i16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo ()
  {
!   return vmvnq_n_u16 (1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo ()
  {
!     return vmvnq_n_u32 (2);
  }
  
! /* { dg-final { scan-assembler "vmvn.i32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo ()
  {
!   return vmvnq_n_u32 (1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vmvnq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vmvn"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vmvnq (a);
  }
  
! /* { dg-final { scan-assembler "vmvn"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vmvnq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vmvnq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vmvnq_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vmvn"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vmvnq (a);
  }
  
! /* { dg-final { scan-assembler "vmvn"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vmvnq_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vmvnq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vmvnq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vmvn"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vmvnq (a);
  }
  
! /* { dg-final { scan-assembler "vmvn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vmvnq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vmvnq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
!     return vmvnq_u16 (a);
  }
  
- /* { dg-final { scan-assembler "vmvn"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!     return vmvnq (a);
  }
  
! /* { dg-final { scan-assembler "vmvn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vmvnq_u16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vmvnq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a)
  {
!     return vmvnq_u32 (a);
  }
  
- /* { dg-final { scan-assembler "vmvn"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!     return vmvnq (a);
  }
  
! /* { dg-final { scan-assembler "vmvn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a)
  {
!   return vmvnq_u32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!   return vmvnq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a)
  {
!     return vmvnq_u8 (a);
  }
  
- /* { dg-final { scan-assembler "vmvn"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!     return vmvnq (a);
  }
  
! /* { dg-final { scan-assembler "vmvn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a)
  {
!   return vmvnq_u8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!   return vmvnq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (mve_pred16_t p)
  {
!   return vmvnq_x_n_s16 (2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt.i16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (mve_pred16_t p)
  {
!   return vmvnq_x_n_s16 (1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (mve_pred16_t p)
  {
!   return vmvnq_x_n_s32 (2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt.i32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (mve_pred16_t p)
  {
!   return vmvnq_x_n_s32 (1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (mve_pred16_t p)
  {
!   return vmvnq_x_n_u16 (4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt.i16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (mve_pred16_t p)
  {
!   return vmvnq_x_n_u16 (1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (mve_pred16_t p)
  {
!   return vmvnq_x_n_u32 (4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt.i32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (mve_pred16_t p)
  {
!   return vmvnq_x_n_u32 (1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vmvnq_x_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vmvnq_x_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vmvnq_x_s32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vmvnq_x_s32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vmvnq_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vmvnq_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vmvnq_x_u16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vmvnq_x_u16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vmvnq_x_u32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vmvnq_x_u32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vmvnq_x_u8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vmvnq_x_u8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vnegq_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vneg.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vneg.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vnegq_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vneg.f16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vnegq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a)
  {
    return vnegq_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vneg.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vneg.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a)
  {
    return vnegq_f32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vneg.f32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (float32x4_t a)
! {
!   return vnegq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vnegq_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vnegq_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vnegq_m_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vnegq_m_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vnegq_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vnegq_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vnegq_m_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vnegq_m_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vnegq_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vnegq_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vnegq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vneg.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vnegq (a);
  }
  
! /* { dg-final { scan-assembler "vneg.s16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vneg.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vnegq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vneg.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vnegq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vnegq_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vneg.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vnegq (a);
  }
  
! /* { dg-final { scan-assembler "vneg.s32"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vneg.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vnegq_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vneg.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vnegq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vnegq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vneg.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vnegq (a);
  }
  
! /* { dg-final { scan-assembler "vneg.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vneg.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vnegq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vneg.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vnegq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vnegq_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vnegq_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vnegq_x_f32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vnegq_x_f32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vnegq_x_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vnegq_x_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vnegq_x_s32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vnegq_x_s32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vnegq_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vnegq_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vornq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorn"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vornq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vornq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vornq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vornq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorn"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vornq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vornq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vornq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vornq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vornt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vornq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vornq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vornt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vornq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vornq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vornt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vornq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vornq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vornt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vornq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vornq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vornt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vornq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vornq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vornt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vornq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vornq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vornt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vornq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vornq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vornt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vornq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vornq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorn"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vornq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vornq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vornq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vornq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorn"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vornq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vornq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vornq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vornq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorn"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vornq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vornq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vornq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vornq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorn"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vornq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vornq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vornq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vornq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorn"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vornq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vornq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vornq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vornq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorn"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vornq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vornq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vornq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vornq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vornq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vornq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vornq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vornq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vornq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vornq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vornq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vornq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vornq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vornq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vornq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vornq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vornq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vornq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vornq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vorrq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorr"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vorrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorr"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vorrq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vorrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vorrq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorr"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vorrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorr"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vorrq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vorrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vorrq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vorrt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vorrq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vorrq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vorrt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vorrq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vorrq_m_n_s16 (a, 253, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
!   return vorrq_m_n (a, 253, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vorrq_m_n_s16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
!   return vorrq_m_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vorrq_m_n_s32 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vorrq_m_n (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vorrq_m_n_s32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vorrq_m_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vorrq_m_n_u16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vorrq_m_n (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vorrq_m_n_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vorrq_m_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vorrq_m_n_u32 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vorrq_m_n (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vorrq_m_n_u32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vorrq_m_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vorrq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vorrt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vorrq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vorrq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vorrt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vorrq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vorrq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vorrt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vorrq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vorrq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vorrt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vorrq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vorrq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vorrt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vorrq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vorrq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vorrt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vorrq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vorrq_n_s16 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vorr.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vorrq_n_s16 (a, 1);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vorr.i16	q[0-9]+, #[0-9]+(?:	@.*|)
! **	...
! */
! int16x8_t
! foo1 (int16x8_t a)
! {
!   return vorrq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vorrq_n_s32 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vorr.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vorrq_n_s32 (a, 1);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vorr.i32	q[0-9]+, #[0-9]+(?:	@.*|)
! **	...
! */
! int32x4_t
! foo1 (int32x4_t a)
! {
!   return vorrq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
    return vorrq_n_u16 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vorr.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
    return vorrq_n_u16 (a, 1);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vorr.i16	q[0-9]+, #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo1 (uint16x8_t a)
! {
!   return vorrq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a)
  {
!   return vorrq_n_u32 (a, 44);
  }
  
! /* { dg-final { scan-assembler "vorr.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a)
  {
!   return vorrq_n_u32 (a, 1);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vorr.i32	q[0-9]+, #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo1 (uint32x4_t a)
! {
!   return vorrq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vorrq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorr"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vorrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorr"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vorrq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vorrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vorrq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorr"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vorrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorr"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vorrq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vorrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vorrq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorr"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vorrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorr"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vorrq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vorrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vorrq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorr"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vorrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorr"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vorrq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vorrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vorrq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorr"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vorrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorr"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vorrq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vorrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vorrq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorr"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vorrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorr"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vorrq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vorrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vorrq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vorrq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vorrq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vorrq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vorrq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vorrq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vorrq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vorrq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vorrq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vorrq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vorrq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vorrq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vorrq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vorrq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vorrq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vorrq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpnot.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpnot.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpnot.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpnot.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (mve_pred16_t a)
  {
    return vpnot (a);
  }
  
! /* { dg-final { scan-assembler "vpnot"  }  } */
! 
! mve_pred16_t
! foo1 (mve_pred16_t a)
! {
!   return vpnot (a);
  }
  
! /* { dg-final { scan-assembler "vpnot"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpnot(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (mve_pred16_t a)
  {
    return vpnot (a);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vpselq_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vpselq_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vpselq_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vpselq_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vpselq_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vpselq_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vpselq_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vpselq_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int64x2_t a, int64x2_t b, mve_pred16_t p)
  {
    return vpselq_s64 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  int64x2_t
  foo1 (int64x2_t a, int64x2_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int64x2_t a, int64x2_t b, mve_pred16_t p)
  {
    return vpselq_s64 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int64x2_t a, int64x2_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vpselq_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vpselq_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vpselq_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vpselq_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vpselq_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vpselq_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint64x2_t a, uint64x2_t b, mve_pred16_t p)
  {
    return vpselq_u64 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  uint64x2_t
  foo1 (uint64x2_t a, uint64x2_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint64x2_t a, uint64x2_t b, mve_pred16_t p)
  {
    return vpselq_u64 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo1 (uint64x2_t a, uint64x2_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vpselq_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vpselq_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqabsq_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqabst.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqabsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqabst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqabsq_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqabst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqabsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqabsq_m_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqabst.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqabsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqabst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqabsq_m_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqabst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqabsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqabsq_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqabst.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqabsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqabst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqabsq_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqabst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqabsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vqabsq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vqabs.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vqabsq (a);
  }
  
! /* { dg-final { scan-assembler "vqabs.s16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqabs.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vqabsq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqabs.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vqabsq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vqabsq_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vqabs.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vqabsq (a);
  }
  
! /* { dg-final { scan-assembler "vqabs.s32"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqabs.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vqabsq_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqabs.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vqabsq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vqabsq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vqabs.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vqabsq (a);
  }
  
! /* { dg-final { scan-assembler "vqabs.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqabs.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vqabsq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqabs.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vqabsq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vqaddt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
! {
!   return vqaddq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vqaddt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
! {
!   return vqaddq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vqaddt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
! {
!   return vqaddq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqaddq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqaddq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqaddq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqaddq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqaddq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqaddq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqaddq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqaddq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqaddq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqaddq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vqaddq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vqaddq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vqaddq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vqaddq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqaddq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqaddq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vqaddq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vqaddq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vqaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vqaddq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vqaddq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vqaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vqadd.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a)
! {
!   return vqaddq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vqaddq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vqaddq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vqaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vqadd.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a)
! {
!   return vqaddq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vqaddq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vqaddq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vqaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vqadd.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a)
! {
!   return vqaddq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqaddq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqaddq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqaddq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqaddq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqaddq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqaddq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vqaddq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vqaddq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vqaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vqaddq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vqaddq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vqaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vqaddq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vqaddq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vqaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmladhq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmladht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmladhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmladht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmladhq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmladhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmladhq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmladht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmladhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmladht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmladhq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmladhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmladhq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmladht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmladhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmladht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmladhq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmladhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmladhq_s16 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmladh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmladhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmladh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmladh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmladhq_s16 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmladh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmladhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmladhq_s32 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmladh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmladhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmladh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmladh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmladhq_s32 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmladh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmladhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmladhq_s8 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmladh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmladhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmladh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmladh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmladhq_s8 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmladh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmladhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmladhxt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmladhxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladhxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladhxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmladhxt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmladhxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladhxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladhxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmladhxt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmladhxt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladhxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladhxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmladhxq_s16 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmladhx.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmladhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmladhx.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmladhx.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmladhxq_s16 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmladhx.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmladhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmladhxq_s32 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmladhx.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmladhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmladhx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmladhx.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmladhxq_s32 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmladhx.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmladhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmladhxq_s8 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmladhx.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmladhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmladhx.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmladhx.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmladhxq_s8 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmladhx.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmladhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vqdmlahq_m_n_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlaht.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vqdmlahq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlaht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlaht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p)
  {
!   return vqdmlahq_m_n_s16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlaht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p)
  {
!   return vqdmlahq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vqdmlahq_m_n_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlaht.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vqdmlahq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlaht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlaht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p)
  {
!   return vqdmlahq_m_n_s32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlaht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p)
  {
!   return vqdmlahq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vqdmlahq_m_n_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlaht.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vqdmlahq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlaht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlaht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p)
  {
!   return vqdmlahq_m_n_s8 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlaht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p)
  {
!   return vqdmlahq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vqdmlahq_n_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqdmlah.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vqdmlahq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqdmlah.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlah.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t add, int16x8_t m1, int16_t m2)
  {
!   return vqdmlahq_n_s16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlah.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t add, int16x8_t m1, int16_t m2)
  {
!   return vqdmlahq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vqdmlahq_n_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqdmlah.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vqdmlahq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqdmlah.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlah.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t add, int32x4_t m1, int32_t m2)
  {
!   return vqdmlahq_n_s32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlah.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t add, int32x4_t m1, int32_t m2)
  {
!   return vqdmlahq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vqdmlahq_n_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqdmlah.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vqdmlahq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqdmlah.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlah.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t add, int8x16_t m1, int8_t m2)
  {
!   return vqdmlahq_n_s8 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlah.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t add, int8x16_t m1, int8_t m2)
  {
!   return vqdmlahq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vqdmlashq_m_n_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlasht.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vqdmlashq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlasht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlasht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p)
  {
!   return vqdmlashq_m_n_s16 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlasht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p)
  {
!   return vqdmlashq_m (m1, m2, add, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vqdmlashq_m_n_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlasht.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vqdmlashq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlasht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlasht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p)
  {
!   return vqdmlashq_m_n_s32 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlasht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p)
  {
!   return vqdmlashq_m (m1, m2, add, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vqdmlashq_m_n_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlasht.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vqdmlashq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlasht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlasht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p)
  {
!   return vqdmlashq_m_n_s8 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlasht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p)
  {
!   return vqdmlashq_m (m1, m2, add, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vqdmlashq_n_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqdmlash.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vqdmlashq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqdmlash.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlash.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t m1, int16x8_t m2, int16_t add)
  {
!   return vqdmlashq_n_s16 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlash.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t m1, int16x8_t m2, int16_t add)
  {
!   return vqdmlashq (m1, m2, add);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vqdmlashq_n_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqdmlash.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vqdmlashq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqdmlash.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlash.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t m1, int32x4_t m2, int32_t add)
  {
!   return vqdmlashq_n_s32 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlash.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t m1, int32x4_t m2, int32_t add)
  {
!   return vqdmlashq (m1, m2, add);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vqdmlashq_n_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqdmlash.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vqdmlashq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqdmlash.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlash.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t m1, int8x16_t m2, int8_t add)
  {
!   return vqdmlashq_n_s8 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlash.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t m1, int8x16_t m2, int8_t add)
  {
!   return vqdmlashq (m1, m2, add);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlsdht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlsdht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlsdht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlsdht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlsdht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlsdht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmlsdhq_s16 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmlsdh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmlsdhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmlsdh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlsdh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmlsdhq_s16 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlsdh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmlsdhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmlsdhq_s32 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmlsdh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmlsdhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmlsdh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlsdh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmlsdhq_s32 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlsdh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmlsdhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmlsdhq_s8 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmlsdh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmlsdhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmlsdh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlsdh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmlsdhq_s8 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlsdh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmlsdhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlsdhxt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlsdhxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdhxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdhxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlsdhxt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlsdhxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdhxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdhxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlsdhxt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlsdhxt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdhxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdhxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmlsdhxq_s16 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmlsdhx.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmlsdhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmlsdhx.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlsdhx.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmlsdhxq_s16 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlsdhx.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmlsdhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmlsdhxq_s32 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmlsdhx.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmlsdhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmlsdhx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlsdhx.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmlsdhxq_s32 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlsdhx.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmlsdhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmlsdhxq_s8 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmlsdhx.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmlsdhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmlsdhx.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlsdhx.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmlsdhxq_s8 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlsdhx.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmlsdhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vqdmulhq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmulh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmulh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmulh.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vqdmulhq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmulh.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqdmulhq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmulh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmulh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmulh.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqdmulhq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmulh.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vqdmulhq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmulh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vqdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmulh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmulh.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vqdmulhq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmulh.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vqdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqdmulhq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmulh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmulh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmulh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqdmulhq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmulh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqdmulhq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmulh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmulh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmulh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqdmulhq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmulh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqdmulhq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmulh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmulh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmulh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqdmulhq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmulh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmullbq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmullbt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmullbq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmullbt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmullbt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmullbq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmullbt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmullbq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmullbq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmullbt.s32"  }  } */
  
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmullbq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmullbt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmullbt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmullbq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmullbt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmullbq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmullbq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmullbt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmullbq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmullbt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmullbt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmullbq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmullbt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmullbq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmullbq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmullbt.s32"  }  } */
  
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmullbq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmullbt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmullbt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmullbq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmullbt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmullbq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, int16_t b)
  {
    return vqdmullbq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmullb.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqdmullbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmullb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmullb.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, int16_t b)
  {
    return vqdmullbq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmullb.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqdmullbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int32x4_t a, int32_t b)
  {
    return vqdmullbq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmullb.s32"  }  } */
  
  int64x2_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqdmullbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmullb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmullb.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int32x4_t a, int32_t b)
  {
    return vqdmullbq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmullb.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqdmullbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqdmullbq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmullb.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqdmullbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmullb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmullb.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqdmullbq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmullb.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqdmullbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqdmullbq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmullb.s32"  }  } */
  
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqdmullbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmullb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmullb.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqdmullbq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmullb.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqdmullbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmulltq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulltt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmulltq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulltt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulltt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmulltq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulltt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmulltq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmulltq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulltt.s32"  }  } */
  
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmulltq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulltt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulltt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmulltq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulltt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmulltq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmulltq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulltt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmulltq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulltt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulltt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmulltq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulltt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmulltq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmulltq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulltt.s32"  }  } */
  
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmulltq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulltt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulltt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmulltq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulltt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmulltq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, int16_t b)
  {
    return vqdmulltq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmullt.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqdmulltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmullt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmullt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, int16_t b)
  {
    return vqdmulltq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmullt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqdmulltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int32x4_t a, int32_t b)
  {
    return vqdmulltq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmullt.s32"  }  } */
  
  int64x2_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqdmulltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmullt.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmullt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int32x4_t a, int32_t b)
  {
    return vqdmulltq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmullt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqdmulltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqdmulltq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmullt.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqdmulltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmullt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmullt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqdmulltq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmullt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqdmulltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqdmulltq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmullt.s32"  }  } */
  
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqdmulltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmullt.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmullt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqdmulltq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmullt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqdmulltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovnbq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovnbt.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovnbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovnbt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovnbq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovnbt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovnbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovnbq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovnbt.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovnbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovnbt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovnbq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovnbt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovnbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqmovnbq_m_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovnbt.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqmovnbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovnbt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqmovnbq_m_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovnbt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqmovnbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqmovnbq_m_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovnbt.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqmovnbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovnbt.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqmovnbq_m_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovnbt.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqmovnbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqmovnbq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovnb.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqmovnbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovnb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovnb.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqmovnbq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovnb.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqmovnbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqmovnbq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovnb.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqmovnbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovnb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovnb.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqmovnbq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovnb.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqmovnbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqmovnbq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovnb.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqmovnbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovnb.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovnb.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqmovnbq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovnb.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqmovnbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqmovnbq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovnb.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqmovnbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovnb.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovnb.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqmovnbq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovnb.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqmovnbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovntq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovntt.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovntt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovntq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovntt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovntq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovntt.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovntt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovntq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovntt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqmovntq_m_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovntt.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqmovntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovntt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqmovntq_m_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovntt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqmovntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqmovntq_m_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovntt.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqmovntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovntt.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqmovntq_m_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovntt.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqmovntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqmovntq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovnt.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqmovntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovnt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovnt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqmovntq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovnt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqmovntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqmovntq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovnt.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqmovntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovnt.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovnt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqmovntq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovnt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqmovntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqmovntq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovnt.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqmovntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovnt.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovnt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqmovntq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovnt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqmovntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqmovntq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovnt.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqmovntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovnt.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovnt.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqmovntq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovnt.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqmovntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovunbq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovunbt.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovunbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovunbt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovunbq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovunbt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovunbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovunbq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovunbt.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovunbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovunbt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovunbq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovunbt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovunbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqmovunbq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovunb.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqmovunbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovunb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovunb.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqmovunbq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovunb.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqmovunbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqmovunbq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovunb.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqmovunbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovunb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovunb.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqmovunbq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovunb.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqmovunbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovuntq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovuntt.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovuntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovuntt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovuntq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovuntt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovuntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovuntq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovuntt.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovuntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovuntt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovuntq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovuntt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovuntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqmovuntq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovunt.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqmovuntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovunt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovunt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqmovuntq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovunt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqmovuntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqmovuntq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovunt.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqmovuntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovunt.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovunt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqmovuntq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovunt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqmovuntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqnegq_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqnegt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqnegq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqnegt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqnegq_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqnegt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqnegq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqnegq_m_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqnegt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqnegq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqnegt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqnegq_m_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqnegt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqnegq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqnegq_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqnegt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqnegq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqnegt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqnegq_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqnegt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqnegq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vqnegq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vqneg.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vqnegq (a);
  }
  
! /* { dg-final { scan-assembler "vqneg.s16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqneg.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vqnegq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqneg.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vqnegq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vqnegq_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vqneg.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vqnegq (a);
  }
  
! /* { dg-final { scan-assembler "vqneg.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqneg.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vqnegq_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqneg.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vqnegq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vqnegq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vqneg.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vqnegq (a);
  }
  
! /* { dg-final { scan-assembler "vqneg.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqneg.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vqnegq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqneg.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vqnegq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmladht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmladht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmladht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmladht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmladht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmladht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmladhq_s16 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmladh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmladhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmladh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmladh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmladhq_s16 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmladh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmladhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmladhq_s32 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmladh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmladhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmladh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmladh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmladhq_s32 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmladh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmladhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmladhq_s8 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmladh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmladhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmladh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmladh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmladhq_s8 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmladh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmladhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmladhxt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmladhxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladhxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladhxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmladhxt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmladhxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladhxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladhxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmladhxt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmladhxt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladhxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladhxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmladhxq_s16 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmladhx.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmladhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmladhx.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmladhx.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmladhxq_s16 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmladhx.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmladhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmladhxq_s32 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmladhx.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmladhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmladhx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmladhx.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmladhxq_s32 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmladhx.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmladhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmladhxq_s8 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmladhx.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmladhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmladhx.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmladhx.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmladhxq_s8 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmladhx.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmladhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vqrdmlahq_m_n_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlaht.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vqrdmlahq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlaht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlaht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p)
  {
!   return vqrdmlahq_m_n_s16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlaht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p)
  {
!   return vqrdmlahq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vqrdmlahq_m_n_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlaht.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vqrdmlahq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlaht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlaht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p)
  {
!   return vqrdmlahq_m_n_s32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlaht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p)
  {
!   return vqrdmlahq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vqrdmlahq_m_n_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlaht.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vqrdmlahq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlaht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlaht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p)
  {
!   return vqrdmlahq_m_n_s8 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlaht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p)
  {
!   return vqrdmlahq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vqrdmlahq_n_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqrdmlah.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vqrdmlahq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqrdmlah.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlah.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t add, int16x8_t m1, int16_t m2)
  {
!   return vqrdmlahq_n_s16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlah.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t add, int16x8_t m1, int16_t m2)
  {
!   return vqrdmlahq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vqrdmlahq_n_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqrdmlah.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vqrdmlahq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqrdmlah.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlah.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t add, int32x4_t m1, int32_t m2)
  {
!   return vqrdmlahq_n_s32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlah.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t add, int32x4_t m1, int32_t m2)
  {
!   return vqrdmlahq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vqrdmlahq_n_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqrdmlah.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vqrdmlahq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqrdmlah.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlah.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t add, int8x16_t m1, int8_t m2)
  {
!   return vqrdmlahq_n_s8 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlah.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t add, int8x16_t m1, int8_t m2)
  {
!   return vqrdmlahq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vqrdmlashq_m_n_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlasht.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vqrdmlashq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlasht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlasht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p)
  {
!   return vqrdmlashq_m_n_s16 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlasht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p)
  {
!   return vqrdmlashq_m (m1, m2, add, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vqrdmlashq_m_n_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlasht.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vqrdmlashq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlasht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlasht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p)
  {
!   return vqrdmlashq_m_n_s32 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlasht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p)
  {
!   return vqrdmlashq_m (m1, m2, add, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vqrdmlashq_m_n_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlasht.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vqrdmlashq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlasht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlasht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p)
  {
!   return vqrdmlashq_m_n_s8 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlasht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p)
  {
!   return vqrdmlashq_m (m1, m2, add, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vqrdmlashq_n_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqrdmlash.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vqrdmlashq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqrdmlash.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlash.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t m1, int16x8_t m2, int16_t add)
  {
!   return vqrdmlashq_n_s16 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlash.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t m1, int16x8_t m2, int16_t add)
  {
!   return vqrdmlashq (m1, m2, add);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vqrdmlashq_n_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqrdmlash.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vqrdmlashq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqrdmlash.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlash.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t m1, int32x4_t m2, int32_t add)
  {
!   return vqrdmlashq_n_s32 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlash.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t m1, int32x4_t m2, int32_t add)
  {
!   return vqrdmlashq (m1, m2, add);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vqrdmlashq_n_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqrdmlash.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vqrdmlashq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqrdmlash.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlash.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t m1, int8x16_t m2, int8_t add)
  {
!   return vqrdmlashq_n_s8 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlash.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t m1, int8x16_t m2, int8_t add)
  {
!   return vqrdmlashq (m1, m2, add);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlsdht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlsdht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlsdht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlsdht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlsdht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlsdht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmlsdhq_s16 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmlsdh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmlsdhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmlsdh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlsdh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmlsdhq_s16 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlsdh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmlsdhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmlsdhq_s32 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmlsdh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmlsdhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmlsdh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlsdh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmlsdhq_s32 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlsdh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmlsdhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmlsdhq_s8 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmlsdh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmlsdhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmlsdh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlsdh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmlsdhq_s8 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlsdh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmlsdhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlsdhxt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlsdhxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdhxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdhxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlsdhxt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlsdhxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdhxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdhxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlsdhxt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlsdhxt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdhxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdhxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmlsdhxq_s16 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmlsdhx.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmlsdhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmlsdhx.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlsdhx.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmlsdhxq_s16 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlsdhx.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmlsdhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmlsdhxq_s32 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmlsdhx.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmlsdhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmlsdhx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlsdhx.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmlsdhxq_s32 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlsdhx.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmlsdhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmlsdhxq_s8 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmlsdhx.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmlsdhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmlsdhx.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlsdhx.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmlsdhxq_s8 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlsdhx.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmlsdhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmulht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmulht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmulht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmulht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmulht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmulht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmulht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmulht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmulht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmulht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmulht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmulht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vqrdmulhq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmulh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmulh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmulh.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vqrdmulhq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmulh.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqrdmulhq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmulh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmulh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmulh.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqrdmulhq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmulh.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vqrdmulhq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmulh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmulh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmulh.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vqrdmulhq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmulh.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqrdmulhq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmulh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmulh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmulh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqrdmulhq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmulh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqrdmulhq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmulh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmulh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmulh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqrdmulhq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmulh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqrdmulhq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmulh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmulh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmulh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqrdmulhq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmulh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshlq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshlt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshlq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshlq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshlt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshlq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrshlq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshlt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrshlq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshlq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshlt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshlq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshlq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshlt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshlq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrshlq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshlt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrshlq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vqrshlq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vqrshlq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqrshlq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqrshlq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vqrshlq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vqrshlq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vqrshlq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vqrshlq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vqrshlq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vqrshlq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vqrshlq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vqrshlq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqrshlq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqrshlq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqrshlq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqrshlq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqrshlq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqrshlq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vqrshlq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vqrshlq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vqrshlq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vqrshlq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vqrshlq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vqrshlq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m_n_s16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrnbt.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrnbt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrnbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrnbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m_n_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrnbt.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrnbt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrnbt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrnbt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m_n_u16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrnbt.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrnbt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrnbt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrnbt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m_n_u32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrnbt.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrnbt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrnbt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrnbt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqrshrnbq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrnb.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqrshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrnb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrnb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqrshrnbq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrnb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqrshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqrshrnbq_n_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrnb.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqrshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrnb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrnb.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqrshrnbq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrnb.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqrshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqrshrnbq_n_u16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrnb.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqrshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrnb.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrnb.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqrshrnbq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrnb.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqrshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqrshrnbq_n_u32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrnb.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqrshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrnb.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrnb.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqrshrnbq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrnb.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqrshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrntq_m_n_s16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrntt.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrntt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrntt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrntq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrntt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrntq_m_n_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrntt.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrntt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrntt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrntq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrntt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqrshrntq_m_n_u16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrntt.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqrshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrntt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrntt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqrshrntq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrntt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqrshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqrshrntq_m_n_u32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrntt.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqrshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrntt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrntt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqrshrntq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrntt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqrshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqrshrntq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrnt.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqrshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrnt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrnt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqrshrntq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrnt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqrshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqrshrntq_n_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrnt.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqrshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrnt.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrnt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqrshrntq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrnt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqrshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqrshrntq_n_u16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrnt.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqrshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrnt.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrnt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqrshrntq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrnt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqrshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqrshrntq_n_u32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrnt.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqrshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrnt.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrnt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqrshrntq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrnt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqrshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrunbq_m_n_s16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrunbt.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrunbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrunbt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrunbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrunbq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrunbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrunbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrunbq_m_n_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrunbt.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrunbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrunbt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrunbt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrunbq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrunbt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrunbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqrshrunbq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrunb.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqrshrunbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrunb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrunb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqrshrunbq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrunb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqrshrunbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqrshrunbq_n_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrunb.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqrshrunbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrunb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrunb.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqrshrunbq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrunb.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqrshrunbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshruntq_m_n_s16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshruntt.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshruntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshruntt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshruntt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshruntq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshruntt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshruntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshruntq_m_n_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshruntt.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshruntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshruntt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshruntt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshruntq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshruntt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshruntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqrshruntq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrunt.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqrshruntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrunt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrunt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqrshruntq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrunt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqrshruntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqrshruntq_n_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrunt.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqrshruntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrunt.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrunt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqrshruntq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrunt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqrshruntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_s16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_s16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_s32 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_s32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_s8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_s8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_u16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_u32 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_u32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_u8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshlq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshlq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshlq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshlq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqshlq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqshlq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshlq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshlq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshlq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshlq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqshlq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqshlq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vqshlq_n_s16 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vqshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vqshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vqshlq_n_s16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vqshlq_n_s32 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vqshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vqshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vqshlq_n_s32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vqshlq_n_s8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vqshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vqshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vqshlq_n_s8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
    return vqshlq_n_u16 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vqshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vqshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
    return vqshlq_n_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a)
  {
    return vqshlq_n_u32 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vqshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vqshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a)
  {
    return vqshlq_n_u32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a)
  {
    return vqshlq_n_u8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vqshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vqshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a)
  {
    return vqshlq_n_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vqshlq_r_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vqshlq_r_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqshlq_r_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqshlq_r_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vqshlq_r_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vqshlq_r_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vqshlq_r_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vqshlq_r_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vqshlq_r_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vqshlq_r_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vqshlq_r_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vqshlq_r_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqshlq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqshlq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqshlq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqshlq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqshlq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqshlq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vqshlq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vqshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vqshlq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vqshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vqshlq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vqshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vqshlq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vqshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vqshlq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vqshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vqshlq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vqshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vqshluq_m_n_s16 (inactive, a, 7, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlut.s16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vqshluq_m (inactive, a, 7, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlut.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vqshluq_m_n_s16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlut.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vqshluq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vqshluq_m_n_s32 (inactive, a, 7, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlut.s32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vqshluq_m (inactive, a, 7, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlut.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vqshluq_m_n_s32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlut.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vqshluq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vqshluq_m_n_s8 (inactive, a, 7, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlut.s8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vqshluq_m (inactive, a, 7, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlut.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vqshluq_m_n_s8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlut.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vqshluq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (int16x8_t a)
  {
!   return vqshluq_n_s16 (a, 7);
  }
  
- /* { dg-final { scan-assembler "vqshlu.s16"  }  } */
  
  uint16x8_t
  foo1 (int16x8_t a)
  {
!   return vqshluq (a, 7);
  }
  
! /* { dg-final { scan-assembler "vqshlu.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshlu.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (int16x8_t a)
  {
!   return vqshluq_n_s16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshlu.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (int16x8_t a)
  {
!   return vqshluq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (int32x4_t a)
  {
!   return vqshluq_n_s32 (a, 7);
  }
  
- /* { dg-final { scan-assembler "vqshlu.s32"  }  } */
  
  uint32x4_t
  foo1 (int32x4_t a)
  {
!   return vqshluq (a, 7);
  }
  
! /* { dg-final { scan-assembler "vqshlu.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshlu.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (int32x4_t a)
  {
!   return vqshluq_n_s32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshlu.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (int32x4_t a)
  {
!   return vqshluq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (int8x16_t a)
  {
!   return vqshluq_n_s8 (a, 7);
  }
  
- /* { dg-final { scan-assembler "vqshlu.s8"  }  } */
  
  uint8x16_t
  foo1 (int8x16_t a)
  {
!   return vqshluq (a, 7);
  }
  
! /* { dg-final { scan-assembler "vqshlu.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshlu.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (int8x16_t a)
  {
!   return vqshluq_n_s8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshlu.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (int8x16_t a)
  {
!   return vqshluq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vqshrnbq_m_n_s16 (a, b, 7, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrnbt.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vqshrnbq_m (a, b, 7, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrnbt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrnbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vqshrnbq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrnbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vqshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vqshrnbq_m_n_s32 (a, b, 11, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrnbt.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vqshrnbq_m (a, b, 11, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrnbt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrnbt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vqshrnbq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrnbt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vqshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqshrnbq_m_n_u16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrnbt.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrnbt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrnbt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqshrnbq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrnbt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqshrnbq_m_n_u32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrnbt.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrnbt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrnbt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqshrnbq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrnbt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqshrnbq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrnb.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrnb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrnb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqshrnbq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrnb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
!   return vqshrnbq_n_s32 (a, b, 2);
  }
  
- /* { dg-final { scan-assembler "vqshrnb.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
!   return vqshrnbq (a, b, 2);
  }
  
! /* { dg-final { scan-assembler "vqshrnb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrnb.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
!   return vqshrnbq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrnb.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
!   return vqshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqshrnbq_n_u16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrnb.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrnb.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrnb.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqshrnbq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrnb.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
!   return vqshrnbq_n_u32 (a, b, 15);
  }
  
- /* { dg-final { scan-assembler "vqshrnb.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
!   return vqshrnbq (a, b, 15);
  }
  
! /* { dg-final { scan-assembler "vqshrnb.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrnb.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
!   return vqshrnbq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrnb.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
!   return vqshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshrntq_m_n_s16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrntt.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrntt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrntt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshrntq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrntt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshrntq_m_n_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrntt.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrntt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrntt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshrntq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrntt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqshrntq_m_n_u16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrntt.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrntt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrntt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqshrntq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrntt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqshrntq_m_n_u32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrntt.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrntt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrntt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqshrntq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrntt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqshrntq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrnt.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrnt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrnt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqshrntq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrnt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqshrntq_n_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrnt.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrnt.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrnt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqshrntq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrnt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqshrntq_n_u16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrnt.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrnt.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrnt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqshrntq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrnt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqshrntq_n_u32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrnt.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrnt.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrnt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqshrntq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrnt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshrunbq_m_n_s16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrunbt.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshrunbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrunbt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrunbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshrunbq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrunbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshrunbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshrunbq_m_n_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrunbt.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshrunbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrunbt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrunbt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshrunbq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrunbt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshrunbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqshrunbq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrunb.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqshrunbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrunb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrunb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqshrunbq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrunb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqshrunbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqshrunbq_n_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrunb.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqshrunbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrunb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrunb.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqshrunbq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrunb.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqshrunbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshruntq_m_n_s16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshruntt.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshruntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshruntt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshruntt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshruntq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshruntt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshruntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshruntq_m_n_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshruntt.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshruntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshruntt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshruntt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshruntq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshruntt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshruntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqshruntq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrunt.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqshruntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrunt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrunt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqshruntq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrunt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqshruntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqshruntq_n_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrunt.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqshruntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrunt.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrunt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqshruntq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrunt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqshruntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vqsubt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
! {
!   return vqsubq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vqsubt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
! {
!   return vqsubq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vqsubt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
! {
!   return vqsubq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqsubq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqsubq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqsubq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqsubq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqsubq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqsubq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqsubq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqsubq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqsubq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqsubq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vqsubq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vqsubq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vqsubq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vqsubq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqsubq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqsubq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vqsubq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vqsubq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vqsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vqsubq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vqsubq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vqsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vqsub.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a)
! {
!   return vqsubq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vqsubq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vqsubq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vqsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vqsub.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a)
! {
!   return vqsubq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vqsubq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vqsubq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vqsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vqsub.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a)
! {
!   return vqsubq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqsubq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqsubq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqsubq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqsubq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqsubq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqsubq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vqsubq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vqsubq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vqsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vqsubq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vqsubq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vqsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vqsubq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vqsubq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vqsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev16q_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev16t.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev16q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev16t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev16q_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev16t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev16q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev16q_m_u8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev16t.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev16q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev16t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev16q_m_u8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev16t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev16q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vrev16q_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vrev16.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vrev16q (a);
  }
  
! /* { dg-final { scan-assembler "vrev16.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev16.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vrev16q_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev16.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vrev16q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a)
  {
!     return vrev16q_u8 (a);
  }
  
- /* { dg-final { scan-assembler "vrev16.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!     return vrev16q (a);
  }
  
! /* { dg-final { scan-assembler "vrev16.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev16.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a)
  {
!   return vrev16q_u8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev16.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!   return vrev16q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vrev16q_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev16t.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vrev16q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev16t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vrev16q_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev16t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vrev16q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vrev16q_x_u8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev16t.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vrev16q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev16t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vrev16q_x_u8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev16t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vrev16q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vrev32q_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vrev32.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev32.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vrev32q_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrev32.16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vrev32q (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev32q_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev32q_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m_u16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m_u16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev32q_m_u8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev32q_m_u8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vrev32q_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vrev32.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vrev32q (a);
  }
  
! /* { dg-final { scan-assembler "vrev32.16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev32.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vrev32q_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev32.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vrev32q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vrev32q_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vrev32.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vrev32q (a);
  }
  
! /* { dg-final { scan-assembler "vrev32.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev32.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vrev32q_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev32.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vrev32q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
!     return vrev32q_u16 (a);
  }
  
- /* { dg-final { scan-assembler "vrev32.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!     return vrev32q (a);
  }
  
! /* { dg-final { scan-assembler "vrev32.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev32.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vrev32q_u16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev32.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vrev32q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a)
  {
!     return vrev32q_u8 (a);
  }
  
- /* { dg-final { scan-assembler "vrev32.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!     return vrev32q (a);
  }
  
! /* { dg-final { scan-assembler "vrev32.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev32.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a)
  {
!   return vrev32q_u8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev32.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!   return vrev32q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vrev32q_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vrev32q_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x_u16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x_u16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vrev32q_x_u8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vrev32q_x_u8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vrev64q_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vrev64.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev64.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vrev64q_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrev64.16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vrev64q (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a)
  {
    return vrev64q_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vrev64.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev64.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a)
  {
    return vrev64q_f32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrev64.32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (float32x4_t a)
! {
!   return vrev64q (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16-clobber.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16-clobber.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16-clobber.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16-clobber.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,17 ----
+ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
+ /* { dg-add-options arm_v8_1m_mve_fp } */
+ /* { dg-additional-options "-O2" } */
+ 
+ #include "arm_mve.h"
+ 
+ int16x8_t
+ foo (int16x8_t a, mve_pred16_t p)
+ {
+   return vrev64q_m_s16 (a, a, p);
+ }
+ 
+ float16x8_t
+ foo2 (float16x8_t a, mve_pred16_t p)
+ {
+   return vrev64q_m_f16 (a, a, p);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev64q_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev64q_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m_u16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m_u16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m_u32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m_u32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev64q_m_u8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev64q_m_u8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vrev64q_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vrev64.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vrev64q (a);
  }
  
! /* { dg-final { scan-assembler "vrev64.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev64.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vrev64q_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev64.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vrev64q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vrev64q_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vrev64.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vrev64q (a);
  }
  
! /* { dg-final { scan-assembler "vrev64.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev64.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vrev64q_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev64.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vrev64q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vrev64q_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vrev64.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vrev64q (a);
  }
  
! /* { dg-final { scan-assembler "vrev64.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev64.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vrev64q_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev64.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vrev64q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
!     return vrev64q_u16 (a);
  }
  
- /* { dg-final { scan-assembler "vrev64.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!     return vrev64q (a);
  }
  
! /* { dg-final { scan-assembler "vrev64.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev64.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vrev64q_u16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev64.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vrev64q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a)
  {
!     return vrev64q_u32 (a);
  }
  
- /* { dg-final { scan-assembler "vrev64.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!     return vrev64q (a);
  }
  
! /* { dg-final { scan-assembler "vrev64.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev64.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a)
  {
!   return vrev64q_u32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev64.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!   return vrev64q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a)
  {
!     return vrev64q_u8 (a);
  }
  
- /* { dg-final { scan-assembler "vrev64.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!     return vrev64q (a);
  }
  
! /* { dg-final { scan-assembler "vrev64.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev64.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a)
  {
!   return vrev64q_u8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev64.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!   return vrev64q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x_f32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x_f32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x_s32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x_s32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vrev64q_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vrev64q_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x_u16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x_u16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x_u32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x_u32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vrev64q_x_u8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vrev64q_x_u8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrhaddt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrhaddt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrhaddt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrhaddt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrhaddt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrhaddt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vrhaddq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrhadd.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vrhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrhadd.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrhadd.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vrhaddq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrhadd.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vrhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrhaddq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrhadd.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrhadd.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrhadd.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrhaddq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrhadd.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vrhaddq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrhadd.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vrhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrhadd.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrhadd.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vrhaddq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrhadd.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vrhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vrhaddq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrhadd.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vrhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrhadd.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrhadd.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vrhaddq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrhadd.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vrhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vrhaddq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrhadd.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vrhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrhadd.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrhadd.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vrhaddq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrhadd.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vrhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vrhaddq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrhadd.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vrhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrhadd.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrhadd.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vrhaddq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrhadd.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vrhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavhat.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavhat.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavhat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaq_p_s32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavhat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
  foo (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaq_p_u32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavhat.u32"  }  } */
  
  uint64_t
  foo1 (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavhat.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavhat.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaq_p_u32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavhat.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo1 (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaq_p (a, b, c, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vrmlaldavhat.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint64_t
! foo2 (uint32x4_t b, uint32x4_t c, mve_pred16_t p)
! {
!   return vrmlaldavhaq_p (1, b, c, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlaldavhaq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavha.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlaldavhaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavha.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlaldavha.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlaldavhaq_s32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlaldavha.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlaldavhaq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
  foo (uint64_t a, uint32x4_t b, uint32x4_t c)
  {
    return vrmlaldavhaq_u32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavha.u32"  }  } */
  
  uint64_t
  foo1 (uint64_t a, uint32x4_t b, uint32x4_t c)
  {
    return vrmlaldavhaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavha.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlaldavha.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo (uint64_t a, uint32x4_t b, uint32x4_t c)
  {
    return vrmlaldavhaq_u32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlaldavha.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo1 (uint64_t a, uint32x4_t b, uint32x4_t c)
  {
    return vrmlaldavhaq (a, b, c);
  }
  
! /*
! **foo2:
! **	...
! **	vrmlaldavha.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint64_t
! foo2 (uint32x4_t b, uint32x4_t c)
! {
!   return vrmlaldavhaq (1, b, c);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaxq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavhaxt.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavhaxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavhaxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaxq_p_s32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavhaxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaxq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlaldavhaxq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavhax.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlaldavhaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavhax.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlaldavhax.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlaldavhaxq_s32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlaldavhax.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlaldavhaxq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavht.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavht.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavht.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhq_p_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavht.u32"  }  } */
  
  uint64_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavht.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavht.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhq_p_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavht.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmlaldavhq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavh.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmlaldavhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlaldavh.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmlaldavhq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlaldavh.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmlaldavhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vrmlaldavhq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavh.u32"  }  } */
  
  uint64_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vrmlaldavhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavh.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlaldavh.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vrmlaldavhq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlaldavh.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vrmlaldavhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhxq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavhxt.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavhxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavhxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhxq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavhxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhxq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmlaldavhxq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavhx.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmlaldavhxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavhx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlaldavhx.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmlaldavhxq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlaldavhx.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmlaldavhxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlsldavhaq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vrmlsldavhat.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlsldavhaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vrmlsldavhat.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlsldavhat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlsldavhaq_p_s32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlsldavhat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlsldavhaq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlsldavhaq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vrmlsldavha.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlsldavhaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vrmlsldavha.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlsldavha.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlsldavhaq_s32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlsldavha.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlsldavhaq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlsldavhaxq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vrmlsldavhaxt.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlsldavhaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vrmlsldavhaxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlsldavhaxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlsldavhaxq_p_s32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlsldavhaxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlsldavhaxq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlsldavhaxq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vrmlsldavhax.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlsldavhaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vrmlsldavhax.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlsldavhax.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlsldavhaxq_s32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlsldavhax.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlsldavhaxq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlsldavhq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vrmlsldavht.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlsldavhq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vrmlsldavht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlsldavht.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlsldavhq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlsldavht.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlsldavhq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmlsldavhq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmlsldavh.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmlsldavhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmlsldavh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlsldavh.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmlsldavhq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlsldavh.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmlsldavhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlsldavhxq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vrmlsldavhxt.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlsldavhxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vrmlsldavhxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlsldavhxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlsldavhxq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlsldavhxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlsldavhxq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmlsldavhxq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmlsldavhx.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmlsldavhxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmlsldavhx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlsldavhx.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmlsldavhxq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlsldavhx.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmlsldavhxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrmulht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrmulht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrmulht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrmulht.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrmulht.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrmulht.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vrmulhq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmulh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vrmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmulh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmulh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vrmulhq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmulh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vrmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmulhq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmulh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmulh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmulh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmulhq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmulh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vrmulhq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmulh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vrmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmulh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmulh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vrmulhq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmulh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vrmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vrmulhq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmulh.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vrmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmulh.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmulh.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vrmulhq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmulh.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vrmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vrmulhq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmulh.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vrmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmulh.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmulh.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vrmulhq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmulh.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vrmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vrmulhq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmulh.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vrmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmulh.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmulh.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vrmulhq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmulh.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vrmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndaq_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vrinta.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrinta.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndaq_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrinta.f16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vrndaq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndaq_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vrinta.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrinta.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndaq_f32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrinta.f32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (float32x4_t a)
! {
!   return vrndaq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndaq_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintat.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndaq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintat.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndaq_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintat.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndaq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndaq_m_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintat.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndaq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintat.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndaq_m_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintat.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndaq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndaq_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintat.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndaq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintat.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndaq_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintat.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndaq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndaq_x_f32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintat.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndaq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintat.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndaq_x_f32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintat.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndaq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndmq_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vrintm.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintm.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndmq_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintm.f16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vrndmq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndmq_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vrintm.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintm.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndmq_f32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintm.f32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (float32x4_t a)
! {
!   return vrndmq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndmq_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintmt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndmq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintmt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndmq_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintmt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndmq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndmq_m_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintmt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndmq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintmt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndmq_m_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintmt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndmq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndmq_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintmt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndmq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintmt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndmq_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintmt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndmq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndmq_x_f32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintmt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndmq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintmt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndmq_x_f32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintmt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndmq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndnq_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vrintn.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintn.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndnq_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintn.f16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vrndnq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndnq_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vrintn.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintn.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndnq_f32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintn.f32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (float32x4_t a)
! {
!   return vrndnq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndnq_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintnt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintnt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndnq_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintnt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndnq_m_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintnt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintnt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndnq_m_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintnt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndnq_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintnt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndnq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintnt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndnq_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintnt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndnq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndnq_x_f32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintnt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndnq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintnt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndnq_x_f32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintnt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndnq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndpq_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vrintp.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintp.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndpq_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintp.f16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vrndpq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndpq_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vrintp.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintp.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndpq_f32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintp.f32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (float32x4_t a)
! {
!   return vrndpq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndpq_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintpt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndpq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintpt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndpq_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintpt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndpq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndpq_m_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintpt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndpq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintpt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndpq_m_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintpt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndpq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndpq_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintpt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndpq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintpt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndpq_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintpt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndpq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndpq_x_f32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintpt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndpq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintpt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndpq_x_f32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintpt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndpq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndq_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vrintz.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintz.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndq_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintz.f16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vrndq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndq_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vrintz.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintz.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndq_f32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintz.f32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (float32x4_t a)
! {
!   return vrndq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndq_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintzt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintzt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndq_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintzt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndq_m_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintzt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintzt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndq_m_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintzt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndq_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintzt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintzt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndq_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintzt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndq_x_f32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintzt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintzt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndq_x_f32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintzt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndxq_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vrintx.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintx.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndxq_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintx.f16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vrndxq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndxq_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vrintx.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintx.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndxq_f32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintx.f32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (float32x4_t a)
! {
!   return vrndxq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndxq_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintxt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndxq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintxt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndxq_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintxt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndxq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndxq_m_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintxt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndxq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintxt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndxq_m_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintxt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndxq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndxq_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintxt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndxq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintxt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndxq_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintxt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndxq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndxq_x_f32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintxt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndxq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintxt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndxq_x_f32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintxt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndxq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshlt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshlt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshlt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshlt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshlt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshlt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vrshlq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vrshlq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vrshlq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vrshlq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vrshlq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vrshlq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vrshlq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vrshlq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vrshlq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vrshlq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vrshlq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vrshlq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vrshlq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vrshlq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrshlq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrshlq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vrshlq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vrshlq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vrshlq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vrshlq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vrshlq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vrshlq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vrshlq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vrshlq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshrnbq_m_n_s16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrnbt.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrnbt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrnbt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshrnbq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrnbt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshrnbq_m_n_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrnbt.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrnbt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrnbt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshrnbq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrnbt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrshrnbq_m_n_u16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrnbt.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrnbt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrnbt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrshrnbq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrnbt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrshrnbq_m_n_u32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrnbt.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrnbt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrnbt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrshrnbq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrnbt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vrshrnbq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vrshrnb.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vrshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vrshrnb.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshrnb.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vrshrnbq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshrnb.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vrshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vrshrnbq_n_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vrshrnb.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vrshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vrshrnb.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshrnb.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vrshrnbq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshrnb.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vrshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vrshrnbq_n_u16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vrshrnb.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vrshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vrshrnb.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshrnb.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vrshrnbq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshrnb.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vrshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vrshrnbq_n_u32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vrshrnb.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vrshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vrshrnb.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshrnb.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vrshrnbq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshrnb.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vrshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshrntq_m_n_s16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrntt.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrntt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrntt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshrntq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrntt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshrntq_m_n_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrntt.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrntt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrntt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshrntq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrntt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrshrntq_m_n_u16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrntt.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrntt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrntt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrshrntq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrntt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrshrntq_m_n_u32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrntt.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrntt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrntt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrshrntq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrntt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vrshrntq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vrshrnt.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vrshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vrshrnt.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshrnt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vrshrntq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshrnt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vrshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vrshrntq_n_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vrshrnt.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vrshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vrshrnt.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshrnt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vrshrntq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshrnt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vrshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vrshrntq_n_u16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vrshrnt.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vrshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vrshrnt.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshrnt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vrshrntq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshrnt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vrshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vrshrntq_n_u32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vrshrnt.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vrshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vrshrnt.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshrnt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vrshrntq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshrnt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vrshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_s16 (inactive, a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_s16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_s32 (inactive, a, 32, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 32, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_s32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_s8 (inactive, a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_s8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_u16 (inactive, a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_u32 (inactive, a, 32, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 32, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_u32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_u8 (inactive, a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
!   return vrshrq_n_s16 (a, 16);
  }
  
- /* { dg-final { scan-assembler "vrshr.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
!   return vrshrq (a, 16);
  }
  
! /* { dg-final { scan-assembler "vrshr.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshr.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
!   return vrshrq_n_s16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshr.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
!   return vrshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
!   return vrshrq_n_s32 (a, 32);
  }
  
- /* { dg-final { scan-assembler "vrshr.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
!   return vrshrq (a, 32);
  }
  
! /* { dg-final { scan-assembler "vrshr.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshr.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
!   return vrshrq_n_s32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshr.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
!   return vrshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
!   return vrshrq_n_s8 (a, 8);
  }
  
- /* { dg-final { scan-assembler "vrshr.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
!   return vrshrq (a, 8);
  }
  
! /* { dg-final { scan-assembler "vrshr.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshr.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
!   return vrshrq_n_s8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshr.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
!   return vrshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vrshrq_n_u16 (a, 16);
  }
  
- /* { dg-final { scan-assembler "vrshr.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vrshrq (a, 16);
  }
  
! /* { dg-final { scan-assembler "vrshr.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshr.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vrshrq_n_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshr.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vrshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a)
  {
!   return vrshrq_n_u32 (a, 32);
  }
  
- /* { dg-final { scan-assembler "vrshr.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!   return vrshrq (a, 32);
  }
  
! /* { dg-final { scan-assembler "vrshr.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshr.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a)
  {
!   return vrshrq_n_u32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshr.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!   return vrshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a)
  {
!   return vrshrq_n_u8 (a, 8);
  }
  
- /* { dg-final { scan-assembler "vrshr.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!   return vrshrq (a, 8);
  }
  
! /* { dg-final { scan-assembler "vrshr.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshr.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a)
  {
!   return vrshrq_n_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshr.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!   return vrshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_s16 (a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_s16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_s32 (a, 32, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 32, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_s32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_s8 (a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_s8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_u16 (a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_u32 (a, 32, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 32, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_u32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_u8 (a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_u8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry_out, mve_pred16_t p)
  {
    return vsbciq_m_s32 (inactive, a, b, carry_out, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsbcit.i32"  } } */
  
  int32x4_t
! foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry_out, mve_pred16_t p)
  {
    return vsbciq_m (inactive, a, b, carry_out, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsbcit.i32"  } } */
--- 1,57 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsbcit.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry_out, mve_pred16_t p)
  {
    return vsbciq_m_s32 (inactive, a, b, carry_out, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsbcit.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry_out, mve_pred16_t p)
  {
    return vsbciq_m (inactive, a, b, carry_out, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry_out, mve_pred16_t p)
  {
    return vsbciq_m_u32 (inactive, a, b, carry_out, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsbcit.i32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry_out, mve_pred16_t p)
  {
    return vsbciq_m (inactive, a, b, carry_out, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsbcit.i32"  }  } */
--- 1,57 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsbcit.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry_out, mve_pred16_t p)
  {
    return vsbciq_m_u32 (inactive, a, b, carry_out, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsbcit.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry_out, mve_pred16_t p)
  {
    return vsbciq_m (inactive, a, b, carry_out, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, unsigned * carry_out)
  {
    return vsbciq_s32 (a, b, carry_out);
  }
  
- /* { dg-final { scan-assembler "vsbci.i32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, unsigned * carry_out)
  {
!   return vsbciq_s32 (a, b, carry_out);
  }
  
! /* { dg-final { scan-assembler "vsbci.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsbci.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t a, int32x4_t b, unsigned *carry_out)
  {
    return vsbciq_s32 (a, b, carry_out);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsbci.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, unsigned *carry_out)
  {
!   return vsbciq (a, b, carry_out);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, unsigned * carry_out)
  {
    return vsbciq_u32 (a, b, carry_out);
  }
  
- /* { dg-final { scan-assembler "vsbci.i32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, unsigned * carry_out)
  {
!   return vsbciq_u32 (a, b, carry_out);
  }
  
! /* { dg-final { scan-assembler "vsbci.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsbci.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, unsigned *carry_out)
  {
    return vsbciq_u32 (a, b, carry_out);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsbci.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, unsigned *carry_out)
  {
!   return vsbciq (a, b, carry_out);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry, mve_pred16_t p)
  {
!     return vsbcq_m_s32 (inactive, a, b, carry, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsbct.i32"  }  } */
  
  int32x4_t
! foo1(int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry, mve_pred16_t p)
  {
!     return vsbcq_m (inactive, a, b, carry, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsbct.i32"  }  } */
--- 1,77 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsbct.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t p)
  {
!   return vsbcq_m_s32 (inactive, a, b, carry, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsbct.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t p)
  {
!   return vsbcq_m (inactive, a, b, carry, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry, mve_pred16_t p)
  {
!     return vsbcq_m_u32 (inactive, a, b, carry, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsbct.i32"  }  } */
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry, mve_pred16_t p)
  {
!     return vsbcq_m (inactive, a, b, carry, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsbct.i32"  }  } */
--- 1,77 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsbct.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred16_t p)
  {
!   return vsbcq_m_u32 (inactive, a, b, carry, p);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
! **	...
! **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
! **	...
! **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
! **	...
! **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vsbct.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
! **	...
! **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
! **	...
! */
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred16_t p)
  {
!   return vsbcq_m (inactive, a, b, carry, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, unsigned * carry)
  {
    return vsbcq_s32 (a, b, carry);
  }
  
- /* { dg-final { scan-assembler "vsbc.i32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, unsigned * carry)
  {
    return vsbcq (a, b, carry);
  }
  
! /* { dg-final { scan-assembler "vsbc.i32"  }  } */
--- 1,69 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vsbc.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t a, int32x4_t b, unsigned *carry)
  {
    return vsbcq_s32 (a, b, carry);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vsbc.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, unsigned *carry)
  {
    return vsbcq (a, b, carry);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, unsigned * carry)
  {
    return vsbcq_u32 (a, b, carry);
  }
  
- /* { dg-final { scan-assembler "vsbc.i32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, unsigned * carry)
  {
    return vsbcq (a, b, carry);
  }
  
! /* { dg-final { scan-assembler "vsbc.i32"  }  } */
--- 1,69 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vsbc.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, unsigned *carry)
  {
    return vsbcq_u32 (a, b, carry);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vsbc.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, unsigned *carry)
  {
    return vsbcq (a, b, carry);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo (float16_t a, float16x8_t b)
- {
-   return vsetq_lane (23.26, b, 0);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16_t a, float16x8_t b)
  {
!     return vsetq_lane_f16 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler "vmov.16"  }  } */
  
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov.16	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16_t a, float16x8_t b)
  {
!   return vsetq_lane_f16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov.16	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float16x8_t
+ foo1 (float16_t a, float16x8_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmov.16	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float16x8_t
+ foo2 (float16x8_t b)
+ {
+   return vsetq_lane (1.1, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo (float32_t a, float32x4_t b)
- {
-     return vsetq_lane (23.34, b, 0);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32_t a, float32x4_t b)
  {
!     return vsetq_lane_f32 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler "vmov.32"  }  } */
  
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov.32	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32_t a, float32x4_t b)
  {
!   return vsetq_lane_f32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov.32	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float32x4_t
+ foo1 (float32_t a, float32x4_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmov.32	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float32x4_t
+ foo2 (float32x4_t b)
+ {
+   return vsetq_lane (1.1, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16_t a, int16x8_t b)
  {
!     return vsetq_lane_s16 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler "vmov.16"  }  } */
  
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov.16	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16_t a, int16x8_t b)
  {
!   return vsetq_lane_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov.16	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ int16x8_t
+ foo1 (int16_t a, int16x8_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32_t a, int32x4_t b)
  {
!     return vsetq_lane_s32 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler "vmov.32"  }  } */
  
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov.32	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32_t a, int32x4_t b)
  {
!   return vsetq_lane_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov.32	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ int32x4_t
+ foo1 (int32_t a, int32x4_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,16 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
- /* { dg-require-effective-target arm_hard_ok } */
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
! /* { dg-additional-options "-mfloat-abi=hard -O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int64_t a, int64x2_t b)
  {
!     return vsetq_lane_s64 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler {vmov\td0, r[1-9]*[0-9], r[1-9]*[0-9]}  }  } */
  
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
! /* { dg-additional-options "-O2" } */
! /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov	d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int64_t a, int64x2_t b)
  {
!   return vsetq_lane_s64 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov	d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ int64x2_t
+ foo1 (int64_t a, int64x2_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8_t a, int8x16_t b)
  {
!     return vsetq_lane_s8 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler "vmov.8"  }  } */
  
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov.8	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8_t a, int8x16_t b)
  {
!   return vsetq_lane_s8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov.8	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ int8x16_t
+ foo1 (int8_t a, int8x16_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16_t a, uint16x8_t b)
  {
!     return vsetq_lane_u16 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler "vmov.16"  }  } */
  
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov.16	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16_t a, uint16x8_t b)
  {
!   return vsetq_lane_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov.16	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16_t a, uint16x8_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmov.16	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo2 (uint16x8_t b)
+ {
+   return vsetq_lane (1, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a, uint32x4_t b)
  {
!     return vsetq_lane_u32 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler "vmov.32"  }  } */
  
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov.32	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a, uint32x4_t b)
  {
!   return vsetq_lane_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov.32	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32_t a, uint32x4_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmov.32	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo2 (uint32x4_t b)
+ {
+   return vsetq_lane (1, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,16 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
- /* { dg-require-effective-target arm_hard_ok } */
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
! /* { dg-additional-options "-mfloat-abi=hard -O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint64_t a, uint64x2_t b)
  {
!     return vsetq_lane_u64 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler {vmov\td0, r[1-9]*[0-9], r[1-9]*[0-9]}  }  } */
  
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
! /* { dg-additional-options "-O2" } */
! /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov	d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint64_t a, uint64x2_t b)
  {
!   return vsetq_lane_u64 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov	d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint64x2_t
+ foo1 (uint64_t a, uint64x2_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmov	d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint64x2_t
+ foo2 (uint64x2_t b)
+ {
+   return vsetq_lane (1, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8_t a, uint8x16_t b)
  {
!     return vsetq_lane_u8 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler "vmov.8"  }  } */
  
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov.8	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8_t a, uint8x16_t b)
  {
!   return vsetq_lane_u8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov.8	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8_t a, uint8x16_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmov.8	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo2 (uint8x16_t b)
+ {
+   return vsetq_lane (1, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, uint32_t * b, mve_pred16_t p)
  {
!   return vshlcq_m_s16 (a, b, 32, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlct"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, uint32_t * b, mve_pred16_t p)
  {
!   return vshlcq_m (a, b, 32, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlct"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t a, uint32_t *b, mve_pred16_t p)
  {
!   return vshlcq_m_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t a, uint32_t *b, mve_pred16_t p)
  {
!   return vshlcq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlct"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlct"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m_s8 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlct"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlct"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m_s8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16x8_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m_u16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlct"  }  } */
  
  uint16x8_t
! foo1 (uint16x8_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlct"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16x8_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint16x8_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m_u32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlct"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlct"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8x16_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m_u8 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlct"  }  } */
  
  uint8x16_t
! foo1 (uint8x16_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlct"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8x16_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m_u8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo1 (uint8x16_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, uint32_t * b)
  {
    return vshlcq_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vshlc"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, uint32_t * b)
  {
    return vshlcq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vshlc"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t a, uint32_t *b)
  {
    return vshlcq_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t a, uint32_t *b)
  {
    return vshlcq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, uint32_t * b)
  {
    return vshlcq_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vshlc"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, uint32_t * b)
  {
    return vshlcq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vshlc"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t a, uint32_t *b)
  {
    return vshlcq_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t a, uint32_t *b)
  {
    return vshlcq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, uint32_t * b)
  {
    return vshlcq_s8 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vshlc"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, uint32_t * b)
  {
    return vshlcq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vshlc"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t a, uint32_t *b)
  {
    return vshlcq_s8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t a, uint32_t *b)
  {
    return vshlcq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16x8_t a, uint32_t * b)
  {
    return vshlcq_u16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vshlc"  }  } */
  
  uint16x8_t
! foo1 (uint16x8_t a, uint32_t * b)
  {
    return vshlcq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vshlc"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16x8_t a, uint32_t *b)
  {
    return vshlcq_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint16x8_t a, uint32_t *b)
  {
    return vshlcq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32_t * b)
  {
    return vshlcq_u32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vshlc"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32_t * b)
  {
    return vshlcq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vshlc"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t a, uint32_t *b)
  {
    return vshlcq_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t a, uint32_t *b)
  {
    return vshlcq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8x16_t a, uint32_t * b)
  {
    return vshlcq_u8 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vshlc"  }  } */
  
  uint8x16_t
! foo1 (uint8x16_t a, uint32_t * b)
  {
    return vshlcq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vshlc"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8x16_t a, uint32_t *b)
  {
    return vshlcq_u8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo1 (uint8x16_t a, uint32_t *b)
  {
    return vshlcq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshllbq_m_n_s16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshllbt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshllbq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshllbt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshllbq_m_n_s16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshllbq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshllbq_m_n_s8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshllbt.s8"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshllbq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshllbt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshllbq_m_n_s8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshllbq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshllbq_m_n_u16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshllbt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshllbq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshllbt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshllbq_m_n_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshllbq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshllbq_m_n_u8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshllbt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshllbq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshllbt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshllbq_m_n_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshllbq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a)
  {
    return vshllbq_n_s16 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshllb.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a)
  {
    return vshllbq (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshllb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshllb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a)
  {
    return vshllbq_n_s16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshllb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a)
  {
    return vshllbq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a)
  {
    return vshllbq_n_s8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshllb.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a)
  {
    return vshllbq (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshllb.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshllb.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a)
  {
    return vshllbq_n_s8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshllb.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a)
  {
    return vshllbq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a)
  {
    return vshllbq_n_u16 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshllb.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a)
  {
    return vshllbq (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshllb.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshllb.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a)
  {
    return vshllbq_n_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshllb.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a)
  {
    return vshllbq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a)
  {
    return vshllbq_n_u8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshllb.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a)
  {
    return vshllbq (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshllb.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshllb.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a)
  {
    return vshllbq_n_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshllb.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a)
  {
    return vshllbq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!     return vshllbq_x_n_s16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshllbt.s16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vshllbq_x_n_s16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int32x4_t
+ foo1 (int16x8_t a, mve_pred16_t p)
+ {
+   return vshllbq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!     return vshllbq_x_n_s8 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshllbt.s8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!   return vshllbq_x_n_s8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int16x8_t
+ foo1 (int8x16_t a, mve_pred16_t p)
+ {
+   return vshllbq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!     return vshllbq_x_n_u16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshllbt.u16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!   return vshllbq_x_n_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint16x8_t a, mve_pred16_t p)
+ {
+   return vshllbq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!     return vshllbq_x_n_u8 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshllbt.u8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!   return vshllbq_x_n_u8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint8x16_t a, mve_pred16_t p)
+ {
+   return vshllbq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshlltq_m_n_s16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlltt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshlltq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlltt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshlltq_m_n_s16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshlltq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshlltq_m_n_s8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlltt.s8"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshlltq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlltt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshlltq_m_n_s8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshlltq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshlltq_m_n_u16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlltt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshlltq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlltt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshlltq_m_n_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshlltq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshlltq_m_n_u8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlltt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshlltq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlltt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshlltq_m_n_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshlltq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a)
  {
    return vshlltq_n_s16 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshllt.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a)
  {
    return vshlltq (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshllt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshllt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a)
  {
    return vshlltq_n_s16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshllt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a)
  {
    return vshlltq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a)
  {
    return vshlltq_n_s8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshllt.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a)
  {
    return vshlltq (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshllt.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshllt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a)
  {
    return vshlltq_n_s8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshllt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a)
  {
    return vshlltq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a)
  {
    return vshlltq_n_u16 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshllt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a)
  {
    return vshlltq (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshllt.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshllt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a)
  {
    return vshlltq_n_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshllt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a)
  {
    return vshlltq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a)
  {
    return vshlltq_n_u8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshllt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a)
  {
    return vshlltq (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshllt.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshllt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a)
  {
    return vshlltq_n_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshllt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a)
  {
    return vshlltq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!     return vshlltq_x_n_s16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlltt.s16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vshlltq_x_n_s16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int32x4_t
+ foo1 (int16x8_t a, mve_pred16_t p)
+ {
+   return vshlltq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!     return vshlltq_x_n_s8 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlltt.s8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!   return vshlltq_x_n_s8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int16x8_t
+ foo1 (int8x16_t a, mve_pred16_t p)
+ {
+   return vshlltq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!     return vshlltq_x_n_u16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlltt.u16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!   return vshlltq_x_n_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint16x8_t a, mve_pred16_t p)
+ {
+   return vshlltq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!     return vshlltq_x_n_u8 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlltt.u8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!   return vshlltq_x_n_u8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint8x16_t a, mve_pred16_t p)
+ {
+   return vshlltq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshlq_m_n_s16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshlq_m_n_s16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vshlq_m_n_s32 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vshlq_m_n_s32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshlq_m_n_s8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshlq_m_n_s8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshlq_m_n_u16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshlq_m_n_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vshlq_m_n_u32 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vshlq_m_n_u32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshlq_m_n_u8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshlq_m_n_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vshlq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vshlq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vshlq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vshlq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vshlq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vshlq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vshlq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vshlq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vshlq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vshlq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vshlq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vshlq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vshlq_n_s16 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vshlq_n_s16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
!   return vshlq_n_s32 (a, 16);
  }
  
- /* { dg-final { scan-assembler "vshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
!   return vshlq_n (a, 16);
  }
  
! /* { dg-final { scan-assembler "vshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
!   return vshlq_n_s32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
!   return vshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vshlq_n_s8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vshlq_n_s8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vshlq_n_u16 (a, 11);
  }
  
- /* { dg-final { scan-assembler "vshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vshlq_n (a, 11);
  }
  
! /* { dg-final { scan-assembler "vshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vshlq_n_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a)
  {
    return vshlq_n_u32 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a)
  {
    return vshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a)
  {
    return vshlq_n_u32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a)
  {
    return vshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a)
  {
    return vshlq_n_u8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a)
  {
    return vshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a)
  {
    return vshlq_n_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a)
  {
    return vshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vshlq_r_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vshlq_r_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vshlq_r_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vshlq_r_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vshlq_r_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vshlq_r_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vshlq_r_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vshlq_r_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vshlq_r_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vshlq_r_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vshlq_r_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vshlq_r_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vshlq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vshlq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vshlq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vshlq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vshlq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vshlq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vshlq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vshlq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vshlq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vshlq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vshlq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vshlq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!     return vshlq_x_n_s16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vshlq_x_n_s16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int16x8_t
+ foo1 (int16x8_t a, mve_pred16_t p)
+ {
+   return vshlq_x_n (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
!     return vshlq_x_n_s32 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s32"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
!   return vshlq_x_n_s32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int32x4_t
+ foo1 (int32x4_t a, mve_pred16_t p)
+ {
+   return vshlq_x_n (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!     return vshlq_x_n_s8 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!   return vshlq_x_n_s8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int8x16_t
+ foo1 (int8x16_t a, mve_pred16_t p)
+ {
+   return vshlq_x_n (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!     return vshlq_x_n_u16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!   return vshlq_x_n_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t a, mve_pred16_t p)
+ {
+   return vshlq_x_n (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
!     return vshlq_x_n_u32 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u32"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
!   return vshlq_x_n_u32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32x4_t a, mve_pred16_t p)
+ {
+   return vshlq_x_n (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!     return vshlq_x_n_u8 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!   return vshlq_x_n_u8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t a, mve_pred16_t p)
+ {
+   return vshlq_x_n (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!     return vshlq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshlq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ int16x8_t
+ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
+ {
+   return vshlq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!     return vshlq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s32"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshlq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ int32x4_t
+ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
+ {
+   return vshlq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!     return vshlq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vshlq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ int8x16_t
+ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
+ {
+   return vshlq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!     return vshlq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshlq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p)
+ {
+   return vshlq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!     return vshlq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u32"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshlq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p)
+ {
+   return vshlq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!     return vshlq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vshlq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p)
+ {
+   return vshlq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshrnbq_m_n_s16 (a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrnbt.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshrnbq_m (a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrnbt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrnbt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshrnbq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrnbt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshrnbq_m_n_s32 (a, b, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrnbt.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshrnbq_m (a, b, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrnbt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrnbt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshrnbq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrnbt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vshrnbq_m_n_u16 (a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrnbt.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vshrnbq_m (a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrnbt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrnbt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vshrnbq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrnbt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vshrnbq_m_n_u32 (a, b, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrnbt.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vshrnbq_m (a, b, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrnbt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrnbt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vshrnbq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrnbt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
!   return vshrnbq_n_s16 (a, b, 8);
  }
  
- /* { dg-final { scan-assembler "vshrnb.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
!   return vshrnbq (a, b, 8);
  }
  
! /* { dg-final { scan-assembler "vshrnb.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshrnb.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
!   return vshrnbq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshrnb.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
!   return vshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
!   return vshrnbq_n_s32 (a, b, 16);
  }
  
- /* { dg-final { scan-assembler "vshrnb.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
!   return vshrnbq (a, b, 16);
  }
  
! /* { dg-final { scan-assembler "vshrnb.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshrnb.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
!   return vshrnbq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshrnb.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
!   return vshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
!   return vshrnbq_n_u16 (a, b, 8);
  }
  
- /* { dg-final { scan-assembler "vshrnb.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
!   return vshrnbq (a, b, 8);
  }
  
! /* { dg-final { scan-assembler "vshrnb.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshrnb.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
!   return vshrnbq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshrnb.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
!   return vshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
!   return vshrnbq_n_u32 (a, b, 16);
  }
  
- /* { dg-final { scan-assembler "vshrnb.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
!   return vshrnbq (a, b, 16);
  }
  
! /* { dg-final { scan-assembler "vshrnb.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshrnb.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
!   return vshrnbq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshrnb.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
!   return vshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshrntq_m_n_s16 (a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrntt.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshrntq_m (a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrntt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrntt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshrntq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrntt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshrntq_m_n_s32 (a, b, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrntt.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshrntq_m (a, b, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrntt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrntt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshrntq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrntt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vshrntq_m_n_u16 (a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrntt.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vshrntq_m (a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrntt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrntt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vshrntq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrntt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vshrntq_m_n_u32 (a, b, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrntt.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vshrntq_m (a, b, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrntt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrntt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vshrntq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrntt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
!   return vshrntq_n_s16 (a, b, 8);
  }
  
- /* { dg-final { scan-assembler "vshrnt.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
!   return vshrntq (a, b, 8);
  }
  
! /* { dg-final { scan-assembler "vshrnt.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshrnt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
!   return vshrntq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshrnt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
!   return vshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
!   return vshrntq_n_s32 (a, b, 16);
  }
  
- /* { dg-final { scan-assembler "vshrnt.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
!   return vshrntq (a, b, 16);
  }
  
! /* { dg-final { scan-assembler "vshrnt.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshrnt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
!   return vshrntq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshrnt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
!   return vshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
!   return vshrntq_n_u16 (a, b, 8);
  }
  
- /* { dg-final { scan-assembler "vshrnt.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
!   return vshrntq (a, b, 8);
  }
  
! /* { dg-final { scan-assembler "vshrnt.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshrnt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
!   return vshrntq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshrnt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
!   return vshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
!   return vshrntq_n_u32 (a, b, 16);
  }
  
- /* { dg-final { scan-assembler "vshrnt.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
!   return vshrntq (a, b, 16);
  }
  
! /* { dg-final { scan-assembler "vshrnt.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshrnt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
!   return vshrntq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshrnt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
!   return vshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_s16 (inactive, a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_s16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_s32 (inactive, a, 32, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 32, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_s32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_s8 (inactive, a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_s8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_u16 (inactive, a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_u32 (inactive, a, 32, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 32, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_u32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_u8 (inactive, a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
!   return vshrq_n_s16 (a, 16);
  }
  
- /* { dg-final { scan-assembler "vshr.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
!   return vshrq (a, 16);
  }
  
! /* { dg-final { scan-assembler "vshr.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshr.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
!   return vshrq_n_s16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshr.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
!   return vshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
!   return vshrq_n_s32 (a, 32);
  }
  
- /* { dg-final { scan-assembler "vshr.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
!   return vshrq (a, 32);
  }
  
! /* { dg-final { scan-assembler "vshr.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshr.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
!   return vshrq_n_s32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshr.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
!   return vshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
!   return vshrq_n_s8 (a, 8);
  }
  
- /* { dg-final { scan-assembler "vshr.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
!   return vshrq (a, 8);
  }
  
! /* { dg-final { scan-assembler "vshr.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshr.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
!   return vshrq_n_s8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshr.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
!   return vshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vshrq_n_u16 (a, 16);
  }
  
- /* { dg-final { scan-assembler "vshr.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vshrq (a, 16);
  }
  
! /* { dg-final { scan-assembler "vshr.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshr.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vshrq_n_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshr.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a)
  {
!   return vshrq_n_u32 (a, 32);
  }
  
- /* { dg-final { scan-assembler "vshr.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!   return vshrq (a, 32);
  }
  
! /* { dg-final { scan-assembler "vshr.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshr.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a)
  {
!   return vshrq_n_u32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshr.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!   return vshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a)
  {
!   return vshrq_n_u8 (a, 8);
  }
  
- /* { dg-final { scan-assembler "vshr.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!   return vshrq (a, 8);
  }
  
! /* { dg-final { scan-assembler "vshr.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshr.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a)
  {
!   return vshrq_n_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshr.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!   return vshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!     return vshrq_x_n_s16 (a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.s16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vshrq_x_n_s16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int16x8_t
+ foo1 (int16x8_t a, mve_pred16_t p)
+ {
+   return vshrq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
!     return vshrq_x_n_s32 (a, 32, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.s32"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
!   return vshrq_x_n_s32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int32x4_t
+ foo1 (int32x4_t a, mve_pred16_t p)
+ {
+   return vshrq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!     return vshrq_x_n_s8 (a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.s8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!   return vshrq_x_n_s8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int8x16_t
+ foo1 (int8x16_t a, mve_pred16_t p)
+ {
+   return vshrq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!     return vshrq_x_n_u16 (a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.u16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!   return vshrq_x_n_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t a, mve_pred16_t p)
+ {
+   return vshrq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!     return vshrq_x_n_u8 (a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.u8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!   return vshrq_x_n_u8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t a, mve_pred16_t p)
+ {
+   return vshrq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_s16 (a, b, 15, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vslit.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 15, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vslit.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_s32 (a, b, 31, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vslit.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 31, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vslit.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_s8 (a, b, 7, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vslit.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 7, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vslit.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_s8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_u16 (a, b, 15, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vslit.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 15, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vslit.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_u32 (a, b, 31, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vslit.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 31, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vslit.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_u8 (a, b, 7, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vslit.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 7, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vslit.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_u8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
!   return vsliq_n_s16 (a, b, 15);
  }
  
- /* { dg-final { scan-assembler "vsli.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
!   return vsliq (a, b, 15);
  }
  
! /* { dg-final { scan-assembler "vsli.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsli.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
!   return vsliq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsli.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
!   return vsliq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
!   return vsliq_n_s32 (a, b, 31);
  }
  
- /* { dg-final { scan-assembler "vsli.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
!   return vsliq (a, b, 31);
  }
  
! /* { dg-final { scan-assembler "vsli.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsli.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
!   return vsliq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsli.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
!   return vsliq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
!   return vsliq_n_s8 (a, b, 7);
  }
  
- /* { dg-final { scan-assembler "vsli.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
!   return vsliq (a, b, 7);
  }
  
! /* { dg-final { scan-assembler "vsli.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsli.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
!   return vsliq_n_s8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsli.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
!   return vsliq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
!   return vsliq_n_u16 (a, b, 15);
  }
  
- /* { dg-final { scan-assembler "vsli.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
!   return vsliq (a, b, 15);
  }
  
! /* { dg-final { scan-assembler "vsli.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsli.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
!   return vsliq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsli.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
!   return vsliq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
!   return vsliq_n_u32 (a, b, 31);
  }
  
- /* { dg-final { scan-assembler "vsli.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
!   return vsliq (a, b, 31);
  }
  
! /* { dg-final { scan-assembler "vsli.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsli.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
!   return vsliq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsli.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
!   return vsliq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
!   return vsliq_n_u8 (a, b, 7);
  }
  
- /* { dg-final { scan-assembler "vsli.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
!   return vsliq (a, b, 7);
  }
  
! /* { dg-final { scan-assembler "vsli.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsli.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
!   return vsliq_n_u8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsli.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
!   return vsliq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_s16 (a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsrit.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_s32 (a, b, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsrit.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_s8 (a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsrit.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_s8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_u16 (a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsrit.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_u32 (a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsrit.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_u8 (a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsrit.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_u8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
!   return vsriq_n_s16 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "vsri.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
!   return vsriq (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "vsri.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsri.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
!   return vsriq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsri.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
!   return vsriq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
!   return vsriq_n_s32 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "vsri.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
!   return vsriq (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "vsri.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsri.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
!   return vsriq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsri.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
!   return vsriq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
!   return vsriq_n_s8 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "vsri.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
!   return vsriq (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "vsri.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsri.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
!   return vsriq_n_s8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsri.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
!   return vsriq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
!   return vsriq_n_u16 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "vsri.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
!   return vsriq (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "vsri.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsri.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
!   return vsriq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsri.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
!   return vsriq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
!   return vsriq_n_u32 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "vsri.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
!   return vsriq (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "vsri.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsri.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
!   return vsriq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsri.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
!   return vsriq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
!   return vsriq_n_u8 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "vsri.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
!   return vsriq (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "vsri.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsri.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
!   return vsriq_n_u8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsri.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
!   return vsriq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! void
! foo (float16_t * addr, float16x8_t value)
! {
!   vst1q_f16 (addr, value);
! }
  
  void
! foo1 (float16_t * addr, float16x8_t value)
  {
!   vst1q (addr, value);
  }
  
- /* { dg-final { scan-assembler-times "vstrh.16" 2 }  } */
  
  void
! foo2 (float16_t a, float16x8_t x)
  {
!   vst1q (&a, x);
  }
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float16_t *base, float16x8_t value)
  {
!   return vst1q_f16 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float16_t *base, float16x8_t value)
  {
!   return vst1q (base, value);
  }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * addr, float32x4_t value)
  {
!   vst1q_f32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (float32_t * addr, float32x4_t value)
  {
!   vst1q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float32_t *base, float32x4_t value)
  {
!   return vst1q_f32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float32_t *base, float32x4_t value)
  {
!   return vst1q (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float16_t * addr, float16x8_t value, mve_pred16_t p)
  {
!   vst1q_p_f16 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (float16_t * addr, float16x8_t value, mve_pred16_t p)
  {
!   vst1q_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float16_t *base, float16x8_t value, mve_pred16_t p)
  {
!   return vst1q_p_f16 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float16_t *base, float16x8_t value, mve_pred16_t p)
  {
!   return vst1q_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * addr, float32x4_t value, mve_pred16_t p)
  {
!   vst1q_p_f32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (float32_t * addr, float32x4_t value, mve_pred16_t p)
  {
!   vst1q_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float32_t *base, float32x4_t value, mve_pred16_t p)
  {
!   return vst1q_p_f32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float32_t *base, float32x4_t value, mve_pred16_t p)
  {
!   return vst1q_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * addr, int16x8_t value, mve_pred16_t p)
  {
!   vst1q_p_s16 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (int16_t * addr, int16x8_t value, mve_pred16_t p)
  {
!   vst1q_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, int16x8_t value, mve_pred16_t p)
  {
!   return vst1q_p_s16 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, int16x8_t value, mve_pred16_t p)
  {
!   return vst1q_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * addr, int32x4_t value, mve_pred16_t p)
  {
!   vst1q_p_s32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (int32_t * addr, int32x4_t value, mve_pred16_t p)
  {
!   vst1q_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int32_t *base, int32x4_t value, mve_pred16_t p)
  {
!   return vst1q_p_s32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int32_t *base, int32x4_t value, mve_pred16_t p)
  {
!   return vst1q_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * addr, int8x16_t value, mve_pred16_t p)
  {
!   vst1q_p_s8 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.8"  }  } */
  
  void
! foo1 (int8_t * addr, int8x16_t value, mve_pred16_t p)
  {
!   vst1q_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, int8x16_t value, mve_pred16_t p)
  {
!   return vst1q_p_s8 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, int8x16_t value, mve_pred16_t p)
  {
!   return vst1q_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * addr, uint16x8_t value, mve_pred16_t p)
  {
!   vst1q_p_u16 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (uint16_t * addr, uint16x8_t value, mve_pred16_t p)
  {
!   vst1q_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint16x8_t value, mve_pred16_t p)
  {
!   return vst1q_p_u16 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint16x8_t value, mve_pred16_t p)
  {
!   return vst1q_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * addr, uint32x4_t value, mve_pred16_t p)
  {
!   vst1q_p_u32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (uint32_t * addr, uint32x4_t value, mve_pred16_t p)
  {
!   vst1q_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint32_t *base, uint32x4_t value, mve_pred16_t p)
  {
!   return vst1q_p_u32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32_t *base, uint32x4_t value, mve_pred16_t p)
  {
!   return vst1q_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * addr, uint8x16_t value, mve_pred16_t p)
  {
!   vst1q_p_u8 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.8"  }  } */
  
  void
! foo1 (uint8_t * addr, uint8x16_t value, mve_pred16_t p)
  {
!   vst1q_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint8x16_t value, mve_pred16_t p)
  {
!   return vst1q_p_u8 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint8x16_t value, mve_pred16_t p)
  {
!   return vst1q_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! void
! foo (int16_t * addr, int16x8_t value)
! {
!   vst1q_s16 (addr, value);
! }
  
  void
! foo1 (int16_t * addr, int16x8_t value)
  {
!   vst1q (addr, value);
  }
  
- /* { dg-final { scan-assembler-times "vstrh.16" 2 }  } */
  
  void
! foo2 (int16_t a, int16x8_t x)
  {
!   vst1q (&a, x);
  }
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, int16x8_t value)
  {
!   return vst1q_s16 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, int16x8_t value)
  {
!   return vst1q (base, value);
  }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * addr, int32x4_t value)
  {
!   vst1q_s32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (int32_t * addr, int32x4_t value)
  {
!   vst1q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int32_t *base, int32x4_t value)
  {
!   return vst1q_s32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int32_t *base, int32x4_t value)
  {
!   return vst1q (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! void
! foo (int8_t * addr, int8x16_t value)
! {
!   vst1q_s8 (addr, value);
! }
  
  void
! foo1 (int8_t * addr, int8x16_t value)
  {
!   vst1q (addr, value);
  }
  
- /* { dg-final { scan-assembler-times "vstrb.8" 2 }  } */
  
  void
! foo2 (int8_t a, int8x16_t x)
  {
!   vst1q (&a, x);
  }
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, int8x16_t value)
  {
!   return vst1q_s8 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, int8x16_t value)
  {
!   return vst1q (base, value);
  }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! void
! foo (uint16_t * addr, uint16x8_t value)
! {
!   vst1q_u16 (addr, value);
! }
  
  void
! foo1 (uint16_t * addr, uint16x8_t value)
  {
!   vst1q (addr, value);
  }
  
- /* { dg-final { scan-assembler-times "vstrh.16" 2 }  } */
  
  void
! foo2 (uint16_t a, uint16x8_t x)
  {
!   vst1q (&a, x);
  }
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint16x8_t value)
  {
!   return vst1q_u16 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint16x8_t value)
  {
!   return vst1q (base, value);
  }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * addr, uint32x4_t value)
  {
!   vst1q_u32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (uint32_t * addr, uint32x4_t value)
  {
!   vst1q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint32_t *base, uint32x4_t value)
  {
!   return vst1q_u32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32_t *base, uint32x4_t value)
  {
!   return vst1q (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! void
! foo (uint8_t * addr, uint8x16_t value)
! {
!   vst1q_u8 (addr, value);
! }
  
  void
! foo1 (uint8_t * addr, uint8x16_t value)
  {
!   vst1q (addr, value);
  }
  
- /* { dg-final { scan-assembler-times "vstrb.8" 2 }  } */
  
  void
! foo2 (uint8_t a, uint8x16_t x)
  {
!   vst1q (&a, x);
  }
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint8x16_t value)
  {
!   return vst1q_u8 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint8x16_t value)
  {
!   return vst1q (base, value);
  }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float16_t * addr, float16x8x2_t value)
  {
!   vst2q_f16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst20.16"  }  } */
- /* { dg-final { scan-assembler "vst21.16"  }  } */
  
  void
! foo1 (float16_t * addr, float16x8x2_t value)
  {
!   vst2q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst20.16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float16_t *addr, float16x8x2_t value)
  {
!   return vst2q_f16 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float16_t *addr, float16x8x2_t value)
  {
!   return vst2q (addr, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * addr, float32x4x2_t value)
  {
!   vst2q_f32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst20.32"  }  } */
- /* { dg-final { scan-assembler "vst21.32"  }  } */
  
  void
! foo1 (float32_t * addr, float32x4x2_t value)
  {
!   vst2q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst20.32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float32_t *addr, float32x4x2_t value)
  {
!   return vst2q_f32 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float32_t *addr, float32x4x2_t value)
  {
!   return vst2q (addr, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * addr, int16x8x2_t value)
  {
!   vst2q_s16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst20.16"  }  } */
- /* { dg-final { scan-assembler "vst21.16"  }  } */
  
  void
! foo1 (int16_t * addr, int16x8x2_t value)
  {
!   vst2q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst20.16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *addr, int16x8x2_t value)
  {
!   return vst2q_s16 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *addr, int16x8x2_t value)
  {
!   return vst2q (addr, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * addr, int32x4x2_t value)
  {
!   vst2q_s32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst20.32"  }  } */
- /* { dg-final { scan-assembler "vst21.32"  }  } */
  
  void
! foo1 (int32_t * addr, int32x4x2_t value)
  {
!   vst2q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst20.32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int32_t *addr, int32x4x2_t value)
  {
!   return vst2q_s32 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int32_t *addr, int32x4x2_t value)
  {
!   return vst2q (addr, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * addr, int8x16x2_t value)
  {
!   vst2q_s8 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst20.8"  }  } */
- /* { dg-final { scan-assembler "vst21.8"  }  } */
  
  void
! foo1 (int8_t * addr, int8x16x2_t value)
  {
!   vst2q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst20.8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst20.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *addr, int8x16x2_t value)
  {
!   return vst2q_s8 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst20.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *addr, int8x16x2_t value)
  {
!   return vst2q (addr, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * addr, uint16x8x2_t value)
  {
!   vst2q_u16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst20.16"  }  } */
- /* { dg-final { scan-assembler "vst21.16"  }  } */
  
  void
! foo1 (uint16_t * addr, uint16x8x2_t value)
  {
!   vst2q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst20.16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *addr, uint16x8x2_t value)
  {
!   return vst2q_u16 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *addr, uint16x8x2_t value)
  {
!   return vst2q (addr, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * addr, uint32x4x2_t value)
  {
!   vst2q_u32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst20.32"  }  } */
- /* { dg-final { scan-assembler "vst21.32"  }  } */
  
  void
! foo1 (uint32_t * addr, uint32x4x2_t value)
  {
!   vst2q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst20.32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint32_t *addr, uint32x4x2_t value)
  {
!   return vst2q_u32 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32_t *addr, uint32x4x2_t value)
  {
!   return vst2q (addr, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * addr, uint8x16x2_t value)
  {
!   vst2q_u8 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst20.8"  }  } */
- /* { dg-final { scan-assembler "vst21.8"  }  } */
  
  void
! foo1 (uint8_t * addr, uint8x16x2_t value)
  {
!   vst2q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst20.8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst20.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *addr, uint8x16x2_t value)
  {
!   return vst2q_u8 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst20.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *addr, uint8x16x2_t value)
  {
!   return vst2q (addr, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,37 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float16_t * addr, float16x8x4_t value)
  {
!   vst4q_f16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst40.16"  }  } */
- /* { dg-final { scan-assembler "vst41.16"  }  } */
- /* { dg-final { scan-assembler "vst42.16"  }  } */
- /* { dg-final { scan-assembler "vst43.16"  }  } */
  
  void
! foo1 (float16_t * addr, float16x8x4_t value)
  {
!   vst4q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst40.16"  }  } */
! /* { dg-final { scan-assembler "vst41.16"  }  } */
! /* { dg-final { scan-assembler "vst42.16"  }  } */
! /* { dg-final { scan-assembler "vst43.16"  }  } */
! 
! void
! foo2 (float16_t * addr, float16x8x4_t value)
! {
!   vst4q_f16 (addr, value);
!   addr += 32;
!   vst4q_f16 (addr, value);
  }
  
! /* { dg-final { scan-assembler {vst43.16\s\{.*\}, \[.*\]!}  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo (float16_t *addr, float16x8x4_t value)
  {
!   return vst4q_f16 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo1 (float16_t *addr, float16x8x4_t value)
  {
!   return vst4q (addr, value);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,37 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * addr, float32x4x4_t value)
  {
!   vst4q_f32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst40.32"  }  } */
- /* { dg-final { scan-assembler "vst41.32"  }  } */
- /* { dg-final { scan-assembler "vst42.32"  }  } */
- /* { dg-final { scan-assembler "vst43.32"  }  } */
  
  void
! foo1 (float32_t * addr, float32x4x4_t value)
  {
!   vst4q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst40.32"  }  } */
! /* { dg-final { scan-assembler "vst41.32"  }  } */
! /* { dg-final { scan-assembler "vst42.32"  }  } */
! /* { dg-final { scan-assembler "vst43.32"  }  } */
! 
! void
! foo2 (float32_t * addr, float32x4x4_t value)
! {
!   vst4q_f32 (addr, value);
!   addr += 16;
!   vst4q_f32 (addr, value);
  }
  
! /* { dg-final { scan-assembler {vst43.32\s\{.*\}, \[.*\]!}  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo (float32_t *addr, float32x4x4_t value)
  {
!   return vst4q_f32 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo1 (float32_t *addr, float32x4x4_t value)
  {
!   return vst4q (addr, value);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,37 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * addr, int16x8x4_t value)
  {
!   vst4q_s16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst40.16"  }  } */
- /* { dg-final { scan-assembler "vst41.16"  }  } */
- /* { dg-final { scan-assembler "vst42.16"  }  } */
- /* { dg-final { scan-assembler "vst43.16"  }  } */
  
  void
! foo1 (int16_t * addr, int16x8x4_t value)
  {
!   vst4q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst40.16"  }  } */
! /* { dg-final { scan-assembler "vst41.16"  }  } */
! /* { dg-final { scan-assembler "vst42.16"  }  } */
! /* { dg-final { scan-assembler "vst43.16"  }  } */
! 
! void
! foo2 (int16_t * addr, int16x8x4_t value)
! {
!   vst4q_s16 (addr, value);
!   addr += 32;
!   vst4q_s16 (addr, value);
  }
  
! /* { dg-final { scan-assembler {vst43.16\s\{.*\}, \[.*\]!}  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo (int16_t *addr, int16x8x4_t value)
  {
!   return vst4q_s16 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo1 (int16_t *addr, int16x8x4_t value)
  {
!   return vst4q (addr, value);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,37 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * addr, int32x4x4_t value)
  {
!   vst4q_s32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst40.32"  }  } */
- /* { dg-final { scan-assembler "vst41.32"  }  } */
- /* { dg-final { scan-assembler "vst42.32"  }  } */
- /* { dg-final { scan-assembler "vst43.32"  }  } */
  
  void
! foo1 (int32_t * addr, int32x4x4_t value)
  {
!   vst4q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst40.32"  }  } */
! /* { dg-final { scan-assembler "vst41.32"  }  } */
! /* { dg-final { scan-assembler "vst42.32"  }  } */
! /* { dg-final { scan-assembler "vst43.32"  }  } */
! 
! void
! foo2 (int32_t * addr, int32x4x4_t value)
! {
!   vst4q_s32 (addr, value);
!   addr += 16;
!   vst4q_s32 (addr, value); 
  }
  
! /* { dg-final { scan-assembler {vst43.32\s\{.*\}, \[.*\]!}  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo (int32_t *addr, int32x4x4_t value)
  {
!   return vst4q_s32 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo1 (int32_t *addr, int32x4x4_t value)
  {
!   return vst4q (addr, value);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,37 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * addr, int8x16x4_t value)
  {
!   vst4q_s8 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst40.8"  }  } */
- /* { dg-final { scan-assembler "vst41.8"  }  } */
- /* { dg-final { scan-assembler "vst42.8"  }  } */
- /* { dg-final { scan-assembler "vst43.8"  }  } */
  
  void
! foo1 (int8_t * addr, int8x16x4_t value)
  {
!   vst4q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst40.8"  }  } */
! /* { dg-final { scan-assembler "vst41.8"  }  } */
! /* { dg-final { scan-assembler "vst42.8"  }  } */
! /* { dg-final { scan-assembler "vst43.8"  }  } */
! 
! void
! foo2 (int8_t * addr, int8x16x4_t value)
! {
!   vst4q_s8 (addr, value);
!   addr += 16*4;
!   vst4q_s8 (addr, value);
  }
  
! /* { dg-final { scan-assembler {vst43.8\s\{.*\}, \[.*\]!}  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst40.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo (int8_t *addr, int8x16x4_t value)
  {
!   return vst4q_s8 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst40.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo1 (int8_t *addr, int8x16x4_t value)
  {
!   return vst4q (addr, value);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,37 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * addr, uint16x8x4_t value)
  {
!   vst4q_u16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst40.16"  }  } */
- /* { dg-final { scan-assembler "vst41.16"  }  } */
- /* { dg-final { scan-assembler "vst42.16"  }  } */
- /* { dg-final { scan-assembler "vst43.16"  }  } */
  
  void
! foo1 (uint16_t * addr, uint16x8x4_t value)
  {
!   vst4q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst40.16"  }  } */
! /* { dg-final { scan-assembler "vst41.16"  }  } */
! /* { dg-final { scan-assembler "vst42.16"  }  } */
! /* { dg-final { scan-assembler "vst43.16"  }  } */
! 
! void
! foo2 (uint16_t * addr, uint16x8x4_t value)
! {
!   vst4q_u16 (addr, value);
!   addr += 32;
!   vst4q_u16 (addr, value);
  }
  
! /* { dg-final { scan-assembler {vst43.16\s\{.*\}, \[.*\]!}  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo (uint16_t *addr, uint16x8x4_t value)
  {
!   return vst4q_u16 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo1 (uint16_t *addr, uint16x8x4_t value)
  {
!   return vst4q (addr, value);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,37 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * addr, uint32x4x4_t value)
  {
!   vst4q_u32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst40.32"  }  } */
- /* { dg-final { scan-assembler "vst41.32"  }  } */
- /* { dg-final { scan-assembler "vst42.32"  }  } */
- /* { dg-final { scan-assembler "vst43.32"  }  } */
  
  void
! foo1 (uint32_t * addr, uint32x4x4_t value)
  {
!   vst4q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst40.32"  }  } */
! /* { dg-final { scan-assembler "vst41.32"  }  } */
! /* { dg-final { scan-assembler "vst42.32"  }  } */
! /* { dg-final { scan-assembler "vst43.32"  }  } */
! 
! void
! foo2 (uint32_t * addr, uint32x4x4_t value)
! {
!   vst4q_u32 (addr, value);
!   addr += 16;
!   vst4q_u32 (addr, value); 
  }
  
! /* { dg-final { scan-assembler {vst43.32\s\{.*\}, \[.*\]!}  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo (uint32_t *addr, uint32x4x4_t value)
  {
!   return vst4q_u32 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo1 (uint32_t *addr, uint32x4x4_t value)
  {
!   return vst4q (addr, value);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,37 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * addr, uint8x16x4_t value)
  {
!   vst4q_u8 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst40.8"  }  } */
- /* { dg-final { scan-assembler "vst41.8"  }  } */
- /* { dg-final { scan-assembler "vst42.8"  }  } */
- /* { dg-final { scan-assembler "vst43.8"  }  } */
  
  void
! foo1 (uint8_t * addr, uint8x16x4_t value)
  {
!   vst4q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst40.8"  }  } */
! /* { dg-final { scan-assembler "vst41.8"  }  } */
! /* { dg-final { scan-assembler "vst42.8"  }  } */
! /* { dg-final { scan-assembler "vst43.8"  }  } */
! 
! void
! foo2 (uint8_t * addr, uint8x16x4_t value)
! {
!   vst4q_u8 (addr, value);
!   addr += 16*4;
!   vst4q_u8 (addr, value);
  }
  
! /* { dg-final { scan-assembler {vst43.8\s\{.*\}, \[.*\]!}  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst40.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo (uint8_t *addr, uint8x16x4_t value)
  {
!   return vst4q_u8 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst40.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo1 (uint8_t *addr, uint8x16x4_t value)
  {
!   return vst4q (addr, value);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * addr, int16x8_t value, mve_pred16_t p)
  {
!   vstrbq_p_s16 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.16"  }  } */
  
  void
! foo1 (int8_t * addr, int16x8_t value, mve_pred16_t p)
  {
!   vstrbq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, int16x8_t value, mve_pred16_t p)
  {
!   return vstrbq_p_s16 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, int16x8_t value, mve_pred16_t p)
  {
!   return vstrbq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * addr, int32x4_t value, mve_pred16_t p)
  {
!   vstrbq_p_s32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.32"  }  } */
  
  void
! foo1 (int8_t * addr, int32x4_t value, mve_pred16_t p)
  {
!   vstrbq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, int32x4_t value, mve_pred16_t p)
  {
!   return vstrbq_p_s32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, int32x4_t value, mve_pred16_t p)
  {
!   return vstrbq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * addr, int8x16_t value, mve_pred16_t p)
  {
!   vstrbq_p_s8 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.8"  }  } */
  
  void
! foo1 (int8_t * addr, int8x16_t value, mve_pred16_t p)
  {
!   vstrbq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, int8x16_t value, mve_pred16_t p)
  {
!   return vstrbq_p_s8 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, int8x16_t value, mve_pred16_t p)
  {
!   return vstrbq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * addr, uint16x8_t value, mve_pred16_t p)
  {
!   vstrbq_p_u16 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.16"  }  } */
  
  void
! foo1 (uint8_t * addr, uint16x8_t value, mve_pred16_t p)
  {
!   vstrbq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrbq_p_u16 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrbq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * addr, uint32x4_t value, mve_pred16_t p)
  {
!   vstrbq_p_u32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.32"  }  } */
  
  void
! foo1 (uint8_t * addr, uint32x4_t value, mve_pred16_t p)
  {
!   vstrbq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrbq_p_u32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrbq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * addr, uint8x16_t value, mve_pred16_t p)
  {
!   vstrbq_p_u8 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.8"  }  } */
  
  void
! foo1 (uint8_t * addr, uint8x16_t value, mve_pred16_t p)
  {
!   vstrbq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint8x16_t value, mve_pred16_t p)
  {
!   return vstrbq_p_u8 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint8x16_t value, mve_pred16_t p)
  {
!   return vstrbq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * addr, int16x8_t value)
  {
!   vstrbq_s16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.16"  }  } */
  
  void
! foo1 (int8_t * addr, int16x8_t value)
  {
!   vstrbq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, int16x8_t value)
  {
!   return vstrbq_s16 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, int16x8_t value)
  {
!   return vstrbq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * addr, int32x4_t value)
  {
!   vstrbq_s32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.32"  }  } */
  
  void
! foo1 (int8_t * addr, int32x4_t value)
  {
!   vstrbq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, int32x4_t value)
  {
!   return vstrbq_s32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, int32x4_t value)
  {
!   return vstrbq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * addr, int8x16_t value)
  {
!   vstrbq_s8 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.8"  }  } */
  
  void
! foo1 (int8_t * addr, int8x16_t value)
  {
!   vstrbq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, int8x16_t value)
  {
!   return vstrbq_s8 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, int8x16_t value)
  {
!   return vstrbq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p_s16 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.16"  }  } */
  
  void
! foo1 (int8_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p_s16 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p_s32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.32"  }  } */
  
  void
! foo1 (int8_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p_s32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * base, uint8x16_t offset, int8x16_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p_s8 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.8"  }  } */
  
  void
! foo1 (int8_t * base, uint8x16_t offset, int8x16_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, uint8x16_t offset, int8x16_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p_s8 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, uint8x16_t offset, int8x16_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p_u16 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.16"  }  } */
  
  void
! foo1 (uint8_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p_u16 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p_u32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.32"  }  } */
  
  void
! foo1 (uint8_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p_u32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * base, uint8x16_t offset, uint8x16_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p_u8 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.8"  }  } */
  
  void
! foo1 (uint8_t * base, uint8x16_t offset, uint8x16_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint8x16_t offset, uint8x16_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p_u8 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint8x16_t offset, uint8x16_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * base, uint16x8_t offset, int16x8_t value)
  {
!   vstrbq_scatter_offset_s16 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.16"  }  } */
  
  void
! foo1 (int8_t * base, uint16x8_t offset, int16x8_t value)
  {
!   vstrbq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, uint16x8_t offset, int16x8_t value)
  {
!   return vstrbq_scatter_offset_s16 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, uint16x8_t offset, int16x8_t value)
  {
!   return vstrbq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrbq_scatter_offset_s32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.32"  }  } */
  
  void
! foo1 (int8_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrbq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrbq_scatter_offset_s32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrbq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * base, uint8x16_t offset, int8x16_t value)
  {
!   vstrbq_scatter_offset_s8 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.8"  }  } */
  
  void
! foo1 (int8_t * base, uint8x16_t offset, int8x16_t value)
  {
!   vstrbq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, uint8x16_t offset, int8x16_t value)
  {
!   return vstrbq_scatter_offset_s8 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, uint8x16_t offset, int8x16_t value)
  {
!   return vstrbq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * base, uint16x8_t offset, uint16x8_t value)
  {
!   vstrbq_scatter_offset_u16 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.16"  }  } */
  
  void
! foo1 (uint8_t * base, uint16x8_t offset, uint16x8_t value)
  {
!   vstrbq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint16x8_t offset, uint16x8_t value)
  {
!   return vstrbq_scatter_offset_u16 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint16x8_t offset, uint16x8_t value)
  {
!   return vstrbq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrbq_scatter_offset_u32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.32"  }  } */
  
  void
! foo1 (uint8_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrbq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrbq_scatter_offset_u32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrbq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * base, uint8x16_t offset, uint8x16_t value)
  {
!   vstrbq_scatter_offset_u8 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.8"  }  } */
  
  void
! foo1 (uint8_t * base, uint8x16_t offset, uint8x16_t value)
  {
!   vstrbq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint8x16_t offset, uint8x16_t value)
  {
!   return vstrbq_scatter_offset_u8 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint8x16_t offset, uint8x16_t value)
  {
!   return vstrbq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * addr, uint16x8_t value)
  {
!   vstrbq_u16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.16"  }  } */
  
  void
! foo1 (uint8_t * addr, uint16x8_t value)
  {
!   vstrbq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint16x8_t value)
  {
!   return vstrbq_u16 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint16x8_t value)
  {
!   return vstrbq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * addr, uint32x4_t value)
  {
!   vstrbq_u32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.32"  }  } */
  
  void
! foo1 (uint8_t * addr, uint32x4_t value)
  {
!   vstrbq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint32x4_t value)
  {
!   return vstrbq_u32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint32x4_t value)
  {
!   return vstrbq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * addr, uint8x16_t value)
  {
!   vstrbq_u8 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.8"  }  } */
  
  void
! foo1 (uint8_t * addr, uint8x16_t value)
  {
!   vstrbq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint8x16_t value)
  {
!   return vstrbq_u8 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint8x16_t value)
  {
!   return vstrbq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64x2_t addr, const int offset, int64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_base_p_s64 (addr, 8, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrdt.u64"  }  } */
  
  void
! foo1 (uint64x2_t addr, const int offset, int64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_base_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrdt.u64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint64x2_t addr, int64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_base_p_s64 (addr, 0, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64x2_t addr, int64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_base_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64x2_t addr, const int offset, uint64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_base_p_u64 (addr, 8, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrdt.u64"  }  } */
  
  void
! foo1 (uint64x2_t addr, const int offset, uint64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_base_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrdt.u64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint64x2_t addr, uint64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_base_p_u64 (addr, 0, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64x2_t addr, uint64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_base_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64x2_t addr, const int offset, int64x2_t value)
  {
!   vstrdq_scatter_base_s64 (addr, 1016, value);
  }
  
- /* { dg-final { scan-assembler "vstrd.u64"  }  } */
  
  void
! foo1 (uint64x2_t addr, const int offset, int64x2_t value)
  {
!   vstrdq_scatter_base (addr, 1016, value);
  }
  
! /* { dg-final { scan-assembler "vstrd.u64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrd.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint64x2_t addr, int64x2_t value)
  {
!   return vstrdq_scatter_base_s64 (addr, 0, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrd.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64x2_t addr, int64x2_t value)
  {
!   return vstrdq_scatter_base (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64x2_t addr, const int offset, uint64x2_t value)
  {
!   vstrdq_scatter_base_u64 (addr, 8, value);
  }
  
- /* { dg-final { scan-assembler "vstrd.u64"  }  } */
  
  void
! foo1 (uint64x2_t addr, const int offset, uint64x2_t value)
  {
!   vstrdq_scatter_base (addr, 8, value);
  }
  
! /* { dg-final { scan-assembler "vstrd.u64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrd.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint64x2_t addr, uint64x2_t value)
  {
!   return vstrdq_scatter_base_u64 (addr, 0, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrd.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64x2_t addr, uint64x2_t value)
  {
!   return vstrdq_scatter_base (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64x2_t * addr, const int offset, int64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_base_wb_p_s64 (addr, 8, value, p);
  }
  
  void
! foo1 (uint64x2_t * addr, const int offset, int64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_base_wb_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler-times "vstrdt.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint64x2_t *addr, int64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_base_wb_p_s64 (addr, 0, value, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64x2_t *addr, int64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_base_wb_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64x2_t * addr, const int offset, uint64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_base_wb_p_u64 (addr, 8, value, p);
  }
  
  void
! foo1 (uint64x2_t * addr, const int offset, uint64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_base_wb_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler-times "vstrdt.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint64x2_t *addr, uint64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_base_wb_p_u64 (addr, 0, value, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64x2_t *addr, uint64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_base_wb_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64x2_t * addr, const int offset, int64x2_t value)
  {
!   vstrdq_scatter_base_wb_s64 (addr, 8, value);
  }
  
  void
! foo1 (uint64x2_t * addr, const int offset, int64x2_t value)
  {
!   vstrdq_scatter_base_wb (addr, 8, value);
  }
  
! /* { dg-final { scan-assembler-times "vstrd.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrd.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint64x2_t *addr, int64x2_t value)
  {
!   return vstrdq_scatter_base_wb_s64 (addr, 0, value);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vstrd.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64x2_t *addr, int64x2_t value)
  {
!   return vstrdq_scatter_base_wb (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64x2_t * addr, const int offset, uint64x2_t value)
  {
!   vstrdq_scatter_base_wb_u64 (addr, 8, value);
  }
  
  void
! foo1 (uint64x2_t * addr, const int offset, uint64x2_t value)
  {
!   vstrdq_scatter_base_wb (addr, 8, value);
  }
  
! /* { dg-final { scan-assembler-times "vstrd.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrd.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint64x2_t *addr, uint64x2_t value)
  {
!   return vstrdq_scatter_base_wb_u64 (addr, 0, value);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vstrd.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64x2_t *addr, uint64x2_t value)
  {
!   return vstrdq_scatter_base_wb (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int64_t * base, uint64x2_t offset, int64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_offset_p_s64 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrdt.64"  }  } */
  
  void
! foo1 (int64_t * base, uint64x2_t offset, int64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrdt.64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int64_t *base, uint64x2_t offset, int64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_offset_p_s64 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int64_t *base, uint64x2_t offset, int64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64_t * base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_offset_p_u64 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrdt.64"  }  } */
  
  void
! foo1 (uint64_t * base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrdt.64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint64_t *base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_offset_p_u64 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64_t *base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int64_t * base, uint64x2_t offset, int64x2_t value)
  {
!   vstrdq_scatter_offset_s64 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrd.64"  }  } */
  
  void
! foo1 (int64_t * base, uint64x2_t offset, int64x2_t value)
  {
!   vstrdq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrd.64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrd.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int64_t *base, uint64x2_t offset, int64x2_t value)
  {
!   return vstrdq_scatter_offset_s64 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrd.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int64_t *base, uint64x2_t offset, int64x2_t value)
  {
!   return vstrdq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64_t * base, uint64x2_t offset, uint64x2_t value)
  {
!   vstrdq_scatter_offset_u64 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrd.64"  }  } */
  
  void
! foo1 (uint64_t * base, uint64x2_t offset, uint64x2_t value)
  {
!   vstrdq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrd.64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrd.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint64_t *base, uint64x2_t offset, uint64x2_t value)
  {
!   return vstrdq_scatter_offset_u64 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrd.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64_t *base, uint64x2_t offset, uint64x2_t value)
  {
!   return vstrdq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int64_t * base, uint64x2_t offset, int64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_shifted_offset_p_s64 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrdt.64"  }  } */
  
  void
! foo1 (int64_t * base, uint64x2_t offset, int64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrdt.64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  void
! foo (int64_t *base, uint64x2_t offset, int64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_shifted_offset_p_s64 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int64_t *base, uint64x2_t offset, int64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64_t * base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_shifted_offset_p_u64 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrdt.64"  }  } */
  
  void
! foo1 (uint64_t * base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrdt.64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint64_t *base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_shifted_offset_p_u64 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64_t *base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int64_t * base, uint64x2_t offset, int64x2_t value)
  {
!   vstrdq_scatter_shifted_offset_s64 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrd.64"  }  } */
  
  void
! foo1 (int64_t * base, uint64x2_t offset, int64x2_t value)
  {
!   vstrdq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrd.64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrd.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  void
! foo (int64_t *base, uint64x2_t offset, int64x2_t value)
  {
!   return vstrdq_scatter_shifted_offset_s64 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrd.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int64_t *base, uint64x2_t offset, int64x2_t value)
  {
!   return vstrdq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64_t * base, uint64x2_t offset, uint64x2_t value)
  {
!   vstrdq_scatter_shifted_offset_u64 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrd.64"  }  } */
  
  void
! foo1 (uint64_t * base, uint64x2_t offset, uint64x2_t value)
  {
!   vstrdq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrd.64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrd.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint64_t *base, uint64x2_t offset, uint64x2_t value)
  {
!   return vstrdq_scatter_shifted_offset_u64 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrd.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64_t *base, uint64x2_t offset, uint64x2_t value)
  {
!   return vstrdq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float16_t * addr, float16x8_t value)
  {
!   vstrhq_f16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.16"  }  } */
  
  void
! foo1 (float16_t * addr, float16x8_t value)
  {
!   vstrhq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float16_t *base, float16x8_t value)
  {
!   return vstrhq_f16 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float16_t *base, float16x8_t value)
  {
!   return vstrhq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float16_t * addr, float16x8_t value, mve_pred16_t p)
  {
!   vstrhq_p_f16 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (float16_t * addr, float16x8_t value, mve_pred16_t p)
  {
!   vstrhq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float16_t *base, float16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_p_f16 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float16_t *base, float16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * addr, int16x8_t value, mve_pred16_t p)
  {
!   vstrhq_p_s16 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (int16_t * addr, int16x8_t value, mve_pred16_t p)
  {
!   vstrhq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, int16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_p_s16 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, int16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * addr, int32x4_t value, mve_pred16_t p)
  {
!   vstrhq_p_s32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.32"  }  } */
  
  void
! foo1 (int16_t * addr, int32x4_t value, mve_pred16_t p)
  {
!   vstrhq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, int32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_p_s32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, int32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * addr, uint16x8_t value, mve_pred16_t p)
  {
!   vstrhq_p_u16 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (uint16_t * addr, uint16x8_t value, mve_pred16_t p)
  {
!   vstrhq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_p_u16 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * addr, uint32x4_t value, mve_pred16_t p)
  {
!   vstrhq_p_u32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.32"  }  } */
  
  void
! foo1 (uint16_t * addr, uint32x4_t value, mve_pred16_t p)
  {
!   vstrhq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_p_u32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * addr, int16x8_t value)
  {
!   vstrhq_s16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.16"  }  } */
  
  void
! foo1 (int16_t * addr, int16x8_t value)
  {
!   vstrhq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, int16x8_t value)
  {
!   return vstrhq_s16 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, int16x8_t value)
  {
!   return vstrhq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * addr, int32x4_t value)
  {
!   vstrhq_s32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.32"  }  } */
  
  void
! foo1 (int16_t * addr, int32x4_t value)
  {
!   vstrhq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, int32x4_t value)
  {
!   return vstrhq_s32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, int32x4_t value)
  {
!   return vstrhq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float16_t * base, uint16x8_t offset, float16x8_t value)
  {
!   vstrhq_scatter_offset_f16 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.16"  }  } */
  
  void
! foo1 (float16_t * base, uint16x8_t offset, float16x8_t value)
  {
!   vstrhq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (float16_t *base, uint16x8_t offset, float16x8_t value)
  {
!   return vstrhq_scatter_offset_f16 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float16_t *base, uint16x8_t offset, float16x8_t value)
  {
!   return vstrhq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float16_t * base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p_f16 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (float16_t * base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (float16_t *base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p_f16 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float16_t *base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p_s16 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (int16_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p_s16 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p_s32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.32"  }  } */
  
  void
! foo1 (int16_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p_s32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p_u16 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (uint16_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p_u16 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p_u32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.32"  }  } */
  
  void
! foo1 (uint16_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p_u32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * base, uint16x8_t offset, int16x8_t value)
  {
!   vstrhq_scatter_offset_s16 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.16"  }  } */
  
  void
! foo1 (int16_t * base, uint16x8_t offset, int16x8_t value)
  {
!   vstrhq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, uint16x8_t offset, int16x8_t value)
  {
!   return vstrhq_scatter_offset_s16 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, uint16x8_t offset, int16x8_t value)
  {
!   return vstrhq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrhq_scatter_offset_s32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.32"  }  } */
  
  void
! foo1 (int16_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrhq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrhq_scatter_offset_s32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrhq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * base, uint16x8_t offset, uint16x8_t value)
  {
!   vstrhq_scatter_offset_u16 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.16"  }  } */
  
  void
! foo1 (uint16_t * base, uint16x8_t offset, uint16x8_t value)
  {
!   vstrhq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint16x8_t offset, uint16x8_t value)
  {
!   return vstrhq_scatter_offset_u16 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint16x8_t offset, uint16x8_t value)
  {
!   return vstrhq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrhq_scatter_offset_u32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.32"  }  } */
  
  void
! foo1 (uint16_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrhq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrhq_scatter_offset_u32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrhq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float16_t * base, uint16x8_t offset, float16x8_t value)
  {
!   vstrhq_scatter_shifted_offset_f16 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.16"  }  } */
  
  void
! foo1 (float16_t * base, uint16x8_t offset, float16x8_t value)
  {
!   vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (float16_t *base, uint16x8_t offset, float16x8_t value)
  {
!   return vstrhq_scatter_shifted_offset_f16 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float16_t *base, uint16x8_t offset, float16x8_t value)
  {
!   return vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float16_t * base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p_f16 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (float16_t * base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (float16_t *base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p_f16 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float16_t *base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p_s16 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (int16_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p_s16 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p_s32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.32"  }  } */
  
  void
! foo1 (int16_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p_s32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p_u16 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (uint16_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p_u16 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p_u32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.32"  }  } */
  
  void
! foo1 (uint16_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p_u32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * base, uint16x8_t offset, int16x8_t value)
  {
!   vstrhq_scatter_shifted_offset_s16 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.16"  }  } */
  
  void
! foo1 (int16_t * base, uint16x8_t offset, int16x8_t value)
  {
!   vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, uint16x8_t offset, int16x8_t value)
  {
!   return vstrhq_scatter_shifted_offset_s16 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, uint16x8_t offset, int16x8_t value)
  {
!   return vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrhq_scatter_shifted_offset_s32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.32"  }  } */
  
  void
! foo1 (int16_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrhq_scatter_shifted_offset_s32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * base, uint16x8_t offset, uint16x8_t value)
  {
!   vstrhq_scatter_shifted_offset_u16 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.16"  }  } */
  
  void
! foo1 (uint16_t * base, uint16x8_t offset, uint16x8_t value)
  {
!   vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint16x8_t offset, uint16x8_t value)
  {
!   return vstrhq_scatter_shifted_offset_u16 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint16x8_t offset, uint16x8_t value)
  {
!   return vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrhq_scatter_shifted_offset_u32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.32"  }  } */
  
  void
! foo1 (uint16_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrhq_scatter_shifted_offset_u32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * addr, uint16x8_t value)
  {
!   vstrhq_u16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.16"  }  } */
  
  void
! foo1 (uint16_t * addr, uint16x8_t value)
  {
!   vstrhq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint16x8_t value)
  {
!   return vstrhq_u16 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint16x8_t value)
  {
!   return vstrhq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * addr, uint32x4_t value)
  {
!   vstrhq_u32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.32"  }  } */
  
  void
! foo1 (uint16_t * addr, uint32x4_t value)
  {
!   vstrhq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint32x4_t value)
  {
!   return vstrhq_u32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint32x4_t value)
  {
!   return vstrhq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * addr, float32x4_t value)
  {
!   vstrwq_f32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (float32_t * addr, float32x4_t value)
  {
!   vstrwq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float32_t *base, float32x4_t value)
  {
!   return vstrwq_f32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float32_t *base, float32x4_t value)
  {
!   return vstrwq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * addr, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_p_f32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (float32_t * addr, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float32_t *base, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_p_f32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float32_t *base, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * addr, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_p_s32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (int32_t * addr, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int32_t *base, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_p_s32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int32_t *base, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * addr, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_p_u32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (uint32_t * addr, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint32_t *base, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_p_u32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32_t *base, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * addr, int32x4_t value)
  {
!   vstrwq_s32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (int32_t * addr, int32x4_t value)
  {
!   vstrwq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int32_t *base, int32x4_t value)
  {
!   return vstrwq_s32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int32_t *base, int32x4_t value)
  {
!   return vstrwq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
  foo (uint32x4_t addr, float32x4_t value)
  {
!   vstrwq_scatter_base_f32 (addr, 8, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.u32"  }  } */
  
  void
  foo1 (uint32x4_t addr, float32x4_t value)
  {
!   vstrwq_scatter_base (addr, 8, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo (uint32x4_t addr, float32x4_t value)
  {
!   return vstrwq_scatter_base_f32 (addr, 0, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo1 (uint32x4_t addr, float32x4_t value)
  {
!   return vstrwq_scatter_base (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
  foo (uint32x4_t addr, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_p_f32 (addr, 8, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.u32"  }  } */
  
  void
  foo1 (uint32x4_t addr, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo (uint32x4_t addr, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_p_f32 (addr, 0, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo1 (uint32x4_t addr, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
  foo (uint32x4_t addr, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_p_s32 (addr, 8, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.u32"  }  } */
  
  void
  foo1 (uint32x4_t addr, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo (uint32x4_t addr, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_p_s32 (addr, 0, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo1 (uint32x4_t addr, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
  foo (uint32x4_t addr, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_p_u32 (addr, 8, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.u32"  }  } */
  
  void
  foo1 (uint32x4_t addr, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo (uint32x4_t addr, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_p_u32 (addr, 0, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo1 (uint32x4_t addr, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
  foo (uint32x4_t addr, int32x4_t value)
  {
!   vstrwq_scatter_base_s32 (addr, 8, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.u32"  }  } */
  
  void
  foo1 (uint32x4_t addr, int32x4_t value)
  {
!   vstrwq_scatter_base (addr, 8, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo (uint32x4_t addr, int32x4_t value)
  {
!   return vstrwq_scatter_base_s32 (addr, 0, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo1 (uint32x4_t addr, int32x4_t value)
  {
!   return vstrwq_scatter_base (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
  foo (uint32x4_t addr, uint32x4_t value)
  {
!   vstrwq_scatter_base_u32 (addr, 8, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.u32"  }  } */
  
  void
  foo1 (uint32x4_t addr, uint32x4_t value)
  {
!   vstrwq_scatter_base (addr, 8, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo (uint32x4_t addr, uint32x4_t value)
  {
!   return vstrwq_scatter_base_u32 (addr, 0, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo1 (uint32x4_t addr, uint32x4_t value)
  {
!   return vstrwq_scatter_base (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32x4_t * addr, const int offset, float32x4_t value)
  {
!   vstrwq_scatter_base_wb_f32 (addr, 8, value);
  }
  
  void
! foo1 (uint32x4_t * addr, const int offset, float32x4_t value)
  {
!   vstrwq_scatter_base_wb (addr, 8, value);
  }
  
! /* { dg-final { scan-assembler-times "vstrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint32x4_t *addr, float32x4_t value)
  {
!   return vstrwq_scatter_base_wb_f32 (addr, 0, value);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32x4_t *addr, float32x4_t value)
  {
!   return vstrwq_scatter_base_wb (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32x4_t * addr, const int offset, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_wb_p_f32 (addr, 8, value, p);
  }
  
  void
! foo1 (uint32x4_t * addr, const int offset, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_wb_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler-times "vstrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint32x4_t *addr, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_wb_p_f32 (addr, 0, value, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32x4_t *addr, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_wb_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32x4_t * addr, const int offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_wb_p_s32 (addr, 8, value, p);
  }
  
  void
! foo1 (uint32x4_t * addr, const int offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_wb_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler-times "vstrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint32x4_t *addr, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_wb_p_s32 (addr, 0, value, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32x4_t *addr, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_wb_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32x4_t * addr, const int offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_wb_p_u32 (addr, 8, value, p);
  }
  
  void
! foo1 (uint32x4_t * addr, const int offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_wb_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler-times "vstrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint32x4_t *addr, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_wb_p_u32 (addr, 0, value, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32x4_t *addr, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_wb_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32x4_t * addr, const int offset, int32x4_t value)
  {
!   vstrwq_scatter_base_wb_s32 (addr, 8, value);
  }
  
  void
! foo1 (uint32x4_t * addr, const int offset, int32x4_t value)
  {
!   vstrwq_scatter_base_wb (addr, 8, value);
  }
  
! /* { dg-final { scan-assembler-times "vstrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint32x4_t *addr, int32x4_t value)
  {
!   return vstrwq_scatter_base_wb_s32 (addr, 0, value);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32x4_t *addr, int32x4_t value)
  {
!   return vstrwq_scatter_base_wb (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32x4_t * addr, uint32x4_t value)
  {
!   vstrwq_scatter_base_wb_u32 (addr, 8, value);
  }
  
  void
! foo1 (uint32x4_t * addr, uint32x4_t value)
  {
!   vstrwq_scatter_base_wb (addr, 8, value);
  }
  
! /* { dg-final { scan-assembler-times "vstrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint32x4_t *addr, uint32x4_t value)
  {
!   return vstrwq_scatter_base_wb_u32 (addr, 0, value);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32x4_t *addr, uint32x4_t value)
  {
!   return vstrwq_scatter_base_wb (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * base, uint32x4_t offset, float32x4_t value)
  {
!   vstrwq_scatter_offset_f32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (float32_t * base, uint32x4_t offset, float32x4_t value)
  {
!   vstrwq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (float32_t *base, uint32x4_t offset, float32x4_t value)
  {
!   return vstrwq_scatter_offset_f32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float32_t *base, uint32x4_t offset, float32x4_t value)
  {
!   return vstrwq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_offset_p_f32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (float32_t * base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (float32_t *base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_offset_p_f32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float32_t *base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_offset_p_s32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (int32_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int32_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_offset_p_s32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int32_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_offset_p_u32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (uint32_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint32_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_offset_p_u32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrwq_scatter_offset_s32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (int32_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrwq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int32_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrwq_scatter_offset_s32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int32_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrwq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrwq_scatter_offset_u32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (uint32_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrwq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint32_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrwq_scatter_offset_u32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrwq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * base, uint32x4_t offset, float32x4_t value)
  {
!   vstrwq_scatter_shifted_offset_f32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (float32_t * base, uint32x4_t offset, float32x4_t value)
  {
!   vstrwq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo (float32_t *base, uint32x4_t offset, float32x4_t value)
  {
!   return vstrwq_scatter_shifted_offset_f32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float32_t *base, uint32x4_t offset, float32x4_t value)
  {
!   return vstrwq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_shifted_offset_p_f32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (float32_t * base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo (float32_t *base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_shifted_offset_p_f32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float32_t *base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_shifted_offset_p_s32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (int32_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo (int32_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_shifted_offset_p_s32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int32_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_shifted_offset_p_u32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (uint32_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint32_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_shifted_offset_p_u32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrwq_scatter_shifted_offset_s32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (int32_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrwq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo (int32_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrwq_scatter_shifted_offset_s32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int32_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrwq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrwq_scatter_shifted_offset_u32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (uint32_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrwq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint32_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrwq_scatter_shifted_offset_u32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrwq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * addr, uint32x4_t value)
  {
!   vstrwq_u32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (uint32_t * addr, uint32x4_t value)
  {
!   vstrwq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint32_t *base, uint32x4_t value)
  {
!   return vstrwq_u32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32_t *base, uint32x4_t value)
  {
!   return vstrwq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vsubq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vsubq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vsubq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vsubq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vsubq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vsubq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vsubq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vsubq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vsubq_m (inactive, a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vsubq_m_n_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.f16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vsubq_m_n_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vsubt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo2 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
! {
!   return vsubq_m (inactive, a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vsubq_m (inactive, a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vsubq_m_n_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.f32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vsubq_m_n_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vsubt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo2 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
! {
!   return vsubq_m (inactive, a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vsubq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vsubq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vsubq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vsubq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vsubq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vsubq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vsubq_m_n_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.i16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vsubq_m_n_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
! {
!   return vsubq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vsubq_m_n_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.i32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vsubq_m_n_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
! {
!   return vsubq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vsubq_m_n_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.i8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vsubq_m_n_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
! {
!   return vsubq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vsubq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vsubq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vsubq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vsubq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vsubq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vsubq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vsubq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vsubq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vsubq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vsubq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vsubq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vsubq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t a, float16_t b)
- {
-   return vsubq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16_t b)
  {
    return vsubq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.f16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16_t b)
  {
    return vsubq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vsub.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo2 (float16x8_t a)
! {
!   return vsubq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t a, float32_t b)
- {
-   return vsubq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32_t b)
  {
    return vsubq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.f32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32_t b)
  {
    return vsubq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vsub.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo2 (float32x4_t a)
! {
!   return vsubq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vsubq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vsubq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vsubq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vsubq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vsubq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vsubq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vsubq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vsubq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vsub.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a)
! {
!   return vsubq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vsubq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vsubq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vsub.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a)
! {
!   return vsubq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vsubq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vsubq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vsub.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a)
! {
!   return vsubq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vsubq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vsubq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vsubq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vsubq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vsubq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vsubq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vsubq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vsubq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vsubq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vsubq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vsubq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vsubq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
!     return vsubq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.f16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
!   return vsubq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ float16x8_t
+ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
!     return vsubq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.f32"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
!   return vsubq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ float32x4_t
+ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo (float16x8_t a, float16_t b, mve_pred16_t p)
- {
-     return vsubq_x_n_f16 (a, 23.23, p);
- }
- 
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
!     return vsubq_x_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.f16"  }  } */
  
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
!   return vsubq_x_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float16x8_t
+ foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float16x8_t
+ foo2 (float16x8_t a, mve_pred16_t p)
+ {
+   return vsubq_x (a, 1.1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo (float32x4_t a, float32_t b, mve_pred16_t p)
- {
-     return vsubq_x_n_f32 (a, 23.23, p);
- }
- 
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
!     return vsubq_x_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.f32"  }  } */
  
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
!   return vsubq_x_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float32x4_t
+ foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float32x4_t
+ foo2 (float32x4_t a, mve_pred16_t p)
+ {
+   return vsubq_x (a, 1.1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
!     return vsubq_x_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
!   return vsubq_x_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ int16x8_t
+ foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
!     return vsubq_x_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i32"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
!   return vsubq_x_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ int32x4_t
+ foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
!     return vsubq_x_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
!   return vsubq_x_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ int8x16_t
+ foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
!     return vsubq_x_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i16"  }  } */
  
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
!   return vsubq_x_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo2 (uint16x8_t a, mve_pred16_t p)
+ {
+   return vsubq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
!     return vsubq_x_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i32"  }  } */
  
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
!   return vsubq_x_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo2 (uint32x4_t a, mve_pred16_t p)
+ {
+   return vsubq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
!     return vsubq_x_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i8"  }  } */
  
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
!   return vsubq_x_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo2 (uint8x16_t a, mve_pred16_t p)
+ {
+   return vsubq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!     return vsubq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vsubq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ int16x8_t
+ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!     return vsubq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i32"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vsubq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ int32x4_t
+ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!     return vsubq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vsubq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ int8x16_t
+ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!     return vsubq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vsubq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!     return vsubq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i32"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vsubq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!     return vsubq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vsubq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/mve_const_shifts.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/mve_const_shifts.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/mve_const_shifts.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/mve_const_shifts.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,41 ----
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
+ 
+ #include "arm_mve.h"
+ 
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo11:
+ **     ...
+ **     movs	r0, #2
+ **     ...
+ */
+ uint32_t
+ foo11 ()
+ {
+   return uqshl (1, 1);
+ }
+ 
+ /*
+ **foo12:
+ **     ...
+ **	movs	r0, #2
+ **	movs	r1, #0
+ **     ...
+ */
+ uint64_t
+ foo12 ()
+ {
+   return uqshll (1, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/mve_load_memory_modes.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/mve_load_memory_modes.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/mve_load_memory_modes.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/mve_load_memory_modes.c	Thu Jun 20 08:08:08 2024
***************
*** 7,13 ****
  /*
  **off_load8_0:
  **	...
! **	vldrb.8	q0, \[r0, #16\]
  **	...
  */
  int8x16_t off_load8_0 (int8_t * a)
--- 7,13 ----
  /*
  **off_load8_0:
  **	...
! **	vldrb.8	q[0-7], \[r0, #16\]
  **	...
  */
  int8x16_t off_load8_0 (int8_t * a)
*************** int8x16_t off_load8_0 (int8_t * a)
*** 18,24 ****
  /*
  **off_load8_1:
  **	...
! **	vldrb.u16	q0, \[r0, #1\]
  **	...
  */
  uint16x8_t off_load8_1 (uint8_t * a)
--- 18,24 ----
  /*
  **off_load8_1:
  **	...
! **	vldrb.u16	q[0-7], \[r0, #1\]
  **	...
  */
  uint16x8_t off_load8_1 (uint8_t * a)
*************** uint16x8_t off_load8_1 (uint8_t * a)
*** 29,35 ****
  /*
  **off_load8_2:
  **	...
! **	vldrb.s32	q0, \[r0, #127\]
  **	...
  */
  int32x4_t off_load8_2 (int8_t * a)
--- 29,35 ----
  /*
  **off_load8_2:
  **	...
! **	vldrb.s32	q[0-7], \[r0, #127\]
  **	...
  */
  int32x4_t off_load8_2 (int8_t * a)
*************** int32x4_t off_load8_2 (int8_t * a)
*** 40,46 ****
  /*
  **off_load8_3:
  **	...
! **	vldrb.8	q0, \[r0, #-127\]
  **	...
  */
  uint8x16_t off_load8_3 (uint8_t * a)
--- 40,46 ----
  /*
  **off_load8_3:
  **	...
! **	vldrb.8	q[0-7], \[r0, #-127\]
  **	...
  */
  uint8x16_t off_load8_3 (uint8_t * a)
*************** uint8x16_t off_load8_3 (uint8_t * a)
*** 51,57 ****
  /*
  **not_off_load8_0:
  **	...
! **	vldrb.8	q0, \[r[0-9]+\]
  **	...
  */
  int8x16_t not_off_load8_0 (int8_t * a)
--- 51,57 ----
  /*
  **not_off_load8_0:
  **	...
! **	vldrb.8	q[0-7], \[r[0-7]+\]
  **	...
  */
  int8x16_t not_off_load8_0 (int8_t * a)
*************** int8x16_t not_off_load8_0 (int8_t * a)
*** 62,68 ****
  /*
  **off_loadfp16_0:
  **	...
! **	vldrh.16	q0, \[r0, #-244\]
  **	...
  */
  float16x8_t off_loadfp16_0 (float16_t *a)
--- 62,68 ----
  /*
  **off_loadfp16_0:
  **	...
! **	vldrh.16	q[0-7], \[r0, #-244\]
  **	...
  */
  float16x8_t off_loadfp16_0 (float16_t *a)
*************** float16x8_t off_loadfp16_0 (float16_t *a
*** 73,79 ****
  /*
  **off_load16_0:
  **	...
! **	vldrh.16	q0, \[r0, #-2\]
  **	...
  */
  uint16x8_t off_load16_0 (uint16_t * a)
--- 73,79 ----
  /*
  **off_load16_0:
  **	...
! **	vldrh.16	q[0-7], \[r0, #-2\]
  **	...
  */
  uint16x8_t off_load16_0 (uint16_t * a)
*************** uint16x8_t off_load16_0 (uint16_t * a)
*** 84,90 ****
  /*
  **off_load16_1:
  **	...
! **	vldrh.u32	q0, \[r0, #254\]
  **	...
  */
  uint32x4_t off_load16_1 (uint16_t * a)
--- 84,90 ----
  /*
  **off_load16_1:
  **	...
! **	vldrh.u32	q[0-7], \[r0, #254\]
  **	...
  */
  uint32x4_t off_load16_1 (uint16_t * a)
*************** uint32x4_t off_load16_1 (uint16_t * a)
*** 95,101 ****
  /*
  **not_off_load16_0:
  **	...
! **	vldrh.16	q0, \[r[0-9]+\]
  **	...
  */
  int16x8_t not_off_load16_0 (int8_t * a)
--- 95,101 ----
  /*
  **not_off_load16_0:
  **	...
! **	vldrh.16	q[0-7], \[r[0-7]+\]
  **	...
  */
  int16x8_t not_off_load16_0 (int8_t * a)
*************** int16x8_t not_off_load16_0 (int8_t * a)
*** 106,112 ****
  /*
  **not_off_load16_1:
  **	...
! **	vldrh.u32	q0, \[r[0-9]+\]
  **	...
  */
  uint32x4_t not_off_load16_1 (uint16_t * a)
--- 106,112 ----
  /*
  **not_off_load16_1:
  **	...
! **	vldrh.u32	q[0-7], \[r[0-7]+\]
  **	...
  */
  uint32x4_t not_off_load16_1 (uint16_t * a)
*************** uint32x4_t not_off_load16_1 (uint16_t *
*** 117,123 ****
  /*
  **off_loadfp32_0:
  **	...
! **	vldrw.32	q0, \[r0, #24\]
  **	...
  */
  float32x4_t off_loadfp32_0 (float32_t *a)
--- 117,123 ----
  /*
  **off_loadfp32_0:
  **	...
! **	vldrw.32	q[0-7], \[r0, #24\]
  **	...
  */
  float32x4_t off_loadfp32_0 (float32_t *a)
*************** float32x4_t off_loadfp32_0 (float32_t *a
*** 128,134 ****
  /*
  **off_load32_0:
  **	...
! **	vldrw.32	q0, \[r0, #4\]
  **	...
  */
  uint32x4_t off_load32_0 (uint32_t * a)
--- 128,134 ----
  /*
  **off_load32_0:
  **	...
! **	vldrw.32	q[0-7], \[r0, #4\]
  **	...
  */
  uint32x4_t off_load32_0 (uint32_t * a)
*************** uint32x4_t off_load32_0 (uint32_t * a)
*** 139,145 ****
  /*
  **off_load32_1:
  **	...
! **	vldrw.32	q0, \[r0, #-508\]
  **	...
  */
  int32x4_t off_load32_1 (int32_t * a)
--- 139,145 ----
  /*
  **off_load32_1:
  **	...
! **	vldrw.32	q[0-7], \[r0, #-508\]
  **	...
  */
  int32x4_t off_load32_1 (int32_t * a)
*************** int32x4_t off_load32_1 (int32_t * a)
*** 149,155 ****
  /*
  **pre_load8_0:
  **	...
! **	vldrb.8	q[0-9]+, \[r0, #16\]!
  **	...
  */
  int8_t* pre_load8_0 (int8_t * a, int8x16_t *v)
--- 149,155 ----
  /*
  **pre_load8_0:
  **	...
! **	vldrb.8	q[0-7], \[r0, #16\]!
  **	...
  */
  int8_t* pre_load8_0 (int8_t * a, int8x16_t *v)
*************** int8_t* pre_load8_0 (int8_t * a, int8x16
*** 162,168 ****
  /*
  **pre_load8_1:
  **	...
! **	vldrb.u16	q[0-9]+, \[r0, #4\]!
  **	...
  */
  uint8_t* pre_load8_1 (uint8_t * a, uint16x8_t *v)
--- 162,168 ----
  /*
  **pre_load8_1:
  **	...
! **	vldrb.u16	q[0-7], \[r0, #4\]!
  **	...
  */
  uint8_t* pre_load8_1 (uint8_t * a, uint16x8_t *v)
*************** uint8_t* pre_load8_1 (uint8_t * a, uint1
*** 175,181 ****
  /*
  **pre_loadfp16_0:
  **	...
! **	vldrh.16	q[0-9]+, \[r0, #128\]!
  **	...
  */
  float16_t* pre_loadfp16_0 (float16_t *a, float16x8_t *v)
--- 175,181 ----
  /*
  **pre_loadfp16_0:
  **	...
! **	vldrh.16	q[0-7], \[r0, #128\]!
  **	...
  */
  float16_t* pre_loadfp16_0 (float16_t *a, float16x8_t *v)
*************** float16_t* pre_loadfp16_0 (float16_t *a,
*** 188,194 ****
  /*
  **pre_load16_0:
  **	...
! **	vldrh.16	q[0-9]+, \[r0, #-254\]!
  **	...
  */
  int16_t* pre_load16_0 (int16_t * a, int16x8_t *v)
--- 188,194 ----
  /*
  **pre_load16_0:
  **	...
! **	vldrh.16	q[0-7], \[r0, #-254\]!
  **	...
  */
  int16_t* pre_load16_0 (int16_t * a, int16x8_t *v)
*************** int16_t* pre_load16_0 (int16_t * a, int1
*** 201,207 ****
  /*
  **pre_load16_1:
  **	...
! **	vldrh.s32	q[0-9]+, \[r0, #52\]!
  **	...
  */
  int16_t* pre_load16_1 (int16_t * a, int32x4_t *v)
--- 201,207 ----
  /*
  **pre_load16_1:
  **	...
! **	vldrh.s32	q[0-7], \[r0, #52\]!
  **	...
  */
  int16_t* pre_load16_1 (int16_t * a, int32x4_t *v)
*************** int16_t* pre_load16_1 (int16_t * a, int3
*** 214,220 ****
  /*
  **pre_loadfp32_0:
  **	...
! **	vldrw.32	q[0-9]+, \[r0, #-72\]!
  **	...
  */
  float32_t* pre_loadfp32_0 (float32_t *a, float32x4_t *v)
--- 214,220 ----
  /*
  **pre_loadfp32_0:
  **	...
! **	vldrw.32	q[0-7], \[r0, #-72\]!
  **	...
  */
  float32_t* pre_loadfp32_0 (float32_t *a, float32x4_t *v)
*************** float32_t* pre_loadfp32_0 (float32_t *a,
*** 228,234 ****
  /*
  **pre_load32_0:
  **	...
! **	vldrw.32	q[0-9]+, \[r0, #-4\]!
  **	...
  */
  uint32_t* pre_load32_0 (uint32_t * a, uint32x4_t *v)
--- 228,234 ----
  /*
  **pre_load32_0:
  **	...
! **	vldrw.32	q[0-7], \[r0, #-4\]!
  **	...
  */
  uint32_t* pre_load32_0 (uint32_t * a, uint32x4_t *v)
*************** uint32_t* pre_load32_0 (uint32_t * a, ui
*** 242,248 ****
  /*
  **post_load8_0:
  **	...
! **	vldrb.8	q[0-9]+, \[r0\], #26
  **	...
  */
  uint8_t* post_load8_0 (uint8_t * a, uint8x16_t *v)
--- 242,248 ----
  /*
  **post_load8_0:
  **	...
! **	vldrb.8	q[0-7], \[r0\], #26
  **	...
  */
  uint8_t* post_load8_0 (uint8_t * a, uint8x16_t *v)
*************** uint8_t* post_load8_0 (uint8_t * a, uint
*** 255,261 ****
  /*
  **post_load8_1:
  **	...
! **	vldrb.s16	q[0-9]+, \[r0\], #-1
  **	...
  */
  int8_t* post_load8_1 (int8_t * a, int16x8_t *v)
--- 255,261 ----
  /*
  **post_load8_1:
  **	...
! **	vldrb.s16	q[0-7], \[r0\], #-1
  **	...
  */
  int8_t* post_load8_1 (int8_t * a, int16x8_t *v)
*************** int8_t* post_load8_1 (int8_t * a, int16x
*** 268,274 ****
  /*
  **post_load8_2:
  **	...
! **	vldrb.8	q[0-9]+, \[r0\], #26
  **	...
  */
  uint8_t* post_load8_2 (uint8_t * a, uint8x16_t *v)
--- 268,274 ----
  /*
  **post_load8_2:
  **	...
! **	vldrb.8	q[0-7], \[r0\], #26
  **	...
  */
  uint8_t* post_load8_2 (uint8_t * a, uint8x16_t *v)
*************** uint8_t* post_load8_2 (uint8_t * a, uint
*** 281,287 ****
  /*
  **post_load8_3:
  **	...
! **	vldrb.s16	q[0-9]+, \[r0\], #-1
  **	...
  */
  int8_t* post_load8_3 (int8_t * a, int16x8_t *v)
--- 281,287 ----
  /*
  **post_load8_3:
  **	...
! **	vldrb.s16	q[0-7], \[r0\], #-1
  **	...
  */
  int8_t* post_load8_3 (int8_t * a, int16x8_t *v)
*************** int8_t* post_load8_3 (int8_t * a, int16x
*** 294,300 ****
  /*
  **post_loadfp16_0:
  **	...
! **	vldrh.16	q[0-9]+, \[r0\], #-24
  **	...
  */
  float16_t* post_loadfp16_0 (float16_t *a, float16x8_t *v)
--- 294,300 ----
  /*
  **post_loadfp16_0:
  **	...
! **	vldrh.16	q[0-7], \[r0\], #-24
  **	...
  */
  float16_t* post_loadfp16_0 (float16_t *a, float16x8_t *v)
*************** float16_t* post_loadfp16_0 (float16_t *a
*** 307,313 ****
  /*
  **post_load16_0:
  **	...
! **	vldrh.16	q[0-9]+, \[r0\], #-126
  **	...
  */
  uint16_t* post_load16_0 (uint16_t * a, uint16x8_t *v)
--- 307,313 ----
  /*
  **post_load16_0:
  **	...
! **	vldrh.16	q[0-7], \[r0\], #-126
  **	...
  */
  uint16_t* post_load16_0 (uint16_t * a, uint16x8_t *v)
*************** uint16_t* post_load16_0 (uint16_t * a, u
*** 320,326 ****
  /*
  **post_load16_1:
  **	...
! **	vldrh.u32	q[0-9]+, \[r0\], #16
  **	...
  */
  uint16_t* post_load16_1 (uint16_t * a, uint32x4_t *v)
--- 320,326 ----
  /*
  **post_load16_1:
  **	...
! **	vldrh.u32	q[0-7], \[r0\], #16
  **	...
  */
  uint16_t* post_load16_1 (uint16_t * a, uint32x4_t *v)
*************** uint16_t* post_load16_1 (uint16_t * a, u
*** 333,339 ****
  /*
  **post_loadfp32_0:
  **	...
! **	vldrw.32	q[0-9]+, \[r0\], #4
  **	...
  */
  float32_t* post_loadfp32_0 (float32_t *a, float32x4_t *v)
--- 333,339 ----
  /*
  **post_loadfp32_0:
  **	...
! **	vldrw.32	q[0-7], \[r0\], #4
  **	...
  */
  float32_t* post_loadfp32_0 (float32_t *a, float32x4_t *v)
*************** float32_t* post_loadfp32_0 (float32_t *a
*** 346,352 ****
  /*
  **post_load32_0:
  **	...
! **	vldrw.32	q[0-9]+, \[r0\], #-16
  **	...
  */
  int32_t* post_load32_0 (int32_t * a, int32x4_t *v)
--- 346,352 ----
  /*
  **post_load32_0:
  **	...
! **	vldrw.32	q[0-7], \[r0\], #-16
  **	...
  */
  int32_t* post_load32_0 (int32_t * a, int32x4_t *v)
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/mve_store_memory_modes.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/mve_store_memory_modes.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/mve_store_memory_modes.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/mve_store_memory_modes.c	Thu Jun 20 08:08:08 2024
***************
*** 7,13 ****
  /*
  **off_store8_0:
  **	...
! **	vstrb.8	q0, \[r0, #16\]
  **	...
  */
  uint8_t *off_store8_0 (uint8_t * a, uint8x16_t v)
--- 7,13 ----
  /*
  **off_store8_0:
  **	...
! **	vstrb.8	q[0-7], \[r0, #16\]
  **	...
  */
  uint8_t *off_store8_0 (uint8_t * a, uint8x16_t v)
*************** uint8_t *off_store8_0 (uint8_t * a, uint
*** 19,25 ****
  /*
  **off_store8_1:
  **	...
! **	vstrb.16	q0, \[r0, #-1\]
  **	...
  */
  int8_t *off_store8_1 (int8_t * a, int16x8_t v)
--- 19,25 ----
  /*
  **off_store8_1:
  **	...
! **	vstrb.16	q[0-7], \[r0, #-1\]
  **	...
  */
  int8_t *off_store8_1 (int8_t * a, int16x8_t v)
*************** int8_t *off_store8_1 (int8_t * a, int16x
*** 31,37 ****
  /*
  **off_store8_2:
  **	...
! **	vstrb.32	q0, \[r0, #-127\]
  **	...
  */
  uint8_t *off_store8_2 (uint8_t * a, uint32x4_t v)
--- 31,37 ----
  /*
  **off_store8_2:
  **	...
! **	vstrb.32	q[0-7], \[r0, #-127\]
  **	...
  */
  uint8_t *off_store8_2 (uint8_t * a, uint32x4_t v)
*************** uint8_t *off_store8_2 (uint8_t * a, uint
*** 43,49 ****
  /*
  **off_store8_3:
  **	...
! **	vstrb.8	q0, \[r0, #127\]
  **	...
  */
  int8_t *off_store8_3 (int8_t * a, int8x16_t v)
--- 43,49 ----
  /*
  **off_store8_3:
  **	...
! **	vstrb.8	q[0-7], \[r0, #127\]
  **	...
  */
  int8_t *off_store8_3 (int8_t * a, int8x16_t v)
*************** int8_t *off_store8_3 (int8_t * a, int8x1
*** 55,61 ****
  /*
  **not_off_store8_0:
  **	...
! **	vstrb.8	q0, \[r[0-9]+\]
  **	...
  */
  uint8_t *not_off_store8_0 (uint8_t * a, uint8x16_t v)
--- 55,61 ----
  /*
  **not_off_store8_0:
  **	...
! **	vstrb.8	q[0-7], \[r[0-7]+\]
  **	...
  */
  uint8_t *not_off_store8_0 (uint8_t * a, uint8x16_t v)
*************** uint8_t *not_off_store8_0 (uint8_t * a,
*** 67,73 ****
  /*
  **off_storefp16_0:
  **	...
! **	vstrh.16	q0, \[r0, #250\]
  **	...
  */
  float16_t *off_storefp16_0 (float16_t *a, float16x8_t v)
--- 67,73 ----
  /*
  **off_storefp16_0:
  **	...
! **	vstrh.16	q[0-7], \[r0, #250\]
  **	...
  */
  float16_t *off_storefp16_0 (float16_t *a, float16x8_t v)
*************** float16_t *off_storefp16_0 (float16_t *a
*** 79,85 ****
  /*
  **off_store16_0:
  **	...
! **	vstrh.16	q0, \[r0, #4\]
  **	...
  */
  int16_t *off_store16_0 (int16_t * a, int16x8_t v)
--- 79,85 ----
  /*
  **off_store16_0:
  **	...
! **	vstrh.16	q[0-7], \[r0, #4\]
  **	...
  */
  int16_t *off_store16_0 (int16_t * a, int16x8_t v)
*************** int16_t *off_store16_0 (int16_t * a, int
*** 91,97 ****
  /*
  **off_store16_1:
  **	...
! **	vstrh.32	q0, \[r0, #-254\]
  **	...
  */
  int16_t *off_store16_1 (int16_t * a, int32x4_t v)
--- 91,97 ----
  /*
  **off_store16_1:
  **	...
! **	vstrh.32	q[0-7], \[r0, #-254\]
  **	...
  */
  int16_t *off_store16_1 (int16_t * a, int32x4_t v)
*************** int16_t *off_store16_1 (int16_t * a, int
*** 103,109 ****
  /*
  **not_off_store16_0:
  **	...
! **	vstrh.16	q0, \[r[0-9]+\]
  **	...
  */
  uint8_t *not_off_store16_0 (uint8_t * a, uint16x8_t v)
--- 103,109 ----
  /*
  **not_off_store16_0:
  **	...
! **	vstrh.16	q[0-7], \[r[0-7]+\]
  **	...
  */
  uint8_t *not_off_store16_0 (uint8_t * a, uint16x8_t v)
*************** uint8_t *not_off_store16_0 (uint8_t * a,
*** 115,121 ****
  /*
  **not_off_store16_1:
  **	...
! **	vstrh.32	q0, \[r[0-9]+\]
  **	...
  */
  int16_t *not_off_store16_1 (int16_t * a, int32x4_t v)
--- 115,121 ----
  /*
  **not_off_store16_1:
  **	...
! **	vstrh.32	q[0-7], \[r[0-7]+\]
  **	...
  */
  int16_t *not_off_store16_1 (int16_t * a, int32x4_t v)
*************** int16_t *not_off_store16_1 (int16_t * a,
*** 127,133 ****
  /*
  **off_storefp32_0:
  **	...
! **	vstrw.32	q0, \[r0, #-412\]
  **	...
  */
  float32_t *off_storefp32_0 (float32_t *a, float32x4_t v)
--- 127,133 ----
  /*
  **off_storefp32_0:
  **	...
! **	vstrw.32	q[0-7], \[r0, #-412\]
  **	...
  */
  float32_t *off_storefp32_0 (float32_t *a, float32x4_t v)
*************** float32_t *off_storefp32_0 (float32_t *a
*** 139,145 ****
  /*
  **off_store32_0:
  **	...
! **	vstrw.32	q0, \[r0, #-4\]
  **	...
  */
  int32_t *off_store32_0 (int32_t * a, int32x4_t v)
--- 139,145 ----
  /*
  **off_store32_0:
  **	...
! **	vstrw.32	q[0-7], \[r0, #-4\]
  **	...
  */
  int32_t *off_store32_0 (int32_t * a, int32x4_t v)
*************** int32_t *off_store32_0 (int32_t * a, int
*** 151,157 ****
  /*
  **off_store32_1:
  **	...
! **	vstrw.32	q0, \[r0, #508\]
  **	...
  */
  uint32_t *off_store32_1 (uint32_t * a, uint32x4_t v)
--- 151,157 ----
  /*
  **off_store32_1:
  **	...
! **	vstrw.32	q[0-7], \[r0, #508\]
  **	...
  */
  uint32_t *off_store32_1 (uint32_t * a, uint32x4_t v)
*************** uint32_t *off_store32_1 (uint32_t * a, u
*** 163,169 ****
  /*
  **pre_store8_0:
  **	...
! **	vstrb.8	q[0-9]+, \[r0, #-16\]!
  **	...
  */
  uint8_t* pre_store8_0 (uint8_t * a, uint8x16_t v)
--- 163,169 ----
  /*
  **pre_store8_0:
  **	...
! **	vstrb.8	q[0-7], \[r0, #-16\]!
  **	...
  */
  uint8_t* pre_store8_0 (uint8_t * a, uint8x16_t v)
*************** uint8_t* pre_store8_0 (uint8_t * a, uint
*** 176,182 ****
  /*
  **pre_store8_1:
  **	...
! **	vstrb.16	q[0-9]+, \[r0, #4\]!
  **	...
  */
  int8_t* pre_store8_1 (int8_t * a, int16x8_t v)
--- 176,182 ----
  /*
  **pre_store8_1:
  **	...
! **	vstrb.16	q[0-7], \[r0, #4\]!
  **	...
  */
  int8_t* pre_store8_1 (int8_t * a, int16x8_t v)
*************** int8_t* pre_store8_1 (int8_t * a, int16x
*** 189,195 ****
  /*
  **pre_storefp16_0:
  **	...
! **	vstrh.16	q0, \[r0, #8\]!
  **	...
  */
  float16_t *pre_storefp16_0 (float16_t *a, float16x8_t v)
--- 189,195 ----
  /*
  **pre_storefp16_0:
  **	...
! **	vstrh.16	q[0-7], \[r0, #8\]!
  **	...
  */
  float16_t *pre_storefp16_0 (float16_t *a, float16x8_t v)
*************** float16_t *pre_storefp16_0 (float16_t *a
*** 202,208 ****
  /*
  **pre_store16_0:
  **	...
! **	vstrh.16	q[0-9]+, \[r0, #254\]!
  **	...
  */
  uint16_t* pre_store16_0 (uint16_t * a, uint16x8_t v)
--- 202,208 ----
  /*
  **pre_store16_0:
  **	...
! **	vstrh.16	q[0-7], \[r0, #254\]!
  **	...
  */
  uint16_t* pre_store16_0 (uint16_t * a, uint16x8_t v)
*************** uint16_t* pre_store16_0 (uint16_t * a, u
*** 215,221 ****
  /*
  **pre_store16_1:
  **	...
! **	vstrh.32	q[0-9]+, \[r0, #-52\]!
  **	...
  */
  int16_t* pre_store16_1 (int16_t * a, int32x4_t v)
--- 215,221 ----
  /*
  **pre_store16_1:
  **	...
! **	vstrh.32	q[0-7], \[r0, #-52\]!
  **	...
  */
  int16_t* pre_store16_1 (int16_t * a, int32x4_t v)
*************** int16_t* pre_store16_1 (int16_t * a, int
*** 228,234 ****
  /*
  **pre_storefp32_0:
  **	...
! **	vstrw.32	q0, \[r0, #-4\]!
  **	...
  */
  float32_t *pre_storefp32_0 (float32_t *a, float32x4_t v)
--- 228,234 ----
  /*
  **pre_storefp32_0:
  **	...
! **	vstrw.32	q[0-7], \[r0, #-4\]!
  **	...
  */
  float32_t *pre_storefp32_0 (float32_t *a, float32x4_t v)
*************** float32_t *pre_storefp32_0 (float32_t *a
*** 241,247 ****
  /*
  **pre_store32_0:
  **	...
! **	vstrw.32	q[0-9]+, \[r0, #4\]!
  **	...
  */
  int32_t* pre_store32_0 (int32_t * a, int32x4_t v)
--- 241,247 ----
  /*
  **pre_store32_0:
  **	...
! **	vstrw.32	q[0-7], \[r0, #4\]!
  **	...
  */
  int32_t* pre_store32_0 (int32_t * a, int32x4_t v)
*************** int32_t* pre_store32_0 (int32_t * a, int
*** 255,261 ****
  /*
  **post_store8_0:
  **	...
! **	vstrb.8	q[0-9]+, \[r0\], #-26
  **	...
  */
  int8_t* post_store8_0 (int8_t * a, int8x16_t v)
--- 255,261 ----
  /*
  **post_store8_0:
  **	...
! **	vstrb.8	q[0-7], \[r0\], #-26
  **	...
  */
  int8_t* post_store8_0 (int8_t * a, int8x16_t v)
*************** int8_t* post_store8_0 (int8_t * a, int8x
*** 268,274 ****
  /*
  **post_store8_1:
  **	...
! **	vstrb.16	q[0-9]+, \[r0\], #1
  **	...
  */
  uint8_t* post_store8_1 (uint8_t * a, uint16x8_t v)
--- 268,274 ----
  /*
  **post_store8_1:
  **	...
! **	vstrb.16	q[0-7], \[r0\], #1
  **	...
  */
  uint8_t* post_store8_1 (uint8_t * a, uint16x8_t v)
*************** uint8_t* post_store8_1 (uint8_t * a, uin
*** 281,287 ****
  /*
  **post_store8_2:
  **	...
! **	vstrb.8	q[0-9]+, \[r0\], #-26
  **	...
  */
  int8_t* post_store8_2 (int8_t * a, int8x16_t v)
--- 281,287 ----
  /*
  **post_store8_2:
  **	...
! **	vstrb.8	q[0-7], \[r0\], #-26
  **	...
  */
  int8_t* post_store8_2 (int8_t * a, int8x16_t v)
*************** int8_t* post_store8_2 (int8_t * a, int8x
*** 294,300 ****
  /*
  **post_store8_3:
  **	...
! **	vstrb.16	q[0-9]+, \[r0\], #7
  **	...
  */
  uint8_t* post_store8_3 (uint8_t * a, uint16x8_t v)
--- 294,300 ----
  /*
  **post_store8_3:
  **	...
! **	vstrb.16	q[0-7], \[r0\], #7
  **	...
  */
  uint8_t* post_store8_3 (uint8_t * a, uint16x8_t v)
*************** uint8_t* post_store8_3 (uint8_t * a, uin
*** 307,313 ****
  /*
  **post_storefp16_0:
  **	...
! **	vstrh.16	q[0-9]+, \[r0\], #-16
  **	...
  */
  float16_t *post_storefp16_0 (float16_t *a, float16x8_t v)
--- 307,313 ----
  /*
  **post_storefp16_0:
  **	...
! **	vstrh.16	q[0-7], \[r0\], #-16
  **	...
  */
  float16_t *post_storefp16_0 (float16_t *a, float16x8_t v)
*************** float16_t *post_storefp16_0 (float16_t *
*** 320,326 ****
  /*
  **post_store16_0:
  **	...
! **	vstrh.16	q[0-9]+, \[r0\], #126
  **	...
  */
  int16_t* post_store16_0 (int16_t * a, int16x8_t v)
--- 320,326 ----
  /*
  **post_store16_0:
  **	...
! **	vstrh.16	q[0-7], \[r0\], #126
  **	...
  */
  int16_t* post_store16_0 (int16_t * a, int16x8_t v)
*************** int16_t* post_store16_0 (int16_t * a, in
*** 333,339 ****
  /*
  **post_store16_1:
  **	...
! **	vstrh.32	q[0-9]+, \[r0\], #-16
  **	...
  */
  uint16_t* post_store16_1 (uint16_t * a, uint32x4_t v)
--- 333,339 ----
  /*
  **post_store16_1:
  **	...
! **	vstrh.32	q[0-7], \[r0\], #-16
  **	...
  */
  uint16_t* post_store16_1 (uint16_t * a, uint32x4_t v)
*************** uint16_t* post_store16_1 (uint16_t * a,
*** 346,352 ****
  /*
  **post_storefp32_0:
  **	...
! **	vstrw.32	q[0-9]+, \[r0\], #-16
  **	...
  */
  float32_t* post_storefp32_0 (float32_t * a, float32x4_t v)
--- 346,352 ----
  /*
  **post_storefp32_0:
  **	...
! **	vstrw.32	q[0-7], \[r0\], #-16
  **	...
  */
  float32_t* post_storefp32_0 (float32_t * a, float32x4_t v)
*************** float32_t* post_storefp32_0 (float32_t *
*** 359,365 ****
  /*
  **post_store32_0:
  **	...
! **	vstrw.32	q[0-9]+, \[r0\], #16
  **	...
  */
  int32_t* post_store32_0 (int32_t * a, int32x4_t v)
--- 359,365 ----
  /*
  **post_store32_0:
  **	...
! **	vstrw.32	q[0-7], \[r0\], #16
  **	...
  */
  int32_t* post_store32_0 (int32_t * a, int32x4_t v)
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/mve_vadcq_vsbcq_fpscr_overwrite.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/mve_vadcq_vsbcq_fpscr_overwrite.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/mve_vadcq_vsbcq_fpscr_overwrite.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/mve_vadcq_vsbcq_fpscr_overwrite.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,67 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include <arm_mve.h>
+ 
+ volatile int32x4_t c1;
+ volatile uint32x4_t c2;
+ int *carry;
+ 
+ int
+ main ()
+ {
+   int32x4_t a1 = vcreateq_s32 (0, 0);
+   int32x4_t b1 = vcreateq_s32 (0, 0);
+   int32x4_t inactive1 = vcreateq_s32 (0, 0);
+ 
+   uint32x4_t a2 = vcreateq_u32 (0, 0);
+   uint32x4_t b2 = vcreateq_u32 (0, 0);
+   uint32x4_t inactive2 = vcreateq_u32 (0, 0);
+ 
+   mve_pred16_t p = 0xFFFF;
+   (*carry) = 0xFFFFFFFF;
+ 
+   __builtin_arm_set_fpscr_nzcvqc (0);
+   c1 = vadcq (a1, b1, carry);
+   if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000)
+     __builtin_abort ();
+   (*carry) = 0xFFFFFFFF;
+   __builtin_arm_set_fpscr_nzcvqc (0);
+   c2 = vadcq (a2, b2, carry);
+   if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000)
+     __builtin_abort ();
+   (*carry) = 0xFFFFFFFF;
+   __builtin_arm_set_fpscr_nzcvqc (0);
+   c1 = vsbcq (a1, b1, carry);
+   if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000)
+     __builtin_abort ();
+   (*carry) = 0xFFFFFFFF;
+   __builtin_arm_set_fpscr_nzcvqc (0);
+   c2 = vsbcq (a2, b2, carry);
+   if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000)
+     __builtin_abort ();
+   (*carry) = 0xFFFFFFFF;
+   __builtin_arm_set_fpscr_nzcvqc (0);
+   c1 = vadcq_m (inactive1, a1, b1, carry, p);
+   if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000)
+     __builtin_abort ();
+   (*carry) = 0xFFFFFFFF;
+   __builtin_arm_set_fpscr_nzcvqc (0);
+   c2 = vadcq_m (inactive2, a2, b2, carry, p);
+   if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000)
+     __builtin_abort ();
+   (*carry) = 0xFFFFFFFF;
+   __builtin_arm_set_fpscr_nzcvqc (0);
+   c1 = vsbcq_m (inactive1, a1, b1, carry, p);
+   if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000)
+     __builtin_abort ();
+   (*carry) = 0xFFFFFFFF;
+   __builtin_arm_set_fpscr_nzcvqc (0);
+   c2 = vsbcq_m (inactive2, a2, b2, carry, p);
+   if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000)
+     __builtin_abort ();
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-1-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-1-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-1-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-1-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2 --save-temps" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-1.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE uint8x16_t
+ #define INTRINSIC vstrbq_u8
+ #define INTRINSIC_P vstrbq_p_u8
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-10-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-10-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-10-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-10-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-10.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-10.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-10.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-10.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-10.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE int32x4_t
+ #define INTRINSIC vstrhq_s32
+ #define INTRINSIC_P vstrhq_p_s32
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-11-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-11-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-11-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-11-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-11.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-11.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-11.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-11.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-11.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE uint32x4_t
+ #define INTRINSIC vstrwq_u32
+ #define INTRINSIC_P vstrwq_p_u32
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-12-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-12-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-12-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-12-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-12.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-12.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-12.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-12.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-12.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE int32x4_t
+ #define INTRINSIC vstrwq_s32
+ #define INTRINSIC_P vstrwq_p_s32
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-13-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-13-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-13-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-13-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve_fp } */
+ 
+ #include "pr108177-13.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-13.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-13.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-13.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-13.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve_fp } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE float16x8_t
+ #define INTRINSIC vstrhq_f16
+ #define INTRINSIC_P vstrhq_p_f16
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-14-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-14-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-14-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-14-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve_fp } */
+ 
+ #include "pr108177-14.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-14.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-14.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-14.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-14.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve_fp } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE float32x4_t
+ #define INTRINSIC vstrwq_f32
+ #define INTRINSIC_P vstrwq_p_f32
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-2-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-2-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-2-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-2-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-2.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-2.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE int8x16_t
+ #define INTRINSIC vstrbq_s8
+ #define INTRINSIC_P vstrbq_p_s8
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-3-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-3-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-3-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-3-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-3.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-3.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-3.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-3.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE uint16x8_t
+ #define INTRINSIC vstrbq_u16
+ #define INTRINSIC_P vstrbq_p_u16
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-4-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-4-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-4-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-4-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-4.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-4.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-4.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-4.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-4.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE int16x8_t
+ #define INTRINSIC vstrbq_s16
+ #define INTRINSIC_P vstrbq_p_s16
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-5-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-5-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-5-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-5-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-5.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-5.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-5.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-5.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-5.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE uint32x4_t
+ #define INTRINSIC vstrbq_u32
+ #define INTRINSIC_P vstrbq_p_u32
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-6-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-6-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-6-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-6-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-6.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-6.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-6.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-6.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-6.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE int32x4_t
+ #define INTRINSIC vstrbq_s32
+ #define INTRINSIC_P vstrbq_p_s32
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-7-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-7-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-7-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-7-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-7.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-7.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-7.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-7.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-7.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE uint16x8_t
+ #define INTRINSIC vstrhq_u16
+ #define INTRINSIC_P vstrhq_p_u16
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-8-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-8-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-8-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-8-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-8.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-8.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-8.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE int16x8_t
+ #define INTRINSIC vstrhq_s16
+ #define INTRINSIC_P vstrhq_p_s16
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-9-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-9-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-9-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-9-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-9.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-9.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-9.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-9.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-9.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE uint32x4_t
+ #define INTRINSIC vstrhq_u32
+ #define INTRINSIC_P vstrhq_p_u32
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-main.x gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-main.x
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-main.x	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-main.x	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,31 ----
+ #include <arm_mve.h>
+ extern void abort (void);
+ 
+ __attribute__ ((noipa)) void
+ write_expected (uint32x4_t v, void *a)
+ {
+   TYPE _v = (TYPE) v;
+   INTRINSIC (a, _v);
+ }
+ 
+ void test (uint32x4_t, void *, mve_pred16_t, mve_pred16_t);
+ 
+ int main(void)
+ {
+   uint32x4_t v = {0, 1, 2, 3};
+   uint32_t actual[] = {0, 0, 0, 0};
+   uint32_t expected[] = {0, 0, 0, 0};
+ 
+   write_expected (v, &(expected[0]));
+ 
+   mve_pred16_t p1 = 0xff00;
+   mve_pred16_t p2 = 0x00ff;
+ 
+   test (v, (void *)&actual[0], p1, p2);
+ 
+   if (__builtin_memcmp (&actual[0], &expected[0], 16) != 0)
+     abort ();
+ 
+   return 0;
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177.x gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177.x
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177.x	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177.x	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,9 ----
+ #include "pr108177-main.x"
+ 
+ __attribute__ ((noipa)) void
+ test (uint32x4_t v, void *a, mve_pred16_t p1, mve_pred16_t p2)
+ {
+   TYPE _v = (TYPE) v;
+   INTRINSIC_P (a, _v, p1);
+   INTRINSIC_P (a, _v, p2);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/neon-recip-div-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/neon-recip-div-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/neon-recip-div-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/neon-recip-div-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_neon_ok } */
+ /* { dg-options "-O3 -freciprocal-math -fno-unsafe-math-optimizations -save-temps" } */
+ /* { dg-add-options arm_neon } */
+ 
+ int *a;
+ int n;
+ void b() {
+   int c;
+   for (c = 0; c < 100000; c++)
+     a[c] = (float)c / n;
+ }
+ /* We should not ICE, or get a vectorized reciprocal instruction when unsafe
+    math optimizations are disabled.  */
+ /* { dg-final { scan-assembler-not "vrecpe\\.f32\\t\[qd\].*" } } */
+ /* { dg-final { scan-assembler-not "vrecps\\.f32\\t\[qd\].*" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/pr109939.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/pr109939.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/pr109939.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/pr109939.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_sat_ok } */
+ /* { dg-add-options arm_sat } */
+ /* { dg-additional-options "-O -Wall -Wconversion" } */
+ 
+ #include <arm_acle.h>
+ 
+ int dbg_ssat_out;
+ int dbg_ssat_in;
+ 
+ void test_arm_ssat(void)
+ {
+     dbg_ssat_out = __ssat(dbg_ssat_in, 16);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/pure-code/pr109800.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/pure-code/pr109800.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/pure-code/pr109800.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/pure-code/pr109800.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,4 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_hard_ok } */
+ /* { dg-options "-O2 -march=armv7-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mbig-endian -mpure-code" } */
+ double f() { return 5.0; }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-compare-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-compare-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-compare-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-compare-1.c	Thu Jun 20 08:08:08 2024
*************** TEST_TYPE (vs32, __INT32_TYPE__, COMPARE
*** 50,80 ****
  TEST_TYPE (vu32, __UINT32_TYPE__, COMPARE_REG, 16)
  
  /* { 8 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i8  eq, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i8  ne, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8  lt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8  le, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8  gt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8  ge, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u8  hi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u8  cs, q[0-9]+, q[0-9]+\n} 2 } } */
  
  /* { 16 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i16  eq, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i16  ne, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16  lt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16  le, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16  gt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16  ge, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u16  hi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u16  cs, q[0-9]+, q[0-9]+\n} 2 } } */
  
  /* { 32 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i32  eq, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i32  ne, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32  lt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32  le, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32  gt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32  ge, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u32  hi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u32  cs, q[0-9]+, q[0-9]+\n} 2 } } */
--- 50,80 ----
  TEST_TYPE (vu32, __UINT32_TYPE__, COMPARE_REG, 16)
  
  /* { 8 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i8\teq, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i8\tne, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8\tlt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8\tle, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8\tgt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8\tge, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u8\thi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u8\tcs, q[0-9]+, q[0-9]+\n} 2 } } */
  
  /* { 16 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i16\teq, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i16\tne, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16\tlt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16\tle, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16\tgt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16\tge, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u16\thi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u16\tcs, q[0-9]+, q[0-9]+\n} 2 } } */
  
  /* { 32 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i32\teq, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i32\tne, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32\tlt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32\tle, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32\tgt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32\tge, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u32\thi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u32\tcs, q[0-9]+, q[0-9]+\n} 2 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-compare-scalar-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-compare-scalar-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-compare-scalar-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-compare-scalar-1.c	Thu Jun 20 08:08:08 2024
*************** TEST_TYPE (vs32, __INT32_TYPE__, 16)
*** 39,69 ****
  TEST_TYPE (vu32, __UINT32_TYPE__, 16)
  
  /* { 8 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i8  eq, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i8  ne, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8  lt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8  le, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8  gt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8  ge, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u8  hi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u8  cs, q[0-9]+, q[0-9]+\n} 2 } } */
  
  /* { 16 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i16  eq, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i16  ne, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16  lt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16  le, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16  gt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16  ge, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u16  hi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u16  cs, q[0-9]+, q[0-9]+\n} 2 } } */
  
  /* { 32 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i32  eq, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i32  ne, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32  lt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32  le, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32  gt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32  ge, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u32  hi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u32  cs, q[0-9]+, q[0-9]+\n} 2 } } */
--- 39,69 ----
  TEST_TYPE (vu32, __UINT32_TYPE__, 16)
  
  /* { 8 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i8\teq, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i8\tne, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8\tlt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8\tle, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8\tgt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8\tge, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u8\thi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u8\tcs, q[0-9]+, q[0-9]+\n} 2 } } */
  
  /* { 16 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i16\teq, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i16\tne, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16\tlt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16\tle, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16\tgt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16\tge, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u16\thi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u16\tcs, q[0-9]+, q[0-9]+\n} 2 } } */
  
  /* { 32 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i32\teq, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i32\tne, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32\tlt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32\tle, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32\tgt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32\tge, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u32\thi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u32\tcs, q[0-9]+, q[0-9]+\n} 2 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vabs.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vabs.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vabs.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vabs.c	Thu Jun 20 08:08:08 2024
*************** FUNC(f, float, 16, 8, vabs)
*** 38,44 ****
     integer optimizations actually generate a call to memmove, the other ones a
     'vabs'.  */
  /* { dg-final { scan-assembler-times {vabs.s[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
! /* { dg-final { scan-assembler-times {vabs.f[0-9]+  q[0-9]+, q[0-9]+} 2 } } */
  /* { dg-final { scan-assembler-times {vldr[bhw].[0-9]+\tq[0-9]+} 5 } } */
  /* { dg-final { scan-assembler-times {vstr[bhw].[0-9]+\tq[0-9]+} 5 } } */
  /* { dg-final { scan-assembler-times {memmove} 3 } } */
--- 38,44 ----
     integer optimizations actually generate a call to memmove, the other ones a
     'vabs'.  */
  /* { dg-final { scan-assembler-times {vabs.s[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
! /* { dg-final { scan-assembler-times {vabs.f[0-9]+\tq[0-9]+, q[0-9]+} 2 } } */
  /* { dg-final { scan-assembler-times {vldr[bhw].[0-9]+\tq[0-9]+} 5 } } */
  /* { dg-final { scan-assembler-times {vstr[bhw].[0-9]+\tq[0-9]+} 5 } } */
  /* { dg-final { scan-assembler-times {memmove} 3 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c	Thu Jun 20 08:08:08 2024
*************** FUNC(u, uint, 16, 8, +, vadd)
*** 22,30 ****
  FUNC(s, int, 8, 16, +, vadd)
  FUNC(u, uint, 8, 16, +, vadd)
  
! /* { dg-final { scan-assembler-times {vadd\.i32  q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */
! /* { dg-final { scan-assembler-times {vadd\.i16  q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */
! /* { dg-final { scan-assembler-times {vadd\.i8  q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */
  
  void test_vadd_f32 (float * dest, float * a, float * b) {
    int i;
--- 22,30 ----
  FUNC(s, int, 8, 16, +, vadd)
  FUNC(u, uint, 8, 16, +, vadd)
  
! /* { dg-final { scan-assembler-times {vadd\.i32\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } } */
! /* { dg-final { scan-assembler-times {vadd\.i16\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } } */
! /* { dg-final { scan-assembler-times {vadd\.i8\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } } */
  
  void test_vadd_f32 (float * dest, float * a, float * b) {
    int i;
*************** void test_vadd_f32 (float * dest, float
*** 32,38 ****
      dest[i] = a[i] + b[i];
    }
  }
! /* { dg-final { scan-assembler-times {vadd\.f32 q[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
  
  void test_vadd_f16 (__fp16 * dest, __fp16 * a, __fp16 * b) {
    int i;
--- 32,38 ----
      dest[i] = a[i] + b[i];
    }
  }
! /* { dg-final { scan-assembler-times {vadd\.f32\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
  
  void test_vadd_f16 (__fp16 * dest, __fp16 * a, __fp16 * b) {
    int i;
*************** void test_vadd_f16 (__fp16 * dest, __fp1
*** 40,43 ****
      dest[i] = a[i] + b[i];
    }
  }
! /* { dg-final { scan-assembler-times {vadd\.f16 q[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
--- 40,43 ----
      dest[i] = a[i] + b[i];
    }
  }
! /* { dg-final { scan-assembler-times {vadd\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vadd-scalar-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vadd-scalar-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vadd-scalar-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vadd-scalar-1.c	Thu Jun 20 08:08:08 2024
*************** FUNC_IMM(u, uint, 8, 16, +, vaddimm)
*** 24,32 ****
  
  /* For the moment we do not select the T2 vadd variant operating on a scalar
     final argument.  */
! /* { dg-final { scan-assembler-times {vadd\.i32  q[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {vadd\.i16  q[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {vadd\.i8  q[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */
  
  void test_vaddimm_f32 (float * dest, float * a) {
    int i;
--- 24,32 ----
  
  /* For the moment we do not select the T2 vadd variant operating on a scalar
     final argument.  */
! /* { dg-final { scan-assembler-times {vadd\.i32\tq[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {vadd\.i16\tq[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {vadd\.i8\tq[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */
  
  void test_vaddimm_f32 (float * dest, float * a) {
    int i;
*************** void test_vaddimm_f32 (float * dest, flo
*** 34,40 ****
      dest[i] = a[i] + 5.0;
    }
  }
! /* { dg-final { scan-assembler-times {vadd\.f32 q[0-9]+, q[0-9]+, r[0-9]+} 1 { xfail *-*-* } } } */
  
  /* Note that dest[i] = a[i] + 5.0f16 is not vectorized.  */
  void test_vaddimm_f16 (__fp16 * dest, __fp16 * a) {
--- 34,40 ----
      dest[i] = a[i] + 5.0;
    }
  }
! /* { dg-final { scan-assembler-times {vadd\.f32\tq[0-9]+, q[0-9]+, r[0-9]+} 1 { xfail *-*-* } } } */
  
  /* Note that dest[i] = a[i] + 5.0f16 is not vectorized.  */
  void test_vaddimm_f16 (__fp16 * dest, __fp16 * a) {
*************** void test_vaddimm_f16 (__fp16 * dest, __
*** 44,47 ****
      dest[i] = a[i] + b;
    }
  }
! /* { dg-final { scan-assembler-times {vadd\.f16 q[0-9]+, q[0-9]+, r[0-9]+} 1 { xfail *-*-* } } } */
--- 44,47 ----
      dest[i] = a[i] + b;
    }
  }
! /* { dg-final { scan-assembler-times {vadd\.f16\tq[0-9]+, q[0-9]+, r[0-9]+} 1 { xfail *-*-* } } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c	Thu Jun 20 08:08:08 2024
*************** FUNC(u, uint, 8, clz)
*** 23,28 ****
  
  /* 16 and 8-bit versions are not vectorized because they need pack/unpack
     patterns since __builtin_clz uses 32-bit parameter and return value.  */
! /* { dg-final { scan-assembler-times {vclz\.i32  q[0-9]+, q[0-9]+} 2 } } */
! /* { dg-final { scan-assembler-times {vclz\.i16  q[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {vclz\.i8  q[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */
--- 23,28 ----
  
  /* 16 and 8-bit versions are not vectorized because they need pack/unpack
     patterns since __builtin_clz uses 32-bit parameter and return value.  */
! /* { dg-final { scan-assembler-times {vclz\.i32\tq[0-9]+, q[0-9]+} 2 } } */
! /* { dg-final { scan-assembler-times {vclz\.i16\tq[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {vclz\.i8\tq[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vcmp.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vcmp.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vcmp.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vcmp.c	Thu Jun 20 08:08:08 2024
*************** ALL_FUNCS(>=, vcmpge)
*** 36,50 ****
  
  /* MVE has only 128-bit vectors, so we can vectorize only half of the
     functions above.  */
! /* { dg-final { scan-assembler-times {\tvcmp.i[0-9]+  eq, q[0-9]+, q[0-9]+\n} 6 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i[0-9]+  ne, q[0-9]+, q[0-9]+\n} 6 } } */
  
  /* lt, le, gt, ge apply to signed types, cs and hi to unsigned types.  */
  /* lt and le with unsigned types are replaced with the opposite condition, hence
     the double number of matches for cs and hi.  */
! /* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+  lt, q[0-9]+, q[0-9]+\n} 3 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+  le, q[0-9]+, q[0-9]+\n} 3 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+  gt, q[0-9]+, q[0-9]+\n} 3 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+  ge, q[0-9]+, q[0-9]+\n} 3 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u[0-9]+  cs, q[0-9]+, q[0-9]+\n} 6 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u[0-9]+  hi, q[0-9]+, q[0-9]+\n} 6 } } */
--- 36,50 ----
  
  /* MVE has only 128-bit vectors, so we can vectorize only half of the
     functions above.  */
! /* { dg-final { scan-assembler-times {\tvcmp.i[0-9]+\teq, q[0-9]+, q[0-9]+\n} 6 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i[0-9]+\tne, q[0-9]+, q[0-9]+\n} 6 } } */
  
  /* lt, le, gt, ge apply to signed types, cs and hi to unsigned types.  */
  /* lt and le with unsigned types are replaced with the opposite condition, hence
     the double number of matches for cs and hi.  */
! /* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+\tlt, q[0-9]+, q[0-9]+\n} 3 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+\tle, q[0-9]+, q[0-9]+\n} 3 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+\tgt, q[0-9]+, q[0-9]+\n} 3 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+\tge, q[0-9]+, q[0-9]+\n} 3 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u[0-9]+\tcs, q[0-9]+, q[0-9]+\n} 6 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u[0-9]+\thi, q[0-9]+, q[0-9]+\n} 6 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vneg.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vneg.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vneg.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vneg.c	Thu Jun 20 08:08:08 2024
*************** FUNC(f, float, 16, 8, -, vneg)
*** 45,52 ****
  
  /* MVE has only 128-bit vectors, so we can vectorize only half of the
     functions above.  */
! /* { dg-final { scan-assembler-times {vneg.s[0-9]+  q[0-9]+, q[0-9]+} 6 } } */
! /* { dg-final { scan-assembler-times {vneg.f[0-9]+  q[0-9]+, q[0-9]+} 2 } } */
  /* { dg-final { scan-assembler-times {vldr[bhw].[0-9]+\tq[0-9]+} 8 } } */
  /* { dg-final { scan-assembler-times {vstr[bhw].[0-9]+\tq[0-9]+} 8 } } */
  /* { dg-final { scan-assembler-not {orr\tr[0-9]+, r[0-9]+, r[0-9]+} } } */
--- 45,52 ----
  
  /* MVE has only 128-bit vectors, so we can vectorize only half of the
     functions above.  */
! /* { dg-final { scan-assembler-times {vneg.s[0-9]+\tq[0-9]+, q[0-9]+} 6 } } */
! /* { dg-final { scan-assembler-times {vneg.f[0-9]+\tq[0-9]+, q[0-9]+} 2 } } */
  /* { dg-final { scan-assembler-times {vldr[bhw].[0-9]+\tq[0-9]+} 8 } } */
  /* { dg-final { scan-assembler-times {vstr[bhw].[0-9]+\tq[0-9]+} 8 } } */
  /* { dg-final { scan-assembler-not {orr\tr[0-9]+, r[0-9]+, r[0-9]+} } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c	Thu Jun 20 08:08:08 2024
*************** FUNC_IMM(u, uint, 8, 16, >>, vshrimm)
*** 58,64 ****
  /* Vector right shifts use vneg and left shifts.  */
  /* { dg-final { scan-assembler-times {vshl.s[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
  /* { dg-final { scan-assembler-times {vshl.u[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
! /* { dg-final { scan-assembler-times {vneg.s[0-9]+  q[0-9]+, q[0-9]+} 6 } } */
  
  
  /* Shift by immediate.  */
--- 58,64 ----
  /* Vector right shifts use vneg and left shifts.  */
  /* { dg-final { scan-assembler-times {vshl.s[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
  /* { dg-final { scan-assembler-times {vshl.u[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
! /* { dg-final { scan-assembler-times {vneg.s[0-9]+\tq[0-9]+, q[0-9]+} 6 } } */
  
  
  /* Shift by immediate.  */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/pr101325.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/pr101325.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/pr101325.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/pr101325.c	Thu Jun 20 08:08:08 2024
*************** unsigned foo(int8x16_t v, int8x16_t w)
*** 9,14 ****
  {
    return vcmpeqq (v, w);
  }
! /* { dg-final { scan-assembler {\tvcmp.i8  eq} } } */
! /* { dg-final { scan-assembler {\tvmrs\tr[0-9]+, P0} } } */
  /* { dg-final { scan-assembler {\tuxth} } } */
--- 9,14 ----
  {
    return vcmpeqq (v, w);
  }
! /* { dg-final { scan-assembler {\tvcmp.i8\teq} } } */
! /* { dg-final { scan-assembler {\tvmrs\tr[0-9]+, p0} } } */
  /* { dg-final { scan-assembler {\tuxth} } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/attribute-io.h gcc-12.4.0/gcc/testsuite/gcc.target/avr/attribute-io.h
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/attribute-io.h	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/attribute-io.h	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,74 ----
+ /* { dg-do run } */
+ /* { dg-options "-Os -save-temps" } */
+ 
+ __attribute__((address(1234)))
+ int g_1234;
+ 
+ __attribute__((weak, address(4321)))
+ int w_4321;
+ 
+ __attribute__((address(5678)))
+ static int l_5678;
+ 
+ __attribute__((io_low(__AVR_SFR_OFFSET__ + 3)))
+ volatile unsigned char g_low;
+ 
+ __attribute__((weak, io_low(__AVR_SFR_OFFSET__ + 2)))
+ volatile unsigned char w_low;
+ 
+ __attribute__((io_low(__AVR_SFR_OFFSET__ + 1)))
+ static volatile unsigned char l_low;
+ 
+ __attribute__((io(__AVR_SFR_OFFSET__ + 35)))
+ volatile unsigned char g_io;
+ 
+ __attribute__((weak, io(__AVR_SFR_OFFSET__ + 34)))
+ volatile unsigned char w_io;
+ 
+ __attribute__((io(__AVR_SFR_OFFSET__ + 33)))
+ static volatile unsigned char l_io;
+ 
+ #define CMP(SYM, VAL)				\
+   do {						\
+     unsigned x;					\
+     __asm ("" : "=d" (x) : "0" (& SYM));	\
+     if (x != VAL)				\
+       __builtin_abort();			\
+   } while(0)
+ 
+ 
+ int main (void)
+ {
+   CMP (g_1234, 1234);
+   CMP (w_4321, 4321);
+   CMP (l_5678, 5678);
+ 
+   CMP (g_low, __AVR_SFR_OFFSET__ + 3);
+   CMP (w_low, __AVR_SFR_OFFSET__ + 2);
+   CMP (l_low, __AVR_SFR_OFFSET__ + 1);
+ 
+   CMP (g_io, __AVR_SFR_OFFSET__ + 35);
+   CMP (w_io, __AVR_SFR_OFFSET__ + 34);
+   CMP (l_io, __AVR_SFR_OFFSET__ + 33);
+ 
+   l_low = l_io;
+   g_low = g_io;
+   w_low = w_io;
+   l_low |= 1;
+   g_low |= 2;
+   w_low |= 4;
+ 
+   return 0;
+ }
+ 
+ /* { dg-final { scan-assembler "g_1234 = 1234" } } */
+ /* { dg-final { scan-assembler "w_4321 = 4321" } } */
+ /* { dg-final { scan-assembler "l_5678 = 5678" } } */
+ 
+ /* { dg-final { scan-assembler "\\.globl	g_1234" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_low" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_io" } } */
+ 
+ /* { dg-final { scan-assembler "\\.weak	w_4321" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_low" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_io" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr112952-0.c gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr112952-0.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr112952-0.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr112952-0.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run } */
+ /* { dg-options "-Os -save-temps -fno-data-sections -fno-common" } */
+ 
+ #include "attribute-io.h"
+ 
+ /* { dg-final { scan-assembler "g_1234 = 1234" } } */
+ /* { dg-final { scan-assembler "w_4321 = 4321" } } */
+ /* { dg-final { scan-assembler "l_5678 = 5678" } } */
+ 
+ /* { dg-final { scan-assembler "\\.globl	g_1234" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_low" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_io" } } */
+ 
+ /* { dg-final { scan-assembler "\\.weak	w_4321" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_low" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_io" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr112952-1.c gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr112952-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr112952-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr112952-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run } */
+ /* { dg-options "-Os -save-temps -fno-data-sections -fcommon" } */
+ 
+ #include "attribute-io.h"
+ 
+ /* { dg-final { scan-assembler "g_1234 = 1234" } } */
+ /* { dg-final { scan-assembler "w_4321 = 4321" } } */
+ /* { dg-final { scan-assembler "l_5678 = 5678" } } */
+ 
+ /* { dg-final { scan-assembler "\\.globl	g_1234" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_low" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_io" } } */
+ 
+ /* { dg-final { scan-assembler "\\.weak	w_4321" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_low" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_io" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr112952-2.c gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr112952-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr112952-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr112952-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run } */
+ /* { dg-options "-Os -save-temps -fdata-sections -fno-common" } */
+ 
+ #include "attribute-io.h"
+ 
+ /* { dg-final { scan-assembler "g_1234 = 1234" } } */
+ /* { dg-final { scan-assembler "w_4321 = 4321" } } */
+ /* { dg-final { scan-assembler "l_5678 = 5678" } } */
+ 
+ /* { dg-final { scan-assembler "\\.globl	g_1234" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_low" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_io" } } */
+ 
+ /* { dg-final { scan-assembler "\\.weak	w_4321" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_low" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_io" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr112952-3.c gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr112952-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr112952-3.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr112952-3.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run } */
+ /* { dg-options "-Os -save-temps -fdata-sections -fcommon" } */
+ 
+ #include "attribute-io.h"
+ 
+ /* { dg-final { scan-assembler "g_1234 = 1234" } } */
+ /* { dg-final { scan-assembler "w_4321 = 4321" } } */
+ /* { dg-final { scan-assembler "l_5678 = 5678" } } */
+ 
+ /* { dg-final { scan-assembler "\\.globl	g_1234" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_low" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_io" } } */
+ 
+ /* { dg-final { scan-assembler "\\.weak	w_4321" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_low" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_io" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr82931.c gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr82931.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr82931.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr82931.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,29 ----
+ /* { dg-options "-Os" } */
+ /* { dg-final { scan-assembler-times "bst" 4 } } */
+ /* { dg-final { scan-assembler-times "bld" 4 } } */
+ 
+ typedef __UINT8_TYPE__ uint8_t;
+ typedef __UINT16_TYPE__ uint16_t;
+ 
+ #define BitMask (1u << 14)
+ #define Bit8Mask ((uint8_t) (1u << 4))
+ 
+ void merge1_8 (uint8_t *dst, const uint8_t *src)
+ {
+     *dst = (*src & Bit8Mask) | (*dst & ~ Bit8Mask);
+ }
+ 
+ void merge2_8 (uint8_t *dst, const uint8_t *src)
+ {
+     *dst ^= (*dst ^ *src) & Bit8Mask;
+ }
+ 
+ void merge1_16 (uint16_t *dst, const uint16_t *src)
+ {
+     *dst = (*src & BitMask) | (*dst & ~ BitMask);
+ }
+ 
+ void merge2_16 (uint16_t *dst, const uint16_t *src)
+ {
+     *dst ^= (*dst ^ *src) & BitMask;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/torture/pr105753.c gcc-12.4.0/gcc/testsuite/gcc.target/avr/torture/pr105753.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/torture/pr105753.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/torture/pr105753.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,13 ----
+ int digit_sum (unsigned long n)
+ {
+   int sum = 0;
+ 
+   do
+     {
+       int x = n % 10;
+       n /= 10;
+       sum += x;
+     } while(n);
+ 
+   return sum;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/torture/pr109650-1.c gcc-12.4.0/gcc/testsuite/gcc.target/avr/torture/pr109650-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/torture/pr109650-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/torture/pr109650-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,63 ----
+ /* { dg-do run } */
+ /* { dg-options { -std=c99 } } */
+ 
+ typedef _Bool bool;
+ typedef __UINT8_TYPE__ uint8_t;
+ 
+ static inline __attribute__((__always_inline__))
+ bool func1a (bool p1, uint8_t p2)
+ {
+   if (p1)
+     return p2 <= 8;
+   return p2 <= 2;
+ }
+ 
+ __attribute__((__noinline__, __noclone__))
+ bool func1b (bool p1, uint8_t p2)
+ {
+   return func1a (p1, p2);
+ }
+ 
+ static inline __attribute__((__always_inline__))
+ bool func2a (bool p1, unsigned p2)
+ {
+   if (p1)
+     return p2 <= 8;
+   return p2 <= 2;
+ }
+ 
+ __attribute__((__noinline__, __noclone__))
+ bool func2b (bool p1, unsigned p2)
+ {
+   return func2a (p1, p2);
+ }
+ 
+ void test1 (void)
+ {
+   if (func1a (0, 1) != func1b (0, 1)) __builtin_abort();
+   if (func1a (0, 2) != func1b (0, 2)) __builtin_abort();
+   if (func1a (0, 3) != func1b (0, 3)) __builtin_abort();
+ 
+   if (func1a (1, 7) != func1b (1, 7)) __builtin_abort();
+   if (func1a (1, 8) != func1b (1, 8)) __builtin_abort();
+   if (func1a (1, 9) != func1b (1, 9)) __builtin_abort();
+ }
+ 
+ void test2 (void)
+ {
+   if (func2a (0, 1) != func2b (0, 1)) __builtin_abort();
+   if (func2a (0, 2) != func2b (0, 2)) __builtin_abort();
+   if (func2a (0, 3) != func2b (0, 3)) __builtin_abort();
+ 
+   if (func2a (1, 7) != func2b (1, 7)) __builtin_abort();
+   if (func2a (1, 8) != func2b (1, 8)) __builtin_abort();
+   if (func2a (1, 9) != func2b (1, 9)) __builtin_abort();
+ }
+ 
+ int main (void)
+ {
+   test1();
+   test2();
+ 
+   __builtin_exit (0);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/torture/pr109650-2.c gcc-12.4.0/gcc/testsuite/gcc.target/avr/torture/pr109650-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/torture/pr109650-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/torture/pr109650-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,79 ----
+ /* { dg-do run } */
+ 
+ typedef __UINT8_TYPE__ uint8_t;
+ 
+ #define AI static __inline__ __attribute__((__always_inline__))
+ #define NI __attribute__((__noinline__,__noclone__))
+ 
+ AI uint8_t func1_eq (uint8_t c, unsigned x)
+ {
+   if (x == c)
+     return 1;
+   return 0;
+ }
+ 
+ AI uint8_t func1_ne (uint8_t c, unsigned x)
+ {
+   if (x != c)
+     return 1;
+   return 0;
+ }
+ 
+ AI uint8_t func1_ltu (uint8_t c, unsigned x)
+ {
+   if (x < c)
+     return 1;
+   return 0;
+ }
+ 
+ AI uint8_t func1_leu (uint8_t c, unsigned x)
+ {
+   if (x <= c)
+     return 1;
+   return 0;
+ }
+ 
+ AI uint8_t func1_gtu (uint8_t c, unsigned x)
+ {
+   if (x > c)
+     return 1;
+   return 0;
+ }
+ 
+ AI uint8_t func1_geu (uint8_t c, unsigned x)
+ {
+   if (x >= c)
+     return 1;
+   return 0;
+ }
+ 
+ NI uint8_t func2_eq (uint8_t c, unsigned x) { return func1_eq (c, x); }
+ NI uint8_t func2_ne (uint8_t c, unsigned x) { return func1_ne (c, x); }
+ NI uint8_t func2_ltu (uint8_t c, unsigned x) { return func1_ltu (c, x); }
+ NI uint8_t func2_leu (uint8_t c, unsigned x) { return func1_leu (c, x); }
+ NI uint8_t func2_gtu (uint8_t c, unsigned x) { return func1_gtu (c, x); }
+ NI uint8_t func2_geu (uint8_t c, unsigned x) { return func1_geu (c, x); }
+ 
+ AI void test4 (uint8_t c, unsigned x)
+ {
+   if (func2_eq (c, x) != func1_eq (c, x)) __builtin_abort();
+   if (func2_ne (c, x) != func1_ne (c, x)) __builtin_abort();
+   if (func2_ltu (c, x) != func1_ltu (c, x)) __builtin_abort();
+   if (func2_leu (c, x) != func1_leu (c, x)) __builtin_abort();
+   if (func2_gtu (c, x) != func1_gtu (c, x)) __builtin_abort();
+   if (func2_geu (c, x) != func1_geu (c, x)) __builtin_abort();
+ }
+ 
+ int main (void)
+ {
+   test4 (127, 127);
+   test4 (127, 128);
+   test4 (128, 127);
+ 
+   test4 (0x42, 0x142);
+   test4 (0x0, 0x100);
+   test4 (0x0, 0x0);
+   test4 (0x0, 0x1);
+ 
+   __builtin_exit (0);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/torture/pr92606.c gcc-12.4.0/gcc/testsuite/gcc.target/avr/torture/pr92606.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/torture/pr92606.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/torture/pr92606.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,57 ----
+ /* { dg-do run } */
+ 
+ typedef __UINT16_TYPE__ uint16_t;
+ typedef __UINT32_TYPE__ uint32_t;
+ 
+ typedef uint32_t T;
+ 
+ #define NI __attribute__((noinline,noclone))
+ 
+ 
+ #ifndef __AVR_TINY__
+ #define read_u32(X)                                                     \
+     (__extension__(                                                     \
+         {                                                               \
+             uint16_t __addr16 = (uint16_t)(X);                          \
+             uint32_t __result;                                          \
+             __asm__ __volatile__ ("lpm %A0, Z+" "\n\t"                  \
+                                   "lpm %B0, Z+" "\n\t"                  \
+                                   "lpm %C0, Z+" "\n\t"                  \
+                                   "lpm %D0, Z" "\n\t"                   \
+                                   : "=r" (__result), "+z" (__addr16));  \
+             __result;                                                   \
+         }))
+ #else
+ NI uint32_t read_u32 (const uint32_t *p)
+ {
+ 	return *p;
+ }
+ #endif
+ 
+ static const __attribute((progmem)) T xyz_prog[] = { 123, 123, 123 };
+ T xyz[] = { 123, 123, 123 };
+ volatile int x = 0;
+ 
+ NI void prf (T f)
+ {
+     if (f != 123)
+         __builtin_abort();
+ }
+ 
+ NI void func_progmem()
+ {
+     prf (read_u32 (&xyz_prog[0]));
+ }
+ 
+ NI void func_ram()
+ {
+     prf (xyz[x]);
+ }
+ 
+ int main (void)
+ {
+     func_progmem();
+     func_ram();
+ 
+ 	return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/amxtile-4.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/amxtile-4.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/amxtile-4.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/amxtile-4.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,52 ----
+ /* PR target/114098 */
+ /* { dg-do compile { target { ! ia32 } } } */
+ /* { dg-options "-O2 -mamx-tile" } */
+ 
+ #include <stdint.h>
+ #include <x86intrin.h>
+ 
+ #define MAX_ROWS 16
+ #define MAX_COLS 64
+ #define MAX 1024
+ #define STRIDE 64
+ 
+ typedef struct __tile_config
+ {
+   uint8_t palette_id;
+   uint8_t start_row;
+   uint8_t reserved_0[14];
+   uint16_t colsb[16];
+   uint8_t rows[16];
+ } __tilecfg __attribute__ ((aligned (64)));
+ 
+ /* Initialize tile config */
+ static void
+ init_tile_config (__tilecfg *tileinfo)
+ {
+   int i;
+   tileinfo->palette_id = 1;
+   tileinfo->start_row = 0;
+ 
+   for (i = 0; i < 1; ++i)
+   {
+     tileinfo->colsb[i] = MAX_ROWS;
+     tileinfo->rows[i] = MAX_ROWS;
+   }
+ 
+   for (i = 1; i < 4; ++i)
+   {
+     tileinfo->colsb[i] = MAX_COLS;
+     tileinfo->rows[i] = MAX_ROWS;
+   }
+ 
+   _tile_loadconfig (tileinfo);
+ }
+ 
+ void
+ enable_amx (void)
+ {
+   __tilecfg tile_data = {0};
+   init_tile_config (&tile_data);
+ }
+ 
+ /* { dg-final { scan-assembler-times "pxor\[^\n\]*%xmm" 1 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-12.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-12.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-12.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-12.c	Thu Jun 20 08:08:08 2024
*************** foo ()
*** 16,20 ****
    _mm256_zeroupper ();
  }
  
! /* { dg-final { scan-assembler-times "avx_vzeroupper" 4 } } */
  /* { dg-final { scan-assembler-times "\\*avx_vzeroall" 1 } } */
--- 16,21 ----
    _mm256_zeroupper ();
  }
  
! /* { dg-final { scan-assembler-times "avx_vzeroupper" 4 { target ia32 } } } */
! /* { dg-final { scan-assembler-times "avx_vzeroupper" 5 { target { ! ia32 } } } } */
  /* { dg-final { scan-assembler-times "\\*avx_vzeroall" 1 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-29.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-29.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-29.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-29.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O0 -mavx -mtune=generic -mvzeroupper -dp" } */
+ 
+ #include <immintrin.h>
+ 
+ extern __m256 x, y;
+ 
+ void
+ foo ()
+ {
+   x = y;
+ }
+ 
+ /* { dg-final { scan-assembler-times "avx_vzeroupper" 1 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-7.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-7.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-7.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-7.c	Thu Jun 20 08:08:08 2024
*************** foo ()
*** 12,15 ****
    _mm256_zeroupper ();
  }
  
! /* { dg-final { scan-assembler-times "avx_vzeroupper" 1 } } */
--- 12,16 ----
    _mm256_zeroupper ();
  }
  
! /* { dg-final { scan-assembler-times "avx_vzeroupper" 1 { target ia32 } } } */
! /* { dg-final { scan-assembler-times "avx_vzeroupper" 2 { target { ! ia32 } } } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-9.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-9.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-9.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-9.c	Thu Jun 20 08:08:08 2024
*************** foo ()
*** 15,18 ****
    _mm256_zeroupper ();
  }
  
! /* { dg-final { scan-assembler-times "avx_vzeroupper" 4 } } */
--- 15,19 ----
    _mm256_zeroupper ();
  }
  
! /* { dg-final { scan-assembler-times "avx_vzeroupper" 4 { target ia32 } } } */
! /* { dg-final { scan-assembler-times "avx_vzeroupper" 5 { target { ! ia32 } } } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx2-gather-2.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx2-gather-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx2-gather-2.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx2-gather-2.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-O3 -fdump-tree-vect-details -march=skylake" } */
  
  #include "avx2-gather-1.c"
  
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-O3 -fdump-tree-vect-details -march=skylake -mtune=haswell" } */
  
  #include "avx2-gather-1.c"
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx2-gather-6.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx2-gather-6.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx2-gather-6.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx2-gather-6.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx2 -fno-common -fdump-tree-vect-details -mtune=skylake" } */
  
  #include "avx2-gather-5.c"
  
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx2 -fno-common -fdump-tree-vect-details  -mtune=haswell" } */
  
  #include "avx2-gather-5.c"
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512f-pr114566.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512f-pr114566.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512f-pr114566.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512f-pr114566.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,34 ----
+ /* PR tree-optimization/114566 */
+ /* { dg-do run } */
+ /* { dg-options "-O3 -mavx512f" } */
+ /* { dg-additional-options "-fstack-protector-strong" { target fstack_protector } } */
+ /* { dg-require-effective-target avx512f } */
+ 
+ #define AVX512F
+ #include "avx512f-helper.h"
+ 
+ __attribute__((noipa)) int
+ foo (float x, float y)
+ {
+   float a[8][56];
+   __builtin_memset (a, 0, sizeof (a));
+ 
+   for (int j = 0; j < 8; j++)
+     for (int k = 0; k < 56; k++)
+       {
+ 	float b = k * y;
+ 	if (b < 0.)
+ 	  b = 0.;
+ 	if (b > 0.)
+ 	  b = 0.;
+ 	a[j][k] += b;
+       }
+ 
+   return __builtin_log (x);
+ }
+ 
+ void
+ TEST (void)
+ {
+   foo (86.25f, 0.625f);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512f-pr88464-1.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512f-pr88464-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512f-pr88464-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512f-pr88464-1.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512f -mprefer-vector-width=512 -mtune=skylake-avx512 -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 64 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
--- 1,6 ----
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512f -mprefer-vector-width=512 -mtune=haswell -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 64 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512f-pr88464-5.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512f-pr88464-5.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512f-pr88464-5.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512f-pr88464-5.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512f -mprefer-vector-width=512 -mtune=skylake-avx512 -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 64 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
--- 1,6 ----
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512f -mprefer-vector-width=512 -mtune=haswell -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 64 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-1.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-1.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512vl -mprefer-vector-width=256 -mtune=skylake-avx512 -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 32 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
--- 1,6 ----
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512vl -mprefer-vector-width=256 -mtune=haswell -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 32 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-11.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-11.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-11.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-11.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512vl -mprefer-vector-width=128 -mtune=skylake-avx512 -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 16 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
--- 1,6 ----
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512vl -mprefer-vector-width=128 -mtune=haswell -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 16 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-3.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-3.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-3.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512vl -mprefer-vector-width=128 -mtune=skylake-avx512 -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 16 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
--- 1,6 ----
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512vl -mprefer-vector-width=128 -mtune=haswell -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 16 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-9.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-9.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-9.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-9.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512vl -mprefer-vector-width=256 -mtune=skylake-avx512 -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 32 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
--- 1,6 ----
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512vl -mprefer-vector-width=256 -mtune=haswell -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 32 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/mvc17.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/mvc17.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/mvc17.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/mvc17.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-do compile } */
+ /* { dg-require-ifunc "" } */
+ /* { dg-options "-O2 -march=x86-64" } */
+ /* { dg-final { scan-assembler-times "rep mov" 1 } } */
+ 
+ __attribute__((target_clones("default","arch=icelake-server")))
+ void
+ foo (char *a, char *b, int size)
+ {
+   __builtin_memcpy (a, b, size & 0x7F);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr100936.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr100936.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr100936.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr100936.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
--- 1,7 ----
  /* PR target/100936 */
  /* { dg-do assemble } */
  /* { dg-options "-O2" } */
+ /* { dg-require-effective-target nonpic } */
  
  __seg_gs int var;
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr105554.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr105554.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr105554.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr105554.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
--- 1,6 ----
  /* PR target/105554 */
  /* { dg-do compile } */
+ /* { dg-require-ifunc "" } */
  /* { dg-options "-O2 -Wno-psabi -mno-sse3" } */
  
  typedef long long v4di __attribute__((__vector_size__(32)));
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr110108-2.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr110108-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr110108-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr110108-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-options "-mavx2 -O2 -funsigned-char" } */
+ /* { dg-final { scan-assembler-times "vpblendvb" 2 } } */
+ 
+ #include <immintrin.h>
+ __m128i do_stuff_128(__m128i X0, __m128i X1, __m128i X2) {
+   __m128i Result = _mm_blendv_epi8(X0, X1, X2);
+   return Result;
+ }
+ 
+ __m256i do_stuff_256(__m256i X0, __m256i X1, __m256i X2) {
+   __m256i Result = _mm256_blendv_epi8(X0, X1, X2);
+   return Result;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr110170-3.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr110170-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr110170-3.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr110170-3.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-do compile { target { ! ia32 } } } */
+ /* { dg-options "-O2 -fno-if-conversion -fno-if-conversion2" } */
+ /* { dg-final { scan-assembler-not {(?n)movq.*r} } } */
+ 
+ void __cond_swap(double* __x, double* __y) {
+   _Bool __r = (*__x < *__y);
+   double __tmp = __r ? *__x : *__y;
+   *__y = __r ? *__y : *__x;
+   *__x = __tmp;
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr110206.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr110206.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr110206.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr110206.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,39 ----
+ /* PR target/110206 */
+ /* { dg-do run } */
+ /* { dg-options "-Os -mavx512bw -mavx512vl" } */
+ /* { dg-require-effective-target avx512bw } */
+ /* { dg-require-effective-target avx512vl } */
+ 
+ #define AVX512BW
+ #define AVX512VL
+ 
+ #include "avx512f-check.h"
+ 
+ typedef unsigned char __attribute__((__vector_size__ (4))) U;
+ typedef unsigned char __attribute__((__vector_size__ (8))) V;
+ typedef unsigned short u16;
+ 
+ V g;
+ 
+ void
+ __attribute__((noinline))
+ foo (U u, u16 c, V *r)
+ {
+   if (!c)
+     abort ();
+   V x = __builtin_shufflevector (u, (204 >> u), 7, 0, 5, 1, 3, 5, 0, 2);
+   V y = __builtin_shufflevector (g, (V) { }, 7, 6, 6, 7, 2, 6, 3, 5);
+   V z = __builtin_shufflevector (y, 204 * x, 3, 9, 8, 1, 4, 6, 14, 5);
+   *r = z;
+ }
+ 
+ static void test_256 (void) { };
+ 
+ static void
+ test_128 (void)
+ {
+   V r;
+   foo ((U){4}, 5, &r);
+   if (r[6] != 0x30)
+     abort();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr110309.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr110309.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr110309.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr110309.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O3 --param vect-partial-vector-usage=1 -march=znver4 -mprefer-vector-width=256" } */
+ /* { dg-final { scan-assembler-not {(?n)vpblendd.*ymm} } } */
+ 
+ 
+ void foo (int * __restrict a, int *b)
+ {
+   for (int i = 0; i < 6; ++i)
+     a[i] = b[i] + 42;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr111306.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr111306.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr111306.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr111306.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,36 ----
+ /* { dg-do run } */
+ /* { dg-options "-O2 -mavx512fp16 -mavx512vl" } */
+ /* { dg-require-effective-target avx512fp16 } */
+ 
+ #define AVX512FP16
+ #include "avx512f-helper.h"
+ 
+ __attribute__((optimize("O2"),noipa))
+ void func1(_Float16 *a, _Float16 *b, int n, _Float16 *c) {
+   __m512h rA = _mm512_loadu_ph(a);
+   for (int i = 0; i < n; i += 32) {
+     __m512h rB = _mm512_loadu_ph(b + i);
+     _mm512_storeu_ph(c + i, _mm512_fcmul_pch(rB, rA));
+   }
+ }
+ 
+ void
+ test_512 (void)
+ {
+   int n = 32;
+   _Float16 a[n], b[n], c[n];
+   _Float16 exp[n];
+   for (int i = 1; i <= n; i++) {
+     a[i - 1] = i & 1 ? -i : i;
+     b[i - 1] = i;
+   }
+ 
+   func1(a, b, n, c);
+   for (int i = 0; i < n / 32; i += 2) {
+     if (c[i] != a[i] * b[i] + a[i+1] * b[i+1]
+ 	|| c[i+1] != a[i] * b[i+1] - a[i+1]*b[i])
+       __builtin_abort ();
+     }
+ }
+ 
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr111340.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr111340.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr111340.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr111340.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,9 ----
+ /* PR target/111340 */
+ /* { dg-do compile { target { fpic && int128 } } } */
+ /* { dg-options "-O2 -fpic" } */
+ 
+ void
+ bar (void)
+ {
+   __asm ("# %0" : : "g" ((((unsigned __int128) 0x123456789abcdef0ULL) << 64) | 0x0fedcba987654321ULL));
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr111736.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr111736.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr111736.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr111736.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,23 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fsanitize=address" } */
+ 
+ int __seg_gs m;
+ 
+ int foo (void)
+ {
+   return m;
+ }
+ 
+ extern int  __seg_gs n;
+ 
+ int bar (void)
+ {
+   return n;
+ }
+ 
+ int baz (int __seg_gs *o)
+ {
+   return *o;
+ }
+ 
+ /* { dg-final { scan-assembler-not "asan_report_load" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr112495.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr112495.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr112495.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr112495.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O3" } */
+ 
+ typedef struct { int v; } T1;
+ typedef struct { T1 v[32]; } T2;
+ 
+ T1 s;
+ T1 f1() { return s; }
+ 
+ void f2(__seg_gs T2 *p, int n) {
+   for (int i = 0; i < n; ++i) p->v[i] = f1();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr112672.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr112672.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr112672.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr112672.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,23 ----
+ /* PR target/112672 */
+ /* { dg-do run } */
+ /* { dg-options "-O2" } */
+ 
+ typedef unsigned short u16;
+ 
+ u16 g = 254;
+ 
+ static inline u16
+ foo (u16 u)
+ {
+   u *= g;
+   return u + __builtin_parityl (u);
+ }
+ 
+ int
+ main (void)
+ {
+   u16 x = foo (4);
+   if (x != 4 * 254 + 1)
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr112891-2.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr112891-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr112891-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr112891-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,30 ----
+ /* { dg-do compile } */
+ /* { dg-options "-mavx2 -O3" } */
+ /* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
+ 
+ void
+ __attribute__((noinline))
+ bar (double* a)
+ {
+   a[0] = 1.0;
+   a[1] = 2.0;
+ }
+ 
+ double
+ __attribute__((noinline))
+ foo (double* __restrict a, double* b)
+ {
+   a[0] += b[0];
+   a[1] += b[1];
+   a[2] += b[2];
+   a[3] += b[3];
+   bar (b);
+   return a[5] + b[5];
+ }
+ 
+ double
+ foo1 (double* __restrict a, double* b)
+ {
+   double c = foo (a, b);
+   return __builtin_exp (c);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr112891.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr112891.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr112891.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr112891.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,29 ----
+ /* { dg-do compile } */
+ /* { dg-options "-mavx2 -O3" } */
+ /* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
+ 
+ void
+ __attribute__((noinline))
+ bar (double* a)
+ {
+   a[0] = 1.0;
+   a[1] = 2.0;
+ }
+ 
+ void
+ __attribute__((noinline))
+ foo (double* __restrict a, double* b)
+ {
+   a[0] += b[0];
+   a[1] += b[1];
+   a[2] += b[2];
+   a[3] += b[3];
+   bar (b);
+ }
+ 
+ double
+ foo1 (double* __restrict a, double* b)
+ {
+   foo (a, b);
+   return __builtin_exp (b[1]);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113122-1.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113122-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113122-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113122-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,10 ----
+ /* PR target/113122 */
+ /* { dg-do assemble { target { *-*-linux* && lp64 } } } */
+ /* { dg-require-effective-target mfentry } */
+ /* { dg-require-effective-target masm_intel } */
+ /* { dg-options "-fprofile -mfentry -O2 -mcmodel=large -masm=intel" } */
+ 
+ void
+ func (void)
+ {
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113122-2.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113122-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113122-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113122-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,11 ----
+ /* PR target/113122 */
+ /* { dg-do assemble { target { *-*-linux* && lp64 } } } */
+ /* { dg-require-effective-target mfentry } */
+ /* { dg-require-effective-target masm_intel } */
+ /* { dg-require-effective-target fpic } */
+ /* { dg-options "-fpic -fprofile -mfentry -O2 -mcmodel=large -masm=intel" } */
+ 
+ void
+ func (void)
+ {
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113122-3.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113122-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113122-3.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113122-3.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,9 ----
+ /* PR target/113122 */
+ /* { dg-do assemble { target *-*-linux* } } */
+ /* { dg-require-effective-target masm_intel } */
+ /* { dg-options "-fprofile -O2 -masm=intel" } */
+ 
+ void
+ func (void)
+ {
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113122-4.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113122-4.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113122-4.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113122-4.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,10 ----
+ /* PR target/113122 */
+ /* { dg-do assemble { target *-*-linux* } } */
+ /* { dg-require-effective-target masm_intel } */
+ /* { dg-require-effective-target fpic } */
+ /* { dg-options "-fpic -fprofile -O2 -masm=intel" } */
+ 
+ void
+ func (void)
+ {
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113921.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113921.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113921.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113921.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* PR middle-end/113921 */
+ /* { dg-do run } */
+ /* { dg-options "-O2" } */
+ 
+ __attribute__((noipa)) long
+ foo (void)
+ {
+   long v;
+   asm volatile goto ("jmp %l2" : "=r" (v) : "0" (27) : : lab);
+   return v;
+ lab:
+   return 42;
+ }
+ 
+ int
+ main ()
+ {
+   if (foo () != 42)
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr114184.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr114184.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr114184.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr114184.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,22 ----
+ /* PR target/114184 */
+ /* { dg-do compile } */
+ /* { dg-options "-Og -mavx2" } */
+ 
+ typedef unsigned char V __attribute__((vector_size (32)));
+ typedef unsigned char W __attribute__((vector_size (16)));
+ 
+ _Complex long double
+ foo (void)
+ {
+   _Complex long double d;
+   *(V *)&d = (V) { 149, 136, 89, 42, 38, 240, 196, 194 };
+   return d;
+ }
+ 
+ long double
+ bar (void)
+ {
+   long double d;
+   *(W *)&d = (W) { 149, 136, 89, 42, 38, 240, 196, 194 };
+   return d;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr88531-1b.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr88531-1b.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr88531-1b.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr88531-1b.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-O3 -march=skylake -mfpmath=sse" } */
  
  #include "pr88531-1a.c"
  
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-O3 -march=skylake -mfpmath=sse -mtune=haswell" } */
  
  #include "pr88531-1a.c"
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr88531-1c.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr88531-1c.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr88531-1c.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr88531-1c.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-O3 -march=skylake-avx512 -mfpmath=sse" } */
  
  #include "pr88531-1a.c"
  
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-O3 -march=skylake-avx512 -mfpmath=sse -mtune=haswell" } */
  
  #include "pr88531-1a.c"
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/sse2-pr112816-2.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/sse2-pr112816-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/sse2-pr112816-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/sse2-pr112816-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ /* PR target/112816 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -msse2" } */
+ 
+ #define N 2
+ struct S { float x[N]; };
+ struct T { int x[N]; };
+ 
+ struct T
+ foo (struct S x)
+ {
+   struct T res;
+   for (int i = 0; i < N; ++i)
+     res.x[i] = __builtin_signbit (x.x[i]) ? -1 : 0;
+   return res;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/sse2-pr112816.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/sse2-pr112816.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/sse2-pr112816.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/sse2-pr112816.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ /* PR target/112816 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -msse2" } */
+ 
+ #define N 4
+ struct S { float x[N]; };
+ struct T { int x[N]; };
+ 
+ struct T
+ foo (struct S x)
+ {
+   struct T res;
+   for (int i = 0; i < N; ++i)
+     res.x[i] = __builtin_signbit (x.x[i]) ? -1 : 0;
+   return res;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/loongarch/builtin_thread_pointer.c gcc-12.4.0/gcc/testsuite/gcc.target/loongarch/builtin_thread_pointer.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/loongarch/builtin_thread_pointer.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/loongarch/builtin_thread_pointer.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target tls_native } */
+ /* { dg-options "-O2" } */
+ /* { dg-final { scan-assembler "or\t\\\$r4,\\\$r2,\\\$r0" } } */
+ 
+ void *
+ get_tp ()
+ {
+   return __builtin_thread_pointer ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/loongarch/cas-acquire.c gcc-12.4.0/gcc/testsuite/gcc.target/loongarch/cas-acquire.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/loongarch/cas-acquire.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/loongarch/cas-acquire.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,82 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target c99_runtime } */
+ /* { dg-require-effective-target pthread } */
+ /* { dg-options "-std=c99 -pthread" } */
+ 
+ /* https://github.com/llvm/llvm-project/pull/67391#issuecomment-1752403934
+    reported that this had failed with GCC and 3A6000.  */
+ 
+ #include <pthread.h>
+ #include <stdatomic.h>
+ #include <stdbool.h>
+ #include <stdio.h>
+ 
+ static unsigned int tags[32];
+ static unsigned int vals[32];
+ 
+ static void *
+ writer_entry (void *data)
+ {
+   atomic_uint *pt = (atomic_uint *)tags;
+   atomic_uint *pv = (atomic_uint *)vals;
+ 
+   for (unsigned int n = 1; n < 10000; n++)
+     {
+       atomic_store_explicit (&pv[n & 31], n, memory_order_release);
+       atomic_store_explicit (&pt[n & 31], n, memory_order_release);
+     }
+ 
+   return NULL;
+ }
+ 
+ static void *
+ reader_entry (void *data)
+ {
+   atomic_uint *pt = (atomic_uint *)tags;
+   atomic_uint *pv = (atomic_uint *)vals;
+   int i;
+ 
+   for (;;)
+     {
+       for (i = 0; i < 32; i++)
+         {
+           unsigned int tag = 0;
+           bool res;
+ 
+           res = atomic_compare_exchange_weak_explicit (
+               &pt[i], &tag, 0, memory_order_acquire, memory_order_acquire);
+           if (!res)
+             {
+               unsigned int val;
+ 
+               val = atomic_load_explicit (&pv[i], memory_order_relaxed);
+               if (val < tag)
+                 __builtin_trap ();
+             }
+         }
+     }
+ 
+   return NULL;
+ }
+ 
+ int
+ main (int argc, char *argv[])
+ {
+   pthread_t writer;
+   pthread_t reader;
+   int res;
+ 
+   res = pthread_create (&writer, NULL, writer_entry, NULL);
+   if (res < 0)
+     __builtin_trap ();
+ 
+   res = pthread_create (&reader, NULL, reader_entry, NULL);
+   if (res < 0)
+     __builtin_trap ();
+ 
+   res = pthread_join (writer, NULL);
+   if (res < 0)
+     __builtin_trap ();
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/loongarch/eh_return-normal-return.c gcc-12.4.0/gcc/testsuite/gcc.target/loongarch/eh_return-normal-return.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/loongarch/eh_return-normal-return.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/loongarch/eh_return-normal-return.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,38 ----
+ /* { dg-do run } */
+ /* { dg-options "-O2" } */
+ 
+ #include <stdlib.h>
+ 
+ int foo ()  __attribute__((noinline));
+ int main ();
+ 
+ int
+ foo () {
+ 
+   int t;
+ 
+   /* prevent optimization using asm */
+   asm ("" : "=r" (t) : "0" (-1));
+   asm ("" : "=r" (t) : "0" (t ? 1 : 0));
+ 
+   if (t == 0)
+     /* never reached */
+     __builtin_eh_return (0, __builtin_return_address (0));
+ 
+   else if (t == 1)
+     /* return here */
+     return 202312;
+ 
+   else
+     /* never reached: prevent vrp optimization in main */
+     return 0;
+ }
+ 
+ int
+ main ()
+ {
+   if (foo() == 202312)
+     return 0; 
+   else
+     abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/clone1.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/clone1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/clone1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/clone1.c	Thu Jun 20 08:08:08 2024
*************** long mod_func_or (long a, long b, long c
*** 21,26 ****
    return mod_func (a, b) | c;
  }
  
! /* { dg-final { scan-assembler-times {\mdivd\M}  1 } } */
! /* { dg-final { scan-assembler-times {\mmulld\M} 1 } } */
! /* { dg-final { scan-assembler-times {\mmodsd\M} 1 } } */
--- 21,27 ----
    return mod_func (a, b) | c;
  }
  
! /* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */
! /* { dg-final { scan-assembler-times {\mdivd\M}  1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {\mmulld\M} 1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {\mmodsd\M} 1 { xfail *-*-* } } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/clone3.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/clone3.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/clone3.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/clone3.c	Thu Jun 20 08:08:08 2024
*************** long mod_func_or (long a, long b, long c
*** 27,33 ****
    return mod_func (a, b) | c;
  }
  
! /* { dg-final { scan-assembler-times {\mdivd\M}  1 } } */
! /* { dg-final { scan-assembler-times {\mmulld\M} 1 } } */
! /* { dg-final { scan-assembler-times {\mmodsd\M} 2 } } */
  /* { dg-final { scan-assembler-times {\mpld\M}   1 } } */
--- 27,34 ----
    return mod_func (a, b) | c;
  }
  
! /* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */
! /* { dg-final { scan-assembler-times {\mdivd\M}  1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {\mmulld\M} 1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {\mmodsd\M} 2 { xfail *-*-* } } } */
  /* { dg-final { scan-assembler-times {\mpld\M}   1 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-0.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-0.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-0.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-0.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,23 ----
+ /* { dg-do compile { target powerpc*-*-darwin* } } */
+ /* { dg-require-effective-target ilp32 } */
+ /* { dg-options "-Wno-long-long" } */
+ 
+ #include "darwin-structs-0.h"
+ 
+ int tcd[sizeof(cd) != 12 ? -1 : 1];
+ int acd[__alignof__(cd) != 4 ? -1 : 1];
+ 
+ int sdc[sizeof(dc) != 16 ? -1 : 1];
+ int adc[__alignof__(dc) != 8 ? -1 : 1];
+ 
+ int scL[sizeof(cL) != 12 ? -1 : 1];
+ int acL[__alignof__(cL) != 4 ? -1 : 1];
+ 
+ int sLc[sizeof(Lc) != 16 ? -1 : 1];
+ int aLc[__alignof__(Lc) != 8 ? -1 : 1];
+ 
+ int scD[sizeof(cD) != 32 ? -1 : 1];
+ int acD[__alignof__(cD) != 16 ? -1 : 1];
+ 
+ int sDc[sizeof(Dc) != 32 ? -1 : 1];
+ int aDc[__alignof__(Dc) != 16 ? -1 : 1];
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-1.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,27 ----
+ /* { dg-do compile { target powerpc*-*-darwin* } } */
+ /* { dg-require-effective-target ilp32 } */
+ /* { dg-options "-Wno-long-long" } */
+ 
+ #pragma pack(push, 1)
+ 
+ #include "darwin-structs-0.h"
+ 
+ int tcd[sizeof(cd) != 9 ? -1 : 1];
+ int acd[__alignof__(cd) != 1 ? -1 : 1];
+ 
+ int sdc[sizeof(dc) != 9 ? -1 : 1];
+ int adc[__alignof__(dc) != 1 ? -1 : 1];
+ 
+ int scL[sizeof(cL) != 9 ? -1 : 1];
+ int acL[__alignof__(cL) != 1 ? -1 : 1];
+ 
+ int sLc[sizeof(Lc) != 9 ? -1 : 1];
+ int aLc[__alignof__(Lc) != 1 ? -1 : 1];
+ 
+ int scD[sizeof(cD) != 17 ? -1 : 1];
+ int acD[__alignof__(cD) != 1 ? -1 : 1];
+ 
+ int sDc[sizeof(Dc) != 17 ? -1 : 1];
+ int aDc[__alignof__(Dc) != 1 ? -1 : 1];
+ 
+ #pragma pack(pop)
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-2.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,27 ----
+ /* { dg-do compile { target powerpc*-*-darwin* } } */
+ /* { dg-require-effective-target ilp32 } */
+ /* { dg-options "-Wno-long-long" } */
+ 
+ #pragma pack(push, 2)
+ 
+ #include "darwin-structs-0.h"
+ 
+ int tcd[sizeof(cd) != 10 ? -1 : 1];
+ int acd[__alignof__(cd) != 2 ? -1 : 1];
+ 
+ int sdc[sizeof(dc) != 10 ? -1 : 1];
+ int adc[__alignof__(dc) != 2 ? -1 : 1];
+ 
+ int scL[sizeof(cL) != 10 ? -1 : 1];
+ int acL[__alignof__(cL) != 2 ? -1 : 1];
+ 
+ int sLc[sizeof(Lc) != 10 ? -1 : 1];
+ int aLc[__alignof__(Lc) != 2 ? -1 : 1];
+ 
+ int scD[sizeof(cD) != 18 ? -1 : 1];
+ int acD[__alignof__(cD) != 2 ? -1 : 1];
+ 
+ int sDc[sizeof(Dc) != 18 ? -1 : 1];
+ int aDc[__alignof__(Dc) != 2 ? -1 : 1];
+ 
+ #pragma pack(pop)
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/darwin-structs-0.h gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/darwin-structs-0.h
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/darwin-structs-0.h	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/darwin-structs-0.h	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,29 ----
+ typedef struct _cd {
+  char c;
+  double d;
+ } cd;
+ 
+ typedef struct _dc {
+  double d;
+  char c;
+ } dc;
+ 
+ typedef struct _cL {
+  char c;
+  long long L;
+ } cL;
+ 
+ typedef struct _Lc {
+  long long L;
+  char c;
+ } Lc;
+ 
+ typedef struct _cD {
+  char c;
+  long double D;
+ } cD;
+ 
+ typedef struct _Dc {
+  long double D;
+  char c;
+ } Dc;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c	Thu Jun 20 08:08:08 2024
*************** TEST(uint8_t)
*** 54,68 ****
  TEST(int8_t)
  
  /* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero"   4 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_DI_CC_none"             4 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_clobber_CC_none"        4 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_DI_CCUNS_none"         1 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none"    1 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign"      16 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero"   4 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign"         0 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none"       4 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero"     0 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none"   2 { target lp64 } } } */
  
  /* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero"   2 { target ilp32 } } } */
--- 54,70 ----
  TEST(int8_t)
  
  /* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero"   4 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_DI_CC_none"            24 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_clobber_CC_none"        8 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_DI_CCUNS_none"         2 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none"    2 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign"      16 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero"   4 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign"         0 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_clobber_CC_none"       8 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_SI_CC_none"            8 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero"     0 { target lp64 } } } */
+ /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_SI_CCUNS_none"        2 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none"   2 { target lp64 } } } */
  
  /* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero"   2 { target ilp32 } } } */
*************** TEST(int8_t)
*** 73,78 ****
  /* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign"       8 { target ilp32 } } } */
  /* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero"   2 { target ilp32 } } } */
  /* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign"         0 { target ilp32 } } } */
! /* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none"       9 { target ilp32 } } } */
  /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero"     0 { target ilp32 } } } */
  /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none"   6 { target ilp32 } } } */
--- 75,82 ----
  /* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign"       8 { target ilp32 } } } */
  /* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero"   2 { target ilp32 } } } */
  /* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign"         0 { target ilp32 } } } */
! /* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_SI_CC_none"           36 { target ilp32 } } } */
! /* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_clobber_CC_none"      16 { target ilp32 } } } */
  /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero"     0 { target ilp32 } } } */
  /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none"   6 { target ilp32 } } } */
+ /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_SI_CCUNS_none"        2 { target ilp32 } } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/mod-1.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/mod-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/mod-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/mod-1.c	Thu Jun 20 08:08:08 2024
*************** long lsmod (long a, long b) { return a%b
*** 7,19 ****
  unsigned int iumod (unsigned int a, unsigned int b) { return a%b; }
  unsigned long lumod (unsigned long a, unsigned long b) { return a%b; }
  
! /* { dg-final { scan-assembler-times "modsw " 1 } } */
! /* { dg-final { scan-assembler-times "modsd " 1 } } */
! /* { dg-final { scan-assembler-times "moduw " 1 } } */
! /* { dg-final { scan-assembler-times "modud " 1 } } */
! /* { dg-final { scan-assembler-not   "mullw "   } } */
! /* { dg-final { scan-assembler-not   "mulld "   } } */
! /* { dg-final { scan-assembler-not   "divw "    } } */
! /* { dg-final { scan-assembler-not   "divd "    } } */
! /* { dg-final { scan-assembler-not   "divwu "   } } */
! /* { dg-final { scan-assembler-not   "divdu "   } } */
--- 7,20 ----
  unsigned int iumod (unsigned int a, unsigned int b) { return a%b; }
  unsigned long lumod (unsigned long a, unsigned long b) { return a%b; }
  
! /* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */
! /* { dg-final { scan-assembler-times {\mmodsw\M} 1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {\mmodsd\M} 1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {\mmoduw\M} 1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {\mmodud\M} 1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-not   {\mmullw\M}   { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-not   {\mmulld\M}   { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-not   {\mdivw\M}    { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-not   {\mdivd\M}    { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-not   {\mdivwu\M}   { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-not   {\mdivdu\M}   { xfail *-*-* } } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/mod-2.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/mod-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/mod-2.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/mod-2.c	Thu Jun 20 08:08:08 2024
***************
*** 5,12 ****
  int ismod (int a, int b) { return a%b; }
  unsigned int iumod (unsigned int a, unsigned int b) { return a%b; }
  
! /* { dg-final { scan-assembler-times "modsw " 1 } } */
! /* { dg-final { scan-assembler-times "moduw " 1 } } */
! /* { dg-final { scan-assembler-not   "mullw "   } } */
! /* { dg-final { scan-assembler-not   "divw "    } } */
! /* { dg-final { scan-assembler-not   "divwu "   } } */
--- 5,13 ----
  int ismod (int a, int b) { return a%b; }
  unsigned int iumod (unsigned int a, unsigned int b) { return a%b; }
  
! /* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */
! /* { dg-final { scan-assembler-times {\mmodsw\M} 1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {\mmoduw\M} 1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-not   {\mmullw\M}   { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-not   {\mdivw\M}    { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-not   {\mdivwu\M}   { xfail *-*-* } } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/p10-vdivq-vmodq.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/p10-vdivq-vmodq.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/p10-vdivq-vmodq.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/p10-vdivq-vmodq.c	Thu Jun 20 08:08:08 2024
*************** __int128 s_mod(__int128 a, __int128 b)
*** 23,27 ****
  
  /* { dg-final { scan-assembler {\mvdivsq\M} } } */
  /* { dg-final { scan-assembler {\mvdivuq\M} } } */
! /* { dg-final { scan-assembler {\mvmodsq\M} } } */
! /* { dg-final { scan-assembler {\mvmoduq\M} } } */
--- 23,28 ----
  
  /* { dg-final { scan-assembler {\mvdivsq\M} } } */
  /* { dg-final { scan-assembler {\mvdivuq\M} } } */
! /* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */
! /* { dg-final { scan-assembler {\mvmodsq\M} { xfail *-*-* } } } */
! /* { dg-final { scan-assembler {\mvmoduq\M} { xfail *-*-* } } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109069-1.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109069-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109069-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109069-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,25 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target vmx_hw } */
+ /* { dg-options "-O2 -maltivec" } */
+ 
+ /* Verify it run successfully.  */
+ 
+ #include <altivec.h>
+ 
+ __attribute__ ((noipa))
+ vector signed int
+ test ()
+ {
+   vector signed int v = {-16, -16, -16, -16};
+   vector signed int res = vec_sld (v, v, 3);
+   return res;
+ }
+ 
+ int
+ main ()
+ {
+   vector signed int res = test ();
+   if (res[0] != 0xf0ffffff)
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109069-2-run.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109069-2-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109069-2-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109069-2-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,50 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target vsx_hw } */
+ /* { dg-options "-O2 -mvsx" } */
+ 
+ /* Verify it doesn't generate wrong code.  */
+ 
+ #include "pr109069-2.h"
+ 
+ int
+ main ()
+ {
+   vector unsigned char res1 = test1 ();
+   for (int i = 0; i < 16; i++)
+     if (res1[i] != 0xd)
+       __builtin_abort ();
+ 
+   vector signed short res2 = test2 ();
+   for (int i = 0; i < 8; i++)
+     if (res2[i] != 0x7777)
+       __builtin_abort ();
+ 
+   vector signed int res3 = test3 ();
+   vector unsigned int res4 = test4 ();
+   vector float res6 = test6 ();
+   for (int i = 0; i < 4; i++)
+     {
+       if (res3[i] != 0xbbbbbbbb)
+ 	__builtin_abort ();
+       if (res4[i] != 0x7070707)
+ 	__builtin_abort ();
+       U32b u;
+       u.f = res6[i];
+       if (u.i != 0x17171717)
+ 	__builtin_abort ();
+     }
+ 
+   vector unsigned long long res5 = test5 ();
+   vector double res7 = test7 ();
+   for (int i = 0; i < 2; i++)
+     {
+       if (res5[i] != 0x4545454545454545ll)
+ 	__builtin_abort ();
+       U64b u;
+       u.f = res7[i];
+       if (u.i != 0x5454545454545454ll)
+ 	__builtin_abort ();
+     }
+   return 0;
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109069-2.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109069-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109069-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109069-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_vsx_ok } */
+ /* Disable rs6000 optimize_swaps as it drops some REG_EQUAL
+    notes on const vector and affects test point here.  */
+ /* { dg-options "-O2 -mvsx -mno-optimize-swaps" } */
+ 
+ /* Verify we can optimize away vector shifting if every byte
+    of vector is the same.  */
+ 
+ #include "pr109069-2.h"
+ 
+ /* { dg-final { scan-assembler-not {\mvsldoi\M} } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109069-2.h gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109069-2.h
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109069-2.h	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109069-2.h	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,83 ----
+ #include <altivec.h>
+ 
+ typedef union
+ {
+   unsigned int i;
+   float f;
+ } U32b;
+ 
+ typedef union
+ {
+   unsigned long long i;
+   double f;
+ } U64b;
+ 
+ __attribute__ ((noipa))
+ vector unsigned char
+ test1 ()
+ {
+   vector unsigned char v = {0xd, 0xd, 0xd, 0xd, 0xd, 0xd, 0xd, 0xd,
+ 			    0xd, 0xd, 0xd, 0xd, 0xd, 0xd, 0xd, 0xd};
+   vector unsigned char res = vec_sld (v, v, 3);
+   return res;
+ }
+ 
+ __attribute__ ((noipa))
+ vector signed short
+ test2 ()
+ {
+   vector signed short v
+     = {0x7777, 0x7777, 0x7777, 0x7777, 0x7777, 0x7777, 0x7777, 0x7777};
+   vector signed short res = vec_sld (v, v, 5);
+   return res;
+ }
+ 
+ __attribute__ ((noipa))
+ vector signed int
+ test3 ()
+ {
+   vector signed int v = {0xbbbbbbbb, 0xbbbbbbbb, 0xbbbbbbbb, 0xbbbbbbbb};
+   vector signed int res = vec_sld (v, v, 7);
+   return res;
+ }
+ 
+ __attribute__ ((noipa))
+ vector unsigned int
+ test4 ()
+ {
+   vector unsigned int v = {0x07070707, 0x07070707, 0x07070707, 0x07070707};
+   vector unsigned int res = vec_sld (v, v, 9);
+   return res;
+ }
+ 
+ __attribute__ ((noipa))
+ vector unsigned long long
+ test5 ()
+ {
+   vector unsigned long long v = {0x4545454545454545ll, 0x4545454545454545ll};
+   vector unsigned long long res = vec_sld (v, v, 10);
+   return res;
+ }
+ 
+ __attribute__ ((noipa))
+ vector float
+ test6 ()
+ {
+   U32b u;
+   u.i = 0x17171717;
+   vector float vf = {u.f, u.f, u.f, u.f};
+   vector float res = vec_sld (vf, vf, 11);
+   return res;
+ }
+ 
+ __attribute__ ((noipa))
+ vector double
+ test7 ()
+ {
+   U64b u;
+   u.i = 0x5454545454545454ll;
+   vector double vf = {u.f, u.f};
+   vector double res = vec_sld (vf, vf, 13);
+   return res;
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109932-1.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109932-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109932-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109932-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,17 ----
+ /* { dg-require-effective-target int128 } */
+ /* { dg-require-effective-target powerpc_altivec_ok } */
+ /* { dg-options "-maltivec -mno-vsx" } */
+ 
+ /* Verify there is no ICE but one expected error message instead.  */
+ 
+ #include <altivec.h>
+ 
+ extern vector signed __int128 res_vslll;
+ extern unsigned long long aull[2];
+ 
+ void
+ testVectorInt128Pack ()
+ {
+   res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* { dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109932-2.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109932-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109932-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109932-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,17 ----
+ /* { dg-require-effective-target int128 } */
+ /* { dg-require-effective-target powerpc_altivec_ok } */
+ /* { dg-options "-maltivec -mno-vsx" } */
+ 
+ /* Verify there is no ICE but one expected error message instead.  */
+ 
+ #include <altivec.h>
+ 
+ extern vector signed __int128 res_vslll;
+ extern unsigned long long aull[2];
+ 
+ void
+ testVectorInt128Pack ()
+ {
+   res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* { dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr110011.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr110011.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr110011.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr110011.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,42 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target float128_runtime } */
+ /* Force long double to be with IBM format here, to verify
+    _Float128 constant still uses its own format (IEEE) for
+    encoding rather than IBM format.  */
+ /* { dg-options "-mfp-in-toc -mabi=ibmlongdouble" } */
+ /* { dg-add-options float128 } */
+ 
+ #define MPFR_FLOAT128_MAX 0x1.ffffffffffffffffffffffffffffp+16383f128
+ 
+ __attribute__ ((noipa))
+ _Float128 f128_max ()
+ {
+   return MPFR_FLOAT128_MAX;
+ }
+ 
+ typedef union
+ {
+   int w[4];
+   _Float128 f128;
+ } U;
+ 
+ int main ()
+ {
+ 
+   U umax;
+   umax.f128 = f128_max ();
+   /* ieee float128 max:
+      7ffeffff ffffffff ffffffff ffffffff.  */
+   if (umax.w[1] != 0xffffffff || umax.w[2] != 0xffffffff)
+     __builtin_abort ();
+ #ifdef __LITTLE_ENDIAN__
+   if (umax.w[0] != 0xffffffff || umax.w[3] != 0x7ffeffff)
+     __builtin_abort ();
+ #else
+   if (umax.w[3] != 0xffffffff || umax.w[0] != 0x7ffeffff)
+     __builtin_abort ();
+ #endif
+ 
+   return 0;
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr110411-1.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr110411-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr110411-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr110411-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,21 ----
+ /* PR target/110411 */
+ /* { dg-options "-O2 -mdejagnu-cpu=power10 -mblock-ops-vector-pair" } */
+ 
+ /* Verify we do not ICE on the following.  */
+ 
+ #include <string.h>
+ 
+ struct s {
+   long a;
+   long b;
+   long c;
+   long d: 1;
+ };
+ unsigned long ptr;
+ 
+ void
+ bug (struct s *dst)
+ {
+   struct s *src = (struct s *)(ptr & ~0xFUL);
+   memcpy (dst, src, sizeof(struct s));
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr110411-2.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr110411-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr110411-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr110411-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ /* PR target/110411 */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+ 
+ /* Verify we do not ICE on the following.  */
+ 
+ void
+ bug (__vector_quad *dst)
+ {
+   dst = (__vector_quad *)((unsigned long)dst & ~0xFUL);
+   __builtin_mma_xxsetaccz (dst);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr111380-1.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr111380-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr111380-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr111380-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target vect_int } */
+ /* { dg-options "-O2 -mdejagnu-cpu=power9" } */
+ 
+ /* Verify it emits error message on inlining even without LTO.  */
+ 
+ vector int c, a, b;
+ 
+ static inline void __attribute__ ((__always_inline__))
+ foo () /* { dg-error "inlining failed in call to .* target specific option mismatch" } */
+ {
+   c = a + b;
+ }
+ 
+ __attribute__ ((target ("cpu=power8")))
+ int main ()
+ {
+   foo (); /* { dg-message "called from here" } */
+   c = a + b;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr111380-2.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr111380-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr111380-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr111380-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target vect_int } */
+ /* { dg-options "-O2 -mno-vsx" } */
+ 
+ /* Verify it emits error message on inlining even without LTO.  */
+ 
+ vector int c, a, b;
+ 
+ static inline void __attribute__ ((__always_inline__))
+ foo () /* { dg-error "inlining failed in call to .* target specific option mismatch" } */
+ {
+   c = a + b;
+ }
+ 
+ __attribute__ ((target ("vsx")))
+ int main ()
+ {
+   foo (); /* { dg-message "called from here" } */
+   c = a + b;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr113950.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr113950.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr113950.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr113950.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,24 ----
+ /* PR target/113950 */
+ /* { dg-require-effective-target powerpc_vsx_ok } */
+ /* { dg-options "-O2 -mvsx" } */
+ 
+ /* Verify we do not ICE on the following.  */
+ 
+ void abort (void);
+ 
+ int main ()
+ {
+   int i;
+   vector signed long long vsll_result, vsll_expected_result;
+   signed long long sll_arg1;
+ 
+   sll_arg1 = 300;
+   vsll_expected_result = (vector signed long long) {300, 300};
+   vsll_result = __builtin_vsx_splat_2di (sll_arg1);  
+ 
+   for (i = 0; i < 2; i++)
+     if (vsll_result[i] != vsll_expected_result[i])
+       abort();
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr70243.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr70243.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr70243.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr70243.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,41 ----
+ /* { dg-do compile */
+ /* { dg-require-effective-target powerpc_vsx_ok } */
+ /* { dg-options "-O2 -mvsx" } */
+ 
+ /* PR 70423, Make sure we don't generate vmaddfp or vnmsubfp.  These
+    instructions have different rounding modes than the VSX instructions
+    xvmaddsp and xvnmsubsp.  These tests are written where the 3 inputs and
+    target are all separate registers.  Because vmaddfp and vnmsubfp are no
+    longer generated the compiler will have to generate an xsmaddsp or xsnmsubsp
+    instruction followed by a move operation.  */
+ 
+ #include <altivec.h>
+ 
+ vector float
+ do_add1 (vector float dummy, vector float a, vector float b, vector float c)
+ {
+   return (a * b) + c;
+ }
+ 
+ vector float
+ do_nsub1 (vector float dummy, vector float a, vector float b, vector float c)
+ {
+   return -((a * b) - c);
+ }
+ 
+ vector float
+ do_add2 (vector float dummy, vector float a, vector float b, vector float c)
+ {
+   return vec_madd (a, b, c);
+ }
+ 
+ vector float
+ do_nsub2 (vector float dummy, vector float a, vector float b, vector float c)
+ {
+   return vec_nmsub (a, b, c);
+ }
+ 
+ /* { dg-final { scan-assembler     {\mxvmadd[am]sp\M}  } } */
+ /* { dg-final { scan-assembler     {\mxvnmsub[am]sp\M} } } */
+ /* { dg-final { scan-assembler-not {\mvmaddfp\M}       } } */
+ /* { dg-final { scan-assembler-not {\mvnmsubfp\M}      } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr88309.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr88309.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr88309.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr88309.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,27 ----
+ /* { dg-require-effective-target powerpc_vsx_ok } */
+ /* { dg-options "-mvsx -O2 -fprefetch-loop-arrays" } */
+ 
+ /* Verify there is no ICE or hanging.  */
+ 
+ #include <altivec.h>
+ 
+ void b(float *c, vector float a, vector float, vector float)
+ {
+   vector float d;
+   vector char ahbc;
+   vec_xst(vec_perm(a, d, ahbc), 0, c);
+ }
+ 
+ vector float e(vector unsigned);
+ 
+ void f() {
+   float *dst;
+   int g = 0;
+   for (;; g += 16) {
+     vector unsigned m, i;
+     vector unsigned n, j;
+     vector unsigned k, l;
+     b(dst + g * 3, e(m), e(n), e(k));
+     b(dst + (g + 4) * 3, e(i), e(j), e(l));
+   }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr96762.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr96762.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr96762.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr96762.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,13 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+ 
+ /* Verify there is no ICE on ilp32 env.  */
+ 
+ extern void foo (char *);
+ 
+ void
+ bar (void)
+ {
+   char zj[] = "XXXXXXXXXXXXXXXX";
+   foo (zj);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p7-novsx.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p7-novsx.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p7-novsx.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p7-novsx.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,22 ----
+ /* PR target/101865 */
+ /* { dg-do preprocess } */
+ /* { dg-options "-mdejagnu-cpu=power7 -mno-vsx" } */
+ 
+ /* Verify we correctly set the correct set of predefined macros
+    for the given set of options.  */
+ 
+ #ifndef _ARCH_PWR7
+ #error "_ARCH_PWR7 should be defined for this test"
+ #endif
+ 
+ #ifndef __ALTIVEC__
+ #error "__ALTIVEC__ should be defined for this test"
+ #endif
+ 
+ #ifdef _ARCH_PWR8
+ #error "_ARCH_PWR8 should not be defined for this test"
+ #endif
+ 
+ #ifdef __VSX__
+ #error "__VSX__ should not be defined for this test"
+ #endif
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-noaltivec-novsx.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-noaltivec-novsx.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-noaltivec-novsx.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-noaltivec-novsx.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,26 ----
+ /* PR target/101865 */
+ /* { dg-do preprocess } */
+ /* { dg-options "-mdejagnu-cpu=power8 -mno-altivec -mno-vsx" } */
+ 
+ /* Verify _ARCH_PWR8 is defined for -mcpu=power8 and after disabling
+    both altivec and vsx.  */
+ 
+ #ifndef _ARCH_PWR7
+ #error "_ARCH_PWR7 should be defined for this test"
+ #endif
+ 
+ #ifndef _ARCH_PWR8
+ #error "_ARCH_PWR8 should be defined for this test"
+ #endif
+ 
+ #ifdef _ARCH_PWR9
+ #error "_ARCH_PWR9 should not be defined for this test"
+ #endif
+ 
+ #ifdef __ALTIVEC__
+ #error "__ALTIVEC__ should not be defined for this test"
+ #endif
+ 
+ #ifdef __VSX__
+ #error "__VSX__ should not be defined for this test"
+ #endif
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-noaltivec.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-noaltivec.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-noaltivec.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-noaltivec.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,26 ----
+ /* PR target/101865 */
+ /* { dg-do preprocess } */
+ /* { dg-options "-mdejagnu-cpu=power8 -mno-altivec -w" } */
+ 
+ /* Verify _ARCH_PWR8 is defined for -mcpu=power8 and after disabling altivec.
+    The -w option is used to silence the -mno-altivec disables -mvsx warning.  */
+ 
+ #ifndef _ARCH_PWR7
+ #error "_ARCH_PWR7 should be defined for this test"
+ #endif
+ 
+ #ifndef _ARCH_PWR8
+ #error "_ARCH_PWR8 should be defined for this test"
+ #endif
+ 
+ #ifdef _ARCH_PWR9
+ #error "_ARCH_PWR9 should not be defined for this test"
+ #endif
+ 
+ #ifdef __ALTIVEC__
+ #error "__ALTIVEC__ should not be defined for this test"
+ #endif
+ 
+ #ifdef __VSX__
+ #error "__VSX__ should not be defined for this test"
+ #endif
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-novsx.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-novsx.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-novsx.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-novsx.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,26 ----
+ /* PR target/101865 */
+ /* { dg-do preprocess } */
+ /* { dg-options "-mdejagnu-cpu=power8 -mno-vsx" } */
+ 
+ /* Verify _ARCH_PWR8 is defined for -mcpu=power8 and after disabling vsx.
+    This also confirms __ALTIVEC__ remains set when VSX is disabled.  */
+ 
+ #ifndef _ARCH_PWR7
+ #error "_ARCH_PWR7 should be defined for this test"
+ #endif
+ 
+ #ifndef _ARCH_PWR8
+ #error "_ARCH_PWR8 should be defined for this test"
+ #endif
+ 
+ #ifndef __ALTIVEC__
+ #error "__ALTIVEC__ should be defined for this test"
+ #endif
+ 
+ #ifdef _ARCH_PWR9
+ #error "_ARCH_PWR9 should not be defined for this test"
+ #endif
+ 
+ #ifdef __VSX__
+ #error "__VSX__ should not be defined for this test"
+ #endif
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-pragma-vsx.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-pragma-vsx.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-pragma-vsx.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-pragma-vsx.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,101 ----
+ /* PR target/101865 */
+ /* { dg-do run } */
+ /* { dg-require-effective-target p8vector_hw } */
+ /* { dg-options "-mdejagnu-cpu=power8 -mvsx" } */
+ 
+ /* Verify we correctly set our predefined macros in the face of #pragma usage.  */
+ 
+ #include <stdio.h>
+ #include <stdlib.h>
+ 
+ volatile int power8_set;
+ volatile int vsx_set;
+ 
+ void
+ test_default (void)
+ {
+ #ifdef _ARCH_PWR8
+   power8_set=1;
+ #else
+   power8_set=0;
+ #endif
+ #ifdef __VSX__
+   vsx_set=1;
+ #else
+   vsx_set=0;
+ #endif
+ }
+ 
+ #pragma GCC target "no-vsx"
+ void
+ test_no_vsx (void)
+ {
+ #ifdef _ARCH_PWR8
+   power8_set=1;
+ #else
+   power8_set=0;
+ #endif
+ #ifdef __VSX__
+   vsx_set=1;
+ #else
+   vsx_set=0;
+ #endif
+ }
+ 
+ #pragma GCC reset_options
+ void
+ test_reset_options (void)
+ {
+ #ifdef _ARCH_PWR8
+   power8_set=1;
+ #else
+   power8_set=0;
+ #endif
+ #ifdef __VSX__
+   vsx_set=1;
+ #else
+   vsx_set=0;
+ #endif
+ }
+ 
+ int
+ main (void)
+ {
+   test_default ();
+   if (!power8_set)
+     {
+       printf ("_ARCH_PWR8 is not set.\n");
+       abort ();
+     }
+   if (!vsx_set)
+     {
+       printf ("__VSX__ is not set.\n");
+       abort ();
+     }
+ 
+   test_no_vsx ();
+   if (!power8_set)
+     {
+       printf ("_ARCH_PWR8 is not set.\n");
+       abort ();
+     }
+   if (vsx_set)
+     {
+       printf ("__VSX__ is unexpectedly set.\n");
+       abort ();
+     }
+ 
+   test_reset_options ();
+   if (!power8_set)
+     {
+       printf ("_ARCH_PWR8 is not set.\n");
+       abort ();
+     }
+   if (!vsx_set)
+     {
+       printf ("__VSX__ is not set.\n");
+       abort ();
+     }
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p9-novsx.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p9-novsx.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p9-novsx.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p9-novsx.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,26 ----
+ /* PR target/101865 */
+ /* { dg-do preprocess } */
+ /* { dg-options "-mdejagnu-cpu=power9 -mno-vsx" } */
+ 
+ /* Verify _ARCH_PWR8 is defined for -mcpu=power9 and after disabling vsx.
+    This also confirms __ALTIVEC__ remains set when VSX is disabled.  */
+ 
+ #ifndef _ARCH_PWR7
+ #error "_ARCH_PWR7 should be defined for this test"
+ #endif
+ 
+ #ifndef _ARCH_PWR8
+ #error "_ARCH_PWR8 should be defined for this test"
+ #endif
+ 
+ #ifndef _ARCH_PWR9
+ #error "_ARCH_PWR9 should be defined for this test"
+ #endif
+ 
+ #ifndef __ALTIVEC__
+ #error "__ALTIVEC__ should be defined for this test"
+ #endif
+ 
+ #ifdef __VSX__
+ #error "__VSX__ should not be defined for this test"
+ #endif
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/riscv/pr114130.c gcc-12.4.0/gcc/testsuite/gcc.target/riscv/pr114130.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/riscv/pr114130.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/riscv/pr114130.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64gc -mabi=lp64 -O" } */
+ #include <stdint-gcc.h>
+ 
+ void foo(uint32_t *p) {
+     uintptr_t x = *(uintptr_t *)p;
+     uint32_t e = !p ? 0 : (uintptr_t)p >> 1;
+     uint32_t d = (uintptr_t)x;
+     __atomic_compare_exchange(p, &e, &d, 0, __ATOMIC_RELAXED, __ATOMIC_RELAXED);
+ }
+ 
+ /* { dg-final { scan-assembler-times "sext.w\t" 1 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/imports/pr113125.d gcc-12.4.0/gcc/testsuite/gdc.dg/imports/pr113125.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/imports/pr113125.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/imports/pr113125.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,2 ----
+ module imports.pr113125;
+ struct S113125;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr108842.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr108842.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr108842.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr108842.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,4 ----
+ // { dg-do compile }
+ // { dg-options "-fno-rtti" }
+ module object;
+ enum int[] x = [0, 1, 2];
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr110359.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr110359.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr110359.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr110359.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,22 ----
+ // https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110359
+ // { dg-do compile }
+ // { dg-options "-fdump-tree-original" }
+ double pow(in double x, in ulong p)
+ {
+     import gcc.builtins : __builtin_expect;
+     if (__builtin_expect(p == 0, false))
+         return 1;
+     if (__builtin_expect(p == 1, false))
+         return x;
+ 
+     double s = x;
+     double v = 1;
+     for (ulong i = p; i > 1; i >>= 1)
+     {
+         v = (i & 0x1) ? s * v : v;
+         s = s * s;
+     }
+     return v * s;
+ }
+ // { dg-final { scan-tree-dump "if \\(__builtin_expect \\(p == 0, 0\\) != 0\\)" "original" } }
+ // { dg-final { scan-tree-dump "if \\(__builtin_expect \\(p == 1, 0\\) != 0\\)" "original" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr110514a.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr110514a.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr110514a.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr110514a.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,9 ----
+ // { dg-do "compile" }
+ // { dg-options "-O -fdump-tree-optimized" }
+ immutable uint[] imm_arr = [1,2,3];
+ int test_imm(immutable uint[] ptr)
+ {
+     return imm_arr[2] == 3 ? 123 : 456;
+ }
+ // { dg-final { scan-assembler-not "_d_arraybounds_indexp" } }
+ // { dg-final { scan-tree-dump "return 123;" optimized } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr110514b.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr110514b.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr110514b.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr110514b.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,8 ----
+ // { dg-do "compile" }
+ // { dg-options "-O" }
+ immutable uint[] imm_ctor_arr;
+ int test_imm_ctor(immutable uint[] ptr)
+ {
+     return imm_ctor_arr[2] == 3;
+ }
+ // { dg-final { scan-assembler "_d_arraybounds_indexp" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr110514c.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr110514c.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr110514c.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr110514c.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,8 ----
+ // { dg-do "compile" }
+ // { dg-options "-O" }
+ const uint[] cst_arr = [1,2,3];
+ int test_cst(const uint[] ptr)
+ {
+     return cst_arr[2] == 3;
+ }
+ // { dg-final { scan-assembler "_d_arraybounds_indexp" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr110514d.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr110514d.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr110514d.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr110514d.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,8 ----
+ // { dg-do "compile" }
+ // { dg-options "-O" }
+ const uint[] cst_ctor_arr;
+ int test_cst_ctor(const uint[] ptr)
+ {
+     return cst_ctor_arr[2] == 3;
+ }
+ // { dg-final { scan-assembler "_d_arraybounds_indexp" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr110712.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr110712.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr110712.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr110712.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,23 ----
+ // { dg-do compile { target { { i?86-*-* x86_64-*-* } && lp64 } } }
+ import gcc.builtins : va_list = __builtin_va_list;
+ 
+ void argpass(va_list *ap);
+ 
+ void pr110712a(va_list ap)
+ {
+     argpass(&ap); // { dg-error "cannot convert parameter" }
+ }
+ 
+ void pr110712b(va_list ap)
+ {
+     va_list ap2 = ap; // { dg-error "cannot convert parameter" }
+ }
+ 
+ struct pr110712c
+ {
+     this(va_list ap)
+     {
+         this.ap = ap; // { dg-error "cannot convert parameter" }
+     }
+     va_list ap;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr110959.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr110959.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr110959.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr110959.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,32 ----
+ // https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110959
+ // { dg-do compile }
+ class ArsdExceptionBase : object.Exception {
+     this(string operation, string file = __FILE__, size_t line = __LINE__, Throwable next = null) {
+         super(operation, file, line, next);
+     }
+ }
+ 
+ template ArsdException(alias Type, DataTuple...) {
+     static if(DataTuple.length)
+         alias Parent = ArsdException!(Type, DataTuple[0 .. $-1]);
+     else
+         alias Parent = ArsdExceptionBase;
+ 
+     class ArsdException : Parent {
+         DataTuple data;
+ 
+         this(DataTuple data, string file = __FILE__, size_t line = __LINE__) {
+             this.data = data;
+             static if(is(Parent == ArsdExceptionBase))
+                 super(null, file, line);
+             else
+                 super(data[0 .. $-1], file, line);
+         }
+ 
+         static opCall(R...)(R r, string file = __FILE__, size_t line = __LINE__) {
+             return new ArsdException!(Type, DataTuple, R)(r, file, line);
+         }
+     }
+ }
+ 
+ __gshared pr110959 = ArsdException!"Test"(4, "four");
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr112270.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr112270.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr112270.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr112270.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,7 ----
+ // https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112270
+ // { dg-do compile }
+ class CPPNamespaceDeclaration { }
+ bool isNamespaceEqual (CPPNamespaceDeclaration a)
+ {
+     return a ? true : isNamespaceEqual(a);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr112285.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr112285.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr112285.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr112285.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,13 ----
+ // { dg-do compile }
+ // { dg-additional-options "-fpreview=in" }
+ struct S112285
+ {
+ }
+ 
+ class C112285
+ {
+     S112285 s;
+     void f112285(in C112285)
+     {
+     }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr112290.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr112290.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr112290.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr112290.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,15 ----
+ // { dg-do compile }
+ // { dg-additional-options "-fpreview=in" }
+ struct S112290a
+ {
+     S112290b* p;
+     bool opEquals(in S112290a)
+     {
+         return p == p;
+     }
+ }
+ 
+ struct S112290b
+ {
+     string s;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr113125.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr113125.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr113125.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr113125.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,4 ----
+ // { dg-do compile }
+ // { dg-options "-I $srcdir/gdc.dg" }
+ module pr113125;
+ import imports.pr113125: S113125;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr98277.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr98277.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr98277.d	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr98277.d	Thu Jun 20 08:08:08 2024
*************** ref int getSide(Side side, return ref in
*** 11,13 ****
--- 11,24 ----
  {
      return side == Side.left ? left : right;
  }
+ 
+ enum SideA : int[]
+ {
+     left = [0],
+     right = [1],
+ }
+ 
+ int getSideA(SideA side, ref int left, ref int right)
+ {
+     return side == SideA.left ? left : right;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/torture/pr110516a.d gcc-12.4.0/gcc/testsuite/gdc.dg/torture/pr110516a.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/torture/pr110516a.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/torture/pr110516a.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ // https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110516
+ // { dg-do compile }
+ // { dg-options "-fno-moduleinfo -fdump-tree-optimized" }
+ void fn110516(ubyte* ptr)
+ {
+     import core.volatile : volatileLoad;
+     volatileLoad(ptr);
+     volatileLoad(ptr);
+     volatileLoad(ptr);
+     volatileLoad(ptr);
+ }
+ // { dg-final { scan-tree-dump-times " ={v} " 4 "optimized" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/torture/pr110516b.d gcc-12.4.0/gcc/testsuite/gdc.dg/torture/pr110516b.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/torture/pr110516b.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/torture/pr110516b.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ // https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110516
+ // { dg-do compile }
+ // { dg-options "-fno-moduleinfo -fdump-tree-optimized" }
+ void fn110516(ubyte* ptr)
+ {
+     import core.volatile : volatileStore;
+     volatileStore(ptr, 0);
+     volatileStore(ptr, 0);
+     volatileStore(ptr, 0);
+     volatileStore(ptr, 0);
+ }
+ // { dg-final { scan-tree-dump-times " ={v} " 4 "optimized" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/torture/pr113758.d gcc-12.4.0/gcc/testsuite/gdc.dg/torture/pr113758.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/torture/pr113758.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/torture/pr113758.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,19 ----
+ // { dg-do run }
+ // { dg-skip-if "needs gcc/config.d" { ! d_runtime } }
+ struct S113758
+ {
+     int field;
+     ~this() { field = 0; }
+ }
+ 
+ void main()
+ {
+     auto var = S113758(1);
+     f113758d(var);
+     assert(var.field == 1);
+     f113758cxx(var);
+     assert(var.field == 1);
+ }
+ 
+ extern (D)   void f113758d(S113758 arg) { }
+ extern (C++) void f113758cxx(S113758 arg) { }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/torture/pr114171.d gcc-12.4.0/gcc/testsuite/gdc.dg/torture/pr114171.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/torture/pr114171.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/torture/pr114171.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,29 ----
+ // { dg-do run }
+ // { dg-additional-options "-mavx" { target avx_runtime } }
+ // { dg-skip-if "needs gcc/config.d" { ! d_runtime } }
+ import gcc.builtins;
+ 
+ struct S1
+ {
+     string label;
+ }
+ 
+ struct S2
+ {
+     ulong pad;
+     S1 label;
+ }
+ 
+ pragma(inline, false)
+ auto newitem()
+ {
+     void *p = __builtin_malloc(S2.sizeof);
+     __builtin_memset(p, 0, S2.sizeof);
+     return cast(S2*) p;
+ }
+ 
+ int main()
+ {
+     auto bn = newitem();
+     return bn.label is S1.init ? 0 : 1;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.test/compilable/previewin.d gcc-12.4.0/gcc/testsuite/gdc.test/compilable/previewin.d
*** gcc-12.3.0/gcc/testsuite/gdc.test/compilable/previewin.d	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gdc.test/compilable/previewin.d	Thu Jun 20 08:08:08 2024
*************** version (Win64)
*** 79,92 ****
  {
      void checkReal(in real p)
      {
-         // ref for x87 real, value for double-precision real
-         static assert(__traits(isRef, p) == (real.sizeof > 8));
      }
  
      struct RGB { ubyte r, g, b; }
      void checkNonPowerOf2(in RGB p)
      {
-         static assert(__traits(isRef, p));
      }
  }
  else version (X86_64) // Posix x86_64
--- 79,89 ----
*************** else version (X86_64) // Posix x86_64
*** 94,100 ****
      struct Empty {} // 1 dummy byte passed on the stack
      void checkEmptyStruct(in Empty p)
      {
-         static assert(!__traits(isRef, p));
      }
  
      static if (is(__vector(double[4])))
--- 91,96 ----
*************** else version (X86_64) // Posix x86_64
*** 102,108 ****
          struct AvxVectorWrapper { __vector(double[4]) a; } // 256 bits
          void checkAvxVector(in AvxVectorWrapper p)
          {
-             static assert(!__traits(isRef, p));
          }
      }
  }
--- 98,103 ----
*************** else version (AArch64)
*** 111,116 ****
      alias HVA = __vector(float[4])[4]; // can be passed in 4 vector registers
      void checkHVA(in HVA p)
      {
-         static assert(!__traits(isRef, p));
      }
  }
--- 106,110 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.test/compilable/test23978.d gcc-12.4.0/gcc/testsuite/gdc.test/compilable/test23978.d
*** gcc-12.3.0/gcc/testsuite/gdc.test/compilable/test23978.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.test/compilable/test23978.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,30 ----
+ // REQUIRED_ARGS: -preview=dip1021 -lowmem
+ // https://issues.dlang.org/show_bug.cgi?id=23978
+ 
+ // Note: this is a memory corruption bug.
+ // Memory returned by `GC.realloc` retains references to old memory in it,
+ // mostly because of the smallarray optimization for `Array(T)`.
+ // If this fails again, it might not be consistent, so try running it multiple times.
+ 
+ class LUBench { }
+ void lup(ulong , ulong , int , int = 1)
+ {
+     new LUBench;
+ }
+ void lup_3200(ulong iters, ulong flops)
+ {
+     lup(iters, flops, 3200);
+ }
+ void raytrace()
+ {
+     struct V
+     {
+         float x, y, z;
+         auto normalize() { }
+         struct Tid { }
+         auto spawnLinked() { }
+         string[] namesByTid;
+         class MessageBox { }
+         auto cross() { }
+     }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.test/runnable/test23010.d gcc-12.4.0/gcc/testsuite/gdc.test/runnable/test23010.d
*** gcc-12.3.0/gcc/testsuite/gdc.test/runnable/test23010.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.test/runnable/test23010.d	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,43 ----
+ // https://issues.dlang.org/show_bug.cgi?id=23010
+ 
+ alias AliasSeq(T...) = T;
+ 
+ mixin template faz() {
+     alias T = AliasSeq!(int);
+     T bar = 12345;
+ 
+     void write1() {
+         assert(bar[0] == 12345);
+     }
+ 
+     AliasSeq!(string, float) foo = AliasSeq!("qwerty", 1.25f);
+ 
+     void write2() {
+         assert(foo == AliasSeq!("qwerty", 1.25f));
+         foo = AliasSeq!("asdfg", 2.5f); // this even crashed before
+         assert(foo == AliasSeq!("asdfg", 2.5f));
+     }
+ }
+ 
+ void main() {
+     mixin faz!();
+     write1;
+     write2;
+     fun;
+ }
+ 
+ // Testing static symbol generation ('toobj.d' changes)
+ 
+ static AliasSeq!(int, string) tup;
+ 
+ void fun()
+ {
+     auto v = tup;
+ 
+     struct S(T...) {
+         static T b;
+     }
+ 
+     alias T = S!(int, float);
+     auto p = T.b;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/data_initialized_4.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/data_initialized_4.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/data_initialized_4.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/data_initialized_4.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,16 ----
+ ! { dg-do compile }
+ ! { dg-additional-options "-std=legacy" }
+ !
+ ! PR fortran/50410
+ !
+ ! Silently allow overlapping initialization in legacy mode (used to ICE)
+ 
+ program p
+   implicit none
+   type t
+      integer :: g = 1
+   end type t
+   type(t) :: u = t(2)
+   data u%g /3/
+   print *, u    ! this might print "2"
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/data_pointer_3.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/data_pointer_3.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/data_pointer_3.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/data_pointer_3.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,77 ----
+ ! { dg-do compile }
+ ! PR fortran/114474 - DATA and derived types with pointer components
+ 
+ program pr114474
+   implicit none
+   integer, target     :: ii = 42    ! initial data target
+ 
+   integer, target     :: jj = 24
+   integer, pointer    :: qq => jj
+   ! ii and jj resolve slightly differently when the data statement below
+   ! is reached, as jj is resolved outside the structure constructor first
+ 
+   type t
+      integer, pointer :: h
+   end type t
+ 
+   integer, target     :: kk(7) =  23
+   integer, pointer    :: ll(:) => kk
+ 
+   type t1
+      integer          :: m(7)
+   end type t1
+ 
+   type(t)             :: x1, x2, x3, x4, x5
+   type(t), parameter  :: z1 = t(null())
+ 
+   type(t1), target    :: tt = t1([1,2,3,4,5,6,7])
+   type(t1), parameter :: vv = t1(22)
+   type(t1)            :: w1, w2
+   integer,  pointer   :: p1(:) => tt% m
+ 
+   data x1 / t(null())  /
+   data x2 / t(ii)      / ! ii is initial data target
+   data x3 / t(jj)      / ! jj is resolved differently...
+   data x4 / t(tt%m(3)) / ! pointer association with 3rd element
+ 
+   data w1 / t1(12)     /
+   data w2 / t1(vv%m)   /
+ 
+   if (      associated (x1% h)) stop 1
+   if (.not. associated (x2% h)) stop 2
+   if (.not. associated (x3% h)) stop 3
+   if (.not. associated (x4% h)) stop 4
+   if (x2% h /= 42) stop 5
+   if (x3% h /= 24) stop 6
+   if (x4% h /=  3) stop 7
+  
+   if (any (w1%m /= 12  )) stop 8
+   if (any (w2%m /= vv%m)) stop 9
+ end
+ 
+ 
+ subroutine sub
+   implicit none
+ 
+   interface
+      real function myfun (x)
+        real, intent(in) :: x
+      end function myfun
+   end interface
+ 
+   type u
+      procedure(myfun), pointer, nopass :: p
+   end type u
+ 
+   type(u)            :: u3 = u(null())
+   type(u), parameter :: u4 = u(null())
+   type(u)            :: u1, u2
+ 
+   data u1 / u(null()) /
+   data u2 / u(myfun)  /
+ end
+ 
+ real function myfun (x)
+   real, intent(in) :: x
+   myfun = x
+ end function myfun
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/deferred_character_37.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/deferred_character_37.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/deferred_character_37.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/deferred_character_37.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,88 ----
+ ! { dg-do run }
+ ! PR fortran/95947
+ ! PR fortran/110658
+ !
+ ! Test deferred-length character arguments to selected intrinsics
+ ! that may return a character result of same length as first argument:
+ ! CSHIFT, EOSHIFT, MAXVAL, MERGE, MINVAL, PACK, SPREAD, TRANSPOSE, UNPACK
+ 
+ program p
+   implicit none
+   call pr95947 ()
+   call pr110658 ()
+   call s ()
+ 
+ contains
+ 
+   subroutine pr95947
+     character(len=:), allocatable :: m(:)
+ 
+     m = [ character(len=10) :: 'ape','bat','cat','dog','eel','fly','gnu']
+     m = pack (m, mask=(m(:)(2:2) == 'a'))
+ 
+ !   print *, "m = '", m,"' ",               "; expected is ['bat','cat']"
+     if (.not. all (m == ['bat','cat'])) stop 1
+    
+ !   print *, "size(m) =     ", size(m),     "; expected is 2"
+     if (size (m) /= 2) stop 2
+    
+ !   print *, "len(m) =      ", len(m),      "; expected is 10"
+     if (len (m) /= 10) stop 3
+    
+ !   print *, "len_trim(m) = ", len_trim(m), "; expected is 3 3"
+     if (.not. all (len_trim(m) == [3,3])) stop 4
+   end
+ 
+   subroutine pr110658
+     character(len=:), allocatable :: array(:), array2(:,:)
+     character(len=:), allocatable :: res, res1(:), res2(:)
+ 
+     array = ["bb", "aa", "cc"]
+ 
+     res = minval (array)
+     if (res /= "aa") stop 11
+ 
+     res = maxval (array, mask=[.true.,.true.,.false.])
+     if (res /= "bb") stop 12
+ 
+     res1 = cshift (array, 1)
+     if (any (res1 /= ["aa","cc","bb"])) stop 13
+ 
+     res2 = eoshift (res1, -1)
+     if (any (res2 /= ["  ", "aa", "cc"])) stop 14
+ 
+     res2 = pack (array, mask=[.true.,.false.,.true.])
+     if (any (res2 /= ["bb","cc"])) stop 15
+ 
+     res2 = unpack (res2, mask=[.true.,.false.,.true.], field="aa")
+     if (any (res2 /= array)) stop 16
+ 
+     res2 = merge (res2, array, [.true.,.false.,.true.])
+     if (any (res2 /= array)) stop 17
+ 
+     array2 = spread (array, dim=2, ncopies=2)
+     array2 = transpose (array2)
+     if (any (shape (array2) /= [2,3])) stop 18
+     if (any (array2(2,:) /= array))    stop 19
+   end
+ 
+   subroutine s
+     character(:), allocatable :: array1(:), array2(:)
+     array1 = ["aa","cc","bb"]
+     array2 = copy (array1)
+     if (any (array1 /= array2)) stop 20
+   end
+ 
+   function copy (arg) result (res)
+     character(:), allocatable :: res(:)
+     character(*), intent(in)  :: arg(:)
+     integer :: i, k, n
+     k = len (arg)
+     n = size (arg)
+     allocate (character(k) :: res(n))
+     do i = 1, n
+        res(i) = arg(i)
+     end do
+   end
+ 
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/derived_comp_array_ref_8.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/derived_comp_array_ref_8.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/derived_comp_array_ref_8.f90	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/derived_comp_array_ref_8.f90	Thu Jun 20 08:08:09 2024
***************
*** 2,7 ****
--- 2,8 ----
  !
  ! PR fortran/52325
  !
+ implicit none
  real :: f
  cc%a = 5 ! { dg-error "Symbol 'cc' at .1. has no IMPLICIT type" }
  f%a = 5  ! { dg-error "Unexpected '%' for nonderived-type variable 'f' at" }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/findloc_10.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/findloc_10.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/findloc_10.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/findloc_10.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,13 ----
+ ! { dg-do run }
+ ! { dg-options "-fdump-tree-original" }
+ ! PR fortran/110288 - FINDLOC and deferred-length character arguments
+ 
+ program test
+   character(len=:), allocatable :: array(:)
+   character(len=:), allocatable :: value
+   array = ["bb", "aa"]
+   value = "aa"
+   if (findloc (array, value, dim=1) /= 2) stop 1
+ end program test
+ 
+ ! { dg-final { scan-tree-dump "_gfortran_findloc2_s1 \\(.*, \\.array, \\.value\\)" "original" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/findloc_9.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/findloc_9.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/findloc_9.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/findloc_9.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,19 ----
+ ! { dg-do compile }
+ ! { dg-options "-fdump-tree-original" }
+ ! PR fortran/110585 - simplification of FINDLOC for constant complex arguments
+ 
+ program mvce
+   implicit none
+   integer, parameter :: a(*) = findloc([(1.,0.),(2.,1.)], (2.,0.))
+   integer, parameter :: b(*) = findloc([(1.,0.),(2.,1.)], (2.,0.), back=.true.)
+   integer, parameter :: c(*) = findloc([(1.,0.),(2.,1.)], (2.,1.))
+   integer, parameter :: d(*) = findloc([(1.,0.),(2.,1.)], (2.,1.), back=.true.)
+   integer, parameter :: e    = findloc([(1.,0.),(2.,1.)], (2.,1.), dim=1)
+   if (a(1) /= 0) stop 1
+   if (b(1) /= 0) stop 2
+   if (c(1) /= 2) stop 3
+   if (d(1) /= 2) stop 4
+   if (e    /= 2) stop 5
+ end
+ 
+ ! { dg-final { scan-tree-dump-not "_gfortran_stop_numeric" "original" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/gomp/pr114825.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/gomp/pr114825.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/gomp/pr114825.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/gomp/pr114825.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,16 ----
+ ! PR fortran/114825
+ 
+ subroutine pr114825(b)
+   type t
+     real, allocatable :: m(:)
+   end type t
+   type(t), allocatable, target :: b(:)
+   type(t), pointer :: d
+   !$omp parallel private(d)
+   d => b(1)
+   !$omp end parallel
+ contains
+   subroutine sub
+     d => b(1)
+   end subroutine sub
+ end subroutine pr114825
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/implied_do_io_8.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/implied_do_io_8.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/implied_do_io_8.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/implied_do_io_8.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,18 ----
+ ! { dg-do run }
+ ! { dg-additional-options "-fcheck=bounds" }
+ ! PR fortran/111837 - out of bounds access with front-end optimization
+ 
+ program implied_do_bug
+   implicit none
+   integer :: i,j,k
+   real    :: arr(1,1,1)
+   integer :: ni(1)
+   ni(1) = 1
+   arr = 1
+   write(*,*) (((arr(i,j,k), i=1,ni(k)), k=1,1), j=1,1)
+   write(*,*) (((arr(i,j,k), i=1,ni(k)), j=1,1), k=1,1)
+   write(*,*) (((arr(k,i,j), i=1,ni(k)), k=1,1), j=1,1)
+   write(*,*) (((arr(k,i,j), i=1,ni(k)), j=1,1), k=1,1)
+   write(*,*) (((arr(j,k,i), i=1,ni(k)), k=1,1), j=1,1)
+   write(*,*) (((arr(j,k,i), i=1,ni(k)), j=1,1), k=1,1)
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/nullify_4.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/nullify_4.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/nullify_4.f90	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/nullify_4.f90	Thu Jun 20 08:08:09 2024
***************
*** 3,8 ****
--- 3,9 ----
  !
  ! Check error recovery; was crashing before.
  !
+ implicit none
  real, pointer :: ptr
  nullify(ptr, mesh%coarser) ! { dg-error "Symbol 'mesh' at .1. has no IMPLICIT type" }
  end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pdt_33.f03 gcc-12.4.0/gcc/testsuite/gfortran.dg/pdt_33.f03
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pdt_33.f03	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pdt_33.f03	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,21 ----
+ ! { dg-do run }
+ !
+ ! Test the fix for PR102003, where len parameters where not returned as constants.
+ !
+ ! Contributed by Harald Anlauf  <anlauf@gcc.gnu.org>
+ !
+ program pr102003
+   type pdt(n)
+      integer, len     :: n = 8
+      character(len=n) :: c
+   end type pdt
+   type(pdt(42)) :: p
+   integer, parameter :: m = len (p% c)
+   integer, parameter :: lm = p% c% len
+ 
+   if (m /= 42) stop 1
+   if (len (p% c) /= 42) stop 2
+   if (lm /= 42) stop 3
+   if (p% c% len /= 42) stop 4
+ end
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pointer_init_6.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pointer_init_6.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pointer_init_6.f90	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pointer_init_6.f90	Thu Jun 20 08:08:09 2024
*************** end module m1
*** 21,27 ****
  
  
  module m2
! 
   type :: t
     procedure(s), pointer, nopass :: ppc
   end type
--- 21,27 ----
  
  
  module m2
!  implicit none
   type :: t
     procedure(s), pointer, nopass :: ppc
   end type
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr103715.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr103715.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr103715.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr103715.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,12 ----
+ ! { dg-do compile }
+ ! PR fortran/103715 - ICE in gfc_find_gsymbol
+ !
+ ! valgrind did report an invalid read in check_externals_procedure
+ 
+ program p
+   select type (y => g()) ! { dg-error "Selector shall be polymorphic" }
+   end select
+   call g()
+ end
+ 
+ ! { dg-prune-output "already being used as a FUNCTION" }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr103716.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr103716.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr103716.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr103716.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,15 ----
+ ! { dg-do compile }
+ !
+ ! The gimplifier used to throw a fit on thes two functions.
+ !
+ ! Contributed by Gerhard Steinmetz  <gscfq@t-online.de>
+ !
+ function f1(x)
+    character(*) :: x(*)
+    print *, g(x%len)
+ end
+ 
+ function f2(x)
+    character(*) :: x(3)
+    print *, g(x%len)
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr104908.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr104908.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr104908.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr104908.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,32 ----
+ ! { dg-do compile }
+ ! { dg-additional-options "-fcheck=bounds -fdump-tree-original" }
+ !
+ ! PR fortran/104908 - incorrect out-of-bounds runtime error
+ 
+ program test
+   implicit none
+   type vec
+      integer :: x(3) = [2,4,6]
+   end type vec
+   type(vec) :: w(2)
+   call sub(w)
+ contains
+   subroutine sub (v)
+     class(vec), intent(in) :: v(:)
+     integer :: k, q(3)
+     q = [ (v(1)%x(k), k = 1, 3) ]   ! <-- was failing here after r11-1235
+     print *, q
+   end
+ end
+ 
+ subroutine sub2 (zz)
+   implicit none
+   type vec
+      integer :: x(2,1)
+   end type vec
+   class(vec), intent(in) :: zz(:)   ! used to ICE after r11-1235
+   integer :: k
+   k = zz(1)%x(2,1)
+ end
+ 
+ ! { dg-final { scan-tree-dump-times " above upper bound " 4 "original" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr106999.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr106999.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr106999.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr106999.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,33 ----
+ ! { dg-do compile }
+ ! Test the fix for PR106999
+ ! Contributed by Gerhard Steinmetz  <gscfq@t-online.de>
+ program p
+    type t
+       integer :: i
+       procedure(g), pointer :: f
+    end type
+    class(t), allocatable :: y, z
+    procedure(g), pointer :: ff
+    allocate (z)
+    z%i = 42
+    z%f => g
+    ff => g
+    call r(z%f)
+    call s(z%f) ! { dg-error "Interface mismatch in dummy procedure" }
+    call s(ff)  ! { dg-error "Interface mismatch in dummy procedure" }
+ contains
+    subroutine g(x)
+       class(t) :: x
+       x%i = 84
+    end
+    subroutine r(x)
+       procedure(g) :: x
+       print *, "in r"
+       allocate (y)
+       call x(y)
+       print *, y%i
+    end
+    subroutine s(x)
+       class(*) :: x
+    end subroutine
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr107397.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr107397.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr107397.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr107397.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,10 ----
+ !{ dg-do compile }
+ !
+ program p
+   implicit none
+   type t
+     real :: a = 1.0
+   end type
+   type(t), parameter :: x = z'1' ! { dg-error "incompatible with a BOZ" }
+   x%a = x%a + 2 ! { dg-error "has no IMPLICIT type" }
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr110221.f gcc-12.4.0/gcc/testsuite/gfortran.dg/pr110221.f
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr110221.f	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr110221.f	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,17 ----
+ C PR middle-end/68146
+ C { dg-do compile }
+ C { dg-options "-O2 -w" }
+ C { dg-additional-options "-mavx512f --param vect-partial-vector-usage=2" { target avx512f } }
+       SUBROUTINE CJYVB(V,Z,V0,CBJ,CDJ,CBY,CYY)
+       IMPLICIT DOUBLE PRECISION (A,B,G,O-Y)
+       IMPLICIT COMPLEX*16 (C,Z)
+       DIMENSION CBJ(0:*),CDJ(0:*),CBY(0:*)
+       N=INT(V)
+       CALL GAMMA2(VG,GA)
+       DO 65 K=1,N
+         CBY(K)=CYY
+ 65    CONTINUE
+       CDJ(0)=V0/Z*CBJ(0)-CBJ(1)
+       DO 70 K=1,N
+ 70      CDJ(K)=-(K+V0)/Z*CBJ(K)+CBJ(K-1)
+       END
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr111880.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr111880.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr111880.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr111880.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,22 ----
+ ! { dg-do compile }
+ ! { dg-options "-std=f2018" }
+ ! PR fortran/111880 - redundant warning of obsolescent COMMON with submodule
+ 
+ module third_party_module
+   integer :: some_param
+   common /not_my_code/ some_param   ! { dg-warning "COMMON block" }
+ end module third_party_module
+ 
+ module foo
+   use third_party_module
+   interface
+     module subroutine bar()
+     end subroutine bar
+   end interface
+ end module foo
+ 
+ submodule (foo) foo_submod      ! We do not need a warning here!
+ contains
+   module procedure bar
+   end procedure bar
+ end submodule foo_submod
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr114739.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr114739.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr114739.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr114739.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,11 ----
+ ! { dg-do compile }
+ ! The fix here was triggered by an ICE prior to r14-9489-g3fd46d859cda10
+ ! Before that gfortran gave an incorrect "no implicit type" error for all
+ ! three statements.
+ program main
+   implicit complex(z)
+   implicit character(c)
+   z2%re = 1.
+   z2%im = 2.
+   print *, z2, c%kind
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr88138.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr88138.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr88138.f90	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr88138.f90	Thu Jun 20 08:08:09 2024
***************
*** 1,5 ****
--- 1,6 ----
  ! { dg-do compile }
  program p
+    implicit none
     type t
        character :: c = 'c'
     end type
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr89943_3.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr89943_3.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr89943_3.f90	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr89943_3.f90	Thu Jun 20 08:08:09 2024
*************** submodule(Foo_mod) Foo_smod
*** 22,28 ****
        module subroutine runFoo4C(ndim) bind(C, name="runFu")   ! { dg-error "Mismatch in BIND" }
           use, intrinsic :: iso_c_binding                 ! { dg-error "Unexpected USE statement" }
           implicit none                                   ! { dg-error "Unexpected IMPLICIT NONE statement" }
!          integer(c_int32_t) , intent(in) :: ndim         ! { dg-error "Unexpected data declaration" }
        end subroutine runFoo4C                            ! { dg-error " Expecting END SUBMODULE" }
  
  end submodule Foo_smod
--- 22,28 ----
        module subroutine runFoo4C(ndim) bind(C, name="runFu")   ! { dg-error "Mismatch in BIND" }
           use, intrinsic :: iso_c_binding                 ! { dg-error "Unexpected USE statement" }
           implicit none                                   ! { dg-error "Unexpected IMPLICIT NONE statement" }
!          integer(c_int32_t) , intent(in) :: ndim         ! { dg-error "Symbol 'c_int32_t' at .1. has no IMPLICIT type" }
        end subroutine runFoo4C                            ! { dg-error " Expecting END SUBMODULE" }
  
  end submodule Foo_smod
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr89943_4.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr89943_4.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr89943_4.f90	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr89943_4.f90	Thu Jun 20 08:08:09 2024
*************** submodule(Foo_mod) Foo_smod
*** 23,29 ****
        module function runFoo4C(ndim) bind(C, name="runFu")  ! { dg-error "Mismatch in BIND" }
           use, intrinsic :: iso_c_binding     ! { dg-error "Unexpected USE statement in" }
           implicit none                       ! { dg-error "Unexpected IMPLICIT NONE statement" }
!          integer(c_int32_t) , intent(in) :: ndim   ! { dg-error "Unexpected data declaration" }
        end function runFoo4C                  ! { dg-error "Expecting END SUBMODULE" }
  
  end submodule Foo_smod
--- 23,29 ----
        module function runFoo4C(ndim) bind(C, name="runFu")  ! { dg-error "Mismatch in BIND" }
           use, intrinsic :: iso_c_binding     ! { dg-error "Unexpected USE statement in" }
           implicit none                       ! { dg-error "Unexpected IMPLICIT NONE statement" }
!          integer(c_int32_t) , intent(in) :: ndim   ! { dg-error "Symbol 'c_int32_t' at .1. has no IMPLICIT type" }
        end function runFoo4C                  ! { dg-error "Expecting END SUBMODULE" }
  
  end submodule Foo_smod
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/ptr-func-5.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/ptr-func-5.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/ptr-func-5.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/ptr-func-5.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,39 ----
+ ! { dg-do compile }
+ ! PR fortran/109846
+ ! CLASS pointer function result in variable definition context
+ 
+ module foo
+   implicit none
+   type :: parameter_list
+   contains
+     procedure :: sublist, sublist_nores
+   end type
+ contains
+   function sublist (this) result (slist)
+     class(parameter_list), intent(inout) :: this
+     class(parameter_list), pointer       :: slist
+     allocate (slist)
+   end function
+   function sublist_nores (this)
+     class(parameter_list), intent(inout) :: this
+     class(parameter_list), pointer       :: sublist_nores
+     allocate (sublist_nores)
+   end function
+ end module
+ 
+ program example
+   use foo
+   implicit none
+   type(parameter_list) :: plist
+   call sub1 (plist%sublist())
+   call sub1 (plist%sublist_nores())
+   call sub2 (plist%sublist())
+   call sub2 (plist%sublist_nores())
+ contains
+   subroutine sub1 (plist)
+     type(parameter_list), intent(inout) :: plist
+   end subroutine
+   subroutine sub2 (plist)
+     type(parameter_list) :: plist
+   end subroutine
+ end program
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/select_rank_6.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/select_rank_6.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/select_rank_6.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/select_rank_6.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,48 ----
+ ! { dg-do compile }
+ ! PR fortran/100607 - fix diagnostics for SELECT RANK
+ ! Contributed by T.Burnus
+ 
+ program p
+   implicit none
+   integer, allocatable :: A(:,:,:)
+ 
+   allocate(a(5:6,-2:2, 99:100))
+   call foo(a)
+   call bar(a)
+ 
+ contains
+ 
+   subroutine foo(x)
+     integer, allocatable :: x(..)
+     if (rank(x) /= 3) stop 1
+     if (any (lbound(x) /= [5, -2, 99])) stop 2
+ 
+     select rank (x)
+     rank(3)
+       if (any (lbound(x) /= [5, -2, 99])) stop 3
+     end select
+ 
+     select rank (x) ! { dg-error "pointer or allocatable selector at .2." }
+     rank(*)         ! { dg-error "pointer or allocatable selector at .2." }
+       if (rank(x) /= 1) stop 4
+       if (lbound(x, 1) /= 1) stop 5
+     end select
+   end
+ 
+   subroutine bar(x)
+     integer :: x(..)
+     if (rank(x) /= 3) stop 6
+     if (any (lbound(x) /= 1)) stop 7
+ 
+     select rank (x)
+     rank(3)
+       if (any (lbound(x) /= 1)) stop 8
+     end select
+ 
+     select rank (x)
+     rank(*)
+       if (rank(x) /= 1) stop 9
+       if (lbound(x, 1) /= 1) stop 10
+     end select
+   end
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/shape_12.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/shape_12.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/shape_12.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/shape_12.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,51 ----
+ ! { dg-do run }
+ !
+ ! PR fortran/115150
+ !
+ ! Check that SHAPE handles zero-sized arrays correctly
+ !
+ implicit none
+ call one
+ call two
+ 
+ contains
+ 
+ subroutine one
+   real,allocatable :: A(:),B(:,:)
+   allocate(a(3:0), b(5:1, 2:5))
+ 
+   if (any (shape(a) /= [0])) stop 1
+   if (any (shape(b) /= [0, 4])) stop 2
+   if (size(a) /= 0) stop 3
+   if (size(b) /= 0) stop 4
+   if (any (lbound(a) /= [1])) stop 5
+   if (any (lbound(b) /= [1, 2])) stop 6
+   if (any (ubound(a) /= [0])) stop 5
+   if (any (ubound(b) /= [0,5])) stop 6
+ end
+ 
+ subroutine two
+ integer :: x1(10), x2(10,10)
+ call f(x1, x2, -3)
+ end
+ 
+ subroutine f(y1, y2, n)
+   integer, value :: n
+   integer :: y1(1:n)
+   integer :: y2(1:n,4,2:*)
+   call g(y1, y2)
+ end
+ 
+ subroutine g(z1, z2)
+   integer :: z1(..), z2(..)
+ 
+   if (any (shape(z1) /= [0])) stop 1
+   if (any (shape(z2) /= [0, 4, -1])) stop 2
+   if (size(z1) /= 0) stop 3
+   if (size(z2) /= 0) stop 4
+   if (any (lbound(z1) /= [1])) stop 5
+   if (any (lbound(z2) /= [1, 1, 1])) stop 6
+   if (any (ubound(z1) /= [0])) stop 5
+   if (any (ubound(z2) /= [0, 4, -1])) stop 6
+ end
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/use_31.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/use_31.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/use_31.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/use_31.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,26 ----
+ ! { dg-do compile }
+ !
+ ! PR fortran/107426
+ ! This example used to generate an ICE, caused by the use stmt from the nested
+ ! procedure declaration setting the result of the C_LOC global intrinsic symbol
+ ! to the symbol of C_PTR from ISO_C_BINDING being imported, before freeing the
+ ! latter symbol because of the rejection of the use statement.
+ !
+ ! Contributed by Gerhard Steinmetz <gscfq@t-online.de>
+ 
+ module m
+ contains
+    subroutine p() bind(c)
+       use, intrinsic :: iso_c_binding
+       integer, target :: a = 1
+       type(c_ptr) :: z
+       interface
+          subroutine s(x) bind(cc)            ! { dg-error "Missing closing paren" }
+             use, intrinsic :: iso_c_binding  ! { dg-error "Unexpected USE statement in INTERFACE block" }
+             integer(c_int), value :: x       ! { dg-error "Parameter 'c_int' at .1. has not been declared" }
+          end                                 ! { dg-error "END INTERFACE statement expected" }
+       end interface
+       z = c_loc(a)
+       call s(z)
+    end
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/access10.adb gcc-12.4.0/gcc/testsuite/gnat.dg/access10.adb
*** gcc-12.3.0/gcc/testsuite/gnat.dg/access10.adb	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/access10.adb	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,58 ----
+ --  PR ada/113893
+ --  Testcase by Pascal Pignard <p.p11@orange.fr>
+ 
+ --  { dg-do run }
+ 
+ with Ada.Text_IO;
+ with Ada.Finalization;
+ 
+ procedure Access10 is
+ 
+    generic
+       type Element_Type is private;
+       with function Image (Item : Element_Type) return String is <>;
+    package Sanitize is
+       type Container is new Ada.Finalization.Controlled with record
+          Data : Element_Type;
+       end record;
+       overriding procedure Finalize (Object : in out Container);
+    end Sanitize;
+ 
+    package body Sanitize is
+       overriding procedure Finalize (Object : in out Container) is
+       begin
+          Ada.Text_IO.Put_Line ("Current:" & Image (Object.Data));
+       end Finalize;
+    end Sanitize;
+ 
+    procedure Test01 is
+       package Float_Sanitized is new Sanitize (Float, Float'Image);
+       V  : Float_Sanitized.Container;
+       C  : constant Float_Sanitized.Container :=
+ 	     (Ada.Finalization.Controlled with 8.8);
+       A  : access Float_Sanitized.Container := 
+ 	     new Float_Sanitized.Container'(Ada.Finalization.Controlled with 7.7);  -- { dg-warning "not be finalized|named" }
+       AC : access constant Float_Sanitized.Container :=
+              new Float_Sanitized.Container'(Ada.Finalization.Controlled with 6.6);  -- { dg-warning "not be finalized|named" }
+    begin
+       V.Data := 9.9 + C.Data + A.Data;
+       Ada.Text_IO.Put_Line ("Value:" & Float'Image (V.Data));
+    end Test01;
+ 
+    procedure Test02 is
+       type Float_Sanitized is new Float;
+       V  : Float_Sanitized;
+       C  : constant Float_Sanitized        := (8.8);
+       A  : access Float_Sanitized          := new Float_Sanitized'(7.7);
+       AC : access constant Float_Sanitized := new Float_Sanitized'(6.6);
+    begin
+       V := 9.9 + C + A.all;
+       Ada.Text_IO.Put_Line ("Value:" & Float_Sanitized'Image (V));
+    end Test02;
+ 
+ begin
+    Ada.Text_IO.Put_Line ("Test01:");
+    Test01;
+    Ada.Text_IO.Put_Line ("Test02:");
+    Test02;
+ end;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/incomplete8.adb gcc-12.4.0/gcc/testsuite/gnat.dg/incomplete8.adb
*** gcc-12.3.0/gcc/testsuite/gnat.dg/incomplete8.adb	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/incomplete8.adb	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,22 ----
+ -- PR ada/114708
+ -- Reported by Jere <jhb.chat@gmail.com>
+ 
+ -- { dg-do compile }
+ 
+ procedure Incomplete8 is
+ 
+   generic
+     type Element_Type(<>);
+   package Test_Incomplete_Formal is
+     type Element_Access is access Element_Type;
+   end Test_Incomplete_Formal;
+ 
+   type Node;
+ 
+   package P is new Test_Incomplete_Formal(Node);
+ 
+   type Node is limited null record;
+    
+ begin
+   null;
+ end;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/opt102.adb gcc-12.4.0/gcc/testsuite/gnat.dg/opt102.adb
*** gcc-12.3.0/gcc/testsuite/gnat.dg/opt102.adb	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/opt102.adb	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,10 ----
+ -- { dg-do run }
+ -- { dg-options "-O2 -gnata" }
+ 
+ with Opt102_Pkg; use Opt102_Pkg;
+ 
+ procedure Opt102 is
+   I, F : aliased Integer;
+ begin
+   I := Get (Two, F'Access, null);
+ end;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/opt102_pkg.adb gcc-12.4.0/gcc/testsuite/gnat.dg/opt102_pkg.adb
*** gcc-12.3.0/gcc/testsuite/gnat.dg/opt102_pkg.adb	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/opt102_pkg.adb	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,12 ----
+ package body Opt102_Pkg is
+ 
+   function Get (E : Enum; F, M : access Integer) return Integer is
+   begin
+     case E is
+       when One   => return 0;
+       when Two   => return F.all;
+       when Three => return M.all;
+     end case;
+   end;
+ 
+ end Opt102_Pkg;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/opt102_pkg.ads gcc-12.4.0/gcc/testsuite/gnat.dg/opt102_pkg.ads
*** gcc-12.3.0/gcc/testsuite/gnat.dg/opt102_pkg.ads	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/opt102_pkg.ads	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,10 ----
+ package Opt102_Pkg is
+ 
+   type Enum is (One, Two, Three);
+ 
+   function Get (E : Enum; F, M : access Integer) return Integer
+     with Pre => (E = One) = (F = null and M = null) and
+                 (E = Two) = (F /= null) and
+                 (E = Three) = (M /= null);
+ 
+ end Opt102_Pkg;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/opt104.adb gcc-12.4.0/gcc/testsuite/gnat.dg/opt104.adb
*** gcc-12.3.0/gcc/testsuite/gnat.dg/opt104.adb	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/opt104.adb	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,22 ----
+ -- { dg-do compile }
+ -- { dg-options "-O -gnatws" }
+ 
+ package body Opt104 is
+ 
+    procedure Proc (R : Rec) is
+       Data : Packed_Rec;
+ 
+    begin
+       case R.D is
+          when True =>
+             for I in 1 .. R.Len loop
+                exit;
+             end loop;
+ 
+          when False =>
+             null;
+       end case;
+    end;
+ 
+ end Opt104;
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/opt104.ads gcc-12.4.0/gcc/testsuite/gnat.dg/opt104.ads
*** gcc-12.3.0/gcc/testsuite/gnat.dg/opt104.ads	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/opt104.ads	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,40 ----
+ package Opt104 is
+ 
+    type Time is record
+       S  : Integer;
+       B1 : Boolean;
+       B2 : Boolean;
+       B3 : Boolean;
+       B4 : Boolean;
+       B5 : Boolean;
+       B6 : Boolean;
+    end record;
+ 
+    Zero_Time : constant Time :=
+      (S  => 0,
+       B1 => False,
+       B2 => False,
+       B3 => False,
+       B4 => False,
+       B5 => False,
+       B6 => False);
+ 
+    type Root is tagged null record;
+ 
+    type Packed_Rec is record
+       R : Root;
+       B : Boolean;
+       T : Time := Zero_Time;
+    end record;
+    pragma Pack (Packed_Rec);
+ 
+    type Rec (D : Boolean) is record
+       case D is
+          when True  => Len : Integer;
+          when False => null;
+       end case;
+    end record;
+ 
+    procedure Proc (R : Rec);
+ 
+ end Opt104;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/predicate15.adb gcc-12.4.0/gcc/testsuite/gnat.dg/predicate15.adb
*** gcc-12.3.0/gcc/testsuite/gnat.dg/predicate15.adb	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/predicate15.adb	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,15 ----
+ -- { dg-do compile }
+ -- { dg-options "-gnata" }
+ 
+ procedure Predicate15 is
+ 
+    type Grid is array (Positive range <>) of Integer with
+       Dynamic_Predicate => Grid'First = 1;
+ 
+    type Grid_Ptr is access Grid;
+ 
+    Data : Grid_Ptr := new Grid (1 .. 10);
+ 
+ begin
+    null;
+ end;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/varsize4.adb gcc-12.4.0/gcc/testsuite/gnat.dg/varsize4.adb
*** gcc-12.3.0/gcc/testsuite/gnat.dg/varsize4.adb	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/varsize4.adb	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,20 ----
+ -- { dg-do compile }
+ 
+ package body Varsize4 is
+ 
+    function Func (Bytes_Read : out Natural) return Arr is
+       Ret : Arr := (others => False);
+    begin
+       Bytes_Read := 0;
+       return Ret;
+    end;
+ 
+    function Get return Natural is
+       Data  : Arr;
+       Bytes : Natural;
+    begin
+       Data := Func (Bytes);
+       return Bytes;
+    end;
+ 
+ end Varsize4;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/varsize4.ads gcc-12.4.0/gcc/testsuite/gnat.dg/varsize4.ads
*** gcc-12.3.0/gcc/testsuite/gnat.dg/varsize4.ads	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/varsize4.ads	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,9 ----
+ with Varsize4_Pkg;
+ 
+ package Varsize4 is
+ 
+    type Arr is array (1 .. Varsize4_Pkg.F) of Boolean;
+ 
+    function Get return Natural;
+ 
+ end Varsize4;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/varsize4_pkg.ads gcc-12.4.0/gcc/testsuite/gnat.dg/varsize4_pkg.ads
*** gcc-12.3.0/gcc/testsuite/gnat.dg/varsize4_pkg.ads	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/varsize4_pkg.ads	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,5 ----
+ package Varsize4_Pkg is
+ 
+    function F return Natural;
+ 
+ end Varsize4_Pkg;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/jit.dg/jit.exp gcc-12.4.0/gcc/testsuite/jit.dg/jit.exp
*** gcc-12.3.0/gcc/testsuite/jit.dg/jit.exp	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/jit.dg/jit.exp	Thu Jun 20 08:08:09 2024
*************** proc jit-verify-assembler { args } {
*** 871,879 ****
--- 871,893 ----
  proc jit-verify-assembler-output { args } {
      verbose "jit-verify-assembler: $args"
  
+     if { [llength $args] > 3 } {
+ 	error "jit-verify-assembler-output: too many arguments"
+ 	return
+     }
+ 
      set dg-output-text [lindex $args 0]
      verbose "dg-output-text: ${dg-output-text}"
  
+     if { [llength $args] >= 2 } {
+ 	switch [dg-process-target [lindex $args 1]] {
+ 	    "S" { }
+ 	    "N" { return }
+ 	    "F" { setup_xfail "*-*-*" }
+ 	    "P" { }
+ 	}
+     }
+ 
      upvar 2 name name
      verbose "name: $name"
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/jit.dg/test-link-section-assembler.c gcc-12.4.0/gcc/testsuite/jit.dg/test-link-section-assembler.c
*** gcc-12.3.0/gcc/testsuite/jit.dg/test-link-section-assembler.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/jit.dg/test-link-section-assembler.c	Thu Jun 20 08:08:09 2024
*************** create_code (gcc_jit_context *ctxt, void
*** 34,37 ****
  }
  
  /* { dg-final { jit-verify-output-file-was-created "" } } */
! /* { dg-final { jit-verify-assembler-output ".section	.my_section" } } */
--- 34,37 ----
  }
  
  /* { dg-final { jit-verify-output-file-was-created "" } } */
! /* { dg-final { jit-verify-assembler-output ".section\\s.my_section" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/jit.dg/test-setting-alignment.c gcc-12.4.0/gcc/testsuite/jit.dg/test-setting-alignment.c
*** gcc-12.3.0/gcc/testsuite/jit.dg/test-setting-alignment.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/jit.dg/test-setting-alignment.c	Thu Jun 20 08:08:09 2024
*************** create_code (gcc_jit_context *ctxt, void
*** 62,66 ****
  }
  
  /* { dg-final { jit-verify-output-file-was-created "" } } */
! /* { dg-final { jit-verify-assembler-output ".comm	foo,4,8" } } */
  /* { dg-final { jit-verify-assembler-output "movl	-16\\\(%rbp\\\), %eax" } } */
--- 62,67 ----
  }
  
  /* { dg-final { jit-verify-output-file-was-created "" } } */
! /* { dg-final { jit-verify-assembler-output ".comm	foo,4,8" { target { ! *-*-darwin* } } } } */
! /* { dg-final { jit-verify-assembler-output ".comm\\s_foo,4,3" { target *-*-darwin* } } } */
  /* { dg-final { jit-verify-assembler-output "movl	-16\\\(%rbp\\\), %eax" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/lib/target-supports.exp gcc-12.4.0/gcc/testsuite/lib/target-supports.exp
*** gcc-12.3.0/gcc/testsuite/lib/target-supports.exp	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/lib/target-supports.exp	Thu Jun 20 08:08:09 2024
*************** proc check_effective_target_aarch64_tlsl
*** 1258,1270 ****
  # emitted, 0 otherwise.
  
  proc check_effective_target_shared { } {
      # Note that M68K has a multilib that supports -fpic but not
      # -fPIC, so we need to check both.  We test with a program that
      # requires GOT references.
      return [check_no_compiler_messages shared executable {
  	extern int foo (void); extern int bar;
  	int baz (void) { return foo () + bar; }
!     } "-shared -fpic"]
  }
  
  # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
--- 1258,1277 ----
  # emitted, 0 otherwise.
  
  proc check_effective_target_shared { } {
+     # Darwin's linker defaults to error on undefined (which makes it look as
+     # if we do not support shared) but we can tell it to allow the symbols used
+     # here to be undefined.
+     set extra_flags ""
+     if { [istarget *-*-darwin\[912\]*] } {
+       set extra_flags "-Wl,-U,_foo,-U,_bar,-U,__Z3foov"
+     }
      # Note that M68K has a multilib that supports -fpic but not
      # -fPIC, so we need to check both.  We test with a program that
      # requires GOT references.
      return [check_no_compiler_messages shared executable {
  	extern int foo (void); extern int bar;
  	int baz (void) { return foo () + bar; }
!     } "-shared -fpic $extra_flags"]
  }
  
  # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
*************** proc check_effective_target_avx512fp16 {
*** 9355,9360 ****
--- 9362,9368 ----
  	void foo (void)
  	{
  	  asm volatile ("vmovw %edi, %xmm0");
+ 	  asm volatile ("vfcmulcph %xmm1, %xmm2, %xmm3{%k1}");
  	}
      } "-O2 -mavx512fp16" ]
  }
*************** proc check_effective_target_aarch64_tiny
*** 10597,10603 ****
  # various architecture extensions via the .arch_extension pseudo-op.
  
  foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve"
! 			  "i8mm" "f32mm" "f64mm" "bf16" "sb" "sve2" } {
      eval [string map [list FUNC $aarch64_ext] {
  	proc check_effective_target_aarch64_asm_FUNC_ok { } {
  	  if { [istarget aarch64*-*-*] } {
--- 10605,10611 ----
  # various architecture extensions via the .arch_extension pseudo-op.
  
  foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve"
! 			  "i8mm" "f32mm" "f64mm" "bf16" "sb" "sve2" "ls64" } {
      eval [string map [list FUNC $aarch64_ext] {
  	proc check_effective_target_aarch64_asm_FUNC_ok { } {
  	  if { [istarget aarch64*-*-*] } {
*************** proc check_effective_target_o_flag_in_se
*** 11817,11822 ****
--- 11825,11870 ----
  	    return 0
  	}
      }]
+ }
+ 
+ # Return 1 if the given assembler supports hardware transactional memory
+ # instructions with machine type Power10, 0 otherwise.  Cache the result.
+ 
+ proc check_effective_target_powerpc_as_p10_htm { } {
+     global tool
+     global GCC_UNDER_TEST
+ 
+     # Need auto-host.h to check linker support.
+     if { ![file exists ../../auto-host.h ] } {
+ 	return 0
+     }
+ 
+     return [check_cached_effective_target powerpc_as_p10_htm {
+ 
+ 	set src pie[pid].c
+ 	set obj pie[pid].o
+ 
+ 	set f [open $src "w"]
+ 	puts $f "#include \"../../auto-host.h\""
+ 	puts $f "#if HAVE_AS_POWER10_HTM == 0"
+ 	puts $f "# error Assembler does not support htm insns with power10."
+ 	puts $f "#endif"
+ 	close $f
+ 
+ 	verbose "check_effective_target_powerpc_as_p10_htm compiling testfile $src" 2
+ 	set lines [${tool}_target_compile $src $obj object ""]
+ 
+ 	file delete $src
+ 	file delete $obj
+ 
+ 	if [string match "" $lines] then {
+ 	    verbose "check_effective_target_powerpc_as_p10_htm testfile compilation passed" 2
+ 	    return 1
+ 	} else {
+ 	    verbose "check_effective_target_powerpc_as_p10_htm testfile compilation failed" 2
+ 	    return 0
+ 	}
+     }]
  }
  
  # return 1 if LRA is supported.
diff -Nrcpad gcc-12.3.0/gcc/testsuite/obj-c++.dg/encode-10.mm gcc-12.4.0/gcc/testsuite/obj-c++.dg/encode-10.mm
*** gcc-12.3.0/gcc/testsuite/obj-c++.dg/encode-10.mm	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/obj-c++.dg/encode-10.mm	Thu Jun 20 08:08:09 2024
***************
*** 1,5 ****
  /* Test for @encode in templates.  */
- /* { dg-options "-lobjc" } */
  /* { dg-do run } */
  #include <string.h>           
  #include <stdlib.h>
--- 1,4 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/obj-c++.dg/encode-9.mm gcc-12.4.0/gcc/testsuite/obj-c++.dg/encode-9.mm
*** gcc-12.3.0/gcc/testsuite/obj-c++.dg/encode-9.mm	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/obj-c++.dg/encode-9.mm	Thu Jun 20 08:08:09 2024
***************
*** 1,5 ****
  /* Test than @encode is properly instantiated. */
- /* { dg-options "-lobjc" } */
  /* { dg-do run } */
  
  #include <string.h>           
--- 1,4 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h gcc-12.4.0/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h
*** gcc-12.3.0/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h	Thu Jun 20 08:08:09 2024
***************
*** 29,34 ****
--- 29,37 ----
  #ifndef __NSObjCRuntime_h_GNUSTEP_BASE_INCLUDE
  #define __NSObjCRuntime_h_GNUSTEP_BASE_INCLUDE
  
+ /* Allow the elaborated enum use in _GS_NAMED_ENUM. */
+ #pragma GCC system_header
+ 
  #ifdef __cplusplus
  #ifndef __STDC_LIMIT_MACROS
  #define __STDC_LIMIT_MACROS 1
diff -Nrcpad gcc-12.3.0/gcc/tree-data-ref.cc gcc-12.4.0/gcc/tree-data-ref.cc
*** gcc-12.3.0/gcc/tree-data-ref.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-data-ref.cc	Thu Jun 20 08:08:09 2024
*************** along with GCC; see the file COPYING3.
*** 73,78 ****
--- 73,79 ----
  
  */
  
+ #define INCLUDE_ALGORITHM
  #include "config.h"
  #include "system.h"
  #include "coretypes.h"
*************** runtime_alias_check_p (ddr_p ddr, class
*** 1632,1637 ****
--- 1633,1645 ----
  				   "runtime alias check not supported for"
  				   " outer loop.\n");
  
+   /* FORNOW: We don't support handling different address spaces.  */
+   if (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (DR_BASE_ADDRESS (DDR_A (ddr)))))
+       != TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (DR_BASE_ADDRESS (DDR_B (ddr))))))
+     return opt_result::failure_at (DR_STMT (DDR_A (ddr)),
+ 				   "runtime alias check between different "
+ 				   "address spaces not supported.\n");
+ 
    return opt_result::success ();
  }
  
*************** create_intersect_range_checks (class loo
*** 2620,2626 ****
  	 Because the maximum values are inclusive, there is an alias
  	 if the maximum value of one segment is equal to the minimum
  	 value of the other.  */
!       min_align = MIN (dr_a.align, dr_b.align);
        cmp_code = LT_EXPR;
      }
  
--- 2628,2636 ----
  	 Because the maximum values are inclusive, there is an alias
  	 if the maximum value of one segment is equal to the minimum
  	 value of the other.  */
!       min_align = std::min (dr_a.align, dr_b.align);
!       min_align = std::min (min_align, known_alignment (dr_a.access_size));
!       min_align = std::min (min_align, known_alignment (dr_b.access_size));
        cmp_code = LT_EXPR;
      }
  
diff -Nrcpad gcc-12.3.0/gcc/tree-inline.cc gcc-12.4.0/gcc/tree-inline.cc
*** gcc-12.3.0/gcc/tree-inline.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-inline.cc	Thu Jun 20 08:08:09 2024
*************** along with GCC; see the file COPYING3.
*** 65,70 ****
--- 65,71 ----
  #include "symbol-summary.h"
  #include "symtab-thunks.h"
  #include "symtab-clones.h"
+ #include "asan.h"
  
  /* I'm not real happy about this, but we need to handle gimple and
     non-gimple trees.  */
*************** copy_bb (copy_body_data *id, basic_block
*** 2210,2222 ****
  	    }
  	  else if (call_stmt
  		   && id->call_stmt
! 		   && gimple_call_internal_p (stmt)
! 		   && gimple_call_internal_fn (stmt) == IFN_TSAN_FUNC_EXIT)
! 	    {
! 	      /* Drop TSAN_FUNC_EXIT () internal calls during inlining.  */
! 	      gsi_remove (&copy_gsi, false);
! 	      continue;
! 	    }
  
  	  /* Statements produced by inlining can be unfolded, especially
  	     when we constant propagated some operands.  We can't fold
--- 2211,2236 ----
  	    }
  	  else if (call_stmt
  		   && id->call_stmt
! 		   && gimple_call_internal_p (stmt))
! 	    switch (gimple_call_internal_fn (stmt))
! 	      {
! 	      case IFN_TSAN_FUNC_EXIT:
! 		/* Drop .TSAN_FUNC_EXIT () internal calls during inlining.  */
! 		gsi_remove (&copy_gsi, false);
! 		continue;
! 	      case IFN_ASAN_MARK:
! 		/* Drop .ASAN_MARK internal calls during inlining into
! 		   no_sanitize functions.  */
! 		if (!sanitize_flags_p (SANITIZE_ADDRESS, id->dst_fn)
! 		    && !sanitize_flags_p (SANITIZE_HWADDRESS, id->dst_fn))
! 		  {
! 		    gsi_remove (&copy_gsi, false);
! 		    continue;
! 		  }
! 		break;
! 	      default:
! 		break;
! 	      }
  
  	  /* Statements produced by inlining can be unfolded, especially
  	     when we constant propagated some operands.  We can't fold
*************** redirect_all_calls (copy_body_data * id,
*** 2992,3015 ****
        gimple *stmt = gsi_stmt (si);
        if (is_gimple_call (stmt))
  	{
- 	  tree old_lhs = gimple_call_lhs (stmt);
  	  struct cgraph_edge *edge = id->dst_node->get_edge (stmt);
  	  if (edge)
  	    {
! 	      gimple *new_stmt
! 		= cgraph_edge::redirect_call_stmt_to_callee (edge);
! 	      /* If IPA-SRA transformation, run as part of edge redirection,
! 		 removed the LHS because it is unused, save it to
! 		 killed_new_ssa_names so that we can prune it from debug
! 		 statements.  */
! 	      if (old_lhs
! 		  && TREE_CODE (old_lhs) == SSA_NAME
! 		  && !gimple_call_lhs (new_stmt))
! 		{
! 		  if (!id->killed_new_ssa_names)
! 		    id->killed_new_ssa_names = new hash_set<tree> (16);
! 		  id->killed_new_ssa_names->add (old_lhs);
! 		}
  
  	      if (stmt == last && id->call_stmt && maybe_clean_eh_stmt (stmt))
  		gimple_purge_dead_eh_edges (bb);
--- 3006,3018 ----
        gimple *stmt = gsi_stmt (si);
        if (is_gimple_call (stmt))
  	{
  	  struct cgraph_edge *edge = id->dst_node->get_edge (stmt);
  	  if (edge)
  	    {
! 	      if (!id->killed_new_ssa_names)
! 		id->killed_new_ssa_names = new hash_set<tree> (16);
! 	      cgraph_edge::redirect_call_stmt_to_callee (edge,
! 		id->killed_new_ssa_names);
  
  	      if (stmt == last && id->call_stmt && maybe_clean_eh_stmt (stmt))
  		gimple_purge_dead_eh_edges (bb);
*************** copy_body (copy_body_data *id,
*** 3336,3343 ****
    body = copy_cfg_body (id, entry_block_map, exit_block_map,
  			new_entry);
    copy_debug_stmts (id);
!   delete id->killed_new_ssa_names;
!   id->killed_new_ssa_names = NULL;
  
    return body;
  }
--- 3339,3350 ----
    body = copy_cfg_body (id, entry_block_map, exit_block_map,
  			new_entry);
    copy_debug_stmts (id);
!   if (id->killed_new_ssa_names)
!     {
!       ipa_release_ssas_in_hash (id->killed_new_ssa_names);
!       delete id->killed_new_ssa_names;
!       id->killed_new_ssa_names = NULL;
!     }
  
    return body;
  }
diff -Nrcpad gcc-12.3.0/gcc/tree-into-ssa.cc gcc-12.4.0/gcc/tree-into-ssa.cc
*** gcc-12.3.0/gcc/tree-into-ssa.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-into-ssa.cc	Thu Jun 20 08:08:09 2024
*************** rewrite_update_phi_arguments (basic_bloc
*** 2107,2113 ****
  		 symbol we may find NULL arguments.  That's why we
  		 take the symbol from the LHS of the PHI node.  */
  	      reaching_def = get_reaching_def (lhs_sym);
- 
  	    }
  	  else
  	    {
--- 2107,2112 ----
*************** rewrite_update_phi_arguments (basic_bloc
*** 2119,2126 ****
  		reaching_def = get_reaching_def (arg);
  	    }
  
!           /* Update the argument if there is a reaching def.  */
! 	  if (reaching_def)
  	    {
  	      location_t locus;
  	      int arg_i = PHI_ARG_INDEX_FROM_USE (arg_p);
--- 2118,2126 ----
  		reaching_def = get_reaching_def (arg);
  	    }
  
! 	  /* Update the argument if there is a reaching def different
! 	     from arg.  */
! 	  if (reaching_def && reaching_def != arg)
  	    {
  	      location_t locus;
  	      int arg_i = PHI_ARG_INDEX_FROM_USE (arg_p);
*************** rewrite_update_phi_arguments (basic_bloc
*** 2130,2135 ****
--- 2130,2139 ----
  	      /* Virtual operands do not need a location.  */
  	      if (virtual_operand_p (reaching_def))
  		locus = UNKNOWN_LOCATION;
+ 	      /* If SSA update didn't insert this PHI the argument
+ 		 might have a location already, keep that.  */
+ 	      else if (gimple_phi_arg_has_location (phi, arg_i))
+ 		locus = gimple_phi_arg_location (phi, arg_i);
  	      else
  		{
  		  gimple *stmt = SSA_NAME_DEF_STMT (reaching_def);
*************** rewrite_update_phi_arguments (basic_bloc
*** 2147,2153 ****
  	      gimple_phi_arg_set_location (phi, arg_i, locus);
  	    }
  
- 
  	  if (e->flags & EDGE_ABNORMAL)
  	    SSA_NAME_OCCURS_IN_ABNORMAL_PHI (USE_FROM_PTR (arg_p)) = 1;
  	}
--- 2151,2156 ----
diff -Nrcpad gcc-12.3.0/gcc/tree-loop-distribution.cc gcc-12.4.0/gcc/tree-loop-distribution.cc
*** gcc-12.3.0/gcc/tree-loop-distribution.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-loop-distribution.cc	Thu Jun 20 08:08:09 2024
*************** loop_distribution::pg_add_dependence_edg
*** 2117,2125 ****
  	    }
  	  else if (DDR_ARE_DEPENDENT (ddr) == NULL_TREE)
  	    {
- 	      if (DDR_REVERSED_P (ddr))
- 		this_dir = -this_dir;
- 
  	      /* Known dependences can still be unordered througout the
  		 iteration space, see gcc.dg/tree-ssa/ldist-16.c and
  		 gcc.dg/tree-ssa/pr94969.c.  */
--- 2117,2122 ----
*************** loop_distribution::pg_add_dependence_edg
*** 2132,2138 ****
  	      /* Else as the distance vector is lexicographic positive swap
  		 the dependence direction.  */
  	      else
! 		this_dir = -this_dir;
  	    }
  	  else
  	    this_dir = 0;
--- 2129,2148 ----
  	      /* Else as the distance vector is lexicographic positive swap
  		 the dependence direction.  */
  	      else
! 		{
! 		  if (DDR_REVERSED_P (ddr))
! 		    this_dir = -this_dir;
! 		  this_dir = -this_dir;
! 
! 		  /* When then dependence distance of the innermost common
! 		     loop of the DRs is zero we have a conflict.  */
! 		  auto l1 = gimple_bb (DR_STMT (dr1))->loop_father;
! 		  auto l2 = gimple_bb (DR_STMT (dr2))->loop_father;
! 		  int idx = index_in_loop_nest (find_common_loop (l1, l2)->num,
! 						DDR_LOOP_NEST (ddr));
! 		  if (DDR_DIST_VECT (ddr, 0)[idx] == 0)
! 		    this_dir = 2;
! 		}
  	    }
  	  else
  	    this_dir = 0;
diff -Nrcpad gcc-12.3.0/gcc/tree-nested.cc gcc-12.4.0/gcc/tree-nested.cc
*** gcc-12.3.0/gcc/tree-nested.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-nested.cc	Thu Jun 20 08:08:09 2024
*************** get_frame_field (struct nesting_info *in
*** 1039,1044 ****
--- 1039,1075 ----
  
  static void note_nonlocal_vla_type (struct nesting_info *info, tree type);
  
+ /* Helper for get_nonlocal_debug_decl and get_local_debug_decl.  */
+ 
+ static tree
+ get_debug_decl (tree decl)
+ {
+   tree new_decl
+     = build_decl (DECL_SOURCE_LOCATION (decl),
+ 		  VAR_DECL, DECL_NAME (decl), TREE_TYPE (decl));
+   DECL_ARTIFICIAL (new_decl) = DECL_ARTIFICIAL (decl);
+   DECL_IGNORED_P (new_decl) = DECL_IGNORED_P (decl);
+   TREE_THIS_VOLATILE (new_decl) = TREE_THIS_VOLATILE (decl);
+   TREE_SIDE_EFFECTS (new_decl) = TREE_SIDE_EFFECTS (decl);
+   TREE_READONLY (new_decl) = TREE_READONLY (decl);
+   TREE_ADDRESSABLE (new_decl) = TREE_ADDRESSABLE (decl);
+   DECL_SEEN_IN_BIND_EXPR_P (new_decl) = 1;
+   if ((TREE_CODE (decl) == PARM_DECL
+        || TREE_CODE (decl) == RESULT_DECL
+        || VAR_P (decl))
+       && DECL_BY_REFERENCE (decl))
+     DECL_BY_REFERENCE (new_decl) = 1;
+   /* Copy DECL_LANG_SPECIFIC and DECL_LANG_FLAG_* for OpenMP langhook
+      purposes.  */
+   DECL_LANG_SPECIFIC (new_decl) = DECL_LANG_SPECIFIC (decl);
+ #define COPY_DLF(n) DECL_LANG_FLAG_##n (new_decl) = DECL_LANG_FLAG_##n (decl)
+   COPY_DLF (0); COPY_DLF (1); COPY_DLF (2); COPY_DLF (3);
+   COPY_DLF (4); COPY_DLF (5); COPY_DLF (6); COPY_DLF (7);
+   COPY_DLF (8);
+ #undef COPY_DLF
+   return new_decl;
+ }
+ 
  /* A subroutine of convert_nonlocal_reference_op.  Create a local variable
     in the nested function with DECL_VALUE_EXPR set to reference the true
     variable in the parent function.  This is used both for debug info
*************** get_nonlocal_debug_decl (struct nesting_
*** 1086,1106 ****
      x = build_simple_mem_ref_notrap (x);
  
    /* ??? We should be remapping types as well, surely.  */
!   new_decl = build_decl (DECL_SOURCE_LOCATION (decl),
! 			 VAR_DECL, DECL_NAME (decl), TREE_TYPE (decl));
    DECL_CONTEXT (new_decl) = info->context;
-   DECL_ARTIFICIAL (new_decl) = DECL_ARTIFICIAL (decl);
-   DECL_IGNORED_P (new_decl) = DECL_IGNORED_P (decl);
-   TREE_THIS_VOLATILE (new_decl) = TREE_THIS_VOLATILE (decl);
-   TREE_SIDE_EFFECTS (new_decl) = TREE_SIDE_EFFECTS (decl);
-   TREE_READONLY (new_decl) = TREE_READONLY (decl);
-   TREE_ADDRESSABLE (new_decl) = TREE_ADDRESSABLE (decl);
-   DECL_SEEN_IN_BIND_EXPR_P (new_decl) = 1;
-   if ((TREE_CODE (decl) == PARM_DECL
-        || TREE_CODE (decl) == RESULT_DECL
-        || VAR_P (decl))
-       && DECL_BY_REFERENCE (decl))
-     DECL_BY_REFERENCE (new_decl) = 1;
  
    SET_DECL_VALUE_EXPR (new_decl, x);
    DECL_HAS_VALUE_EXPR_P (new_decl) = 1;
--- 1117,1124 ----
      x = build_simple_mem_ref_notrap (x);
  
    /* ??? We should be remapping types as well, surely.  */
!   new_decl = get_debug_decl (decl);
    DECL_CONTEXT (new_decl) = info->context;
  
    SET_DECL_VALUE_EXPR (new_decl, x);
    DECL_HAS_VALUE_EXPR_P (new_decl) = 1;
*************** get_local_debug_decl (struct nesting_inf
*** 1881,1901 ****
    x = info->frame_decl;
    x = build3 (COMPONENT_REF, TREE_TYPE (field), x, field, NULL_TREE);
  
!   new_decl = build_decl (DECL_SOURCE_LOCATION (decl),
! 			 VAR_DECL, DECL_NAME (decl), TREE_TYPE (decl));
    DECL_CONTEXT (new_decl) = info->context;
-   DECL_ARTIFICIAL (new_decl) = DECL_ARTIFICIAL (decl);
-   DECL_IGNORED_P (new_decl) = DECL_IGNORED_P (decl);
-   TREE_THIS_VOLATILE (new_decl) = TREE_THIS_VOLATILE (decl);
-   TREE_SIDE_EFFECTS (new_decl) = TREE_SIDE_EFFECTS (decl);
-   TREE_READONLY (new_decl) = TREE_READONLY (decl);
-   TREE_ADDRESSABLE (new_decl) = TREE_ADDRESSABLE (decl);
-   DECL_SEEN_IN_BIND_EXPR_P (new_decl) = 1;
-   if ((TREE_CODE (decl) == PARM_DECL
-        || TREE_CODE (decl) == RESULT_DECL
-        || VAR_P (decl))
-       && DECL_BY_REFERENCE (decl))
-     DECL_BY_REFERENCE (new_decl) = 1;
  
    SET_DECL_VALUE_EXPR (new_decl, x);
    DECL_HAS_VALUE_EXPR_P (new_decl) = 1;
--- 1899,1906 ----
    x = info->frame_decl;
    x = build3 (COMPONENT_REF, TREE_TYPE (field), x, field, NULL_TREE);
  
!   new_decl = get_debug_decl (decl);
    DECL_CONTEXT (new_decl) = info->context;
  
    SET_DECL_VALUE_EXPR (new_decl, x);
    DECL_HAS_VALUE_EXPR_P (new_decl) = 1;
diff -Nrcpad gcc-12.3.0/gcc/tree-object-size.cc gcc-12.4.0/gcc/tree-object-size.cc
*** gcc-12.3.0/gcc/tree-object-size.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-object-size.cc	Thu Jun 20 08:08:09 2024
*************** alloc_object_size (const gcall *call, in
*** 771,791 ****
          arg2 = TREE_INT_CST_LOW (TREE_VALUE (TREE_CHAIN (p)))-1;
      }
    else if (gimple_call_builtin_p (call, BUILT_IN_NORMAL)
! 	   && callfn && ALLOCA_FUNCTION_CODE_P (DECL_FUNCTION_CODE (callfn)))
!   arg1 = 0;
  
    /* Non-const arguments are OK here, let the caller handle constness.  */
!   if (arg1 < 0 || arg1 >= (int) gimple_call_num_args (call)
!       || arg2 >= (int) gimple_call_num_args (call))
      return size_unknown (object_size_type);
  
    tree bytes = NULL_TREE;
    if (arg2 >= 0)
!     bytes = size_binop (MULT_EXPR,
! 	fold_convert (sizetype, gimple_call_arg (call, arg1)),
! 	fold_convert (sizetype, gimple_call_arg (call, arg2)));
!   else if (arg1 >= 0)
!     bytes = fold_convert (sizetype, gimple_call_arg (call, arg1));
  
    return bytes ? bytes : size_unknown (object_size_type);
  }
--- 771,803 ----
          arg2 = TREE_INT_CST_LOW (TREE_VALUE (TREE_CHAIN (p)))-1;
      }
    else if (gimple_call_builtin_p (call, BUILT_IN_NORMAL)
! 	   && callfn
! 	   && ALLOCA_FUNCTION_CODE_P (DECL_FUNCTION_CODE (callfn)))
!     arg1 = 0;
  
    /* Non-const arguments are OK here, let the caller handle constness.  */
!   if (arg1 < 0
!       || (unsigned) arg1 >= gimple_call_num_args (call)
!       || (arg2 >= 0 && (unsigned) arg2 >= gimple_call_num_args (call)))
      return size_unknown (object_size_type);
  
+   tree targ1 = gimple_call_arg (call, arg1);
+   if (!INTEGRAL_TYPE_P (TREE_TYPE (targ1))
+       || TYPE_PRECISION (TREE_TYPE (targ1)) > TYPE_PRECISION (sizetype))
+     return size_unknown (object_size_type);
+   targ1 = fold_convert (sizetype, targ1);
    tree bytes = NULL_TREE;
    if (arg2 >= 0)
!     {
!       tree targ2 = gimple_call_arg (call, arg2);
!       if (!INTEGRAL_TYPE_P (TREE_TYPE (targ2))
! 	  || TYPE_PRECISION (TREE_TYPE (targ2)) > TYPE_PRECISION (sizetype))
! 	return size_unknown (object_size_type);
!       targ2 = fold_convert (sizetype, targ2);
!       bytes = size_binop (MULT_EXPR, targ1, targ2);
!     }
!   else
!     bytes = targ1;
  
    return bytes ? bytes : size_unknown (object_size_type);
  }
diff -Nrcpad gcc-12.3.0/gcc/tree-profile.cc gcc-12.4.0/gcc/tree-profile.cc
*** gcc-12.3.0/gcc/tree-profile.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-profile.cc	Thu Jun 20 08:08:09 2024
*************** gimple_gen_ic_func_profiler (void)
*** 418,424 ****
    gcall *stmt1;
    tree tree_uid, cur_func, void0;
  
!   if (c_node->only_called_directly_p ())
      return;
  
    gimple_init_gcov_profiler ();
--- 418,430 ----
    gcall *stmt1;
    tree tree_uid, cur_func, void0;
  
!   /* Disable indirect call profiling for an IFUNC resolver and its
!      callees since it requires TLS which hasn't been set up yet when
!      the dynamic linker is resolving IFUNC symbols.  See
!      https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114115
!    */
!   if (c_node->only_called_directly_p ()
!       || c_node->called_by_ifunc_resolver)
      return;
  
    gimple_init_gcov_profiler ();
diff -Nrcpad gcc-12.3.0/gcc/tree-scalar-evolution.cc gcc-12.4.0/gcc/tree-scalar-evolution.cc
*** gcc-12.3.0/gcc/tree-scalar-evolution.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-scalar-evolution.cc	Thu Jun 20 08:08:09 2024
*************** simple_iv_with_niters (class loop *wrto_
*** 3282,3288 ****
  
    type = TREE_TYPE (iv->base);
    e = TREE_OPERAND (iv->base, 0);
!   if (TREE_CODE (e) != PLUS_EXPR
        || TREE_CODE (TREE_OPERAND (e, 1)) != INTEGER_CST
        || !tree_int_cst_equal (iv->step,
  			      fold_convert (type, TREE_OPERAND (e, 1))))
--- 3282,3289 ----
  
    type = TREE_TYPE (iv->base);
    e = TREE_OPERAND (iv->base, 0);
!   if (!tree_nop_conversion_p (type, TREE_TYPE (e))
!       || TREE_CODE (e) != PLUS_EXPR
        || TREE_CODE (TREE_OPERAND (e, 1)) != INTEGER_CST
        || !tree_int_cst_equal (iv->step,
  			      fold_convert (type, TREE_OPERAND (e, 1))))
diff -Nrcpad gcc-12.3.0/gcc/tree-sra.cc gcc-12.4.0/gcc/tree-sra.cc
*** gcc-12.3.0/gcc/tree-sra.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-sra.cc	Thu Jun 20 08:08:09 2024
*************** scan_function (void)
*** 1413,1427 ****
  		gasm *asm_stmt = as_a <gasm *> (stmt);
  		walk_stmt_load_store_addr_ops (asm_stmt, NULL, NULL, NULL,
  					       asm_visit_addr);
! 		for (i = 0; i < gimple_asm_ninputs (asm_stmt); i++)
  		  {
! 		    t = TREE_VALUE (gimple_asm_input_op (asm_stmt, i));
! 		    ret |= build_access_from_expr (t, asm_stmt, false);
  		  }
! 		for (i = 0; i < gimple_asm_noutputs (asm_stmt); i++)
  		  {
! 		    t = TREE_VALUE (gimple_asm_output_op (asm_stmt, i));
! 		    ret |= build_access_from_expr (t, asm_stmt, true);
  		  }
  	      }
  	      break;
--- 1413,1444 ----
  		gasm *asm_stmt = as_a <gasm *> (stmt);
  		walk_stmt_load_store_addr_ops (asm_stmt, NULL, NULL, NULL,
  					       asm_visit_addr);
! 		if (stmt_ends_bb_p (asm_stmt)
! 		    && !single_succ_p (gimple_bb (asm_stmt)))
  		  {
! 		    for (i = 0; i < gimple_asm_ninputs (asm_stmt); i++)
! 		      {
! 			t = TREE_VALUE (gimple_asm_input_op (asm_stmt, i));
! 			disqualify_base_of_expr (t, "OP of asm goto.");
! 		      }
! 		    for (i = 0; i < gimple_asm_noutputs (asm_stmt); i++)
! 		      {
! 			t = TREE_VALUE (gimple_asm_output_op (asm_stmt, i));
! 			disqualify_base_of_expr (t, "OP of asm goto.");
! 		      }
  		  }
! 		else
  		  {
! 		    for (i = 0; i < gimple_asm_ninputs (asm_stmt); i++)
! 		      {
! 			t = TREE_VALUE (gimple_asm_input_op (asm_stmt, i));
! 			ret |= build_access_from_expr (t, asm_stmt, false);
! 		      }
! 		    for (i = 0; i < gimple_asm_noutputs (asm_stmt); i++)
! 		      {
! 			t = TREE_VALUE (gimple_asm_output_op (asm_stmt, i));
! 			ret |= build_access_from_expr (t, asm_stmt, true);
! 		      }
  		  }
  	      }
  	      break;
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-ccp.cc gcc-12.4.0/gcc/tree-ssa-ccp.cc
*** gcc-12.3.0/gcc/tree-ssa-ccp.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-ccp.cc	Thu Jun 20 08:08:09 2024
*************** bit_value_binop (enum tree_code code, si
*** 1552,1557 ****
--- 1552,1559 ----
  		  *mask = wi::lrotate (r1mask, shift, width);
  		  *val = wi::lrotate (r1val, shift, width);
  		}
+ 	      *mask = wi::ext (*mask, width, sgn);
+ 	      *val = wi::ext (*val, width, sgn);
  	    }
  	}
        else if (wi::ltu_p (r2val | r2mask, width)
*************** bit_value_binop (enum tree_code code, si
*** 1593,1600 ****
  	      /* Accumulate the result.  */
  	      res_mask |= tmp_mask | (res_val ^ tmp_val);
  	    }
! 	  *val = wi::bit_and_not (res_val, res_mask);
! 	  *mask = res_mask;
  	}
        break;
  
--- 1595,1602 ----
  	      /* Accumulate the result.  */
  	      res_mask |= tmp_mask | (res_val ^ tmp_val);
  	    }
! 	  *val = wi::ext (wi::bit_and_not (res_val, res_mask), width, sgn);
! 	  *mask = wi::ext (res_mask, width, sgn);
  	}
        break;
  
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-dse.cc gcc-12.4.0/gcc/tree-ssa-dse.cc
*** gcc-12.3.0/gcc/tree-ssa-dse.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-dse.cc	Thu Jun 20 08:08:09 2024
*************** setup_live_bytes_from_ref (ao_ref *ref,
*** 359,369 ****
    return false;
  }
  
! /* Compute the number of elements that we can trim from the head and
!    tail of ORIG resulting in a bitmap that is a superset of LIVE.
  
!    Store the number of elements trimmed from the head and tail in
!    TRIM_HEAD and TRIM_TAIL.
  
     STMT is the statement being trimmed and is used for debugging dump
     output only.  */
--- 359,369 ----
    return false;
  }
  
! /* Compute the number of stored bytes that we can trim from the head and
!    tail of REF.  LIVE is the bitmap of stores to REF that are still live.
  
!    Store the number of bytes trimmed from the head and tail in TRIM_HEAD
!    and TRIM_TAIL respectively.
  
     STMT is the statement being trimmed and is used for debugging dump
     output only.  */
*************** static void
*** 372,381 ****
  compute_trims (ao_ref *ref, sbitmap live, int *trim_head, int *trim_tail,
  	       gimple *stmt)
  {
!   /* We use sbitmaps biased such that ref->offset is bit zero and the bitmap
!      extends through ref->size.  So we know that in the original bitmap
!      bits 0..ref->size were true.  We don't actually need the bitmap, just
!      the REF to compute the trims.  */
  
    /* Now identify how much, if any of the tail we can chop off.  */
    HOST_WIDE_INT const_size;
--- 372,388 ----
  compute_trims (ao_ref *ref, sbitmap live, int *trim_head, int *trim_tail,
  	       gimple *stmt)
  {
!   *trim_head = 0;
!   *trim_tail = 0;
! 
!   /* We use bitmaps biased such that ref->offset is contained in bit zero and
!      the bitmap extends through ref->max_size, so we know that in the original
!      bitmap bits 0 .. ref->max_size were true.  But we need to check that this
!      covers the bytes of REF exactly.  */
!   const unsigned int align = known_alignment (ref->offset);
!   if ((align > 0 && align < BITS_PER_UNIT)
!       || !known_eq (ref->size, ref->max_size))
!     return;
  
    /* Now identify how much, if any of the tail we can chop off.  */
    HOST_WIDE_INT const_size;
*************** compute_trims (ao_ref *ref, sbitmap live
*** 400,407 ****
  			       last_orig) <= 0)
  	*trim_tail = 0;
      }
-   else
-     *trim_tail = 0;
  
    /* Identify how much, if any of the head we can chop off.  */
    int first_orig = 0;
--- 407,412 ----
*************** compute_trims (ao_ref *ref, sbitmap live
*** 459,466 ****
  	}
      }
  
!   if ((*trim_head || *trim_tail)
!       && dump_file && (dump_flags & TDF_DETAILS))
      {
        fprintf (dump_file, "  Trimming statement (head = %d, tail = %d): ",
  	       *trim_head, *trim_tail);
--- 464,470 ----
  	}
      }
  
!   if ((*trim_head || *trim_tail) && dump_file && (dump_flags & TDF_DETAILS))
      {
        fprintf (dump_file, "  Trimming statement (head = %d, tail = %d): ",
  	       *trim_head, *trim_tail);
*************** compute_trims (ao_ref *ref, sbitmap live
*** 469,480 ****
      }
  }
  
! /* STMT initializes an object from COMPLEX_CST where one or more of the
!    bytes written may be dead stores.  REF is a representation of the
!    memory written.  LIVE is the bitmap of stores that are actually live.
  
!    Attempt to rewrite STMT so that only the real or imaginary part of
!    the object is actually stored.  */
  
  static void
  maybe_trim_complex_store (ao_ref *ref, sbitmap live, gimple *stmt)
--- 473,484 ----
      }
  }
  
! /* STMT initializes an object from COMPLEX_CST where one or more of the bytes
!    written may be dead stores.  REF is a representation of the memory written.
!    LIVE is the bitmap of stores to REF that are still live.
  
!    Attempt to rewrite STMT so that only the real or the imaginary part of the
!    object is actually stored.  */
  
  static void
  maybe_trim_complex_store (ao_ref *ref, sbitmap live, gimple *stmt)
*************** maybe_trim_complex_store (ao_ref *ref, s
*** 510,520 ****
  }
  
  /* STMT initializes an object using a CONSTRUCTOR where one or more of the
!    bytes written are dead stores.  ORIG is the bitmap of bytes stored by
!    STMT.  LIVE is the bitmap of stores that are actually live.
  
!    Attempt to rewrite STMT so that only the real or imaginary part of
!    the object is actually stored.
  
     The most common case for getting here is a CONSTRUCTOR with no elements
     being used to zero initialize an object.  We do not try to handle other
--- 514,523 ----
  }
  
  /* STMT initializes an object using a CONSTRUCTOR where one or more of the
!    bytes written are dead stores.  REF is a representation of the memory
!    written.  LIVE is the bitmap of stores to REF that are still live.
  
!    Attempt to rewrite STMT so that it writes fewer memory locations.
  
     The most common case for getting here is a CONSTRUCTOR with no elements
     being used to zero initialize an object.  We do not try to handle other
*************** maybe_trim_memstar_call (ao_ref *ref, sb
*** 736,744 ****
      }
  }
  
! /* STMT is a memory write where one or more bytes written are dead
!    stores.  ORIG is the bitmap of bytes stored by STMT.  LIVE is the
!    bitmap of stores that are actually live.
  
     Attempt to rewrite STMT so that it writes fewer memory locations.  Right
     now we only support trimming at the start or end of the memory region.
--- 739,747 ----
      }
  }
  
! /* STMT is a memory write where one or more bytes written are dead stores.
!    REF is a representation of the memory written.  LIVE is the bitmap of
!    stores to REF that are still live.
  
     Attempt to rewrite STMT so that it writes fewer memory locations.  Right
     now we only support trimming at the start or end of the memory region.
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-ifcombine.cc gcc-12.4.0/gcc/tree-ssa-ifcombine.cc
*** gcc-12.3.0/gcc/tree-ssa-ifcombine.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-ifcombine.cc	Thu Jun 20 08:08:09 2024
*************** ifcombine_ifandif (basic_block inner_con
*** 415,420 ****
--- 415,424 ----
      {
        tree t, t2;
  
+       if (TREE_CODE (name1) == SSA_NAME
+ 	  && SSA_NAME_OCCURS_IN_ABNORMAL_PHI (name1))
+ 	return false;
+ 
        /* Do it.  */
        gsi = gsi_for_stmt (inner_cond);
        t = fold_build2 (LSHIFT_EXPR, TREE_TYPE (name1),
*************** ifcombine_ifandif (basic_block inner_con
*** 465,470 ****
--- 469,480 ----
        gimple_stmt_iterator gsi;
        tree t;
  
+       if ((TREE_CODE (name1) == SSA_NAME
+ 	   && SSA_NAME_OCCURS_IN_ABNORMAL_PHI (name1))
+ 	  || (TREE_CODE (name2) == SSA_NAME
+ 	      && SSA_NAME_OCCURS_IN_ABNORMAL_PHI (name2)))
+ 	return false;
+ 
        /* Find the common name which is bit-tested.  */
        if (name1 == name2)
  	;
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-loop-im.cc gcc-12.4.0/gcc/tree-ssa-loop-im.cc
*** gcc-12.3.0/gcc/tree-ssa-loop-im.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-loop-im.cc	Thu Jun 20 08:08:09 2024
*************** gather_mem_refs_stmt (class loop *loop,
*** 1648,1658 ****
  				     unshare_expr (mem_base));
  		  if (TYPE_ALIGN (ref_type) != ref_align)
  		    ref_type = build_aligned_type (ref_type, ref_align);
! 		  (*slot)->mem.ref
  		    = fold_build2 (MEM_REF, ref_type, tmp,
  				   build_int_cst (ref_alias_type, mem_off));
  		  if ((*slot)->mem.volatile_p)
! 		    TREE_THIS_VOLATILE ((*slot)->mem.ref) = 1;
  		  gcc_checking_assert (TREE_CODE ((*slot)->mem.ref) == MEM_REF
  				       && is_gimple_mem_ref_addr
  				            (TREE_OPERAND ((*slot)->mem.ref,
--- 1648,1668 ----
  				     unshare_expr (mem_base));
  		  if (TYPE_ALIGN (ref_type) != ref_align)
  		    ref_type = build_aligned_type (ref_type, ref_align);
! 		  tree new_ref
  		    = fold_build2 (MEM_REF, ref_type, tmp,
  				   build_int_cst (ref_alias_type, mem_off));
  		  if ((*slot)->mem.volatile_p)
! 		    TREE_THIS_VOLATILE (new_ref) = 1;
! 		  (*slot)->mem.ref = new_ref;
! 		  /* Make sure the recorded base and offset are consistent
! 		     with the newly built ref.  */
! 		  if (TREE_CODE (TREE_OPERAND (new_ref, 0)) == ADDR_EXPR)
! 		    ;
! 		  else
! 		    {
! 		      (*slot)->mem.base = new_ref;
! 		      (*slot)->mem.offset = 0;
! 		    }
  		  gcc_checking_assert (TREE_CODE ((*slot)->mem.ref) == MEM_REF
  				       && is_gimple_mem_ref_addr
  				            (TREE_OPERAND ((*slot)->mem.ref,
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-loop-ivcanon.cc gcc-12.4.0/gcc/tree-ssa-loop-ivcanon.cc
*** gcc-12.3.0/gcc/tree-ssa-loop-ivcanon.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-loop-ivcanon.cc	Thu Jun 20 08:08:09 2024
*************** tree_unroll_loops_completely (bool may_i
*** 1487,1501 ****
  	    }
  	  BITMAP_FREE (fathers);
  
  	  /* This will take care of removing completely unrolled loops
  	     from the loop structures so we can continue unrolling now
  	     innermost loops.  */
  	  if (cleanup_tree_cfg ())
  	    update_ssa (TODO_update_ssa_only_virtuals);
  
- 	  /* Clean up the information about numbers of iterations, since
- 	     complete unrolling might have invalidated it.  */
- 	  scev_reset ();
  	  if (flag_checking && loops_state_satisfies_p (LOOP_CLOSED_SSA))
  	    verify_loop_closed_ssa (true);
  	}
--- 1487,1502 ----
  	    }
  	  BITMAP_FREE (fathers);
  
+ 	  /* Clean up the information about numbers of iterations, since
+ 	     complete unrolling might have invalidated it.  */
+ 	  scev_reset ();
+ 
  	  /* This will take care of removing completely unrolled loops
  	     from the loop structures so we can continue unrolling now
  	     innermost loops.  */
  	  if (cleanup_tree_cfg ())
  	    update_ssa (TODO_update_ssa_only_virtuals);
  
  	  if (flag_checking && loops_state_satisfies_p (LOOP_CLOSED_SSA))
  	    verify_loop_closed_ssa (true);
  	}
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-loop-ivopts.cc gcc-12.4.0/gcc/tree-ssa-loop-ivopts.cc
*** gcc-12.3.0/gcc/tree-ssa-loop-ivopts.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-loop-ivopts.cc	Thu Jun 20 08:08:09 2024
*************** rewrite_use_address (struct ivopts_data
*** 7616,7622 ****
  				      true, GSI_SAME_STMT);
      }
    else
!     copy_ref_info (ref, *use->op_p);
  
    *use->op_p = ref;
  }
--- 7616,7637 ----
  				      true, GSI_SAME_STMT);
      }
    else
!     {
!       /* When we end up confused enough and have no suitable base but
! 	 stuffed everything to index2 use a LEA for the address and
! 	 create a plain MEM_REF to avoid basing a memory reference
! 	 on address zero which create_mem_ref_raw does as fallback.  */
!       if (TREE_CODE (ref) == TARGET_MEM_REF
! 	  && TMR_INDEX2 (ref) != NULL_TREE
! 	  && integer_zerop (TREE_OPERAND (ref, 0)))
! 	{
! 	  ref = fold_build1 (ADDR_EXPR, TREE_TYPE (TREE_OPERAND (ref, 0)), ref);
! 	  ref = force_gimple_operand_gsi (&bsi, ref, true, NULL_TREE,
! 					  true, GSI_SAME_STMT);
! 	  ref = build2 (MEM_REF, type, ref, build_zero_cst (alias_ptr_type));
! 	}
!       copy_ref_info (ref, *use->op_p);
!     }
  
    *use->op_p = ref;
  }
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-loop-prefetch.cc gcc-12.4.0/gcc/tree-ssa-loop-prefetch.cc
*** gcc-12.3.0/gcc/tree-ssa-loop-prefetch.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-loop-prefetch.cc	Thu Jun 20 08:08:09 2024
*************** is_miss_rate_acceptable (unsigned HOST_W
*** 739,744 ****
--- 739,746 ----
    if (delta >= (HOST_WIDE_INT) cache_line_size)
      return false;
  
+   gcc_assert (align_unit > 0);
+ 
    miss_positions = 0;
    total_positions = (cache_line_size / align_unit) * distinct_iters;
    max_allowed_miss_positions = (ACCEPTABLE_MISS_RATE * total_positions) / 1000;
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-loop-unswitch.cc gcc-12.4.0/gcc/tree-ssa-loop-unswitch.cc
*** gcc-12.3.0/gcc/tree-ssa-loop-unswitch.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-loop-unswitch.cc	Thu Jun 20 08:08:09 2024
*************** hoist_guard (class loop *loop, edge guar
*** 839,848 ****
    cond_stmt = as_a <gcond *> (stmt);
    extract_true_false_edges_from_block (guard_bb, &te, &fe);
    /* Insert guard to PRE_HEADER.  */
!   if (!empty_block_p (pre_header))
!     gsi = gsi_last_bb (pre_header);
!   else
!     gsi = gsi_start_bb (pre_header);
    /* Create copy of COND_STMT.  */
    new_cond_stmt = gimple_build_cond (gimple_cond_code (cond_stmt),
  				     gimple_cond_lhs (cond_stmt),
--- 839,845 ----
    cond_stmt = as_a <gcond *> (stmt);
    extract_true_false_edges_from_block (guard_bb, &te, &fe);
    /* Insert guard to PRE_HEADER.  */
!   gsi = gsi_last_bb (pre_header);
    /* Create copy of COND_STMT.  */
    new_cond_stmt = gimple_build_cond (gimple_cond_code (cond_stmt),
  				     gimple_cond_lhs (cond_stmt),
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-math-opts.cc gcc-12.4.0/gcc/tree-ssa-math-opts.cc
*** gcc-12.3.0/gcc/tree-ssa-math-opts.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-math-opts.cc	Thu Jun 20 08:08:09 2024
*************** convert_mult_to_widen (gimple *stmt, gim
*** 2681,2686 ****
--- 2681,2694 ----
    if (!is_widening_mult_p (stmt, &type1, &rhs1, &type2, &rhs2))
      return false;
  
+   /* if any one of rhs1 and rhs2 is subject to abnormal coalescing,
+      avoid the tranform. */
+   if ((TREE_CODE (rhs1) == SSA_NAME
+        && SSA_NAME_OCCURS_IN_ABNORMAL_PHI (rhs1))
+       || (TREE_CODE (rhs2) == SSA_NAME
+ 	  && SSA_NAME_OCCURS_IN_ABNORMAL_PHI (rhs2)))
+     return false;
+ 
    to_mode = SCALAR_INT_TYPE_MODE (type);
    from_mode = SCALAR_INT_TYPE_MODE (type1);
    if (to_mode == from_mode)
*************** convert_plusminus_to_widen (gimple_stmt_
*** 2794,2801 ****
  
    lhs = gimple_assign_lhs (stmt);
    type = TREE_TYPE (lhs);
!   if (TREE_CODE (type) != INTEGER_TYPE
!       && TREE_CODE (type) != FIXED_POINT_TYPE)
      return false;
  
    if (code == MINUS_EXPR)
--- 2802,2810 ----
  
    lhs = gimple_assign_lhs (stmt);
    type = TREE_TYPE (lhs);
!   if ((TREE_CODE (type) != INTEGER_TYPE
!        && TREE_CODE (type) != FIXED_POINT_TYPE)
!       || !type_has_mode_precision_p (type))
      return false;
  
    if (code == MINUS_EXPR)
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-phiopt.cc gcc-12.4.0/gcc/tree-ssa-phiopt.cc
*** gcc-12.3.0/gcc/tree-ssa-phiopt.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-phiopt.cc	Thu Jun 20 08:08:09 2024
*************** minmax_replacement (basic_block cond_bb,
*** 1973,1978 ****
--- 1973,1982 ----
  	  || gimple_code (assign) != GIMPLE_ASSIGN)
  	return false;
  
+       /* There cannot be any phi nodes in the middle bb. */
+       if (!gimple_seq_empty_p (phi_nodes (middle_bb)))
+ 	return false;
+ 
        lhs = gimple_assign_lhs (assign);
        ass_code = gimple_assign_rhs_code (assign);
        if (ass_code != MAX_EXPR && ass_code != MIN_EXPR)
*************** minmax_replacement (basic_block cond_bb,
*** 2014,2020 ****
  
  	      /* We need BOUND <= LARGER.  */
  	      if (!integer_nonzerop (fold_build2 (LE_EXPR, boolean_type_node,
! 						  bound, larger)))
  		return false;
  	    }
  	  else if (operand_equal_for_phi_arg_p (arg_false, smaller)
--- 2018,2024 ----
  
  	      /* We need BOUND <= LARGER.  */
  	      if (!integer_nonzerop (fold_build2 (LE_EXPR, boolean_type_node,
! 						  bound, arg_false)))
  		return false;
  	    }
  	  else if (operand_equal_for_phi_arg_p (arg_false, smaller)
*************** minmax_replacement (basic_block cond_bb,
*** 2045,2051 ****
  
  	      /* We need BOUND >= SMALLER.  */
  	      if (!integer_nonzerop (fold_build2 (GE_EXPR, boolean_type_node,
! 						  bound, smaller)))
  		return false;
  	    }
  	  else
--- 2049,2055 ----
  
  	      /* We need BOUND >= SMALLER.  */
  	      if (!integer_nonzerop (fold_build2 (GE_EXPR, boolean_type_node,
! 						  bound, arg_false)))
  		return false;
  	    }
  	  else
*************** minmax_replacement (basic_block cond_bb,
*** 2085,2091 ****
  
  	      /* We need BOUND >= LARGER.  */
  	      if (!integer_nonzerop (fold_build2 (GE_EXPR, boolean_type_node,
! 						  bound, larger)))
  		return false;
  	    }
  	  else if (operand_equal_for_phi_arg_p (arg_true, smaller)
--- 2089,2095 ----
  
  	      /* We need BOUND >= LARGER.  */
  	      if (!integer_nonzerop (fold_build2 (GE_EXPR, boolean_type_node,
! 						  bound, arg_true)))
  		return false;
  	    }
  	  else if (operand_equal_for_phi_arg_p (arg_true, smaller)
*************** minmax_replacement (basic_block cond_bb,
*** 2112,2118 ****
  
  	      /* We need BOUND <= SMALLER.  */
  	      if (!integer_nonzerop (fold_build2 (LE_EXPR, boolean_type_node,
! 						  bound, smaller)))
  		return false;
  	    }
  	  else
--- 2116,2122 ----
  
  	      /* We need BOUND <= SMALLER.  */
  	      if (!integer_nonzerop (fold_build2 (LE_EXPR, boolean_type_node,
! 						  bound, arg_true)))
  		return false;
  	    }
  	  else
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-pre.cc gcc-12.4.0/gcc/tree-ssa-pre.cc
*** gcc-12.3.0/gcc/tree-ssa-pre.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-pre.cc	Thu Jun 20 08:08:09 2024
*************** compute_avail (function *fun)
*** 4216,4221 ****
--- 4216,4222 ----
  		      else
  			{
  			  ref->set = 0;
+ 			  ref->base_set = 0;
  			  if (ref1->opcode == MEM_REF)
  			    ref1->op0
  			      = wide_int_to_tree (ptr_type_node,
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-reassoc.cc gcc-12.4.0/gcc/tree-ssa-reassoc.cc
*** gcc-12.3.0/gcc/tree-ssa-reassoc.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-reassoc.cc	Thu Jun 20 08:08:09 2024
*************** undistribute_bitref_for_vector (enum tre
*** 2101,2112 ****
  	{
  	  sum = build_and_add_sum (vec_type, sum_vec,
  				   valid_vecs[i + 1], opcode);
  	  if (!useless_type_conversion_p (vec_type,
  					  TREE_TYPE (valid_vecs[i + 1])))
  	    {
- 	      /* Update the operands only after build_and_add_sum,
- 		 so that we don't have to repeat the placement algorithm
- 		 of build_and_add_sum.  */
  	      gimple_stmt_iterator gsi = gsi_for_stmt (sum);
  	      tree vce = build1 (VIEW_CONVERT_EXPR, vec_type,
  				 valid_vecs[i + 1]);
--- 2101,2124 ----
  	{
  	  sum = build_and_add_sum (vec_type, sum_vec,
  				   valid_vecs[i + 1], opcode);
+ 	  /* Update the operands only after build_and_add_sum,
+ 	     so that we don't have to repeat the placement algorithm
+ 	     of build_and_add_sum.  */
+ 	  if (sum_vec == tvec
+ 	      && !useless_type_conversion_p (vec_type, TREE_TYPE (sum_vec)))
+ 	    {
+ 	      gimple_stmt_iterator gsi = gsi_for_stmt (sum);
+ 	      tree vce = build1 (VIEW_CONVERT_EXPR, vec_type, sum_vec);
+ 	      tree lhs = make_ssa_name (vec_type);
+ 	      gimple *g = gimple_build_assign (lhs, VIEW_CONVERT_EXPR, vce);
+ 	      gimple_set_uid (g, gimple_uid (sum));
+ 	      gsi_insert_before (&gsi, g, GSI_NEW_STMT);
+ 	      gimple_assign_set_rhs1 (sum, lhs);
+ 	      update_stmt (sum);
+ 	    }
  	  if (!useless_type_conversion_p (vec_type,
  					  TREE_TYPE (valid_vecs[i + 1])))
  	    {
  	      gimple_stmt_iterator gsi = gsi_for_stmt (sum);
  	      tree vce = build1 (VIEW_CONVERT_EXPR, vec_type,
  				 valid_vecs[i + 1]);
*************** undistribute_bitref_for_vector (enum tre
*** 2115,2129 ****
  	      gimple_set_uid (g, gimple_uid (sum));
  	      gsi_insert_before (&gsi, g, GSI_NEW_STMT);
  	      gimple_assign_set_rhs2 (sum, lhs);
- 	      if (sum_vec == tvec)
- 		{
- 		  vce = build1 (VIEW_CONVERT_EXPR, vec_type, sum_vec);
- 		  lhs = make_ssa_name (vec_type);
- 		  g = gimple_build_assign (lhs, VIEW_CONVERT_EXPR, vce);
- 		  gimple_set_uid (g, gimple_uid (sum));
- 		  gsi_insert_before (&gsi, g, GSI_NEW_STMT);
- 		  gimple_assign_set_rhs1 (sum, lhs);
- 		}
  	      update_stmt (sum);
  	    }
  	  sum_vec = gimple_get_lhs (sum);
--- 2127,2132 ----
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-strlen.cc gcc-12.4.0/gcc/tree-ssa-strlen.cc
*** gcc-12.3.0/gcc/tree-ssa-strlen.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-strlen.cc	Thu Jun 20 08:08:09 2024
*************** strlen_pass::handle_builtin_memcpy (buil
*** 3361,3367 ****
        && !integer_zerop (len))
      {
        maybe_warn_overflow (stmt, false, len, olddsi, false, true);
!       adjust_last_stmt (olddsi, stmt, false);
      }
  
    int idx = get_stridx (src, stmt);
--- 3361,3368 ----
        && !integer_zerop (len))
      {
        maybe_warn_overflow (stmt, false, len, olddsi, false, true);
!       if (tree_fits_uhwi_p (len))
! 	adjust_last_stmt (olddsi, stmt, false);
      }
  
    int idx = get_stridx (src, stmt);
*************** strlen_pass::handle_store (bool *zero_wr
*** 5007,5012 ****
--- 5008,5016 ----
  
    if (si != NULL)
      {
+       /* The count_nonzero_bytes call above might have unshared si.
+ 	 Fetch it again from the vector.  */
+       si = get_strinfo (idx);
        /* The corresponding element is set to 1 if the first and last
  	 element, respectively, of the sequence of characters being
  	 written over the string described by SI ends before
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-structalias.cc gcc-12.4.0/gcc/tree-ssa-structalias.cc
*** gcc-12.3.0/gcc/tree-ssa-structalias.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-structalias.cc	Thu Jun 20 08:08:09 2024
*************** unify_nodes (constraint_graph_t graph, u
*** 1581,1644 ****
      bitmap_clear_bit (graph->succs[to], to);
  }
  
- /* Information needed to compute the topological ordering of a graph.  */
- 
- struct topo_info
- {
-   /* sbitmap of visited nodes.  */
-   sbitmap visited;
-   /* Array that stores the topological order of the graph, *in
-      reverse*.  */
-   vec<unsigned> topo_order;
- };
- 
- 
- /* Initialize and return a topological info structure.  */
- 
- static struct topo_info *
- init_topo_info (void)
- {
-   size_t size = graph->size;
-   struct topo_info *ti = XNEW (struct topo_info);
-   ti->visited = sbitmap_alloc (size);
-   bitmap_clear (ti->visited);
-   ti->topo_order.create (1);
-   return ti;
- }
- 
- 
- /* Free the topological sort info pointed to by TI.  */
- 
- static void
- free_topo_info (struct topo_info *ti)
- {
-   sbitmap_free (ti->visited);
-   ti->topo_order.release ();
-   free (ti);
- }
- 
- /* Visit the graph in topological order, and store the order in the
-    topo_info structure.  */
- 
- static void
- topo_visit (constraint_graph_t graph, struct topo_info *ti,
- 	    unsigned int n)
- {
-   bitmap_iterator bi;
-   unsigned int j;
- 
-   bitmap_set_bit (ti->visited, n);
- 
-   if (graph->succs[n])
-     EXECUTE_IF_SET_IN_BITMAP (graph->succs[n], 0, j, bi)
-       {
- 	if (!bitmap_bit_p (ti->visited, j))
- 	  topo_visit (graph, ti, j);
-       }
- 
-   ti->topo_order.safe_push (n);
- }
- 
  /* Process a constraint C that represents x = *(y + off), using DELTA as the
     starting solution for y.  */
  
--- 1581,1586 ----
*************** find_indirect_cycles (constraint_graph_t
*** 1913,1931 ****
        scc_visit (graph, &si, i);
  }
  
! /* Compute a topological ordering for GRAPH, and store the result in the
!    topo_info structure TI.  */
  
  static void
! compute_topo_order (constraint_graph_t graph,
! 		    struct topo_info *ti)
  {
    unsigned int i;
    unsigned int size = graph->size;
  
    for (i = 0; i != size; ++i)
!     if (!bitmap_bit_p (ti->visited, i) && find (i) == i)
!       topo_visit (graph, ti, i);
  }
  
  /* Structure used to for hash value numbering of pointer equivalence
--- 1855,1910 ----
        scc_visit (graph, &si, i);
  }
  
! /* Visit the graph in topological order starting at node N, and store the
!    order in TOPO_ORDER using VISITED to indicate visited nodes.  */
  
  static void
! topo_visit (constraint_graph_t graph, vec<unsigned> &topo_order,
! 	    sbitmap visited, unsigned int n)
! {
!   bitmap_iterator bi;
!   unsigned int j;
! 
!   bitmap_set_bit (visited, n);
! 
!   if (graph->succs[n])
!     EXECUTE_IF_SET_IN_BITMAP (graph->succs[n], 0, j, bi)
!       {
! 	unsigned k = find (j);
! 	if (!bitmap_bit_p (visited, k))
! 	  topo_visit (graph, topo_order, visited, k);
!       }
! 
!   topo_order.quick_push (n);
! }
! 
! /* Compute a topological ordering for GRAPH, and return the result.  */
! 
! static auto_vec<unsigned>
! compute_topo_order (constraint_graph_t graph)
  {
    unsigned int i;
    unsigned int size = graph->size;
  
+   auto_sbitmap visited (size);
+   bitmap_clear (visited);
+ 
+   /* For the heuristic in add_graph_edge to work optimally make sure to
+      first visit the connected component of the graph containing
+      ESCAPED.  Do this by extracting the connected component
+      with ESCAPED and append that to all other components as solve_graph
+      pops from the order.  */
+   auto_vec<unsigned> tail (size);
+   topo_visit (graph, tail, visited, find (escaped_id));
+ 
+   auto_vec<unsigned> topo_order (size);
+ 
    for (i = 0; i != size; ++i)
!     if (!bitmap_bit_p (visited, i) && find (i) == i)
!       topo_visit (graph, topo_order, visited, i);
! 
!   topo_order.splice (tail);
!   return topo_order;
  }
  
  /* Structure used to for hash value numbering of pointer equivalence
*************** solve_graph (constraint_graph_t graph)
*** 2753,2769 ****
    while (!bitmap_empty_p (changed))
      {
        unsigned int i;
-       struct topo_info *ti = init_topo_info ();
        stats.iterations++;
  
        bitmap_obstack_initialize (&iteration_obstack);
  
!       compute_topo_order (graph, ti);
! 
!       while (ti->topo_order.length () != 0)
  	{
! 
! 	  i = ti->topo_order.pop ();
  
  	  /* If this variable is not a representative, skip it.  */
  	  if (find (i) != i)
--- 2732,2745 ----
    while (!bitmap_empty_p (changed))
      {
        unsigned int i;
        stats.iterations++;
  
        bitmap_obstack_initialize (&iteration_obstack);
  
!       auto_vec<unsigned> topo_order = compute_topo_order (graph);
!       while (topo_order.length () != 0)
  	{
! 	  i = topo_order.pop ();
  
  	  /* If this variable is not a representative, skip it.  */
  	  if (find (i) != i)
*************** solve_graph (constraint_graph_t graph)
*** 2888,2894 ****
  		}
  	    }
  	}
-       free_topo_info (ti);
        bitmap_obstack_release (&iteration_obstack);
      }
  
--- 2864,2869 ----
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-tail-merge.cc gcc-12.4.0/gcc/tree-ssa-tail-merge.cc
*** gcc-12.3.0/gcc/tree-ssa-tail-merge.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-tail-merge.cc	Thu Jun 20 08:08:09 2024
*************** gimple_equal_p (same_succ *same_succ, gi
*** 1165,1170 ****
--- 1165,1173 ----
        return operand_equal_p (lhs1, lhs2, 0);
  
      case GIMPLE_ASSIGN:
+       if (gimple_assign_rhs_code (s1) != gimple_assign_rhs_code (s2))
+ 	return false;
+ 
        lhs1 = gimple_get_lhs (s1);
        lhs2 = gimple_get_lhs (s2);
        if (TREE_CODE (lhs1) != SSA_NAME
*************** gimple_equal_p (same_succ *same_succ, gi
*** 1172,1182 ****
  	return (operand_equal_p (lhs1, lhs2, 0)
  		&& gimple_operand_equal_value_p (gimple_assign_rhs1 (s1),
  						 gimple_assign_rhs1 (s2)));
!       else if (TREE_CODE (lhs1) == SSA_NAME
! 	       && TREE_CODE (lhs2) == SSA_NAME)
! 	return operand_equal_p (gimple_assign_rhs1 (s1),
! 				gimple_assign_rhs1 (s2), 0);
!       return false;
  
      case GIMPLE_COND:
        t1 = gimple_cond_lhs (s1);
--- 1175,1194 ----
  	return (operand_equal_p (lhs1, lhs2, 0)
  		&& gimple_operand_equal_value_p (gimple_assign_rhs1 (s1),
  						 gimple_assign_rhs1 (s2)));
! 
!       if (TREE_CODE (lhs1) != SSA_NAME
! 	  || TREE_CODE (lhs2) != SSA_NAME)
! 	return false;
! 
!       gcc_checking_assert (gimple_num_args (s1) == gimple_num_args (s2));
!       for (i = 0; i < gimple_num_args (s1); ++i)
! 	{
! 	  t1 = gimple_arg (s1, i);
! 	  t2 = gimple_arg (s2, i);
! 	  if (!gimple_operand_equal_value_p (t1, t2))
! 	    return false;
! 	}
!       return true;
  
      case GIMPLE_COND:
        t1 = gimple_cond_lhs (s1);
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa.cc gcc-12.4.0/gcc/tree-ssa.cc
*** gcc-12.3.0/gcc/tree-ssa.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa.cc	Thu Jun 20 08:08:09 2024
*************** maybe_optimize_var (tree var, bitmap add
*** 1790,1804 ****
  	  maybe_reg = true;
  	  DECL_NOT_GIMPLE_REG_P (var) = 0;
  	}
!       if (maybe_reg && is_gimple_reg (var))
  	{
! 	  if (dump_file)
  	    {
! 	      fprintf (dump_file, "Now a gimple register: ");
! 	      print_generic_expr (dump_file, var);
! 	      fprintf (dump_file, "\n");
  	    }
! 	  bitmap_set_bit (suitable_for_renaming, DECL_UID (var));
  	}
      }
  }
--- 1790,1809 ----
  	  maybe_reg = true;
  	  DECL_NOT_GIMPLE_REG_P (var) = 0;
  	}
!       if (maybe_reg)
  	{
! 	  if (is_gimple_reg (var))
  	    {
! 	      if (dump_file)
! 		{
! 		  fprintf (dump_file, "Now a gimple register: ");
! 		  print_generic_expr (dump_file, var);
! 		  fprintf (dump_file, "\n");
! 		}
! 	      bitmap_set_bit (suitable_for_renaming, DECL_UID (var));
  	    }
! 	  else
! 	    DECL_NOT_GIMPLE_REG_P (var) = 1;
  	}
      }
  }
diff -Nrcpad gcc-12.3.0/gcc/tree-vect-data-refs.cc gcc-12.4.0/gcc/tree-vect-data-refs.cc
*** gcc-12.3.0/gcc/tree-vect-data-refs.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-vect-data-refs.cc	Thu Jun 20 08:08:09 2024
*************** vect_slp_analyze_data_ref_dependence (ve
*** 672,829 ****
  }
  
  
! /* Analyze dependences involved in the transform of SLP NODE.  STORES
!    contain the vector of scalar stores of this instance if we are
!    disambiguating the loads.  */
  
  static bool
! vect_slp_analyze_node_dependences (vec_info *vinfo, slp_tree node,
! 				   vec<stmt_vec_info> stores,
! 				   stmt_vec_info last_store_info)
  {
!   /* This walks over all stmts involved in the SLP load/store done
       in NODE verifying we can sink them up to the last stmt in the
       group.  */
!   if (DR_IS_WRITE (STMT_VINFO_DATA_REF (SLP_TREE_REPRESENTATIVE (node))))
      {
!       stmt_vec_info last_access_info = vect_find_last_scalar_stmt_in_slp (node);
!       for (unsigned k = 0; k < SLP_TREE_SCALAR_STMTS (node).length (); ++k)
  	{
! 	  stmt_vec_info access_info
! 	    = vect_orig_stmt (SLP_TREE_SCALAR_STMTS (node)[k]);
! 	  if (access_info == last_access_info)
  	    continue;
- 	  data_reference *dr_a = STMT_VINFO_DATA_REF (access_info);
- 	  ao_ref ref;
- 	  bool ref_initialized_p = false;
- 	  for (gimple_stmt_iterator gsi = gsi_for_stmt (access_info->stmt);
- 	       gsi_stmt (gsi) != last_access_info->stmt; gsi_next (&gsi))
- 	    {
- 	      gimple *stmt = gsi_stmt (gsi);
- 	      if (! gimple_vuse (stmt))
- 		continue;
- 
- 	      /* If we couldn't record a (single) data reference for this
- 		 stmt we have to resort to the alias oracle.  */
- 	      stmt_vec_info stmt_info = vinfo->lookup_stmt (stmt);
- 	      data_reference *dr_b = STMT_VINFO_DATA_REF (stmt_info);
- 	      if (!dr_b)
- 		{
- 		  /* We are moving a store - this means
- 		     we cannot use TBAA for disambiguation.  */
- 		  if (!ref_initialized_p)
- 		    ao_ref_init (&ref, DR_REF (dr_a));
- 		  if (stmt_may_clobber_ref_p_1 (stmt, &ref, false)
- 		      || ref_maybe_used_by_stmt_p (stmt, &ref, false))
- 		    return false;
- 		  continue;
- 		}
  
! 	      bool dependent = false;
! 	      /* If we run into a store of this same instance (we've just
! 		 marked those) then delay dependence checking until we run
! 		 into the last store because this is where it will have
! 		 been sunk to (and we verify if we can do that as well).  */
! 	      if (gimple_visited_p (stmt))
! 		{
! 		  if (stmt_info != last_store_info)
! 		    continue;
! 
! 		  for (stmt_vec_info &store_info : stores)
! 		    {
! 		      data_reference *store_dr
! 			= STMT_VINFO_DATA_REF (store_info);
! 		      ddr_p ddr = initialize_data_dependence_relation
! 				    (dr_a, store_dr, vNULL);
! 		      dependent
! 			= vect_slp_analyze_data_ref_dependence (vinfo, ddr);
! 		      free_dependence_relation (ddr);
! 		      if (dependent)
! 			break;
! 		    }
! 		}
! 	      else
! 		{
! 		  ddr_p ddr = initialize_data_dependence_relation (dr_a,
! 								   dr_b, vNULL);
! 		  dependent = vect_slp_analyze_data_ref_dependence (vinfo, ddr);
! 		  free_dependence_relation (ddr);
! 		}
! 	      if (dependent)
  		return false;
  	    }
  	}
      }
!   else /* DR_IS_READ */
      {
!       stmt_vec_info first_access_info
! 	= vect_find_first_scalar_stmt_in_slp (node);
!       for (unsigned k = 0; k < SLP_TREE_SCALAR_STMTS (node).length (); ++k)
  	{
! 	  stmt_vec_info access_info
! 	    = vect_orig_stmt (SLP_TREE_SCALAR_STMTS (node)[k]);
! 	  if (access_info == first_access_info)
  	    continue;
! 	  data_reference *dr_a = STMT_VINFO_DATA_REF (access_info);
! 	  ao_ref ref;
! 	  bool ref_initialized_p = false;
! 	  for (gimple_stmt_iterator gsi = gsi_for_stmt (access_info->stmt);
! 	       gsi_stmt (gsi) != first_access_info->stmt; gsi_prev (&gsi))
  	    {
! 	      gimple *stmt = gsi_stmt (gsi);
! 	      if (! gimple_vdef (stmt))
  		continue;
  
! 	      /* If we couldn't record a (single) data reference for this
! 		 stmt we have to resort to the alias oracle.  */
! 	      stmt_vec_info stmt_info = vinfo->lookup_stmt (stmt);
! 	      data_reference *dr_b = STMT_VINFO_DATA_REF (stmt_info);
  
! 	      /* We are hoisting a load - this means we can use
! 		 TBAA for disambiguation.  */
  	      if (!ref_initialized_p)
  		ao_ref_init (&ref, DR_REF (dr_a));
! 	      if (stmt_may_clobber_ref_p_1 (stmt, &ref, true))
  		{
  		  if (!dr_b)
  		    return false;
- 		  /* Resort to dependence checking below.  */
- 		}
- 	      else
- 		/* No dependence.  */
- 		continue;
- 
- 	      bool dependent = false;
- 	      /* If we run into a store of this same instance (we've just
- 		 marked those) then delay dependence checking until we run
- 		 into the last store because this is where it will have
- 		 been sunk to (and we verify if we can do that as well).  */
- 	      if (gimple_visited_p (stmt))
- 		{
- 		  if (stmt_info != last_store_info)
- 		    continue;
- 
- 		  for (stmt_vec_info &store_info : stores)
- 		    {
- 		      data_reference *store_dr
- 			= STMT_VINFO_DATA_REF (store_info);
- 		      ddr_p ddr = initialize_data_dependence_relation
- 				    (dr_a, store_dr, vNULL);
- 		      dependent
- 			= vect_slp_analyze_data_ref_dependence (vinfo, ddr);
- 		      free_dependence_relation (ddr);
- 		      if (dependent)
- 			break;
- 		    }
- 		}
- 	      else
- 		{
  		  ddr_p ddr = initialize_data_dependence_relation (dr_a,
  								   dr_b, vNULL);
! 		  dependent = vect_slp_analyze_data_ref_dependence (vinfo, ddr);
  		  free_dependence_relation (ddr);
  		}
! 	      if (dependent)
  		return false;
  	    }
  	}
--- 672,837 ----
  }
  
  
! /* Analyze dependences involved in the transform of a store SLP NODE.  */
  
  static bool
! vect_slp_analyze_store_dependences (vec_info *vinfo, slp_tree node)
  {
!   /* This walks over all stmts involved in the SLP store done
       in NODE verifying we can sink them up to the last stmt in the
       group.  */
!   stmt_vec_info last_access_info = vect_find_last_scalar_stmt_in_slp (node);
!   gcc_assert (DR_IS_WRITE (STMT_VINFO_DATA_REF (last_access_info)));
! 
!   for (unsigned k = 0; k < SLP_TREE_SCALAR_STMTS (node).length (); ++k)
      {
!       stmt_vec_info access_info
! 	= vect_orig_stmt (SLP_TREE_SCALAR_STMTS (node)[k]);
!       if (access_info == last_access_info)
! 	continue;
!       data_reference *dr_a = STMT_VINFO_DATA_REF (access_info);
!       ao_ref ref;
!       bool ref_initialized_p = false;
!       for (gimple_stmt_iterator gsi = gsi_for_stmt (access_info->stmt);
! 	   gsi_stmt (gsi) != last_access_info->stmt; gsi_next (&gsi))
  	{
! 	  gimple *stmt = gsi_stmt (gsi);
! 	  if (! gimple_vuse (stmt))
  	    continue;
  
! 	  /* If we couldn't record a (single) data reference for this
! 	     stmt we have to resort to the alias oracle.  */
! 	  stmt_vec_info stmt_info = vinfo->lookup_stmt (stmt);
! 	  data_reference *dr_b = STMT_VINFO_DATA_REF (stmt_info);
! 	  if (!dr_b)
! 	    {
! 	      /* We are moving a store - this means
! 		 we cannot use TBAA for disambiguation.  */
! 	      if (!ref_initialized_p)
! 		ao_ref_init (&ref, DR_REF (dr_a));
! 	      if (stmt_may_clobber_ref_p_1 (stmt, &ref, false)
! 		  || ref_maybe_used_by_stmt_p (stmt, &ref, false))
  		return false;
+ 	      continue;
  	    }
+ 
+ 	  gcc_assert (!gimple_visited_p (stmt));
+ 
+ 	  ddr_p ddr = initialize_data_dependence_relation (dr_a,
+ 							   dr_b, vNULL);
+ 	  bool dependent = vect_slp_analyze_data_ref_dependence (vinfo, ddr);
+ 	  free_dependence_relation (ddr);
+ 	  if (dependent)
+ 	    return false;
  	}
      }
!   return true;
! }
! 
! /* Analyze dependences involved in the transform of a load SLP NODE.  STORES
!    contain the vector of scalar stores of this instance if we are
!    disambiguating the loads.  */
! 
! static bool
! vect_slp_analyze_load_dependences (vec_info *vinfo, slp_tree node,
! 				   vec<stmt_vec_info> stores,
! 				   stmt_vec_info last_store_info)
! {
!   /* This walks over all stmts involved in the SLP load done
!      in NODE verifying we can hoist them up to the first stmt in the
!      group.  */
!   stmt_vec_info first_access_info = vect_find_first_scalar_stmt_in_slp (node);
!   gcc_assert (DR_IS_READ (STMT_VINFO_DATA_REF (first_access_info)));
! 
!   for (unsigned k = 0; k < SLP_TREE_SCALAR_STMTS (node).length (); ++k)
      {
!       stmt_vec_info access_info
! 	= vect_orig_stmt (SLP_TREE_SCALAR_STMTS (node)[k]);
!       if (access_info == first_access_info)
! 	continue;
!       data_reference *dr_a = STMT_VINFO_DATA_REF (access_info);
!       ao_ref ref;
!       bool ref_initialized_p = false;
!       hash_set<stmt_vec_info> grp_visited;
!       for (gimple_stmt_iterator gsi = gsi_for_stmt (access_info->stmt);
! 	   gsi_stmt (gsi) != first_access_info->stmt; gsi_prev (&gsi))
  	{
! 	  gimple *stmt = gsi_stmt (gsi);
! 	  if (! gimple_vdef (stmt))
  	    continue;
! 
! 	  stmt_vec_info stmt_info = vinfo->lookup_stmt (stmt);
! 
! 	  /* If we run into a store of this same instance (we've just
! 	     marked those) then delay dependence checking until we run
! 	     into the last store because this is where it will have
! 	     been sunk to (and we verified that we can do that already).  */
! 	  if (gimple_visited_p (stmt))
  	    {
! 	      if (stmt_info != last_store_info)
  		continue;
  
! 	      for (stmt_vec_info &store_info : stores)
! 		{
! 		  data_reference *store_dr = STMT_VINFO_DATA_REF (store_info);
! 		  ddr_p ddr = initialize_data_dependence_relation
! 				(dr_a, store_dr, vNULL);
! 		  bool dependent
! 		    = vect_slp_analyze_data_ref_dependence (vinfo, ddr);
! 		  free_dependence_relation (ddr);
! 		  if (dependent)
! 		    return false;
! 		}
! 	      continue;
! 	    }
  
! 	  auto check_hoist = [&] (stmt_vec_info stmt_info) -> bool
! 	    {
! 	      /* We are hoisting a load - this means we can use TBAA for
! 		 disambiguation.  */
  	      if (!ref_initialized_p)
  		ao_ref_init (&ref, DR_REF (dr_a));
! 	      if (stmt_may_clobber_ref_p_1 (stmt_info->stmt, &ref, true))
  		{
+ 		  /* If we couldn't record a (single) data reference for this
+ 		     stmt we have to give up now.  */
+ 		  data_reference *dr_b = STMT_VINFO_DATA_REF (stmt_info);
  		  if (!dr_b)
  		    return false;
  		  ddr_p ddr = initialize_data_dependence_relation (dr_a,
  								   dr_b, vNULL);
! 		  bool dependent
! 		    = vect_slp_analyze_data_ref_dependence (vinfo, ddr);
  		  free_dependence_relation (ddr);
+ 		  if (dependent)
+ 		    return false;
  		}
! 	      /* No dependence.  */
! 	      return true;
! 	    };
! 	  if (STMT_VINFO_GROUPED_ACCESS (stmt_info))
! 	    {
! 	      /* When we run into a store group we have to honor
! 		 that earlier stores might be moved here.  We don't
! 		 know exactly which and where to since we lack a
! 		 back-mapping from DR to SLP node, so assume all
! 		 earlier stores are sunk here.  It's enough to
! 		 consider the last stmt of a group for this.
! 		 ???  Both this and the fact that we disregard that
! 		 the conflicting instance might be removed later
! 		 is overly conservative.  */
! 	      if (!grp_visited.add (DR_GROUP_FIRST_ELEMENT (stmt_info)))
! 		for (auto store_info = DR_GROUP_FIRST_ELEMENT (stmt_info);
! 		     store_info != NULL;
! 		     store_info = DR_GROUP_NEXT_ELEMENT (store_info))
! 		  if ((store_info == stmt_info
! 		       || get_later_stmt (store_info, stmt_info) == stmt_info)
! 		      && !check_hoist (store_info))
! 		    return false;
! 	    }
! 	  else
! 	    {
! 	      if (!check_hoist (stmt_info))
  		return false;
  	    }
  	}
*************** vect_slp_analyze_instance_dependence (ve
*** 852,858 ****
    stmt_vec_info last_store_info = NULL;
    if (store)
      {
!       if (! vect_slp_analyze_node_dependences (vinfo, store, vNULL, NULL))
  	return false;
  
        /* Mark stores in this instance and remember the last one.  */
--- 860,866 ----
    stmt_vec_info last_store_info = NULL;
    if (store)
      {
!       if (! vect_slp_analyze_store_dependences (vinfo, store))
  	return false;
  
        /* Mark stores in this instance and remember the last one.  */
*************** vect_slp_analyze_instance_dependence (ve
*** 866,872 ****
    /* Verify we can sink loads to the vectorized stmt insert location,
       special-casing stores of this instance.  */
    for (slp_tree &load : SLP_INSTANCE_LOADS (instance))
!     if (! vect_slp_analyze_node_dependences (vinfo, load,
  					     store
  					     ? SLP_TREE_SCALAR_STMTS (store)
  					     : vNULL, last_store_info))
--- 874,880 ----
    /* Verify we can sink loads to the vectorized stmt insert location,
       special-casing stores of this instance.  */
    for (slp_tree &load : SLP_INSTANCE_LOADS (instance))
!     if (! vect_slp_analyze_load_dependences (vinfo, load,
  					     store
  					     ? SLP_TREE_SCALAR_STMTS (store)
  					     : vNULL, last_store_info))
diff -Nrcpad gcc-12.3.0/gcc/tree-vect-generic.cc gcc-12.4.0/gcc/tree-vect-generic.cc
*** gcc-12.3.0/gcc/tree-vect-generic.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-vect-generic.cc	Thu Jun 20 08:08:09 2024
*************** optimize_vector_constructor (gimple_stmt
*** 1376,1387 ****
    gsi_replace (gsi, g, false);
  }
  
! /* Return a type for the widest vector mode whose components are of type
!    TYPE, or NULL_TREE if none is found.  */
  
  static tree
! type_for_widest_vector_mode (tree type, optab op)
  {
    machine_mode inner_mode = TYPE_MODE (type);
    machine_mode best_mode = VOIDmode, mode;
    poly_int64 best_nunits = 0;
--- 1376,1391 ----
    gsi_replace (gsi, g, false);
  }
  
! /* Return a type for the widest vector mode with the same element type as
!    type ORIGINAL_VECTOR_TYPE, with at most the same number of elements as type
!    ORIGINAL_VECTOR_TYPE and that is supported by the target for an operation
!    with optab OP, or return NULL_TREE if none is found.  */
  
  static tree
! type_for_widest_vector_mode (tree original_vector_type, optab op)
  {
+   gcc_assert (VECTOR_TYPE_P (original_vector_type));
+   tree type = TREE_TYPE (original_vector_type);
    machine_mode inner_mode = TYPE_MODE (type);
    machine_mode best_mode = VOIDmode, mode;
    poly_int64 best_nunits = 0;
*************** type_for_widest_vector_mode (tree type,
*** 1404,1410 ****
    FOR_EACH_MODE_FROM (mode, mode)
      if (GET_MODE_INNER (mode) == inner_mode
  	&& maybe_gt (GET_MODE_NUNITS (mode), best_nunits)
! 	&& optab_handler (op, mode) != CODE_FOR_nothing)
        best_mode = mode, best_nunits = GET_MODE_NUNITS (mode);
  
    if (best_mode == VOIDmode)
--- 1408,1416 ----
    FOR_EACH_MODE_FROM (mode, mode)
      if (GET_MODE_INNER (mode) == inner_mode
  	&& maybe_gt (GET_MODE_NUNITS (mode), best_nunits)
! 	&& optab_handler (op, mode) != CODE_FOR_nothing
! 	&& known_le (GET_MODE_NUNITS (mode),
! 		     TYPE_VECTOR_SUBPARTS (original_vector_type)))
        best_mode = mode, best_nunits = GET_MODE_NUNITS (mode);
  
    if (best_mode == VOIDmode)
*************** get_compute_type (enum tree_code code, o
*** 1732,1740 ****
  	  || optab_handler (op, TYPE_MODE (type)) == CODE_FOR_nothing))
      {
        tree vector_compute_type
! 	= type_for_widest_vector_mode (TREE_TYPE (type), op);
        if (vector_compute_type != NULL_TREE
- 	  && subparts_gt (compute_type, vector_compute_type)
  	  && maybe_ne (TYPE_VECTOR_SUBPARTS (vector_compute_type), 1U)
  	  && (optab_handler (op, TYPE_MODE (vector_compute_type))
  	      != CODE_FOR_nothing))
--- 1738,1745 ----
  	  || optab_handler (op, TYPE_MODE (type)) == CODE_FOR_nothing))
      {
        tree vector_compute_type
! 	= type_for_widest_vector_mode (type, op);
        if (vector_compute_type != NULL_TREE
  	  && maybe_ne (TYPE_VECTOR_SUBPARTS (vector_compute_type), 1U)
  	  && (optab_handler (op, TYPE_MODE (vector_compute_type))
  	      != CODE_FOR_nothing))
*************** expand_vector_conversion (gimple_stmt_it
*** 1905,1914 ****
        /* Can't use get_compute_type here, as supportable_convert_operation
  	 doesn't necessarily use an optab and needs two arguments.  */
        tree vec_compute_type
! 	= type_for_widest_vector_mode (TREE_TYPE (arg_type), mov_optab);
        if (vec_compute_type
! 	  && VECTOR_MODE_P (TYPE_MODE (vec_compute_type))
! 	  && subparts_gt (arg_type, vec_compute_type))
  	{
  	  unsigned HOST_WIDE_INT nelts
  	    = constant_lower_bound (TYPE_VECTOR_SUBPARTS (vec_compute_type));
--- 1910,1918 ----
        /* Can't use get_compute_type here, as supportable_convert_operation
  	 doesn't necessarily use an optab and needs two arguments.  */
        tree vec_compute_type
! 	= type_for_widest_vector_mode (arg_type, mov_optab);
        if (vec_compute_type
! 	  && VECTOR_MODE_P (TYPE_MODE (vec_compute_type)))
  	{
  	  unsigned HOST_WIDE_INT nelts
  	    = constant_lower_bound (TYPE_VECTOR_SUBPARTS (vec_compute_type));
diff -Nrcpad gcc-12.3.0/gcc/tree-vect-loop.cc gcc-12.4.0/gcc/tree-vect-loop.cc
*** gcc-12.3.0/gcc/tree-vect-loop.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-vect-loop.cc	Thu Jun 20 08:08:09 2024
*************** vect_analyze_loop_1 (class loop *loop, v
*** 2874,2880 ****
  		     res ? "succeeded" : " failed",
  		     GET_MODE_NAME (loop_vinfo->vector_mode));
  
!   if (!main_loop_vinfo && suggested_unroll_factor > 1)
      {
        if (dump_enabled_p ())
  	dump_printf_loc (MSG_NOTE, vect_location,
--- 2874,2880 ----
  		     res ? "succeeded" : " failed",
  		     GET_MODE_NAME (loop_vinfo->vector_mode));
  
!   if (res && !main_loop_vinfo && suggested_unroll_factor > 1)
      {
        if (dump_enabled_p ())
  	dump_printf_loc (MSG_NOTE, vect_location,
*************** pop:
*** 3513,3536 ****
  	 ???  We could relax this and handle arbitrary live stmts by
  	 forcing a scalar epilogue for example.  */
        imm_use_iterator imm_iter;
        gimple *op_use_stmt;
        unsigned cnt = 0;
        FOR_EACH_IMM_USE_STMT (op_use_stmt, imm_iter, op.ops[opi])
  	if (!is_gimple_debug (op_use_stmt)
  	    && (*code != ERROR_MARK
  		|| flow_bb_inside_loop_p (loop, gimple_bb (op_use_stmt))))
! 	  {
! 	    /* We want to allow x + x but not x < 1 ? x : 2.  */
! 	    if (is_gimple_assign (op_use_stmt)
! 		&& gimple_assign_rhs_code (op_use_stmt) == COND_EXPR)
! 	      {
! 		use_operand_p use_p;
! 		FOR_EACH_IMM_USE_ON_STMT (use_p, imm_iter)
! 		  cnt++;
! 	      }
! 	    else
! 	      cnt++;
! 	  }
        if (cnt != 1)
  	{
  	  fail = true;
--- 3513,3527 ----
  	 ???  We could relax this and handle arbitrary live stmts by
  	 forcing a scalar epilogue for example.  */
        imm_use_iterator imm_iter;
+       use_operand_p use_p;
        gimple *op_use_stmt;
        unsigned cnt = 0;
        FOR_EACH_IMM_USE_STMT (op_use_stmt, imm_iter, op.ops[opi])
  	if (!is_gimple_debug (op_use_stmt)
  	    && (*code != ERROR_MARK
  		|| flow_bb_inside_loop_p (loop, gimple_bb (op_use_stmt))))
! 	  FOR_EACH_IMM_USE_ON_STMT (use_p, imm_iter)
! 	    cnt++;
        if (cnt != 1)
  	{
  	  fail = true;
*************** vectorizable_reduction (loop_vec_info lo
*** 6859,6875 ****
  		  < GET_MODE_SIZE (SCALAR_TYPE_MODE (TREE_TYPE (vectype_op[i]))))))
  	vectype_in = vectype_op[i];
  
!       if (op.code == COND_EXPR)
  	{
- 	  /* Record how the non-reduction-def value of COND_EXPR is defined.  */
  	  if (dt == vect_constant_def)
  	    {
  	      cond_reduc_dt = dt;
  	      cond_reduc_val = op.ops[i];
  	    }
! 	  if (dt == vect_induction_def
! 	      && def_stmt_info
! 	      && is_nonwrapping_integer_induction (def_stmt_info, loop))
  	    {
  	      cond_reduc_dt = dt;
  	      cond_stmt_vinfo = def_stmt_info;
--- 6850,6867 ----
  		  < GET_MODE_SIZE (SCALAR_TYPE_MODE (TREE_TYPE (vectype_op[i]))))))
  	vectype_in = vectype_op[i];
  
!       /* Record how the non-reduction-def value of COND_EXPR is defined.
! 	 ???  For a chain of multiple CONDs we'd have to match them up all.  */
!       if (op.code == COND_EXPR && reduc_chain_length == 1)
  	{
  	  if (dt == vect_constant_def)
  	    {
  	      cond_reduc_dt = dt;
  	      cond_reduc_val = op.ops[i];
  	    }
! 	  else if (dt == vect_induction_def
! 		   && def_stmt_info
! 		   && is_nonwrapping_integer_induction (def_stmt_info, loop))
  	    {
  	      cond_reduc_dt = dt;
  	      cond_stmt_vinfo = def_stmt_info;
*************** vectorizable_induction (loop_vec_info lo
*** 8219,8224 ****
--- 8211,8225 ----
  
    step_expr = STMT_VINFO_LOOP_PHI_EVOLUTION_PART (stmt_info);
    gcc_assert (step_expr != NULL_TREE);
+   if (INTEGRAL_TYPE_P (TREE_TYPE (step_expr))
+       && !type_has_mode_precision_p (TREE_TYPE (step_expr)))
+     {
+       if (dump_enabled_p ())
+ 	dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
+ 			 "bit-precision induction vectorization not "
+ 			 "supported.\n");
+       return false;
+     }
    tree step_vectype = get_same_sized_vectype (TREE_TYPE (step_expr), vectype);
  
    /* Check for backend support of PLUS/MINUS_EXPR. */
*************** find_in_mapping (tree t, void *context)
*** 9498,9506 ****
     corresponding dr_vec_info need to be reconnected to the EPILOGUE's
     stmt_vec_infos, their statements need to point to their corresponding copy,
     if they are gather loads or scatter stores then their reference needs to be
!    updated to point to its corresponding copy and finally we set
!    'base_misaligned' to false as we have already peeled for alignment in the
!    prologue of the main loop.  */
  
  static void
  update_epilogue_loop_vinfo (class loop *epilogue, tree advance)
--- 9499,9505 ----
     corresponding dr_vec_info need to be reconnected to the EPILOGUE's
     stmt_vec_infos, their statements need to point to their corresponding copy,
     if they are gather loads or scatter stores then their reference needs to be
!    updated to point to its corresponding copy.  */
  
  static void
  update_epilogue_loop_vinfo (class loop *epilogue, tree advance)
*************** update_epilogue_loop_vinfo (class loop *
*** 9641,9650 ****
  	}
        DR_STMT (dr) = STMT_VINFO_STMT (stmt_vinfo);
        stmt_vinfo->dr_aux.stmt = stmt_vinfo;
-       /* The vector size of the epilogue is smaller than that of the main loop
- 	 so the alignment is either the same or lower. This means the dr will
- 	 thus by definition be aligned.  */
-       STMT_VINFO_DR_INFO (stmt_vinfo)->base_misaligned = false;
      }
  
    epilogue_vinfo->shared->datarefs_copy.release ();
--- 9640,9645 ----
diff -Nrcpad gcc-12.3.0/gcc/tree-vect-patterns.cc gcc-12.4.0/gcc/tree-vect-patterns.cc
*** gcc-12.3.0/gcc/tree-vect-patterns.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-vect-patterns.cc	Thu Jun 20 08:08:09 2024
*************** vect_truncatable_operation_p (tree_code
*** 5031,5039 ****
--- 5031,5041 ----
  {
    switch (code)
      {
+     case NEGATE_EXPR:
      case PLUS_EXPR:
      case MINUS_EXPR:
      case MULT_EXPR:
+     case BIT_NOT_EXPR:
      case BIT_AND_EXPR:
      case BIT_IOR_EXPR:
      case BIT_XOR_EXPR:
*************** vect_determine_precisions_from_range (st
*** 5192,5229 ****
    unsigned int nops = gimple_num_ops (stmt);
  
    if (!vect_truncatable_operation_p (code))
!     /* Check that all relevant input operands are compatible, and update
!        [MIN_VALUE, MAX_VALUE] to include their ranges.  */
!     for (unsigned int i = 1; i < nops; ++i)
!       {
! 	tree op = gimple_op (stmt, i);
! 	if (TREE_CODE (op) == INTEGER_CST)
! 	  {
! 	    /* Don't require the integer to have RHS_TYPE (which it might
! 	       not for things like shift amounts, etc.), but do require it
! 	       to fit the type.  */
! 	    if (!int_fits_type_p (op, type))
! 	      return;
! 
! 	    min_value = wi::min (min_value, wi::to_wide (op, precision), sign);
! 	    max_value = wi::max (max_value, wi::to_wide (op, precision), sign);
! 	  }
! 	else if (TREE_CODE (op) == SSA_NAME)
! 	  {
! 	    /* Ignore codes that don't take uniform arguments.  */
! 	    if (!types_compatible_p (TREE_TYPE (op), type))
! 	      return;
  
! 	    wide_int op_min_value, op_max_value;
! 	    if (!vect_get_range_info (op, &op_min_value, &op_max_value))
! 	      return;
  
! 	    min_value = wi::min (min_value, op_min_value, sign);
! 	    max_value = wi::max (max_value, op_max_value, sign);
! 	  }
! 	else
  	  return;
!       }
  
    /* Try to switch signed types for unsigned types if we can.
       This is better for two reasons.  First, unsigned ops tend
--- 5194,5278 ----
    unsigned int nops = gimple_num_ops (stmt);
  
    if (!vect_truncatable_operation_p (code))
!     {
!       /* Handle operations that can be computed in type T if all inputs
! 	 and outputs can be represented in type T.  Also handle left and
! 	 right shifts, where (in addition) the maximum shift amount must
! 	 be less than the number of bits in T.  */
!       bool is_shift;
!       switch (code)
! 	{
! 	case LSHIFT_EXPR:
! 	case RSHIFT_EXPR:
! 	  is_shift = true;
! 	  break;
  
! 	case ABS_EXPR:
! 	case MIN_EXPR:
! 	case MAX_EXPR:
! 	case TRUNC_DIV_EXPR:
! 	case CEIL_DIV_EXPR:
! 	case FLOOR_DIV_EXPR:
! 	case ROUND_DIV_EXPR:
! 	case EXACT_DIV_EXPR:
! 	  /* Modulus is excluded because it is typically calculated by doing
! 	     a division, for which minimum signed / -1 isn't representable in
! 	     the original signed type.  We could take the division range into
! 	     account instead, if handling modulus ever becomes important.  */
! 	  is_shift = false;
! 	  break;
  
! 	default:
  	  return;
! 	}
!       for (unsigned int i = 1; i < nops; ++i)
! 	{
! 	  tree op = gimple_op (stmt, i);
! 	  wide_int op_min_value, op_max_value;
! 	  if (TREE_CODE (op) == INTEGER_CST)
! 	    {
! 	      unsigned int op_precision = TYPE_PRECISION (TREE_TYPE (op));
! 	      op_min_value = op_max_value = wi::to_wide (op, op_precision);
! 	    }
! 	  else if (TREE_CODE (op) == SSA_NAME)
! 	    {
! 	      if (!vect_get_range_info (op, &op_min_value, &op_max_value))
! 		return;
! 	    }
! 	  else
! 	    return;
! 
! 	  if (is_shift && i == 2)
! 	    {
! 	      /* There needs to be one more bit than the maximum shift amount.
! 
! 		 If the maximum shift amount is already 1 less than PRECISION
! 		 then we can't narrow the shift further.  Dealing with that
! 		 case first ensures that we can safely use an unsigned range
! 		 below.
! 
! 		 op_min_value isn't relevant, since shifts by negative amounts
! 		 are UB.  */
! 	      if (wi::geu_p (op_max_value, precision - 1))
! 		return;
! 	      unsigned int min_bits = op_max_value.to_uhwi () + 1;
! 
! 	      /* As explained below, we can convert a signed shift into an
! 		 unsigned shift if the sign bit is always clear.  At this
! 		 point we've already processed the ranges of the output and
! 		 the first input.  */
! 	      auto op_sign = sign;
! 	      if (sign == SIGNED && !wi::neg_p (min_value))
! 		op_sign = UNSIGNED;
! 	      op_min_value = wide_int::from (wi::min_value (min_bits, op_sign),
! 					     precision, op_sign);
! 	      op_max_value = wide_int::from (wi::max_value (min_bits, op_sign),
! 					     precision, op_sign);
! 	    }
! 	  min_value = wi::min (min_value, op_min_value, sign);
! 	  max_value = wi::max (max_value, op_max_value, sign);
! 	}
!     }
  
    /* Try to switch signed types for unsigned types if we can.
       This is better for two reasons.  First, unsigned ops tend
diff -Nrcpad gcc-12.3.0/gcc/tree-vect-slp.cc gcc-12.4.0/gcc/tree-vect-slp.cc
*** gcc-12.3.0/gcc/tree-vect-slp.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-vect-slp.cc	Thu Jun 20 08:08:09 2024
*************** vect_build_slp_tree_2 (vec_info *vinfo,
*** 1722,1731 ****
    if (STMT_VINFO_GROUPED_ACCESS (stmt_info)
        && DR_IS_READ (STMT_VINFO_DATA_REF (stmt_info)))
      {
!       if (gcall *stmt = dyn_cast <gcall *> (stmt_info->stmt))
! 	gcc_assert (gimple_call_internal_p (stmt, IFN_MASK_LOAD)
! 		    || gimple_call_internal_p (stmt, IFN_GATHER_LOAD)
! 		    || gimple_call_internal_p (stmt, IFN_MASK_GATHER_LOAD));
        else
  	{
  	  *max_nunits = this_max_nunits;
--- 1722,1729 ----
    if (STMT_VINFO_GROUPED_ACCESS (stmt_info)
        && DR_IS_READ (STMT_VINFO_DATA_REF (stmt_info)))
      {
!       if (STMT_VINFO_GATHER_SCATTER_P (stmt_info))
! 	gcc_assert (DR_IS_READ (STMT_VINFO_DATA_REF (stmt_info)));
        else
  	{
  	  *max_nunits = this_max_nunits;
*************** vect_build_slp_tree_2 (vec_info *vinfo,
*** 1741,1755 ****
  	  load_permutation.create (group_size);
  	  stmt_vec_info first_stmt_info
  	    = DR_GROUP_FIRST_ELEMENT (SLP_TREE_SCALAR_STMTS (node)[0]);
  	  FOR_EACH_VEC_ELT (SLP_TREE_SCALAR_STMTS (node), j, load_info)
  	    {
  	      int load_place = vect_get_place_in_interleaving_chain
  		  (load_info, first_stmt_info);
  	      gcc_assert (load_place != -1);
! 	      load_permutation.safe_push (load_place);
  	    }
- 	  SLP_TREE_LOAD_PERMUTATION (node) = load_permutation;
- 	  return node;
  	}
      }
    else if (gimple_assign_single_p (stmt_info->stmt)
--- 1739,1775 ----
  	  load_permutation.create (group_size);
  	  stmt_vec_info first_stmt_info
  	    = DR_GROUP_FIRST_ELEMENT (SLP_TREE_SCALAR_STMTS (node)[0]);
+ 	  bool any_permute = false;
  	  FOR_EACH_VEC_ELT (SLP_TREE_SCALAR_STMTS (node), j, load_info)
  	    {
  	      int load_place = vect_get_place_in_interleaving_chain
  		  (load_info, first_stmt_info);
  	      gcc_assert (load_place != -1);
! 	      any_permute |= load_place != j;
! 	      load_permutation.quick_push (load_place);
! 	    }
! 
! 	  if (gcall *stmt = dyn_cast <gcall *> (stmt_info->stmt))
! 	    {
! 	      gcc_assert (gimple_call_internal_p (stmt, IFN_MASK_LOAD)
! 			  || gimple_call_internal_p (stmt, IFN_GATHER_LOAD)
! 			  || gimple_call_internal_p (stmt, IFN_MASK_GATHER_LOAD));
! 	      load_permutation.release ();
! 	      /* We cannot handle permuted masked loads, see PR114375.  */
! 	      if (any_permute
! 		  || (STMT_VINFO_GROUPED_ACCESS (stmt_info)
! 		      && DR_GROUP_SIZE (first_stmt_info) != group_size)
! 		  || STMT_VINFO_STRIDED_P (stmt_info))
! 		{
! 		  matches[0] = false;
! 		  return NULL;
! 		}
! 	    }
! 	  else
! 	    {
! 	      SLP_TREE_LOAD_PERMUTATION (node) = load_permutation;
! 	      return node;
  	    }
  	}
      }
    else if (gimple_assign_single_p (stmt_info->stmt)
*************** vect_analyze_slp (vec_info *vinfo, unsig
*** 3410,3415 ****
--- 3430,3439 ----
        for (unsigned i = 0; i < bb_vinfo->roots.length (); ++i)
  	{
  	  vect_location = bb_vinfo->roots[i].roots[0]->stmt;
+ 	  /* Apply patterns.  */
+ 	  for (unsigned j = 0; j < bb_vinfo->roots[i].stmts.length (); ++j)
+ 	    bb_vinfo->roots[i].stmts[j]
+ 	      = vect_stmt_to_vectorize (bb_vinfo->roots[i].stmts[j]);
  	  if (vect_build_slp_instance (bb_vinfo, bb_vinfo->roots[i].kind,
  				       bb_vinfo->roots[i].stmts,
  				       bb_vinfo->roots[i].roots,
*************** vect_optimize_slp (vec_info *vinfo)
*** 3709,3717 ****
        vertices[idx].perm_out = perms.length () - 1;
      }
  
!   /* In addition to the above we have to mark outgoing permutes facing
!      non-reduction graph entries that are not represented as to be
!      materialized.  */
    for (slp_instance instance : vinfo->slp_instances)
      if (SLP_INSTANCE_KIND (instance) == slp_inst_kind_ctor)
        {
--- 3733,3740 ----
        vertices[idx].perm_out = perms.length () - 1;
      }
  
!   /* We have to mark outgoing permutations facing non-associating-reduction
!      graph entries that are not represented as to be materialized.  */
    for (slp_instance instance : vinfo->slp_instances)
      if (SLP_INSTANCE_KIND (instance) == slp_inst_kind_ctor)
        {
*************** vect_optimize_slp (vec_info *vinfo)
*** 3720,3725 ****
--- 3743,3762 ----
  	vertices[SLP_INSTANCE_TREE (instance)->vertex].perm_in = 0;
  	vertices[SLP_INSTANCE_TREE (instance)->vertex].perm_out = 0;
        }
+     else if (SLP_INSTANCE_KIND (instance) == slp_inst_kind_reduc_chain)
+       {
+ 	stmt_vec_info stmt_info
+ 	  = SLP_TREE_REPRESENTATIVE (SLP_INSTANCE_TREE (instance));
+ 	stmt_vec_info reduc_info = info_for_reduction (vinfo, stmt_info);
+ 	if (needs_fold_left_reduction_p (TREE_TYPE
+ 					   (gimple_get_lhs (stmt_info->stmt)),
+ 					 STMT_VINFO_REDUC_CODE (reduc_info)))
+ 	  {
+ 	    unsigned int node_i = SLP_INSTANCE_TREE (instance)->vertex;
+ 	    vertices[node_i].perm_in = 0;
+ 	    vertices[node_i].perm_out = 0;
+ 	  }
+       }
  
    /* Propagate permutes along the graph and compute materialization points.  */
    bool changed;
*************** vect_optimize_slp (vec_info *vinfo)
*** 4058,4063 ****
--- 4095,4109 ----
  		{
  		  /* Preserve the special VEC_PERM we use to shield existing
  		     vector defs from the rest.  But make it a no-op.  */
+ 		  auto_vec<stmt_vec_info, 64> saved;
+ 		  saved.create (SLP_TREE_SCALAR_STMTS (old).length ());
+ 		  for (unsigned i = 0;
+ 		       i < SLP_TREE_SCALAR_STMTS (old).length (); ++i)
+ 		    saved.quick_push (SLP_TREE_SCALAR_STMTS (old)[i]);
+ 		  for (unsigned i = 0;
+ 		       i < SLP_TREE_SCALAR_STMTS (old).length (); ++i)
+ 		    SLP_TREE_SCALAR_STMTS (old)[i]
+ 		      = saved[SLP_TREE_LANE_PERMUTATION (old)[i].second];
  		  unsigned i = 0;
  		  for (std::pair<unsigned, unsigned> &p
  		       : SLP_TREE_LANE_PERMUTATION (old))
*************** vect_schedule_slp_node (vec_info *vinfo,
*** 7207,7218 ****
    int i;
    slp_tree child;
  
-   /* For existing vectors there's nothing to do.  */
-   if (SLP_TREE_VEC_DEFS (node).exists ())
-     return;
- 
-   gcc_assert (SLP_TREE_VEC_STMTS (node).is_empty ());
- 
    /* Vectorize externals and constants.  */
    if (SLP_TREE_DEF_TYPE (node) == vect_constant_def
        || SLP_TREE_DEF_TYPE (node) == vect_external_def)
--- 7253,7258 ----
*************** vect_schedule_slp_node (vec_info *vinfo,
*** 7223,7232 ****
        if (!SLP_TREE_VECTYPE (node))
  	return;
  
!       vect_create_constant_vectors (vinfo, node);
        return;
      }
  
    stmt_vec_info stmt_info = SLP_TREE_REPRESENTATIVE (node);
  
    gcc_assert (SLP_TREE_NUMBER_OF_VEC_STMTS (node) != 0);
--- 7263,7280 ----
        if (!SLP_TREE_VECTYPE (node))
  	return;
  
!       /* There are two reasons vector defs might already exist.  The first
! 	 is that we are vectorizing an existing vector def.  The second is
! 	 when performing BB vectorization shared constant/external nodes
! 	 are not split apart during partitioning so during the code-gen
! 	 DFS walk we can end up visiting them twice.  */
!       if (! SLP_TREE_VEC_DEFS (node).exists ())
! 	vect_create_constant_vectors (vinfo, node);
        return;
      }
  
+   gcc_assert (SLP_TREE_VEC_DEFS (node).is_empty ());
+ 
    stmt_vec_info stmt_info = SLP_TREE_REPRESENTATIVE (node);
  
    gcc_assert (SLP_TREE_NUMBER_OF_VEC_STMTS (node) != 0);
*************** vect_schedule_slp_node (vec_info *vinfo,
*** 7263,7268 ****
--- 7311,7326 ----
        /* Emit other stmts after the children vectorized defs which is
  	 earliest possible.  */
        gimple *last_stmt = NULL;
+       if (auto loop_vinfo = dyn_cast <loop_vec_info> (vinfo))
+ 	if (LOOP_VINFO_FULLY_MASKED_P (loop_vinfo)
+ 	    || LOOP_VINFO_FULLY_WITH_LENGTH_P (loop_vinfo))
+ 	  {
+ 	    /* But avoid scheduling internal defs outside of the loop when
+ 	       we might have only implicitly tracked loop mask/len defs.  */
+ 	    gimple_stmt_iterator si
+ 	      = gsi_after_labels (LOOP_VINFO_LOOP (loop_vinfo)->header);
+ 	    last_stmt = gsi_stmt (si);
+ 	  }
        bool seen_vector_def = false;
        FOR_EACH_VEC_ELT (SLP_TREE_CHILDREN (node), i, child)
  	if (SLP_TREE_DEF_TYPE (child) == vect_internal_def)
diff -Nrcpad gcc-12.3.0/gcc/tree-vect-stmts.cc gcc-12.4.0/gcc/tree-vect-stmts.cc
*** gcc-12.3.0/gcc/tree-vect-stmts.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-vect-stmts.cc	Thu Jun 20 08:08:09 2024
*************** vectorizable_load (vec_info *vinfo,
*** 8994,8999 ****
--- 8994,9007 ----
  			     "unsupported masked emulated gather.\n");
  	  return false;
  	}
+       else if (memory_access_type == VMAT_ELEMENTWISE
+ 	       || memory_access_type == VMAT_STRIDED_SLP)
+ 	{
+ 	  if (dump_enabled_p ())
+ 	    dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
+ 			     "unsupported masked strided access.\n");
+ 	  return false;
+ 	}
      }
  
    if (!vec_stmt) /* transformation not required.  */
diff -Nrcpad gcc-12.3.0/gcc/tree.cc gcc-12.4.0/gcc/tree.cc
*** gcc-12.3.0/gcc/tree.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree.cc	Thu Jun 20 08:08:09 2024
*************** build_qualified_type (tree type, int typ
*** 5649,5655 ****
    return t;
  }
  
! /* Create a variant of type T with alignment ALIGN.  */
  
  tree
  build_aligned_type (tree type, unsigned int align)
--- 5649,5656 ----
    return t;
  }
  
! /* Create a variant of type T with alignment ALIGN which
!    is measured in bits.  */
  
  tree
  build_aligned_type (tree type, unsigned int align)
*************** build_opaque_vector_type (tree innertype
*** 10123,10128 ****
--- 10124,10131 ----
    TYPE_NEXT_VARIANT (cand) = TYPE_NEXT_VARIANT (t);
    TYPE_NEXT_VARIANT (t) = cand;
    TYPE_MAIN_VARIANT (cand) = TYPE_MAIN_VARIANT (t);
+   /* Type variants have no alias set defined.  */
+   TYPE_ALIAS_SET (cand) = -1;
    return cand;
  }
  
diff -Nrcpad gcc-12.3.0/gcc/tsan.cc gcc-12.4.0/gcc/tsan.cc
*** gcc-12.3.0/gcc/tsan.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tsan.cc	Thu Jun 20 08:08:09 2024
*************** instrument_expr (gimple_stmt_iterator gs
*** 139,144 ****
--- 139,147 ----
    if (TREE_READONLY (base) || (VAR_P (base) && DECL_HARD_REGISTER (base)))
      return false;
  
+   if (!ADDR_SPACE_GENERIC_P (TYPE_ADDR_SPACE (TREE_TYPE (base))))
+     return false;
+ 
    stmt = gsi_stmt (gsi);
    loc = gimple_location (stmt);
    rhs = is_vptr_store (stmt, expr, is_write);
diff -Nrcpad gcc-12.3.0/gcc/ubsan.cc gcc-12.4.0/gcc/ubsan.cc
*** gcc-12.3.0/gcc/ubsan.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/ubsan.cc	Thu Jun 20 08:08:09 2024
*************** along with GCC; see the file COPYING3.
*** 49,54 ****
--- 49,55 ----
  #include "tree-cfg.h"
  #include "gimple-fold.h"
  #include "varasm.h"
+ #include "target.h"
  
  /* Map from a tree to a VAR_DECL tree.  */
  
*************** ubsan_expand_null_ifn (gimple_stmt_itera
*** 784,789 ****
--- 785,797 ----
  	}
      }
    check_null = sanitize_flags_p (SANITIZE_NULL);
+   if (check_null && POINTER_TYPE_P (TREE_TYPE (ptr)))
+     {
+       addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (ptr)));
+       if (!ADDR_SPACE_GENERIC_P (as)
+ 	  && targetm.addr_space.zero_address_valid (as))
+ 	check_null = false;
+     }
  
    if (check_align == NULL_TREE && !check_null)
      {
*************** instrument_mem_ref (tree mem, tree base,
*** 1375,1382 ****
        if (align <= 1)
  	align = 0;
      }
!   if (align == 0 && !sanitize_flags_p (SANITIZE_NULL))
!     return;
    tree t = TREE_OPERAND (base, 0);
    if (!POINTER_TYPE_P (TREE_TYPE (t)))
      return;
--- 1383,1397 ----
        if (align <= 1)
  	align = 0;
      }
!   if (align == 0)
!     {
!       if (!sanitize_flags_p (SANITIZE_NULL))
! 	return;
!       addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (base));
!       if (!ADDR_SPACE_GENERIC_P (as)
! 	  && targetm.addr_space.zero_address_valid (as))
! 	return;
!     }
    tree t = TREE_OPERAND (base, 0);
    if (!POINTER_TYPE_P (TREE_TYPE (t)))
      return;
*************** instrument_bool_enum_load (gimple_stmt_i
*** 1688,1700 ****
        || TREE_CODE (gimple_assign_lhs (stmt)) != SSA_NAME)
      return;
  
    bool ends_bb = stmt_ends_bb_p (stmt);
    location_t loc = gimple_location (stmt);
    tree lhs = gimple_assign_lhs (stmt);
    tree ptype = build_pointer_type (TREE_TYPE (rhs));
    tree atype = reference_alias_ptr_type (rhs);
    gimple *g = gimple_build_assign (make_ssa_name (ptype),
! 				  build_fold_addr_expr (rhs));
    gimple_set_location (g, loc);
    gsi_insert_before (gsi, g, GSI_SAME_STMT);
    tree mem = build2 (MEM_REF, utype, gimple_assign_lhs (g),
--- 1703,1719 ----
        || TREE_CODE (gimple_assign_lhs (stmt)) != SSA_NAME)
      return;
  
+   addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (rhs));
+   if (as != TYPE_ADDR_SPACE (utype))
+     utype = build_qualified_type (utype, TYPE_QUALS (utype)
+ 					 | ENCODE_QUAL_ADDR_SPACE (as));
    bool ends_bb = stmt_ends_bb_p (stmt);
    location_t loc = gimple_location (stmt);
    tree lhs = gimple_assign_lhs (stmt);
    tree ptype = build_pointer_type (TREE_TYPE (rhs));
    tree atype = reference_alias_ptr_type (rhs);
    gimple *g = gimple_build_assign (make_ssa_name (ptype),
! 				   build_fold_addr_expr (rhs));
    gimple_set_location (g, loc);
    gsi_insert_before (gsi, g, GSI_SAME_STMT);
    tree mem = build2 (MEM_REF, utype, gimple_assign_lhs (g),
diff -Nrcpad gcc-12.3.0/gcc/value-range.h gcc-12.4.0/gcc/value-range.h
*** gcc-12.3.0/gcc/value-range.h	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/value-range.h	Thu Jun 20 08:08:09 2024
*************** irange::normalize_kind ()
*** 605,610 ****
--- 605,620 ----
      }
  }
  
+ inline bool
+ contains_zero_p (const irange &r)
+ {
+   if (r.undefined_p ())
+     return false;
+ 
+   tree zero = build_zero_cst (r.type ());
+   return r.contains_p (zero);
+ }
+ 
  // Return the maximum value for TYPE.
  
  inline tree
diff -Nrcpad gcc-12.3.0/gcc/varasm.cc gcc-12.4.0/gcc/varasm.cc
*** gcc-12.3.0/gcc/varasm.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/varasm.cc	Thu Jun 20 08:08:09 2024
*************** initializer_constant_valid_p_1 (tree val
*** 4897,4912 ****
  	tree src_type = TREE_TYPE (src);
  	tree dest_type = TREE_TYPE (value);
  
! 	/* Allow conversions between pointer types, floating-point
! 	   types, and offset types.  */
  	if ((POINTER_TYPE_P (dest_type) && POINTER_TYPE_P (src_type))
- 	    || (FLOAT_TYPE_P (dest_type) && FLOAT_TYPE_P (src_type))
  	    || (TREE_CODE (dest_type) == OFFSET_TYPE
  		&& TREE_CODE (src_type) == OFFSET_TYPE))
  	  return initializer_constant_valid_p_1 (src, endtype, cache);
  
! 	/* Allow length-preserving conversions between integer types.  */
! 	if (INTEGRAL_TYPE_P (dest_type) && INTEGRAL_TYPE_P (src_type)
  	    && (TYPE_PRECISION (dest_type) == TYPE_PRECISION (src_type)))
  	  return initializer_constant_valid_p_1 (src, endtype, cache);
  
--- 4897,4912 ----
  	tree src_type = TREE_TYPE (src);
  	tree dest_type = TREE_TYPE (value);
  
! 	/* Allow conversions between pointer types and offset types.  */
  	if ((POINTER_TYPE_P (dest_type) && POINTER_TYPE_P (src_type))
  	    || (TREE_CODE (dest_type) == OFFSET_TYPE
  		&& TREE_CODE (src_type) == OFFSET_TYPE))
  	  return initializer_constant_valid_p_1 (src, endtype, cache);
  
! 	/* Allow length-preserving conversions between integer types and
! 	   floating-point types.  */
! 	if (((INTEGRAL_TYPE_P (dest_type) && INTEGRAL_TYPE_P (src_type))
! 	     || (FLOAT_TYPE_P (dest_type) && FLOAT_TYPE_P (src_type)))
  	    && (TYPE_PRECISION (dest_type) == TYPE_PRECISION (src_type)))
  	  return initializer_constant_valid_p_1 (src, endtype, cache);
  
*************** output_constant (tree exp, unsigned HOST
*** 5276,5281 ****
--- 5276,5282 ----
        break;
  
      case REAL_TYPE:
+       gcc_assert (size == thissize);
        if (TREE_CODE (exp) != REAL_CST)
  	error ("initializer for floating value is not a floating constant");
        else
diff -Nrcpad gcc-12.3.0/gcc/wide-int.cc gcc-12.4.0/gcc/wide-int.cc
*** gcc-12.3.0/gcc/wide-int.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/wide-int.cc	Thu Jun 20 08:08:09 2024
*************** wi::divmod_internal (HOST_WIDE_INT *quot
*** 1888,1896 ****
      }
  
    wi_unpack (b_dividend, dividend.get_val (), dividend.get_len (),
! 	     dividend_blocks_needed, dividend_prec, sgn);
    wi_unpack (b_divisor, divisor.get_val (), divisor.get_len (),
! 	     divisor_blocks_needed, divisor_prec, sgn);
  
    m = dividend_blocks_needed;
    b_dividend[m] = 0;
--- 1888,1896 ----
      }
  
    wi_unpack (b_dividend, dividend.get_val (), dividend.get_len (),
! 	     dividend_blocks_needed, dividend_prec, UNSIGNED);
    wi_unpack (b_divisor, divisor.get_val (), divisor.get_len (),
! 	     divisor_blocks_needed, divisor_prec, UNSIGNED);
  
    m = dividend_blocks_needed;
    b_dividend[m] = 0;
diff -Nrcpad gcc-12.3.0/gcc/wide-int.h gcc-12.4.0/gcc/wide-int.h
*** gcc-12.3.0/gcc/wide-int.h	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/wide-int.h	Thu Jun 20 08:08:09 2024
*************** wi::lrotate (const T1 &x, const T2 &y, u
*** 3169,3177 ****
      width = precision;
    WI_UNARY_RESULT (T2) ymod = umod_trunc (y, width);
    WI_UNARY_RESULT (T1) left = wi::lshift (x, ymod);
!   WI_UNARY_RESULT (T1) right = wi::lrshift (x, wi::sub (width, ymod));
    if (width != precision)
!     return wi::zext (left, width) | wi::zext (right, width);
    return left | right;
  }
  
--- 3169,3179 ----
      width = precision;
    WI_UNARY_RESULT (T2) ymod = umod_trunc (y, width);
    WI_UNARY_RESULT (T1) left = wi::lshift (x, ymod);
!   WI_UNARY_RESULT (T1) right
!     = wi::lrshift (width != precision ? wi::zext (x, width) : x,
! 		   wi::sub (width, ymod));
    if (width != precision)
!     return wi::zext (left, width) | right;
    return left | right;
  }
  
*************** wi::rrotate (const T1 &x, const T2 &y, u
*** 3186,3195 ****
    if (width == 0)
      width = precision;
    WI_UNARY_RESULT (T2) ymod = umod_trunc (y, width);
!   WI_UNARY_RESULT (T1) right = wi::lrshift (x, ymod);
    WI_UNARY_RESULT (T1) left = wi::lshift (x, wi::sub (width, ymod));
    if (width != precision)
!     return wi::zext (left, width) | wi::zext (right, width);
    return left | right;
  }
  
--- 3188,3198 ----
    if (width == 0)
      width = precision;
    WI_UNARY_RESULT (T2) ymod = umod_trunc (y, width);
!   WI_UNARY_RESULT (T1) right
!     = wi::lrshift (width != precision ? wi::zext (x, width) : x, ymod);
    WI_UNARY_RESULT (T1) left = wi::lshift (x, wi::sub (width, ymod));
    if (width != precision)
!     return wi::zext (left, width) | right;
    return left | right;
  }
  
diff -Nrcpad gcc-12.3.0/gnattools/ChangeLog gcc-12.4.0/gnattools/ChangeLog
*** gcc-12.3.0/gnattools/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gnattools/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gotools/ChangeLog gcc-12.4.0/gotools/ChangeLog
*** gcc-12.3.0/gotools/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gotools/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/include/ChangeLog gcc-12.4.0/include/ChangeLog
*** gcc-12.3.0/include/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/include/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/intl/ChangeLog gcc-12.4.0/intl/ChangeLog
*** gcc-12.3.0/intl/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/intl/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libada/ChangeLog gcc-12.4.0/libada/ChangeLog
*** gcc-12.3.0/libada/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libada/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libatomic/ChangeLog gcc-12.4.0/libatomic/ChangeLog
*** gcc-12.3.0/libatomic/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libatomic/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libbacktrace/ChangeLog gcc-12.4.0/libbacktrace/ChangeLog
*** gcc-12.3.0/libbacktrace/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libbacktrace/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libcc1/ChangeLog gcc-12.4.0/libcc1/ChangeLog
*** gcc-12.3.0/libcc1/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libcc1/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,16 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-11  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2024-03-16  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	PR middle-end/111632
+ 	* libcc1plugin.cc: Fix include.
+ 	* libcp1plugin.cc: Fix include.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libcc1/libcc1plugin.cc gcc-12.4.0/libcc1/libcc1plugin.cc
*** gcc-12.3.0/libcc1/libcc1plugin.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libcc1/libcc1plugin.cc	Thu Jun 20 08:08:09 2024
***************
*** 32,37 ****
--- 32,38 ----
  #undef PACKAGE_VERSION
  
  #define INCLUDE_MEMORY
+ #define INCLUDE_VECTOR
  #include "gcc-plugin.h"
  #include "system.h"
  #include "coretypes.h"
***************
*** 69,76 ****
  #include "gcc-c-interface.h"
  #include "context.hh"
  
- #include <vector>
- 
  using namespace cc1_plugin;
  
  
--- 70,75 ----
diff -Nrcpad gcc-12.3.0/libcc1/libcp1plugin.cc gcc-12.4.0/libcc1/libcp1plugin.cc
*** gcc-12.3.0/libcc1/libcp1plugin.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libcc1/libcp1plugin.cc	Thu Jun 20 08:08:09 2024
***************
*** 33,38 ****
--- 33,39 ----
  #undef PACKAGE_VERSION
  
  #define INCLUDE_MEMORY
+ #define INCLUDE_VECTOR
  #include "gcc-plugin.h"
  #include "system.h"
  #include "coretypes.h"
***************
*** 71,78 ****
  #include "rpc.hh"
  #include "context.hh"
  
- #include <vector>
- 
  using namespace cc1_plugin;
  
  
--- 72,77 ----
diff -Nrcpad gcc-12.3.0/libcody/ChangeLog gcc-12.4.0/libcody/ChangeLog
*** gcc-12.3.0/libcody/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libcody/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libcpp/ChangeLog gcc-12.4.0/libcpp/ChangeLog
*** gcc-12.3.0/libcpp/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libcpp/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,18 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-22  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c/114007
+ 	* include/cpplib.h (COLON_SCOPE): Define to PURE_ZERO.
+ 	* lex.cc (_cpp_lex_direct): When lexing CPP_COLON with another
+ 	colon after it, if !CPP_OPTION (pfile, scope) set COLON_SCOPE
+ 	flag on the first CPP_COLON token.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libcpp/include/cpplib.h gcc-12.4.0/libcpp/include/cpplib.h
*** gcc-12.3.0/libcpp/include/cpplib.h	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libcpp/include/cpplib.h	Thu Jun 20 08:08:09 2024
*************** struct GTY(()) cpp_string {
*** 193,198 ****
--- 193,199 ----
  #define BOL		(1 << 6) /* Token at beginning of line.  */
  #define PURE_ZERO	(1 << 7) /* Single 0 digit, used by the C++ frontend,
  				    set in c-lex.cc.  */
+ #define COLON_SCOPE	PURE_ZERO /* Adjacent colons in C < 23.  */
  #define SP_DIGRAPH	(1 << 8) /* # or ## token was a digraph.  */
  #define SP_PREV_WHITE	(1 << 9) /* If whitespace before a ##
  				    operator, or before this token
diff -Nrcpad gcc-12.3.0/libcpp/lex.cc gcc-12.4.0/libcpp/lex.cc
*** gcc-12.3.0/libcpp/lex.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libcpp/lex.cc	Thu Jun 20 08:08:09 2024
*************** _cpp_lex_direct (cpp_reader *pfile)
*** 3945,3952 ****
  
      case ':':
        result->type = CPP_COLON;
!       if (*buffer->cur == ':' && CPP_OPTION (pfile, scope))
! 	buffer->cur++, result->type = CPP_SCOPE;
        else if (*buffer->cur == '>' && CPP_OPTION (pfile, digraphs))
  	{
  	  buffer->cur++;
--- 3945,3957 ----
  
      case ':':
        result->type = CPP_COLON;
!       if (*buffer->cur == ':')
! 	{
! 	  if (CPP_OPTION (pfile, scope))
! 	    buffer->cur++, result->type = CPP_SCOPE;
! 	  else
! 	    result->flags |= COLON_SCOPE;
! 	}
        else if (*buffer->cur == '>' && CPP_OPTION (pfile, digraphs))
  	{
  	  buffer->cur++;
diff -Nrcpad gcc-12.3.0/libcpp/po/ChangeLog gcc-12.4.0/libcpp/po/ChangeLog
*** gcc-12.3.0/libcpp/po/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libcpp/po/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libdecnumber/ChangeLog gcc-12.4.0/libdecnumber/ChangeLog
*** gcc-12.3.0/libdecnumber/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libdecnumber/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libffi/ChangeLog gcc-12.4.0/libffi/ChangeLog
*** gcc-12.3.0/libffi/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libffi/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,15 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2023-05-09  Dan Horák  <dan@danny.cz>
+ 
+ 	Backported from master:
+ 	2023-05-06  Dan Horák  <dan@danny.cz>
+ 
+ 	PR libffi/109447
+ 	* src/powerpc/ffi_linux64.c (ffi_prep_args64): Update arg.f128 pointer.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libffi/src/powerpc/ffi_linux64.c gcc-12.4.0/libffi/src/powerpc/ffi_linux64.c
*** gcc-12.3.0/libffi/src/powerpc/ffi_linux64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libffi/src/powerpc/ffi_linux64.c	Thu Jun 20 08:08:09 2024
*************** ffi_prep_args64 (extended_cif *ecif, uns
*** 680,686 ****
                      {
                        if (vecarg_count < NUM_VEC_ARG_REGISTERS64
                            && i < nfixedargs)
! 		        memcpy (vec_base.f128++, arg.f128, sizeof (float128));
                        else
  		        memcpy (next_arg.f128, arg.f128++, sizeof (float128));
                        if (++next_arg.f128 == gpr_end.f128)
--- 680,686 ----
                      {
                        if (vecarg_count < NUM_VEC_ARG_REGISTERS64
                            && i < nfixedargs)
! 		        memcpy (vec_base.f128++, arg.f128++, sizeof (float128));
                        else
  		        memcpy (next_arg.f128, arg.f128++, sizeof (float128));
                        if (++next_arg.f128 == gpr_end.f128)
diff -Nrcpad gcc-12.3.0/libgcc/ChangeLog gcc-12.4.0/libgcc/ChangeLog
*** gcc-12.3.0/libgcc/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libgcc/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,48 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-12  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	Backported from master:
+ 	2024-06-06  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+ 
+ 	PR target/115360
+ 	* config/arm/cmse_nonsecure_call.S: Add .type and .size directives.
+ 
+ 2024-04-12  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2022-12-24  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/t-slibgcc-darwin (install-darwin-libgcc-stubs): Skip the
+ 	install of libgcc_s.1.dylib when the installation is into the build
+ 	gcc directory.
+ 
+ 2024-01-13  Sandra Loosemore  <sandra@codesourcery.com>
+ 
+ 	Backported from master:
+ 	2024-01-12  Sandra Loosemore  <sandra@codesourcery.com>
+ 
+ 	* unwind-dw2-fde-dip.c (_Unwind_Find_FDE): Do not try to use
+ 	_dl_find_object on nios2; it doesn't work.
+ 
+ 2023-05-21  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-05-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config.host: Arrange to set min Darwin OS versions from
+ 	the configured host version.
+ 	* config/darwin10-unwind-find-enc-func.c: Do not use current
+ 	headers, but declare the nexessary structures locally to the
+ 	versions in use for Mac OSX 10.6.
+ 	* config/t-darwin: Amend to handle configured min OS
+ 	versions.
+ 	* config/t-darwin-min-1: New.
+ 	* config/t-darwin-min-5: New.
+ 	* config/t-darwin-min-8: New.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libgcc/config/arm/cmse_nonsecure_call.S gcc-12.4.0/libgcc/config/arm/cmse_nonsecure_call.S
*** gcc-12.3.0/libgcc/config/arm/cmse_nonsecure_call.S	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libgcc/config/arm/cmse_nonsecure_call.S	Thu Jun 20 08:08:09 2024
***************
*** 33,38 ****
--- 33,39 ----
  #endif
  
  .thumb
+ .type __gnu_cmse_nonsecure_call, %function
  .global __gnu_cmse_nonsecure_call
  __gnu_cmse_nonsecure_call:
  #if defined(__ARM_ARCH_8M_MAIN__)
*************** pop	    {r5-r7, pc}
*** 142,144 ****
--- 143,146 ----
  #else
  #error "This should only be used for armv8-m base- and mainline."
  #endif
+ .size __gnu_cmse_nonsecure_call, .-__gnu_cmse_nonsecure_call
diff -Nrcpad gcc-12.3.0/libgcc/config/avr/libf7/ChangeLog gcc-12.4.0/libgcc/config/avr/libf7/ChangeLog
*** gcc-12.3.0/libgcc/config/avr/libf7/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libgcc/config/avr/libf7/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libgcc/config/darwin10-unwind-find-enc-func.c gcc-12.4.0/libgcc/config/darwin10-unwind-find-enc-func.c
*** gcc-12.3.0/libgcc/config/darwin10-unwind-find-enc-func.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libgcc/config/darwin10-unwind-find-enc-func.c	Thu Jun 20 08:08:09 2024
***************
*** 1,8 ****
- #include "tconfig.h"
- #include "tsystem.h"
- #include "unwind-dw2-fde.h"
  #include "libgcc_tm.h"
  
  void *
  _darwin10_Unwind_FindEnclosingFunction (void *pc)
  {
--- 1,34 ----
  #include "libgcc_tm.h"
  
+ /* This shim is special, it needs to be built for Mac OSX 10.6
+    regardless of the current system version.
+    We must also build it to use the unwinder layout that was
+    present for 10.6 (and not update that).
+    So we copy the referenced structures from unwind-dw2-fde.h
+    to avoid pulling in newer system headers and/or changed
+    layouts.  */
+ struct dwarf_eh_bases
+ {
+   void *tbase;
+   void *dbase;
+   void *func;
+ };
+ 
+ typedef          int  sword __attribute__ ((mode (SI)));
+ typedef unsigned int  uword __attribute__ ((mode (SI)));
+ 
+ /* The first few fields of an FDE.  */
+ struct dwarf_fde
+ {
+   uword length;
+   sword CIE_delta;
+   unsigned char pc_begin[];
+ } __attribute__ ((packed, aligned (__alignof__ (void *))));
+ 
+ typedef struct dwarf_fde fde;
+ 
+ extern const fde * _Unwind_Find_FDE (void *, struct dwarf_eh_bases *);
+ 
  void *
  _darwin10_Unwind_FindEnclosingFunction (void *pc)
  {
*************** _darwin10_Unwind_FindEnclosingFunction (
*** 10,14 ****
    const struct dwarf_fde *fde = _Unwind_Find_FDE (pc-1, &bases);
    if (fde)
      return bases.func;
!   return NULL;
  }
--- 36,40 ----
    const struct dwarf_fde *fde = _Unwind_Find_FDE (pc-1, &bases);
    if (fde)
      return bases.func;
!   return (void *) 0;
  }
diff -Nrcpad gcc-12.3.0/libgcc/config/libbid/ChangeLog gcc-12.4.0/libgcc/config/libbid/ChangeLog
*** gcc-12.3.0/libgcc/config/libbid/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libgcc/config/libbid/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libgcc/config/t-darwin gcc-12.4.0/libgcc/config/t-darwin
*** gcc-12.3.0/libgcc/config/t-darwin	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libgcc/config/t-darwin	Thu Jun 20 08:08:09 2024
***************
*** 1,15 ****
  # Set this as a minimum (unless overriden by arch t-files) since it's a
  # reasonable lowest common denominator that works for all our archs.
! HOST_LIBGCC2_CFLAGS += -mmacosx-version-min=10.4
  
  crt3.o: $(srcdir)/config/darwin-crt3.c
! 	$(crt_compile) -mmacosx-version-min=10.4 -c $<
  
  crttms.o: $(srcdir)/config/darwin-crt-tm.c
! 	$(crt_compile) -mmacosx-version-min=10.4 -DSTART -c $<
  
  crttme.o: $(srcdir)/config/darwin-crt-tm.c
! 	$(crt_compile) -mmacosx-version-min=10.4 -DEND -c $<
  
  # Make emutls weak so that we can deal with -static-libgcc, override the
  # hidden visibility when this is present in libgcc_eh.
--- 1,15 ----
  # Set this as a minimum (unless overriden by arch t-files) since it's a
  # reasonable lowest common denominator that works for all our archs.
! HOST_LIBGCC2_CFLAGS += $(DARWIN_MIN_LIB_VERSION)
  
  crt3.o: $(srcdir)/config/darwin-crt3.c
! 	$(crt_compile) $(DARWIN_MIN_CRT_VERSION) -c $<
  
  crttms.o: $(srcdir)/config/darwin-crt-tm.c
! 	$(crt_compile) $(DARWIN_MIN_CRT_VERSION) -DSTART -c $<
  
  crttme.o: $(srcdir)/config/darwin-crt-tm.c
! 	$(crt_compile) $(DARWIN_MIN_CRT_VERSION) -DEND -c $<
  
  # Make emutls weak so that we can deal with -static-libgcc, override the
  # hidden visibility when this is present in libgcc_eh.
*************** libemutls_w.a: emutls_s.o
*** 25,30 ****
--- 25,32 ----
  	$(RANLIB_FOR_TARGET) $@
  
  # Patch to __Unwind_Find_Enclosing_Function for Darwin10.
+ # This needs to be built for darwin10, regardless of the current platform
+ # version.
  d10-uwfef.o: $(srcdir)/config/darwin10-unwind-find-enc-func.c libgcc_tm.h
  	$(crt_compile) -mmacosx-version-min=10.6 -c $<
  
diff -Nrcpad gcc-12.3.0/libgcc/config/t-darwin-min-1 gcc-12.4.0/libgcc/config/t-darwin-min-1
*** gcc-12.3.0/libgcc/config/t-darwin-min-1	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libgcc/config/t-darwin-min-1	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,3 ----
+ # Support building with -mmacosx-version-min back to 10.1.
+ DARWIN_MIN_LIB_VERSION = -mmacosx-version-min=10.4
+ DARWIN_MIN_CRT_VERSION = -mmacosx-version-min=10.1
diff -Nrcpad gcc-12.3.0/libgcc/config/t-darwin-min-5 gcc-12.4.0/libgcc/config/t-darwin-min-5
*** gcc-12.3.0/libgcc/config/t-darwin-min-5	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libgcc/config/t-darwin-min-5	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,3 ----
+ # Support building with -mmacosx-version-min back to 10.5.
+ DARWIN_MIN_LIB_VERSION = -mmacosx-version-min=10.5
+ DARWIN_MIN_CRT_VERSION = -mmacosx-version-min=10.5
diff -Nrcpad gcc-12.3.0/libgcc/config/t-darwin-min-8 gcc-12.4.0/libgcc/config/t-darwin-min-8
*** gcc-12.3.0/libgcc/config/t-darwin-min-8	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libgcc/config/t-darwin-min-8	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,3 ----
+ # Support building with -mmacosx-version-min back to 10.8.
+ DARWIN_MIN_LIB_VERSION = -mmacosx-version-min=10.8
+ DARWIN_MIN_CRT_VERSION = -mmacosx-version-min=10.8
diff -Nrcpad gcc-12.3.0/libgcc/config/t-slibgcc-darwin gcc-12.4.0/libgcc/config/t-slibgcc-darwin
*** gcc-12.3.0/libgcc/config/t-slibgcc-darwin	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libgcc/config/t-slibgcc-darwin	Thu Jun 20 08:08:09 2024
*************** all: libgcc_ehs$(SHLIB_EXT)
*** 72,85 ****
  LGCC_FILES += libgcc_ehs.$(SHLIB_SOVERSION)$(SHLIB_EXT)
  
  endif
- 
- # Provide libgcc_s.1 for backwards compatibility.
- LGCC_FILES += libgcc_s.1.dylib
- 
  endif
  
  INSTALL_FILES=$(LGCC_FILES)
  
  # For the toplevel multilib, build FAT dylibs including all the multilibs.
  ifeq ($(MULTIBUILDTOP),)
  
--- 72,86 ----
  LGCC_FILES += libgcc_ehs.$(SHLIB_SOVERSION)$(SHLIB_EXT)
  
  endif
  endif
  
  INSTALL_FILES=$(LGCC_FILES)
  
+ ifeq ($(BUILD_LIBGCCS1),YES)
+ # Provide libgcc_s.1 for backwards compatibility.
+ INSTALL_FILES += libgcc_s.1.dylib
+ endif
+ 
  # For the toplevel multilib, build FAT dylibs including all the multilibs.
  ifeq ($(MULTIBUILDTOP),)
  
*************** endif
*** 158,166 ****
  
  install-darwin-libgcc-stubs :
  	$(mkinstalldirs) $(DESTDIR)$(slibdir)
! 	for d in $(INSTALL_FILES) ; do \
! 	  $(INSTALL_DATA) $$d $(DESTDIR)$(slibdir)/$$d || exit 1 ; \
! 	done
  
  else
  
--- 159,173 ----
  
  install-darwin-libgcc-stubs :
  	$(mkinstalldirs) $(DESTDIR)$(slibdir)
! 	if test x$(slibdir) = x; then \
! 	  for d in $(LGCC_FILES) ; do \
! 	    $(INSTALL_DATA) $$d $(DESTDIR)$(slibdir)/$$d || exit 1 ; \
! 	  done; \
! 	else \
! 	  for d in $(INSTALL_FILES) ; do \
! 	    $(INSTALL_DATA) $$d $(DESTDIR)$(slibdir)/$$d || exit 1 ; \
! 	  done; \
! 	fi
  
  else
  
diff -Nrcpad gcc-12.3.0/libgcc/config.host gcc-12.4.0/libgcc/config.host
*** gcc-12.3.0/libgcc/config.host	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libgcc/config.host	Thu Jun 20 08:08:09 2024
*************** case ${host} in
*** 241,246 ****
--- 241,264 ----
        ;;
    esac
    tmake_file="$tmake_file t-slibgcc-darwin"
+   # newer toolsets produce warnings when building for unsupported versions.
+   case ${host} in
+     *-*-darwin1[89]* | *-*-darwin2* )
+       tmake_file="t-darwin-min-8 $tmake_file"
+       ;;
+     *-*-darwin9* | *-*-darwin1[0-7]*)
+       tmake_file="t-darwin-min-5 $tmake_file"
+       ;;
+     *-*-darwin[4-8]*)
+       tmake_file="t-darwin-min-1 $tmake_file"
+       ;;
+     *)
+       # Fall back to configuring for the oldest system known to work with
+       # all archs and the current sources.
+       tmake_file="t-darwin-min-5 $tmake_file"
+       echo "Warning: libgcc configured to support macOS 10.5" 1>&2
+       ;;
+   esac
    extra_parts="crt3.o libd10-uwfef.a crttms.o crttme.o libemutls_w.a"
    ;;
  *-*-dragonfly*)
diff -Nrcpad gcc-12.3.0/libgcc/unwind-dw2-fde-dip.c gcc-12.4.0/libgcc/unwind-dw2-fde-dip.c
*** gcc-12.3.0/libgcc/unwind-dw2-fde-dip.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libgcc/unwind-dw2-fde-dip.c	Thu Jun 20 08:08:09 2024
*************** _Unwind_Find_FDE (void *pc, struct dwarf
*** 505,512 ****
      return ret;
  
    /* Use DLFO_STRUCT_HAS_EH_DBASE as a proxy for the existence of a glibc-style
!      _dl_find_object function.  */
! #ifdef DLFO_STRUCT_HAS_EH_DBASE
    {
      struct dl_find_object dlfo;
      if (_dl_find_object (pc, &dlfo) == 0 && dlfo.dlfo_eh_frame != NULL)
--- 505,513 ----
      return ret;
  
    /* Use DLFO_STRUCT_HAS_EH_DBASE as a proxy for the existence of a glibc-style
!      _dl_find_object function.  However, do not use _dl_find_object on nios2,
!      which uses the GOT address as the base for DW_EH_PE_datarel instead.  */
! #if defined(DLFO_STRUCT_HAS_EH_DBASE) && !defined(__nios2__)
    {
      struct dl_find_object dlfo;
      if (_dl_find_object (pc, &dlfo) == 0 && dlfo.dlfo_eh_frame != NULL)
diff -Nrcpad gcc-12.3.0/libgfortran/ChangeLog gcc-12.4.0/libgfortran/ChangeLog
*** gcc-12.3.0/libgfortran/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libgfortran/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,12 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-02-11  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+ 
+ 	PR libfortran/110651
+ 	* libgfortran.spec.in: Remove duplicate libraries.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libgfortran/libgfortran.spec.in gcc-12.4.0/libgfortran/libgfortran.spec.in
*** gcc-12.3.0/libgfortran/libgfortran.spec.in	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libgfortran/libgfortran.spec.in	Thu Jun 20 08:08:09 2024
***************
*** 5,8 ****
  #
  
  %rename lib liborig
! *lib: @LIBQUADSPEC@ @LIBM@ %(libgcc) %(liborig)
--- 5,8 ----
  #
  
  %rename lib liborig
! *lib: @LIBQUADSPEC@ @LIBM@ %(liborig)
diff -Nrcpad gcc-12.3.0/libgo/Makefile.am gcc-12.4.0/libgo/Makefile.am
*** gcc-12.3.0/libgo/Makefile.am	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libgo/Makefile.am	Thu Jun 20 08:08:09 2024
*************** toolexeclibgounicode_DATA = \
*** 417,422 ****
--- 417,423 ----
  # Some internal packages are needed to bootstrap the gc toolchain.
  toolexeclibgointernaldir = $(toolexeclibgodir)/internal
  toolexeclibgointernal_DATA = \
+ 	internal/lazyregexp.gox \
  	internal/reflectlite.gox \
  	internal/unsafeheader.gox
  
diff -Nrcpad gcc-12.3.0/libgo/Makefile.in gcc-12.4.0/libgo/Makefile.in
*** gcc-12.3.0/libgo/Makefile.in	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libgo/Makefile.in	Thu Jun 20 08:08:09 2024
*************** toolexeclibgounicode_DATA = \
*** 885,890 ****
--- 885,891 ----
  # Some internal packages are needed to bootstrap the gc toolchain.
  toolexeclibgointernaldir = $(toolexeclibgodir)/internal
  toolexeclibgointernal_DATA = \
+ 	internal/lazyregexp.gox \
  	internal/reflectlite.gox \
  	internal/unsafeheader.gox
  
diff -Nrcpad gcc-12.3.0/libgo/go/internal/abi/abi.go gcc-12.4.0/libgo/go/internal/abi/abi.go
*** gcc-12.3.0/libgo/go/internal/abi/abi.go	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libgo/go/internal/abi/abi.go	Thu Jun 20 08:08:10 2024
*************** package abi
*** 17,26 ****
  // compile-time error.
  //
  // Implemented as a compile intrinsic.
! func FuncPCABI0(f any) uintptr {
! 	// The compiler should remove all calls.
! 	panic("FuncPCABI0")
! }
  
  // FuncPCABIInternal returns the entry PC of the function f. If f is a
  // direct reference of a function, it must be defined as ABIInternal.
--- 17,23 ----
  // compile-time error.
  //
  // Implemented as a compile intrinsic.
! func FuncPCABI0(f any) uintptr
  
  // FuncPCABIInternal returns the entry PC of the function f. If f is a
  // direct reference of a function, it must be defined as ABIInternal.
*************** func FuncPCABI0(f any) uintptr {
*** 29,35 ****
  // the behavior is undefined.
  //
  // Implemented as a compile intrinsic.
! func FuncPCABIInternal(f any) uintptr {
! 	// The compiler should remove all calls.
! 	panic("FuncPCABIInternal")
! }
--- 26,29 ----
  // the behavior is undefined.
  //
  // Implemented as a compile intrinsic.
! func FuncPCABIInternal(f any) uintptr
diff -Nrcpad gcc-12.3.0/libgo/go/syscall/libcall_linux.go gcc-12.4.0/libgo/go/syscall/libcall_linux.go
*** gcc-12.3.0/libgo/go/syscall/libcall_linux.go	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libgo/go/syscall/libcall_linux.go	Thu Jun 20 08:08:10 2024
*************** func Gettid() (tid int) {
*** 188,193 ****
--- 188,201 ----
  //sys	PivotRoot(newroot string, putold string) (err error)
  //pivot_root(newroot *byte, putold *byte) _C_int
  
+ // Used by golang.org/x/sys/unix.
+ //sys	prlimit(pid int, resource int, newlimit *Rlimit, oldlimit *Rlimit) (err error)
+ //prlimit(pid Pid_t, resource _C_int, newlimit *Rlimit, oldlimit *Rlimit) _C_int
+ 
+ func Prlimit(pid int, resource int, newlimit *Rlimit, oldlimit *Rlimit) error {
+ 	return prlimit(pid, resource, newlimit, oldlimit)
+ }
+ 
  //sys	Removexattr(path string, attr string) (err error)
  //removexattr(path *byte, name *byte) _C_int
  
diff -Nrcpad gcc-12.3.0/libgomp/ChangeLog gcc-12.4.0/libgomp/ChangeLog
*** gcc-12.3.0/libgomp/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libgomp/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,91 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/114572
+ 	* testsuite/libgomp.c++/pr114572.C: New test.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-10  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR libgomp/113192
+ 	* configure.ac (FLOCK): Use $libgomp_abs_srcdir/testsuite/flock
+ 	instead of \$(abs_top_srcdir)/testsuite/flock.
+ 	* configure: Regenerated.
+ 
+ 2023-09-01  Tobias Burnus  <tobias@codesourcery.com>
+ 
+ 	Backported from master:
+ 	2023-08-19  Tobias Burnus  <tobias@codesourcery.com>
+ 
+ 	PR middle-end/111017
+ 	* testsuite/libgomp.c-c++-common/non-rect-loop-1.c: New test.
+ 
+ 2023-06-28  Thomas Schwinge  <thomas@codesourcery.com>
+ 
+ 	Backported from master:
+ 	2023-06-02  Thomas Schwinge  <thomas@codesourcery.com>
+ 
+ 	PR testsuite/66005
+ 	* testsuite/lib/libgomp.exp: 'flock' through stdout.
+ 	* testsuite/flock: New.
+ 	* configure.ac (FLOCK): Point to that if no 'flock' available, but
+ 	'perl' is.
+ 	* configure: Regenerate.
+ 
+ 2023-06-28  Thomas Schwinge  <thomas@codesourcery.com>
+ 
+ 	Backported from master:
+ 	2023-05-15  Thomas Schwinge  <thomas@codesourcery.com>
+ 
+ 	PR testsuite/66005
+ 	* configure.ac: Look for 'flock'.
+ 	* testsuite/Makefile.am (gcc_test_parallel_slots): Enable parallel testing.
+ 	* testsuite/config/default.exp: Don't 'load_lib "standard.exp"' here...
+ 	* testsuite/lib/libgomp.exp: ... but here, instead.
+ 	(libgomp_load): Override for parallel testing.
+ 	* testsuite/libgomp-site-extra.exp.in (FLOCK): Set.
+ 	* configure: Regenerate.
+ 	* Makefile.in: Regenerate.
+ 	* testsuite/Makefile.in: Regenerate.
+ 
+ 2023-06-28  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	Backported from master:
+ 	2023-05-15  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 		    Thomas Schwinge  <thomas@codesourcery.com>
+ 
+ 	PR testsuite/66005
+ 	* testsuite/Makefile.am (PWD_COMMAND): New variable.
+ 	(%/site.exp): New target.
+ 	(check_p_numbers0, check_p_numbers1, check_p_numbers2)
+ 	(check_p_numbers3, check_p_numbers4, check_p_numbers5)
+ 	(check_p_numbers6, check_p_numbers, gcc_test_parallel_slots)
+ 	(check_p_subdirs)
+ 	(check_DEJAGNU_libgomp_targets): New variables.
+ 	($(check_DEJAGNU_libgomp_targets)): New target.
+ 	($(check_DEJAGNU_libgomp_targets)): New dependency.
+ 	(check-DEJAGNU $(check_DEJAGNU_libgomp_targets)): New targets.
+ 	* testsuite/Makefile.in: Regenerate.
+ 	* testsuite/lib/libgomp.exp: For parallel testing,
+ 	'load_file ../libgomp-test-support.exp'.
+ 
+ 2023-06-28  Thomas Schwinge  <thomas@codesourcery.com>
+ 
+ 	Backported from master:
+ 	2023-05-08  Thomas Schwinge  <thomas@codesourcery.com>
+ 
+ 	* testsuite/libgomp.c++/c++.exp: Use 'lang_include_flags' instead
+ 	of 'libstdcxx_includes'.
+ 	* testsuite/libgomp.oacc-c++/c++.exp: Likewise.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libgomp/Makefile.in gcc-12.4.0/libgomp/Makefile.in
*** gcc-12.3.0/libgomp/Makefile.in	Mon May  8 12:15:24 2023
--- gcc-12.4.0/libgomp/Makefile.in	Thu Jun 20 08:10:28 2024
*************** EXEEXT = @EXEEXT@
*** 384,389 ****
--- 384,390 ----
  FC = @FC@
  FCFLAGS = @FCFLAGS@
  FGREP = @FGREP@
+ FLOCK = @FLOCK@
  GREP = @GREP@
  HSA_RUNTIME_INCLUDE = @HSA_RUNTIME_INCLUDE@
  HSA_RUNTIME_LIB = @HSA_RUNTIME_LIB@
diff -Nrcpad gcc-12.3.0/libgomp/configure gcc-12.4.0/libgomp/configure
*** gcc-12.3.0/libgomp/configure	Mon May  8 12:15:24 2023
--- gcc-12.4.0/libgomp/configure	Thu Jun 20 08:10:28 2024
*************** tmake_file
*** 656,661 ****
--- 656,662 ----
  XLDFLAGS
  XCFLAGS
  config_path
+ FLOCK
  CPU_COUNT
  LIBGOMP_BUILD_VERSIONED_SHLIB_SUN_FALSE
  LIBGOMP_BUILD_VERSIONED_SHLIB_SUN_TRUE
*************** else
*** 11431,11437 ****
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 11434 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
--- 11432,11438 ----
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 11435 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
*************** else
*** 11537,11543 ****
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 11540 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
--- 11538,11544 ----
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 11541 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
*************** $as_echo "unable to detect (assuming 1)"
*** 16663,16668 ****
--- 16664,16761 ----
  fi
  
  
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for flock implementation" >&5
+ $as_echo "$as_me: checking for flock implementation" >&6;}
+ for ac_prog in flock
+ do
+   # Extract the first word of "$ac_prog", so it can be a program name with args.
+ set dummy $ac_prog; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+ if ${ac_cv_prog_FLOCK+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+   if test -n "$FLOCK"; then
+   ac_cv_prog_FLOCK="$FLOCK" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+ do
+   IFS=$as_save_IFS
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then
+     ac_cv_prog_FLOCK="$ac_prog"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+ done
+   done
+ IFS=$as_save_IFS
+ 
+ fi
+ fi
+ FLOCK=$ac_cv_prog_FLOCK
+ if test -n "$FLOCK"; then
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: $FLOCK" >&5
+ $as_echo "$FLOCK" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+ 
+   test -n "$FLOCK" && break
+ done
+ 
+ # Fallback if 'perl' is available.
+ if test -z "$FLOCK"; then
+   # These need to be absolute paths, yet at the same time need to
+   # canonicalize only relative paths, because then amd will not unmount
+   # drives. Thus the use of PWDCMD: set it to 'pawd' or 'amq -w' if using amd.
+   case $srcdir in
+     [\\/$]* | ?:[\\/]*) libgomp_abs_srcdir=${srcdir} ;;
+     *) libgomp_abs_srcdir=`cd "$srcdir" && ${PWDCMD-pwd} || echo "$srcdir"` ;;
+   esac
+   # Extract the first word of "perl", so it can be a program name with args.
+ set dummy perl; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+ if ${ac_cv_prog_FLOCK+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+   if test -n "$FLOCK"; then
+   ac_cv_prog_FLOCK="$FLOCK" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+ do
+   IFS=$as_save_IFS
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then
+     ac_cv_prog_FLOCK="$libgomp_abs_srcdir/testsuite/flock"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+ done
+   done
+ IFS=$as_save_IFS
+ 
+ fi
+ fi
+ FLOCK=$ac_cv_prog_FLOCK
+ if test -n "$FLOCK"; then
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: $FLOCK" >&5
+ $as_echo "$FLOCK" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+ 
+ fi
+ 
  # Get target configury.
  . ${srcdir}/configure.tgt
  CFLAGS="$save_CFLAGS $XCFLAGS"
diff -Nrcpad gcc-12.3.0/libgomp/configure.ac gcc-12.4.0/libgomp/configure.ac
*** gcc-12.3.0/libgomp/configure.ac	Mon May  8 12:15:24 2023
--- gcc-12.4.0/libgomp/configure.ac	Thu Jun 20 08:10:28 2024
*************** fi
*** 339,344 ****
--- 339,360 ----
  AX_COUNT_CPUS
  AC_SUBST(CPU_COUNT)
  
+ AC_MSG_NOTICE([checking for flock implementation])
+ AC_CHECK_PROGS(FLOCK, flock)
+ # Fallback if 'perl' is available.
+ if test -z "$FLOCK"; then
+   # These need to be absolute paths, yet at the same time need to
+   # canonicalize only relative paths, because then amd will not unmount
+   # drives. Thus the use of PWDCMD: set it to 'pawd' or 'amq -w' if using amd.
+   case $srcdir in
+ changequote(,)dnl
+     [\\/$]* | ?:[\\/]*) libgomp_abs_srcdir=${srcdir} ;;
+ changequote([,])dnl
+     *) libgomp_abs_srcdir=`cd "$srcdir" && ${PWDCMD-pwd} || echo "$srcdir"` ;;
+   esac
+   AC_CHECK_PROG(FLOCK, perl, $libgomp_abs_srcdir/testsuite/flock)
+ fi
+ 
  # Get target configury.
  . ${srcdir}/configure.tgt
  CFLAGS="$save_CFLAGS $XCFLAGS"
diff -Nrcpad gcc-12.3.0/libgomp/libgomp.info gcc-12.4.0/libgomp/libgomp.info
*** gcc-12.3.0/libgomp/libgomp.info	Mon May  8 12:31:25 2023
--- gcc-12.4.0/libgomp/libgomp.info	Thu Jun 20 08:30:55 2024
***************
*** 1,4 ****
! This is libgomp.info, produced by makeinfo version 6.5 from
  libgomp.texi.
  
  Copyright (C) 2006-2022 Free Software Foundation, Inc.
--- 1,4 ----
! This is libgomp.info, produced by makeinfo version 6.8 from
  libgomp.texi.
  
  Copyright (C) 2006-2022 Free Software Foundation, Inc.
*************** software.  Copies published by the Free
*** 54,60 ****
  for GNU development.
  
  
! File: libgomp.info,  Node: Top,  Next: Enabling OpenMP
  
  Introduction
  ************
--- 54,60 ----
  for GNU development.
  
  
! File: libgomp.info,  Node: Top,  Next: Enabling OpenMP,  Up: (dir)
  
  Introduction
  ************
*************** Library Index
*** 5529,5687 ****
  
  Tag Table:
  Node: Top2083
! Node: Enabling OpenMP4713
! Node: OpenMP Implementation Status5519
! Node: OpenMP 4.56074
! Node: OpenMP 5.06250
! Node: OpenMP 5.111120
! Node: Runtime Library Routines14711
! Node: omp_get_active_level18416
! Node: omp_get_ancestor_thread_num19116
! Node: omp_get_cancellation20046
! Node: omp_get_default_device20860
! Node: omp_get_device_num21539
! Node: omp_get_dynamic22344
! Node: omp_get_initial_device23224
! Node: omp_get_level23968
! Node: omp_get_max_active_levels24595
! Node: omp_get_max_task_priority25316
! Node: omp_get_max_teams25936
! Node: omp_get_max_threads26630
! Node: omp_get_nested27381
! Node: omp_get_num_devices28989
! Node: omp_get_num_procs29510
! Node: omp_get_num_teams30049
! Node: omp_get_num_threads30565
! Node: omp_get_proc_bind31654
! Node: omp_get_schedule32677
! Node: omp_get_supported_active_levels33646
! Node: omp_get_team_num34432
! Node: omp_get_team_size34946
! Node: omp_get_teams_thread_limit35912
! Node: omp_get_thread_limit36674
! Node: omp_get_thread_num37302
! Node: omp_in_parallel38174
! Node: omp_in_final38823
! Node: omp_is_initial_device39497
! Node: omp_set_default_device40190
! Node: omp_set_dynamic40981
! Node: omp_set_max_active_levels41867
! Node: omp_set_nested42789
! Node: omp_set_num_teams43984
! Node: omp_set_num_threads44857
! Node: omp_set_schedule45728
! Node: omp_set_teams_thread_limit46822
! Node: omp_init_lock47824
! Node: omp_set_lock48487
! Node: omp_test_lock49342
! Node: omp_unset_lock50318
! Node: omp_destroy_lock51249
! Node: omp_init_nest_lock51926
! Node: omp_set_nest_lock52661
! Node: omp_test_nest_lock53576
! Node: omp_unset_nest_lock54603
! Node: omp_destroy_nest_lock55618
! Node: omp_get_wtick56369
! Node: omp_get_wtime56961
! Node: omp_fulfill_event57763
! Node: Environment Variables58784
! Node: OMP_CANCELLATION60573
! Node: OMP_DISPLAY_ENV61106
! Node: OMP_DEFAULT_DEVICE61809
! Node: OMP_DYNAMIC62589
! Node: OMP_MAX_ACTIVE_LEVELS63185
! Node: OMP_MAX_TASK_PRIORITY64112
! Node: OMP_NESTED64770
! Node: OMP_NUM_TEAMS65797
! Node: OMP_NUM_THREADS66470
! Node: OMP_PROC_BIND67275
! Node: OMP_PLACES68617
! Node: OMP_STACKSIZE71306
! Node: OMP_SCHEDULE72130
! Node: OMP_TARGET_OFFLOAD72830
! Node: OMP_TEAMS_THREAD_LIMIT73792
! Node: OMP_THREAD_LIMIT74599
! Node: OMP_WAIT_POLICY75209
! Node: GOMP_CPU_AFFINITY75901
! Node: GOMP_DEBUG77631
! Node: GOMP_STACKSIZE78138
! Node: GOMP_SPINCOUNT78969
! Node: GOMP_RTEMS_THREAD_POOLS80173
! Node: Enabling OpenACC82356
! Node: OpenACC Runtime Library Routines83257
! Node: acc_get_num_devices87538
! Node: acc_set_device_type88264
! Node: acc_get_device_type89028
! Node: acc_set_device_num90041
! Node: acc_get_device_num90858
! Node: acc_get_property91657
! Node: acc_async_test93880
! Node: acc_async_test_all94868
! Node: acc_wait95768
! Node: acc_wait_all96631
! Node: acc_wait_all_async97392
! Node: acc_wait_async98144
! Node: acc_init98852
! Node: acc_shutdown99497
! Node: acc_on_device100164
! Node: acc_malloc101168
! Node: acc_free101667
! Node: acc_copyin102094
! Node: acc_present_or_copyin103681
! Node: acc_create105459
! Node: acc_present_or_create107091
! Node: acc_copyout108877
! Node: acc_delete111181
! Node: acc_update_device113428
! Node: acc_update_self115002
! Node: acc_map_data116592
! Node: acc_unmap_data117277
! Node: acc_deviceptr117798
! Node: acc_hostptr118368
! Node: acc_is_present118932
! Node: acc_memcpy_to_device120459
! Node: acc_memcpy_from_device121122
! Node: acc_attach121789
! Node: acc_detach122436
! Node: acc_get_current_cuda_device123215
! Node: acc_get_current_cuda_context123800
! Node: acc_get_cuda_stream124400
! Node: acc_set_cuda_stream124991
! Node: acc_prof_register125662
! Node: acc_prof_unregister126221
! Node: acc_prof_lookup126788
! Node: acc_register_library127309
! Node: OpenACC Environment Variables127875
! Node: ACC_DEVICE_TYPE128447
! Node: ACC_DEVICE_NUM128683
! Node: ACC_PROFLIB128937
! Node: GCC_ACC_NOTIFY129268
! Node: CUDA Streams Usage129488
! Ref: CUDA Streams Usage-Footnote-1131389
! Node: OpenACC Library Interoperability131498
! Ref: OpenACC Library Interoperability-Footnote-1137866
! Ref: OpenACC Library Interoperability-Footnote-2138118
! Node: OpenACC Profiling Interface138326
! Node: The libgomp ABI148354
! Node: Implementing MASTER construct149207
! Node: Implementing CRITICAL construct149624
! Node: Implementing ATOMIC construct150365
! Node: Implementing FLUSH construct150848
! Node: Implementing BARRIER construct151121
! Node: Implementing THREADPRIVATE construct151392
! Node: Implementing PRIVATE clause152047
! Node: Implementing FIRSTPRIVATE LASTPRIVATE COPYIN and COPYPRIVATE clauses152630
! Node: Implementing REDUCTION clause153956
! Node: Implementing PARALLEL construct154516
! Node: Implementing FOR construct155775
! Node: Implementing ORDERED construct157775
! Node: Implementing SECTIONS construct158083
! Node: Implementing SINGLE construct158851
! Node: Implementing OpenACC's PARALLEL construct159565
! Node: Reporting Bugs159825
! Node: Copying160188
! Node: GNU Free Documentation License197737
! Node: Funding222862
! Node: Library Index225388
  
  End Tag Table
--- 5529,5692 ----
  
  Tag Table:
  Node: Top2083
! Node: Enabling OpenMP4725
! Node: OpenMP Implementation Status5531
! Node: OpenMP 4.56086
! Node: OpenMP 5.06262
! Node: OpenMP 5.111132
! Node: Runtime Library Routines14723
! Node: omp_get_active_level18428
! Node: omp_get_ancestor_thread_num19128
! Node: omp_get_cancellation20058
! Node: omp_get_default_device20872
! Node: omp_get_device_num21551
! Node: omp_get_dynamic22356
! Node: omp_get_initial_device23236
! Node: omp_get_level23980
! Node: omp_get_max_active_levels24607
! Node: omp_get_max_task_priority25328
! Node: omp_get_max_teams25948
! Node: omp_get_max_threads26642
! Node: omp_get_nested27393
! Node: omp_get_num_devices29001
! Node: omp_get_num_procs29522
! Node: omp_get_num_teams30061
! Node: omp_get_num_threads30577
! Node: omp_get_proc_bind31666
! Node: omp_get_schedule32689
! Node: omp_get_supported_active_levels33658
! Node: omp_get_team_num34444
! Node: omp_get_team_size34958
! Node: omp_get_teams_thread_limit35924
! Node: omp_get_thread_limit36686
! Node: omp_get_thread_num37314
! Node: omp_in_parallel38186
! Node: omp_in_final38835
! Node: omp_is_initial_device39509
! Node: omp_set_default_device40202
! Node: omp_set_dynamic40993
! Node: omp_set_max_active_levels41879
! Node: omp_set_nested42801
! Node: omp_set_num_teams43996
! Node: omp_set_num_threads44869
! Node: omp_set_schedule45740
! Node: omp_set_teams_thread_limit46834
! Node: omp_init_lock47836
! Node: omp_set_lock48499
! Node: omp_test_lock49354
! Node: omp_unset_lock50330
! Node: omp_destroy_lock51261
! Node: omp_init_nest_lock51938
! Node: omp_set_nest_lock52673
! Node: omp_test_nest_lock53588
! Node: omp_unset_nest_lock54615
! Node: omp_destroy_nest_lock55630
! Node: omp_get_wtick56381
! Node: omp_get_wtime56973
! Node: omp_fulfill_event57775
! Node: Environment Variables58796
! Node: OMP_CANCELLATION60585
! Node: OMP_DISPLAY_ENV61118
! Node: OMP_DEFAULT_DEVICE61821
! Node: OMP_DYNAMIC62601
! Node: OMP_MAX_ACTIVE_LEVELS63197
! Node: OMP_MAX_TASK_PRIORITY64124
! Node: OMP_NESTED64782
! Node: OMP_NUM_TEAMS65809
! Node: OMP_NUM_THREADS66482
! Node: OMP_PROC_BIND67287
! Node: OMP_PLACES68629
! Node: OMP_STACKSIZE71318
! Node: OMP_SCHEDULE72142
! Node: OMP_TARGET_OFFLOAD72842
! Node: OMP_TEAMS_THREAD_LIMIT73804
! Node: OMP_THREAD_LIMIT74611
! Node: OMP_WAIT_POLICY75221
! Node: GOMP_CPU_AFFINITY75913
! Node: GOMP_DEBUG77643
! Node: GOMP_STACKSIZE78150
! Node: GOMP_SPINCOUNT78981
! Node: GOMP_RTEMS_THREAD_POOLS80185
! Node: Enabling OpenACC82368
! Node: OpenACC Runtime Library Routines83269
! Node: acc_get_num_devices87550
! Node: acc_set_device_type88276
! Node: acc_get_device_type89040
! Node: acc_set_device_num90053
! Node: acc_get_device_num90870
! Node: acc_get_property91669
! Node: acc_async_test93892
! Node: acc_async_test_all94880
! Node: acc_wait95780
! Node: acc_wait_all96643
! Node: acc_wait_all_async97404
! Node: acc_wait_async98156
! Node: acc_init98864
! Node: acc_shutdown99509
! Node: acc_on_device100176
! Node: acc_malloc101180
! Node: acc_free101679
! Node: acc_copyin102106
! Node: acc_present_or_copyin103693
! Node: acc_create105471
! Node: acc_present_or_create107103
! Node: acc_copyout108889
! Node: acc_delete111193
! Node: acc_update_device113440
! Node: acc_update_self115014
! Node: acc_map_data116604
! Node: acc_unmap_data117289
! Node: acc_deviceptr117810
! Node: acc_hostptr118380
! Node: acc_is_present118944
! Node: acc_memcpy_to_device120471
! Node: acc_memcpy_from_device121134
! Node: acc_attach121801
! Node: acc_detach122448
! Node: acc_get_current_cuda_device123227
! Node: acc_get_current_cuda_context123812
! Node: acc_get_cuda_stream124412
! Node: acc_set_cuda_stream125003
! Node: acc_prof_register125674
! Node: acc_prof_unregister126233
! Node: acc_prof_lookup126800
! Node: acc_register_library127321
! Node: OpenACC Environment Variables127887
! Node: ACC_DEVICE_TYPE128459
! Node: ACC_DEVICE_NUM128695
! Node: ACC_PROFLIB128949
! Node: GCC_ACC_NOTIFY129280
! Node: CUDA Streams Usage129500
! Ref: CUDA Streams Usage-Footnote-1131401
! Node: OpenACC Library Interoperability131510
! Ref: OpenACC Library Interoperability-Footnote-1137878
! Ref: OpenACC Library Interoperability-Footnote-2138130
! Node: OpenACC Profiling Interface138338
! Node: The libgomp ABI148366
! Node: Implementing MASTER construct149219
! Node: Implementing CRITICAL construct149636
! Node: Implementing ATOMIC construct150377
! Node: Implementing FLUSH construct150860
! Node: Implementing BARRIER construct151133
! Node: Implementing THREADPRIVATE construct151404
! Node: Implementing PRIVATE clause152059
! Node: Implementing FIRSTPRIVATE LASTPRIVATE COPYIN and COPYPRIVATE clauses152642
! Node: Implementing REDUCTION clause153968
! Node: Implementing PARALLEL construct154528
! Node: Implementing FOR construct155787
! Node: Implementing ORDERED construct157787
! Node: Implementing SECTIONS construct158095
! Node: Implementing SINGLE construct158863
! Node: Implementing OpenACC's PARALLEL construct159577
! Node: Reporting Bugs159837
! Node: Copying160200
! Node: GNU Free Documentation License197749
! Node: Funding222874
! Node: Library Index225400
  
  End Tag Table
+ 
+ 
+ Local Variables:
+ coding: utf-8
+ End:
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/Makefile.am gcc-12.4.0/libgomp/testsuite/Makefile.am
*** gcc-12.3.0/libgomp/testsuite/Makefile.am	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libgomp/testsuite/Makefile.am	Thu Jun 20 08:08:10 2024
*************** _RUNTEST = $(shell if test -f $(top_srcd
*** 12,17 ****
--- 12,19 ----
  	     echo $(top_srcdir)/../dejagnu/runtest; else echo runtest; fi)
  RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir
  
+ PWD_COMMAND = $${PWDCMD-pwd}
+ 
  EXTRA_DEJAGNU_SITE_CONFIG = libgomp-site-extra.exp
  
  # Instead of directly in ../testsuite/libgomp-test-support.exp.in, the
*************** libgomp-test-support.exp: libgomp-test-s
*** 25,41 ****
  	  'set offload_additional_lib_paths "$(offload_additional_lib_paths)"'
  	mv $@.tmp $@
  
- check-DEJAGNU: site.exp
- 	srcdir='$(srcdir)'; export srcdir; \
- 	EXPECT=$(EXPECT); export EXPECT; \
- 	if $(SHELL) -c "$(_RUNTEST) --version" > /dev/null 2>&1; then \
- 	  exit_status=0; l='$(PACKAGE)'; for tool in $$l; do \
- 	    if $(_RUNTEST) $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) $(RUNTESTFLAGS); \
- 	    then :; else exit_status=1; fi; \
- 	  done; \
- 	else echo "WARNING: could not find '$(_RUNTEST)'" 1>&2; :;\
- 	fi; \
- 	exit $$exit_status
  site.exp: Makefile $(EXTRA_DEJAGNU_SITE_CONFIG)
  	@echo 'Making a new site.exp file ...'
  	@echo '## these variables are automatically generated by make ##' >site.tmp
--- 27,32 ----
*************** site.exp: Makefile $(EXTRA_DEJAGNU_SITE_
*** 63,68 ****
--- 54,125 ----
  	@test ! -f site.exp || mv site.exp site.bak
  	@mv site.tmp site.exp
  
+ %/site.exp: site.exp
+ 	-@test -d $* || mkdir $*
+ 	@srcdir=`cd $(srcdir); ${PWD_COMMAND}`;
+ 	@objdir=`${PWD_COMMAND}`/$*; \
+ 	sed -e "s|^set srcdir .*$$|set srcdir $$srcdir|" \
+ 	    -e "s|^set objdir .*$$|set objdir $$objdir|" \
+ 	    site.exp > $*/site.exp.tmp
+ 	@-rm -f $*/site.bak
+ 	@test ! -f $*/site.exp || mv $*/site.exp $*/site.bak
+ 	@mv $*/site.exp.tmp $*/site.exp
+ 
+ check_p_numbers0:=1 2 3 4 5 6 7 8 9
+ check_p_numbers1:=0 $(check_p_numbers0)
+ check_p_numbers2:=$(foreach i,$(check_p_numbers0),$(addprefix $(i),$(check_p_numbers1)))
+ check_p_numbers3:=$(addprefix 0,$(check_p_numbers1)) $(check_p_numbers2)
+ check_p_numbers4:=$(foreach i,$(check_p_numbers0),$(addprefix $(i),$(check_p_numbers3)))
+ check_p_numbers5:=$(addprefix 0,$(check_p_numbers3)) $(check_p_numbers4)
+ check_p_numbers6:=$(foreach i,$(check_p_numbers0),$(addprefix $(i),$(check_p_numbers5)))
+ check_p_numbers:=$(check_p_numbers0) $(check_p_numbers2) $(check_p_numbers4) $(check_p_numbers6)
+ # If unable to serialize execution testing, use just one parallel slot.
+ gcc_test_parallel_slots:=$(if $(FLOCK),$(if $(GCC_TEST_PARALLEL_SLOTS),$(GCC_TEST_PARALLEL_SLOTS),19),1)
+ check_p_subdirs=$(wordlist 1,$(gcc_test_parallel_slots),$(check_p_numbers))
+ check_DEJAGNU_libgomp_targets = $(addprefix check-DEJAGNUlibgomp,$(check_p_subdirs))
+ $(check_DEJAGNU_libgomp_targets): check-DEJAGNUlibgomp%: libgomp%/site.exp
+ 
+ check-DEJAGNU $(check_DEJAGNU_libgomp_targets): check-DEJAGNU%: site.exp
+ 	$(if $*,@)AR="$(AR)"; export AR; \
+ 	RANLIB="$(RANLIB)"; export RANLIB; \
+ 	if [ -z "$*" ] && [ -n "$(filter -j%, $(MFLAGS))" ]; then \
+ 	  rm -rf libgomp-parallel || true; \
+ 	  mkdir libgomp-parallel; \
+ 	  $(MAKE) $(AM_MAKEFLAGS) $(check_DEJAGNU_libgomp_targets); \
+ 	  rm -rf libgomp-parallel || true; \
+ 	  for idx in $(check_p_subdirs); do \
+ 	    if [ -d libgomp$$idx ]; then \
+ 	      mv -f libgomp$$idx/libgomp.sum libgomp$$idx/libgomp.sum.sep; \
+ 	      mv -f libgomp$$idx/libgomp.log libgomp$$idx/libgomp.log.sep; \
+ 	    fi; \
+ 	  done; \
+ 	  $(SHELL) $(srcdir)/../../contrib/dg-extract-results.sh \
+ 	    libgomp[0-9]*/libgomp.sum.sep > libgomp.sum; \
+ 	  $(SHELL) $(srcdir)/../../contrib/dg-extract-results.sh -L \
+ 	    libgomp[0-9]*/libgomp.log.sep > libgomp.log; \
+ 	  exit 0; \
+ 	fi; \
+ 	srcdir=`$(am__cd) $(srcdir) && pwd`; export srcdir; \
+ 	EXPECT=$(EXPECT); export EXPECT; \
+ 	runtest=$(_RUNTEST); \
+ 	if [ -z "$$runtest" ]; then runtest=runtest; fi; \
+ 	tool=libgomp; \
+ 	if [ -n "$*" ]; then \
+ 	  if [ -f libgomp-parallel/finished ]; then rm -rf "$*"; exit 0; fi; \
+ 	  GCC_RUNTEST_PARALLELIZE_DIR=`${PWD_COMMAND}`/libgomp-parallel; \
+ 	  export GCC_RUNTEST_PARALLELIZE_DIR; \
+ 	  cd "$*"; \
+ 	fi; \
+ 	if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
+ 	  $$runtest $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) \
+ 		    $(RUNTESTFLAGS); \
+ 	  if [ -n "$*" ]; then \
+ 	    touch $$GCC_RUNTEST_PARALLELIZE_DIR/finished; \
+ 	  fi; \
+ 	else \
+ 	  echo "WARNING: could not find \`runtest'" 1>&2; :;\
+ 	fi
+ 
  distclean-DEJAGNU:
  	-rm -f site.exp site.bak
  	-l='$(PACKAGE)'; for tool in $$l; do \
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/Makefile.in gcc-12.4.0/libgomp/testsuite/Makefile.in
*** gcc-12.3.0/libgomp/testsuite/Makefile.in	Mon May  8 12:15:24 2023
--- gcc-12.4.0/libgomp/testsuite/Makefile.in	Thu Jun 20 08:10:28 2024
*************** EXEEXT = @EXEEXT@
*** 162,167 ****
--- 162,168 ----
  FC = @FC@
  FCFLAGS = @FCFLAGS@
  FGREP = @FGREP@
+ FLOCK = @FLOCK@
  GREP = @GREP@
  HSA_RUNTIME_INCLUDE = @HSA_RUNTIME_INCLUDE@
  HSA_RUNTIME_LIB = @HSA_RUNTIME_LIB@
*************** _RUNTEST = $(shell if test -f $(top_srcd
*** 310,316 ****
--- 311,330 ----
  	     echo $(top_srcdir)/../dejagnu/runtest; else echo runtest; fi)
  
  RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir
+ PWD_COMMAND = $${PWDCMD-pwd}
  EXTRA_DEJAGNU_SITE_CONFIG = libgomp-site-extra.exp
+ check_p_numbers0 := 1 2 3 4 5 6 7 8 9
+ check_p_numbers1 := 0 $(check_p_numbers0)
+ check_p_numbers2 := $(foreach i,$(check_p_numbers0),$(addprefix $(i),$(check_p_numbers1)))
+ check_p_numbers3 := $(addprefix 0,$(check_p_numbers1)) $(check_p_numbers2)
+ check_p_numbers4 := $(foreach i,$(check_p_numbers0),$(addprefix $(i),$(check_p_numbers3)))
+ check_p_numbers5 := $(addprefix 0,$(check_p_numbers3)) $(check_p_numbers4)
+ check_p_numbers6 := $(foreach i,$(check_p_numbers0),$(addprefix $(i),$(check_p_numbers5)))
+ check_p_numbers := $(check_p_numbers0) $(check_p_numbers2) $(check_p_numbers4) $(check_p_numbers6)
+ # If unable to serialize execution testing, use just one parallel slot.
+ gcc_test_parallel_slots := $(if $(FLOCK),$(if $(GCC_TEST_PARALLEL_SLOTS),$(GCC_TEST_PARALLEL_SLOTS),19),1)
+ check_p_subdirs = $(wordlist 1,$(gcc_test_parallel_slots),$(check_p_numbers))
+ check_DEJAGNU_libgomp_targets = $(addprefix check-DEJAGNUlibgomp,$(check_p_subdirs))
  all: all-am
  
  .SUFFIXES:
*************** libgomp-test-support.exp: libgomp-test-s
*** 485,501 ****
  	  'set offload_additional_lib_paths "$(offload_additional_lib_paths)"'
  	mv $@.tmp $@
  
- check-DEJAGNU: site.exp
- 	srcdir='$(srcdir)'; export srcdir; \
- 	EXPECT=$(EXPECT); export EXPECT; \
- 	if $(SHELL) -c "$(_RUNTEST) --version" > /dev/null 2>&1; then \
- 	  exit_status=0; l='$(PACKAGE)'; for tool in $$l; do \
- 	    if $(_RUNTEST) $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) $(RUNTESTFLAGS); \
- 	    then :; else exit_status=1; fi; \
- 	  done; \
- 	else echo "WARNING: could not find '$(_RUNTEST)'" 1>&2; :;\
- 	fi; \
- 	exit $$exit_status
  site.exp: Makefile $(EXTRA_DEJAGNU_SITE_CONFIG)
  	@echo 'Making a new site.exp file ...'
  	@echo '## these variables are automatically generated by make ##' >site.tmp
--- 499,504 ----
*************** site.exp: Makefile $(EXTRA_DEJAGNU_SITE_
*** 523,528 ****
--- 526,584 ----
  	@test ! -f site.exp || mv site.exp site.bak
  	@mv site.tmp site.exp
  
+ %/site.exp: site.exp
+ 	-@test -d $* || mkdir $*
+ 	@srcdir=`cd $(srcdir); ${PWD_COMMAND}`;
+ 	@objdir=`${PWD_COMMAND}`/$*; \
+ 	sed -e "s|^set srcdir .*$$|set srcdir $$srcdir|" \
+ 	    -e "s|^set objdir .*$$|set objdir $$objdir|" \
+ 	    site.exp > $*/site.exp.tmp
+ 	@-rm -f $*/site.bak
+ 	@test ! -f $*/site.exp || mv $*/site.exp $*/site.bak
+ 	@mv $*/site.exp.tmp $*/site.exp
+ $(check_DEJAGNU_libgomp_targets): check-DEJAGNUlibgomp%: libgomp%/site.exp
+ 
+ check-DEJAGNU $(check_DEJAGNU_libgomp_targets): check-DEJAGNU%: site.exp
+ 	$(if $*,@)AR="$(AR)"; export AR; \
+ 	RANLIB="$(RANLIB)"; export RANLIB; \
+ 	if [ -z "$*" ] && [ -n "$(filter -j%, $(MFLAGS))" ]; then \
+ 	  rm -rf libgomp-parallel || true; \
+ 	  mkdir libgomp-parallel; \
+ 	  $(MAKE) $(AM_MAKEFLAGS) $(check_DEJAGNU_libgomp_targets); \
+ 	  rm -rf libgomp-parallel || true; \
+ 	  for idx in $(check_p_subdirs); do \
+ 	    if [ -d libgomp$$idx ]; then \
+ 	      mv -f libgomp$$idx/libgomp.sum libgomp$$idx/libgomp.sum.sep; \
+ 	      mv -f libgomp$$idx/libgomp.log libgomp$$idx/libgomp.log.sep; \
+ 	    fi; \
+ 	  done; \
+ 	  $(SHELL) $(srcdir)/../../contrib/dg-extract-results.sh \
+ 	    libgomp[0-9]*/libgomp.sum.sep > libgomp.sum; \
+ 	  $(SHELL) $(srcdir)/../../contrib/dg-extract-results.sh -L \
+ 	    libgomp[0-9]*/libgomp.log.sep > libgomp.log; \
+ 	  exit 0; \
+ 	fi; \
+ 	srcdir=`$(am__cd) $(srcdir) && pwd`; export srcdir; \
+ 	EXPECT=$(EXPECT); export EXPECT; \
+ 	runtest=$(_RUNTEST); \
+ 	if [ -z "$$runtest" ]; then runtest=runtest; fi; \
+ 	tool=libgomp; \
+ 	if [ -n "$*" ]; then \
+ 	  if [ -f libgomp-parallel/finished ]; then rm -rf "$*"; exit 0; fi; \
+ 	  GCC_RUNTEST_PARALLELIZE_DIR=`${PWD_COMMAND}`/libgomp-parallel; \
+ 	  export GCC_RUNTEST_PARALLELIZE_DIR; \
+ 	  cd "$*"; \
+ 	fi; \
+ 	if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
+ 	  $$runtest $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) \
+ 		    $(RUNTESTFLAGS); \
+ 	  if [ -n "$*" ]; then \
+ 	    touch $$GCC_RUNTEST_PARALLELIZE_DIR/finished; \
+ 	  fi; \
+ 	else \
+ 	  echo "WARNING: could not find \`runtest'" 1>&2; :;\
+ 	fi
+ 
  distclean-DEJAGNU:
  	-rm -f site.exp site.bak
  	-l='$(PACKAGE)'; for tool in $$l; do \
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/config/default.exp gcc-12.4.0/libgomp/testsuite/config/default.exp
*** gcc-12.3.0/libgomp/testsuite/config/default.exp	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libgomp/testsuite/config/default.exp	Thu Jun 20 08:08:10 2024
***************
*** 13,17 ****
  # You should have received a copy of the GNU General Public License
  # along with this program; see the file COPYING3.  If not see
  # <http://www.gnu.org/licenses/>.
- 
- load_lib "standard.exp"
--- 13,15 ----
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/flock gcc-12.4.0/libgomp/testsuite/flock
*** gcc-12.3.0/libgomp/testsuite/flock	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libgomp/testsuite/flock	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,17 ----
+ #!/usr/bin/env perl
+ 
+ use strict;
+ use warnings;
+ 
+ # Only arguments '--exclusive 1' exactly are supported.
+ (@ARGV == 2) or die;
+ my $mode = shift;
+ ($mode eq "--exclusive") or die;
+ my $fd = shift;
+ ($fd eq "1") or die;
+ 
+ use Fcntl ':flock';
+ 
+ open(my $fh, '>&=', 1) or die "open: $!";
+ 
+ flock($fh, LOCK_EX) or die "flock: $!";
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/lib/libgomp.exp gcc-12.4.0/libgomp/testsuite/lib/libgomp.exp
*** gcc-12.3.0/libgomp/testsuite/lib/libgomp.exp	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libgomp/testsuite/lib/libgomp.exp	Thu Jun 20 08:08:10 2024
*************** proc load_gcc_lib { filename } {
*** 9,14 ****
--- 9,15 ----
  }
  
  load_lib dg.exp
+ load_lib standard.exp
  
  # Required to use gcc-dg.exp - however, the latter should NOT be
  # loaded until ${tool}_target_compile is defined since it uses that
*************** load_gcc_lib torture-options.exp
*** 40,46 ****
  load_gcc_lib fortran-modules.exp
  
  # Try to load a test support file, built during libgomp configuration.
! load_file libgomp-test-support.exp
  
  set dg-do-what-default run
  
--- 41,52 ----
  load_gcc_lib fortran-modules.exp
  
  # Try to load a test support file, built during libgomp configuration.
! # Search in '..' vs. '.' to support parallel vs. sequential testing.
! if [info exists ::env(GCC_RUNTEST_PARALLELIZE_DIR)] {
!     load_file ../libgomp-test-support.exp
! } else {
!     load_file libgomp-test-support.exp
! }
  
  set dg-do-what-default run
  
*************** proc libgomp_option_proc { option } {
*** 319,324 ****
--- 325,360 ----
      }
  }
  
+ if ![info exists ::env(GCC_RUNTEST_PARALLELIZE_DIR)] {
+     # No parallel testing.
+ } elseif { $FLOCK == "" } {
+     # Using just one parallel slot.
+ } else {
+     # Using several parallel slots.  Override DejaGnu
+     # 'standard.exp:${tool}_load'...
+     rename libgomp_load standard_libgomp_load
+     proc libgomp_load { program args } {
+ 	# ... in order to serialize execution testing via an exclusive lock.
+ 	# We use stdout, as per <https://perldoc.perl.org/functions/flock>
+ 	# "[...] FILEHANDLE [...] be open with write intent to use LOCK_EX".
+ 	set lock_file ../lock
+ 	set lock_kind --exclusive
+ 	set lock_fd [open $lock_file a+]
+ 	set lock_clock_begin [clock seconds]
+ 	global FLOCK
+ 	exec $FLOCK $lock_kind 1 >@ $lock_fd
+ 	set lock_clock_end [clock seconds]
+ 	verbose -log "Got ${FLOCK}('$lock_file', '$lock_kind') at [clock format $lock_clock_end] after [expr $lock_clock_end - $lock_clock_begin] s" 2
+ 
+ 	set result [standard_libgomp_load $program $args]
+ 
+ 	# Unlock (implicit with 'close').
+ 	close $lock_fd
+ 
+ 	return $result
+     }
+ }
+ 
  # Translate offload target to OpenACC device type.  Return the empty string if
  # not supported, and 'host' for offload target 'disable'.
  proc offload_target_to_openacc_device_type { offload_target } {
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/libgomp-site-extra.exp.in gcc-12.4.0/libgomp/testsuite/libgomp-site-extra.exp.in
*** gcc-12.3.0/libgomp/testsuite/libgomp-site-extra.exp.in	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libgomp/testsuite/libgomp-site-extra.exp.in	Thu Jun 20 08:08:10 2024
***************
*** 1 ****
--- 1,2 ----
+ set FLOCK {@FLOCK@}
  set GCC_UNDER_TEST {@CC@}
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/libgomp.c++/c++.exp gcc-12.4.0/libgomp/testsuite/libgomp.c++/c++.exp
*** gcc-12.3.0/libgomp/testsuite/libgomp.c++/c++.exp	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libgomp/testsuite/libgomp.c++/c++.exp	Thu Jun 20 08:08:10 2024
*************** if { $lang_test_file_found } {
*** 66,78 ****
  
      set flags_file "${blddir}/../libstdc++-v3/scripts/testsuite_flags"
      if { [file exists $flags_file] } {
! 	set libstdcxx_includes [exec sh $flags_file --build-includes]
!     } else {
! 	set libstdcxx_includes ""
      }
  
      # Main loop.
!     dg-runtest $tests "" "$libstdcxx_includes $DEFAULT_CFLAGS"
  }
  
  # See above.
--- 66,77 ----
  
      set flags_file "${blddir}/../libstdc++-v3/scripts/testsuite_flags"
      if { [file exists $flags_file] } {
! 	set lang_source_re {^.*\.[cC]$}
! 	set lang_include_flags [exec sh $flags_file --build-includes]
      }
  
      # Main loop.
!     dg-runtest $tests "" $DEFAULT_CFLAGS
  }
  
  # See above.
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/libgomp.c++/pr114572.C gcc-12.4.0/libgomp/testsuite/libgomp.c++/pr114572.C
*** gcc-12.3.0/libgomp/testsuite/libgomp.c++/pr114572.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libgomp/testsuite/libgomp.c++/pr114572.C	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,24 ----
+ // PR c++/114572
+ // { dg-do run }
+ // { dg-options "-fopenmp -O0" }
+ 
+ #include <stdlib.h>
+ 
+ struct S
+ {
+   S () : s (0) {}
+   ~S () {}
+   S operator= (const S &x) { s = x.s; return *this; }
+   int s;
+ };
+ 
+ int
+ main ()
+ {
+   S s;
+   #pragma omp parallel for lastprivate(s)
+   for (int i = 0; i < 10; ++i)
+     s.s = i;
+   if (s.s != 9)
+     abort ();
+ }
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/libgomp.c-c++-common/non-rect-loop-1.c gcc-12.4.0/libgomp/testsuite/libgomp.c-c++-common/non-rect-loop-1.c
*** gcc-12.3.0/libgomp/testsuite/libgomp.c-c++-common/non-rect-loop-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libgomp/testsuite/libgomp.c-c++-common/non-rect-loop-1.c	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,72 ----
+ /* PR middle-end/111017  */
+ 
+ #include <omp.h>
+ 
+ #define DIM 32
+ #define N (DIM*DIM)
+ 
+ int
+ main ()
+ {
+   int a[N], b[N], c[N];
+   int dim = DIM;
+ 
+   for (int i = 0; i < N; i++)
+     {
+       a[i] = 3*i;
+       b[i] = 7*i;
+       c[i] = 42;
+     }
+ 
+   #pragma omp parallel for collapse(2)
+   for (int i = 0; i < DIM; i++)
+     for (int j = (i*DIM); j < (i*DIM + DIM); j++)
+       c[j] = a[j] + b[j];
+ 
+   for (int i = 0; i < DIM; i++)
+     for (int j = (i*DIM); j < (i*DIM + DIM); j++)
+       if (c[j] != a[j] + b[j] || c[j] != 3*j +7*j)
+ 	__builtin_abort ();
+   for (int i = 0; i < N; i++)
+     c[i] = 42;
+ 
+   #pragma omp parallel for collapse(2)
+   for (int i = 0; i < dim; i++)
+     for (int j = (i*dim); j < (i*dim + dim); j++)
+       c[j] = a[j] + b[j];
+ 
+   for (int i = 0; i < DIM; i++)
+     for (int j = (i*DIM); j < (i*DIM + DIM); j++)
+       if (c[j] != a[j] + b[j] || c[j] != 3*j +7*j)
+ 	__builtin_abort ();
+   for (int i = 0; i < N; i++)
+     c[i] = 42;
+ 
+   for (int dev = 0; dev <= omp_get_num_devices(); dev++)
+     {
+       #pragma omp target teams loop device(dev) map(to:a,b) map(from:c)
+       for (int i = 0; i < DIM; i++)
+ 	for (int j = (i*DIM); j < (i*DIM + DIM); j++)
+ 	  c[j] = a[j] + b[j];
+ 
+       for (int i = 0; i < DIM; i++)
+ 	for (int j = (i*DIM); j < (i*DIM + DIM); j++)
+ 	  if (c[j] != a[j] + b[j] || c[j] != 3*j +7*j)
+ 	    __builtin_abort ();
+       for (int i = 0; i < N; i++)
+ 	c[i] = 42;
+ 
+       #pragma omp target teams loop device(dev) map(to:a,b) map(from:c)
+       for (int i = 0; i < dim; i++)
+ 	for (int j = (i*dim); j < (i*dim + dim); j++)
+ 	  c[j] = a[j] + b[j];
+ 
+       for (int i = 0; i < DIM; i++)
+ 	for (int j = (i*DIM); j < (i*DIM + DIM); j++)
+ 	  if (c[j] != a[j] + b[j] || c[j] != 3*j +7*j)
+ 	    __builtin_abort ();
+       for (int i = 0; i < N; i++)
+ 	c[i] = 42;
+     }
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/libgomp.oacc-c++/c++.exp gcc-12.4.0/libgomp/testsuite/libgomp.oacc-c++/c++.exp
*** gcc-12.3.0/libgomp/testsuite/libgomp.oacc-c++/c++.exp	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libgomp/testsuite/libgomp.oacc-c++/c++.exp	Thu Jun 20 08:08:10 2024
*************** if { $lang_test_file_found } {
*** 72,80 ****
  
      set flags_file "${blddir}/../libstdc++-v3/scripts/testsuite_flags"
      if { [file exists $flags_file] } {
! 	set libstdcxx_includes [exec sh $flags_file --build-includes]
!     } else {
! 	set libstdcxx_includes ""
      }
  
      # Test with all available offload targets, and with offloading disabled.
--- 72,79 ----
  
      set flags_file "${blddir}/../libstdc++-v3/scripts/testsuite_flags"
      if { [file exists $flags_file] } {
! 	set lang_source_re {^.*\.[cC]$}
! 	set lang_include_flags [exec sh $flags_file --build-includes]
      }
  
      # Test with all available offload targets, and with offloading disabled.
*************** if { $lang_test_file_found } {
*** 147,153 ****
  	    }
  	}
  
! 	gcc-dg-runtest $tests "$tagopt" "$libstdcxx_includes"
      }
      unset offload_target
  } else {
--- 146,152 ----
  	    }
  	}
  
! 	gcc-dg-runtest $tests "$tagopt" ""
      }
      unset offload_target
  } else {
diff -Nrcpad gcc-12.3.0/libiberty/ChangeLog gcc-12.4.0/libiberty/ChangeLog
*** gcc-12.3.0/libiberty/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libiberty/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libitm/ChangeLog gcc-12.4.0/libitm/ChangeLog
*** gcc-12.3.0/libitm/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libitm/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libitm/libitm.info gcc-12.4.0/libitm/libitm.info
*** gcc-12.3.0/libitm/libitm.info	Mon May  8 12:32:40 2023
--- gcc-12.4.0/libitm/libitm.info	Thu Jun 20 08:33:24 2024
***************
*** 1,4 ****
! This is libitm.info, produced by makeinfo version 6.5 from libitm.texi.
  
  Copyright (C) 2011-2022 Free Software Foundation, Inc.
  
--- 1,4 ----
! This is libitm.info, produced by makeinfo version 6.8 from libitm.texi.
  
  Copyright (C) 2011-2022 Free Software Foundation, Inc.
  
*************** Node: GNU Free Documentation License358
*** 1306,1308 ****
--- 1306,1313 ----
  Node: Library Index61023
  
  End Tag Table
+ 
+ 
+ Local Variables:
+ coding: utf-8
+ End:
diff -Nrcpad gcc-12.3.0/libobjc/ChangeLog gcc-12.4.0/libobjc/ChangeLog
*** gcc-12.3.0/libobjc/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libobjc/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/liboffloadmic/ChangeLog gcc-12.4.0/liboffloadmic/ChangeLog
*** gcc-12.3.0/liboffloadmic/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/liboffloadmic/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libphobos/ChangeLog gcc-12.4.0/libphobos/ChangeLog
*** gcc-12.3.0/libphobos/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libphobos/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,31 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-04-21  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* configure.tgt: Enable libphobos for Darwin >= 12.
+ 
+ 2024-04-04  Iain Sandoe  <iainsandoe@Apollo-3-VM-Lion-0-187.local>
+ 
+ 	Backported from master:
+ 	2023-07-01  Iain Sandoe  <iainsandoe@Apollo-3-VM-Lion-0-187.local>
+ 
+ 	PR d/103944
+ 	* testsuite/libphobos.gc/forkgc2.d: Skip for Darwin.
+ 
+ 2023-11-07  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2023-11-07  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	* libdruntime/core/cpuid.d (getCpuInfo0B): Limit number of times loop
+ 	runs.
+ 
+ 2023-06-06  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	* src/MERGE: Merge upstream phobos 8e8aaae50.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libphobos/configure.tgt gcc-12.4.0/libphobos/configure.tgt
*** gcc-12.3.0/libphobos/configure.tgt	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libphobos/configure.tgt	Thu Jun 20 08:08:10 2024
*************** case "${target}" in
*** 27,32 ****
--- 27,35 ----
    *-*-dragonfly*)
  	LIBPHOBOS_SUPPORTED=yes
  	;;
+   aarch64-*-darwin2*)
+ 	LIBPHOBOS_SUPPORTED=yes
+ 	;;
    aarch64*-*-linux*)
  	LIBPHOBOS_SUPPORTED=yes
  	;;
*************** case "${target}" in
*** 55,60 ****
--- 58,69 ----
    sparc*-*-solaris2.11*)
  	LIBPHOBOS_SUPPORTED=yes
  	;;
+   *-*-darwin9* | *-*-darwin1[01]*)
+ 	LIBDRUNTIME_ONLY=yes
+ 	;;
+   x86_64-*-darwin1[2-9]* | x86_64-*-darwin2* | i?86-*-darwin1[2-7])
+ 	LIBPHOBOS_SUPPORTED=yes
+ 	;;
    x86_64-*-freebsd* | i?86-*-freebsd*)
  	LIBPHOBOS_SUPPORTED=yes
  	;;
diff -Nrcpad gcc-12.3.0/libphobos/libdruntime/core/cpuid.d gcc-12.4.0/libphobos/libdruntime/core/cpuid.d
*** gcc-12.3.0/libphobos/libdruntime/core/cpuid.d	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libphobos/libdruntime/core/cpuid.d	Thu Jun 20 08:08:10 2024
*************** void getAMDcacheinfo()
*** 651,660 ****
  // to determine number of processors.
  void getCpuInfo0B()
  {
-     int level=0;
      int threadsPerCore;
      uint a, b, c, d;
!     do {
          version (GNU_OR_LDC) asm pure nothrow @nogc {
              "cpuid" : "=a" (a), "=b" (b), "=c" (c), "=d" (d) : "a" (0x0B), "c" (level);
          } else asm pure nothrow @nogc {
--- 651,662 ----
  // to determine number of processors.
  void getCpuInfo0B()
  {
      int threadsPerCore;
      uint a, b, c, d;
!     // I'm not sure about this. The docs state that there
!     // are 2 hyperthreads per core if HT is factory enabled.
!     for (int level = 0; level < 2; level++)
!     {
          version (GNU_OR_LDC) asm pure nothrow @nogc {
              "cpuid" : "=a" (a), "=b" (b), "=c" (c), "=d" (d) : "a" (0x0B), "c" (level);
          } else asm pure nothrow @nogc {
*************** void getCpuInfo0B()
*** 666,684 ****
              mov c, ECX;
              mov d, EDX;
          }
!         if (b!=0) {
!            // I'm not sure about this. The docs state that there
!            // are 2 hyperthreads per core if HT is factory enabled.
!             if (level==0)
                  threadsPerCore = b & 0xFFFF;
!             else if (level==1) {
                  cpuFeatures.maxThreads = b & 0xFFFF;
                  cpuFeatures.maxCores = cpuFeatures.maxThreads / threadsPerCore;
              }
- 
          }
!         ++level;
!     } while (a!=0 || b!=0);
  }
  
  void cpuidX86()
--- 668,687 ----
              mov c, ECX;
              mov d, EDX;
          }
!         if (b != 0)
!         {
!             if (level == 0)
                  threadsPerCore = b & 0xFFFF;
!             else if (level == 1)
!             {
                  cpuFeatures.maxThreads = b & 0xFFFF;
                  cpuFeatures.maxCores = cpuFeatures.maxThreads / threadsPerCore;
              }
          }
!         // Got "invalid domain" returned from cpuid
!         if (a == 0 && b == 0)
!             break;
!     }
  }
  
  void cpuidX86()
diff -Nrcpad gcc-12.3.0/libphobos/src/MERGE gcc-12.4.0/libphobos/src/MERGE
*** gcc-12.3.0/libphobos/src/MERGE	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libphobos/src/MERGE	Thu Jun 20 08:08:10 2024
***************
*** 1,4 ****
! 5fef0d28fc873fb5a0dbfb9149759d76a7b9f1b7
  
  The first line of this file holds the git revision number of the last
  merge done from the dlang/phobos repository.
--- 1,4 ----
! 8e8aaae5080ccc2e0a2202cbe9778dca96496a95
  
  The first line of this file holds the git revision number of the last
  merge done from the dlang/phobos repository.
diff -Nrcpad gcc-12.3.0/libphobos/src/std/container/array.d gcc-12.4.0/libphobos/src/std/container/array.d
*** gcc-12.3.0/libphobos/src/std/container/array.d	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libphobos/src/std/container/array.d	Thu Jun 20 08:08:10 2024
*************** if (!is(immutable T == immutable bool))
*** 412,420 ****
                      .destroy(e);
  
              static if (hasIndirections!T)
!                 GC.removeRange(_payload.ptr);
  
!             free(_payload.ptr);
          }
  
          this(this) @disable;
--- 412,420 ----
                      .destroy(e);
  
              static if (hasIndirections!T)
!                 GC.removeRange(cast(void*) _payload.ptr);
  
!             free(cast(void*) _payload.ptr);
          }
  
          this(this) @disable;
*************** if (!is(immutable T == immutable bool))
*** 489,502 ****
                  auto newPayload = newPayloadPtr[0 .. oldLength];
  
                  // copy old data over to new array
!                 memcpy(newPayload.ptr, _payload.ptr, T.sizeof * oldLength);
                  // Zero out unused capacity to prevent gc from seeing false pointers
!                 memset(newPayload.ptr + oldLength,
                          0,
                          (elements - oldLength) * T.sizeof);
!                 GC.addRange(newPayload.ptr, sz);
!                 GC.removeRange(_payload.ptr);
!                 free(_payload.ptr);
                  _payload = newPayload;
              }
              else
--- 489,502 ----
                  auto newPayload = newPayloadPtr[0 .. oldLength];
  
                  // copy old data over to new array
!                 memcpy(cast(void*) newPayload.ptr, cast(void*) _payload.ptr, T.sizeof * oldLength);
                  // Zero out unused capacity to prevent gc from seeing false pointers
!                 memset( cast(void*) (newPayload.ptr + oldLength),
                          0,
                          (elements - oldLength) * T.sizeof);
!                 GC.addRange(cast(void*) newPayload.ptr, sz);
!                 GC.removeRange(cast(void*) _payload.ptr);
!                 free(cast(void*) _payload.ptr);
                  _payload = newPayload;
              }
              else
*************** if (!is(immutable T == immutable bool))
*** 611,622 ****
          return opEquals(rhs);
      }
  
      /// ditto
      bool opEquals(ref const Array rhs) const
      {
          if (empty) return rhs.empty;
          if (rhs.empty) return false;
!         return _data._payload == rhs._data._payload;
      }
  
      /**
--- 611,627 ----
          return opEquals(rhs);
      }
  
+     // fix https://issues.dlang.org/show_bug.cgi?23140
+     private alias Unshared(T) = T;
+     private alias Unshared(T: shared U, U) = U;
+ 
      /// ditto
      bool opEquals(ref const Array rhs) const
      {
          if (empty) return rhs.empty;
          if (rhs.empty) return false;
! 
!         return cast(Unshared!(T)[]) _data._payload ==  cast(Unshared!(T)[]) rhs._data._payload;
      }
  
      /**
*************** if (!is(immutable T == immutable bool))
*** 1740,1745 ****
--- 1745,1760 ----
      assertThrown!AssertError(array.length = 5);
  }
  
+ // https://issues.dlang.org/show_bug.cgi?id=23140
+ @system unittest
+ {
+     shared class C
+     {
+     }
+ 
+     Array!C ac;
+     ac = Array!C([new C]);
+ }
  ////////////////////////////////////////////////////////////////////////////////
  // Array!bool
  ////////////////////////////////////////////////////////////////////////////////
diff -Nrcpad gcc-12.3.0/libphobos/src/std/typecons.d gcc-12.4.0/libphobos/src/std/typecons.d
*** gcc-12.3.0/libphobos/src/std/typecons.d	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libphobos/src/std/typecons.d	Thu Jun 20 08:08:10 2024
*************** Params:
*** 3793,3800 ****
--- 3793,3820 ----
                  sink.formatValue(_value, fmt);
              }
          }
+ 
+         void toString()(scope void delegate(const(char)[]) sink, scope const ref FormatSpec!char fmt) const
+         {
+             if (isNull)
+             {
+                 sink.formatValue("Nullable.null", fmt);
+             }
+             else
+             {
+                 sink.formatValue(_value, fmt);
+             }
+         }
      }
  
+ @system unittest
+ {
+     import std.conv : to;
+ 
+     const Nullable!(ulong, 0) x = 1;
+     assert(x.to!string == "1");
+ }
+ 
  /**
  Check if `this` is in the null state.
  
*************** Params:
*** 4320,4327 ****
--- 4340,4367 ----
                  sink.formatValue(*_value, fmt);
              }
          }
+ 
+         void toString()(scope void delegate(const(char)[]) sink, scope const ref FormatSpec!char fmt) const
+         {
+             if (isNull)
+             {
+                 sink.formatValue("Nullable.null", fmt);
+             }
+             else
+             {
+                 sink.formatValue(*_value, fmt);
+             }
+         }
      }
  
+ @system unittest
+ {
+     import std.conv : to;
+ 
+     const NullableRef!(ulong) x = new ulong(1);
+     assert(x.to!string == "1");
+ }
+ 
  /**
  Binds the internal state to `value`.
  
diff -Nrcpad gcc-12.3.0/libphobos/testsuite/libphobos.gc/forkgc2.d gcc-12.4.0/libphobos/testsuite/libphobos.gc/forkgc2.d
*** gcc-12.3.0/libphobos/testsuite/libphobos.gc/forkgc2.d	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libphobos/testsuite/libphobos.gc/forkgc2.d	Thu Jun 20 08:08:10 2024
***************
*** 1,3 ****
--- 1,4 ----
+ // { dg-skip-if "test hangs the testsuite PR103944" { *-*-darwin* } }
  import core.stdc.stdlib : exit;
  import core.sys.posix.sys.wait : waitpid;
  import core.sys.posix.unistd : fork;
diff -Nrcpad gcc-12.3.0/libquadmath/ChangeLog gcc-12.4.0/libquadmath/ChangeLog
*** gcc-12.3.0/libquadmath/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libquadmath/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,18 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-11  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-03  Simon Chopin  <simon.chopin@canonical.com>
+ 		    Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR libquadmath/114533
+ 	* printf/printf_fp.c (__quadmath_printf_fp): Use memcpy to copy
+ 	__float128 out of args.
+ 	* printf/printf_fphex.c (__quadmath_printf_fphex): Likewise.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libquadmath/libquadmath.info gcc-12.4.0/libquadmath/libquadmath.info
*** gcc-12.3.0/libquadmath/libquadmath.info	Mon May  8 12:32:38 2023
--- gcc-12.4.0/libquadmath/libquadmath.info	Thu Jun 20 08:33:19 2024
***************
*** 1,4 ****
! This is libquadmath.info, produced by makeinfo version 6.5 from
  libquadmath.texi.
  
  Copyright (C) 2010-2022 Free Software Foundation, Inc.
--- 1,4 ----
! This is libquadmath.info, produced by makeinfo version 6.8 from
  libquadmath.texi.
  
  Copyright (C) 2010-2022 Free Software Foundation, Inc.
*************** Node: GNU Free Documentation License109
*** 809,811 ****
--- 809,816 ----
  Node: Reporting Bugs36068
  
  End Tag Table
+ 
+ 
+ Local Variables:
+ coding: utf-8
+ End:
diff -Nrcpad gcc-12.3.0/libquadmath/printf/printf_fp.c gcc-12.4.0/libquadmath/printf/printf_fp.c
*** gcc-12.3.0/libquadmath/printf/printf_fp.c	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libquadmath/printf/printf_fp.c	Thu Jun 20 08:08:10 2024
*************** __quadmath_printf_fp (struct __quadmath_
*** 363,369 ****
  
    /* Fetch the argument value.	*/
      {
!       fpnum = **(const __float128 **) args[0];
  
        /* Check for special values: not a number or infinity.  */
        if (isnanq (fpnum))
--- 363,369 ----
  
    /* Fetch the argument value.	*/
      {
!       memcpy (&fpnum, *(const void *const *) args[0], sizeof (fpnum));
  
        /* Check for special values: not a number or infinity.  */
        if (isnanq (fpnum))
diff -Nrcpad gcc-12.3.0/libquadmath/printf/printf_fphex.c gcc-12.4.0/libquadmath/printf/printf_fphex.c
*** gcc-12.3.0/libquadmath/printf/printf_fphex.c	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libquadmath/printf/printf_fphex.c	Thu Jun 20 08:08:10 2024
*************** __quadmath_printf_fphex (struct __quadma
*** 163,169 ****
  
    /* Fetch the argument value.	*/
      {
!       fpnum.value = **(const __float128 **) args[0];
  
        /* Check for special values: not a number or infinity.  */
        if (isnanq (fpnum.value))
--- 163,170 ----
  
    /* Fetch the argument value.	*/
      {
!       memcpy (&fpnum.value, *(const void *const *) args[0],
! 	      sizeof (fpnum.value));
  
        /* Check for special values: not a number or infinity.  */
        if (isnanq (fpnum.value))
diff -Nrcpad gcc-12.3.0/libsanitizer/ChangeLog gcc-12.4.0/libsanitizer/ChangeLog
*** gcc-12.3.0/libsanitizer/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libsanitizer/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,15 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2023-05-21  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2023-04-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* configure.tgt: Unsupport Darwin22+ until a mechanism can be found
+ 	to locate dyld in the shared cache.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libsanitizer/configure.tgt gcc-12.4.0/libsanitizer/configure.tgt
*** gcc-12.3.0/libsanitizer/configure.tgt	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libsanitizer/configure.tgt	Thu Jun 20 08:08:10 2024
*************** case "${target}" in
*** 64,70 ****
  		HWASAN_SUPPORTED=yes
  	fi
  	;;
!   x86_64-*-darwin2* | x86_64-*-darwin1[2-9]* | i?86-*-darwin1[2-9]*)
  	TSAN_SUPPORTED=no
  	EXTRA_CXXFLAGS="${EXTRA_CXXFLAGS} -Wl,-undefined,dynamic_lookup"
  	;;
--- 64,70 ----
  		HWASAN_SUPPORTED=yes
  	fi
  	;;
!   x86_64-*-darwin2[01]* | x86_64-*-darwin1[2-9]* | i?86-*-darwin1[2-9]*)
  	TSAN_SUPPORTED=no
  	EXTRA_CXXFLAGS="${EXTRA_CXXFLAGS} -Wl,-undefined,dynamic_lookup"
  	;;
diff -Nrcpad gcc-12.3.0/libssp/ChangeLog gcc-12.4.0/libssp/ChangeLog
*** gcc-12.3.0/libssp/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libssp/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/ChangeLog gcc-12.4.0/libstdc++-v3/ChangeLog
*** gcc-12.3.0/libstdc++-v3/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libstdc++-v3/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,1830 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-17  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-06-14  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* libsupc++/new_opa.cc [!_GLIBCXX_HOSTED]: Fix declaration of
+ 	posix_memalign.
+ 
+ 2024-06-11  Tianqiang Shuai  <1101282468@qq.com>
+ 
+ 	Backported from master:
+ 	2023-07-06  Tianqiang Shuai  <1101282468@qq.com>
+ 
+ 	* config/io/basic_file_stdio.cc (xwrite) [USE_STDIO_PURE]: Fix
+ 	first argument.
+ 
+ 2024-06-11  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-03-22  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/std/utility (__cpp_lib_constexpr_algorithms): Define,
+ 	as per LWG 3792.
+ 	* testsuite/20_util/exchange/constexpr.cc: Check for it.
+ 
+ 2024-06-11  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-02-16  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/fs_ops.h (create_directory): Use reserved name
+ 	for parameter.
+ 	* include/bits/regex_automaton.h (_State_base::_M_print):
+ 	Likewise.
+ 	* include/bits/regex_automaton.tcc(_State_base::_M_print):
+ 	Likewise.
+ 	* include/bits/regex_scanner.tcc(_Scanner::_M_print): Likewise.
+ 	* include/experimental/bits/fs_ops.h (create_directory):
+ 	Likewise.
+ 	* include/std/mutex (timed_mutex::_M_clocklock): Likewise.
+ 	(recursive_timed_mutex:_M_clocklock): Likewise.
+ 	* libsupc++/cxxabi_init_exception.h
+ 	(__cxa_init_primary_exception): Likewise.
+ 	* testsuite/17_intro/names.cc: Add checks.
+ 
+ 2024-06-11  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-02  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/experimental/internet (network_v6::network): Define.
+ 	(network_v6::hosts): Finish implementing.
+ 	(network_v6::to_string): Do not concatenate std::string to
+ 	arbitrary std::basic_string specialization.
+ 	* testsuite/experimental/net/internet/network/v6/cons.cc: New
+ 	test.
+ 
+ 2024-06-11  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-06-09  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/100285
+ 	* include/experimental/internet [IPPROTO_TCP || IPPROTO_UDP]
+ 	(basic_endpoint, basic_resolver_entry, resolver_base)
+ 	(basic_resolver_results, basic_resolver): Only define if the tcp
+ 	or udp protocols will be defined.
+ 
+ 2024-06-11  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-07-05  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/110542
+ 	* include/bits/stl_uninitialized.h (__uninitialized_default_n):
+ 	Do not use std::fill_n during constant evaluation.
+ 
+ 2024-06-11  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-10  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* testsuite/27_io/manipulators/extended/get_time/char/2.cc:
+ 	Adjust input string so that it matches %a with or without a
+ 	trailing period.
+ 
+ 2024-06-11  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-19  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/114359
+ 	* include/bits/random.tcc (binomial_distribution::param_type):
+ 	Ensure arithmetic is done as type double.
+ 	* testsuite/26_numerics/random/binomial_distribution/114359.cc: New test.
+ 
+ 2024-06-11  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-19  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/114367
+ 	* include/bits/stl_bvector.h (_M_allocate): Use allocator's
+ 	construct function to begin lifetime of words.
+ 
+ 2024-06-11  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-04-03  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/104606
+ 	* include/std/optional (operator<=>(const optional<T>&, const U&)):
+ 	Reverse order of three_way_comparable_with template arguments.
+ 	* testsuite/20_util/optional/relops/104606.cc: New test.
+ 
+ 2024-06-11  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-22  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/114401
+ 	* include/bits/hashtable.h (_Hashtable::_M_reinsert_node): Call
+ 	release() on node handle instead of just zeroing its pointer.
+ 	(_Hashtable::_M_reinsert_node_multi): Likewise.
+ 	(_Hashtable::_M_merge_unique): Likewise.
+ 	(_Hashtable::_M_merge_multi): Likewise.
+ 	* include/bits/node_handle.h (_Node_handle_common::release()):
+ 	New member function.
+ 	(_Node_handle_common::_Optional_alloc::_M_empty): Remove
+ 	unnecessary union member.
+ 	(_Node_handle_common): Declare _Hashtable as a friend.
+ 	* include/bits/stl_tree.h (_Rb_tree::_M_reinsert_node_unique):
+ 	Call release() on node handle instead of just zeroing its
+ 	pointer.
+ 	(_Rb_tree::_M_reinsert_node_equal): Likewise.
+ 	(_Rb_tree::_M_reinsert_node_hint_unique): Likewise.
+ 	(_Rb_tree::_M_reinsert_node_hint_equal): Likewise.
+ 	* testsuite/23_containers/multiset/modifiers/114401.cc: New test.
+ 	* testsuite/23_containers/set/modifiers/114401.cc: New test.
+ 	* testsuite/23_containers/unordered_multiset/modifiers/114401.cc: New test.
+ 	* testsuite/23_containers/unordered_set/modifiers/114401.cc: New test.
+ 
+ 2024-06-01  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-06-01  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/115269
+ 	* doc/xml/manual/using.xml: Replace link to gcc-4.3.2 docs.
+ 	Replace list of -std=... options with a single entry for -std.
+ 	* doc/html/manual/using.html: Regenerate.
+ 
+ 2024-05-08  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2024-04-22  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	PR libstdc++/114803
+ 	* include/experimental/bits/simd_builtin.h
+ 	(_SimdBase2::operator __vector_type_t): There is no __builtin()
+ 	function in _SimdWrapper, instead use its conversion operator.
+ 	* testsuite/experimental/simd/pr114803_vecbuiltin_cvt.cc: New
+ 	test.
+ 
+ 2024-05-08  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2024-04-22  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	* include/experimental/bits/simd.h: Ignore -Wnarrowing for
+ 	arm_neon.h.
+ 	(__int_for_sizeof): Replace tautological compare with checking
+ 	for invalid template parameter value.
+ 	* include/experimental/bits/simd_builtin.h (__extract_part):
+ 	Remove tautological compare by combining two static_assert.
+ 
+ 2024-05-08  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2024-04-17  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	* include/experimental/bits/numeric_traits.h: Add include guard.
+ 
+ 2024-05-08  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2024-04-17  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	PR libstdc++/114750
+ 	* include/experimental/bits/simd_builtin.h
+ 	(_SimdImplBuiltin::_S_load, _S_store): Fall back to copying
+ 	scalars if the memory type cannot be vectorized for the target.
+ 
+ 2024-05-08  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2024-03-27  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	* include/experimental/bits/simd_x86.h (_S_masked_unary):
+ 	Cast inputs < 16 bytes to 16 byte vectors before calling the
+ 	right subtraction builtin. Before returning, truncate to the
+ 	return vector type.
+ 
+ 2024-05-08  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2024-03-27  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	* include/experimental/bits/simd_x86.h (_S_masked_unary): Call
+ 	the 4- and 8-byte variants of __builtin_ia32_subp[ds] without
+ 	rounding direction argument.
+ 
+ 2024-05-08  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-06-06  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	PR libstdc++/109822
+ 	* include/experimental/bits/simd_builtin.h (_S_store): Rewrite
+ 	to avoid casts to other vector types. Implement store as
+ 	succession of power-of-2 sized memcpy to avoid PR90424.
+ 
+ 2024-05-08  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-06-06  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	PR libstdc++/110054
+ 	* include/experimental/bits/simd_builtin.h (_S_masked_store):
+ 	Call into deduced ABI's SimdImpl after conversion.
+ 	* include/experimental/bits/simd_x86.h (_S_masked_store_nocvt):
+ 	Don't use _mm_maskmoveu_si128. Use the generic fall-back
+ 	implementation. Also fix masked stores without SSE2, which
+ 	were not doing anything before.
+ 
+ 2024-05-08  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-06-06  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	* include/experimental/bits/simd.h (__bit_cast): Use
+ 	__gnu__::__vector_size__ instead of gnu::vector_size.
+ 
+ 2024-04-21  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-02-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 		    Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR target/112397
+ 	* configure: Regenerate.
+ 	* configure.ac: Detect if we are building for Darwin.
+ 	* libsupc++/Makefile.am: If we are building for Darwin, then
+ 	suppress hot/cold partitioning for the array allocators.
+ 	* libsupc++/Makefile.in: Regenerated.
+ 
+ 2024-04-21  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-03-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* testsuite/lib/dg-options.exp (atomic_link_flags): Emit a -B
+ 	option for the path to the uninstalled libatomic.
+ 
+ 2024-04-21  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2024-03-19  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* testsuite/lib/libstdc++.exp (v3_target_compile): Instead of
+ 	/dev/null, use a temporary file for test executables on Darwin.
+ 
+ 2024-04-18  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	Backported from master:
+ 	2022-12-04  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* config/os/bsd/darwin/os_defines.h
+ 	(_GTHREAD_USE_RECURSIVE_MUTEX_INIT_FUNC): Limit use of this macro
+ 	to OS versions that need it.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-05-12  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* testsuite/experimental/feat-cxx14.cc: Remove dependency on
+ 	_GLIBCXX_USE_C99_STDINT_TR1.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-05-12  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* testsuite/21_strings/basic_string_view/typedefs.cc: Remove
+ 	dependency on _GLIBCXX_USE_C99_STDINT_TR1.
+ 	* testsuite/experimental/string_view/typedefs.cc: Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-09-11  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* src/c++11/Makefile.am: Add new file.
+ 	* src/c++11/Makefile.in: Regenerate.
+ 	* src/c++11/debug.cc (__glibcxx_assert_fail): Move to ...
+ 	* src/c++11/assert_fail.cc: New file.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-06-26  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/iterator_concepts.h (projected): Replace class
+ 	template with alias template denoting an ADL-proofed helper.
+ 	(incremental_traits<projected<Iter, Proj>>): Remove.
+ 	* testsuite/24_iterators/indirect_callable/projected-adl.cc:
+ 	New test.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-04-27  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/40380
+ 	* include/bits/basic_string.h: Improve doxygen comments.
+ 	* include/bits/cow_string.h: Likewise.
+ 	* include/bits/forward_list.h: Likewise.
+ 	* include/bits/fs_dir.h: Likewise.
+ 	* include/bits/fs_path.h: Likewise.
+ 	* include/bits/quoted_string.h: Likewise.
+ 	* include/bits/stl_bvector.h: Likewise.
+ 	* include/bits/stl_map.h: Likewise.
+ 	* include/bits/stl_multimap.h: Likewise.
+ 	* include/bits/stl_multiset.h: Likewise.
+ 	* include/bits/stl_set.h: Likewise.
+ 	* include/bits/stl_vector.h: Likewise.
+ 	* include/bits/unordered_map.h: Likewise.
+ 	* include/bits/unordered_set.h: Likewise.
+ 	* include/std/filesystem: Likewise.
+ 	* include/std/iomanip: Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-11-19  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/ptr_traits.h (pointer_traits::pointer_to): Rename
+ 	parameter.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-11-21  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/std/tuple: Add better Doxygen comments.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-11-08  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* testsuite/18_support/new_nothrow.cc: Add missing noexcept
+ 	to operator delete replacements.
+ 	* testsuite/20_util/any/cons/92156.cc: Disable
+ 	-Winit-list-lifetime warnings from instantiating invalid
+ 	specialization of manager function.
+ 	* testsuite/20_util/any/modifiers/92156.cc: Likewise.
+ 	* testsuite/20_util/default_delete/void_neg.cc: Prune additional
+ 	diagnostics.
+ 	* testsuite/20_util/headers/memory/synopsis.cc: Add missing
+ 	noexcept.
+ 	* testsuite/20_util/shared_ptr/cons/void_neg.cc: Prune
+ 	additional diagnostic.
+ 	* testsuite/20_util/unique_ptr/creation/for_overwrite.cc: Add
+ 	missing noexcept to operator delete replacements.
+ 	* testsuite/21_strings/basic_string/cons/char/103919.cc:
+ 	Likewise.
+ 	* testsuite/23_containers/map/modifiers/emplace/92300.cc:
+ 	Likewise.
+ 	* testsuite/23_containers/map/modifiers/insert/92300.cc:
+ 	Likewise.
+ 	* testsuite/24_iterators/headers/iterator/range_access_c++11.cc:
+ 	Add missing noexcept to synopsis declarations.
+ 	* testsuite/24_iterators/headers/iterator/range_access_c++14.cc:
+ 	Likewise.
+ 	* testsuite/24_iterators/headers/iterator/range_access_c++17.cc:
+ 	Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-09-21  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* testsuite/20_util/headers/memory/synopsis.cc: Add declarations
+ 	from C++11 and later.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-11-08  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/stl_tempbuf.h (_Temporary_buffer): Disable
+ 	warnings about get_temporary_buffer being deprecated.
+ 	* include/ext/functional (mem_fun1, mem_fun1_ref): Disable
+ 	warnings about mem_fun1_t, const_mem_fun1_t, mem_fun1_ref_t and
+ 	const_mem_fun1_ref_t being deprecated.
+ 	* include/std/spanstream (basic_spanbuf::setbuf): Add assertion
+ 	and adjust to avoid narrowing warning.
+ 	* libsupc++/exception_ptr.h [!__cpp_rtti && !__cpp_exceptions]
+ 	(make_exception_ptr): Add missing inline specifier.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-05-13  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* doc/doxygen/user.cfg.in (PREDEFINED): Define
+ 	_GTHREAD_USE_MUTEX_TIMEDLOCK macro.
+ 	* include/bits/std_mutex.h (mutex, lock_guard): Use @since and
+ 	@headerfile.
+ 	* include/bits/unique_lock.h (unique_lock): Likewise.
+ 	* include/std/mutex (recursive_mutex, timed_mutex)
+ 	(recursive_timed_mutex, scoped_lock): Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-05-13  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* doc/doxygen/user.cfg.in (PREDEFINED): Define
+ 	_GLIBCXX23_CONSTEXPR macro.
+ 	* include/backward/auto_ptr.h (auto_ptr): Use @deprecated.
+ 	* include/bits/unique_ptr.h (default_delete): Use @since and
+ 	@headerfile.
+ 	* include/std/scoped_allocator: Remove @ingroup from @file
+ 	block.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-05-13  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/ostream_insert.h: Mark helper functions as
+ 	undocumented by Doxygen.
+ 	* include/bits/stl_algo.h: Use markdown for formatting and mark
+ 	helper functions as undocumented.
+ 	* include/bits/stl_numeric.h:  Likewise.
+ 	* include/bits/stl_pair.h (pair): Add @headerfile.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-05-13  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* doc/doxygen/user.cfg.in (PREDEFINED): Define __allocator_base
+ 	so that Doxygen shows the right base-class for std::allocator.
+ 	* include/bits/alloc_traits.h: Improve doxygen docs.
+ 	* include/bits/allocator.h: Likewise.
+ 	* include/bits/new_allocator.h: Likewise.
+ 	* include/ext/new_allocator.h: Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-05-13  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* doc/doxygen/user.cfg.in (PREDEFINED): Define macro
+ 	_GLIBCXX_DOXYGEN_ONLY to expand its argument.
+ 	* include/bits/c++config (_GLIBCXX_DOXYGEN_ONLY): Define.
+ 	* include/bits/regex.h: Improve doxygen docs.
+ 	* include/bits/regex_constants.h: Likewise.
+ 	* include/bits/regex_error.h: Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-05-13  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/std/atomic: Suppress doxygen docs for
+ 	implementation details.
+ 	* include/bits/atomic_base.h: Likewise.
+ 	* include/bits/shared_ptr_atomic.h: Use markdown. Fix grouping
+ 	so that std::atomic is not added to the pointer abstractions
+ 	group.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-05-17  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* src/Makefile.am [ENABLE_SYMVERS_GNU_NAMESPACE] (cxx11_sources):
+ 	Do not build the compatibility*-c++0x.cc objects.
+ 	* src/Makefile.in: Regenerate.
+ 	* src/c++11/compatibility-c++0x.cc [_GLIBCXX_INLINE_VERSION]:
+ 	Refuse to build for the versioned namespace.
+ 	* src/c++11/compatibility-chrono.cc: Likewise.
+ 	* src/c++11/compatibility-condvar.cc: Likewise.
+ 	* src/c++11/compatibility-thread-c++0x.cc: Likewise.
+ 	* src/c++11/chrono.cc (system_clock, steady_clock):
+ 	Use macros to define in inline namespace _V2, matching the
+ 	declarations in <system_error>.
+ 	* src/c++11/system_error.cc (system_category, generic_category):
+ 	Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-05-13  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* doc/doxygen/user.cfg.in (PREDEFINED): Expand new macros to
+ 	nothing.
+ 	* include/bits/c++config (_GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE)
+ 	(_GLIBCXX_END_INLINE_ABI_NAMESPACE): Define new macros.
+ 	* include/bits/algorithmfwd.h (_V2::__rotate): Use new macros
+ 	for the namespace.
+ 	* include/bits/chrono.h (chrono::_V2::system_clock): Likewise.
+ 	* include/bits/stl_algo.h (_V2::__rotate): Likewise.
+ 	* include/std/condition_variable (_V2::condition_variable_any):
+ 	Likewise.
+ 	* include/std/system_error (_V2::error_category): Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-05-13  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* doc/doxygen/user.cfg.in (GROUP_NESTED_COMPOUNDS): Set to NO.
+ 	(CLASS_DIAGRAMS): Remove obsolete option.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-06-27  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/fs_path.h (__is_path_iter_src): Replace class
+ 	template with variable template.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-09-26  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/ptr_traits.h (__ptr_traits_elem) [__cpp_concepts]:
+ 	Also define the __ptr_traits_elem class template for the
+ 	concepts case.
+ 	(pointer_traits<Ptr>): Remove constrained partial
+ 	specialization.
+ 	* testsuite/20_util/pointer_traits/lwg3545.cc: Check for
+ 	ambiguitiy with program-defined partial specialization.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-09-24  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/alloc_traits.h (allocator_traits::is_always_equal):
+ 	Only instantiate is_empty if needed.
+ 	* include/bits/ptr_traits.h (__ptr_traits_impl::difference_type)
+ 	(__ptr_traits_impl::rebind): Use __detected_or.
+ 	* include/experimental/type_traits (is_same_v): Add a partial
+ 	specialization instead of instantiating the std::is_same class
+ 	template.
+ 	(detected_t): Redefine in terms of detected_or_t.
+ 	(is_detected, is_detected_v): Redefine in terms of detected_t.
+ 	* include/std/type_traits [__cpp_concepts] (__detected_or): Add
+ 	new definition using concepts.
+ 	(__detector::value_t): Rename to __is_detected.
+ 	* testsuite/17_intro/names.cc: Check value_t isn't used.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-05-13  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/ptr_traits.h: Add some doxygen comments.
+ 
+ 2024-03-18  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	Backported from master:
+ 	2022-06-24  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	* scripts/extract_symvers.in: Use grep -E instead of egrep.
+ 	* scripts/run_doxygen: Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-10-28  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/107376
+ 	* include/bits/regex_executor.h (_Executor::_Executor): Use same
+ 	allocator for _M_cur_results and _M_results.
+ 	* include/bits/regex_executor.tcc (_Executor::_M_main_dispatch):
+ 	Prevent possibly incorrect allocator propagating to
+ 	_M_cur_results.
+ 	* testsuite/28_regex/algorithms/regex_match/107376.cc: New test.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-02-02  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/std/sstream  (basic_stringbuf::view): Define for old
+ 	std::string ABI.
+ 	(basic_istringstream::view, basic_stringstream::view)
+ 	(basic_stringstream::view): Likewise.
+ 	* testsuite/27_io/basic_istringstream/view/char/1.cc: Remove
+ 	{ dg-require-effective-target cxx11_abi }.
+ 	* testsuite/27_io/basic_istringstream/view/wchar_t/1.cc:
+ 	Likewise.
+ 	* testsuite/27_io/basic_ostringstream/view/char/1.cc: Likewise.
+ 	* testsuite/27_io/basic_ostringstream/view/wchar_t/1.cc:
+ 	Likewise.
+ 	* testsuite/27_io/basic_stringbuf/view/char/1.cc: Likewise.
+ 	* testsuite/27_io/basic_stringbuf/view/wchar_t/1.cc: Likewise.
+ 	* testsuite/27_io/basic_stringstream/view/char/1.cc: Likewise.
+ 	* testsuite/27_io/basic_stringstream/view/wchar_t/1.cc:
+ 	Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-09-07  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* acinclude.m4 (GLIBCXX_CHECK_FILESYSTEM_DEPS): Check for mkdir,
+ 	chmod, chdir, and getcwd.
+ 	* config.h.in: Regenerate.
+ 	* configure: Regenerate.
+ 	* src/c++17/fs_ops.cc (create_dir): Use USE_MKDIR macro.
+ 	(fs::current_path): Use USE_GETCWD and USE_CHDIR macros.
+ 	(fs::permissions): Use USE_CHMOD macro.
+ 	* src/filesystem/ops-common.h [FILESYSTEM_IS_WINDOWS]
+ 	(chmod, mkdir, getcwd, chdir): Define new macros.
+ 	[FILESYSTEM_IS_WINDOWS] (chmod, mkdir, getcwd, chdir): Use
+ 	new macros.
+ 	* src/filesystem/ops.cc (create_dir): Use USE_MKDIR macro.
+ 	(fs::current_path): Use USE_GETCWD and USE_CHDIR macros.
+ 	(fs::permissions): Use USE_CHMOD macro.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-08-09  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/new_allocator.h (__new_allocator): Define copy
+ 	assignment operator as defaulted.
+ 	* include/std/complex (complex<float>, complex<double>)
+ 	(complex<long double>): Define copy constructor as defaulted.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-11  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/112473
+ 	* include/bits/utility.h (integer_sequence): Add static_assert.
+ 	* testsuite/20_util/integer_sequence/112473.cc: New test.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-09-15  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/111172
+ 	* include/std/variant (get<T>): Remove !is_void static
+ 	assertions.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-10-26  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/112089
+ 	* include/std/shared_mutex (shared_lock::unlock): Change errc
+ 	constant to operation_not_permitted.
+ 	* testsuite/30_threads/shared_lock/locking/112089.cc: New test.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-29  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/113960
+ 	* include/bits/stl_algobase.h (__is_byte_iter): Replace with ...
+ 	(__memcmp_ordered_with): New concept.
+ 	(lexicographical_compare_three_way): Use __memcmp_ordered_with
+ 	instead of __is_byte_iter. Use correct length for memcmp.
+ 	* testsuite/25_algorithms/lexicographical_compare_three_way/113960.cc:
+ 	New test.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-02-28  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/108846
+ 	* include/bits/stl_algobase.h (__copy_move<false, false, RA>)
+ 	Add __assign_one static member function.
+ 	(__copy_move<true, false, RA>): Likewise.
+ 	(__copy_move<IsMove, true, RA>): Do not use memmove for a single
+ 	value.
+ 	(__copy_move_backward<IsMove, true, RA>): Likewise.
+ 	* testsuite/25_algorithms/copy/108846.cc: New test.
+ 	* testsuite/25_algorithms/copy_backward/108846.cc: New test.
+ 	* testsuite/25_algorithms/copy_n/108846.cc: New test.
+ 	* testsuite/25_algorithms/move/108846.cc: New test.
+ 	* testsuite/25_algorithms/move_backward/108846.cc: New test.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-03-22  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/stream_iterator.h (istream_iterator): Add
+ 	constexpr to copy constructor, as per LWG 3600.
+ 	* testsuite/24_iterators/istream_iterator/cons/constexpr.cc:
+ 	Check copy construction.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-03-22  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/regex.h (match_results): Add allocator-extended
+ 	copy and move constructors, as per LWG 2195.
+ 	* testsuite/28_regex/match_results/ctors/char/alloc.cc: New test.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-02-28  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* src/c++11/codecvt.cc: Add [[likely]] and [[unlikely]]
+ 	attributes.
+ 
+ 2024-03-18  Dimitrij Mijoski  <dmjpp@hotmail.com>
+ 
+ 	Backported from master:
+ 	2023-01-13  Dimitrij Mijoski  <dmjpp@hotmail.com>
+ 
+ 	PR libstdc++/86419
+ 	* src/c++11/codecvt.cc (read_utf8_code_point): Correctly detect
+ 	errors in incomplete multibyte sequences.
+ 	(utf16_in): Remove surrogates parameter. Fix conditions for
+ 	returning partial.
+ 	(utf16_out): Fix condition for returning partial.
+ 	(ucs2_in): Do not pass surrogates argument to utf16_in.
+ 	* testsuite/22_locale/codecvt/codecvt_unicode.cc: New test.
+ 	* testsuite/22_locale/codecvt/codecvt_unicode.h: New header for
+ 	tests.
+ 	* testsuite/22_locale/codecvt/codecvt_unicode_wchar_t.cc: New
+ 	test.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-07-26  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/algorithmfwd.h (random_shuffle): Add deprecated
+ 	attribute.
+ 	* include/bits/stl_algo.h (random_shuffle): Correct comments.
+ 	* testsuite/25_algorithms/random_shuffle/1.cc: Disable
+ 	deprecated warnings.
+ 	* testsuite/25_algorithms/random_shuffle/59603.cc: Likewise.
+ 	* testsuite/25_algorithms/random_shuffle/moveable.cc: Likewise.
+ 	* testsuite/25_algorithms/random_shuffle/deprecated.cc: New
+ 	test.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-05-11  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/109758
+ 	* include/bits/std_abs.h (abs(__float128)): Handle negative NaN
+ 	and negative zero correctly.
+ 	* testsuite/26_numerics/headers/cmath/109758.cc: New test.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-05-12  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* acinclude.m4 (GLIBCXX_CHECK_C99_TR1): Use a non-null pointer
+ 	to check for nan, nanf, and nanl.
+ 	* configure: Regenerate.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-05-31  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/std/scoped_allocator (scoped_allocator_adaptor): Add
+ 	noexcept to all constructors except the default constructor.
+ 	(scoped_allocator_adaptor::inner_allocator): Add noexcept.
+ 	(scoped_allocator_adaptor::outer_allocator): Likewise.
+ 	* testsuite/20_util/scoped_allocator/noexcept.cc: New test.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-06-01  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* testsuite/26_numerics/pstl/numeric_ops/transform_reduce.cc:
+ 	Add const to equality operator.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-06-09  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* testsuite/23_containers/deque/modifiers/emplace/52799.cc:
+ 	Removed.
+ 	* testsuite/23_containers/deque/modifiers/emplace/const_iterator.cc:
+ 	Removed.
+ 	* testsuite/23_containers/list/modifiers/emplace/52799.cc:
+ 	Removed.
+ 	* testsuite/23_containers/list/modifiers/emplace/const_iterator.cc:
+ 	Removed.
+ 	* testsuite/23_containers/vector/modifiers/emplace/52799.cc:
+ 	Removed.
+ 	* testsuite/23_containers/vector/modifiers/emplace/const_iterator.cc:
+ 	Removed.
+ 	* testsuite/23_containers/deque/modifiers/emplace/1.cc: New
+ 	test.
+ 	* testsuite/23_containers/list/modifiers/emplace/1.cc: New
+ 	test.
+ 	* testsuite/23_containers/vector/modifiers/emplace/1.cc: New
+ 	test.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-07-03  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/alloc_traits.h (_Destroy): Qualify call.
+ 	* include/bits/stl_construct.h (_Destroy, _Destroy_n): Likewise.
+ 	* testsuite/23_containers/vector/cons/destroy-adl.cc: New test.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-07-19  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/110593
+ 	* include/bits/chrono.h (duration): Improve static assert
+ 	messages.
+ 	(__is_ratio): Move to ...
+ 	* include/std/ratio (__is_ratio): ... here.
+ 	(__is_ratio_v): New variable template and partial
+ 	specialization.
+ 	(__are_both_ratios): New function template.
+ 	(__ratio_multiply, ratio_equal, ratio_less, __ratio_add):
+ 	Add static assertion.
+ 	* testsuite/20_util/ratio/requirements/type_constraints.cc:
+ 	New test.
+ 	* testsuite/20_util/duration/requirements/typedefs_neg1.cc:
+ 	Adjust expected error.
+ 	* testsuite/20_util/duration/requirements/typedefs_neg2.cc:
+ 	Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-09-11  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* src/c++11/debug.cc (acquire_sequence_ptr_for_lock): New
+ 	function.
+ 	(reset_sequence_ptr): New function.
+ 	(_Safe_iterator_base::_M_detach)
+ 	(_Safe_local_iterator_base::_M_detach): Replace bare atomic_load
+ 	with acquire_sequence_ptr_for_lock.
+ 	(_Safe_iterator_base::_M_reset): Replace bare atomic_store with
+ 	reset_sequence_ptr.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-08-16  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/basic_string.tcc (resize_and_overwrite): Invoke
+ 	the callable with the same size as resize_and_overwrite was
+ 	called with.
+ 	* testsuite/21_strings/basic_string/capacity/char/resize_and_overwrite.cc:
+ 	Check with small values for the new size.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-03-22  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/basic_string.tcc (basic_string::resize_and_overwrite):
+ 	Pass rvalues to the callback, as now allowed by LWG 3645.
+ 	Enforce preconditions on the return value.
+ 	* testsuite/21_strings/basic_string/capacity/char/resize_and_overwrite.cc:
+ 	Adjust.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-08-09  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/shared_ptr_atomic.h (atomic): Change class-head
+ 	to struct.
+ 	* include/bits/stl_tree.h (_Rb_tree_merge_helper): Change
+ 	class-head to struct in friend declaration.
+ 	* include/std/future (_Task_state_base, _Task_state): Likewise.
+ 	* include/std/scoped_allocator (__inner_type_impl): Likewise.
+ 	* include/std/valarray (_BinClos, _SClos, _GClos, _IClos)
+ 	(_ValFunClos, _RefFunClos): Change class-head to struct.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-09-08  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* doc/xml/manual/test.xml: Update reference to -std=gnu++14 as
+ 	the default.
+ 	* doc/html/manual/test.html: Regenerate.
+ 
+ 2024-03-18  Alexey Lapshin  <alexey.lapshin@espressif.com>
+ 
+ 	Backported from master:
+ 	2023-09-08  Alexey Lapshin  <alexey.lapshin@espressif.com>
+ 
+ 	* src/libbacktrace/Makefile.am: Remove -Werror.
+ 	* src/libbacktrace/Makefile.in: Regenerate.
+ 
+ 2024-03-18  Nathaniel Shead  <nathanieloshead@gmail.com>
+ 
+ 	Backported from master:
+ 	2023-09-29  Nathaniel Shead  <nathanieloshead@gmail.com>
+ 
+ 	* include/bits/basic_string.h: (basic_string(basic_string&&)):
+ 	Activate _M_local_buf when needed.
+ 	(basic_string(basic_string&&, const _Alloc&)): Likewise.
+ 	* include/bits/basic_string.tcc: (basic_string::swap): Likewise.
+ 	* include/std/variant: (__detail::__variant::__construct_n): New.
+ 	(__detail::__variant::__emplace): Use __construct_n.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-02  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* acinclude.m4 (GLIBCXX_ENABLE_C99): Fix snprintf checks.
+ 	* configure: Regenerate.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-21  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/tr2/dynamic_bitset (dynamic_bitset): Pass zero and one
+ 	characters to _M_copy_from_string.
+ 	* testsuite/tr2/dynamic_bitset/string.cc: New test.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-14  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/std/charconv (__from_chars_pow2_base): Convert base to
+ 	unsigned for call to __countr_zero.
+ 	(__from_chars_alnum): Likewise for call to __bit_width.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-23  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* testsuite/util/testsuite_allocator.h (uneq_allocator): Fix
+ 	equality operator for heterogeneous comparisons.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-14  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/66146
+ 	* doc/xml/manual/status_cxx2011.xml: Remove mention of Linux in
+ 	note about std::call_once.
+ 	* doc/xml/manual/status_cxx2014.xml: Likewise.
+ 	* doc/xml/manual/status_cxx2017.xml: Likewise.
+ 	* doc/html/manual/status.html: Regenerate.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-13  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* testsuite/libstdc++-prettyprinters/cxx11.cc: Move custom_cat
+ 	to namespace scope.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-28  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* doc/xml/manual/appendix_contributing.xml: Change URLs to use
+ 	https.
+ 	* doc/html/manual/*: Regenerate.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-28  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* doc/xml/manual/appendix_contributing.xml: Replace outdated
+ 	info on ChangeLog entries.
+ 	* doc/html/manual/appendix_contributing.html: Regenerate.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-11-04  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/107500
+ 	* libsupc++/eh_globals.cc (eh_globals): Remove immortalizing
+ 	wrapper.
+ 	(__cxxabiv1::__cxa_get_globals_fast): Adjust.
+ 	(__cxxabiv1::__cxa_get_globals): Adjust.
+ 
+ 2024-03-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-03-04  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/114147
+ 	* include/std/tuple (tuple::tuple(allocator_arg_t, const Alloc&)):
+ 	Add missing overload of allocator-extended default constructor.
+ 	(tuple<T1,T2>::tuple(allocator_arg_t, const Alloc&)): Likewise.
+ 	* testsuite/20_util/tuple/cons/114147.cc: New test.
+ 
+ 2024-03-13  Cassio Neri  <cassio.neri@gmail.com>
+ 
+ 	Backported from master:
+ 	2024-01-05  Cassio Neri  <cassio.neri@gmail.com>
+ 
+ 	* include/std/chrono: Fix + and - for months and weekdays.
+ 	* testsuite/std/time/month/1.cc: Add constexpr tests against overflow.
+ 	* testsuite/std/time/month/2.cc: New test for extreme values.
+ 	* testsuite/std/time/weekday/1.cc: Add constexpr tests against overflow.
+ 	* testsuite/std/time/weekday/2.cc: New test for extreme values.
+ 
+ 2024-03-13  Cassio Neri  <cassio.neri@gmail.com>
+ 
+ 	Backported from master:
+ 	2023-11-14  Cassio Neri  <cassio.neri@gmail.com>
+ 
+ 	* include/std/chrono (operator-(const weekday&, const weekday&)):
+ 	Optimize.
+ 
+ 2024-03-13  Cassio Neri  <cassio.neri@gmail.com>
+ 
+ 	Backported from master:
+ 	2023-11-14  Cassio Neri  <cassio.neri@gmail.com>
+ 
+ 	* include/std/chrono (year::is_leap): Clear code.
+ 
+ 2024-03-13  Cassio Neri  <cassio.neri@gmail.com>
+ 
+ 	Backported from master:
+ 	2023-11-14  Cassio Neri  <cassio.neri@gmail.com>
+ 
+ 	* include/std/chrono (year_month_day_last::day): Remove &1.
+ 
+ 2024-03-13  Cassio Neri  <cassio.neri@gmail.com>
+ 
+ 	Backported from master:
+ 	2023-11-14  Cassio Neri  <cassio.neri@gmail.com>
+ 
+ 	* include/std/chrono (weekday::_S_from_days): Fix UB.
+ 	* testsuite/std/time/weekday/1.cc: Add test for overflow.
+ 
+ 2024-03-13  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-08-09  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/list.tcc (list::sort(Cmp)): Fix -Wsign-compare
+ 	warning for loop condition.
+ 
+ 2024-03-13  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-06-09  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/110167
+ 	* include/std/array (to_array): Initialize arrays of trivial
+ 	types using memcpy. For non-trivial types, use lambda
+ 	expressions instead of a separate helper function.
+ 	(__to_array): Remove.
+ 	* testsuite/23_containers/array/creation/110167.cc: New test.
+ 
+ 2024-02-08  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-02  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/std/string_view (basic_string_view(R&&)): Remove
+ 	constraint that traits_type must be the same, as per LWG 3857.
+ 	* testsuite/21_strings/basic_string_view/cons/char/range_c++20.cc:
+ 	Explicit conversion between different specializations should be
+ 	allowed.
+ 	* testsuite/21_strings/basic_string_view/cons/wchar_t/range_c++20.cc:
+ 	Likewise.
+ 
+ 2024-02-08  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-02  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/90276
+ 	* testsuite/util/pstl/test_utils.h (reverse_invoker): Do not use
+ 	perfect forwarding for iterator arguments.
+ 
+ 2024-02-08  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-02-02  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/std/syncstream (basic_osyncstream::operator=): Remove
+ 	noexcept, as per LWG 3867.
+ 
+ 2024-02-08  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-13  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/107466
+ 	* include/bits/random.tcc (subtract_with_carry_engine::seed):
+ 	Implement proposed resolution of LWG 4014.
+ 	* testsuite/26_numerics/random/pr60037-neg.cc: Adjust dg-error
+ 	line number.
+ 	* testsuite/26_numerics/random/subtract_with_carry_engine/cons/lwg3809.cc:
+ 	Check for expected result of 64-bit engine with seed that
+ 	doesn't fit in 32-bits.
+ 
+ 2024-02-08  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-11  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/113258
+ 	* libsupc++/new_opa.cc: Prefer to use posix_memalign if
+ 	available.
+ 
+ 2024-02-02  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/108636
+ 	* include/bits/shared_ptr_base.h (__shared_ptr::operator bool):
+ 	Add always_inline attribute for C++20 and later.
+ 
+ 2024-01-11  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-05  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/113200
+ 	* include/bits/char_traits.h (__gnu_cxx::char_traits::move): Use
+ 	__builtin_constant_p to check for unrelated pointers that cannot
+ 	be compared during constant evaluation.
+ 	* testsuite/21_strings/char_traits/requirements/113200.cc: New
+ 	test.
+ 
+ 2024-01-11  Ken Matsui  <kmatsui@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2024-01-11  Ken Matsui  <kmatsui@gcc.gnu.org>
+ 
+ 	PR libstdc++/113250
+ 	* src/c++17/fs_ops.cc (fs::equivalent): Use || instead of &&.
+ 	* src/filesystem/ops.cc (fs::equivalent): Likewise.
+ 	* testsuite/27_io/filesystem/operations/equivalent.cc: Handle
+ 	error codes.
+ 	* testsuite/experimental/filesystem/operations/equivalent.cc:
+ 	Likewise.
+ 
+ 2024-01-03  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2024-01-03  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR testsuite/113175
+ 	* testsuite/std/ranges/iota/max_size_type.cc (test02): Reduce
+ 	'limit' to 100 from 1000 and adjust 'log2_limit' accordingly.
+ 	(test03): Likewise.
+ 
+ 2023-12-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-10-13  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* testsuite/tr1/8_c_compatibility/cstdio/functions.cc (test01):
+ 	Initialize stream to va_arg(ap, FILE*) rather than 0.
+ 	* testsuite/tr1/8_c_compatibility/cwchar/functions.cc (test01):
+ 	Likewise.
+ 
+ 2023-12-06  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-02  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/112314
+ 	* include/std/string_view (string_view::remove_suffix): Add
+ 	debug assertion.
+ 	* testsuite/21_strings/basic_string_view/modifiers/remove_prefix/debug.cc:
+ 	New test.
+ 	* testsuite/21_strings/basic_string_view/modifiers/remove_suffix/debug.cc:
+ 	New test.
+ 
+ 2023-12-06  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-17  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/std/utility (in_range): Rename _Up parameter to _Res.
+ 
+ 2023-11-15  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-15  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/112491
+ 	* python/libstdcxx/v6/xmethods.py (DequeWorkerBase.index):
+ 	Correctly handle unused capacity at the start of the first node.
+ 	* testsuite/libstdc++-xmethods/deque.cc: Check index operator
+ 	when elements have been removed from the front.
+ 
+ 2023-11-15  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-15  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/std/stacktrace (basic_stacktrace::at): Fix class name
+ 	in exception message.
+ 	* testsuite/19_diagnostics/stacktrace/hash.cc: Do not fail if
+ 	current() returns a non-empty stacktrace.
+ 
+ 2023-11-14  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-14  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/112348
+ 	* include/std/stacktrace (hash<basic_stacktrace<Alloc>>): Fix
+ 	type of hash function for entries.
+ 	* testsuite/19_diagnostics/stacktrace/hash.cc: New test.
+ 
+ 2023-11-14  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-11-14  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/112491
+ 	* python/libstdcxx/v6/xmethods.py (DequeWorkerBase.size): Fix
+ 	calculation to use _M_start._M_cur.
+ 	* testsuite/libstdc++-xmethods/deque.cc: Check failing cases.
+ 
+ 2023-11-13  Tom Tromey  <tromey@adacore.com>
+ 
+ 	Backported from master:
+ 	2023-10-04  Tom Tromey  <tromey@adacore.com>
+ 
+ 	* python/libstdcxx/v6/printers.py
+ 	(StdExpAnyPrinter.__init__): Qualify call to
+ 	_string_types.
+ 
+ 2023-11-13  Tom Tromey  <tromey@adacore.com>
+ 
+ 	Backported from master:
+ 	2023-10-04  Tom Tromey  <tromey@adacore.com>
+ 
+ 	* python/libstdcxx/v6/printers.py: Assume that
+ 	_versioned_namespace is non-None.
+ 	* python/libstdcxx/v6/xmethods.py (is_specialization_of):
+ 	Assume that _versioned_namespace is non-None.
+ 
+ 2023-11-13  Tom Tromey  <tromey@adacore.com>
+ 
+ 	Backported from master:
+ 	2023-09-28  Tom Tromey  <tromey@adacore.com>
+ 
+ 	* python/libstdcxx/v6/printers.py (Printer.add_version)
+ 	(add_one_template_type_printer)
+ 	(FilteringTypePrinter.add_one_type_printer): Use Python
+ 	"not in" operator.
+ 
+ 2023-11-13  Tom Tromey  <tromey@adacore.com>
+ 
+ 	Backported from master:
+ 	2023-10-04  Tom Tromey  <tromey@adacore.com>
+ 
+ 	* python/libstdcxx/v6/xmethods.py (_versioned_namespace):
+ 	Define.
+ 
+ 2023-11-13  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-09-28  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* python/libstdcxx/v6/xmethods.py (is_specialization_of): Define
+ 	new function.
+ 	(ArrayMethodsMatcher, DequeMethodsMatcher)
+ 	(ForwardListMethodsMatcher, ListMethodsMatcher)
+ 	(VectorMethodsMatcher, AssociativeContainerMethodsMatcher)
+ 	(UniquePtrGetWorker, UniquePtrMethodsMatcher)
+ 	(SharedPtrSubscriptWorker, SharedPtrMethodsMatcher): Use
+ 	is_specialization_of instead of re.match.
+ 
+ 2023-11-13  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-09-28  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* python/libstdcxx/v6/printers.py: Break long lines. Use raw
+ 	strings for regular expressions. Add whitespace around
+ 	operators.
+ 	(is_member_of_namespace): Use isinstance to check type.
+ 	(is_specialization_of): Likewise. Adjust template_name
+ 	for versioned namespace instead of duplicating the re.match
+ 	call.
+ 	(StdExpAnyPrinter._string_types): New static method.
+ 	(StdExpAnyPrinter.to_string): Use _string_types.
+ 
+ 2023-11-13  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-09-28  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* python/libstdcxx/v6/printers.py: Format docstrings according
+ 	to PEP 257.
+ 	* python/libstdcxx/v6/xmethods.py: Likewise.
+ 
+ 2023-11-13  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-09-12  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* python/libstdcxx/v6/printers.py: Reformat.
+ 	* python/libstdcxx/v6/xmethods.py: Likewise.
+ 
+ 2023-11-06  Ian Lance Taylor  <iant@golang.org>
+ 
+ 	PR libbacktrace/111315
+ 	PR libbacktrace/112263
+ 	* acinclude.m4: Set -D_GNU_SOURCE in BACKTRACE_CPPFLAGS and when
+ 	grepping link.h for dl_iterate_phdr.
+ 	* configure: Regenerate.
+ 
+ 2023-10-25  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-10-25  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/111936
+ 	* src/libbacktrace/Makefile.am: Add -prefer-pic to libtool
+ 	compile commands.
+ 	* src/libbacktrace/Makefile.in: Regenerate.
+ 
+ 2023-10-23  François Dumont  <fdumont@gcc.gnu.org>
+ 
+ 	* include/bits/hashtable_policy.h
+ 	(_Hash_code_base::_M_hash_code(const _Hash&, const _Hash_node_value<>&)): Remove.
+ 	(_Hash_code_base::_M_hash_code<_H2>(const _H2&, const _Hash_node_value<>&)): Remove.
+ 	* include/bits/hashtable.h
+ 	(_M_src_hash_code<_H2>(const _H2&, const key_type&, const __node_value_type&)): New.
+ 	(_M_merge_unique<>, _M_merge_multi<>): Use latter.
+ 	* testsuite/23_containers/unordered_map/modifiers/merge.cc
+ 	(test04, test05, test06): New test cases.
+ 
+ 2023-10-03  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/fs_dir.h (directory_iterator::operator==):
+ 	Define without using a non-exported shared_ptr symbol.
+ 	(recursive_directory_iterator::operator==): Likewise.
+ 
+ 2023-10-03  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-09-01  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* testsuite/27_io/filesystem/path/108636.cc: Add dg-require for
+ 	filesystem support.
+ 
+ 2023-10-03  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-06-06  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/108178
+ 	* src/filesystem/ops-common.h (do_copy_file): Check for empty
+ 	files by trying to read a character.
+ 	* testsuite/27_io/filesystem/operations/copy_file_108178.cc:
+ 	New test.
+ 
+ 2023-10-03  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-06-06  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* src/filesystem/ops-common.h (do_copy_file) [O_CLOEXEC]: Set
+ 	close-on-exec flag on file descriptors.
+ 
+ 2023-10-03  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-03-20  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* src/filesystem/ops-common.h (get_temp_directory_from_env): Fix
+ 	formatting.
+ 
+ 2023-10-03  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-02-02  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* src/filesystem/ops-common.h [AVR] (__unsupported): Always use
+ 	errc::function_not_supported instead of errc::not_supported.
+ 
+ 2023-10-02  Tim Song  <t.canens.cpp@gmail.com>
+ 
+ 	Backported from master:
+ 	2023-09-28  Tim Song  <t.canens.cpp@gmail.com>
+ 
+ 	PR libstdc++/111050
+ 	* include/bits/hashtable_policy.h
+ 	(_Hash_node_value_base<>::_M_valptr(), _Hash_node_value_base<>::_M_v())
+ 	Add [[__gnu__::__always_inline__]].
+ 
+ 2023-09-27  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-08-09  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/experimental/bits/fs_path.h (path::string): Use
+ 	_GLIBCXX17_CONSTEXPR not _GLIBCXX_CONSTEXPR for 'if constexpr'.
+ 	* include/std/charconv (__to_chars_8): Initialize variable for
+ 	C++17 constexpr rules.
+ 
+ 2023-09-26  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-09-25  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/111511
+ 	PR c++/111512
+ 	* include/std/array (to_array): Qualify calls to __to_array.
+ 	* testsuite/23_containers/array/creation/111512.cc: New test.
+ 
+ 2023-09-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-09-18  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* doc/xml/manual/configure.xml: Use conventional option name.
+ 	* doc/xml/manual/status_cxx2020.xml: Update.
+ 	* doc/html/*: Regenerate.
+ 
+ 2023-09-14  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-09-14  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR c++/111357
+ 	* include/bits/utility.h (make_integer_sequence): Add cast.
+ 	* testsuite/20_util/integer_sequence/pr111357.cc: New test.
+ 
+ 2023-07-12  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-07-12  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/95048
+ 	* testsuite/27_io/filesystem/path/construct/95048.cc: Check
+ 	conversions to wide strings.
+ 	* testsuite/experimental/filesystem/path/construct/95048.cc:
+ 	Likewise.
+ 
+ 2023-07-06  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-07-06  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/104299
+ 	* doc/xml/manual/configure.xml: Describe stdio_pure argument to
+ 	--enable-cstdio.
+ 	* doc/html/manual/configure.html: Regenerate.
+ 
+ 2023-06-23  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2023-06-01  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* doc/xml/manual/evolution.xml: Document removal of implicit
+ 	allocator rebinding extensions in strict mode and for C++20.
+ 	* doc/html/*: Regenerate.
+ 
+ 2023-06-21  Jason Merrill  <jason@redhat.com>
+ 
+ 	PR tree-optimization/105651
+ 	* include/bits/basic_string.tcc (_M_replace): Add an assert
+ 	to avoid -Wrestrict false positive.
+ 
+ 2023-05-30  Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	Backported from master:
+ 	2023-05-30  Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	* testsuite/20_util/from_chars/4.cc: Skip long double test06
+ 	on x86_64-vxworks.
+ 	* testsuite/20_util/to_chars/long_double.cc: Xfail run on
+ 	x86_64-vxworks.
+ 
+ 2023-05-30  Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	Backported from master:
+ 	2023-05-25  Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	* testsuite/20_util/to_chars/long_double.cc: Expect execution
+ 	fail on x86-vxworks.
+ 
+ 2023-05-30  Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	Backported from master:
+ 	2023-05-05  Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	* testsuite/20_util/from_chars/4.cc: Skip long double test06
+ 	on aarch64-vxworks.
+ 	* testsuite/20_util/to_chars/long_double.cc: Xfail run on
+ 	aarch64-vxworks.
+ 
+ 2023-05-30  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-05-30  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	PR libstdc++/109822
+ 	* include/experimental/bits/simd.h (to_native): Use int NTTP
+ 	as specified in PTS2.
+ 	(to_compatible): Likewise. Add missing tag to call mask
+ 	generator ctor.
+ 	* testsuite/experimental/simd/pr109822_cast_functions.cc: New
+ 	test.
+ 
+ 2023-05-30  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-05-30  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	* testsuite/experimental/simd/tests/integer_operators.cc:
+ 	Compute expected value differently to avoid getting turned into
+ 	a vector shift.
+ 
+ 2023-05-30  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-05-30  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	* testsuite/experimental/simd/tests/operator_cvt.cc: Make long
+ 	double <-> (u)long conversion tests conditional on sizeof(long
+ 	double) and sizeof(long).
+ 
+ 2023-05-30  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-05-26  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	* include/experimental/bits/simd_ppc.h (_S_bit_shift_left):
+ 	Negative __y is UB, so prefer signed compare.
+ 
+ 2023-05-24  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-05-24  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	PR libstdc++/109949
+ 	* include/experimental/bits/simd.h (__intrinsic_type): If
+ 	__ALTIVEC__ is defined, map gnu::vector_size types to their
+ 	corresponding __vector T types without losing unsignedness of
+ 	integer types. Also prefer long long over long.
+ 	* include/experimental/bits/simd_ppc.h (_S_popcount): Cast mask
+ 	object to the expected unsigned vector type.
+ 
+ 2023-05-24  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-05-24  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	PR libstdc++/109261
+ 	* include/experimental/bits/simd.h (__intrinsic_type):
+ 	Specialize __intrinsic_type<double, 8> and
+ 	__intrinsic_type<double, 16> in any case, but provide the member
+ 	type only with __aarch64__.
+ 
+ 2023-05-24  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-05-24  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	PR libstdc++/109261
+ 	* include/experimental/bits/simd_neon.h (_S_reduce): Add
+ 	constexpr and make NEON implementation conditional on
+ 	not __builtin_is_constant_evaluated.
+ 
+ 2023-05-23  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-05-23  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	PR libstdc++/109261
+ 	* include/experimental/bits/simd.h (_SimdWrapper::_M_set):
+ 	Avoid vector builtin subscripting in constant expressions.
+ 	(resizing_simd_cast): Avoid memcpy if constant_evaluated.
+ 	(const_where_expression, where_expression, where)
+ 	(__extract_part, simd_mask, _SimdIntOperators, simd): Add either
+ 	_GLIBCXX_SIMD_CONSTEXPR (on public APIs), or constexpr (on
+ 	internal APIs).
+ 	* include/experimental/bits/simd_builtin.h (__vector_permute)
+ 	(__vector_shuffle, __extract_part, _GnuTraits::_SimdCastType1)
+ 	(_GnuTraits::_SimdCastType2, _SimdImplBuiltin)
+ 	(_MaskImplBuiltin::_S_store): Add constexpr.
+ 	(_CommonImplBuiltin::_S_store_bool_array)
+ 	(_SimdImplBuiltin::_S_load, _SimdImplBuiltin::_S_store)
+ 	(_SimdImplBuiltin::_S_reduce, _MaskImplBuiltin::_S_load): Add
+ 	constant_evaluated case.
+ 	* include/experimental/bits/simd_fixed_size.h
+ 	(_S_masked_load): Reword comment.
+ 	(__tuple_element_meta, __make_meta, _SimdTuple::_M_apply_r)
+ 	(_SimdTuple::_M_subscript_read, _SimdTuple::_M_subscript_write)
+ 	(__make_simd_tuple, __optimize_simd_tuple, __extract_part)
+ 	(__autocvt_to_simd, _Fixed::__traits::_SimdBase)
+ 	(_Fixed::__traits::_SimdCastType, _SimdImplFixedSize): Add
+ 	constexpr.
+ 	(_SimdTuple::operator[], _M_set): Add constexpr and add
+ 	constant_evaluated case.
+ 	(_MaskImplFixedSize::_S_load): Add constant_evaluated case.
+ 	* include/experimental/bits/simd_scalar.h: Add constexpr.
+ 	* include/experimental/bits/simd_x86.h (_CommonImplX86): Add
+ 	constexpr and add constant_evaluated case.
+ 	(_SimdImplX86::_S_equal_to, _S_not_equal_to, _S_less)
+ 	(_S_less_equal): Value-initialize to satisfy constexpr
+ 	evaluation.
+ 	(_MaskImplX86::_S_load): Add constant_evaluated case.
+ 	(_MaskImplX86::_S_store): Add constexpr and constant_evaluated
+ 	case. Value-initialize local variables.
+ 	(_MaskImplX86::_S_logical_and, _S_logical_or, _S_bit_not)
+ 	(_S_bit_and, _S_bit_or, _S_bit_xor): Add constant_evaluated
+ 	case.
+ 	* testsuite/experimental/simd/pr109261_constexpr_simd.cc: New
+ 	test.
+ 
+ 2023-05-23  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-05-22  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	* include/experimental/bits/simd_builtin.h (_S_fpclassify): Move
+ 	__infn into #ifdef'ed block.
+ 	* testsuite/experimental/simd/tests/fpclassify.cc: Declare
+ 	constants only when used.
+ 	* testsuite/experimental/simd/tests/frexp.cc: Likewise.
+ 	* testsuite/experimental/simd/tests/logarithm.cc: Likewise.
+ 	* testsuite/experimental/simd/tests/trunc_ceil_floor.cc:
+ 	Likewise.
+ 	* testsuite/experimental/simd/tests/ldexp_scalbn_scalbln_modf.cc:
+ 	Move totest and expect1 into #ifdef'ed block.
+ 
+ 2023-05-23  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-03-28  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	* include/experimental/bits/simd.h (is_simd_flag_type): New.
+ 	(_IsSimdFlagType): New.
+ 	(copy_from, copy_to, load ctors): Constrain _Flags using
+ 	_IsSimdFlagType.
+ 
+ 2023-05-23  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-03-28  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	* include/experimental/bits/simd_x86.h (_SimdImplX86): Use
+ 	_Base::_S_divides if the optimized _S_divides function is hidden
+ 	via the preprocessor.
+ 
+ 2023-05-23  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-03-21  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	* include/experimental/bits/simd_detail.h: Don't declare the
+ 	simd API as constexpr with Clang.
+ 	* include/experimental/bits/simd_x86.h (__movm): New.
+ 	(_S_blend_avx512): Resolve FIXME. Implement blend using __movm
+ 	and ?:.
+ 	(_SimdImplX86::_S_masked_unary): Clang does not implement the
+ 	same builtins. Implement the function using __movm, ?:, and -
+ 	operators on vector_size types instead.
+ 
+ 2023-05-23  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-02-24  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	* include/experimental/bits/simd.h: Line breaks and indenting
+ 	fixed to follow the libstdc++ standard.
+ 	* include/experimental/bits/simd_builtin.h: Likewise.
+ 	* include/experimental/bits/simd_fixed_size.h: Likewise.
+ 	* include/experimental/bits/simd_neon.h: Likewise.
+ 	* include/experimental/bits/simd_ppc.h: Likewise.
+ 	* include/experimental/bits/simd_scalar.h: Likewise.
+ 	* include/experimental/bits/simd_x86.h: Likewise.
+ 
+ 2023-05-23  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-02-24  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	PR libstdc++/108030
+ 	* include/experimental/bits/simd_fixed_size.h
+ 	(_SimdImplFixedSize::_S_broadcast): Replace inline with
+ 	_GLIBCXX_SIMD_INTRINSIC.
+ 	(_SimdImplFixedSize::_S_generate): Likewise.
+ 	(_SimdImplFixedSize::_S_load): Likewise.
+ 	(_SimdImplFixedSize::_S_masked_load): Likewise.
+ 	(_SimdImplFixedSize::_S_store): Likewise.
+ 	(_SimdImplFixedSize::_S_masked_store): Likewise.
+ 	(_SimdImplFixedSize::_S_min): Likewise.
+ 	(_SimdImplFixedSize::_S_max): Likewise.
+ 	(_SimdImplFixedSize::_S_complement): Likewise.
+ 	(_SimdImplFixedSize::_S_unary_minus): Likewise.
+ 	(_SimdImplFixedSize::_S_plus): Likewise.
+ 	(_SimdImplFixedSize::_S_minus): Likewise.
+ 	(_SimdImplFixedSize::_S_multiplies): Likewise.
+ 	(_SimdImplFixedSize::_S_divides): Likewise.
+ 	(_SimdImplFixedSize::_S_modulus): Likewise.
+ 	(_SimdImplFixedSize::_S_bit_and): Likewise.
+ 	(_SimdImplFixedSize::_S_bit_or): Likewise.
+ 	(_SimdImplFixedSize::_S_bit_xor): Likewise.
+ 	(_SimdImplFixedSize::_S_bit_shift_left): Likewise.
+ 	(_SimdImplFixedSize::_S_bit_shift_right): Likewise.
+ 	(_SimdImplFixedSize::_S_remquo): Add inline keyword (to be
+ 	explicit about not always-inline, yet).
+ 	(_SimdImplFixedSize::_S_isinf): Likewise.
+ 	(_SimdImplFixedSize::_S_isfinite): Likewise.
+ 	(_SimdImplFixedSize::_S_isnan): Likewise.
+ 	(_SimdImplFixedSize::_S_isnormal): Likewise.
+ 	(_SimdImplFixedSize::_S_signbit): Likewise.
+ 
+ 2023-05-23  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-02-24  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	PR libstdc++/108856
+ 	* include/experimental/bits/simd_builtin.h
+ 	(_SimdImplBuiltin::_S_masked_unary): More efficient
+ 	implementation of masked inc-/decrement for integers and floats
+ 	without AVX2.
+ 	* include/experimental/bits/simd_x86.h
+ 	(_SimdImplX86::_S_masked_unary): New. Use AVX512 masked subtract
+ 	builtins for masked inc-/decrement.
+ 
+ 2023-05-23  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-02-23  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	* testsuite/experimental/simd/tests/reductions.cc: Introduce
+ 	max_distance as the type-dependent max error.
+ 
+ 2023-05-23  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-02-23  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	PR libstdc++/108030
+ 	* include/experimental/bits/simd_detail.h
+ 	(_GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA): Define as empty for
+ 	__clang__.
+ 
+ 2023-05-23  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	Backported from master:
+ 	2023-02-16  Matthias Kretz  <m.kretz@gsi.de>
+ 
+ 	PR libstdc++/108030
+ 	* include/experimental/bits/simd_detail.h: Define
+ 	_GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA.
+ 	* include/experimental/bits/simd.h: Annotate lambdas with
+ 	_GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA.
+ 	* include/experimental/bits/simd_builtin.h: Ditto.
+ 	* include/experimental/bits/simd_converter.h: Ditto.
+ 	* include/experimental/bits/simd_fixed_size.h: Ditto.
+ 	* include/experimental/bits/simd_math.h: Ditto.
+ 	* include/experimental/bits/simd_neon.h: Ditto.
+ 	* include/experimental/bits/simd_x86.h: Ditto.
+ 
+ 2023-05-16  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-11-28  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/107801
+ 	* src/c++17/memory_resource.cc (chunk::_M_bytes): Change type
+ 	from uint32_t to bitset::size_type. Adjust static assertion.
+ 	(__pool_resource::_Pool::replenish): Cast to size_t after
+ 	multiplication instead of before.
+ 	(__pool_resource::_M_alloc_pools): Ensure both arguments to
+ 	std::max have type size_t.
+ 
+ 2023-05-11  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2022-11-16  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* python/libstdcxx/v6/printers.py (StdExpAnyPrinter): Make
+ 	expansion of std::string in manager name more robust.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/acinclude.m4 gcc-12.4.0/libstdc++-v3/acinclude.m4
*** gcc-12.3.0/libstdc++-v3/acinclude.m4	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/acinclude.m4	Thu Jun 20 08:08:10 2024
*************** AC_DEFUN([GLIBCXX_ENABLE_C99], [
*** 978,984 ****
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i");
           }], [],
          [glibcxx_cv_c99_stdio_cxx98=yes], [glibcxx_cv_c99_stdio_cxx98=no])
      ])
--- 978,984 ----
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i", 1);
           }], [],
          [glibcxx_cv_c99_stdio_cxx98=yes], [glibcxx_cv_c99_stdio_cxx98=no])
      ])
*************** AC_DEFUN([GLIBCXX_ENABLE_C99], [
*** 1210,1216 ****
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i");
           }], [],
          [glibcxx_cv_c99_stdio_cxx11=yes], [glibcxx_cv_c99_stdio_cxx11=no])
      ])
--- 1210,1216 ----
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i", 1);
           }], [],
          [glibcxx_cv_c99_stdio_cxx11=yes], [glibcxx_cv_c99_stdio_cxx11=no])
      ])
*************** AC_DEFUN([GLIBCXX_CHECK_C99_TR1], [
*** 1623,1629 ****
    AC_LANG_SAVE
    AC_LANG_CPLUSPLUS
  
!   # Use -std=c++98 because the default (-std=gnu++98) leaves __STRICT_ANSI__
    # undefined and fake C99 facilities may be spuriously enabled.
    ac_save_CXXFLAGS="$CXXFLAGS"
    CXXFLAGS="$CXXFLAGS -std=c++98"
--- 1623,1629 ----
    AC_LANG_SAVE
    AC_LANG_CPLUSPLUS
  
!   # Use -std=c++98 because -std=gnu++98 leaves __STRICT_ANSI__
    # undefined and fake C99 facilities may be spuriously enabled.
    ac_save_CXXFLAGS="$CXXFLAGS"
    CXXFLAGS="$CXXFLAGS -std=c++98"
*************** AC_DEFUN([GLIBCXX_CHECK_C99_TR1], [
*** 1888,1896 ****
  		  lround(0.0);
  		  lroundf(0.0f);
  		  lroundl(0.0l);
! 		  nan(0);
! 		  nanf(0);
! 		  nanl(0);
  		  nearbyint(0.0);
  		  nearbyintf(0.0f);
  		  nearbyintl(0.0l);
--- 1888,1896 ----
  		  lround(0.0);
  		  lroundf(0.0f);
  		  lroundl(0.0l);
! 		  nan("");
! 		  nanf("");
! 		  nanl("");
  		  nearbyint(0.0);
  		  nearbyintf(0.0f);
  		  nearbyintl(0.0l);
*************** dnl
*** 4570,4575 ****
--- 4570,4635 ----
      AC_DEFINE(HAVE_STRUCT_DIRENT_D_TYPE, 1, [Define to 1 if `d_type' is a member of `struct dirent'.])
    fi
  dnl
+   AC_CACHE_CHECK([for chmod], glibcxx_cv_chmod, [dnl
+     GCC_TRY_COMPILE_OR_LINK(
+       [
+        #include <sys/stat.h>
+       ],
+       [
+        int i = chmod("", S_IRUSR);
+       ],
+       [glibcxx_cv_chmod=yes],
+       [glibcxx_cv_chmod=no])
+   ])
+   if test $glibcxx_cv_chmod = yes; then
+     AC_DEFINE(_GLIBCXX_USE_CHMOD, 1, [Define if usable chmod is available in <sys/stat.h>.])
+   fi
+ dnl
+   AC_CACHE_CHECK([for mkdir], glibcxx_cv_mkdir, [dnl
+     GCC_TRY_COMPILE_OR_LINK(
+       [
+        #include <sys/stat.h>
+       ],
+       [
+        int i = mkdir("", S_IRUSR);
+       ],
+       [glibcxx_cv_mkdir=yes],
+       [glibcxx_cv_mkdir=no])
+   ])
+   if test $glibcxx_cv_mkdir = yes; then
+     AC_DEFINE(_GLIBCXX_USE_MKDIR, 1, [Define if usable mkdir is available in <sys/stat.h>.])
+   fi
+ dnl
+   AC_CACHE_CHECK([for chdir], glibcxx_cv_chdir, [dnl
+     GCC_TRY_COMPILE_OR_LINK(
+       [
+        #include <unistd.h>
+       ],
+       [
+        int i = chdir("");
+       ],
+       [glibcxx_cv_chdir=yes],
+       [glibcxx_cv_chdir=no])
+   ])
+   if test $glibcxx_cv_chdir = yes; then
+     AC_DEFINE(_GLIBCXX_USE_CHDIR, 1, [Define if usable chdir is available in <unistd.h>.])
+   fi
+ dnl
+   AC_CACHE_CHECK([for getcwd], glibcxx_cv_getcwd, [dnl
+     GCC_TRY_COMPILE_OR_LINK(
+       [
+        #include <unistd.h>
+       ],
+       [
+        char* s = getcwd((char*)0, 1);
+       ],
+       [glibcxx_cv_getcwd=yes],
+       [glibcxx_cv_getcwd=no])
+   ])
+   if test $glibcxx_cv_getcwd = yes; then
+     AC_DEFINE(_GLIBCXX_USE_GETCWD, 1, [Define if usable getcwd is available in <unistd.h>.])
+   fi
+ dnl
    AC_CACHE_CHECK([for realpath], glibcxx_cv_realpath, [dnl
      GCC_TRY_COMPILE_OR_LINK(
        [
*************** AC_DEFUN([GLIBCXX_ENABLE_BACKTRACE], [
*** 4924,4930 ****
  
    # Most of this is adapted from libsanitizer/configure.ac
  
!   BACKTRACE_CPPFLAGS=
  
    # libbacktrace only needs atomics for int, which we've already tested
    if test "$glibcxx_cv_atomic_int" = "yes"; then
--- 4984,4990 ----
  
    # Most of this is adapted from libsanitizer/configure.ac
  
!   BACKTRACE_CPPFLAGS="-D_GNU_SOURCE"
  
    # libbacktrace only needs atomics for int, which we've already tested
    if test "$glibcxx_cv_atomic_int" = "yes"; then
*************** AC_DEFUN([GLIBCXX_ENABLE_BACKTRACE], [
*** 4952,4959 ****
--- 5012,5022 ----
      have_dl_iterate_phdr=no
    else
      # When built as a GCC target library, we can't do a link test.
+     ac_save_CPPFLAGS="$CPPFLAGS"
+     CPPFLAGS="$CPPFLAGS -D_GNU_SOURCE"
      AC_EGREP_HEADER([dl_iterate_phdr], [link.h], [have_dl_iterate_phdr=yes],
  		    [have_dl_iterate_phdr=no])
+     CPPFLAGS="$ac_save_CPPFLAGS"
    fi
    if test "$have_dl_iterate_phdr" = "yes"; then
      BACKTRACE_CPPFLAGS="$BACKTRACE_CPPFLAGS -DHAVE_DL_ITERATE_PHDR=1"
diff -Nrcpad gcc-12.3.0/libstdc++-v3/config/io/basic_file_stdio.cc gcc-12.4.0/libstdc++-v3/config/io/basic_file_stdio.cc
*** gcc-12.3.0/libstdc++-v3/config/io/basic_file_stdio.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/config/io/basic_file_stdio.cc	Thu Jun 20 08:08:10 2024
*************** namespace
*** 128,134 ****
      for (;;)
        {
  #ifdef _GLIBCXX_USE_STDIO_PURE
! 	const std::streamsize __ret = fwrite(__file, 1, __nleft, __file);
  #else
  	const std::streamsize __ret = write(__fd, __s, __nleft);
  #endif
--- 128,134 ----
      for (;;)
        {
  #ifdef _GLIBCXX_USE_STDIO_PURE
! 	const std::streamsize __ret = fwrite(__s, 1, __nleft, __file);
  #else
  	const std::streamsize __ret = write(__fd, __s, __nleft);
  #endif
diff -Nrcpad gcc-12.3.0/libstdc++-v3/config/os/bsd/darwin/os_defines.h gcc-12.4.0/libstdc++-v3/config/os/bsd/darwin/os_defines.h
*** gcc-12.3.0/libstdc++-v3/config/os/bsd/darwin/os_defines.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/config/os/bsd/darwin/os_defines.h	Thu Jun 20 08:08:10 2024
***************
*** 39,46 ****
  // -flat_namespace to work around the way that it doesn't.
  #define _GLIBCXX_WEAK_DEFINITION __attribute__ ((weak))
  
! // Static initializer macro is buggy in darwin, see libstdc++/51906
  #define _GTHREAD_USE_RECURSIVE_MUTEX_INIT_FUNC
  
  // Configure checks for nanosleep fail on Darwin, but nanosleep and
  // sched_yield are always available, so use them.
--- 39,50 ----
  // -flat_namespace to work around the way that it doesn't.
  #define _GLIBCXX_WEAK_DEFINITION __attribute__ ((weak))
  
! #if defined (__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__) \
!      && (__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__ < 1080)
! // Static initializer macro is absent for Darwin < 11 and buggy in Darwin 11,
! // see libstdc++/51906.  Fixed in Darwin 12 (OS X 10.8).
  #define _GTHREAD_USE_RECURSIVE_MUTEX_INIT_FUNC
+ #endif
  
  // Configure checks for nanosleep fail on Darwin, but nanosleep and
  // sched_yield are always available, so use them.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/config.h.in gcc-12.4.0/libstdc++-v3/config.h.in
*** gcc-12.3.0/libstdc++-v3/config.h.in	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/config.h.in	Thu Jun 20 08:08:10 2024
***************
*** 933,938 ****
--- 933,944 ----
     namespace std::tr1. */
  #undef _GLIBCXX_USE_C99_STDINT_TR1
  
+ /* Define if usable chdir is available in <unistd.h>. */
+ #undef _GLIBCXX_USE_CHDIR
+ 
+ /* Define if usable chmod is available in <sys/stat.h>. */
+ #undef _GLIBCXX_USE_CHMOD
+ 
  /* Defined if clock_gettime syscall has monotonic and realtime clock support.
     */
  #undef _GLIBCXX_USE_CLOCK_GETTIME_SYSCALL
***************
*** 957,962 ****
--- 963,971 ----
  /* Define if fchmodat is available in <sys/stat.h>. */
  #undef _GLIBCXX_USE_FCHMODAT
  
+ /* Define if usable getcwd is available in <unistd.h>. */
+ #undef _GLIBCXX_USE_GETCWD
+ 
  /* Defined if gettimeofday is available. */
  #undef _GLIBCXX_USE_GETTIMEOFDAY
  
***************
*** 972,977 ****
--- 981,989 ----
  /* Define if lstat is available in <sys/stat.h>. */
  #undef _GLIBCXX_USE_LSTAT
  
+ /* Define if usable mkdir is available in <sys/stat.h>. */
+ #undef _GLIBCXX_USE_MKDIR
+ 
  /* Defined if nanosleep is available. */
  #undef _GLIBCXX_USE_NANOSLEEP
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/configure gcc-12.4.0/libstdc++-v3/configure
*** gcc-12.3.0/libstdc++-v3/configure	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/configure	Thu Jun 20 08:08:10 2024
*************** GLIBCXX_HOSTED_TRUE
*** 786,791 ****
--- 786,793 ----
  glibcxx_compiler_shared_flag
  glibcxx_compiler_pic_flag
  glibcxx_lt_pic_flag
+ OS_IS_DARWIN_FALSE
+ OS_IS_DARWIN_TRUE
  enable_static
  enable_shared
  lt_host_flags
*************** else
*** 12191,12197 ****
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 12194 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
--- 12193,12199 ----
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 12196 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
*************** else
*** 12297,12303 ****
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 12300 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
--- 12299,12305 ----
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 12302 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
*************** esac
*** 15579,15584 ****
--- 15581,15600 ----
  
  
  
+ os_is_darwin=no
+ case ${host_os} in
+   darwin*) os_is_darwin=yes ;;
+   *) ;;
+ esac
+  if test x${os_is_darwin} = xyes; then
+   OS_IS_DARWIN_TRUE=
+   OS_IS_DARWIN_FALSE='#'
+ else
+   OS_IS_DARWIN_TRUE='#'
+   OS_IS_DARWIN_FALSE=
+ fi
+ 
+ 
  if test "$enable_vtable_verify" = yes; then
    predep_objects_CXX="${predep_objects_CXX} ${glibcxx_builddir}/../libgcc/vtv_start.o"
    postdep_objects_CXX="${postdep_objects_CXX} ${glibcxx_builddir}/../libgcc/vtv_end.o"
*************** $as_echo "$glibcxx_cv_atomic_long_long"
*** 15981,15987 ****
    # Fake what AC_TRY_COMPILE does.
  
      cat > conftest.$ac_ext << EOF
! #line 15984 "configure"
  int main()
  {
    typedef bool atomic_type;
--- 15997,16003 ----
    # Fake what AC_TRY_COMPILE does.
  
      cat > conftest.$ac_ext << EOF
! #line 16000 "configure"
  int main()
  {
    typedef bool atomic_type;
*************** $as_echo "$glibcxx_cv_atomic_bool" >&6;
*** 16016,16022 ****
      rm -f conftest*
  
      cat > conftest.$ac_ext << EOF
! #line 16019 "configure"
  int main()
  {
    typedef short atomic_type;
--- 16032,16038 ----
      rm -f conftest*
  
      cat > conftest.$ac_ext << EOF
! #line 16035 "configure"
  int main()
  {
    typedef short atomic_type;
*************** $as_echo "$glibcxx_cv_atomic_short" >&6;
*** 16051,16057 ****
      rm -f conftest*
  
      cat > conftest.$ac_ext << EOF
! #line 16054 "configure"
  int main()
  {
    // NB: _Atomic_word not necessarily int.
--- 16067,16073 ----
      rm -f conftest*
  
      cat > conftest.$ac_ext << EOF
! #line 16070 "configure"
  int main()
  {
    // NB: _Atomic_word not necessarily int.
*************** $as_echo "$glibcxx_cv_atomic_int" >&6; }
*** 16087,16093 ****
      rm -f conftest*
  
      cat > conftest.$ac_ext << EOF
! #line 16090 "configure"
  int main()
  {
    typedef long long atomic_type;
--- 16103,16109 ----
      rm -f conftest*
  
      cat > conftest.$ac_ext << EOF
! #line 16106 "configure"
  int main()
  {
    typedef long long atomic_type;
*************** $as_echo "mutex" >&6; }
*** 16243,16249 ****
    # unnecessary for this test.
  
      cat > conftest.$ac_ext << EOF
! #line 16246 "configure"
  int main()
  {
    _Decimal32 d1;
--- 16259,16265 ----
    # unnecessary for this test.
  
      cat > conftest.$ac_ext << EOF
! #line 16262 "configure"
  int main()
  {
    _Decimal32 d1;
*************** ac_compiler_gnu=$ac_cv_cxx_compiler_gnu
*** 16285,16291 ****
    # unnecessary for this test.
  
    cat > conftest.$ac_ext << EOF
! #line 16288 "configure"
  template<typename T1, typename T2>
    struct same
    { typedef T2 type; };
--- 16301,16307 ----
    # unnecessary for this test.
  
    cat > conftest.$ac_ext << EOF
! #line 16304 "configure"
  template<typename T1, typename T2>
    struct same
    { typedef T2 type; };
*************** else
*** 17573,17579 ****
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i");
           }
  int
  main ()
--- 17589,17595 ----
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i", 1);
           }
  int
  main ()
*************** cat confdefs.h - <<_ACEOF >conftest.$ac_
*** 17604,17610 ****
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i");
           }
  int
  main ()
--- 17620,17626 ----
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i", 1);
           }
  int
  main ()
*************** else
*** 18249,18255 ****
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i");
           }
  int
  main ()
--- 18265,18271 ----
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i", 1);
           }
  int
  main ()
*************** cat confdefs.h - <<_ACEOF >conftest.$ac_
*** 18280,18286 ****
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i");
           }
  int
  main ()
--- 18296,18302 ----
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i", 1);
           }
  int
  main ()
*************** ac_link='$CXX -o conftest$ac_exeext $CXX
*** 19695,19701 ****
  ac_compiler_gnu=$ac_cv_cxx_compiler_gnu
  
  
!   # Use -std=c++98 because the default (-std=gnu++98) leaves __STRICT_ANSI__
    # undefined and fake C99 facilities may be spuriously enabled.
    ac_save_CXXFLAGS="$CXXFLAGS"
    CXXFLAGS="$CXXFLAGS -std=c++98"
--- 19711,19717 ----
  ac_compiler_gnu=$ac_cv_cxx_compiler_gnu
  
  
!   # Use -std=c++98 because -std=gnu++98 leaves __STRICT_ANSI__
    # undefined and fake C99 facilities may be spuriously enabled.
    ac_save_CXXFLAGS="$CXXFLAGS"
    CXXFLAGS="$CXXFLAGS -std=c++98"
*************** typedef double_t  my_double_t;
*** 20070,20078 ****
  		  lround(0.0);
  		  lroundf(0.0f);
  		  lroundl(0.0l);
! 		  nan(0);
! 		  nanf(0);
! 		  nanl(0);
  		  nearbyint(0.0);
  		  nearbyintf(0.0f);
  		  nearbyintl(0.0l);
--- 20086,20094 ----
  		  lround(0.0);
  		  lroundf(0.0f);
  		  lroundl(0.0l);
! 		  nan("");
! 		  nanf("");
! 		  nanl("");
  		  nearbyint(0.0);
  		  nearbyintf(0.0f);
  		  nearbyintl(0.0l);
*************** $as_echo "$glibcxx_cv_dirent_d_type" >&6
*** 76337,76342 ****
--- 76353,76610 ----
  $as_echo "#define HAVE_STRUCT_DIRENT_D_TYPE 1" >>confdefs.h
  
    fi
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking for chmod" >&5
+ $as_echo_n "checking for chmod... " >&6; }
+ if ${glibcxx_cv_chmod+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+       if test x$gcc_no_link = xyes; then
+   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+        #include <sys/stat.h>
+ 
+ int
+ main ()
+ {
+ 
+        int i = chmod("", S_IRUSR);
+ 
+   ;
+   return 0;
+ }
+ _ACEOF
+ if ac_fn_cxx_try_compile "$LINENO"; then :
+   glibcxx_cv_chmod=yes
+ else
+   glibcxx_cv_chmod=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+ else
+   if test x$gcc_no_link = xyes; then
+   as_fn_error $? "Link tests are not allowed after GCC_NO_EXECUTABLES." "$LINENO" 5
+ fi
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+        #include <sys/stat.h>
+ 
+ int
+ main ()
+ {
+ 
+        int i = chmod("", S_IRUSR);
+ 
+   ;
+   return 0;
+ }
+ _ACEOF
+ if ac_fn_cxx_try_link "$LINENO"; then :
+   glibcxx_cv_chmod=yes
+ else
+   glibcxx_cv_chmod=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+ fi
+ 
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $glibcxx_cv_chmod" >&5
+ $as_echo "$glibcxx_cv_chmod" >&6; }
+   if test $glibcxx_cv_chmod = yes; then
+ 
+ $as_echo "#define _GLIBCXX_USE_CHMOD 1" >>confdefs.h
+ 
+   fi
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking for mkdir" >&5
+ $as_echo_n "checking for mkdir... " >&6; }
+ if ${glibcxx_cv_mkdir+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+       if test x$gcc_no_link = xyes; then
+   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+        #include <sys/stat.h>
+ 
+ int
+ main ()
+ {
+ 
+        int i = mkdir("", S_IRUSR);
+ 
+   ;
+   return 0;
+ }
+ _ACEOF
+ if ac_fn_cxx_try_compile "$LINENO"; then :
+   glibcxx_cv_mkdir=yes
+ else
+   glibcxx_cv_mkdir=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+ else
+   if test x$gcc_no_link = xyes; then
+   as_fn_error $? "Link tests are not allowed after GCC_NO_EXECUTABLES." "$LINENO" 5
+ fi
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+        #include <sys/stat.h>
+ 
+ int
+ main ()
+ {
+ 
+        int i = mkdir("", S_IRUSR);
+ 
+   ;
+   return 0;
+ }
+ _ACEOF
+ if ac_fn_cxx_try_link "$LINENO"; then :
+   glibcxx_cv_mkdir=yes
+ else
+   glibcxx_cv_mkdir=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+ fi
+ 
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $glibcxx_cv_mkdir" >&5
+ $as_echo "$glibcxx_cv_mkdir" >&6; }
+   if test $glibcxx_cv_mkdir = yes; then
+ 
+ $as_echo "#define _GLIBCXX_USE_MKDIR 1" >>confdefs.h
+ 
+   fi
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking for chdir" >&5
+ $as_echo_n "checking for chdir... " >&6; }
+ if ${glibcxx_cv_chdir+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+       if test x$gcc_no_link = xyes; then
+   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+        #include <unistd.h>
+ 
+ int
+ main ()
+ {
+ 
+        int i = chdir("");
+ 
+   ;
+   return 0;
+ }
+ _ACEOF
+ if ac_fn_cxx_try_compile "$LINENO"; then :
+   glibcxx_cv_chdir=yes
+ else
+   glibcxx_cv_chdir=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+ else
+   if test x$gcc_no_link = xyes; then
+   as_fn_error $? "Link tests are not allowed after GCC_NO_EXECUTABLES." "$LINENO" 5
+ fi
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+        #include <unistd.h>
+ 
+ int
+ main ()
+ {
+ 
+        int i = chdir("");
+ 
+   ;
+   return 0;
+ }
+ _ACEOF
+ if ac_fn_cxx_try_link "$LINENO"; then :
+   glibcxx_cv_chdir=yes
+ else
+   glibcxx_cv_chdir=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+ fi
+ 
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $glibcxx_cv_chdir" >&5
+ $as_echo "$glibcxx_cv_chdir" >&6; }
+   if test $glibcxx_cv_chdir = yes; then
+ 
+ $as_echo "#define _GLIBCXX_USE_CHDIR 1" >>confdefs.h
+ 
+   fi
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking for getcwd" >&5
+ $as_echo_n "checking for getcwd... " >&6; }
+ if ${glibcxx_cv_getcwd+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+       if test x$gcc_no_link = xyes; then
+   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+        #include <unistd.h>
+ 
+ int
+ main ()
+ {
+ 
+        char* s = getcwd((char*)0, 1);
+ 
+   ;
+   return 0;
+ }
+ _ACEOF
+ if ac_fn_cxx_try_compile "$LINENO"; then :
+   glibcxx_cv_getcwd=yes
+ else
+   glibcxx_cv_getcwd=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+ else
+   if test x$gcc_no_link = xyes; then
+   as_fn_error $? "Link tests are not allowed after GCC_NO_EXECUTABLES." "$LINENO" 5
+ fi
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+        #include <unistd.h>
+ 
+ int
+ main ()
+ {
+ 
+        char* s = getcwd((char*)0, 1);
+ 
+   ;
+   return 0;
+ }
+ _ACEOF
+ if ac_fn_cxx_try_link "$LINENO"; then :
+   glibcxx_cv_getcwd=yes
+ else
+   glibcxx_cv_getcwd=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+ fi
+ 
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $glibcxx_cv_getcwd" >&5
+ $as_echo "$glibcxx_cv_getcwd" >&6; }
+   if test $glibcxx_cv_getcwd = yes; then
+ 
+ $as_echo "#define _GLIBCXX_USE_GETCWD 1" >>confdefs.h
+ 
+   fi
    { $as_echo "$as_me:${as_lineno-$LINENO}: checking for realpath" >&5
  $as_echo_n "checking for realpath... " >&6; }
  if ${glibcxx_cv_realpath+:} false; then :
*************** fi
*** 77316,77322 ****
  
    # Most of this is adapted from libsanitizer/configure.ac
  
!   BACKTRACE_CPPFLAGS=
  
    # libbacktrace only needs atomics for int, which we've already tested
    if test "$glibcxx_cv_atomic_int" = "yes"; then
--- 77584,77590 ----
  
    # Most of this is adapted from libsanitizer/configure.ac
  
!   BACKTRACE_CPPFLAGS="-D_GNU_SOURCE"
  
    # libbacktrace only needs atomics for int, which we've already tested
    if test "$glibcxx_cv_atomic_int" = "yes"; then
*************** done
*** 77399,77404 ****
--- 77667,77674 ----
      have_dl_iterate_phdr=no
    else
      # When built as a GCC target library, we can't do a link test.
+     ac_save_CPPFLAGS="$CPPFLAGS"
+     CPPFLAGS="$CPPFLAGS -D_GNU_SOURCE"
      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
  /* end confdefs.h.  */
  #include <link.h>
*************** else
*** 77412,77417 ****
--- 77682,77688 ----
  fi
  rm -f conftest*
  
+     CPPFLAGS="$ac_save_CPPFLAGS"
    fi
    if test "$have_dl_iterate_phdr" = "yes"; then
      BACKTRACE_CPPFLAGS="$BACKTRACE_CPPFLAGS -DHAVE_DL_ITERATE_PHDR=1"
*************** if test -z "${MAINTAINER_MODE_TRUE}" &&
*** 79038,79043 ****
--- 79309,79318 ----
    as_fn_error $? "conditional \"MAINTAINER_MODE\" was never defined.
  Usually this means the macro was only invoked conditionally." "$LINENO" 5
  fi
+ if test -z "${OS_IS_DARWIN_TRUE}" && test -z "${OS_IS_DARWIN_FALSE}"; then
+   as_fn_error $? "conditional \"OS_IS_DARWIN\" was never defined.
+ Usually this means the macro was only invoked conditionally." "$LINENO" 5
+ fi
  if test -z "${GLIBCXX_HOSTED_TRUE}" && test -z "${GLIBCXX_HOSTED_FALSE}"; then
    as_fn_error $? "conditional \"GLIBCXX_HOSTED\" was never defined.
  Usually this means the macro was only invoked conditionally." "$LINENO" 5
diff -Nrcpad gcc-12.3.0/libstdc++-v3/configure.ac gcc-12.4.0/libstdc++-v3/configure.ac
*** gcc-12.3.0/libstdc++-v3/configure.ac	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/configure.ac	Thu Jun 20 08:08:10 2024
*************** ACX_LT_HOST_FLAGS
*** 100,105 ****
--- 100,112 ----
  AC_SUBST(enable_shared)
  AC_SUBST(enable_static)
  
+ os_is_darwin=no
+ case ${host_os} in
+   darwin*) os_is_darwin=yes ;;
+   *) ;;
+ esac
+ AM_CONDITIONAL([OS_IS_DARWIN], [test x${os_is_darwin} = xyes])
+ 
  if test "$enable_vtable_verify" = yes; then
    predep_objects_CXX="${predep_objects_CXX} ${glibcxx_builddir}/../libgcc/vtv_start.o"
    postdep_objects_CXX="${postdep_objects_CXX} ${glibcxx_builddir}/../libgcc/vtv_end.o"
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/doxygen/user.cfg.in gcc-12.4.0/libstdc++-v3/doc/doxygen/user.cfg.in
*** gcc-12.3.0/libstdc++-v3/doc/doxygen/user.cfg.in	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/doxygen/user.cfg.in	Thu Jun 20 08:08:10 2024
*************** DISTRIBUTE_GROUP_DOC   = YES
*** 388,394 ****
  # is disabled and one has to add nested compounds explicitly via \ingroup.
  # The default value is: NO.
  
! GROUP_NESTED_COMPOUNDS = YES
  
  # Set the SUBGROUPING tag to YES to allow class member groups of the same type
  # (for instance a group of public functions) to be put as a subgroup of that
--- 388,394 ----
  # is disabled and one has to add nested compounds explicitly via \ingroup.
  # The default value is: NO.
  
! GROUP_NESTED_COMPOUNDS = NO
  
  # Set the SUBGROUPING tag to YES to allow class member groups of the same type
  # (for instance a group of public functions) to be put as a subgroup of that
*************** INCLUDE_FILE_PATTERNS  =
*** 2326,2331 ****
--- 2326,2332 ----
  PREDEFINED             = __cplusplus=202002L \
                           __GTHREADS \
                           _GLIBCXX_HAS_GTHREADS \
+                          _GTHREAD_USE_MUTEX_TIMEDLOCK \
                           _GLIBCXX_HAVE_TLS \
                           _GLIBCXX_INCLUDE_AS_CXX11 \
                           "_GLIBCXX_PURE= " \
*************** PREDEFINED             = __cplusplus=202
*** 2348,2353 ****
--- 2349,2356 ----
                           "_GLIBCXX_END_NAMESPACE_CONTAINER= " \
                           "_GLIBCXX_END_NAMESPACE_CXX11= " \
                           "_GLIBCXX_END_NAMESPACE_LDBL= " \
+ 			 "-D_GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(X)= " \
+ 			 "-D_GLIBCXX_END_INLINE_ABI_NAMESPACE(X)= " \
                           "_GLIBCXX_TEMPLATE_ARGS=...  " \
                           "_GLIBCXX_DEPRECATED= " \
                           "_GLIBCXX_DEPRECATED_SUGGEST(E)= " \
*************** PREDEFINED             = __cplusplus=202
*** 2387,2392 ****
--- 2390,2396 ----
                           _GLIBCXX14_CONSTEXPR=constexpr \
                           _GLIBCXX17_CONSTEXPR=constexpr \
                           _GLIBCXX20_CONSTEXPR=constexpr \
+                          _GLIBCXX23_CONSTEXPR=constexpr \
                           "_GLIBCXX11_DEPRECATED= " \
                           "_GLIBCXX11_DEPRECATED_SUGGEST(E)= " \
                           "_GLIBCXX17_DEPRECATED= " \
*************** PREDEFINED             = __cplusplus=202
*** 2403,2408 ****
--- 2407,2414 ----
                           _GLIBCXX_HAVE_BUILTIN_IS_AGGREGATE \
                           _GLIBCXX_HAVE_IS_CONSTANT_EVALUATED \
                           _GLIBCXX_HAVE_BUILTIN_LAUNDER \
+ 			 "_GLIBCXX_DOXYGEN_ONLY(X)=X " \
+ 			 __allocator_base=std::__new_allocator \
  
  # If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then this
  # tag can be used to specify a list of macro names that should be expanded. The
*************** EXTERNAL_PAGES         = YES
*** 2473,2487 ****
  # Configuration options related to the dot tool
  #---------------------------------------------------------------------------
  
- # If the CLASS_DIAGRAMS tag is set to YES, doxygen will generate a class diagram
- # (in HTML and LaTeX) for classes with base or super classes. Setting the tag to
- # NO turns the diagrams off. Note that this option also works with HAVE_DOT
- # disabled, but it is recommended to install and use dot, since it yields more
- # powerful graphs.
- # The default value is: YES.
- 
- CLASS_DIAGRAMS         = YES
- 
  # You can include diagrams made with dia in doxygen documentation. Doxygen will
  # then run dia to produce the diagram and insert it in the documentation. The
  # DIA_PATH tag allows you to specify the directory where the dia binary resides.
--- 2479,2484 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/html/manual/api.html gcc-12.4.0/libstdc++-v3/doc/html/manual/api.html
*** gcc-12.3.0/libstdc++-v3/doc/html/manual/api.html	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/html/manual/api.html	Thu Jun 20 08:08:10 2024
*************** Calling a <code class="code">std::bind</
*** 370,375 ****
--- 370,380 ----
    For the non-default <code class="option">--enable-symvers=gnu-versioned-namespace</code>
    configuration, the shared library SONAME has been changed to
    <code class="filename">libstdc++.so.8</code>.
+ </p><p>
+   The extension allowing containers to be instantiated with an allocator
+   that doesn't match the container's value type is no longer allowed in
+   strict (<code class="option">-std=c++NN</code>) modes, only in
+   <code class="option">-std=gnu++NN</code> modes.
  </p></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="api.rel_91"></a><code class="constant">9</code></h3></div></div></div><p>
    C++17 header
    <code class="filename">&lt;memory_resource&gt;</code>
*************** Calling a <code class="code">std::bind</
*** 425,430 ****
--- 430,439 ----
    and
    <code class="filename">&lt;stop_token&gt;</code>
    added.
+ </p><p>
+   The extension allowing containers to be instantiated with an allocator
+   that doesn't match the container's value type is no longer allowed in
+   C++20 mode, even in non-strict <code class="option">-std=gnu++20</code> mode.
  </p></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="api.rel_111"></a><code class="constant">11</code></h3></div></div></div><p>
    The <code class="option">--enable-cheaders=c_std</code> configuration
    was deprecated.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/html/manual/appendix_contributing.html gcc-12.4.0/libstdc++-v3/doc/html/manual/appendix_contributing.html
*** gcc-12.3.0/libstdc++-v3/doc/html/manual/appendix_contributing.html	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/html/manual/appendix_contributing.html	Thu Jun 20 08:08:10 2024
***************
*** 10,16 ****
  </h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="appendix_contributing.html#contrib.list">Contributor Checklist</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_contributing.html#list.reading">Reading</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.copyright">Assignment</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.getting">Getting Sources</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.patches">Submitting Patches</a></span></dt></dl></dd><dt><span class="section"><a href="source_organization.html">Directory Layout and Source Conventions</a></span></dt><dt><span class="section"><a href="source_code_style.html">Coding Style</a></span></dt><dd><dl><dt><span class="section"><a href="source_code_style.html#coding_style.bad_identifiers">Bad Identifiers</a></span></dt><dt><span class="section"><a href="source_code_style.html#coding_style.example">By Example</a></span></dt></dl></dd><dt><span class="section"><a href="source_design_notes.html">Design Notes</a></span></dt></dl></div><p>
    The GNU C++ Library is part of GCC and follows the same development model,
    so the general rules for
!   <a class="link" href="http://gcc.gnu.org/contribute.html" target="_top">contributing
    to GCC</a> apply. Active
    contributors are assigned maintainership responsibility, and given
    write access to the source repository. First-time contributors
--- 10,16 ----
  </h1></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="appendix_contributing.html#contrib.list">Contributor Checklist</a></span></dt><dd><dl><dt><span class="section"><a href="appendix_contributing.html#list.reading">Reading</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.copyright">Assignment</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.getting">Getting Sources</a></span></dt><dt><span class="section"><a href="appendix_contributing.html#list.patches">Submitting Patches</a></span></dt></dl></dd><dt><span class="section"><a href="source_organization.html">Directory Layout and Source Conventions</a></span></dt><dt><span class="section"><a href="source_code_style.html">Coding Style</a></span></dt><dd><dl><dt><span class="section"><a href="source_code_style.html#coding_style.bad_identifiers">Bad Identifiers</a></span></dt><dt><span class="section"><a href="source_code_style.html#coding_style.example">By Example</a></span></dt></dl></dd><dt><span class="section"><a href="source_design_notes.html">Design Notes</a></span></dt></dl></div><p>
    The GNU C++ Library is part of GCC and follows the same development model,
    so the general rules for
!   <a class="link" href="https://gcc.gnu.org/contribute.html" target="_top">contributing
    to GCC</a> apply. Active
    contributors are assigned maintainership responsibility, and given
    write access to the source repository. First-time contributors
***************
*** 34,40 ****
  	  <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/" target="_top">http://www.open-std.org/jtc1/sc22/wg21</a>
  	</p></li><li class="listitem"><p>
  	  Peruse
! 	  the <a class="link" href="http://www.gnu.org/prep/standards/" target="_top">GNU
  	  Coding Standards</a>, and chuckle when you hit the part
  	  about <span class="quote">“<span class="quote">Using Languages Other Than C</span>”</span>.
  	</p></li><li class="listitem"><p>
--- 34,40 ----
  	  <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/" target="_top">http://www.open-std.org/jtc1/sc22/wg21</a>
  	</p></li><li class="listitem"><p>
  	  Peruse
! 	  the <a class="link" href="https://www.gnu.org/prep/standards/" target="_top">GNU
  	  Coding Standards</a>, and chuckle when you hit the part
  	  about <span class="quote">“<span class="quote">Using Languages Other Than C</span>”</span>.
  	</p></li><li class="listitem"><p>
***************
*** 46,52 ****
  	  library-specific information found in
            <a class="link" href="appendix_porting.html" title="Appendix B.  Porting and Maintenance">Porting and Maintenance</a>.
        </p></li></ul></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="list.copyright"></a>Assignment</h3></div></div></div><p>
!       See the <a class="link" href="http://gcc.gnu.org/contribute.html#legal" target="_top">legal prerequisites</a> for all GCC contributions.
      </p><p>
        Historically, the libstdc++ assignment form added the following
        question:
--- 46,52 ----
  	  library-specific information found in
            <a class="link" href="appendix_porting.html" title="Appendix B.  Porting and Maintenance">Porting and Maintenance</a>.
        </p></li></ul></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="list.copyright"></a>Assignment</h3></div></div></div><p>
!       See the <a class="link" href="https://gcc.gnu.org/contribute.html#legal" target="_top">legal prerequisites</a> for all GCC contributions.
      </p><p>
        Historically, the libstdc++ assignment form added the following
        question:
***************
*** 79,97 ****
  	  bug. For new features a description of the feature and your
  	  implementation.
  	</p></li><li class="listitem"><p>
! 	  A ChangeLog entry as plain text; see the various
! 	  ChangeLog files for format and content. If you are
! 	  using emacs as your editor, simply position the insertion
! 	  point at the beginning of your change and hit CX-4a to bring
! 	  up the appropriate ChangeLog entry. See--magic! Similar
! 	  functionality also exists for vi.
  	</p></li><li class="listitem"><p>
  	  A testsuite submission or sample program that will
  	  easily and simply show the existing error or test new
  	  functionality.
  	</p></li><li class="listitem"><p>
  	  The patch itself. If you are using the Git repository use
! 	  <span class="command"><strong>git diff</strong></span> or <span class="command"><strong>git format-patch</strong></span>
  	  to produce a patch;
  	  otherwise, use <span class="command"><strong>diff -cp OLD NEW</strong></span>. If your
  	  version of diff does not support these options, then get the
--- 79,97 ----
  	  bug. For new features a description of the feature and your
  	  implementation.
  	</p></li><li class="listitem"><p>
! 	  A ChangeLog entry as part of the Git commit message. Check
! 	  some recent commits for format and content. The
! 	  <code class="filename">contrib/mklog.py</code> script can be used to
! 	  generate a ChangeLog template for commit messages. See
! 	  <a class="link" href="https://gcc.gnu.org/gitwrite.html" target="_top">Read-write Git access</a>
! 	  for scripts and aliases that are useful here.
  	</p></li><li class="listitem"><p>
  	  A testsuite submission or sample program that will
  	  easily and simply show the existing error or test new
  	  functionality.
  	</p></li><li class="listitem"><p>
  	  The patch itself. If you are using the Git repository use
! 	  <span class="command"><strong>git show</strong></span> or <span class="command"><strong>git format-patch</strong></span>
  	  to produce a patch;
  	  otherwise, use <span class="command"><strong>diff -cp OLD NEW</strong></span>. If your
  	  version of diff does not support these options, then get the
***************
*** 102,107 ****
--- 102,109 ----
  	  patches and related discussion should be sent to the
  	  libstdc++ mailing list. In common with the rest of GCC,
  	  patches should also be sent to the gcc-patches mailing list.
+ 	  So you could send your email To:libstdc++@gcc.gnu.org and
+ 	  Cc:gcc-patches@gcc.gnu.org for example.
  	</p></li></ul></div></div></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="appendix.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="appendix.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="source_organization.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">Part IV. 
    Appendices
   </td><td width="20%" align="center"><a accesskey="h" href="../index.html">Home</a></td><td width="40%" align="right" valign="top"> Directory Layout and Source Conventions</td></tr></table></div></body></html>
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/html/manual/configure.html gcc-12.4.0/libstdc++-v3/doc/html/manual/configure.html
*** gcc-12.3.0/libstdc++-v3/doc/html/manual/configure.html	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/html/manual/configure.html	Thu Jun 20 08:08:10 2024
***************
*** 38,46 ****
       </p><pre class="programlisting">
     --with-gxx-include-dir=/foo/H-x86-gcc-3-c-gxx-inc/include/4.4-20090404</pre></dd><dt><span class="term"><code class="code">--enable-cstdio</code></span></dt><dd><p>This is an abbreviated form of <code class="code">'--enable-cstdio=stdio'</code>
  	(described next).
!      </p></dd><dt><span class="term"><code class="code">--enable-cstdio=OPTION</code></span></dt><dd><p>Select a target-specific I/O package. At the moment, the only
! 	choice is to use 'stdio', a generic "C" abstraction.
! 	The default is 'stdio'. This option can change the library ABI.
       </p></dd><dt><span class="term"><code class="code">--enable-clocale</code></span></dt><dd><p>This is an abbreviated form of <code class="code">'--enable-clocale=generic'</code>
  	(described next).
       </p></dd><dt><span class="term"><code class="code">--enable-clocale=OPTION</code></span></dt><dd><p>Select a target-specific underlying locale package.  The
--- 38,51 ----
       </p><pre class="programlisting">
     --with-gxx-include-dir=/foo/H-x86-gcc-3-c-gxx-inc/include/4.4-20090404</pre></dd><dt><span class="term"><code class="code">--enable-cstdio</code></span></dt><dd><p>This is an abbreviated form of <code class="code">'--enable-cstdio=stdio'</code>
  	(described next).
!      </p></dd><dt><span class="term"><code class="code">--enable-cstdio=OPTION</code></span></dt><dd><p>Select a target-specific I/O package. The choices are 'stdio'
!        which is a generic abstraction using POSIX file I/O APIs
!        (<code class="function">read</code>, <code class="function">write</code>,
!        <code class="function">lseek</code>, etc.), and 'stdio_pure' which is similar
!        but only uses standard C file I/O APIs (<code class="function">fread</code>,
!        <code class="function">fwrite</code>, <code class="function">fseek</code>, etc.).
!        The 'stdio_posix' choice is a synonym for 'stdio'.
!        The default is 'stdio'. This option can change the library ABI.
       </p></dd><dt><span class="term"><code class="code">--enable-clocale</code></span></dt><dd><p>This is an abbreviated form of <code class="code">'--enable-clocale=generic'</code>
  	(described next).
       </p></dd><dt><span class="term"><code class="code">--enable-clocale=OPTION</code></span></dt><dd><p>Select a target-specific underlying locale package.  The
***************
*** 203,210 ****
  	C++ includes. If enabled (as by default), and the compiler
  	seems capable of passing the simple sanity checks thrown at
  	it, try to build stdc++.h.gch as part of the make process.
! 	In addition, this generated file is used later on (by appending <code class="code">
! 	--include bits/stdc++.h </code> to CXXFLAGS) when running the
  	testsuite.
       </p></dd><dt><span class="term"><code class="code">--enable-extern-template</code>[default]</span></dt><dd><p>Use extern template to pre-instantiate all required
   	specializations for certain types defined in the standard libraries.
--- 208,215 ----
  	C++ includes. If enabled (as by default), and the compiler
  	seems capable of passing the simple sanity checks thrown at
  	it, try to build stdc++.h.gch as part of the make process.
! 	In addition, this generated file is used later on (by appending
! 	<code class="code">-include bits/stdc++.h</code> to CXXFLAGS) when running the
  	testsuite.
       </p></dd><dt><span class="term"><code class="code">--enable-extern-template</code>[default]</span></dt><dd><p>Use extern template to pre-instantiate all required
   	specializations for certain types defined in the standard libraries.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/html/manual/source_code_style.html gcc-12.4.0/libstdc++-v3/doc/html/manual/source_code_style.html
*** gcc-12.3.0/libstdc++-v3/doc/html/manual/source_code_style.html	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/html/manual/source_code_style.html	Thu Jun 20 08:08:10 2024
***************
*** 197,209 ****
        it is intended to precede the recommendations of the GNU Coding<br />
        Standard, which can be referenced in full here:<br />
  <br />
!       <a class="link" href="http://www.gnu.org/prep/standards/standards.html#Formatting" target="_top">http://www.gnu.org/prep/standards/standards.html#Formatting</a><br />
  <br />
        The rest of this is also interesting reading, but skip the "Design<br />
        Advice" part.<br />
  <br />
        The GCC coding conventions are here, and are also useful:<br />
!       <a class="link" href="http://gcc.gnu.org/codingconventions.html" target="_top">http://gcc.gnu.org/codingconventions.html</a><br />
  <br />
        In addition, because it doesn't seem to be stated explicitly anywhere<br />
        else, there is an 80 column source limit.<br />
--- 197,209 ----
        it is intended to precede the recommendations of the GNU Coding<br />
        Standard, which can be referenced in full here:<br />
  <br />
!       <a class="link" href="https://www.gnu.org/prep/standards/standards.html#Formatting" target="_top">https://www.gnu.org/prep/standards/standards.html#Formatting</a><br />
  <br />
        The rest of this is also interesting reading, but skip the "Design<br />
        Advice" part.<br />
  <br />
        The GCC coding conventions are here, and are also useful:<br />
!       <a class="link" href="https://gcc.gnu.org/codingconventions.html" target="_top">https://gcc.gnu.org/codingconventions.html</a><br />
  <br />
        In addition, because it doesn't seem to be stated explicitly anywhere<br />
        else, there is an 80 column source limit.<br />
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/html/manual/status.html gcc-12.4.0/libstdc++-v3/doc/html/manual/status.html
*** gcc-12.3.0/libstdc++-v3/doc/html/manual/status.html	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/html/manual/status.html	Thu Jun 20 08:08:10 2024
*************** not in any particular release.
*** 217,223 ****
  	<span class="emphasis"><em>30</em></span>
        </td><td colspan="3" align="left">
  	<span class="emphasis"><em>Thread support</em></span>
!       </td></tr><tr><td align="left">30.1</td><td align="left">General</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.2</td><td align="left">Requirements</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.3</td><td align="left">Threads</td><td align="left"> </td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">30.3.1</td><td align="left">Class <code class="code">thread</code></td><td align="left">Partial</td><td align="left"><code class="code">thread::id</code> comparisons not well-defined</td></tr><tr><td align="left">30.3.2</td><td align="left">Namespace <code class="code">this_thread</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4</td><td align="left">Mutual exclusion</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1</td><td align="left">Mutex requirements</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1.1</td><td align="left">In general</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1.2</td><td align="left">Mutex types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1.2.1</td><td align="left">Class <code class="code">mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.1.2.2</td><td align="left">Class <code class="code">recursive_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.1.3</td><td align="left">Timed mutex types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1.3.1</td><td align="left">Class <code class="code">timed_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.1.3.2</td><td align="left">Class <code class="code">recursive_timed_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.2</td><td align="left">Locks</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.2.1</td><td align="left">Class template <code class="code">lock_guard</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.2.2</td><td align="left">Class template <code class="code">unique_lock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.3</td><td align="left">Generic locking algorithms</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.4</td><td align="left">Call once</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.4.1</td><td align="left">Struct <code class="code">once_flag</code></td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">30.4.4.2</td><td align="left">Function <code class="code">call_once</code></td><td align="left">Y</td><td align="left">Exception support is broken on non-Linux targets.
  	See <a class="link" href="https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66146" target="_top">PR
  	66146</a>.
        </td></tr><tr><td align="left">30.5</td><td align="left">Condition variables</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.5.1</td><td align="left">Class <code class="code">condition_variable</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.5.2</td><td align="left">Class <code class="code">condition_variable_any</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6</td><td align="left">Futures</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.6.1</td><td align="left">Overview</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.6.2</td><td align="left">Error handling</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.3</td><td align="left">Class <code class="code">future_error</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.4</td><td align="left">Shared state</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.5</td><td align="left">Class template <code class="code">promise</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.6</td><td align="left">Class template <code class="code">future</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.7</td><td align="left">Class template <code class="code">shared_future</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.8</td><td align="left">Function template <code class="code">async</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.9</td><td align="left">Class template <code class="code">packaged_task</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">
--- 217,223 ----
  	<span class="emphasis"><em>30</em></span>
        </td><td colspan="3" align="left">
  	<span class="emphasis"><em>Thread support</em></span>
!       </td></tr><tr><td align="left">30.1</td><td align="left">General</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.2</td><td align="left">Requirements</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.3</td><td align="left">Threads</td><td align="left"> </td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">30.3.1</td><td align="left">Class <code class="code">thread</code></td><td align="left">Partial</td><td align="left"><code class="code">thread::id</code> comparisons not well-defined</td></tr><tr><td align="left">30.3.2</td><td align="left">Namespace <code class="code">this_thread</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4</td><td align="left">Mutual exclusion</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1</td><td align="left">Mutex requirements</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1.1</td><td align="left">In general</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1.2</td><td align="left">Mutex types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1.2.1</td><td align="left">Class <code class="code">mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.1.2.2</td><td align="left">Class <code class="code">recursive_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.1.3</td><td align="left">Timed mutex types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1.3.1</td><td align="left">Class <code class="code">timed_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.1.3.2</td><td align="left">Class <code class="code">recursive_timed_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.2</td><td align="left">Locks</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.2.1</td><td align="left">Class template <code class="code">lock_guard</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.2.2</td><td align="left">Class template <code class="code">unique_lock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.3</td><td align="left">Generic locking algorithms</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.4</td><td align="left">Call once</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.4.1</td><td align="left">Struct <code class="code">once_flag</code></td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">30.4.4.2</td><td align="left">Function <code class="code">call_once</code></td><td align="left">Y</td><td align="left">Exception support is broken.
  	See <a class="link" href="https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66146" target="_top">PR
  	66146</a>.
        </td></tr><tr><td align="left">30.5</td><td align="left">Condition variables</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.5.1</td><td align="left">Class <code class="code">condition_variable</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.5.2</td><td align="left">Class <code class="code">condition_variable_any</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6</td><td align="left">Futures</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.6.1</td><td align="left">Overview</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.6.2</td><td align="left">Error handling</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.3</td><td align="left">Class <code class="code">future_error</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.4</td><td align="left">Shared state</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.5</td><td align="left">Class template <code class="code">promise</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.6</td><td align="left">Class template <code class="code">future</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.7</td><td align="left">Class template <code class="code">shared_future</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.8</td><td align="left">Function template <code class="code">async</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.9</td><td align="left">Class template <code class="code">packaged_task</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">
*************** not in any particular release.
*** 490,496 ****
  	<span class="emphasis"><em>30</em></span>
        </td><td colspan="3" align="left">
  	<span class="emphasis"><em>Thread support</em></span>
!       </td></tr><tr><td align="left">30.1</td><td align="left">General</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.2</td><td align="left">Requirements</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.3</td><td align="left">Threads</td><td align="left"> </td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">30.3.1</td><td align="left">Class <code class="code">thread</code></td><td align="left">Partial</td><td align="left"><code class="code">thread::id</code> comparisons not well-defined</td></tr><tr><td align="left">30.3.2</td><td align="left">Namespace <code class="code">this_thread</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4</td><td align="left">Mutual exclusion</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1</td><td align="left">Mutex requirements</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1.1</td><td align="left">In general</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1.2</td><td align="left">Mutex types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1.2.1</td><td align="left">Class <code class="code">mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.1.2.2</td><td align="left">Class <code class="code">recursive_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.1.3</td><td align="left">Timed mutex types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1.3.1</td><td align="left">Class <code class="code">timed_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.1.3.2</td><td align="left">Class <code class="code">recursive_timed_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.1.4</td><td align="left">Shared timed mutex types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1.4.1</td><td align="left">Class <code class="code">shared_timed_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.2</td><td align="left">Locks</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.2.1</td><td align="left">Class template <code class="code">lock_guard</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.2.2</td><td align="left">Class template <code class="code">unique_lock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.2.3</td><td align="left">Class template <code class="code">shared_lock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.3</td><td align="left">Generic locking algorithms</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.4</td><td align="left">Call once</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.4.1</td><td align="left">Struct <code class="code">once_flag</code></td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">30.4.4.2</td><td align="left">Function <code class="code">call_once</code></td><td align="left">Broken</td><td align="left">Exception support is broken on non-Linux targets.
  	See <a class="link" href="https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66146" target="_top">PR
  	66146</a>.
        </td></tr><tr><td align="left">30.5</td><td align="left">Condition variables</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.5.1</td><td align="left">Class <code class="code">condition_variable</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.5.2</td><td align="left">Class <code class="code">condition_variable_any</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6</td><td align="left">Futures</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.6.1</td><td align="left">Overview</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.6.2</td><td align="left">Error handling</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.3</td><td align="left">Class <code class="code">future_error</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.4</td><td align="left">Shared state</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.5</td><td align="left">Class template <code class="code">promise</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.6</td><td align="left">Class template <code class="code">future</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.7</td><td align="left">Class template <code class="code">shared_future</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.8</td><td align="left">Function template <code class="code">async</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.9</td><td align="left">Class template <code class="code">packaged_task</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">
--- 490,496 ----
  	<span class="emphasis"><em>30</em></span>
        </td><td colspan="3" align="left">
  	<span class="emphasis"><em>Thread support</em></span>
!       </td></tr><tr><td align="left">30.1</td><td align="left">General</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.2</td><td align="left">Requirements</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.3</td><td align="left">Threads</td><td align="left"> </td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">30.3.1</td><td align="left">Class <code class="code">thread</code></td><td align="left">Partial</td><td align="left"><code class="code">thread::id</code> comparisons not well-defined</td></tr><tr><td align="left">30.3.2</td><td align="left">Namespace <code class="code">this_thread</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4</td><td align="left">Mutual exclusion</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1</td><td align="left">Mutex requirements</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1.1</td><td align="left">In general</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1.2</td><td align="left">Mutex types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1.2.1</td><td align="left">Class <code class="code">mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.1.2.2</td><td align="left">Class <code class="code">recursive_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.1.3</td><td align="left">Timed mutex types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1.3.1</td><td align="left">Class <code class="code">timed_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.1.3.2</td><td align="left">Class <code class="code">recursive_timed_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.1.4</td><td align="left">Shared timed mutex types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.1.4.1</td><td align="left">Class <code class="code">shared_timed_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.2</td><td align="left">Locks</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.2.1</td><td align="left">Class template <code class="code">lock_guard</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.2.2</td><td align="left">Class template <code class="code">unique_lock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.2.3</td><td align="left">Class template <code class="code">shared_lock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.3</td><td align="left">Generic locking algorithms</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.4.4</td><td align="left">Call once</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.4.4.1</td><td align="left">Struct <code class="code">once_flag</code></td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">30.4.4.2</td><td align="left">Function <code class="code">call_once</code></td><td align="left">Broken</td><td align="left">Exception support is broken.
  	See <a class="link" href="https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66146" target="_top">PR
  	66146</a>.
        </td></tr><tr><td align="left">30.5</td><td align="left">Condition variables</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.5.1</td><td align="left">Class <code class="code">condition_variable</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.5.2</td><td align="left">Class <code class="code">condition_variable_any</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6</td><td align="left">Futures</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.6.1</td><td align="left">Overview</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">30.6.2</td><td align="left">Error handling</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.3</td><td align="left">Class <code class="code">future_error</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.4</td><td align="left">Shared state</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.5</td><td align="left">Class template <code class="code">promise</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.6</td><td align="left">Class template <code class="code">future</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.7</td><td align="left">Class template <code class="code">shared_future</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.8</td><td align="left">Function template <code class="code">async</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">30.6.9</td><td align="left">Class template <code class="code">packaged_task</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">
*************** since C++14 and the implementation is co
*** 967,973 ****
  	<span class="emphasis"><em>33</em></span>
        </td><td colspan="3" align="left">
  	<span class="emphasis"><em>Thread support</em></span>
!       </td></tr><tr><td align="left">33.1</td><td align="left">General</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.2</td><td align="left">Requirements</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.3</td><td align="left">Threads</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.3.1</td><td align="left">Header <code class="code">thread</code> synopsis</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.3.2</td><td align="left">Class <code class="code">thread</code></td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">33.3.2.1</td><td align="left">Class <code class="code">thread</code></td><td align="left">Partial</td><td align="left"><code class="code">thread::id</code> comparisons not well-defined</td></tr><tr><td align="left">33.3.3</td><td align="left">Namespace <code class="code">this_thread</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4</td><td align="left">Mutual exclusion</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.4.3</td><td align="left">Mutex requirements</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.4.3.1</td><td align="left">In general</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.4.3.2</td><td align="left">Mutex types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.4.3.2.1</td><td align="left">Class <code class="code">mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.3.2.2</td><td align="left">Class <code class="code">recursive_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.3.3</td><td align="left">Timed mutex types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.4.3.3.1</td><td align="left">Class <code class="code">timed_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.3.3.2</td><td align="left">Class <code class="code">recursive_timed_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.3.4</td><td align="left">Shared mutex types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.4.3.4.1</td><td align="left">Class <code class="code">shared_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.3.5</td><td align="left">Shared timed mutex types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.4.3.5.1</td><td align="left">Class <code class="code">shared_timed_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.4</td><td align="left">Locks</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.4.4.1</td><td align="left">Class template <code class="code">lock_guard</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.4.2</td><td align="left">Class template <code class="code">scoped_guard</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.4.3</td><td align="left">Class template <code class="code">unique_lock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.4.4</td><td align="left">Class template <code class="code">shared_lock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.5</td><td align="left">Generic locking algorithms</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.6</td><td align="left">Call once</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.4.6.1</td><td align="left">Struct <code class="code">once_flag</code></td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">33.4.6.2</td><td align="left">Function <code class="code">call_once</code></td><td align="left">Y</td><td align="left">Exception support is broken on non-Linux targets.
  	See <a class="link" href="https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66146" target="_top">PR
  	66146</a>.
        </td></tr><tr><td align="left">33.5</td><td align="left">Condition variables</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.5.1</td><td align="left">Class <code class="code">condition_variable</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.5.2</td><td align="left">Class <code class="code">condition_variable_any</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.6</td><td align="left">Futures</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.6.1</td><td align="left">Overview</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.6.2</td><td align="left">Header <code class="code">&lt;future&gt;</code></td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.6.3</td><td align="left">Error handling</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.6.4</td><td align="left">Class <code class="code">future_error</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.6.5</td><td align="left">Shared state</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.6.6</td><td align="left">Class template <code class="code">promise</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.6.7</td><td align="left">Class template <code class="code">future</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.6.8</td><td align="left">Class template <code class="code">shared_future</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.6.9</td><td align="left">Function template <code class="code">async</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.6.10</td><td align="left">Class template <code class="code">packaged_task</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">
--- 967,973 ----
  	<span class="emphasis"><em>33</em></span>
        </td><td colspan="3" align="left">
  	<span class="emphasis"><em>Thread support</em></span>
!       </td></tr><tr><td align="left">33.1</td><td align="left">General</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.2</td><td align="left">Requirements</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.3</td><td align="left">Threads</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.3.1</td><td align="left">Header <code class="code">thread</code> synopsis</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.3.2</td><td align="left">Class <code class="code">thread</code></td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">33.3.2.1</td><td align="left">Class <code class="code">thread</code></td><td align="left">Partial</td><td align="left"><code class="code">thread::id</code> comparisons not well-defined</td></tr><tr><td align="left">33.3.3</td><td align="left">Namespace <code class="code">this_thread</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4</td><td align="left">Mutual exclusion</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.4.3</td><td align="left">Mutex requirements</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.4.3.1</td><td align="left">In general</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.4.3.2</td><td align="left">Mutex types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.4.3.2.1</td><td align="left">Class <code class="code">mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.3.2.2</td><td align="left">Class <code class="code">recursive_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.3.3</td><td align="left">Timed mutex types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.4.3.3.1</td><td align="left">Class <code class="code">timed_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.3.3.2</td><td align="left">Class <code class="code">recursive_timed_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.3.4</td><td align="left">Shared mutex types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.4.3.4.1</td><td align="left">Class <code class="code">shared_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.3.5</td><td align="left">Shared timed mutex types</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.4.3.5.1</td><td align="left">Class <code class="code">shared_timed_mutex</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.4</td><td align="left">Locks</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.4.4.1</td><td align="left">Class template <code class="code">lock_guard</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.4.2</td><td align="left">Class template <code class="code">scoped_guard</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.4.3</td><td align="left">Class template <code class="code">unique_lock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.4.4</td><td align="left">Class template <code class="code">shared_lock</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.5</td><td align="left">Generic locking algorithms</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.4.6</td><td align="left">Call once</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.4.6.1</td><td align="left">Struct <code class="code">once_flag</code></td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">33.4.6.2</td><td align="left">Function <code class="code">call_once</code></td><td align="left">Y</td><td align="left">Exception support is broken.
  	See <a class="link" href="https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66146" target="_top">PR
  	66146</a>.
        </td></tr><tr><td align="left">33.5</td><td align="left">Condition variables</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.5.1</td><td align="left">Class <code class="code">condition_variable</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.5.2</td><td align="left">Class <code class="code">condition_variable_any</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.6</td><td align="left">Futures</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.6.1</td><td align="left">Overview</td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.6.2</td><td align="left">Header <code class="code">&lt;future&gt;</code></td><td align="left"> </td><td align="left"> </td></tr><tr><td align="left">33.6.3</td><td align="left">Error handling</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.6.4</td><td align="left">Class <code class="code">future_error</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.6.5</td><td align="left">Shared state</td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.6.6</td><td align="left">Class template <code class="code">promise</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.6.7</td><td align="left">Class template <code class="code">future</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.6.8</td><td align="left">Class template <code class="code">shared_future</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.6.9</td><td align="left">Function template <code class="code">async</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">33.6.10</td><td align="left">Class template <code class="code">packaged_task</code></td><td align="left">Y</td><td align="left"> </td></tr><tr><td align="left">
*************** or any notes about the implementation.
*** 1325,1334 ****
        </td><td align="center"> 9.1 </td><td align="left"> <code class="code">__cpp_lib_type_identity &gt;= 201806L</code> (since 9.4, see Note 1) </td></tr><tr><td align="left">  <code class="code">unwrap_ref_decay</code> and <code class="code">unwrap_reference</code> </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0318r1.pdf" target="_top">
          P0318R1 </a>
!       </td><td align="center"> 9.1 </td><td align="left"> <code class="code">__cpp_lib_unwrap_ref &gt;= 201811L</code> (since 9.4, see Note 1) </td></tr><tr bgcolor="#B0B0B0"><td align="left">  Improving Completeness Requirements for Type Traits </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1285r0.pdf" target="_top">
          P1285R0 </a>
!       </td><td align="center"> Partial </td><td align="left"> </td></tr><tr><td align="left">  Missing feature test macros </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1353r0.html" target="_top">
          P1353R0 </a>
        </td><td align="center"> 9.1 </td><td align="left"> </td></tr><tr><td align="left"> Making std::underlying_type SFINAE-friendly </td><td align="left">
--- 1325,1334 ----
        </td><td align="center"> 9.1 </td><td align="left"> <code class="code">__cpp_lib_type_identity &gt;= 201806L</code> (since 9.4, see Note 1) </td></tr><tr><td align="left">  <code class="code">unwrap_ref_decay</code> and <code class="code">unwrap_reference</code> </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0318r1.pdf" target="_top">
          P0318R1 </a>
!       </td><td align="center"> 9.1 </td><td align="left"> <code class="code">__cpp_lib_unwrap_ref &gt;= 201811L</code> (since 9.4, see Note 1) </td></tr><tr><td align="left">  Improving Completeness Requirements for Type Traits </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1285r0.pdf" target="_top">
          P1285R0 </a>
!       </td><td align="center"> — </td><td align="left"> Most misuses are diagnosed, but not all. </td></tr><tr><td align="left">  Missing feature test macros </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1353r0.html" target="_top">
          P1353R0 </a>
        </td><td align="center"> 9.1 </td><td align="left"> </td></tr><tr><td align="left"> Making std::underlying_type SFINAE-friendly </td><td align="left">
*************** or any notes about the implementation.
*** 1411,1428 ****
        </td><td align="center"> 10.1 </td><td align="left"> </td></tr><tr><td align="left"> Ranges Design Cleanup </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p1252r2.pdf" target="_top">
          P1252R2 </a>
!       </td><td align="center"> 10.1 </td><td align="left"> </td></tr><tr bgcolor="#C8B0B0"><td align="left"> Avoid template bloat for <code class="code">safe_ranges</code> in combination with ‘subrange-y’ view adaptors.</td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2020/p1739r4.html" target="_top">
          P1739R4 </a>
!       </td><td align="center"> </td><td align="left"> </td></tr><tr><td colspan="4" align="left">
          <span class="bold"><strong>Time, dates, calendars, time zones</strong></span>
!       </td></tr><tr bgcolor="#C8B0B0"><td align="left">  Extending chrono to Calendars and Time Zones </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0355r7.html" target="_top">
          P0355R7 </a>
!       </td><td align="left"> </td><td align="left"> <code class="code">__cpp_lib_chrono &gt;= 201803L</code> </td></tr><tr bgcolor="#C8B0B0"><td align="left"> Miscellaneous minor fixes for chrono </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p1466r3.html" target="_top">
          P1466R3 </a>
!       </td><td align="left"> </td><td align="left"> <code class="code">__cpp_lib_chrono &gt;= 201907L</code> </td></tr><tr><td align="left">  <code class="code">&lt;chrono&gt;</code> <code class="code">zero()</code>, <code class="code">min()</code>, and <code class="code">max()</code> should be <code class="code">noexcept</code> </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0972r0.pdf" target="_top">
          P0972R0 </a>
        </td><td align="center"> 9.1 </td><td align="left"> </td></tr><tr><td colspan="4" align="left">
--- 1411,1428 ----
        </td><td align="center"> 10.1 </td><td align="left"> </td></tr><tr><td align="left"> Ranges Design Cleanup </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p1252r2.pdf" target="_top">
          P1252R2 </a>
!       </td><td align="center"> 10.1 </td><td align="left"> </td></tr><tr><td align="left"> Avoid template bloat for <code class="code">safe_ranges</code> in combination with ‘subrange-y’ view adaptors.</td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2020/p1739r4.html" target="_top">
          P1739R4 </a>
!       </td><td align="center"> 12.1 </td><td align="left"> </td></tr><tr><td colspan="4" align="left">
          <span class="bold"><strong>Time, dates, calendars, time zones</strong></span>
!       </td></tr><tr bgcolor="#B0B0B0"><td align="left">  Extending chrono to Calendars and Time Zones </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0355r7.html" target="_top">
          P0355R7 </a>
!       </td><td align="left"> (see Note 2) </td><td align="left"> <code class="code">__cpp_lib_chrono &gt;= 201803L</code> </td></tr><tr><td align="left"> Miscellaneous minor fixes for chrono </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p1466r3.html" target="_top">
          P1466R3 </a>
!       </td><td align="left"> (see Note 2) </td><td align="left"> <code class="code">__cpp_lib_chrono &gt;= 201907L</code> </td></tr><tr><td align="left">  <code class="code">&lt;chrono&gt;</code> <code class="code">zero()</code>, <code class="code">min()</code>, and <code class="code">max()</code> should be <code class="code">noexcept</code> </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0972r0.pdf" target="_top">
          P0972R0 </a>
        </td><td align="center"> 9.1 </td><td align="left"> </td></tr><tr><td colspan="4" align="left">
*************** or any notes about the implementation.
*** 1467,1476 ****
        </td></tr><tr><td align="left">  String Prefix and Suffix Checking </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2017/p0457r2.html" target="_top">
          P0457R2 </a>
!       </td><td align="center"> 9.1 </td><td align="left"> <code class="code">__cpp_lib_starts_ends_with &gt;= 201711L</code> (since 9.4, see Note 1) </td></tr><tr bgcolor="#C8B0B0"><td align="left">  Update The Reference To The Unicode Standard </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1025r1.html" target="_top">
          P1025R1 </a>
!       </td><td align="center"> </td><td align="left"> </td></tr><tr><td colspan="4" align="left">
          <span class="bold"><strong>Containers</strong></span>
        </td></tr><tr><td align="left"> span: bounds-safe views for sequences of objects </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0122r7.pdf" target="_top">
--- 1467,1476 ----
        </td></tr><tr><td align="left">  String Prefix and Suffix Checking </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2017/p0457r2.html" target="_top">
          P0457R2 </a>
!       </td><td align="center"> 9.1 </td><td align="left"> <code class="code">__cpp_lib_starts_ends_with &gt;= 201711L</code> (since 9.4, see Note 1) </td></tr><tr><td align="left">  Update The Reference To The Unicode Standard </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1025r1.html" target="_top">
          P1025R1 </a>
!       </td><td align="center"> —</td><td align="left"> </td></tr><tr><td colspan="4" align="left">
          <span class="bold"><strong>Containers</strong></span>
        </td></tr><tr><td align="left"> span: bounds-safe views for sequences of objects </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0122r7.pdf" target="_top">
*************** or any notes about the implementation.
*** 1492,1501 ****
        </td><td align="center"> 10.1 </td><td align="left"> <code class="code">__cpp_lib_to_array &gt;= 201907L</code> </td></tr><tr><td align="left">  Checking for Existence of an Element in Associative Containers </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0458r2.html" target="_top">
          P0458R2 </a>
!       </td><td align="center"> 9.1 </td><td align="left"> </td></tr><tr bgcolor="#C8B0B0"><td align="left">  Comparing Unordered Containers </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0809r0.pdf" target="_top">
          P0809R0 </a>
!       </td><td align="center"> </td><td align="left"> </td></tr><tr><td align="left">  Heterogeneous lookup for unordered containers </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0919r3.html" target="_top">
          P0919R3 </a>
        </td><td align="center"> 11.1 </td><td align="left"> <code class="code">__cpp_lib_generic_unordered_lookup &gt;= 201811</code> </td></tr><tr><td align="left"> Refinement Proposal for P0919 </td><td align="left">
--- 1492,1501 ----
        </td><td align="center"> 10.1 </td><td align="left"> <code class="code">__cpp_lib_to_array &gt;= 201907L</code> </td></tr><tr><td align="left">  Checking for Existence of an Element in Associative Containers </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0458r2.html" target="_top">
          P0458R2 </a>
!       </td><td align="center"> 9.1 </td><td align="left"> </td></tr><tr><td align="left">  Comparing Unordered Containers </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0809r0.pdf" target="_top">
          P0809R0 </a>
!       </td><td align="center"> — </td><td align="left"> </td></tr><tr><td align="left">  Heterogeneous lookup for unordered containers </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0919r3.html" target="_top">
          P0919R3 </a>
        </td><td align="center"> 11.1 </td><td align="left"> <code class="code">__cpp_lib_generic_unordered_lookup &gt;= 201811</code> </td></tr><tr><td align="left"> Refinement Proposal for P0919 </td><td align="left">
*************** or any notes about the implementation.
*** 1567,1573 ****
        </td><td align="center"> 9.1 </td><td align="left"> </td></tr><tr bgcolor="#C8B0B0"><td align="left">  Thou Shalt Not Specialize std Function Templates! </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0551r3.pdf" target="_top">
          P0551R3 </a>
!       </td><td align="center"> </td><td align="left"> </td></tr><tr><td align="left">  Bit-casting object representations </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0476r2.html" target="_top">
          P0476R2 </a>
        </td><td align="center"> 11.1 </td><td align="left"> <code class="code">__cpp_lib_bit_cast &gt;= 201806L</code> </td></tr><tr><td align="left">  Integral power-of-2 operations </td><td align="left">
--- 1567,1573 ----
        </td><td align="center"> 9.1 </td><td align="left"> </td></tr><tr bgcolor="#C8B0B0"><td align="left">  Thou Shalt Not Specialize std Function Templates! </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0551r3.pdf" target="_top">
          P0551R3 </a>
!       </td><td align="center"> </td><td align="left">These changes will not be implemented.</td></tr><tr><td align="left">  Bit-casting object representations </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0476r2.html" target="_top">
          P0476R2 </a>
        </td><td align="center"> 11.1 </td><td align="left"> <code class="code">__cpp_lib_bit_cast &gt;= 201806L</code> </td></tr><tr><td align="left">  Integral power-of-2 operations </td><td align="left">
*************** or any notes about the implementation.
*** 1588,1597 ****
        </td><td align="center"> — </td><td align="left"> </td></tr><tr><td align="left">  Add <code class="code">shift</code> to <code class="code">&lt;algorithm&gt;</code> </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0769r2.pdf" target="_top">
          P0769R2 </a>
!       </td><td align="center"> 10.1 </td><td align="left"> <code class="code">__cpp_lib_shift &gt;= 201806L</code> </td></tr><tr bgcolor="#C8B0B0"><td align="left">  Standard Library Specification in a Concepts and Contracts World </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0788r3.pdf" target="_top">
          P0788R3 </a>
!       </td><td align="center"> </td><td align="left"> </td></tr><tr><td align="left">  <code class="code">explicit(bool)</code> </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0892r2.html" target="_top">
          P0892R2 </a>
        </td><td align="center"> — </td><td align="left"> </td></tr><tr><td align="left">  Eradicating unnecessarily explicit default constructors from the standard library </td><td align="left">
--- 1588,1597 ----
        </td><td align="center"> — </td><td align="left"> </td></tr><tr><td align="left">  Add <code class="code">shift</code> to <code class="code">&lt;algorithm&gt;</code> </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0769r2.pdf" target="_top">
          P0769R2 </a>
!       </td><td align="center"> 10.1 </td><td align="left"> <code class="code">__cpp_lib_shift &gt;= 201806L</code> </td></tr><tr><td align="left">  Standard Library Specification in a Concepts and Contracts World </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0788r3.pdf" target="_top">
          P0788R3 </a>
!       </td><td align="center"> — </td><td align="left"> </td></tr><tr><td align="left">  <code class="code">explicit(bool)</code> </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0892r2.html" target="_top">
          P0892R2 </a>
        </td><td align="center"> — </td><td align="left"> </td></tr><tr><td align="left">  Eradicating unnecessarily explicit default constructors from the standard library </td><td align="left">
*************** or any notes about the implementation.
*** 1627,1636 ****
        </td><td align="center"> 7.1 </td><td align="left"> </td></tr><tr><td align="left">  Editorial Guidance for merging P0019r8 and P0528r3 </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1123r0.html" target="_top">
          P1123R0 </a>
!       </td><td align="center"> — </td><td align="left"> </td></tr><tr bgcolor="#C8B0B0"><td align="left">  Cleaning up Clause 20 </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1148r0.pdf" target="_top">
          P1148R0 </a>
!       </td><td align="center"> </td><td align="left"> </td></tr><tr bgcolor="#C8B0B0"><td align="left">  Completing the Rebase of Library Fundamentals, Version 3, Working Draft </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1210r0.html" target="_top">
          P1210R0 </a>
        </td><td align="center"> </td><td align="left"> </td></tr><tr><td align="left">  Alternative Wording for P0907R4 Signed Integers are Two's Complement </td><td align="left">
--- 1627,1636 ----
        </td><td align="center"> 7.1 </td><td align="left"> </td></tr><tr><td align="left">  Editorial Guidance for merging P0019r8 and P0528r3 </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1123r0.html" target="_top">
          P1123R0 </a>
!       </td><td align="center"> — </td><td align="left"> </td></tr><tr><td align="left">  Cleaning up Clause 20 </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1148r0.pdf" target="_top">
          P1148R0 </a>
!       </td><td align="center"> — </td><td align="left"> </td></tr><tr bgcolor="#C8B0B0"><td align="left">  Completing the Rebase of Library Fundamentals, Version 3, Working Draft </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1210r0.html" target="_top">
          P1210R0 </a>
        </td><td align="center"> </td><td align="left"> </td></tr><tr><td align="left">  Alternative Wording for P0907R4 Signed Integers are Two's Complement </td><td align="left">
*************** or any notes about the implementation.
*** 1666,1678 ****
        </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p1463r1.pdf" target="_top">
          P1463R1 </a>
!       </td><td align="center"> 10.1 </td><td align="left"> </td></tr><tr bgcolor="#C8B0B0"><td align="left">
          Mandating the Standard Library:
          Clause 22 - Iterators library
        </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p1464r1.pdf" target="_top">
          P1464R1 </a>
!       </td><td align="center"> </td><td align="left"> </td></tr><tr><td align="left"> Make <code class="code">create_directory()</code> Intuitive </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p1164r1.pdf" target="_top">
          P1164R1
    </a>
--- 1666,1678 ----
        </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p1463r1.pdf" target="_top">
          P1463R1 </a>
!       </td><td align="center"> 10.1 </td><td align="left"> </td></tr><tr><td align="left">
          Mandating the Standard Library:
          Clause 22 - Iterators library
        </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p1464r1.pdf" target="_top">
          P1464R1 </a>
!       </td><td align="center"> — </td><td align="left"> </td></tr><tr><td align="left"> Make <code class="code">create_directory()</code> Intuitive </td><td align="left">
          <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p1164r1.pdf" target="_top">
          P1164R1
    </a>
*************** or any notes about the implementation.
*** 1708,1713 ****
--- 1708,1716 ----
  Note 1: This feature is supported in older releases but the
  <code class="code">__cpp_lib</code> macro is not defined to the right value
  (or not defined at all) until the version shown in parentheses.
+ </p><p>
+ Note 2: The C++20 calendar types are supported since 11.1,
+ time zones, UTC, formatting and parsing are not supported.
  </p></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="status.iso.2023"></a>C++ 2023</h3></div></div></div><p>
  In this implementation the <code class="literal">-std=gnu++23</code> or
  <code class="literal">-std=c++23</code> flag must be used to enable language
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/html/manual/test.html gcc-12.4.0/libstdc++-v3/doc/html/manual/test.html
*** gcc-12.3.0/libstdc++-v3/doc/html/manual/test.html	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/html/manual/test.html	Thu Jun 20 08:08:10 2024
*************** cat 27_io/objects/char/3_xin.in | a.out<
*** 452,458 ****
      be run for a specific standard (and not later standards) using an
      effective target like <code class="literal">c++11_only</code>. However, this means
      the test will be skipped by default (because the default mode is
!     <code class="literal">gnu++14</code>), and so will only run when
      <code class="option">-std=gnu++11</code> or <code class="option">-std=c++11</code> is used
      explicitly. For tests that require a specific standard it is better to
      use a <code class="literal">dg-options</code> directive:
--- 452,458 ----
      be run for a specific standard (and not later standards) using an
      effective target like <code class="literal">c++11_only</code>. However, this means
      the test will be skipped by default (because the default mode is
!     <code class="literal">gnu++17</code>), and so will only run when
      <code class="option">-std=gnu++11</code> or <code class="option">-std=c++11</code> is used
      explicitly. For tests that require a specific standard it is better to
      use a <code class="literal">dg-options</code> directive:
*************** cat 27_io/objects/char/3_xin.in | a.out<
*** 466,478 ****
      Similarly, tests which depend on a newer standard than the default
      must use <code class="literal">dg-options</code> instead of (or in addition to)
      an effective target, so that they are not skipped by default.
!     For example, tests for C++17 features should use
! </p><pre class="programlisting">    // { dg-options "-std=gnu++17" }</pre><p>
      before any <code class="literal">dg-do</code> such as:
! </p><pre class="programlisting">    // { dg-do run "c++17" }</pre><p>
      The <code class="literal">dg-options</code> directive must come first, so that
      the <code class="literal">-std</code> flag has already been added to the options
!     before checking the <code class="literal">c++17</code> target.
    </p><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="tests.dg.examples"></a>Examples of Test Directives</h4></div></div></div><p>
  Example 1: Testing compilation only:
  </p><pre class="programlisting">
--- 466,478 ----
      Similarly, tests which depend on a newer standard than the default
      must use <code class="literal">dg-options</code> instead of (or in addition to)
      an effective target, so that they are not skipped by default.
!     For example, tests for C++20 features should use
! </p><pre class="programlisting">    // { dg-options "-std=gnu++20" }</pre><p>
      before any <code class="literal">dg-do</code> such as:
! </p><pre class="programlisting">    // { dg-do run { target c++20 } }</pre><p>
      The <code class="literal">dg-options</code> directive must come first, so that
      the <code class="literal">-std</code> flag has already been added to the options
!     before checking the <code class="literal">c++20</code> effective target.
    </p><div class="section"><div class="titlepage"><div><div><h4 class="title"><a id="tests.dg.examples"></a>Examples of Test Directives</h4></div></div></div><p>
  Example 1: Testing compilation only:
  </p><pre class="programlisting">
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/html/manual/using.html gcc-12.4.0/libstdc++-v3/doc/html/manual/using.html
*** gcc-12.3.0/libstdc++-v3/doc/html/manual/using.html	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/html/manual/using.html	Thu Jun 20 08:08:10 2024
***************
*** 4,10 ****
    
  </th><td width="20%" align="right"> <a accesskey="n" href="using_headers.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.intro.using"></a>Chapter 3. Using</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="using.html#manual.intro.using.flags">Command Options</a></span></dt><dt><span class="section"><a href="using_headers.html">Headers</a></span></dt><dd><dl><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.all">Header Files</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.mixing">Mixing Headers</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.cheaders">The C Headers and <code class="code">namespace std</code></a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.pre">Precompiled Headers</a></span></dt></dl></dd><dt><span class="section"><a href="using_macros.html">Macros</a></span></dt><dt><span class="section"><a href="using_dual_abi.html">Dual ABI</a></span></dt><dd><dl><dt><span class="section"><a href="using_dual_abi.html#manual.intro.using.abi.trouble">Troubleshooting</a></span></dt></dl></dd><dt><span class="section"><a href="using_namespaces.html">Namespaces</a></span></dt><dd><dl><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.all">Available Namespaces</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.std">namespace std</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.comp">Using Namespace Composition</a></span></dt></dl></dd><dt><span class="section"><a href="using_dynamic_or_shared.html">Linking</a></span></dt><dd><dl><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.freestanding">Almost Nothing</a></span></dt><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.dynamic">Finding Dynamic or Shared Libraries</a></span></dt><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.experimental">Experimental Library Extensions</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html">Concurrency</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.thread_safety">Thread Safety</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.atomics">Atomics</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.io">IO</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#concurrency.io.structure">Structure</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.defaults">Defaults</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.future">Future</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.alt">Alternatives</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.containers">Containers</a></span></dt></dl></dd><dt><span class="section"><a href="using_exceptions.html">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.safety">Exception Safety</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.propagating">Exception Neutrality</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.no">Doing without</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.compat">Compatibility</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.c">With <code class="literal">C</code></a></span></dt><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.posix">With <code class="literal">POSIX</code> thread cancellation</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="debug.html">Debugging Support</a></span></dt><dd><dl><dt><span class="section"><a href="debug.html#debug.compiler">Using <span class="command"><strong>g++</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.req">Debug Versions of Library Binary Files</a></span></dt><dt><span class="section"><a href="debug.html#debug.memory">Memory Leak Hunting</a></span></dt><dd><dl><dt><span class="section"><a href="debug.html#debug.memory.mtalloc">Non-memory leaks in Pool and MT allocators</a></span></dt></dl></dd><dt><span class="section"><a href="debug.html#debug.races">Data Race Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.gdb">Using <span class="command"><strong>gdb</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.exceptions">Tracking uncaught exceptions</a></span></dt><dt><span class="section"><a href="debug.html#debug.debug_mode">Debug Mode</a></span></dt><dt><span class="section"><a href="debug.html#debug.compile_time_checks">Compile Time Checking</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.flags"></a>Command Options</h2></div></div></div><p>
        The set of features available in the GNU C++ library is shaped by
!       several <a class="link" href="http://gcc.gnu.org/onlinedocs/gcc-4.3.2/gcc/Invoking-GCC.html" target="_top">GCC
        Command Options</a>. Options that impact libstdc++ are
        enumerated and detailed in the table below.
      </p><p>
--- 4,10 ----
    
  </th><td width="20%" align="right"> <a accesskey="n" href="using_headers.html">Next</a></td></tr></table><hr /></div><div class="chapter"><div class="titlepage"><div><div><h2 class="title"><a id="manual.intro.using"></a>Chapter 3. Using</h2></div></div></div><div class="toc"><p><strong>Table of Contents</strong></p><dl class="toc"><dt><span class="section"><a href="using.html#manual.intro.using.flags">Command Options</a></span></dt><dt><span class="section"><a href="using_headers.html">Headers</a></span></dt><dd><dl><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.all">Header Files</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.mixing">Mixing Headers</a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.cheaders">The C Headers and <code class="code">namespace std</code></a></span></dt><dt><span class="section"><a href="using_headers.html#manual.intro.using.headers.pre">Precompiled Headers</a></span></dt></dl></dd><dt><span class="section"><a href="using_macros.html">Macros</a></span></dt><dt><span class="section"><a href="using_dual_abi.html">Dual ABI</a></span></dt><dd><dl><dt><span class="section"><a href="using_dual_abi.html#manual.intro.using.abi.trouble">Troubleshooting</a></span></dt></dl></dd><dt><span class="section"><a href="using_namespaces.html">Namespaces</a></span></dt><dd><dl><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.all">Available Namespaces</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.std">namespace std</a></span></dt><dt><span class="section"><a href="using_namespaces.html#manual.intro.using.namespaces.comp">Using Namespace Composition</a></span></dt></dl></dd><dt><span class="section"><a href="using_dynamic_or_shared.html">Linking</a></span></dt><dd><dl><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.freestanding">Almost Nothing</a></span></dt><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.dynamic">Finding Dynamic or Shared Libraries</a></span></dt><dt><span class="section"><a href="using_dynamic_or_shared.html#manual.intro.using.linkage.experimental">Experimental Library Extensions</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html">Concurrency</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.prereq">Prerequisites</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.thread_safety">Thread Safety</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.atomics">Atomics</a></span></dt><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.io">IO</a></span></dt><dd><dl><dt><span class="section"><a href="using_concurrency.html#concurrency.io.structure">Structure</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.defaults">Defaults</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.future">Future</a></span></dt><dt><span class="section"><a href="using_concurrency.html#concurrency.io.alt">Alternatives</a></span></dt></dl></dd><dt><span class="section"><a href="using_concurrency.html#manual.intro.using.concurrency.containers">Containers</a></span></dt></dl></dd><dt><span class="section"><a href="using_exceptions.html">Exceptions</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.safety">Exception Safety</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.propagating">Exception Neutrality</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.no">Doing without</a></span></dt><dt><span class="section"><a href="using_exceptions.html#intro.using.exception.compat">Compatibility</a></span></dt><dd><dl><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.c">With <code class="literal">C</code></a></span></dt><dt><span class="section"><a href="using_exceptions.html#using.exception.compat.posix">With <code class="literal">POSIX</code> thread cancellation</a></span></dt></dl></dd></dl></dd><dt><span class="section"><a href="debug.html">Debugging Support</a></span></dt><dd><dl><dt><span class="section"><a href="debug.html#debug.compiler">Using <span class="command"><strong>g++</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.req">Debug Versions of Library Binary Files</a></span></dt><dt><span class="section"><a href="debug.html#debug.memory">Memory Leak Hunting</a></span></dt><dd><dl><dt><span class="section"><a href="debug.html#debug.memory.mtalloc">Non-memory leaks in Pool and MT allocators</a></span></dt></dl></dd><dt><span class="section"><a href="debug.html#debug.races">Data Race Hunting</a></span></dt><dt><span class="section"><a href="debug.html#debug.gdb">Using <span class="command"><strong>gdb</strong></span></a></span></dt><dt><span class="section"><a href="debug.html#debug.exceptions">Tracking uncaught exceptions</a></span></dt><dt><span class="section"><a href="debug.html#debug.debug_mode">Debug Mode</a></span></dt><dt><span class="section"><a href="debug.html#debug.compile_time_checks">Compile Time Checking</a></span></dt></dl></dd></dl></div><div class="section"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a id="manual.intro.using.flags"></a>Command Options</h2></div></div></div><p>
        The set of features available in the GNU C++ library is shaped by
!       several <a class="link" href="https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Invoking-GCC.html" target="_top">GCC
        Command Options</a>. Options that impact libstdc++ are
        enumerated and detailed in the table below.
      </p><p>
***************
*** 14,22 ****
        <span class="command"><strong>g++ -std=gnu++17</strong></span> since GCC 11, and
        <span class="command"><strong>g++ -std=gnu++14</strong></span> in GCC 6, 7, 8, 9, and 10, and
        <span class="command"><strong>g++ -std=gnu++98</strong></span> for older releases.
!     </p><div class="table"><a id="table.cmd_options"></a><p class="title"><strong>Table 3.1. C++ Command Options</strong></p><div class="table-contents"><table class="table" summary="C++ Command Options" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">Option Flags</th><th align="left">Description</th></tr></thead><tbody><tr><td align="left"><code class="literal">-std=c++98</code> or <code class="literal">-std=c++03</code>
!       </td><td align="left">Use the 1998 ISO C++ standard plus amendments.</td></tr><tr><td align="left"><code class="literal">-std=gnu++98</code> or <code class="literal">-std=gnu++03</code>
!       </td><td align="left">As directly above, with GNU extensions.</td></tr><tr><td align="left"><code class="literal">-std=c++11</code></td><td align="left">Use the 2011 ISO C++ standard.</td></tr><tr><td align="left"><code class="literal">-std=gnu++11</code></td><td align="left">As directly above, with GNU extensions.</td></tr><tr><td align="left"><code class="literal">-std=c++14</code></td><td align="left">Use the 2014 ISO C++ standard.</td></tr><tr><td align="left"><code class="literal">-std=gnu++14</code></td><td align="left">As directly above, with GNU extensions.</td></tr><tr><td align="left">
  	<code class="literal">-fno-exceptions</code>
        </td><td align="left">See <a class="link" href="using_exceptions.html#intro.using.exception.no" title="Doing without">exception-free dialect</a></td></tr><tr><td align="left">
  	<code class="literal">-fno-rtti</code>
--- 14,24 ----
        <span class="command"><strong>g++ -std=gnu++17</strong></span> since GCC 11, and
        <span class="command"><strong>g++ -std=gnu++14</strong></span> in GCC 6, 7, 8, 9, and 10, and
        <span class="command"><strong>g++ -std=gnu++98</strong></span> for older releases.
!     </p><div class="table"><a id="table.cmd_options"></a><p class="title"><strong>Table 3.1. C++ Command Options</strong></p><div class="table-contents"><table class="table" summary="C++ Command Options" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /></colgroup><thead><tr><th align="left">Option Flags</th><th align="left">Description</th></tr></thead><tbody><tr><td align="left"><code class="literal">-std</code>
!       </td><td align="left">
! 	Select the C++ standard, and whether to use the base standard
! 	or GNU dialect.
!       </td></tr><tr><td align="left">
  	<code class="literal">-fno-exceptions</code>
        </td><td align="left">See <a class="link" href="using_exceptions.html#intro.using.exception.no" title="Doing without">exception-free dialect</a></td></tr><tr><td align="left">
  	<code class="literal">-fno-rtti</code>
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/xml/manual/appendix_contributing.xml gcc-12.4.0/libstdc++-v3/doc/xml/manual/appendix_contributing.xml
*** gcc-12.3.0/libstdc++-v3/doc/xml/manual/appendix_contributing.xml	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/xml/manual/appendix_contributing.xml	Thu Jun 20 08:08:10 2024
***************
*** 20,26 ****
  <para>
    The GNU C++ Library is part of GCC and follows the same development model,
    so the general rules for
!   <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://gcc.gnu.org/contribute.html">contributing
    to GCC</link> apply. Active
    contributors are assigned maintainership responsibility, and given
    write access to the source repository. First-time contributors
--- 20,26 ----
  <para>
    The GNU C++ Library is part of GCC and follows the same development model,
    so the general rules for
!   <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://gcc.gnu.org/contribute.html">contributing
    to GCC</link> apply. Active
    contributors are assigned maintainership responsibility, and given
    write access to the source repository. First-time contributors
***************
*** 64,70 ****
        <listitem>
  	<para>
  	  Peruse
! 	  the <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.gnu.org/prep/standards/">GNU
  	  Coding Standards</link>, and chuckle when you hit the part
  	  about <quote>Using Languages Other Than C</quote>.
  	</para>
--- 64,70 ----
        <listitem>
  	<para>
  	  Peruse
! 	  the <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://www.gnu.org/prep/standards/">GNU
  	  Coding Standards</link>, and chuckle when you hit the part
  	  about <quote>Using Languages Other Than C</quote>.
  	</para>
***************
*** 91,97 ****
    <section xml:id="list.copyright"><info><title>Assignment</title></info>
  
      <para>
!       See the <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://gcc.gnu.org/contribute.html#legal">legal prerequisites</link> for all GCC contributions.
      </para>
  
      <para>
--- 91,97 ----
    <section xml:id="list.copyright"><info><title>Assignment</title></info>
  
      <para>
!       See the <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://gcc.gnu.org/contribute.html#legal">legal prerequisites</link> for all GCC contributions.
      </para>
  
      <para>
***************
*** 151,162 ****
  
        <listitem>
  	<para>
! 	  A ChangeLog entry as plain text; see the various
! 	  ChangeLog files for format and content. If you are
! 	  using emacs as your editor, simply position the insertion
! 	  point at the beginning of your change and hit CX-4a to bring
! 	  up the appropriate ChangeLog entry. See--magic! Similar
! 	  functionality also exists for vi.
  	</para>
        </listitem>
  
--- 151,162 ----
  
        <listitem>
  	<para>
! 	  A ChangeLog entry as part of the Git commit message. Check
! 	  some recent commits for format and content. The
! 	  <filename>contrib/mklog.py</filename> script can be used to
! 	  generate a ChangeLog template for commit messages. See
! 	  <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://gcc.gnu.org/gitwrite.html">Read-write Git access</link>
! 	  for scripts and aliases that are useful here.
  	</para>
        </listitem>
  
***************
*** 171,177 ****
        <listitem>
  	<para>
  	  The patch itself. If you are using the Git repository use
! 	  <command>git diff</command> or <command>git format-patch</command>
  	  to produce a patch;
  	  otherwise, use <command>diff -cp OLD NEW</command>. If your
  	  version of diff does not support these options, then get the
--- 171,177 ----
        <listitem>
  	<para>
  	  The patch itself. If you are using the Git repository use
! 	  <command>git show</command> or <command>git format-patch</command>
  	  to produce a patch;
  	  otherwise, use <command>diff -cp OLD NEW</command>. If your
  	  version of diff does not support these options, then get the
***************
*** 186,191 ****
--- 186,193 ----
  	  patches and related discussion should be sent to the
  	  libstdc++ mailing list. In common with the rest of GCC,
  	  patches should also be sent to the gcc-patches mailing list.
+ 	  So you could send your email To:libstdc++@gcc.gnu.org and
+ 	  Cc:gcc-patches@gcc.gnu.org for example.
  	</para>
        </listitem>
      </itemizedlist>
*************** indicate a place that may require attent
*** 616,628 ****
        it is intended to precede the recommendations of the GNU Coding
        Standard, which can be referenced in full here:
  
!       <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.gnu.org/prep/standards/standards.html#Formatting">http://www.gnu.org/prep/standards/standards.html#Formatting</link>
  
        The rest of this is also interesting reading, but skip the "Design
        Advice" part.
  
        The GCC coding conventions are here, and are also useful:
!       <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://gcc.gnu.org/codingconventions.html">http://gcc.gnu.org/codingconventions.html</link>
  
        In addition, because it doesn't seem to be stated explicitly anywhere
        else, there is an 80 column source limit.
--- 618,630 ----
        it is intended to precede the recommendations of the GNU Coding
        Standard, which can be referenced in full here:
  
!       <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://www.gnu.org/prep/standards/standards.html#Formatting">https://www.gnu.org/prep/standards/standards.html#Formatting</link>
  
        The rest of this is also interesting reading, but skip the "Design
        Advice" part.
  
        The GCC coding conventions are here, and are also useful:
!       <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://gcc.gnu.org/codingconventions.html">https://gcc.gnu.org/codingconventions.html</link>
  
        In addition, because it doesn't seem to be stated explicitly anywhere
        else, there is an 80 column source limit.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/xml/manual/configure.xml gcc-12.4.0/libstdc++-v3/doc/xml/manual/configure.xml
*** gcc-12.3.0/libstdc++-v3/doc/xml/manual/configure.xml	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/xml/manual/configure.xml	Thu Jun 20 08:08:10 2024
***************
*** 74,82 ****
   </listitem></varlistentry>
  
   <varlistentry><term><code>--enable-cstdio=OPTION</code></term>
!  <listitem><para>Select a target-specific I/O package. At the moment, the only
! 	choice is to use 'stdio', a generic "C" abstraction.
! 	The default is 'stdio'. This option can change the library ABI.
       </para>
   </listitem></varlistentry>
  
--- 74,87 ----
   </listitem></varlistentry>
  
   <varlistentry><term><code>--enable-cstdio=OPTION</code></term>
!  <listitem><para>Select a target-specific I/O package. The choices are 'stdio'
!        which is a generic abstraction using POSIX file I/O APIs
!        (<function>read</function>, <function>write</function>,
!        <function>lseek</function>, etc.), and 'stdio_pure' which is similar
!        but only uses standard C file I/O APIs (<function>fread</function>,
!        <function>fwrite</function>, <function>fseek</function>, etc.).
!        The 'stdio_posix' choice is a synonym for 'stdio'.
!        The default is 'stdio'. This option can change the library ABI.
       </para>
   </listitem></varlistentry>
  
***************
*** 336,343 ****
  	C++ includes. If enabled (as by default), and the compiler
  	seems capable of passing the simple sanity checks thrown at
  	it, try to build stdc++.h.gch as part of the make process.
! 	In addition, this generated file is used later on (by appending <code>
! 	--include bits/stdc++.h </code> to CXXFLAGS) when running the
  	testsuite.
       </para>
   </listitem></varlistentry>
--- 341,348 ----
  	C++ includes. If enabled (as by default), and the compiler
  	seems capable of passing the simple sanity checks thrown at
  	it, try to build stdc++.h.gch as part of the make process.
! 	In addition, this generated file is used later on (by appending
! 	<code>-include bits/stdc++.h</code> to CXXFLAGS) when running the
  	testsuite.
       </para>
   </listitem></varlistentry>
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/xml/manual/evolution.xml gcc-12.4.0/libstdc++-v3/doc/xml/manual/evolution.xml
*** gcc-12.3.0/libstdc++-v3/doc/xml/manual/evolution.xml	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/xml/manual/evolution.xml	Thu Jun 20 08:08:10 2024
*************** Calling a <code>std::bind</code> result
*** 915,920 ****
--- 915,927 ----
    <filename>libstdc++.so.8</filename>.
  </para>
  
+ <para>
+   The extension allowing containers to be instantiated with an allocator
+   that doesn't match the container's value type is no longer allowed in
+   strict (<option>-std=c++NN</option>) modes, only in
+   <option>-std=gnu++NN</option> modes.
+ </para>
+ 
  </section>
  
  <section xml:id="api.rel_91"><info><title><constant>9</constant></title></info>
*************** Calling a <code>std::bind</code> result
*** 998,1003 ****
--- 1005,1016 ----
    added.
  </para>
  
+ <para>
+   The extension allowing containers to be instantiated with an allocator
+   that doesn't match the container's value type is no longer allowed in
+   C++20 mode, even in non-strict <option>-std=gnu++20</option> mode.
+ </para>
+ 
  </section>
  
  <section xml:id="api.rel_111"><info><title><constant>11</constant></title></info>
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/xml/manual/status_cxx2011.xml gcc-12.4.0/libstdc++-v3/doc/xml/manual/status_cxx2011.xml
*** gcc-12.3.0/libstdc++-v3/doc/xml/manual/status_cxx2011.xml	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/xml/manual/status_cxx2011.xml	Thu Jun 20 08:08:10 2024
*************** not in any particular release.
*** 2404,2410 ****
        <entry>30.4.4.2</entry>
        <entry>Function <code>call_once</code></entry>
        <entry>Y</entry>
!       <entry>Exception support is broken on non-Linux targets.
  	See <link xmlns:xlink="http://www.w3.org/1999/xlink"
  	xlink:href="https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66146">PR
  	66146</link>.
--- 2404,2410 ----
        <entry>30.4.4.2</entry>
        <entry>Function <code>call_once</code></entry>
        <entry>Y</entry>
!       <entry>Exception support is broken.
  	See <link xmlns:xlink="http://www.w3.org/1999/xlink"
  	xlink:href="https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66146">PR
  	66146</link>.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/xml/manual/status_cxx2014.xml gcc-12.4.0/libstdc++-v3/doc/xml/manual/status_cxx2014.xml
*** gcc-12.3.0/libstdc++-v3/doc/xml/manual/status_cxx2014.xml	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/xml/manual/status_cxx2014.xml	Thu Jun 20 08:08:10 2024
*************** not in any particular release.
*** 1390,1396 ****
        <entry>30.4.4.2</entry>
        <entry>Function <code>call_once</code></entry>
        <entry>Broken</entry>
!       <entry>Exception support is broken on non-Linux targets.
  	See <link xmlns:xlink="http://www.w3.org/1999/xlink"
  	xlink:href="https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66146">PR
  	66146</link>.
--- 1390,1396 ----
        <entry>30.4.4.2</entry>
        <entry>Function <code>call_once</code></entry>
        <entry>Broken</entry>
!       <entry>Exception support is broken.
  	See <link xmlns:xlink="http://www.w3.org/1999/xlink"
  	xlink:href="https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66146">PR
  	66146</link>.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/xml/manual/status_cxx2017.xml gcc-12.4.0/libstdc++-v3/doc/xml/manual/status_cxx2017.xml
*** gcc-12.3.0/libstdc++-v3/doc/xml/manual/status_cxx2017.xml	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/xml/manual/status_cxx2017.xml	Thu Jun 20 08:08:10 2024
*************** since C++14 and the implementation is co
*** 2505,2511 ****
        <entry>33.4.6.2</entry>
        <entry>Function <code>call_once</code></entry>
        <entry>Y</entry>
!       <entry>Exception support is broken on non-Linux targets.
  	See <link xmlns:xlink="http://www.w3.org/1999/xlink"
  	xlink:href="https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66146">PR
  	66146</link>.
--- 2505,2511 ----
        <entry>33.4.6.2</entry>
        <entry>Function <code>call_once</code></entry>
        <entry>Y</entry>
!       <entry>Exception support is broken.
  	See <link xmlns:xlink="http://www.w3.org/1999/xlink"
  	xlink:href="https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66146">PR
  	66146</link>.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/xml/manual/status_cxx2020.xml gcc-12.4.0/libstdc++-v3/doc/xml/manual/status_cxx2020.xml
*** gcc-12.3.0/libstdc++-v3/doc/xml/manual/status_cxx2020.xml	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/xml/manual/status_cxx2020.xml	Thu Jun 20 08:08:10 2024
*************** or any notes about the implementation.
*** 251,264 ****
      </row>
  
      <row>
-       <?dbhtml bgcolor="#B0B0B0" ?>
        <entry>  Improving Completeness Requirements for Type Traits </entry>
        <entry>
          <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1285r0.pdf">
          P1285R0 </link>
        </entry>
!       <entry align="center"> Partial </entry>
!       <entry />
      </row>
  
      <row>
--- 251,263 ----
      </row>
  
      <row>
        <entry>  Improving Completeness Requirements for Type Traits </entry>
        <entry>
          <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1285r0.pdf">
          P1285R0 </link>
        </entry>
!       <entry align="center"> &#x2014; </entry>
!       <entry> Most misuses are diagnosed, but not all. </entry>
      </row>
  
      <row>
*************** or any notes about the implementation.
*** 542,554 ****
      </row>
  
      <row>
-       <?dbhtml bgcolor="#C8B0B0" ?>
        <entry> Avoid template bloat for <code>safe_ranges</code> in combination with ‘subrange-y’ view adaptors.</entry>
        <entry>
          <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2020/p1739r4.html">
          P1739R4 </link>
        </entry>
!       <entry align="center"> </entry>
        <entry />
      </row>
  
--- 541,552 ----
      </row>
  
      <row>
        <entry> Avoid template bloat for <code>safe_ranges</code> in combination with ‘subrange-y’ view adaptors.</entry>
        <entry>
          <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2020/p1739r4.html">
          P1739R4 </link>
        </entry>
!       <entry align="center"> 12.1 </entry>
        <entry />
      </row>
  
*************** or any notes about the implementation.
*** 560,583 ****
      </row>
  
      <row>
!       <?dbhtml bgcolor="#C8B0B0" ?>
        <entry>  Extending chrono to Calendars and Time Zones </entry>
        <entry>
          <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0355r7.html">
          P0355R7 </link>
        </entry>
!       <entry/>
        <entry> <code>__cpp_lib_chrono &gt;= 201803L</code> </entry>
      </row>
  
      <row>
-       <?dbhtml bgcolor="#C8B0B0" ?>
        <entry> Miscellaneous minor fixes for chrono </entry>
        <entry>
          <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p1466r3.html">
          P1466R3 </link>
        </entry>
!       <entry/>
        <entry> <code>__cpp_lib_chrono &gt;= 201907L</code> </entry>
      </row>
  
--- 558,580 ----
      </row>
  
      <row>
!       <?dbhtml bgcolor="#B0B0B0" ?>
        <entry>  Extending chrono to Calendars and Time Zones </entry>
        <entry>
          <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0355r7.html">
          P0355R7 </link>
        </entry>
!       <entry> (see Note 2) </entry>
        <entry> <code>__cpp_lib_chrono &gt;= 201803L</code> </entry>
      </row>
  
      <row>
        <entry> Miscellaneous minor fixes for chrono </entry>
        <entry>
          <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p1466r3.html">
          P1466R3 </link>
        </entry>
!       <entry> (see Note 2) </entry>
        <entry> <code>__cpp_lib_chrono &gt;= 201907L</code> </entry>
      </row>
  
*************** or any notes about the implementation.
*** 717,729 ****
      </row>
  
      <row>
-       <?dbhtml bgcolor="#C8B0B0" ?>
        <entry>  Update The Reference To The Unicode Standard </entry>
        <entry>
          <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1025r1.html">
          P1025R1 </link>
        </entry>
!       <entry align="center"> </entry>
        <entry />
      </row>
  
--- 714,725 ----
      </row>
  
      <row>
        <entry>  Update The Reference To The Unicode Standard </entry>
        <entry>
          <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1025r1.html">
          P1025R1 </link>
        </entry>
!       <entry align="center"> &#x2014;</entry>
        <entry />
      </row>
  
*************** or any notes about the implementation.
*** 797,809 ****
      </row>
  
      <row>
-       <?dbhtml bgcolor="#C8B0B0" ?>
        <entry>  Comparing Unordered Containers </entry>
        <entry>
          <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0809r0.pdf">
          P0809R0 </link>
        </entry>
!       <entry align="center"> </entry>
        <entry />
      </row>
  
--- 793,804 ----
      </row>
  
      <row>
        <entry>  Comparing Unordered Containers </entry>
        <entry>
          <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0809r0.pdf">
          P0809R0 </link>
        </entry>
!       <entry align="center"> &#x2014; </entry>
        <entry />
      </row>
  
*************** or any notes about the implementation.
*** 1030,1036 ****
          P0551R3 </link>
        </entry>
        <entry align="center"> </entry>
!       <entry />
      </row>
  
      <row>
--- 1025,1031 ----
          P0551R3 </link>
        </entry>
        <entry align="center"> </entry>
!       <entry>These changes will not be implemented.</entry>
      </row>
  
      <row>
*************** or any notes about the implementation.
*** 1104,1116 ****
      </row>
  
      <row>
-       <?dbhtml bgcolor="#C8B0B0" ?>
        <entry>  Standard Library Specification in a Concepts and Contracts World </entry>
        <entry>
          <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0788r3.pdf">
          P0788R3 </link>
        </entry>
!       <entry align="center"> </entry>
        <entry />
      </row>
  
--- 1099,1110 ----
      </row>
  
      <row>
        <entry>  Standard Library Specification in a Concepts and Contracts World </entry>
        <entry>
          <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0788r3.pdf">
          P0788R3 </link>
        </entry>
!       <entry align="center"> &#x2014; </entry>
        <entry />
      </row>
  
*************** or any notes about the implementation.
*** 1235,1247 ****
      </row>
  
      <row>
-       <?dbhtml bgcolor="#C8B0B0" ?>
        <entry>  Cleaning up Clause 20 </entry>
        <entry>
          <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1148r0.pdf">
          P1148R0 </link>
        </entry>
!       <entry align="center"> </entry>
        <entry />
      </row>
  
--- 1229,1240 ----
      </row>
  
      <row>
        <entry>  Cleaning up Clause 20 </entry>
        <entry>
          <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1148r0.pdf">
          P1148R0 </link>
        </entry>
!       <entry align="center"> &#x2014; </entry>
        <entry />
      </row>
  
*************** or any notes about the implementation.
*** 1332,1338 ****
      </row>
  
      <row>
-       <?dbhtml bgcolor="#C8B0B0" ?>
        <entry>
          Mandating the Standard Library:
          Clause 22 - Iterators library
--- 1325,1330 ----
*************** or any notes about the implementation.
*** 1341,1347 ****
          <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p1464r1.pdf">
          P1464R1 </link>
        </entry>
!       <entry align="center"> </entry>
        <entry />
      </row>
  
--- 1333,1339 ----
          <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p1464r1.pdf">
          P1464R1 </link>
        </entry>
!       <entry align="center"> &#x2014; </entry>
        <entry />
      </row>
  
*************** Note 1: This feature is supported in old
*** 1450,1453 ****
--- 1442,1450 ----
  (or not defined at all) until the version shown in parentheses.
  </para>
  
+ <para>
+ Note 2: The C++20 calendar types are supported since 11.1,
+ time zones, UTC, formatting and parsing are not supported.
+ </para>
+ 
  </section>
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/xml/manual/test.xml gcc-12.4.0/libstdc++-v3/doc/xml/manual/test.xml
*** gcc-12.3.0/libstdc++-v3/doc/xml/manual/test.xml	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/xml/manual/test.xml	Thu Jun 20 08:08:10 2024
*************** cat 27_io/objects/char/3_xin.in | a.out<
*** 749,755 ****
      be run for a specific standard (and not later standards) using an
      effective target like <literal>c++11_only</literal>. However, this means
      the test will be skipped by default (because the default mode is
!     <literal>gnu++14</literal>), and so will only run when
      <option>-std=gnu++11</option> or <option>-std=c++11</option> is used
      explicitly. For tests that require a specific standard it is better to
      use a <literal>dg-options</literal> directive:
--- 749,755 ----
      be run for a specific standard (and not later standards) using an
      effective target like <literal>c++11_only</literal>. However, this means
      the test will be skipped by default (because the default mode is
!     <literal>gnu++17</literal>), and so will only run when
      <option>-std=gnu++11</option> or <option>-std=c++11</option> is used
      explicitly. For tests that require a specific standard it is better to
      use a <literal>dg-options</literal> directive:
*************** cat 27_io/objects/char/3_xin.in | a.out<
*** 765,777 ****
      Similarly, tests which depend on a newer standard than the default
      must use <literal>dg-options</literal> instead of (or in addition to)
      an effective target, so that they are not skipped by default.
!     For example, tests for C++17 features should use
! <programlisting>    // { dg-options "-std=gnu++17" }</programlisting>
      before any <literal>dg-do</literal> such as:
! <programlisting>    // { dg-do run "c++17" }</programlisting>
      The <literal>dg-options</literal> directive must come first, so that
      the <literal>-std</literal> flag has already been added to the options
!     before checking the <literal>c++17</literal> target.
    </para>
  
  <section xml:id="tests.dg.examples"><info><title>Examples of Test Directives</title></info>
--- 765,777 ----
      Similarly, tests which depend on a newer standard than the default
      must use <literal>dg-options</literal> instead of (or in addition to)
      an effective target, so that they are not skipped by default.
!     For example, tests for C++20 features should use
! <programlisting>    // { dg-options "-std=gnu++20" }</programlisting>
      before any <literal>dg-do</literal> such as:
! <programlisting>    // { dg-do run { target c++20 } }</programlisting>
      The <literal>dg-options</literal> directive must come first, so that
      the <literal>-std</literal> flag has already been added to the options
!     before checking the <literal>c++20</literal> effective target.
    </para>
  
  <section xml:id="tests.dg.examples"><info><title>Examples of Test Directives</title></info>
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/xml/manual/using.xml gcc-12.4.0/libstdc++-v3/doc/xml/manual/using.xml
*** gcc-12.3.0/libstdc++-v3/doc/xml/manual/using.xml	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/xml/manual/using.xml	Thu Jun 20 08:08:10 2024
***************
*** 7,13 ****
  
      <para>
        The set of features available in the GNU C++ library is shaped by
!       several <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://gcc.gnu.org/onlinedocs/gcc-4.3.2/gcc/Invoking-GCC.html">GCC
        Command Options</link>. Options that impact libstdc++ are
        enumerated and detailed in the table below.
      </para>
--- 7,13 ----
  
      <para>
        The set of features available in the GNU C++ library is shaped by
!       several <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Invoking-GCC.html">GCC
        Command Options</link>. Options that impact libstdc++ are
        enumerated and detailed in the table below.
      </para>
***************
*** 37,71 ****
  
    <tbody>
      <row>
!       <entry><literal>-std=c++98</literal> or <literal>-std=c++03</literal>
        </entry>
!       <entry>Use the 1998 ISO C++ standard plus amendments.</entry>
!     </row>
! 
!     <row>
!       <entry><literal>-std=gnu++98</literal> or <literal>-std=gnu++03</literal>
        </entry>
-       <entry>As directly above, with GNU extensions.</entry>
-     </row>
- 
-     <row>
-       <entry><literal>-std=c++11</literal></entry>
-       <entry>Use the 2011 ISO C++ standard.</entry>
-     </row>
- 
-     <row>
-       <entry><literal>-std=gnu++11</literal></entry>
-       <entry>As directly above, with GNU extensions.</entry>
-     </row>
- 
-     <row>
-       <entry><literal>-std=c++14</literal></entry>
-       <entry>Use the 2014 ISO C++ standard.</entry>
-     </row>
- 
-     <row>
-       <entry><literal>-std=gnu++14</literal></entry>
-       <entry>As directly above, with GNU extensions.</entry>
      </row>
  
      <row>
--- 37,48 ----
  
    <tbody>
      <row>
!       <entry><literal>-std</literal>
        </entry>
!       <entry>
! 	Select the C++ standard, and whether to use the base standard
! 	or GNU dialect.
        </entry>
      </row>
  
      <row>
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/backward/auto_ptr.h gcc-12.4.0/libstdc++-v3/include/backward/auto_ptr.h
*** gcc-12.3.0/libstdc++-v3/include/backward/auto_ptr.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/backward/auto_ptr.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 84,89 ****
--- 84,93 ----
     *  _GLIBCXX_RESOLVE_LIB_DEFECTS
     *  127.  auto_ptr<> conversion issues
     *  These resolutions have all been incorporated.
+    *
+    * @headerfile memory
+    * @deprecated Deprecated in C++11, no longer in the standard since C++17.
+    * Use `unique_ptr` instead.
     */
    template<typename _Tp>
      class auto_ptr
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/algorithmfwd.h gcc-12.4.0/libstdc++-v3/include/bits/algorithmfwd.h
*** gcc-12.3.0/libstdc++-v3/include/bits/algorithmfwd.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/algorithmfwd.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 601,613 ****
      _OIter
      reverse_copy(_BIter, _BIter, _OIter);
  
!   inline namespace _V2
!   {
!     template<typename _FIter>
!       _GLIBCXX20_CONSTEXPR
!       _FIter
!       rotate(_FIter, _FIter, _FIter);
!   }
  
    template<typename _FIter, typename _OIter>
      _GLIBCXX20_CONSTEXPR
--- 601,614 ----
      _OIter
      reverse_copy(_BIter, _BIter, _OIter);
  
! _GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(_V2)
! 
!   template<typename _FIter>
!     _GLIBCXX20_CONSTEXPR
!     _FIter
!     rotate(_FIter, _FIter, _FIter);
! 
! _GLIBCXX_END_INLINE_ABI_NAMESPACE(_V2)
  
    template<typename _FIter, typename _OIter>
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 828,837 ****
--- 829,840 ----
      partition(_BIter, _BIter, _Predicate);
  
    template<typename _RAIter>
+     _GLIBCXX14_DEPRECATED_SUGGEST("std::shuffle")
      void
      random_shuffle(_RAIter, _RAIter);
  
    template<typename _RAIter, typename _Generator>
+     _GLIBCXX14_DEPRECATED_SUGGEST("std::shuffle")
      void
      random_shuffle(_RAIter, _RAIter,
  #if __cplusplus >= 201103L
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/alloc_traits.h gcc-12.4.0/libstdc++-v3/include/bits/alloc_traits.h
*** gcc-12.3.0/libstdc++-v3/include/bits/alloc_traits.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/alloc_traits.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 72,78 ****
      template<typename _Tp>
        using __pocs = typename _Tp::propagate_on_container_swap;
      template<typename _Tp>
!       using __equal = typename _Tp::is_always_equal;
    };
  
    template<typename _Alloc, typename _Up>
--- 72,78 ----
      template<typename _Tp>
        using __pocs = typename _Tp::propagate_on_container_swap;
      template<typename _Tp>
!       using __equal = __type_identity<typename _Tp::is_always_equal>;
    };
  
    template<typename _Alloc, typename _Up>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 207,213 ****
         * otherwise @c is_empty<Alloc>::type
        */
        using is_always_equal
! 	= __detected_or_t<typename is_empty<_Alloc>::type, __equal, _Alloc>;
  
        template<typename _Tp>
  	using rebind_alloc = __alloc_rebind<_Alloc, _Tp>;
--- 207,213 ----
         * otherwise @c is_empty<Alloc>::type
        */
        using is_always_equal
! 	= typename __detected_or_t<is_empty<_Alloc>, __equal, _Alloc>::type;
  
        template<typename _Tp>
  	using rebind_alloc = __alloc_rebind<_Alloc, _Tp>;
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 661,666 ****
--- 661,667 ----
        { return __rhs; }
      };
  
+   /// @cond undocumented
  #if __cplusplus < 201703L
    template<typename _Alloc>
      inline void
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 818,825 ****
--- 819,829 ----
        __a.deallocate(__a.allocate(1u), 1u);
      };
  #endif
+   /// @endcond
  #endif // C++11
  
+   /// @cond undocumented
+ 
    /**
     * Destroy a range of objects using the supplied allocator.  For
     * non-default allocators we do not optimize away invocation of
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 847,854 ****
      _Destroy(_ForwardIterator __first, _ForwardIterator __last,
  	     allocator<_Tp>&)
      {
!       _Destroy(__first, __last);
      }
  
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace std
--- 851,859 ----
      _Destroy(_ForwardIterator __first, _ForwardIterator __last,
  	     allocator<_Tp>&)
      {
!       std::_Destroy(__first, __last);
      }
+   /// @endcond
  
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace std
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/allocator.h gcc-12.4.0/libstdc++-v3/include/bits/allocator.h
*** gcc-12.3.0/libstdc++-v3/include/bits/allocator.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/allocator.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 67,73 ****
    // explicit specialization, with the historical ABI properties, but with
    // the same members that are present in the primary template.
  
!   /// allocator<void> specialization.
    template<>
      class allocator<void>
      {
--- 67,76 ----
    // explicit specialization, with the historical ABI properties, but with
    // the same members that are present in the primary template.
  
!   /** std::allocator<void> specialization.
!    *
!    * @headerfile memory
!    */
    template<>
      class allocator<void>
      {
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 119,124 ****
--- 122,129 ----
     *  for further details.
     *
     *  @tparam  _Tp  Type of allocated object.
+    *
+    *  @headerfile memory
     */
    template<typename _Tp>
      class allocator : public __allocator_base<_Tp>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 214,219 ****
--- 219,229 ----
        // Inherit everything else.
      };
  
+   /** Equality comparison for std::allocator objects
+    *
+    * @return true, for all std::allocator objects.
+    * @relates std::allocator
+    */
    template<typename _T1, typename _T2>
      inline _GLIBCXX20_CONSTEXPR bool
      operator==(const allocator<_T1>&, const allocator<_T2>&)
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 228,233 ****
--- 238,245 ----
      { return false; }
  #endif
  
+   /// @cond undocumented
+ 
    // Invalid allocator<cv T> partial specializations.
    // allocator_traits::rebind_alloc can be used to form a valid allocator type.
    template<typename _Tp>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 330,335 ****
--- 342,348 ----
        }
      };
  #endif
+   /// @endcond
  
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace std
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/atomic_base.h gcc-12.4.0/libstdc++-v3/include/bits/atomic_base.h
*** gcc-12.3.0/libstdc++-v3/include/bits/atomic_base.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/atomic_base.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 86,91 ****
--- 86,92 ----
      } memory_order;
  #endif
  
+   /// @cond undocumented
    enum __memory_order_modifier
      {
        __memory_order_mask          = 0x0ffff,
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 93,98 ****
--- 94,100 ----
        __memory_order_hle_acquire   = 0x10000,
        __memory_order_hle_release   = 0x20000
      };
+   /// @endcond
  
    constexpr memory_order
    operator|(memory_order __m, __memory_order_modifier __mod)
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 106,111 ****
--- 108,115 ----
      return memory_order(int(__m) & int(__mod));
    }
  
+   /// @cond undocumented
+ 
    // Drop release ordering as per [atomics.types.operations.req]/21
    constexpr memory_order
    __cmpexch_failure_order2(memory_order __m) noexcept
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 128,133 ****
--- 132,143 ----
  	&& (__m & __memory_order_mask) != memory_order_acq_rel;
    }
  
+   // Base types for atomics.
+   template<typename _IntTp>
+     struct __atomic_base;
+ 
+   /// @endcond
+ 
    _GLIBCXX_ALWAYS_INLINE void
    atomic_thread_fence(memory_order __m) noexcept
    { __atomic_thread_fence(int(__m)); }
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 145,160 ****
        return __ret;
      }
  
!   // Base types for atomics.
!   template<typename _IntTp>
!     struct __atomic_base;
! 
! #if __cplusplus <= 201703L
! # define _GLIBCXX20_INIT(I)
! #else
  # define __cpp_lib_atomic_value_initialization 201911L
  # define _GLIBCXX20_INIT(I) = I
  #endif
  
  #define ATOMIC_VAR_INIT(_VI) { _VI }
  
--- 155,171 ----
        return __ret;
      }
  
! #if __cplusplus >= 202002L
  # define __cpp_lib_atomic_value_initialization 201911L
+ #endif
+ 
+ /// @cond undocumented
+ #if __cpp_lib_atomic_value_initialization
  # define _GLIBCXX20_INIT(I) = I
+ #else
+ # define _GLIBCXX20_INIT(I)
  #endif
+ /// @endcond
  
  #define ATOMIC_VAR_INIT(_VI) { _VI }
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 171,178 ****
      typedef unsigned char __atomic_flag_data_type;
  #endif
  
!   /**
!    *  @brief Base type for atomic_flag.
     *
     *  Base type is POD with data, allowing atomic_flag to derive from
     *  it and meet the standard layout type requirement. In addition to
--- 182,191 ----
      typedef unsigned char __atomic_flag_data_type;
  #endif
  
!   /// @cond undocumented
! 
!   /*
!    *  Base type for atomic_flag.
     *
     *  Base type is POD with data, allowing atomic_flag to derive from
     *  it and meet the standard layout type requirement. In addition to
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 190,195 ****
--- 203,210 ----
  
    _GLIBCXX_END_EXTERN_C
  
+   /// @endcond
+ 
  #define ATOMIC_FLAG_INIT { 0 }
  
    /// atomic_flag
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 295,300 ****
--- 310,316 ----
      { return __i ? __GCC_ATOMIC_TEST_AND_SET_TRUEVAL : 0; }
    };
  
+   /// @cond undocumented
  
    /// Base class for atomic integrals.
    //
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 936,942 ****
--- 952,962 ----
        { return __atomic_fetch_sub(&_M_p, _M_type_size(__d), int(__m)); }
      };
  
+   /// @endcond
+ 
  #if __cplusplus > 201703L
+   /// @cond undocumented
+ 
    // Implementation details of atomic_ref and atomic<floating-point>.
    namespace __atomic_impl
    {
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1936,1941 ****
--- 1956,1962 ----
        _Tp** _M_ptr;
      };
  
+   /// @endcond
  #endif // C++2a
  
    /// @} group atomics
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/basic_string.h gcc-12.4.0/libstdc++-v3/include/bits/basic_string.h
*** gcc-12.3.0/libstdc++-v3/include/bits/basic_string.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/basic_string.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 69,74 ****
--- 69,76 ----
     *
     *  @ingroup strings
     *  @ingroup sequences
+    *  @headerfile string
+    *  @since C++98
     *
     *  @tparam _CharT  Type of character
     *  @tparam _Traits  Traits for character type, defaults to
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 680,685 ****
--- 682,688 ----
        {
  	if (__str._M_is_local())
  	  {
+ 	    (void)_M_use_local_data();
  	    traits_type::copy(_M_local_buf, __str._M_local_buf,
  			      __str.length() + 1);
  	  }
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 693,699 ****
  	// basic_stringbuf relies on writing into unallocated capacity so
  	// we mess up the contents if we put a '\0' in the string.
  	_M_length(__str.length());
! 	__str._M_data(__str._M_local_data());
  	__str._M_set_length(0);
        }
  
--- 696,702 ----
  	// basic_stringbuf relies on writing into unallocated capacity so
  	// we mess up the contents if we put a '\0' in the string.
  	_M_length(__str.length());
! 	__str._M_data(__str._M_use_local_data());
  	__str._M_set_length(0);
        }
  
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 719,724 ****
--- 722,728 ----
        {
  	if (__str._M_is_local())
  	  {
+ 	    (void)_M_use_local_data();
  	    traits_type::copy(_M_local_buf, __str._M_local_buf,
  			      __str.length() + 1);
  	    _M_length(__str.length());
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 730,736 ****
  	    _M_data(__str._M_data());
  	    _M_length(__str.length());
  	    _M_capacity(__str._M_allocated_capacity);
! 	    __str._M_data(__str._M_local_buf);
  	    __str._M_set_length(0);
  	  }
  	else
--- 734,740 ----
  	    _M_data(__str._M_data());
  	    _M_length(__str.length());
  	    _M_capacity(__str._M_allocated_capacity);
! 	    __str._M_data(__str._M_use_local_data());
  	    __str._M_set_length(0);
  	  }
  	else
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/basic_string.tcc gcc-12.4.0/libstdc++-v3/include/bits/basic_string.tcc
*** gcc-12.3.0/libstdc++-v3/include/bits/basic_string.tcc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/basic_string.tcc	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 79,84 ****
--- 79,85 ----
  	      }
  	    else if (__s.length())
  	      {
+ 		(void)_M_use_local_data();
  		traits_type::copy(_M_local_buf, __s._M_local_buf,
  				  __s.length() + 1);
  		_M_length(__s.length());
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 87,92 ****
--- 88,94 ----
  	      }
  	    else if (length())
  	      {
+ 		(void)__s._M_use_local_data();
  		traits_type::copy(__s._M_local_buf, _M_local_buf,
  				  length() + 1);
  		__s._M_length(length());
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 97,102 ****
--- 99,105 ----
  	else
  	  {
  	    const size_type __tmp_capacity = __s._M_allocated_capacity;
+ 	    (void)__s._M_use_local_data();
  	    traits_type::copy(__s._M_local_buf, _M_local_buf,
  			      length() + 1);
  	    _M_data(__s._M_data());
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 108,113 ****
--- 111,117 ----
  	  const size_type __tmp_capacity = _M_allocated_capacity;
  	  if (__s._M_is_local())
  	    {
+ 	      (void)_M_use_local_data();
  	      traits_type::copy(_M_local_buf, __s._M_local_buf,
  				__s.length() + 1);
  	      __s._M_data(_M_data());
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 529,534 ****
--- 533,542 ----
  		    {
  		      const size_type __nleft = (__p + __len1) - __s;
  		      this->_S_move(__p, __s, __nleft);
+ 		      // Tell the middle-end that the copy can't overlap
+ 		      // (PR105651).
+ 		      if (__len2 < __nleft)
+ 			__builtin_unreachable();
  		      this->_S_copy(__p + __nleft, __p + __len2,
  				    __len2 - __nleft);
  		    }
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 562,574 ****
    template<typename _Operation>
      constexpr void
      basic_string<_CharT, _Traits, _Alloc>::
!     resize_and_overwrite(size_type __n, _Operation __op)
      {
        const size_type __capacity = capacity();
        _CharT* __p;
        if (__n > __capacity)
  	{
! 	  __p = _M_create(__n, __capacity);
  	  this->_S_copy(__p, _M_data(), length()); // exclude trailing null
  #if __cpp_lib_is_constant_evaluated
  	  if (std::is_constant_evaluated())
--- 570,583 ----
    template<typename _Operation>
      constexpr void
      basic_string<_CharT, _Traits, _Alloc>::
!     resize_and_overwrite(const size_type __n, _Operation __op)
      {
        const size_type __capacity = capacity();
        _CharT* __p;
        if (__n > __capacity)
  	{
! 	  auto __new_capacity = __n; // Must not allow _M_create to modify __n.
! 	  __p = _M_create(__new_capacity, __capacity);
  	  this->_S_copy(__p, _M_data(), length()); // exclude trailing null
  #if __cpp_lib_is_constant_evaluated
  	  if (std::is_constant_evaluated())
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 576,582 ****
  #endif
  	  _M_dispose();
  	  _M_data(__p);
! 	  _M_capacity(__n);
  	}
        else
  	__p = _M_data();
--- 585,591 ----
  #endif
  	  _M_dispose();
  	  _M_data(__p);
! 	  _M_capacity(__new_capacity);
  	}
        else
  	__p = _M_data();
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 586,594 ****
  	size_type _M_r;
        };
        _Terminator __term{this};
!       const size_type __n2 [[maybe_unused]] = __n;
!       __term._M_r = std::move(__op)(__p, __n);
!       _GLIBCXX_DEBUG_ASSERT(__term._M_r >= 0 && __term._M_r <= __n2);
      }
  #endif // C++23
  
--- 595,606 ----
  	size_type _M_r;
        };
        _Terminator __term{this};
!       auto __r = std::move(__op)(auto(__p), auto(__n));
!       static_assert(ranges::__detail::__is_integer_like<decltype(__r)>);
!       _GLIBCXX_DEBUG_ASSERT(__r >= 0 && __r <= __n);
!       __term._M_r = size_type(__r);
!       if (__term._M_r > __n)
! 	__builtin_unreachable();
      }
  #endif // C++23
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/c++config gcc-12.4.0/libstdc++-v3/include/bits/c++config
*** gcc-12.3.0/libstdc++-v3/include/bits/c++config	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/c++config	Thu Jun 20 08:08:10 2024
*************** namespace __gnu_cxx
*** 345,357 ****
  # define _GLIBCXX_DEFAULT_ABI_TAG
  #endif
  
! // Defined if inline namespaces are used for versioning.
  #define _GLIBCXX_INLINE_VERSION 
  
- // Inline namespace for symbol versioning.
  #if _GLIBCXX_INLINE_VERSION
  # define _GLIBCXX_BEGIN_NAMESPACE_VERSION namespace __8 {
  # define _GLIBCXX_END_NAMESPACE_VERSION }
  
  namespace std
  {
--- 345,360 ----
  # define _GLIBCXX_DEFAULT_ABI_TAG
  #endif
  
! // Non-zero if inline namespaces are used for versioning the entire library.
  #define _GLIBCXX_INLINE_VERSION 
  
  #if _GLIBCXX_INLINE_VERSION
+ // Inline namespace for symbol versioning of (nearly) everything in std.
  # define _GLIBCXX_BEGIN_NAMESPACE_VERSION namespace __8 {
  # define _GLIBCXX_END_NAMESPACE_VERSION }
+ // Unused when everything in std is versioned anyway.
+ # define _GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(X)
+ # define _GLIBCXX_END_INLINE_ABI_NAMESPACE(X)
  
  namespace std
  {
*************** _GLIBCXX_END_NAMESPACE_VERSION
*** 376,383 ****
--- 379,390 ----
  }
  
  #else
+ // Unused.
  # define _GLIBCXX_BEGIN_NAMESPACE_VERSION
  # define _GLIBCXX_END_NAMESPACE_VERSION
+ // Used to version individual components, e.g. std::_V2::error_category.
+ # define _GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(X) inline namespace X {
+ # define _GLIBCXX_END_INLINE_ABI_NAMESPACE(X)   } // inline namespace X
  #endif
  
  // Inline namespaces for special modes: debug, parallel.
*************** namespace std
*** 816,821 ****
--- 823,831 ----
  
  #undef _GLIBCXX_HAS_BUILTIN
  
+ // Mark code that should be ignored by the compiler, but seen by Doxygen.
+ #define _GLIBCXX_DOXYGEN_ONLY(X)
+ 
  // PSTL configuration
  
  #if __cplusplus >= 201703L
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/char_traits.h gcc-12.4.0/libstdc++-v3/include/bits/char_traits.h
*** gcc-12.3.0/libstdc++-v3/include/bits/char_traits.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/char_traits.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 210,217 ****
  #if __cplusplus >= 202002L
        if (std::__is_constant_evaluated())
  	{
- 	  if (__s1 == __s2) // unlikely, but saves a lot of work
- 	    return __s1;
  #if __cpp_constexpr_dynamic_alloc
  	  // The overlap detection below fails due to PR c++/89074,
  	  // so use a temporary buffer instead.
--- 210,215 ----
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 220,236 ****
  	  copy(__s1, __tmp, __n);
  	  delete[] __tmp;
  #else
! 	  const auto __end = __s2 + __n - 1;
! 	  bool __overlap = false;
! 	  for (std::size_t __i = 0; __i < __n - 1; ++__i)
! 	    {
! 	      if (__s1 + __i == __end)
! 		{
! 		  __overlap = true;
! 		  break;
! 		}
! 	    }
! 	  if (__overlap)
  	    {
  	      do
  		{
--- 218,226 ----
  	  copy(__s1, __tmp, __n);
  	  delete[] __tmp;
  #else
! 	  // Use __builtin_constant_p to avoid comparing unrelated pointers.
! 	  if (__builtin_constant_p(__s2 < __s1)
! 		&& __s1 > __s2 && __s1 < (__s2 + __n))
  	    {
  	      do
  		{
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/chrono.h gcc-12.4.0/libstdc++-v3/include/bits/chrono.h
*** gcc-12.3.0/libstdc++-v3/include/bits/chrono.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/chrono.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 483,508 ****
  	{ return numeric_limits<_Rep>::lowest(); }
        };
  
-     /// @cond undocumented
- 
-     template<typename _Tp>
-       struct __is_ratio
-       : std::false_type
-       { };
- 
-     template<intmax_t _Num, intmax_t _Den>
-       struct __is_ratio<ratio<_Num, _Den>>
-       : std::true_type
-       { };
- 
-     /// @endcond
- 
      template<typename _Rep, typename _Period>
        class duration
        {
! 	static_assert(!__is_duration<_Rep>::value, "rep cannot be a duration");
  	static_assert(__is_ratio<_Period>::value,
! 		      "period must be a specialization of ratio");
  	static_assert(_Period::num > 0, "period must be positive");
  
  	template<typename _Rep2>
--- 483,495 ----
  	{ return numeric_limits<_Rep>::lowest(); }
        };
  
      template<typename _Rep, typename _Period>
        class duration
        {
! 	static_assert(!__is_duration<_Rep>::value,
! 		      "rep cannot be a std::chrono::duration");
  	static_assert(__is_ratio<_Period>::value,
! 		      "period must be a specialization of std::ratio");
  	static_assert(_Period::num > 0, "period must be positive");
  
  	template<typename _Rep2>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1206,1212 ****
      // compatibility definitions for previous versions.  At some
      // point, when these clocks settle down, the inlined namespaces
      // can be removed.  XXX GLIBCXX_ABI Deprecated
!     inline namespace _V2 {
  
      /**
       *  @brief System clock.
--- 1193,1199 ----
      // compatibility definitions for previous versions.  At some
      // point, when these clocks settle down, the inlined namespaces
      // can be removed.  XXX GLIBCXX_ABI Deprecated
! _GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(_V2)
  
      /**
       *  @brief System clock.
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1278,1284 ****
      */
      using high_resolution_clock = system_clock;
  
!     } // end inline namespace _V2
  
  #if __cplusplus >= 202002L
      /// @addtogroup chrono
--- 1265,1271 ----
      */
      using high_resolution_clock = system_clock;
  
! _GLIBCXX_END_INLINE_ABI_NAMESPACE(_V2)
  
  #if __cplusplus >= 202002L
      /// @addtogroup chrono
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/cow_string.h gcc-12.4.0/libstdc++-v3/include/bits/cow_string.h
*** gcc-12.3.0/libstdc++-v3/include/bits/cow_string.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/cow_string.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 54,59 ****
--- 54,61 ----
     *
     *  @ingroup strings
     *  @ingroup sequences
+    *  @headerfile string
+    *  @since C++98
     *
     *  @tparam _CharT  Type of character
     *  @tparam _Traits  Traits for character type, defaults to
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/forward_list.h gcc-12.4.0/libstdc++-v3/include/bits/forward_list.h
*** gcc-12.3.0/libstdc++-v3/include/bits/forward_list.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/forward_list.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 406,411 ****
--- 406,413 ----
     *  and fixed time insertion/deletion at any point in the sequence.
     *
     *  @ingroup sequences
+    *  @headerfile forward_list
+    *  @since C++11
     *
     *  @tparam _Tp  Type of element.
     *  @tparam _Alloc  Allocator type, defaults to allocator<_Tp>.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/fs_dir.h gcc-12.4.0/libstdc++-v3/include/bits/fs_dir.h
*** gcc-12.3.0/libstdc++-v3/include/bits/fs_dir.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/fs_dir.h	Thu Jun 20 08:08:10 2024
*************** namespace filesystem
*** 52,57 ****
--- 52,61 ----
     */
  
    /// Information about a file's type and permissions.
+   /**
+    * @headerfile filesystem
+    * @since C++17
+    */
    class file_status
    {
    public:
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 94,99 ****
--- 98,107 ----
    class recursive_directory_iterator;
  
    /// The value type used by directory iterators
+   /**
+    * @headerfile filesystem
+    * @since C++17
+    */
    class directory_entry
    {
    public:
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 354,360 ****
--- 362,374 ----
      file_type		_M_type = file_type::none;
    };
  
+   /// @cond undocumented
+ 
    /// Proxy returned by post-increment on directory iterators.
+   /**
+    * @headerfile filesystem
+    * @since C++17
+    */
    struct __directory_iterator_proxy
    {
      const directory_entry& operator*() const& noexcept { return _M_entry; }
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 370,377 ****
--- 384,396 ----
  
      directory_entry _M_entry;
    };
+   /// @endcond
  
    /// Iterator type for traversing the entries in a single directory.
+   /**
+    * @headerfile filesystem
+    * @since C++17
+    */
    class directory_iterator
    {
    public:
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 433,439 ****
        // _GLIBCXX_RESOLVE_LIB_DEFECTS
        // 3719. Directory iterators should be usable with default sentinel
        bool operator==(default_sentinel_t) const noexcept
!       { return !_M_dir; }
  #endif
  
  #if __cpp_impl_three_way_comparison < 201907L
--- 452,458 ----
        // _GLIBCXX_RESOLVE_LIB_DEFECTS
        // 3719. Directory iterators should be usable with default sentinel
        bool operator==(default_sentinel_t) const noexcept
!       { return *this == directory_iterator(); }
  #endif
  
  #if __cpp_impl_three_way_comparison < 201907L
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 451,457 ****
      std::__shared_ptr<_Dir> _M_dir;
    };
  
!   /// @relates std::filesystem::directory_iterator @{
  
    /** @brief Enable range-based `for` using directory_iterator.
     *
--- 470,480 ----
      std::__shared_ptr<_Dir> _M_dir;
    };
  
!   /** @relates std::filesystem::directory_iterator
!    *  @headerfile filesystem
!    *  @since C++17
!    *  @{
!    */
  
    /** @brief Enable range-based `for` using directory_iterator.
     *
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 468,473 ****
--- 491,500 ----
    /// @}
  
    /// Iterator type for recursively traversing a directory hierarchy.
+   /**
+    *  @headerfile filesystem
+    *  @since C++17
+    */
    class recursive_directory_iterator
    {
    public:
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 541,547 ****
        // _GLIBCXX_RESOLVE_LIB_DEFECTS
        // 3719. Directory iterators should be usable with default sentinel
        bool operator==(default_sentinel_t) const noexcept
!       { return !_M_dirs; }
  #endif
  
  #if __cpp_impl_three_way_comparison < 201907L
--- 568,574 ----
        // _GLIBCXX_RESOLVE_LIB_DEFECTS
        // 3719. Directory iterators should be usable with default sentinel
        bool operator==(default_sentinel_t) const noexcept
!       { return *this == recursive_directory_iterator(); }
  #endif
  
  #if __cpp_impl_three_way_comparison < 201907L
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 566,572 ****
      filesystem::remove_all(const path&);
    };
  
!   /// @relates std::filesystem::recursive_directory_iterator @{
  
    /** @brief Enable range-based `for` using recursive_directory_iterator.
     *
--- 593,603 ----
      filesystem::remove_all(const path&);
    };
  
!   /** @relates std::filesystem::directory_iterator
!    *  @headerfile filesystem
!    *  @since C++17
!    *  @{
!    */
  
    /** @brief Enable range-based `for` using recursive_directory_iterator.
     *
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/fs_ops.h gcc-12.4.0/libstdc++-v3/include/bits/fs_ops.h
*** gcc-12.3.0/libstdc++-v3/include/bits/fs_ops.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/fs_ops.h	Thu Jun 20 08:08:10 2024
*************** namespace filesystem
*** 90,97 ****
    bool create_directory(const path& __p);
    bool create_directory(const path& __p, error_code& __ec) noexcept;
  
!   bool create_directory(const path& __p, const path& attributes);
!   bool create_directory(const path& __p, const path& attributes,
  			error_code& __ec) noexcept;
  
    void create_directory_symlink(const path& __to, const path& __new_symlink);
--- 90,97 ----
    bool create_directory(const path& __p);
    bool create_directory(const path& __p, error_code& __ec) noexcept;
  
!   bool create_directory(const path& __p, const path& __attributes);
!   bool create_directory(const path& __p, const path& __attributes,
  			error_code& __ec) noexcept;
  
    void create_directory_symlink(const path& __to, const path& __new_symlink);
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/fs_path.h gcc-12.4.0/libstdc++-v3/include/bits/fs_path.h
*** gcc-12.3.0/libstdc++-v3/include/bits/fs_path.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/fs_path.h	Thu Jun 20 08:08:10 2024
*************** namespace __detail
*** 102,120 ****
  #endif
  
    template<typename _Iter_traits, typename = void>
!     struct __is_path_iter_src
!     : false_type
!     { };
  
    template<typename _Iter_traits>
!     struct __is_path_iter_src<_Iter_traits,
! 			      void_t<typename _Iter_traits::value_type>>
!     : bool_constant<__is_encoded_char<typename _Iter_traits::value_type>>
!     { };
  
    template<typename _Source>
      inline constexpr bool __is_path_src
!       = __is_path_iter_src<iterator_traits<decay_t<_Source>>>::value;
  
    template<>
      inline constexpr bool __is_path_src<path> = false;
--- 102,117 ----
  #endif
  
    template<typename _Iter_traits, typename = void>
!     inline constexpr bool __is_path_iter_src = false;
  
    template<typename _Iter_traits>
!     inline constexpr bool
!     __is_path_iter_src<_Iter_traits, void_t<typename _Iter_traits::value_type>>
!       = __is_encoded_char<typename _Iter_traits::value_type>;
  
    template<typename _Source>
      inline constexpr bool __is_path_src
!       = __is_path_iter_src<iterator_traits<decay_t<_Source>>>;
  
    template<>
      inline constexpr bool __is_path_src<path> = false;
*************** namespace __detail
*** 150,156 ****
  
    // SFINAE constraint for InputIterator parameters as required by [fs.req].
    template<typename _Iter, typename _Tr = __safe_iterator_traits<_Iter>>
!     using _Path2 = enable_if_t<__is_path_iter_src<_Tr>::value, path>;
  
  #if __cpp_lib_concepts
    template<typename _Iter>
--- 147,153 ----
  
    // SFINAE constraint for InputIterator parameters as required by [fs.req].
    template<typename _Iter, typename _Tr = __safe_iterator_traits<_Iter>>
!     using _Path2 = enable_if_t<__is_path_iter_src<_Tr>, path>;
  
  #if __cpp_lib_concepts
    template<typename _Iter>
*************** namespace __detail
*** 288,294 ****
    /// @{
  
    /// A filesystem path
!   /// @ingroup filesystem
    class path
    {
    public:
--- 285,295 ----
    /// @{
  
    /// A filesystem path
!   /**
!    * @ingroup filesystem
!    * @headerfile filesystem
!    * @since C++17
!    */
    class path
    {
    public:
*************** namespace __detail
*** 746,751 ****
--- 747,756 ----
    /// @}
  
    /// Exception type thrown by the Filesystem library
+   /**
+    * @headerfile filesystem
+    * @since C++17
+    */
    class filesystem_error : public std::system_error
    {
    public:
*************** namespace __detail
*** 808,813 ****
--- 813,820 ----
    /** Create a path from a UTF-8-encoded sequence of char
     *
     * @relates std::filesystem::path
+    * @headerfile filesystem
+    * @since C++17
     */
    template<typename _InputIterator,
  	   typename _Require = __detail::_Path2<_InputIterator>,
*************** namespace __detail
*** 831,836 ****
--- 838,845 ----
    /** Create a path from a UTF-8-encoded sequence of char
     *
     * @relates std::filesystem::path
+    * @headerfile filesystem
+    * @since C++17
     */
    template<typename _Source,
  	   typename _Require = __detail::_Path<_Source>,
*************** namespace __detail
*** 931,936 ****
--- 940,949 ----
    /// @endcond
  
    /// An iterator for the components of a path
+   /**
+    * @headerfile filesystem
+    * @since C++17
+    */
    class path::iterator
    {
    public:
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/hashtable.h gcc-12.4.0/libstdc++-v3/include/bits/hashtable.h
*** gcc-12.3.0/libstdc++-v3/include/bits/hashtable.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/hashtable.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 985,991 ****
        // DR 1189.
        // reserve, if present, comes from _Rehash_base.
  
! #if __cplusplus > 201402L
        /// Re-insert an extracted node into a container with unique keys.
        insert_return_type
        _M_reinsert_node(node_type&& __nh)
--- 985,991 ----
        // DR 1189.
        // reserve, if present, comes from _Rehash_base.
  
! #if __cplusplus > 201404L
        /// Re-insert an extracted node into a container with unique keys.
        insert_return_type
        _M_reinsert_node(node_type&& __nh)
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1010,1016 ****
  	      {
  		__ret.position
  		  = _M_insert_unique_node(__bkt, __code, __nh._M_ptr);
! 		__nh._M_ptr = nullptr;
  		__ret.inserted = true;
  	      }
  	  }
--- 1010,1016 ----
  	      {
  		__ret.position
  		  = _M_insert_unique_node(__bkt, __code, __nh._M_ptr);
! 		__nh.release();
  		__ret.inserted = true;
  	      }
  	  }
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1030,1036 ****
  	auto __code = this->_M_hash_code(__k);
  	auto __ret
  	  = _M_insert_multi_node(__hint._M_cur, __code, __nh._M_ptr);
! 	__nh._M_ptr = nullptr;
  	return __ret;
        }
  
--- 1030,1036 ----
  	auto __code = this->_M_hash_code(__k);
  	auto __ret
  	  = _M_insert_multi_node(__hint._M_cur, __code, __nh._M_ptr);
! 	__nh.release();
  	return __ret;
        }
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1055,1060 ****
--- 1055,1074 ----
  	return { __n, this->_M_node_allocator() };
        }
  
+       // Only use the possibly cached node's hash code if its hash function
+       // _H2 matches _Hash and is stateless. Otherwise recompute it using _Hash.
+       template<typename _H2>
+ 	__hash_code
+ 	_M_src_hash_code(const _H2&, const key_type& __k,
+ 			 const __node_value_type& __src_n) const
+ 	{
+ 	  if constexpr (std::is_same_v<_H2, _Hash>)
+ 	    if constexpr (std::is_empty_v<_Hash>)
+ 	      return this->_M_hash_code(__src_n);
+ 
+ 	  return this->_M_hash_code(__k);
+ 	}
+ 
      public:
        // Extract a node.
        node_type
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1092,1104 ****
  	      auto __pos = __i++;
  	      const key_type& __k = _ExtractKey{}(*__pos);
  	      __hash_code __code
! 		= this->_M_hash_code(__src.hash_function(), *__pos._M_cur);
  	      size_type __bkt = _M_bucket_index(__code);
  	      if (_M_find_node(__bkt, __k, __code) == nullptr)
  		{
  		  auto __nh = __src.extract(__pos);
  		  _M_insert_unique_node(__bkt, __code, __nh._M_ptr, __n_elt);
! 		  __nh._M_ptr = nullptr;
  		  __n_elt = 1;
  		}
  	      else if (__n_elt != 1)
--- 1106,1118 ----
  	      auto __pos = __i++;
  	      const key_type& __k = _ExtractKey{}(*__pos);
  	      __hash_code __code
! 		= _M_src_hash_code(__src.hash_function(), __k, *__pos._M_cur);
  	      size_type __bkt = _M_bucket_index(__code);
  	      if (_M_find_node(__bkt, __k, __code) == nullptr)
  		{
  		  auto __nh = __src.extract(__pos);
  		  _M_insert_unique_node(__bkt, __code, __nh._M_ptr, __n_elt);
! 		  __nh.release();
  		  __n_elt = 1;
  		}
  	      else if (__n_elt != 1)
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1120,1130 ****
  	  for (auto __i = __src.cbegin(), __end = __src.cend(); __i != __end;)
  	    {
  	      auto __pos = __i++;
  	      __hash_code __code
! 		= this->_M_hash_code(__src.hash_function(), *__pos._M_cur);
  	      auto __nh = __src.extract(__pos);
  	      __hint = _M_insert_multi_node(__hint, __code, __nh._M_ptr)._M_cur;
! 	      __nh._M_ptr = nullptr;
  	    }
  	}
  #endif // C++17
--- 1134,1145 ----
  	  for (auto __i = __src.cbegin(), __end = __src.cend(); __i != __end;)
  	    {
  	      auto __pos = __i++;
+ 	      const key_type& __k = _ExtractKey{}(*__pos);
  	      __hash_code __code
! 		= _M_src_hash_code(__src.hash_function(), __k, *__pos._M_cur);
  	      auto __nh = __src.extract(__pos);
  	      __hint = _M_insert_multi_node(__hint, __code, __nh._M_ptr)._M_cur;
! 	      __nh.release();
  	    }
  	}
  #endif // C++17
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/hashtable_policy.h gcc-12.4.0/libstdc++-v3/include/bits/hashtable_policy.h
*** gcc-12.3.0/libstdc++-v3/include/bits/hashtable_policy.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/hashtable_policy.h	Thu Jun 20 08:08:10 2024
*************** namespace __detail
*** 291,308 ****
--- 291,312 ----
  
        __gnu_cxx::__aligned_buffer<_Value> _M_storage;
  
+       [[__gnu__::__always_inline__]]
        _Value*
        _M_valptr() noexcept
        { return _M_storage._M_ptr(); }
  
+       [[__gnu__::__always_inline__]]
        const _Value*
        _M_valptr() const noexcept
        { return _M_storage._M_ptr(); }
  
+       [[__gnu__::__always_inline__]]
        _Value&
        _M_v() noexcept
        { return *_M_valptr(); }
  
+       [[__gnu__::__always_inline__]]
        const _Value&
        _M_v() const noexcept
        { return *_M_valptr(); }
*************** namespace __detail
*** 1280,1298 ****
  	}
  
        __hash_code
-       _M_hash_code(const _Hash&,
- 		   const _Hash_node_value<_Value, true>& __n) const
-       { return __n._M_hash_code; }
- 
-       // Compute hash code using _Hash as __n _M_hash_code, if present, was
-       // computed using _H2.
-       template<typename _H2>
- 	__hash_code
- 	_M_hash_code(const _H2&,
- 		const _Hash_node_value<_Value, __cache_hash_code>& __n) const
- 	{ return _M_hash_code(_ExtractKey{}(__n._M_v())); }
- 
-       __hash_code
        _M_hash_code(const _Hash_node_value<_Value, false>& __n) const
        { return _M_hash_code(_ExtractKey{}(__n._M_v())); }
  
--- 1284,1289 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/iterator_concepts.h gcc-12.4.0/libstdc++-v3/include/bits/iterator_concepts.h
*** gcc-12.3.0/libstdc++-v3/include/bits/iterator_concepts.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/iterator_concepts.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 771,789 ****
        && invocable<_Fn, iter_reference_t<_Is>...>
      using indirect_result_t = invoke_result_t<_Fn, iter_reference_t<_Is>...>;
  
    /// [projected], projected
    template<indirectly_readable _Iter,
  	   indirectly_regular_unary_invocable<_Iter> _Proj>
!     struct projected
!     {
!       using value_type = remove_cvref_t<indirect_result_t<_Proj&, _Iter>>;
! 
!       indirect_result_t<_Proj&, _Iter> operator*() const; // not defined
!     };
! 
!   template<weakly_incrementable _Iter, typename _Proj>
!     struct incrementable_traits<projected<_Iter, _Proj>>
!     { using difference_type = iter_difference_t<_Iter>; };
  
    // [alg.req], common algorithm requirements
  
--- 771,804 ----
        && invocable<_Fn, iter_reference_t<_Is>...>
      using indirect_result_t = invoke_result_t<_Fn, iter_reference_t<_Is>...>;
  
+   namespace __detail
+   {
+     template<typename _Iter, typename _Proj>
+       struct __projected
+       {
+ 	struct __type
+ 	{
+ 	  using value_type = remove_cvref_t<indirect_result_t<_Proj&, _Iter>>;
+ 	  indirect_result_t<_Proj&, _Iter> operator*() const; // not defined
+ 	};
+       };
+ 
+     template<weakly_incrementable _Iter, typename _Proj>
+       struct __projected<_Iter, _Proj>
+       {
+ 	struct __type
+ 	{
+ 	  using value_type = remove_cvref_t<indirect_result_t<_Proj&, _Iter>>;
+ 	  using difference_type = iter_difference_t<_Iter>;
+ 	  indirect_result_t<_Proj&, _Iter> operator*() const; // not defined
+ 	};
+       };
+   } // namespace __detail
+ 
    /// [projected], projected
    template<indirectly_readable _Iter,
  	   indirectly_regular_unary_invocable<_Iter> _Proj>
!     using projected = typename __detail::__projected<_Iter, _Proj>::__type;
  
    // [alg.req], common algorithm requirements
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/list.tcc gcc-12.4.0/libstdc++-v3/include/bits/list.tcc
*** gcc-12.3.0/libstdc++-v3/include/bits/list.tcc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/list.tcc	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 654,660 ****
  	    {
  	      // Move all nodes back into *this.
  	      __carry._M_put_all(end()._M_node);
! 	      for (int __i = 0; __i < sizeof(__tmp)/sizeof(__tmp[0]); ++__i)
  		__tmp[__i]._M_put_all(end()._M_node);
  	      __throw_exception_again;
  	    }
--- 654,660 ----
  	    {
  	      // Move all nodes back into *this.
  	      __carry._M_put_all(end()._M_node);
! 	      for (size_t __i = 0; __i < sizeof(__tmp)/sizeof(__tmp[0]); ++__i)
  		__tmp[__i]._M_put_all(end()._M_node);
  	      __throw_exception_again;
  	    }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/new_allocator.h gcc-12.4.0/libstdc++-v3/include/bits/new_allocator.h
*** gcc-12.3.0/libstdc++-v3/include/bits/new_allocator.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/new_allocator.h	Thu Jun 20 08:08:10 2024
*************** namespace std _GLIBCXX_VISIBILITY(defaul
*** 43,56 ****
  _GLIBCXX_BEGIN_NAMESPACE_VERSION
  
    /**
!    *  @brief  An allocator that uses global new, as per C++03 [20.4.1].
!    *  @ingroup allocators
     *
!    *  This is precisely the allocator defined in the C++ Standard.
!    *    - all allocation calls operator new
!    *    - all deallocation calls operator delete
     *
!    *  @tparam  _Tp  Type of allocated object.
     */
    template<typename _Tp>
      class __new_allocator
--- 43,63 ----
  _GLIBCXX_BEGIN_NAMESPACE_VERSION
  
    /**
!    * @brief  An allocator that uses global `new`, as per C++03 [20.4.1].
!    * @ingroup allocators
     *
!    * This is precisely the allocator defined in the C++ Standard.
!    *   - all allocation calls `operator new`
!    *   - all deallocation calls `operator delete`
     *
!    * This is the default base-class implementation of `std::allocator`,
!    * and is also the base-class of the `__gnu_cxx::new_allocator` extension.
!    * You should use either `std::allocator` or `__gnu_cxx::new_allocator`
!    * instead of using this directly.
!    *
!    * @tparam  _Tp  Type of allocated object.
!    *
!    * @headerfile memory
     */
    template<typename _Tp>
      class __new_allocator
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 86,91 ****
--- 93,102 ----
  	_GLIBCXX20_CONSTEXPR
  	__new_allocator(const __new_allocator<_Tp1>&) _GLIBCXX_USE_NOEXCEPT { }
  
+ #if __cplusplus >= 201103L
+       __new_allocator& operator=(const __new_allocator&) = default;
+ #endif
+ 
  #if __cplusplus <= 201703L
        ~__new_allocator() _GLIBCXX_USE_NOEXCEPT { }
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/node_handle.h gcc-12.4.0/libstdc++-v3/include/bits/node_handle.h
*** gcc-12.3.0/libstdc++-v3/include/bits/node_handle.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/node_handle.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 168,173 ****
--- 168,183 ----
  	_M_ptr = nullptr;
        }
  
+       // Destroys the allocator. Does not deallocate or destroy the node.
+       // Precondition: !empty()
+       // Postcondition: empty()
+       void
+       release() noexcept
+       {
+ 	_M_alloc.release();
+ 	_M_ptr = nullptr;
+       }
+ 
      protected:
        typename _AllocTraits::pointer _M_ptr;
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 219,227 ****
  	  return __tmp;
  	}
  
- 	struct _Empty { };
- 
- 	[[__no_unique_address__]] _Empty     _M_empty;
  	[[__no_unique_address__]] _NodeAlloc _M_alloc;
        };
  
--- 229,234 ----
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 231,236 ****
--- 238,249 ----
  	       typename _Compare, typename _ValueAlloc>
  	friend class _Rb_tree;
  
+       template<typename _Key2, typename _Value2, typename _ValueAlloc,
+ 	       typename _ExtractKey, typename _Equal,
+ 	       typename _Hash, typename _RangeHash, typename _Unused,
+ 	       typename _RehashPolicy, typename _Traits>
+ 	friend class _Hashtable;
+ 
        /// @endcond
      };
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/ostream_insert.h gcc-12.4.0/libstdc++-v3/include/bits/ostream_insert.h
*** gcc-12.3.0/libstdc++-v3/include/bits/ostream_insert.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/ostream_insert.h	Thu Jun 20 08:08:10 2024
*************** namespace std _GLIBCXX_VISIBILITY(defaul
*** 40,45 ****
--- 40,47 ----
  {
  _GLIBCXX_BEGIN_NAMESPACE_VERSION
  
+   /// @cond undocumented
+ 
    template<typename _CharT, typename _Traits>
      inline void
      __ostream_write(basic_ostream<_CharT, _Traits>& __out,
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 124,129 ****
--- 126,133 ----
  #endif
  #endif
  
+   /// @endcond
+ 
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace std
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/ptr_traits.h gcc-12.4.0/libstdc++-v3/include/bits/ptr_traits.h
*** gcc-12.3.0/libstdc++-v3/include/bits/ptr_traits.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/ptr_traits.h	Thu Jun 20 08:08:10 2024
*************** namespace std _GLIBCXX_VISIBILITY(defaul
*** 47,52 ****
--- 47,54 ----
  {
  _GLIBCXX_BEGIN_NAMESPACE_VERSION
  
+   /// @cond undocumented
+ 
    class __undefined;
  
    // For a specialization `SomeTemplate<T, Types...>` the member `type` is T,
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 71,95 ****
      struct __replace_first_arg<_SomeTemplate<_Tp, _Types...>, _Up>
      { using type = _SomeTemplate<_Up, _Types...>; };
  
- #if __cpp_concepts
-   // When concepts are supported detection of _Ptr::element_type is done
-   // by a requires-clause, so __ptr_traits_elem_t only needs to do this:
-   template<typename _Ptr>
-     using __ptr_traits_elem_t = typename __get_first_arg<_Ptr>::type;
- #else
    // Detect the element type of a pointer-like type.
    template<typename _Ptr, typename = void>
      struct __ptr_traits_elem : __get_first_arg<_Ptr>
      { };
  
    // Use _Ptr::element_type if is a valid type.
    template<typename _Ptr>
      struct __ptr_traits_elem<_Ptr, __void_t<typename _Ptr::element_type>>
      { using type = typename _Ptr::element_type; };
  
    template<typename _Ptr>
      using __ptr_traits_elem_t = typename __ptr_traits_elem<_Ptr>::type;
! #endif
  
    // Define pointer_traits<P>::pointer_to.
    template<typename _Ptr, typename _Elt, bool = is_void<_Elt>::value>
--- 73,98 ----
      struct __replace_first_arg<_SomeTemplate<_Tp, _Types...>, _Up>
      { using type = _SomeTemplate<_Up, _Types...>; };
  
    // Detect the element type of a pointer-like type.
    template<typename _Ptr, typename = void>
      struct __ptr_traits_elem : __get_first_arg<_Ptr>
      { };
  
    // Use _Ptr::element_type if is a valid type.
+ #if __cpp_concepts
+   template<typename _Ptr> requires requires { typename _Ptr::element_type; }
+     struct __ptr_traits_elem<_Ptr, void>
+     { using type = typename _Ptr::element_type; };
+ #else
    template<typename _Ptr>
      struct __ptr_traits_elem<_Ptr, __void_t<typename _Ptr::element_type>>
      { using type = typename _Ptr::element_type; };
+ #endif
  
    template<typename _Ptr>
      using __ptr_traits_elem_t = typename __ptr_traits_elem<_Ptr>::type;
! 
!   /// @endcond
  
    // Define pointer_traits<P>::pointer_to.
    template<typename _Ptr, typename _Elt, bool = is_void<_Elt>::value>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 101,117 ****
        /**
         *  @brief  Obtain a pointer to an object
         *  @param  __r  A reference to an object of type `element_type`
!        *  @return `pointer::pointer_to(__e)`
!        *  @pre `pointer::pointer_to(__e)` is a valid expression.
        */
        static pointer
!       pointer_to(element_type& __e)
  #if __cpp_lib_concepts
        requires requires {
! 	{ pointer::pointer_to(__e) } -> convertible_to<pointer>;
        }
  #endif
!       { return pointer::pointer_to(__e); }
      };
  
    // Do not define pointer_traits<P>::pointer_to if element type is void.
--- 104,120 ----
        /**
         *  @brief  Obtain a pointer to an object
         *  @param  __r  A reference to an object of type `element_type`
!        *  @return `pointer::pointer_to(__r)`
!        *  @pre `pointer::pointer_to(__r)` is a valid expression.
        */
        static pointer
!       pointer_to(element_type& __r)
  #if __cpp_lib_concepts
        requires requires {
! 	{ pointer::pointer_to(__r) } -> convertible_to<pointer>;
        }
  #endif
!       { return pointer::pointer_to(__r); }
      };
  
    // Do not define pointer_traits<P>::pointer_to if element type is void.
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 140,168 ****
      struct __ptr_traits_impl : __ptr_traits_ptr_to<_Ptr, _Elt>
      {
      private:
-       template<typename _Tp, typename = void>
- 	struct __difference { using type = ptrdiff_t; };
- 
        template<typename _Tp>
! #if __cpp_concepts
! 	requires requires { typename _Tp::difference_type; }
! 	struct __difference<_Tp>
! #else
! 	struct __difference<_Tp, __void_t<typename _Tp::difference_type>>
! #endif
! 	{ using type = typename _Tp::difference_type; };
! 
!       template<typename _Tp, typename _Up, typename = void>
! 	struct __rebind : __replace_first_arg<_Tp, _Up> { };
  
        template<typename _Tp, typename _Up>
! #if __cpp_concepts
! 	requires requires { typename _Tp::template rebind<_Up>; }
! 	struct __rebind<_Tp, _Up>
! #else
! 	struct __rebind<_Tp, _Up, __void_t<typename _Tp::template rebind<_Up>>>
! #endif
! 	{ using type = typename _Tp::template rebind<_Up>; };
  
      public:
        /// The pointer type.
--- 143,153 ----
      struct __ptr_traits_impl : __ptr_traits_ptr_to<_Ptr, _Elt>
      {
      private:
        template<typename _Tp>
! 	using __diff_t = typename _Tp::difference_type;
  
        template<typename _Tp, typename _Up>
! 	using __rebind = __type_identity<typename _Tp::template rebind<_Up>>;
  
      public:
        /// The pointer type.
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 172,182 ****
        using element_type = _Elt;
  
        /// The type used to represent the difference between two pointers.
!       using difference_type = typename __difference<_Ptr>::type;
  
        /// A pointer to a different type.
        template<typename _Up>
!         using rebind = typename __rebind<_Ptr, _Up>::type;
      };
  
    // _GLIBCXX_RESOLVE_LIB_DEFECTS
--- 157,168 ----
        using element_type = _Elt;
  
        /// The type used to represent the difference between two pointers.
!       using difference_type = __detected_or_t<ptrdiff_t, __diff_t, _Ptr>;
  
        /// A pointer to a different type.
        template<typename _Up>
! 	using rebind = typename __detected_or_t<__replace_first_arg<_Ptr, _Up>,
! 						__rebind, _Ptr, _Up>::type;
      };
  
    // _GLIBCXX_RESOLVE_LIB_DEFECTS
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 187,192 ****
--- 173,179 ----
  
    /**
     * @brief  Uniform interface to all pointer-like types
+    * @headerfile memory
     * @ingroup pointer_abstractions
     * @since C++11
    */
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 194,208 ****
      struct pointer_traits : __ptr_traits_impl<_Ptr, __ptr_traits_elem_t<_Ptr>>
      { };
  
- #if __cpp_concepts
-   template<typename _Ptr> requires requires { typename _Ptr::element_type; }
-     struct pointer_traits<_Ptr>
-     : __ptr_traits_impl<_Ptr, typename _Ptr::element_type>
-     { };
- #endif
- 
    /**
     * @brief  Partial specialization for built-in pointers.
     * @ingroup pointer_abstractions
     * @since C++11
    */
--- 181,189 ----
      struct pointer_traits : __ptr_traits_impl<_Ptr, __ptr_traits_elem_t<_Ptr>>
      { };
  
    /**
     * @brief  Partial specialization for built-in pointers.
+    * @headerfile memory
     * @ingroup pointer_abstractions
     * @since C++11
    */
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/quoted_string.h gcc-12.4.0/libstdc++-v3/include/bits/quoted_string.h
*** gcc-12.3.0/libstdc++-v3/include/bits/quoted_string.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/quoted_string.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 85,98 ****
      /**
       * @brief Inserter for quoted strings.
       *
!      *  _GLIBCXX_RESOLVE_LIB_DEFECTS
!      *  DR 2344 quoted()'s interaction with padding is unclear
       */
      template<typename _CharT, typename _Traits>
        std::basic_ostream<_CharT, _Traits>&
        operator<<(std::basic_ostream<_CharT, _Traits>& __os,
  		 const _Quoted_string<const _CharT*, _CharT>& __str)
        {
  	std::basic_ostringstream<_CharT, _Traits> __ostr;
  	__ostr << __str._M_delim;
  	for (const _CharT* __c = __str._M_string; *__c; ++__c)
--- 85,99 ----
      /**
       * @brief Inserter for quoted strings.
       *
!      * @headerfile iomanip
       */
      template<typename _CharT, typename _Traits>
        std::basic_ostream<_CharT, _Traits>&
        operator<<(std::basic_ostream<_CharT, _Traits>& __os,
  		 const _Quoted_string<const _CharT*, _CharT>& __str)
        {
+ 	//  _GLIBCXX_RESOLVE_LIB_DEFECTS
+ 	//  DR 2344 quoted()'s interaction with padding is unclear
  	std::basic_ostringstream<_CharT, _Traits> __ostr;
  	__ostr << __str._M_delim;
  	for (const _CharT* __c = __str._M_string; *__c; ++__c)
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 109,122 ****
      /**
       * @brief Inserter for quoted strings.
       *
!      *  _GLIBCXX_RESOLVE_LIB_DEFECTS
!      *  DR 2344 quoted()'s interaction with padding is unclear
       */
      template<typename _CharT, typename _Traits, typename _String>
        std::basic_ostream<_CharT, _Traits>&
        operator<<(std::basic_ostream<_CharT, _Traits>& __os,
  		 const _Quoted_string<_String, _CharT>& __str)
        {
  	std::basic_ostringstream<_CharT, _Traits> __ostr;
  	__ostr << __str._M_delim;
  	for (auto __c : __str._M_string)
--- 110,124 ----
      /**
       * @brief Inserter for quoted strings.
       *
!      * @headerfile iomanip
       */
      template<typename _CharT, typename _Traits, typename _String>
        std::basic_ostream<_CharT, _Traits>&
        operator<<(std::basic_ostream<_CharT, _Traits>& __os,
  		 const _Quoted_string<_String, _CharT>& __str)
        {
+ 	//  _GLIBCXX_RESOLVE_LIB_DEFECTS
+ 	//  DR 2344 quoted()'s interaction with padding is unclear
  	std::basic_ostringstream<_CharT, _Traits> __ostr;
  	__ostr << __str._M_delim;
  	for (auto __c : __str._M_string)
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 133,138 ****
--- 135,142 ----
      /**
       * @brief Extractor for delimited strings.
       *        The left and right delimiters can be different.
+      *
+      * @headerfile iomanip
       */
      template<typename _CharT, typename _Traits, typename _Alloc>
        std::basic_istream<_CharT, _Traits>&
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/random.tcc gcc-12.4.0/libstdc++-v3/include/bits/random.tcc
*** gcc-12.3.0/libstdc++-v3/include/bits/random.tcc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/random.tcc	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 541,548 ****
      subtract_with_carry_engine<_UIntType, __w, __s, __r>::
      seed(result_type __value)
      {
        std::linear_congruential_engine<uint_least32_t, 40014u, 0u, 2147483563u>
! 	__lcg(__value == 0u ? default_seed : __value);
  
        const size_t __n = (__w + 31) / 32;
  
--- 541,551 ----
      subtract_with_carry_engine<_UIntType, __w, __s, __r>::
      seed(result_type __value)
      {
+       // _GLIBCXX_RESOLVE_LIB_DEFECTS
+       // 3809. Is std::subtract_with_carry_engine<uint16_t> supposed to work?
+       // 4014. LWG 3809 changes behavior of some existing code
        std::linear_congruential_engine<uint_least32_t, 40014u, 0u, 2147483563u>
! 	__lcg(__value == 0u ? default_seed : __value % 2147483563u);
  
        const size_t __n = (__w + 31) / 32;
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1500,1506 ****
  	  // sqrt(pi / 2)
  	  const double __spi_2 = 1.2533141373155002512078826424055226L;
  	  _M_s1 = std::sqrt(__np * __1p) * (1 + _M_d1 / (4 * __np));
! 	  _M_s2 = std::sqrt(__np * __1p) * (1 + _M_d2 / (4 * _M_t * __1p));
  	  _M_c = 2 * _M_d1 / __np;
  	  _M_a1 = std::exp(_M_c) * _M_s1 * __spi_2;
  	  const double __a12 = _M_a1 + _M_s2 * __spi_2;
--- 1503,1509 ----
  	  // sqrt(pi / 2)
  	  const double __spi_2 = 1.2533141373155002512078826424055226L;
  	  _M_s1 = std::sqrt(__np * __1p) * (1 + _M_d1 / (4 * __np));
! 	  _M_s2 = std::sqrt(__np * __1p) * (1 + _M_d2 / (4 * (_M_t * __1p)));
  	  _M_c = 2 * _M_d1 / __np;
  	  _M_a1 = std::exp(_M_c) * _M_s1 * __spi_2;
  	  const double __a12 = _M_a1 + _M_s2 * __spi_2;
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/regex.h gcc-12.4.0/libstdc++-v3/include/bits/regex.h
*** gcc-12.3.0/libstdc++-v3/include/bits/regex.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/regex.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 88,93 ****
--- 88,96 ----
     * The class %regex is parameterized around a set of related types and
     * functions used to complete the definition of its semantics.  This class
     * satisfies the requirements of such a traits class.
+    *
+    * @headerfile regex
+    * @since C++11
     */
    template<typename _Ch_type>
      class regex_traits
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 392,402 ****
  
    // [7.8] Class basic_regex
    /**
!    * Objects of specializations of this class represent regular expressions
!    * constructed from sequences of character type @p _Ch_type.
     *
!    * Storage for the regular expression is allocated and deallocated as
!    * necessary by the member functions of this class.
     */
    template<typename _Ch_type, typename _Rx_traits = regex_traits<_Ch_type>>
      class basic_regex
--- 395,418 ----
  
    // [7.8] Class basic_regex
    /**
!    * @brief A regular expression
     *
!    * Specializations of this class template represent regular expressions
!    * constructed from sequences of character type `_Ch_type`.
!    * Use the `std::regex` typedef for `std::basic_regex<char>`.
!    *
!    * A character sequence passed to the constructor will be parsed according
!    * to the chosen grammar, and used to create a state machine representing
!    * the regular expression. The regex object can then be passed to algorithms
!    * such as `std::regex_match` to match sequences of characters.
!    *
!    * The `syntax_option_type` flag passed to the constructor selects from
!    * one of the supported regular expression grammars. The default is
!    * `ECMAScript` and the others are `basic`, `extended`, `awk`, `grep`, and
!    * `egrep`, which are variations on POSIX regular expressions.
!    *
!    * @headerfile regex
!    * @since C++11
     */
    template<typename _Ch_type, typename _Rx_traits = regex_traits<_Ch_type>>
      class basic_regex
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 889,902 ****
     * An object of this class is essentially a pair of iterators marking a
     * matched subexpression within a regular expression pattern match. Such
     * objects can be converted to and compared with std::basic_string objects
!    * of a similar base character type as the pattern matched by the regular
     * expression.
     *
     * The iterators that make up the pair are the usual half-open interval
     * referencing the actual original pattern matched.
     */
    template<typename _BiIter>
!     class sub_match : public std::pair<_BiIter, _BiIter>
      {
        typedef iterator_traits<_BiIter>			__iter_traits;
  	
--- 905,926 ----
     * An object of this class is essentially a pair of iterators marking a
     * matched subexpression within a regular expression pattern match. Such
     * objects can be converted to and compared with std::basic_string objects
!    * of the same character type as the pattern matched by the regular
     * expression.
     *
+    * A `sub_match<Iter>` has a public base class of type `pair<Iter, Iter>`,
+    * so inherits pair's data members named `first` and `second`.
     * The iterators that make up the pair are the usual half-open interval
     * referencing the actual original pattern matched.
+    *
+    * @headerfile regex
+    * @since C++11
     */
    template<typename _BiIter>
!     class sub_match
!     /// @cond undocumented
!     : public std::pair<_BiIter, _BiIter>
!     /// @endcond
      {
        typedef iterator_traits<_BiIter>			__iter_traits;
  	
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 906,911 ****
--- 930,937 ----
        typedef _BiIter					iterator;
        typedef basic_string<value_type>			string_type;
  
+       _GLIBCXX_DOXYGEN_ONLY(iterator first; iterator second;)
+ 
        bool matched;
  
        constexpr sub_match() noexcept : matched() { }
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 1713,1718 ****
--- 1739,1747 ----
     * of characters [first, second) which formed that match. Otherwise matched
     * is false, and members first and second point to the end of the sequence
     * that was searched.
+    *
+    * @headerfile regex
+    * @since C++11
     */
    template<typename _Bi_iter,
  	   typename _Alloc = allocator<sub_match<_Bi_iter> > >
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 1807,1812 ****
--- 1836,1851 ----
         */
        ~match_results() = default;
  
+       // _GLIBCXX_RESOLVE_LIB_DEFECTS
+       // 2195. Missing constructors for match_results
+ 
+       match_results(const match_results& __m, const _Alloc& __a)
+       : _Base_type(__m, __a) { }
+ 
+       match_results(match_results&& __m, const _Alloc& __a)
+       noexcept(noexcept(_Base_type(std::move(__m), __a)))
+       : _Base_type(std::move(__m), __a) { }
+ 
        ///@}
  
        // 28.10.2, state:
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 2139,2144 ****
--- 2178,2185 ----
     * @brief Compares two match_results for equality.
     * @returns true if the two objects refer to the same match,
     *          false otherwise.
+    *
+    * @relates match_results
     */
    template<typename _Bi_iter, typename _Alloc>
      inline bool
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 2164,2169 ****
--- 2205,2212 ----
     * @brief Compares two match_results for inequality.
     * @returns true if the two objects do not refer to the same match,
     *          false otherwise.
+    *
+    * @relates match_results
     */
    template<typename _Bi_iter, class _Alloc>
      inline bool
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 2179,2184 ****
--- 2222,2229 ----
     * @param __rhs A match result.
     *
     * The contents of the two match_results objects are swapped.
+    *
+    * @relates match_results
     */
    template<typename _Bi_iter, typename _Alloc>
      inline void
*************** _GLIBCXX_END_NAMESPACE_CXX11
*** 2191,2198 ****
    // [28.11.2] Function template regex_match
    /**
     * @name Matching, Searching, and Replacing
     */
-   ///@{
  
    /**
     * @brief Determines if there is a match between the regular expression @p e
--- 2236,2244 ----
    // [28.11.2] Function template regex_match
    /**
     * @name Matching, Searching, and Replacing
+    *
+    * @{
     */
  
    /**
     * @brief Determines if there is a match between the regular expression @p e
*************** _GLIBCXX_END_NAMESPACE_CXX11
*** 2500,2505 ****
--- 2546,2552 ----
  
    // std [28.11.4] Function template regex_replace
  
+   /// @cond undocumented
    template<typename _Out_iter, typename _Bi_iter,
  	   typename _Rx_traits, typename _Ch_type>
      _Out_iter
*************** _GLIBCXX_END_NAMESPACE_CXX11
*** 2507,2512 ****
--- 2554,2560 ----
  		    const basic_regex<_Ch_type, _Rx_traits>& __e,
  		    const _Ch_type* __fmt, size_t __len,
  		    regex_constants::match_flag_type __flags);
+   /// @endcond
  
    /**
     * @brief Search for a regular expression within a range for multiple times,
*************** _GLIBCXX_END_NAMESPACE_CXX11
*** 2668,2674 ****
        return __result;
      }
  
!   ///@}
  
  _GLIBCXX_BEGIN_NAMESPACE_CXX11
  
--- 2716,2722 ----
        return __result;
      }
  
!   /// @}
  
  _GLIBCXX_BEGIN_NAMESPACE_CXX11
  
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 2676,2681 ****
--- 2724,2732 ----
    /**
     * An iterator adaptor that will provide repeated calls of regex_search over
     * a range until no more matches remain.
+    *
+    * @headerfile regex
+    * @since C++11
     */
    template<typename _Bi_iter,
  	   typename _Ch_type = typename iterator_traits<_Bi_iter>::value_type,
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 2802,2807 ****
--- 2853,2861 ----
     * The purpose of this iterator is to enumerate all, or all specified,
     * matches of a regular expression within a text range.  The dereferenced
     * value of an iterator of this class is a std::sub_match object.
+    *
+    * @headerfile regex
+    * @since C++11
     */
    template<typename _Bi_iter,
  	   typename _Ch_type = typename iterator_traits<_Bi_iter>::value_type,
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/regex_automaton.h gcc-12.4.0/libstdc++-v3/include/bits/regex_automaton.h
*** gcc-12.3.0/libstdc++-v3/include/bits/regex_automaton.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/regex_automaton.h	Thu Jun 20 08:08:10 2024
*************** namespace __detail
*** 110,116 ****
  
  #ifdef _GLIBCXX_DEBUG
      std::ostream&
!     _M_print(std::ostream& ostr) const;
  
      // Prints graphviz dot commands for state.
      std::ostream&
--- 110,116 ----
  
  #ifdef _GLIBCXX_DEBUG
      std::ostream&
!     _M_print(std::ostream& __ostr) const;
  
      // Prints graphviz dot commands for state.
      std::ostream&
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/regex_automaton.tcc gcc-12.4.0/libstdc++-v3/include/bits/regex_automaton.tcc
*** gcc-12.3.0/libstdc++-v3/include/bits/regex_automaton.tcc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/regex_automaton.tcc	Thu Jun 20 08:08:10 2024
*************** namespace __detail
*** 36,69 ****
  {
  #ifdef _GLIBCXX_DEBUG
    inline std::ostream&
!   _State_base::_M_print(std::ostream& ostr) const
    {
      switch (_M_opcode)
      {
        case _S_opcode_alternative:
        case _S_opcode_repeat:
! 	ostr << "alt next=" << _M_next << " alt=" << _M_alt;
  	break;
        case _S_opcode_subexpr_begin:
! 	ostr << "subexpr begin next=" << _M_next << " index=" << _M_subexpr;
  	break;
        case _S_opcode_subexpr_end:
! 	ostr << "subexpr end next=" << _M_next << " index=" << _M_subexpr;
  	break;
        case _S_opcode_backref:
! 	ostr << "backref next=" << _M_next << " index=" << _M_backref_index;
  	break;
        case _S_opcode_match:
! 	ostr << "match next=" << _M_next;
  	break;
        case _S_opcode_accept:
! 	ostr << "accept next=" << _M_next;
  	break;
        default:
! 	ostr << "unknown next=" << _M_next;
  	break;
      }
!     return ostr;
    }
  
    // Prints graphviz dot commands for state.
--- 36,69 ----
  {
  #ifdef _GLIBCXX_DEBUG
    inline std::ostream&
!   _State_base::_M_print(std::ostream& __ostr) const
    {
      switch (_M_opcode)
      {
        case _S_opcode_alternative:
        case _S_opcode_repeat:
! 	__ostr << "alt next=" << _M_next << " alt=" << _M_alt;
  	break;
        case _S_opcode_subexpr_begin:
! 	__ostr << "subexpr begin next=" << _M_next << " index=" << _M_subexpr;
  	break;
        case _S_opcode_subexpr_end:
! 	__ostr << "subexpr end next=" << _M_next << " index=" << _M_subexpr;
  	break;
        case _S_opcode_backref:
! 	__ostr << "backref next=" << _M_next << " index=" << _M_backref_index;
  	break;
        case _S_opcode_match:
! 	__ostr << "match next=" << _M_next;
  	break;
        case _S_opcode_accept:
! 	__ostr << "accept next=" << _M_next;
  	break;
        default:
! 	__ostr << "unknown next=" << _M_next;
  	break;
      }
!     return __ostr;
    }
  
    // Prints graphviz dot commands for state.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/regex_constants.h gcc-12.4.0/libstdc++-v3/include/bits/regex_constants.h
*** gcc-12.3.0/libstdc++-v3/include/bits/regex_constants.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/regex_constants.h	Thu Jun 20 08:08:10 2024
***************
*** 1,4 ****
! // class template regex -*- C++ -*-
  
  // Copyright (C) 2010-2022 Free Software Foundation, Inc.
  //
--- 1,4 ----
! // Namespace std::regex_constants -*- C++ -*-
  
  // Copyright (C) 2010-2022 Free Software Foundation, Inc.
  //
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 38,43 ****
--- 38,46 ----
   * @defgroup regex Regular Expressions
   *
   * A facility for performing regular expression pattern matching.
+  *
+  * @since C++11
+  *
   * @{
   */
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/regex_error.h gcc-12.4.0/libstdc++-v3/include/bits/regex_error.h
*** gcc-12.3.0/libstdc++-v3/include/bits/regex_error.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/regex_error.h	Thu Jun 20 08:08:10 2024
***************
*** 1,4 ****
! // class template regex -*- C++ -*-
  
  // Copyright (C) 2010-2022 Free Software Foundation, Inc.
  //
--- 1,4 ----
! // Errors for std::regex -*- C++ -*-
  
  // Copyright (C) 2010-2022 Free Software Foundation, Inc.
  //
*************** namespace regex_constants
*** 130,135 ****
--- 130,138 ----
     * @ingroup exceptions
     *
     * The regular expression library throws objects of this class on error.
+    *
+    * @headerfile regex
+    * @since C++11
     */
    class regex_error : public std::runtime_error
    {
*************** namespace regex_constants
*** 158,163 ****
--- 161,167 ----
      { return _M_code; }
  
    private:
+     /// @cond undocumented
      regex_error(error_type __ecode, const char* __what)
      : std::runtime_error(__what), _M_code(__ecode)
      { }
*************** namespace regex_constants
*** 167,172 ****
--- 171,177 ----
      __throw_regex_error(error_type __ecode __attribute__((__unused__)),
  			const char* __what __attribute__((__unused__)))
      { _GLIBCXX_THROW_OR_ABORT(regex_error(__ecode, __what)); }
+     /// @endcond
    };
  
    /// @cond undocumented
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/regex_executor.h gcc-12.4.0/libstdc++-v3/include/bits/regex_executor.h
*** gcc-12.3.0/libstdc++-v3/include/bits/regex_executor.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/regex_executor.h	Thu Jun 20 08:08:10 2024
*************** namespace __detail
*** 71,84 ****
  		_ResultsVec&    __results,
  		const _RegexT&  __re,
  		_FlagT          __flags)
!       : _M_begin(__begin),
!       _M_end(__end),
!       _M_re(__re),
!       _M_nfa(*__re._M_automaton),
!       _M_results(__results),
!       _M_rep_count(_M_nfa.size()),
!       _M_states(_M_nfa._M_start(), _M_nfa.size()),
!       _M_flags(__flags)
        {
  	using namespace regex_constants;
  	if (__flags & match_prev_avail) // ignore not_bol and not_bow
--- 71,85 ----
  		_ResultsVec&    __results,
  		const _RegexT&  __re,
  		_FlagT          __flags)
!       : _M_cur_results(__results.get_allocator()),
! 	_M_begin(__begin),
! 	_M_end(__end),
! 	_M_re(__re),
! 	_M_nfa(*__re._M_automaton),
! 	_M_results(__results),
! 	_M_rep_count(_M_nfa.size()),
! 	_M_states(_M_nfa._M_start(), _M_nfa.size()),
! 	_M_flags(__flags)
        {
  	using namespace regex_constants;
  	if (__flags & match_prev_avail) // ignore not_bol and not_bow
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/regex_executor.tcc gcc-12.4.0/libstdc++-v3/include/bits/regex_executor.tcc
*** gcc-12.3.0/libstdc++-v3/include/bits/regex_executor.tcc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/regex_executor.tcc	Thu Jun 20 08:08:10 2024
*************** namespace __detail
*** 124,132 ****
  	    break;
  	  std::fill_n(_M_states._M_visited_states, _M_nfa.size(), false);
  	  auto __old_queue = std::move(_M_states._M_match_queue);
  	  for (auto& __task : __old_queue)
  	    {
! 	      _M_cur_results = std::move(__task.second);
  	      _M_dfs(__match_mode, __task.first);
  	    }
  	  if (__match_mode == _Match_mode::_Prefix)
--- 124,133 ----
  	    break;
  	  std::fill_n(_M_states._M_visited_states, _M_nfa.size(), false);
  	  auto __old_queue = std::move(_M_states._M_match_queue);
+ 	  auto __alloc = _M_cur_results.get_allocator();
  	  for (auto& __task : __old_queue)
  	    {
! 	      _M_cur_results = _ResultsVec(std::move(__task.second), __alloc);
  	      _M_dfs(__match_mode, __task.first);
  	    }
  	  if (__match_mode == _Match_mode::_Prefix)
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/regex_scanner.tcc gcc-12.4.0/libstdc++-v3/include/bits/regex_scanner.tcc
*** gcc-12.3.0/libstdc++-v3/include/bits/regex_scanner.tcc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/regex_scanner.tcc	Thu Jun 20 08:08:10 2024
*************** namespace __detail
*** 484,581 ****
    template<typename _CharT>
      std::ostream&
      _Scanner<_CharT>::
!     _M_print(std::ostream& ostr)
      {
        switch (_M_token)
        {
        case _S_token_anychar:
! 	ostr << "any-character\n";
  	break;
        case _S_token_backref:
! 	ostr << "backref\n";
  	break;
        case _S_token_bracket_begin:
! 	ostr << "bracket-begin\n";
  	break;
        case _S_token_bracket_neg_begin:
! 	ostr << "bracket-neg-begin\n";
  	break;
        case _S_token_bracket_end:
! 	ostr << "bracket-end\n";
  	break;
        case _S_token_char_class_name:
! 	ostr << "char-class-name \"" << _M_value << "\"\n";
  	break;
        case _S_token_closure0:
! 	ostr << "closure0\n";
  	break;
        case _S_token_closure1:
! 	ostr << "closure1\n";
  	break;
        case _S_token_collsymbol:
! 	ostr << "collsymbol \"" << _M_value << "\"\n";
  	break;
        case _S_token_comma:
! 	ostr << "comma\n";
  	break;
        case _S_token_dup_count:
! 	ostr << "dup count: " << _M_value << "\n";
  	break;
        case _S_token_eof:
! 	ostr << "EOF\n";
  	break;
        case _S_token_equiv_class_name:
! 	ostr << "equiv-class-name \"" << _M_value << "\"\n";
  	break;
        case _S_token_interval_begin:
! 	ostr << "interval begin\n";
  	break;
        case _S_token_interval_end:
! 	ostr << "interval end\n";
  	break;
        case _S_token_line_begin:
! 	ostr << "line begin\n";
  	break;
        case _S_token_line_end:
! 	ostr << "line end\n";
  	break;
        case _S_token_opt:
! 	ostr << "opt\n";
  	break;
        case _S_token_or:
! 	ostr << "or\n";
  	break;
        case _S_token_ord_char:
! 	ostr << "ordinary character: \"" << _M_value << "\"\n";
  	break;
        case _S_token_subexpr_begin:
! 	ostr << "subexpr begin\n";
  	break;
        case _S_token_subexpr_no_group_begin:
! 	ostr << "no grouping subexpr begin\n";
  	break;
        case _S_token_subexpr_lookahead_begin:
! 	ostr << "lookahead subexpr begin\n";
  	break;
        case _S_token_subexpr_end:
! 	ostr << "subexpr end\n";
  	break;
        case _S_token_unknown:
! 	ostr << "-- unknown token --\n";
  	break;
        case _S_token_oct_num:
! 	ostr << "oct number " << _M_value << "\n";
  	break;
        case _S_token_hex_num:
! 	ostr << "hex number " << _M_value << "\n";
  	break;
        case _S_token_quoted_class:
! 	ostr << "quoted class " << "\\" << _M_value << "\n";
  	break;
        default:
  	_GLIBCXX_DEBUG_ASSERT(false);
        }
!       return ostr;
      }
  #endif
  
--- 484,581 ----
    template<typename _CharT>
      std::ostream&
      _Scanner<_CharT>::
!     _M_print(std::ostream& __ostr)
      {
        switch (_M_token)
        {
        case _S_token_anychar:
! 	__ostr << "any-character\n";
  	break;
        case _S_token_backref:
! 	__ostr << "backref\n";
  	break;
        case _S_token_bracket_begin:
! 	__ostr << "bracket-begin\n";
  	break;
        case _S_token_bracket_neg_begin:
! 	__ostr << "bracket-neg-begin\n";
  	break;
        case _S_token_bracket_end:
! 	__ostr << "bracket-end\n";
  	break;
        case _S_token_char_class_name:
! 	__ostr << "char-class-name \"" << _M_value << "\"\n";
  	break;
        case _S_token_closure0:
! 	__ostr << "closure0\n";
  	break;
        case _S_token_closure1:
! 	__ostr << "closure1\n";
  	break;
        case _S_token_collsymbol:
! 	__ostr << "collsymbol \"" << _M_value << "\"\n";
  	break;
        case _S_token_comma:
! 	__ostr << "comma\n";
  	break;
        case _S_token_dup_count:
! 	__ostr << "dup count: " << _M_value << "\n";
  	break;
        case _S_token_eof:
! 	__ostr << "EOF\n";
  	break;
        case _S_token_equiv_class_name:
! 	__ostr << "equiv-class-name \"" << _M_value << "\"\n";
  	break;
        case _S_token_interval_begin:
! 	__ostr << "interval begin\n";
  	break;
        case _S_token_interval_end:
! 	__ostr << "interval end\n";
  	break;
        case _S_token_line_begin:
! 	__ostr << "line begin\n";
  	break;
        case _S_token_line_end:
! 	__ostr << "line end\n";
  	break;
        case _S_token_opt:
! 	__ostr << "opt\n";
  	break;
        case _S_token_or:
! 	__ostr << "or\n";
  	break;
        case _S_token_ord_char:
! 	__ostr << "ordinary character: \"" << _M_value << "\"\n";
  	break;
        case _S_token_subexpr_begin:
! 	__ostr << "subexpr begin\n";
  	break;
        case _S_token_subexpr_no_group_begin:
! 	__ostr << "no grouping subexpr begin\n";
  	break;
        case _S_token_subexpr_lookahead_begin:
! 	__ostr << "lookahead subexpr begin\n";
  	break;
        case _S_token_subexpr_end:
! 	__ostr << "subexpr end\n";
  	break;
        case _S_token_unknown:
! 	__ostr << "-- unknown token --\n";
  	break;
        case _S_token_oct_num:
! 	__ostr << "oct number " << _M_value << "\n";
  	break;
        case _S_token_hex_num:
! 	__ostr << "hex number " << _M_value << "\n";
  	break;
        case _S_token_quoted_class:
! 	__ostr << "quoted class " << "\\" << _M_value << "\n";
  	break;
        default:
  	_GLIBCXX_DEBUG_ASSERT(false);
        }
!       return __ostr;
      }
  #endif
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/shared_ptr_atomic.h gcc-12.4.0/libstdc++-v3/include/bits/shared_ptr_atomic.h
*** gcc-12.3.0/libstdc++-v3/include/bits/shared_ptr_atomic.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/shared_ptr_atomic.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 64,72 ****
  
    /**
     * @addtogroup pointer_abstractions
     * @{
     */
-   /// @relates shared_ptr @{
  
    /// @cond undocumented
  
--- 64,72 ----
  
    /**
     * @addtogroup pointer_abstractions
+    * @relates shared_ptr
     * @{
     */
  
    /// @cond undocumented
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 120,127 ****
     *  @param  __p A non-null pointer to a shared_ptr object.
     *  @return @c *__p
     *
!    *  The memory order shall not be @c memory_order_release or
!    *  @c memory_order_acq_rel.
     *  @{
    */
    template<typename _Tp>
--- 120,127 ----
     *  @param  __p A non-null pointer to a shared_ptr object.
     *  @return @c *__p
     *
!    *  The memory order shall not be `memory_order_release` or
!    *  `memory_order_acq_rel`.
     *  @{
    */
    template<typename _Tp>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 156,163 ****
     *  @param  __p A non-null pointer to a shared_ptr object.
     *  @param  __r The value to store.
     *
!    *  The memory order shall not be @c memory_order_acquire or
!    *  @c memory_order_acq_rel.
     *  @{
    */
    template<typename _Tp>
--- 156,163 ----
     *  @param  __p A non-null pointer to a shared_ptr object.
     *  @param  __r The value to store.
     *
!    *  The memory order shall not be `memory_order_acquire` or
!    *  `memory_order_acq_rel`.
     *  @{
    */
    template<typename _Tp>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 193,200 ****
    /**
     *  @brief  Atomic exchange for shared_ptr objects.
     *  @param  __p A non-null pointer to a shared_ptr object.
!    *  @param  __r New value to store in @c *__p.
!    *  @return The original value of @c *__p
     *  @{
    */
    template<typename _Tp>
--- 193,200 ----
    /**
     *  @brief  Atomic exchange for shared_ptr objects.
     *  @param  __p A non-null pointer to a shared_ptr object.
!    *  @param  __r New value to store in `*__p`.
!    *  @return The original value of `*__p`
     *  @{
    */
    template<typename _Tp>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 240,249 ****
     *  @param  __p A non-null pointer to a shared_ptr object.
     *  @param  __v A non-null pointer to a shared_ptr object.
     *  @param  __w A non-null pointer to a shared_ptr object.
!    *  @return True if @c *__p was equivalent to @c *__v, false otherwise.
     *
!    *  The memory order for failure shall not be @c memory_order_release or
!    *  @c memory_order_acq_rel, or stronger than the memory order for success.
     *  @{
    */
    template<typename _Tp>
--- 240,249 ----
     *  @param  __p A non-null pointer to a shared_ptr object.
     *  @param  __v A non-null pointer to a shared_ptr object.
     *  @param  __w A non-null pointer to a shared_ptr object.
!    *  @return True if `*__p` was equivalent to `*__v`, false otherwise.
     *
!    *  The memory order for failure shall not be `memory_order_release` or
!    *  `memory_order_acq_rel`.
     *  @{
    */
    template<typename _Tp>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 353,362 ****
      }
    /// @}
  
  #if __cplusplus >= 202002L
  # define __cpp_lib_atomic_shared_ptr 201711L
    template<typename _Tp>
!     class atomic;
  
    template<typename _Up>
      static constexpr bool __is_shared_ptr = false;
--- 353,370 ----
      }
    /// @}
  
+   /// @} group pointer_abstractions
+ 
  #if __cplusplus >= 202002L
  # define __cpp_lib_atomic_shared_ptr 201711L
    template<typename _Tp>
!     struct atomic;
! 
!   /**
!    * @addtogroup pointer_abstractions
!    * @relates shared_ptr
!    * @{
!    */
  
    template<typename _Up>
      static constexpr bool __is_shared_ptr = false;
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 368,374 ****
      {
        using value_type = _Tp;
  
!       friend class atomic<_Tp>;
  
        // An atomic version of __shared_count<> and __weak_count<>.
        // Stores a _Sp_counted_base<>* but uses the LSB as a lock.
--- 376,382 ----
      {
        using value_type = _Tp;
  
!       friend struct atomic<_Tp>;
  
        // An atomic version of __shared_count<> and __weak_count<>.
        // Stores a _Sp_counted_base<>* but uses the LSB as a lock.
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 602,608 ****
      };
  
    template<typename _Tp>
!     class atomic<shared_ptr<_Tp>>
      {
      public:
        using value_type = shared_ptr<_Tp>;
--- 610,616 ----
      };
  
    template<typename _Tp>
!     struct atomic<shared_ptr<_Tp>>
      {
      public:
        using value_type = shared_ptr<_Tp>;
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 725,731 ****
      };
  
    template<typename _Tp>
!     class atomic<weak_ptr<_Tp>>
      {
      public:
        using value_type = weak_ptr<_Tp>;
--- 733,739 ----
      };
  
    template<typename _Tp>
!     struct atomic<weak_ptr<_Tp>>
      {
      public:
        using value_type = weak_ptr<_Tp>;
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 836,845 ****
      private:
        _Sp_atomic<weak_ptr<_Tp>> _M_impl;
      };
- #endif // C++20
- 
-   /// @} relates shared_ptr
    /// @} group pointer_abstractions
  
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace
--- 844,851 ----
      private:
        _Sp_atomic<weak_ptr<_Tp>> _M_impl;
      };
    /// @} group pointer_abstractions
+ #endif // C++20
  
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/shared_ptr_base.h gcc-12.4.0/libstdc++-v3/include/bits/shared_ptr_base.h
*** gcc-12.3.0/libstdc++-v3/include/bits/shared_ptr_base.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/shared_ptr_base.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1666,1671 ****
--- 1666,1674 ----
        { return _M_ptr; }
  
        /// Return true if the stored pointer is not null.
+ #if __cplusplus >= 202002L
+       [[__gnu__::__always_inline__]]
+ #endif
        explicit operator bool() const noexcept
        { return _M_ptr != nullptr; }
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/std_abs.h gcc-12.4.0/libstdc++-v3/include/bits/std_abs.h
*** gcc-12.3.0/libstdc++-v3/include/bits/std_abs.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/std_abs.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 101,111 ****
    __extension__ inline _GLIBCXX_CONSTEXPR
    __float128
    abs(__float128 __x)
!   { return __x < 0 ? -__x : __x; }
  #endif
  
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace
! } // extern "C"++"
  
  #endif // _GLIBCXX_BITS_STD_ABS_H
--- 101,120 ----
    __extension__ inline _GLIBCXX_CONSTEXPR
    __float128
    abs(__float128 __x)
!   {
! #if defined(_GLIBCXX_LDOUBLE_IS_IEEE_BINARY128)
!     return __builtin_fabsl(__x);
! #elif defined(_GLIBCXX_HAVE_FLOAT128_MATH)
!     return __builtin_fabsf128(__x);
! #else
!     // Assume that __builtin_signbit works for __float128.
!     return __builtin_signbit(__x) ? -__x : __x;
! #endif
!   }
  #endif
  
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace
! } // extern "C++"
  
  #endif // _GLIBCXX_BITS_STD_ABS_H
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/std_mutex.h gcc-12.4.0/libstdc++-v3/include/bits/std_mutex.h
*** gcc-12.3.0/libstdc++-v3/include/bits/std_mutex.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/std_mutex.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 53,58 ****
--- 53,60 ----
     */
  
  #ifdef _GLIBCXX_HAS_GTHREADS
+   /// @cond undocumented
+ 
    // Common base class for std::mutex and std::timed_mutex
    class __mutex_base
    {
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 78,85 ****
      __mutex_base(const __mutex_base&) = delete;
      __mutex_base& operator=(const __mutex_base&) = delete;
    };
  
!   /// The standard mutex type.
    class mutex : private __mutex_base
    {
    public:
--- 80,98 ----
      __mutex_base(const __mutex_base&) = delete;
      __mutex_base& operator=(const __mutex_base&) = delete;
    };
+   /// @endcond
  
!   /** The standard mutex type.
!    *
!    * A simple, non-recursive, non-timed mutex.
!    *
!    * Do not call `lock()` and `unlock()` directly, use a scoped lock type
!    * such as `std::unique_lock`, `std::lock_guard`, or (since C++17)
!    * `std::scoped_lock`.
!    *
!    * @headerfile mutex
!    * @since C++11
!    */
    class mutex : private __mutex_base
    {
    public:
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 123,128 ****
--- 136,143 ----
      { return &_M_mutex; }
    };
  
+   /// @cond undocumented
+ 
    // Implementation details for std::condition_variable
    class __condvar
    {
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 192,197 ****
--- 207,213 ----
      __gthread_cond_t _M_cond;
  #endif
    };
+   /// @endcond
  
  #endif // _GLIBCXX_HAS_GTHREADS
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 218,223 ****
--- 234,242 ----
     *
     * A lock_guard controls mutex ownership within a scope, releasing
     * ownership in the destructor.
+    *
+    * @headerfile mutex
+    * @since C++11
     */
    template<typename _Mutex>
      class lock_guard
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_algo.h gcc-12.4.0/libstdc++-v3/include/bits/stl_algo.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_algo.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_algo.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1190,1197 ****
        return __m;
      }
  
!   inline namespace _V2
!   {
  
    /// This is a helper function for the rotate algorithm.
    template<typename _ForwardIterator>
--- 1190,1196 ----
        return __m;
      }
  
! _GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(_V2)
  
    /// This is a helper function for the rotate algorithm.
    template<typename _ForwardIterator>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1398,1404 ****
  			   std::__iterator_category(__first));
      }
  
!   } // namespace _V2
  
    /**
     *  @brief Copy a sequence, rotating its elements.
--- 1397,1403 ----
  			   std::__iterator_category(__first));
      }
  
! _GLIBCXX_END_INLINE_ABI_NAMESPACE(_V2)
  
    /**
     *  @brief Copy a sequence, rotating its elements.
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1618,1623 ****
--- 1617,1624 ----
  				     __gnu_cxx::__ops::__pred_iter(__pred));
      }
  
+   /// @cond undocumented
+ 
    /// This is a helper function for the sort routines.
    template<typename _RandomAccessIterator, typename _Compare>
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1672,1677 ****
--- 1673,1680 ----
        return __result_real_last;
      }
  
+   /// @endcond
+ 
    /**
     *  @brief Copy the smallest elements of a sequence.
     *  @ingroup sorting_algorithms
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1681,1694 ****
     *  @param  __result_last    Another random-access iterator.
     *  @return   An iterator indicating the end of the resulting sequence.
     *
!    *  Copies and sorts the smallest N values from the range @p [__first,__last)
!    *  to the range beginning at @p __result_first, where the number of
!    *  elements to be copied, @p N, is the smaller of @p (__last-__first) and
!    *  @p (__result_last-__result_first).
!    *  After the sort if @e i and @e j are iterators in the range
!    *  @p [__result_first,__result_first+N) such that i precedes j then
!    *  *j<*i is false.
!    *  The value returned is @p __result_first+N.
    */
    template<typename _InputIterator, typename _RandomAccessIterator>
      _GLIBCXX20_CONSTEXPR
--- 1684,1697 ----
     *  @param  __result_last    Another random-access iterator.
     *  @return   An iterator indicating the end of the resulting sequence.
     *
!    *  Copies and sorts the smallest `N` values from the range
!    *  `[__first, __last)` to the range beginning at `__result_first`, where
!    *  the number of elements to be copied, `N`, is the smaller of
!    *  `(__last - __first)` and `(__result_last - __result_first)`.
!    *  After the sort if `i` and `j` are iterators in the range
!    *  `[__result_first,__result_first + N)` such that `i` precedes `j` then
!    *  `*j < *i` is false.
!    *  The value returned is `__result_first + N`.
    */
    template<typename _InputIterator, typename _RandomAccessIterator>
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1731,1744 ****
     *  @param  __comp    A comparison functor.
     *  @return   An iterator indicating the end of the resulting sequence.
     *
!    *  Copies and sorts the smallest N values from the range @p [__first,__last)
!    *  to the range beginning at @p result_first, where the number of
!    *  elements to be copied, @p N, is the smaller of @p (__last-__first) and
!    *  @p (__result_last-__result_first).
!    *  After the sort if @e i and @e j are iterators in the range
!    *  @p [__result_first,__result_first+N) such that i precedes j then
!    *  @p __comp(*j,*i) is false.
!    *  The value returned is @p __result_first+N.
    */
    template<typename _InputIterator, typename _RandomAccessIterator,
  	   typename _Compare>
--- 1734,1747 ----
     *  @param  __comp    A comparison functor.
     *  @return   An iterator indicating the end of the resulting sequence.
     *
!    *  Copies and sorts the smallest `N` values from the range
!    *  `[__first, __last)` to the range beginning at `result_first`, where
!    *  the number of elements to be copied, `N`, is the smaller of
!    *  `(__last - __first)` and `(__result_last - __result_first)`.
!    *  After the sort if `i` and `j` are iterators in the range
!    *  `[__result_first, __result_first + N)` such that `i` precedes `j` then
!    *  `__comp(*j, *i)` is false.
!    *  The value returned is `__result_first + N`.
    */
    template<typename _InputIterator, typename _RandomAccessIterator,
  	   typename _Compare>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1775,1780 ****
--- 1778,1785 ----
  				__gnu_cxx::__ops::__iter_comp_iter(__comp));
      }
  
+   /// @cond undocumented
+ 
    /// This is a helper function for the sort routine.
    template<typename _RandomAccessIterator, typename _Compare>
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1968,1988 ****
        std::__insertion_sort(__first, __last, __comp);
      }
  
    // nth_element
  
    // lower_bound moved to stl_algobase.h
  
    /**
!    *  @brief Finds the first position in which @p __val could be inserted
     *         without changing the ordering.
     *  @ingroup binary_search_algorithms
!    *  @param  __first   An iterator.
!    *  @param  __last    Another iterator.
     *  @param  __val     The search term.
     *  @param  __comp    A functor to use for comparisons.
!    *  @return An iterator pointing to the first element <em>not less
!    *           than</em> @p __val, or end() if every element is less
!    *           than @p __val.
     *  @ingroup binary_search_algorithms
     *
     *  The comparison function should have the same effects on ordering as
--- 1973,1994 ----
        std::__insertion_sort(__first, __last, __comp);
      }
  
+   /// @endcond
+ 
    // nth_element
  
    // lower_bound moved to stl_algobase.h
  
    /**
!    *  @brief Finds the first position in which `__val` could be inserted
     *         without changing the ordering.
     *  @ingroup binary_search_algorithms
!    *  @param  __first   An iterator to the start of a sorted range.
!    *  @param  __last    A past-the-end iterator for the sorted range.
     *  @param  __val     The search term.
     *  @param  __comp    A functor to use for comparisons.
!    *  @return An iterator pointing to the first element _not less than_
!    *           `__val`, or `end()` if every element is less than `__val`.
     *  @ingroup binary_search_algorithms
     *
     *  The comparison function should have the same effects on ordering as
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4314,4321 ****
     *  @param  __new_value  The replacement value.
     *  @return   replace() returns no value.
     *
!    *  For each iterator @c i in the range @p [__first,__last) if @c *i ==
!    *  @p __old_value then the assignment @c *i = @p __new_value is performed.
    */
    template<typename _ForwardIterator, typename _Tp>
      _GLIBCXX20_CONSTEXPR
--- 4320,4327 ----
     *  @param  __new_value  The replacement value.
     *  @return   replace() returns no value.
     *
!    *  For each iterator `i` in the range `[__first,__last)` if
!    *  `*i == __old_value` then the assignment `*i = __new_value` is performed.
    */
    template<typename _ForwardIterator, typename _Tp>
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4347,4354 ****
     *  @param  __new_value  The replacement value.
     *  @return   replace_if() returns no value.
     *
!    *  For each iterator @c i in the range @p [__first,__last) if @p __pred(*i)
!    *  is true then the assignment @c *i = @p __new_value is performed.
    */
    template<typename _ForwardIterator, typename _Predicate, typename _Tp>
      _GLIBCXX20_CONSTEXPR
--- 4353,4360 ----
     *  @param  __new_value  The replacement value.
     *  @return   replace_if() returns no value.
     *
!    *  For each iterator `i` in the range `[__first,__last)` if `__pred(*i)`
!    *  is true then the assignment `*i = __new_value` is performed.
    */
    template<typename _ForwardIterator, typename _Predicate, typename _Tp>
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4376,4387 ****
     *  @ingroup mutating_algorithms
     *  @param  __first  A forward iterator.
     *  @param  __last   A forward iterator.
!    *  @param  __gen    A function object taking no arguments and returning
!    *                 std::iterator_traits<_ForwardIterator>::value_type
     *  @return   generate() returns no value.
     *
!    *  Performs the assignment @c *i = @p __gen() for each @c i in the range
!    *  @p [__first,__last).
    */
    template<typename _ForwardIterator, typename _Generator>
      _GLIBCXX20_CONSTEXPR
--- 4382,4392 ----
     *  @ingroup mutating_algorithms
     *  @param  __first  A forward iterator.
     *  @param  __last   A forward iterator.
!    *  @param  __gen    A function object callable with no arguments.
     *  @return   generate() returns no value.
     *
!    *  Performs the assignment `*i = __gen()` for each `i` in the range
!    *  `[__first, __last)`.
    */
    template<typename _ForwardIterator, typename _Generator>
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4405,4418 ****
     *  @ingroup mutating_algorithms
     *  @param  __first  A forward iterator.
     *  @param  __n      The length of the sequence.
!    *  @param  __gen    A function object taking no arguments and returning
!    *                 std::iterator_traits<_ForwardIterator>::value_type
!    *  @return   The end of the sequence, @p __first+__n
     *
!    *  Performs the assignment @c *i = @p __gen() for each @c i in the range
!    *  @p [__first,__first+__n).
     *
!    * If @p __n is negative, the function does nothing and returns @p __first.
    */
    // _GLIBCXX_RESOLVE_LIB_DEFECTS
    // DR 865. More algorithms that throw away information
--- 4410,4422 ----
     *  @ingroup mutating_algorithms
     *  @param  __first  A forward iterator.
     *  @param  __n      The length of the sequence.
!    *  @param  __gen    A function object callable with no arguments.
!    *  @return   The end of the sequence, i.e., `__first + __n`
     *
!    *  Performs the assignment `*i = __gen()` for each `i` in the range
!    *  `[__first, __first + __n)`.
     *
!    * If `__n` is negative, the function does nothing and returns `__first`.
    */
    // _GLIBCXX_RESOLVE_LIB_DEFECTS
    // DR 865. More algorithms that throw away information
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4442,4460 ****
     *  @param  __result  An output iterator.
     *  @return   An iterator designating the end of the resulting sequence.
     *
!    *  Copies each element in the range @p [__first,__last) to the range
!    *  beginning at @p __result, except that only the first element is copied
     *  from groups of consecutive elements that compare equal.
!    *  unique_copy() is stable, so the relative order of elements that are
     *  copied is unchanged.
!    *
!    *  _GLIBCXX_RESOLVE_LIB_DEFECTS
!    *  DR 241. Does unique_copy() require CopyConstructible and Assignable?
!    *  
!    *  _GLIBCXX_RESOLVE_LIB_DEFECTS
!    *  DR 538. 241 again: Does unique_copy() require CopyConstructible and 
!    *  Assignable?
!   */
    template<typename _InputIterator, typename _OutputIterator>
      _GLIBCXX20_CONSTEXPR
      inline _OutputIterator
--- 4446,4461 ----
     *  @param  __result  An output iterator.
     *  @return   An iterator designating the end of the resulting sequence.
     *
!    *  Copies each element in the range `[__first, __last)` to the range
!    *  beginning at `__result`, except that only the first element is copied
     *  from groups of consecutive elements that compare equal.
!    *  `unique_copy()` is stable, so the relative order of elements that are
     *  copied is unchanged.
!    */
!   // _GLIBCXX_RESOLVE_LIB_DEFECTS
!   // DR 241. Does unique_copy() require CopyConstructible and Assignable?
!   // DR 538. 241 again: Does unique_copy() require CopyConstructible and
!   // Assignable?
    template<typename _InputIterator, typename _OutputIterator>
      _GLIBCXX20_CONSTEXPR
      inline _OutputIterator
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4486,4501 ****
     *  @param  __binary_pred  A binary predicate.
     *  @return   An iterator designating the end of the resulting sequence.
     *
!    *  Copies each element in the range @p [__first,__last) to the range
!    *  beginning at @p __result, except that only the first element is copied
!    *  from groups of consecutive elements for which @p __binary_pred returns
     *  true.
!    *  unique_copy() is stable, so the relative order of elements that are
     *  copied is unchanged.
!    *
!    *  _GLIBCXX_RESOLVE_LIB_DEFECTS
!    *  DR 241. Does unique_copy() require CopyConstructible and Assignable?
!   */
    template<typename _InputIterator, typename _OutputIterator,
  	   typename _BinaryPredicate>
      _GLIBCXX20_CONSTEXPR
--- 4487,4501 ----
     *  @param  __binary_pred  A binary predicate.
     *  @return   An iterator designating the end of the resulting sequence.
     *
!    *  Copies each element in the range `[__first, __last)` to the range
!    *  beginning at `__result`, except that only the first element is copied
!    *  from groups of consecutive elements for which `__binary_pred` returns
     *  true.
!    *  `unique_copy()` is stable, so the relative order of elements that are
     *  copied is unchanged.
!    */
!   // _GLIBCXX_RESOLVE_LIB_DEFECTS
!   // DR 241. Does unique_copy() require CopyConstructible and Assignable?
    template<typename _InputIterator, typename _OutputIterator,
  	   typename _BinaryPredicate>
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4527,4538 ****
     *  @param  __last    A forward iterator.
     *  @return  Nothing.
     *
!    *  Reorder the elements in the range @p [__first,__last) using a random
     *  distribution, so that every possible ordering of the sequence is
     *  equally likely.
     *
     *  @deprecated
!    *  Since C++14 `std::random_shuffle` is not part of the C++ standard.
     *  Use `std::shuffle` instead, which was introduced in C++11.
    */
    template<typename _RandomAccessIterator>
--- 4527,4538 ----
     *  @param  __last    A forward iterator.
     *  @return  Nothing.
     *
!    *  Reorder the elements in the range `[__first, __last)` using a random
     *  distribution, so that every possible ordering of the sequence is
     *  equally likely.
     *
     *  @deprecated
!    *  Since C++17, `std::random_shuffle` is not part of the C++ standard.
     *  Use `std::shuffle` instead, which was introduced in C++11.
    */
    template<typename _RandomAccessIterator>
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4566,4578 ****
     *  @param  __rand    The RNG functor or function.
     *  @return  Nothing.
     *
!    *  Reorders the elements in the range @p [__first,__last) using @p __rand to
!    *  provide a random distribution. Calling @p __rand(N) for a positive
!    *  integer @p N should return a randomly chosen integer from the
!    *  range [0,N).
     *
     *  @deprecated
!    *  Since C++14 `std::random_shuffle` is not part of the C++ standard.
     *  Use `std::shuffle` instead, which was introduced in C++11.
    */
    template<typename _RandomAccessIterator, typename _RandomNumberGenerator>
--- 4566,4578 ----
     *  @param  __rand    The RNG functor or function.
     *  @return  Nothing.
     *
!    *  Reorders the elements in the range `[__first, __last)` using `__rand`
!    *  to provide a random distribution. Calling `__rand(N)` for a positive
!    *  integer `N` should return a randomly chosen integer from the
!    *  range `[0, N)`.
     *
     *  @deprecated
!    *  Since C++17, `std::random_shuffle` is not part of the C++ standard.
     *  Use `std::shuffle` instead, which was introduced in C++11.
    */
    template<typename _RandomAccessIterator, typename _RandomNumberGenerator>
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4608,4620 ****
     *  @param  __first   A forward iterator.
     *  @param  __last    A forward iterator.
     *  @param  __pred    A predicate functor.
!    *  @return  An iterator @p middle such that @p __pred(i) is true for each
!    *  iterator @p i in the range @p [__first,middle) and false for each @p i
!    *  in the range @p [middle,__last).
     *
!    *  @p __pred must not modify its operand. @p partition() does not preserve
     *  the relative ordering of elements in each group, use
!    *  @p stable_partition() if this is needed.
    */
    template<typename _ForwardIterator, typename _Predicate>
      _GLIBCXX20_CONSTEXPR
--- 4608,4620 ----
     *  @param  __first   A forward iterator.
     *  @param  __last    A forward iterator.
     *  @param  __pred    A predicate functor.
!    *  @return  An iterator `middle` such that `__pred(i)` is true for each
!    *  iterator `i` in the range `[__first, middle)` and false for each `i`
!    *  in the range `[middle, __last)`.
     *
!    *  `__pred` must not modify its operand. `partition()` does not preserve
     *  the relative ordering of elements in each group, use
!    *  `stable_partition()` if this is needed.
    */
    template<typename _ForwardIterator, typename _Predicate>
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4642,4654 ****
     *  @param  __last    Another iterator.
     *  @return  Nothing.
     *
!    *  Sorts the smallest @p (__middle-__first) elements in the range
!    *  @p [first,last) and moves them to the range @p [__first,__middle). The
!    *  order of the remaining elements in the range @p [__middle,__last) is
!    *  undefined.
!    *  After the sort if @e i and @e j are iterators in the range
!    *  @p [__first,__middle) such that i precedes j and @e k is an iterator in
!    *  the range @p [__middle,__last) then *j<*i and *k<*i are both false.
    */
    template<typename _RandomAccessIterator>
      _GLIBCXX20_CONSTEXPR
--- 4642,4655 ----
     *  @param  __last    Another iterator.
     *  @return  Nothing.
     *
!    *  Sorts the smallest `(__middle - __first)` elements in the range
!    *  `[first, last)` and moves them to the range `[__first, __middle)`. The
!    *  order of the remaining elements in the range `[__middle, __last)` is
!    *  unspecified.
!    *  After the sort if `i` and `j` are iterators in the range
!    *  `[__first, __middle)` such that `i` precedes `j` and `k` is an iterator
!    *  in the range `[__middle, __last)` then `*j < *i` and `*k < *i` are
!    *  both false.
    */
    template<typename _RandomAccessIterator>
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4680,4693 ****
     *  @param  __comp    A comparison functor.
     *  @return  Nothing.
     *
!    *  Sorts the smallest @p (__middle-__first) elements in the range
!    *  @p [__first,__last) and moves them to the range @p [__first,__middle). The
!    *  order of the remaining elements in the range @p [__middle,__last) is
!    *  undefined.
!    *  After the sort if @e i and @e j are iterators in the range
!    *  @p [__first,__middle) such that i precedes j and @e k is an iterator in
!    *  the range @p [__middle,__last) then @p *__comp(j,*i) and @p __comp(*k,*i)
!    *  are both false.
    */
    template<typename _RandomAccessIterator, typename _Compare>
      _GLIBCXX20_CONSTEXPR
--- 4681,4694 ----
     *  @param  __comp    A comparison functor.
     *  @return  Nothing.
     *
!    *  Sorts the smallest `(__middle - __first)` elements in the range
!    *  `[__first, __last)` and moves them to the range `[__first, __middle)`.
!    *  The order of the remaining elements in the range `[__middle, __last)` is
!    *  unspecified.
!    *  After the sort if `i` and `j` are iterators in the range
!    *  `[__first, __middle)` such that `i` precedes `j` and `k` is an iterator
!    *  in the range `[__middle, __last)` then `*__comp(j, *i)` and
!    *  `__comp(*k, *i)` are both false.
    */
    template<typename _RandomAccessIterator, typename _Compare>
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4719,4730 ****
     *  @param  __last    Another iterator.
     *  @return  Nothing.
     *
!    *  Rearranges the elements in the range @p [__first,__last) so that @p *__nth
     *  is the same element that would have been in that position had the
!    *  whole sequence been sorted. The elements either side of @p *__nth are
!    *  not completely sorted, but for any iterator @e i in the range
!    *  @p [__first,__nth) and any iterator @e j in the range @p [__nth,__last) it
!    *  holds that *j < *i is false.
    */
    template<typename _RandomAccessIterator>
      _GLIBCXX20_CONSTEXPR
--- 4720,4731 ----
     *  @param  __last    Another iterator.
     *  @return  Nothing.
     *
!    *  Rearranges the elements in the range `[__first, __last)` so that `*__nth`
     *  is the same element that would have been in that position had the
!    *  whole sequence been sorted. The elements either side of `*__nth` are
!    *  not completely sorted, but for any iterator `i` in the range
!    *  `[__first, __nth)` and any iterator `j` in the range `[__nth, __last)` it
!    *  holds that `*j < *i` is false.
    */
    template<typename _RandomAccessIterator>
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4759,4770 ****
     *  @param  __comp    A comparison functor.
     *  @return  Nothing.
     *
!    *  Rearranges the elements in the range @p [__first,__last) so that @p *__nth
     *  is the same element that would have been in that position had the
!    *  whole sequence been sorted. The elements either side of @p *__nth are
!    *  not completely sorted, but for any iterator @e i in the range
!    *  @p [__first,__nth) and any iterator @e j in the range @p [__nth,__last) it
!    *  holds that @p __comp(*j,*i) is false.
    */
    template<typename _RandomAccessIterator, typename _Compare>
      _GLIBCXX20_CONSTEXPR
--- 4760,4771 ----
     *  @param  __comp    A comparison functor.
     *  @return  Nothing.
     *
!    *  Rearranges the elements in the range `[__first, __last)` so that `*__nth`
     *  is the same element that would have been in that position had the
!    *  whole sequence been sorted. The elements either side of `*__nth` are
!    *  not completely sorted, but for any iterator `i` in the range
!    *  `[__first, __nth)` and any iterator `j` in the range `[__nth, __last)`
!    *  it holds that `__comp(*j, *i)` is false.
    */
    template<typename _RandomAccessIterator, typename _Compare>
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4797,4808 ****
     *  @param  __last    Another iterator.
     *  @return  Nothing.
     *
!    *  Sorts the elements in the range @p [__first,__last) in ascending order,
!    *  such that for each iterator @e i in the range @p [__first,__last-1),  
!    *  *(i+1)<*i is false.
     *
     *  The relative ordering of equivalent elements is not preserved, use
!    *  @p stable_sort() if this is needed.
    */
    template<typename _RandomAccessIterator>
      _GLIBCXX20_CONSTEXPR
--- 4798,4809 ----
     *  @param  __last    Another iterator.
     *  @return  Nothing.
     *
!    *  Sorts the elements in the range `[__first, __last)` in ascending order,
!    *  such that for each iterator `i` in the range `[__first, __last - 1)`,
!    *  `*(i+1) < *i` is false.
     *
     *  The relative ordering of equivalent elements is not preserved, use
!    *  `stable_sort()` if this is needed.
    */
    template<typename _RandomAccessIterator>
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4828,4839 ****
     *  @param  __comp    A comparison functor.
     *  @return  Nothing.
     *
!    *  Sorts the elements in the range @p [__first,__last) in ascending order,
!    *  such that @p __comp(*(i+1),*i) is false for every iterator @e i in the
!    *  range @p [__first,__last-1).
     *
     *  The relative ordering of equivalent elements is not preserved, use
!    *  @p stable_sort() if this is needed.
    */
    template<typename _RandomAccessIterator, typename _Compare>
      _GLIBCXX20_CONSTEXPR
--- 4829,4840 ----
     *  @param  __comp    A comparison functor.
     *  @return  Nothing.
     *
!    *  Sorts the elements in the range `[__first, __last)` in ascending order,
!    *  such that `__comp(*(i+1), *i)` is false for every iterator `i` in the
!    *  range `[__first, __last - 1)`.
     *
     *  The relative ordering of equivalent elements is not preserved, use
!    *  `stable_sort()` if this is needed.
    */
    template<typename _RandomAccessIterator, typename _Compare>
      _GLIBCXX20_CONSTEXPR
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_algobase.h gcc-12.4.0/libstdc++-v3/include/bits/stl_algobase.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_algobase.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_algobase.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 388,393 ****
--- 388,398 ----
  	    }
  	  return __result;
  	}
+ 
+       template<typename _Tp, typename _Up>
+ 	static void
+ 	__assign_one(_Tp* __to, _Up* __from)
+ 	{ *__to = *__from; }
      };
  
  #if __cplusplus >= 201103L
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 408,434 ****
  	    }
  	  return __result;
  	}
      };
  #endif
  
    template<bool _IsMove>
      struct __copy_move<_IsMove, true, random_access_iterator_tag>
      {
!       template<typename _Tp>
  	_GLIBCXX20_CONSTEXPR
! 	static _Tp*
! 	__copy_m(const _Tp* __first, const _Tp* __last, _Tp* __result)
  	{
- #if __cplusplus >= 201103L
- 	  using __assignable = __conditional_t<_IsMove,
- 					       is_move_assignable<_Tp>,
- 					       is_copy_assignable<_Tp>>;
- 	  // trivial types can have deleted assignment
- 	  static_assert( __assignable::value, "type must be assignable" );
- #endif
  	  const ptrdiff_t _Num = __last - __first;
! 	  if (_Num)
  	    __builtin_memmove(__result, __first, sizeof(_Tp) * _Num);
  	  return __result + _Num;
  	}
      };
--- 413,440 ----
  	    }
  	  return __result;
  	}
+ 
+       template<typename _Tp, typename _Up>
+ 	static void
+ 	__assign_one(_Tp* __to, _Up* __from)
+ 	{ *__to = std::move(*__from); }
      };
  #endif
  
    template<bool _IsMove>
      struct __copy_move<_IsMove, true, random_access_iterator_tag>
      {
!       template<typename _Tp, typename _Up>
  	_GLIBCXX20_CONSTEXPR
! 	static _Up*
! 	__copy_m(_Tp* __first, _Tp* __last, _Up* __result)
  	{
  	  const ptrdiff_t _Num = __last - __first;
! 	  if (__builtin_expect(_Num > 1, true))
  	    __builtin_memmove(__result, __first, sizeof(_Tp) * _Num);
+ 	  else if (_Num == 1)
+ 	    std::__copy_move<_IsMove, false, random_access_iterator_tag>::
+ 	      __assign_one(__result, __first);
  	  return __result + _Num;
  	}
      };
*************** _GLIBCXX_END_NAMESPACE_CONTAINER
*** 725,745 ****
    template<bool _IsMove>
      struct __copy_move_backward<_IsMove, true, random_access_iterator_tag>
      {
!       template<typename _Tp>
  	_GLIBCXX20_CONSTEXPR
! 	static _Tp*
! 	__copy_move_b(const _Tp* __first, const _Tp* __last, _Tp* __result)
  	{
- #if __cplusplus >= 201103L
- 	  using __assignable = __conditional_t<_IsMove,
- 					       is_move_assignable<_Tp>,
- 					       is_copy_assignable<_Tp>>;
- 	  // trivial types can have deleted assignment
- 	  static_assert( __assignable::value, "type must be assignable" );
- #endif
  	  const ptrdiff_t _Num = __last - __first;
! 	  if (_Num)
  	    __builtin_memmove(__result - _Num, __first, sizeof(_Tp) * _Num);
  	  return __result - _Num;
  	}
      };
--- 731,747 ----
    template<bool _IsMove>
      struct __copy_move_backward<_IsMove, true, random_access_iterator_tag>
      {
!       template<typename _Tp, typename _Up>
  	_GLIBCXX20_CONSTEXPR
! 	static _Up*
! 	__copy_move_b(_Tp* __first, _Tp* __last, _Up* __result)
  	{
  	  const ptrdiff_t _Num = __last - __first;
! 	  if (__builtin_expect(_Num > 1, true))
  	    __builtin_memmove(__result - _Num, __first, sizeof(_Tp) * _Num);
+ 	  else if (_Num == 1)
+ 	    std::__copy_move<_IsMove, false, random_access_iterator_tag>::
+ 	      __assign_one(__result - 1, __first);
  	  return __result - _Num;
  	}
      };
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 1778,1788 ****
      }
  
  #if __cpp_lib_three_way_comparison
!   // Iter points to a contiguous range of unsigned narrow character type
!   // or std::byte, suitable for comparison by memcmp.
!   template<typename _Iter>
!     concept __is_byte_iter = contiguous_iterator<_Iter>
!       && __is_memcmp_ordered<iter_value_t<_Iter>>::__value;
  
    // Return a struct with two members, initialized to the smaller of x and y
    // (or x if they compare equal) and the result of the comparison x <=> y.
--- 1780,1793 ----
      }
  
  #if __cpp_lib_three_way_comparison
!   // Both iterators refer to contiguous ranges of unsigned narrow characters,
!   // or std::byte, or big-endian unsigned integers, suitable for comparison
!   // using memcmp.
!   template<typename _Iter1, typename _Iter2>
!     concept __memcmp_ordered_with
!       = (__is_memcmp_ordered_with<iter_value_t<_Iter1>,
! 				  iter_value_t<_Iter2>>::__value)
! 	  && contiguous_iterator<_Iter1> && contiguous_iterator<_Iter2>;
  
    // Return a struct with two members, initialized to the smaller of x and y
    // (or x if they compare equal) and the result of the comparison x <=> y.
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 1832,1851 ****
        if (!std::__is_constant_evaluated())
  	if constexpr (same_as<_Comp, __detail::_Synth3way>
  		      || same_as<_Comp, compare_three_way>)
! 	  if constexpr (__is_byte_iter<_InputIter1>)
! 	    if constexpr (__is_byte_iter<_InputIter2>)
! 	      {
! 		const auto [__len, __lencmp] = _GLIBCXX_STD_A::
! 		  __min_cmp(__last1 - __first1, __last2 - __first2);
! 		if (__len)
! 		  {
! 		    const auto __c
! 		      = __builtin_memcmp(&*__first1, &*__first2, __len) <=> 0;
! 		    if (__c != 0)
! 		      return __c;
! 		  }
! 		return __lencmp;
! 	      }
  
        while (__first1 != __last1)
  	{
--- 1837,1856 ----
        if (!std::__is_constant_evaluated())
  	if constexpr (same_as<_Comp, __detail::_Synth3way>
  		      || same_as<_Comp, compare_three_way>)
! 	  if constexpr (__memcmp_ordered_with<_InputIter1, _InputIter2>)
! 	    {
! 	      const auto [__len, __lencmp] = _GLIBCXX_STD_A::
! 		__min_cmp(__last1 - __first1, __last2 - __first2);
! 	      if (__len)
! 		{
! 		  const auto __blen = __len * sizeof(*__first1);
! 		  const auto __c
! 		    = __builtin_memcmp(&*__first1, &*__first2, __blen) <=> 0;
! 		  if (__c != 0)
! 		    return __c;
! 		}
! 	      return __lencmp;
! 	    }
  
        while (__first1 != __last1)
  	{
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_bvector.h gcc-12.4.0/libstdc++-v3/include/bits/stl_bvector.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_bvector.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_bvector.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 629,641 ****
        _M_allocate(size_t __n)
        {
  	_Bit_pointer __p = _Bit_alloc_traits::allocate(_M_impl, _S_nword(__n));
! #if __cpp_lib_is_constant_evaluated
  	if (std::is_constant_evaluated())
! 	{
! 	  __n = _S_nword(__n);
! 	  for (size_t __i = 0; __i < __n; ++__i)
! 	    __p[__i] = 0ul;
! 	}
  #endif
  	return __p;
        }
--- 629,641 ----
        _M_allocate(size_t __n)
        {
  	_Bit_pointer __p = _Bit_alloc_traits::allocate(_M_impl, _S_nword(__n));
! #if __cpp_lib_is_constant_evaluated && __cpp_constexpr_dynamic_alloc
  	if (std::is_constant_evaluated())
! 	  {
! 	    __n = _S_nword(__n);
! 	    for (size_t __i = 0; __i < __n; ++__i)
! 	      std::construct_at(std::to_address(__p) + __i);
! 	  }
  #endif
  	return __p;
        }
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 672,677 ****
--- 672,679 ----
     *  access to individual elements in any order.
     *
     *  @ingroup sequences
+    *  @headerfile vector
+    *  @since C++98
     *
     *  @tparam _Alloc  Allocator type.
     *
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_construct.h gcc-12.4.0/libstdc++-v3/include/bits/stl_construct.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_construct.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_construct.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 190,196 ****
  #endif
  #if __cplusplus >= 202002L
        if (std::__is_constant_evaluated())
! 	return _Destroy_aux<false>::__destroy(__first, __last);
  #endif
        std::_Destroy_aux<__has_trivial_destructor(_Value_type)>::
  	__destroy(__first, __last);
--- 190,196 ----
  #endif
  #if __cplusplus >= 202002L
        if (std::__is_constant_evaluated())
! 	return std::_Destroy_aux<false>::__destroy(__first, __last);
  #endif
        std::_Destroy_aux<__has_trivial_destructor(_Value_type)>::
  	__destroy(__first, __last);
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 239,245 ****
  #endif
  #if __cplusplus >= 202002L
        if (std::__is_constant_evaluated())
! 	return _Destroy_n_aux<false>::__destroy_n(__first, __count);
  #endif
        return std::_Destroy_n_aux<__has_trivial_destructor(_Value_type)>::
  	__destroy_n(__first, __count);
--- 239,245 ----
  #endif
  #if __cplusplus >= 202002L
        if (std::__is_constant_evaluated())
! 	return std::_Destroy_n_aux<false>::__destroy_n(__first, __count);
  #endif
        return std::_Destroy_n_aux<__has_trivial_destructor(_Value_type)>::
  	__destroy_n(__first, __count);
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_map.h gcc-12.4.0/libstdc++-v3/include/bits/stl_map.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_map.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_map.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 76,81 ****
--- 76,83 ----
     *  retrieved based on a key, in logarithmic time.
     *
     *  @ingroup associative_containers
+    *  @headerfile map
+    *  @since C++98
     *
     *  @tparam _Key  Type of key objects.
     *  @tparam  _Tp  Type of mapped objects.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_multimap.h gcc-12.4.0/libstdc++-v3/include/bits/stl_multimap.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_multimap.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_multimap.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 74,79 ****
--- 74,81 ----
     *  retrieved based on a key, in logarithmic time.
     *
     *  @ingroup associative_containers
+    *  @headerfile map
+    *  @since C++98
     *
     *  @tparam _Key  Type of key objects.
     *  @tparam  _Tp  Type of mapped objects.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_multiset.h gcc-12.4.0/libstdc++-v3/include/bits/stl_multiset.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_multiset.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_multiset.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 74,80 ****
     *  in logarithmic time.
     *
     *  @ingroup associative_containers
!    *
     *
     *  @tparam _Key  Type of key objects.
     *  @tparam _Compare  Comparison function object type, defaults to less<_Key>.
--- 74,81 ----
     *  in logarithmic time.
     *
     *  @ingroup associative_containers
!    *  @headerfile set
!    *  @since C++98
     *
     *  @tparam _Key  Type of key objects.
     *  @tparam _Compare  Comparison function object type, defaults to less<_Key>.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_numeric.h gcc-12.4.0/libstdc++-v3/include/bits/stl_numeric.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_numeric.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_numeric.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 328,337 ****
     *  @param  __last  End of input range.
     *  @param  __result  Output sums.
     *  @return  Iterator pointing just beyond the values written to result.
-    *
-    *  _GLIBCXX_RESOLVE_LIB_DEFECTS
-    *  DR 539. partial_sum and adjacent_difference should mention requirements
     */
    template<typename _InputIterator, typename _OutputIterator>
      _GLIBCXX20_CONSTEXPR
      _OutputIterator
--- 328,336 ----
     *  @param  __last  End of input range.
     *  @param  __result  Output sums.
     *  @return  Iterator pointing just beyond the values written to result.
     */
+   // _GLIBCXX_RESOLVE_LIB_DEFECTS
+   // DR 539. partial_sum and adjacent_difference should mention requirements
    template<typename _InputIterator, typename _OutputIterator>
      _GLIBCXX20_CONSTEXPR
      _OutputIterator
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 371,380 ****
     *  @param  __result  Output sum.
     *  @param  __binary_op Function object.
     *  @return  Iterator pointing just beyond the values written to result.
-    *
-    *  _GLIBCXX_RESOLVE_LIB_DEFECTS
-    *  DR 539. partial_sum and adjacent_difference should mention requirements
     */
    template<typename _InputIterator, typename _OutputIterator,
  	   typename _BinaryOperation>
      _GLIBCXX20_CONSTEXPR
--- 370,378 ----
     *  @param  __result  Output sum.
     *  @param  __binary_op Function object.
     *  @return  Iterator pointing just beyond the values written to result.
     */
+   // _GLIBCXX_RESOLVE_LIB_DEFECTS
+   // DR 539. partial_sum and adjacent_difference should mention requirements
    template<typename _InputIterator, typename _OutputIterator,
  	   typename _BinaryOperation>
      _GLIBCXX20_CONSTEXPR
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_pair.h gcc-12.4.0/libstdc++-v3/include/bits/stl_pair.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_pair.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_pair.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 180,185 ****
--- 180,187 ----
     *  @tparam _T2  Type of second object.
     *
     *  <https://gcc.gnu.org/onlinedocs/libstdc++/manual/utilities.html>
+    *
+    * @headerfile utility
     */
    template<typename _T1, typename _T2>
      struct pair
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 757,765 ****
--- 759,769 ----
  #if __cplusplus >= 201103L
    // Various functions which give std::pair a tuple-like interface.
  
+   /// @cond undocumented
    template<typename _T1, typename _T2>
      struct __is_tuple_like_impl<pair<_T1, _T2>> : true_type
      { };
+   /// @endcond
  
    /// Partial specialization for std::pair
    template<class _Tp1, class _Tp2>
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_set.h gcc-12.4.0/libstdc++-v3/include/bits/stl_set.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_set.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_set.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 74,79 ****
--- 74,81 ----
     *  retrieved in logarithmic time.
     *
     *  @ingroup associative_containers
+    *  @headerfile set
+    *  @since C++98
     *
     *  @tparam _Key  Type of key objects.
     *  @tparam _Compare  Comparison function object type, defaults to less<_Key>.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_tempbuf.h gcc-12.4.0/libstdc++-v3/include/bits/stl_tempbuf.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_tempbuf.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_tempbuf.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 254,259 ****
--- 254,261 ----
  	  __ucr(__first, __last, __seed);
      }
  
+ #pragma GCC diagnostic push
+ #pragma GCC diagnostic ignored "-Wdeprecated-declarations"
    template<typename _ForwardIterator, typename _Tp>
      _Temporary_buffer<_ForwardIterator, _Tp>::
      _Temporary_buffer(_ForwardIterator __seed, size_type __original_len)
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 278,283 ****
--- 280,286 ----
  	    }
  	}
      }
+ #pragma GCC diagnostic pop
  
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_tree.h gcc-12.4.0/libstdc++-v3/include/bits/stl_tree.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_tree.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_tree.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1436,1442 ****
        _M_move_assign(_Rb_tree&, false_type);
  #endif
  
! #if __cplusplus > 201402L
      public:
        /// Re-insert an extracted node.
        insert_return_type
--- 1436,1442 ----
        _M_move_assign(_Rb_tree&, false_type);
  #endif
  
! #if __cplusplus > 201404L
      public:
        /// Re-insert an extracted node.
        insert_return_type
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1454,1460 ****
  	      {
  		__ret.position
  		  = _M_insert_node(__res.first, __res.second, __nh._M_ptr);
! 		__nh._M_ptr = nullptr;
  		__ret.inserted = true;
  	      }
  	    else
--- 1454,1460 ----
  	      {
  		__ret.position
  		  = _M_insert_node(__res.first, __res.second, __nh._M_ptr);
! 		__nh.release();
  		__ret.inserted = true;
  	      }
  	    else
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1482,1488 ****
  	      __ret = _M_insert_node(__res.first, __res.second, __nh._M_ptr);
  	    else
  	      __ret = _M_insert_equal_lower_node(__nh._M_ptr);
! 	    __nh._M_ptr = nullptr;
  	  }
  	return __ret;
        }
--- 1482,1488 ----
  	      __ret = _M_insert_node(__res.first, __res.second, __nh._M_ptr);
  	    else
  	      __ret = _M_insert_equal_lower_node(__nh._M_ptr);
! 	    __nh.release();
  	  }
  	return __ret;
        }
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1501,1507 ****
  	    if (__res.second)
  	      {
  		__ret = _M_insert_node(__res.first, __res.second, __nh._M_ptr);
! 		__nh._M_ptr = nullptr;
  	      }
  	    else
  	      __ret = iterator(__res.first);
--- 1501,1507 ----
  	    if (__res.second)
  	      {
  		__ret = _M_insert_node(__res.first, __res.second, __nh._M_ptr);
! 		__nh.release();
  	      }
  	    else
  	      __ret = iterator(__res.first);
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1524,1530 ****
  	      __ret = _M_insert_node(__res.first, __res.second, __nh._M_ptr);
  	    else
  	      __ret = _M_insert_equal_lower_node(__nh._M_ptr);
! 	    __nh._M_ptr = nullptr;
  	  }
  	return __ret;
        }
--- 1524,1530 ----
  	      __ret = _M_insert_node(__res.first, __res.second, __nh._M_ptr);
  	    else
  	      __ret = _M_insert_equal_lower_node(__nh._M_ptr);
! 	    __nh.release();
  	  }
  	return __ret;
        }
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1555,1561 ****
  	  = _Rb_tree<_Key, _Val, _KeyOfValue, _Compare2, _Alloc>;
  
        template<typename, typename>
! 	friend class _Rb_tree_merge_helper;
  
        /// Merge from a compatible container into one with unique keys.
        template<typename _Compare2>
--- 1555,1561 ----
  	  = _Rb_tree<_Key, _Val, _KeyOfValue, _Compare2, _Alloc>;
  
        template<typename, typename>
! 	friend struct _Rb_tree_merge_helper;
  
        /// Merge from a compatible container into one with unique keys.
        template<typename _Compare2>
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_uninitialized.h gcc-12.4.0/libstdc++-v3/include/bits/stl_uninitialized.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_uninitialized.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_uninitialized.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 690,695 ****
--- 690,701 ----
      inline _ForwardIterator
      __uninitialized_default_n(_ForwardIterator __first, _Size __n)
      {
+ #ifdef __cpp_lib_is_constant_evaluated
+       if (std::is_constant_evaluated())
+ 	return __uninitialized_default_n_1<false>::
+ 		 __uninit_default_n(__first, __n);
+ #endif
+ 
        typedef typename iterator_traits<_ForwardIterator>::value_type
  	_ValueType;
        // See uninitialized_fill_n for the conditions for using std::fill_n.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_vector.h gcc-12.4.0/libstdc++-v3/include/bits/stl_vector.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_vector.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_vector.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 403,408 ****
--- 403,410 ----
     *  individual elements in any order.
     *
     *  @ingroup sequences
+    *  @headerfile vector
+    *  @since C++98
     *
     *  @tparam _Tp  Type of element.
     *  @tparam _Alloc  Allocator type, defaults to allocator<_Tp>.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stream_iterator.h gcc-12.4.0/libstdc++-v3/include/bits/stream_iterator.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stream_iterator.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stream_iterator.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 77,82 ****
--- 77,83 ----
        : _M_stream(std::__addressof(__s)), _M_ok(true)
        { _M_read(); }
  
+       _GLIBCXX_CONSTEXPR
        istream_iterator(const istream_iterator& __obj)
        _GLIBCXX_NOEXCEPT_IF(is_nothrow_copy_constructible<_Tp>::value)
        : _M_stream(__obj._M_stream), _M_value(__obj._M_value),
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/unique_lock.h gcc-12.4.0/libstdc++-v3/include/bits/unique_lock.h
*** gcc-12.3.0/libstdc++-v3/include/bits/unique_lock.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/unique_lock.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 51,57 ****
--- 51,59 ----
     * to another unique_lock by move construction or move assignment. If a
     * mutex lock is owned when the destructor runs ownership will be released.
     *
+    * @headerfile mutex
     * @ingroup mutexes
+    * @since C++11
     */
    template<typename _Mutex>
      class unique_lock
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/unique_ptr.h gcc-12.4.0/libstdc++-v3/include/bits/unique_ptr.h
*** gcc-12.3.0/libstdc++-v3/include/bits/unique_ptr.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/unique_ptr.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 65,72 ****
  #pragma GCC diagnostic pop
  #endif
  
!   /// Primary template of default_delete, used by unique_ptr for single objects
!   /// @since C++11
    template<typename _Tp>
      struct default_delete
      {
--- 65,75 ----
  #pragma GCC diagnostic pop
  #endif
  
!   /** Primary template of default_delete, used by unique_ptr for single objects
!    *
!    * @headerfile memory
!    * @since C++11
!    */
    template<typename _Tp>
      struct default_delete
      {
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 99,105 ****
    // _GLIBCXX_RESOLVE_LIB_DEFECTS
    // DR 740 - omit specialization for array objects with a compile time length
  
!   /// Specialization of default_delete for arrays, used by `unique_ptr<T[]>`
    template<typename _Tp>
      struct default_delete<_Tp[]>
      {
--- 102,112 ----
    // _GLIBCXX_RESOLVE_LIB_DEFECTS
    // DR 740 - omit specialization for array objects with a compile time length
  
!   /** Specialization of default_delete for arrays, used by `unique_ptr<T[]>`
!    *
!    * @headerfile memory
!    * @since C++11
!    */
    template<typename _Tp>
      struct default_delete<_Tp[]>
      {
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/unordered_map.h gcc-12.4.0/libstdc++-v3/include/bits/unordered_map.h
*** gcc-12.3.0/libstdc++-v3/include/bits/unordered_map.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/unordered_map.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 78,83 ****
--- 78,85 ----
     *  with the keys.
     *
     *  @ingroup unordered_associative_containers
+    *  @headerfile unordered_map
+    *  @since C++11
     *
     *  @tparam  _Key    Type of key objects.
     *  @tparam  _Tp     Type of mapped objects.
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 1221,1226 ****
--- 1223,1230 ----
     *  values of another type with the keys.
     *
     *  @ingroup unordered_associative_containers
+    *  @headerfile unordered_map
+    *  @since C++11
     *
     *  @tparam  _Key    Type of key objects.
     *  @tparam  _Tp     Type of mapped objects.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/unordered_set.h gcc-12.4.0/libstdc++-v3/include/bits/unordered_set.h
*** gcc-12.3.0/libstdc++-v3/include/bits/unordered_set.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/unordered_set.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 75,80 ****
--- 75,82 ----
     *  the elements themselves.
     *
     *  @ingroup unordered_associative_containers
+    *  @headerfile unordered_set
+    *  @since C++11
     *
     *  @tparam  _Value  Type of key objects.
     *  @tparam  _Hash  Hashing function object type, defaults to hash<_Value>.
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 943,948 ****
--- 945,952 ----
     *  elements' keys are the elements themselves.
     *
     *  @ingroup unordered_associative_containers
+    *  @headerfile unordered_set
+    *  @since C++11
     *
     *  @tparam  _Value  Type of key objects.
     *  @tparam  _Hash  Hashing function object type, defaults to hash<_Value>.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/utility.h gcc-12.4.0/libstdc++-v3/include/bits/utility.h
*** gcc-12.3.0/libstdc++-v3/include/bits/utility.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/utility.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 163,168 ****
--- 163,171 ----
    template<typename _Tp, _Tp... _Idx>
      struct integer_sequence
      {
+ #if __cplusplus >= 202002L
+       static_assert(is_integral_v<_Tp>);
+ #endif
        typedef _Tp value_type;
        static constexpr size_t size() noexcept { return sizeof...(_Idx); }
      };
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 173,179 ****
  #if __has_builtin(__make_integer_seq)
        = __make_integer_seq<integer_sequence, _Tp, _Num>;
  #else
!       = integer_sequence<_Tp, __integer_pack(_Num)...>;
  #endif
  
    /// Alias template index_sequence
--- 176,182 ----
  #if __has_builtin(__make_integer_seq)
        = __make_integer_seq<integer_sequence, _Tp, _Num>;
  #else
!       = integer_sequence<_Tp, __integer_pack(_Tp(_Num))...>;
  #endif
  
    /// Alias template index_sequence
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/experimental/bits/fs_ops.h gcc-12.4.0/libstdc++-v3/include/experimental/bits/fs_ops.h
*** gcc-12.3.0/libstdc++-v3/include/experimental/bits/fs_ops.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/experimental/bits/fs_ops.h	Thu Jun 20 08:08:10 2024
*************** inline namespace v1
*** 98,105 ****
    bool create_directory(const path& __p);
    bool create_directory(const path& __p, error_code& __ec) noexcept;
  
!   bool create_directory(const path& __p, const path& attributes);
!   bool create_directory(const path& __p, const path& attributes,
  			error_code& __ec) noexcept;
  
    void create_directory_symlink(const path& __to, const path& __new_symlink);
--- 98,105 ----
    bool create_directory(const path& __p);
    bool create_directory(const path& __p, error_code& __ec) noexcept;
  
!   bool create_directory(const path& __p, const path& __attributes);
!   bool create_directory(const path& __p, const path& __attributes,
  			error_code& __ec) noexcept;
  
    void create_directory_symlink(const path& __to, const path& __new_symlink);
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/experimental/bits/fs_path.h gcc-12.4.0/libstdc++-v3/include/experimental/bits/fs_path.h
*** gcc-12.3.0/libstdc++-v3/include/experimental/bits/fs_path.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/experimental/bits/fs_path.h	Thu Jun 20 08:08:10 2024
*************** namespace __detail
*** 1049,1055 ****
      inline std::basic_string<_CharT, _Traits, _Allocator>
      path::string(const _Allocator& __a) const
      {
!       if _GLIBCXX_CONSTEXPR (is_same<_CharT, value_type>::value)
  	return { _M_pathname.begin(), _M_pathname.end(), __a };
  
        using _WString = basic_string<_CharT, _Traits, _Allocator>;
--- 1049,1055 ----
      inline std::basic_string<_CharT, _Traits, _Allocator>
      path::string(const _Allocator& __a) const
      {
!       if _GLIBCXX17_CONSTEXPR (is_same<_CharT, value_type>::value)
  	return { _M_pathname.begin(), _M_pathname.end(), __a };
  
        using _WString = basic_string<_CharT, _Traits, _Allocator>;
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/experimental/bits/numeric_traits.h gcc-12.4.0/libstdc++-v3/include/experimental/bits/numeric_traits.h
*** gcc-12.3.0/libstdc++-v3/include/experimental/bits/numeric_traits.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/experimental/bits/numeric_traits.h	Thu Jun 20 08:08:10 2024
***************
*** 22,27 ****
--- 22,30 ----
  // see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  // <http://www.gnu.org/licenses/>.
  
+ #ifndef _GLIBCXX_EXPERIMENTAL_BITS_NUMERIC_TRAITS_H
+ #define _GLIBCXX_EXPERIMENTAL_BITS_NUMERIC_TRAITS_H
+ 
  #include <type_traits>
  
  namespace std {
*************** template <>
*** 565,567 ****
--- 568,571 ----
  #endif // __FINITE_MATH_ONLY__
  
  } // namespace std
+ #endif  // _GLIBCXX_EXPERIMENTAL_BITS_NUMERIC_TRAITS_H
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd.h gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd.h
*** gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd.h	Thu Jun 20 08:08:10 2024
***************
*** 43,49 ****
--- 43,54 ----
  #if _GLIBCXX_SIMD_X86INTRIN
  #include <x86intrin.h>
  #elif _GLIBCXX_SIMD_HAVE_NEON
+ #pragma GCC diagnostic push
+ // narrowing conversion of '__a' from 'uint64_t' {aka 'long long unsigned int'} to
+ //   'int64x1_t' {aka 'long long int'} [-Wnarrowing]
+ #pragma GCC diagnostic ignored "-Wnarrowing"
  #include <arm_neon.h>
+ #pragma GCC diagnostic pop
  #endif
  
  /** @ingroup ts_simd
*************** struct vector_aligned_tag
*** 180,189 ****
    template <typename _Tp, typename _Up>
      _GLIBCXX_SIMD_INTRINSIC static constexpr _Up*
      _S_apply(_Up* __ptr)
!     {
!       return static_cast<_Up*>(
! 	__builtin_assume_aligned(__ptr, _S_alignment<_Tp, _Up>));
!     }
  };
  
  template <size_t _Np> struct overaligned_tag
--- 185,191 ----
    template <typename _Tp, typename _Up>
      _GLIBCXX_SIMD_INTRINSIC static constexpr _Up*
      _S_apply(_Up* __ptr)
!     { return static_cast<_Up*>(__builtin_assume_aligned(__ptr, _S_alignment<_Tp, _Up>)); }
  };
  
  template <size_t _Np> struct overaligned_tag
*************** namespace __detail
*** 288,300 ****
    // expression. math_errhandling may expand to an extern symbol, in which case a constexpr value
    // must be guessed.
    template <int = math_errhandling>
!     constexpr bool __handle_fpexcept_impl(int)
      { return math_errhandling & MATH_ERREXCEPT; }
  #endif
  
    // Fallback if math_errhandling doesn't work: with fast-math assume floating-point exceptions are
    // ignored, otherwise implement correct exception behavior.
!   constexpr bool __handle_fpexcept_impl(float)
    {
  #if defined __FAST_MATH__
      return false;
--- 290,304 ----
    // expression. math_errhandling may expand to an extern symbol, in which case a constexpr value
    // must be guessed.
    template <int = math_errhandling>
!     constexpr bool
!     __handle_fpexcept_impl(int)
      { return math_errhandling & MATH_ERREXCEPT; }
  #endif
  
    // Fallback if math_errhandling doesn't work: with fast-math assume floating-point exceptions are
    // ignored, otherwise implement correct exception behavior.
!   constexpr bool
!   __handle_fpexcept_impl(float)
    {
  #if defined __FAST_MATH__
      return false;
*************** template <size_t _Bytes>
*** 577,582 ****
--- 581,587 ----
    constexpr auto
    __int_for_sizeof()
    {
+     static_assert(_Bytes > 0);
      if constexpr (_Bytes == sizeof(int))
        return int();
    #ifdef __clang__
*************** template <size_t _Bytes>
*** 609,642 ****
  	  operator&(_Ip __rhs) const
  	  {
  	    return __generate_from_n_evaluations<_Np, _Ip>(
! 	      [&](auto __i) { return __rhs._M_data[__i] & _M_data[__i]; });
  	  }
  
  	  _GLIBCXX_SIMD_INTRINSIC constexpr _Ip
  	  operator|(_Ip __rhs) const
  	  {
  	    return __generate_from_n_evaluations<_Np, _Ip>(
! 	      [&](auto __i) { return __rhs._M_data[__i] | _M_data[__i]; });
  	  }
  
  	  _GLIBCXX_SIMD_INTRINSIC constexpr _Ip
  	  operator^(_Ip __rhs) const
  	  {
  	    return __generate_from_n_evaluations<_Np, _Ip>(
! 	      [&](auto __i) { return __rhs._M_data[__i] ^ _M_data[__i]; });
  	  }
  
  	  _GLIBCXX_SIMD_INTRINSIC constexpr _Ip
  	  operator~() const
  	  {
  	    return __generate_from_n_evaluations<_Np, _Ip>(
! 	      [&](auto __i) { return ~_M_data[__i]; });
  	  }
  	};
  	return _Ip{};
        }
      else
!       static_assert(_Bytes != _Bytes, "this should be unreachable");
    }
  #pragma GCC diagnostic pop
  
--- 614,653 ----
  	  operator&(_Ip __rhs) const
  	  {
  	    return __generate_from_n_evaluations<_Np, _Ip>(
! 	      [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		return __rhs._M_data[__i] & _M_data[__i];
! 	      });
  	  }
  
  	  _GLIBCXX_SIMD_INTRINSIC constexpr _Ip
  	  operator|(_Ip __rhs) const
  	  {
  	    return __generate_from_n_evaluations<_Np, _Ip>(
! 	      [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		return __rhs._M_data[__i] | _M_data[__i];
! 	      });
  	  }
  
  	  _GLIBCXX_SIMD_INTRINSIC constexpr _Ip
  	  operator^(_Ip __rhs) const
  	  {
  	    return __generate_from_n_evaluations<_Np, _Ip>(
! 	      [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		return __rhs._M_data[__i] ^ _M_data[__i];
! 	      });
  	  }
  
  	  _GLIBCXX_SIMD_INTRINSIC constexpr _Ip
  	  operator~() const
  	  {
  	    return __generate_from_n_evaluations<_Np, _Ip>(
! 	      [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return ~_M_data[__i]; });
  	  }
  	};
  	return _Ip{};
        }
      else
!       static_assert(_Bytes == 0, "this should be unreachable");
    }
  #pragma GCC diagnostic pop
  
*************** template <typename _Tp, typename _Up>
*** 743,750 ****
  // __invoke_ub{{{
  template <typename... _Args>
    [[noreturn]] _GLIBCXX_SIMD_ALWAYS_INLINE void
!   __invoke_ub([[maybe_unused]] const char* __msg,
! 	      [[maybe_unused]] const _Args&... __args)
    {
  #ifdef _GLIBCXX_DEBUG_UB
      __builtin_fprintf(stderr, __msg, __args...);
--- 754,760 ----
  // __invoke_ub{{{
  template <typename... _Args>
    [[noreturn]] _GLIBCXX_SIMD_ALWAYS_INLINE void
!   __invoke_ub([[maybe_unused]] const char* __msg, [[maybe_unused]] const _Args&... __args)
    {
  #ifdef _GLIBCXX_DEBUG_UB
      __builtin_fprintf(stderr, __msg, __args...);
*************** class _ExactBool
*** 789,799 ****
    const bool _M_data;
  
  public:
!   _GLIBCXX_SIMD_INTRINSIC constexpr _ExactBool(bool __b) : _M_data(__b) {}
  
    _ExactBool(int) = delete;
  
!   _GLIBCXX_SIMD_INTRINSIC constexpr operator bool() const { return _M_data; }
  };
  
  // }}}
--- 799,812 ----
    const bool _M_data;
  
  public:
!   _GLIBCXX_SIMD_INTRINSIC constexpr
!   _ExactBool(bool __b) : _M_data(__b) {}
  
    _ExactBool(int) = delete;
  
!   _GLIBCXX_SIMD_INTRINSIC constexpr
!   operator bool() const
!   { return _M_data; }
  };
  
  // }}}
*************** template <size_t _Np, bool _Sanitized>
*** 1391,1397 ****
      operator^=(const _BitMask& __b) & noexcept
      {
        __execute_n_times<_S_array_size>(
! 	[&](auto __i) { _M_bits[__i] ^= __b._M_bits[__i]; });
        return *this;
      }
  
--- 1404,1410 ----
      operator^=(const _BitMask& __b) & noexcept
      {
        __execute_n_times<_S_array_size>(
! 	[&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { _M_bits[__i] ^= __b._M_bits[__i]; });
        return *this;
      }
  
*************** template <size_t _Np, bool _Sanitized>
*** 1399,1405 ****
      operator|=(const _BitMask& __b) & noexcept
      {
        __execute_n_times<_S_array_size>(
! 	[&](auto __i) { _M_bits[__i] |= __b._M_bits[__i]; });
        return *this;
      }
  
--- 1412,1418 ----
      operator|=(const _BitMask& __b) & noexcept
      {
        __execute_n_times<_S_array_size>(
! 	[&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { _M_bits[__i] |= __b._M_bits[__i]; });
        return *this;
      }
  
*************** template <size_t _Np, bool _Sanitized>
*** 1407,1413 ****
      operator&=(const _BitMask& __b) & noexcept
      {
        __execute_n_times<_S_array_size>(
! 	[&](auto __i) { _M_bits[__i] &= __b._M_bits[__i]; });
        return *this;
      }
  
--- 1420,1426 ----
      operator&=(const _BitMask& __b) & noexcept
      {
        __execute_n_times<_S_array_size>(
! 	[&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { _M_bits[__i] &= __b._M_bits[__i]; });
        return *this;
      }
  
*************** template <typename _Tp>
*** 1482,1489 ****
  
  // else, use GNU-style builtin vector types
  template <typename _Tp, size_t _Np>
!   struct __vector_type_n<_Tp, _Np,
! 			 enable_if_t<__is_vectorizable_v<_Tp> && _Np >= 2>>
    {
      static constexpr size_t _S_Np2 = std::__bit_ceil(_Np * sizeof(_Tp));
  
--- 1495,1501 ----
  
  // else, use GNU-style builtin vector types
  template <typename _Tp, size_t _Np>
!   struct __vector_type_n<_Tp, _Np, enable_if_t<__is_vectorizable_v<_Tp> && _Np >= 2>>
    {
      static constexpr size_t _S_Np2 = std::__bit_ceil(_Np * sizeof(_Tp));
  
*************** template <typename _To, typename _From>
*** 1737,1754 ****
        return reinterpret_cast<_To>(__x);
      else if constexpr (__is_vector_type_v<_To> && __from_is_vectorizable)
        {
! 	using _FV [[gnu::vector_size(sizeof(_From))]] = _From;
  	return reinterpret_cast<_To>(_FV{__x});
        }
      else if constexpr (__to_is_vectorizable && __from_is_vectorizable)
        {
! 	using _TV [[gnu::vector_size(sizeof(_To))]] = _To;
! 	using _FV [[gnu::vector_size(sizeof(_From))]] = _From;
  	return reinterpret_cast<_TV>(_FV{__x})[0];
        }
      else if constexpr (__to_is_vectorizable && __is_vector_type_v<_From>)
        {
! 	using _TV [[gnu::vector_size(sizeof(_To))]] = _To;
  	return reinterpret_cast<_TV>(__x)[0];
        }
      else
--- 1749,1766 ----
        return reinterpret_cast<_To>(__x);
      else if constexpr (__is_vector_type_v<_To> && __from_is_vectorizable)
        {
! 	using _FV [[__gnu__::__vector_size__(sizeof(_From))]] = _From;
  	return reinterpret_cast<_To>(_FV{__x});
        }
      else if constexpr (__to_is_vectorizable && __from_is_vectorizable)
        {
! 	using _TV [[__gnu__::__vector_size__(sizeof(_To))]] = _To;
! 	using _FV [[__gnu__::__vector_size__(sizeof(_From))]] = _From;
  	return reinterpret_cast<_TV>(_FV{__x})[0];
        }
      else if constexpr (__to_is_vectorizable && __is_vector_type_v<_From>)
        {
! 	using _TV [[__gnu__::__vector_size__(sizeof(_To))]] = _To;
  	return reinterpret_cast<_TV>(__x)[0];
        }
      else
*************** template <typename _To, typename _From>
*** 1764,1771 ****
  // }}}
  // __to_intrin {{{
  template <typename _Tp, typename _TVT = _VectorTraits<_Tp>,
! 	  typename _R
! 	  = __intrinsic_type_t<typename _TVT::value_type, _TVT::_S_full_size>>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __to_intrin(_Tp __x)
    {
--- 1776,1782 ----
  // }}}
  // __to_intrin {{{
  template <typename _Tp, typename _TVT = _VectorTraits<_Tp>,
! 	  typename _R = __intrinsic_type_t<typename _TVT::value_type, _TVT::_S_full_size>>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __to_intrin(_Tp __x)
    {
*************** template <typename _Tp, typename _TVT =
*** 1786,1794 ****
  template <typename _Tp, typename... _Args>
    _GLIBCXX_SIMD_INTRINSIC constexpr __vector_type_t<_Tp, sizeof...(_Args)>
    __make_vector(const _Args&... __args)
!   {
!     return __vector_type_t<_Tp, sizeof...(_Args)>{static_cast<_Tp>(__args)...};
!   }
  
  // }}}
  // __vector_broadcast{{{
--- 1797,1803 ----
  template <typename _Tp, typename... _Args>
    _GLIBCXX_SIMD_INTRINSIC constexpr __vector_type_t<_Tp, sizeof...(_Args)>
    __make_vector(const _Args&... __args)
!   { return __vector_type_t<_Tp, sizeof...(_Args)>{static_cast<_Tp>(__args)...}; }
  
  // }}}
  // __vector_broadcast{{{
*************** template <size_t _Np, typename _Tp>
*** 1807,1816 ****
    template <typename _Tp, size_t _Np, typename _Gp, size_t... _I>
    _GLIBCXX_SIMD_INTRINSIC constexpr __vector_type_t<_Tp, _Np>
    __generate_vector_impl(_Gp&& __gen, index_sequence<_I...>)
!   {
!     return __vector_type_t<_Tp, _Np>{
!       static_cast<_Tp>(__gen(_SizeConstant<_I>()))...};
!   }
  
  template <typename _V, typename _VVT = _VectorTraits<_V>, typename _Gp>
    _GLIBCXX_SIMD_INTRINSIC constexpr _V
--- 1816,1822 ----
    template <typename _Tp, size_t _Np, typename _Gp, size_t... _I>
    _GLIBCXX_SIMD_INTRINSIC constexpr __vector_type_t<_Tp, _Np>
    __generate_vector_impl(_Gp&& __gen, index_sequence<_I...>)
!   { return __vector_type_t<_Tp, _Np>{ static_cast<_Tp>(__gen(_SizeConstant<_I>()))...}; }
  
  template <typename _V, typename _VVT = _VectorTraits<_V>, typename _Gp>
    _GLIBCXX_SIMD_INTRINSIC constexpr _V
*************** template <typename _Tp, typename _TVT =
*** 2023,2030 ****
  // }}}
  // __concat{{{
  template <typename _Tp, typename _TVT = _VectorTraits<_Tp>,
! 	  typename _R = __vector_type_t<typename _TVT::value_type,
! 					_TVT::_S_full_size * 2>>
    constexpr _R
    __concat(_Tp a_, _Tp b_)
    {
--- 2029,2035 ----
  // }}}
  // __concat{{{
  template <typename _Tp, typename _TVT = _VectorTraits<_Tp>,
! 	  typename _R = __vector_type_t<typename _TVT::value_type, _TVT::_S_full_size * 2>>
    constexpr _R
    __concat(_Tp a_, _Tp b_)
    {
*************** template <int _Offset,
*** 2168,2175 ****
  	  int _SplitBy,
  	  typename _Tp,
  	  typename _TVT = _VectorTraits<_Tp>,
! 	  typename _R = __vector_type_t<typename _TVT::value_type,
! 			  _TVT::_S_full_size / _SplitBy>>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __extract(_Tp __in)
    {
--- 2173,2179 ----
  	  int _SplitBy,
  	  typename _Tp,
  	  typename _TVT = _VectorTraits<_Tp>,
! 	  typename _R = __vector_type_t<typename _TVT::value_type, _TVT::_S_full_size / _SplitBy>>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __extract(_Tp __in)
    {
*************** template <int _Offset,
*** 2206,2212 ****
  #endif
  	constexpr int _O = _Offset * __return_width;
  	return __call_with_subscripts<__return_width, _O>(
! 	  __x, [](auto... __entries) {
  	    return reinterpret_cast<_R>(_Up{__entries...});
  	  });
        }
--- 2210,2216 ----
  #endif
  	constexpr int _O = _Offset * __return_width;
  	return __call_with_subscripts<__return_width, _O>(
! 	  __x, [](auto... __entries) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	    return reinterpret_cast<_R>(_Up{__entries...});
  	  });
        }
*************** template <int _Offset,
*** 2215,2222 ****
  // }}}
  // __lo/__hi64[z]{{{
  template <typename _Tp,
! 	  typename _R
! 	  = __vector_type8_t<typename _VectorTraits<_Tp>::value_type>>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __lo64(_Tp __x)
    {
--- 2219,2225 ----
  // }}}
  // __lo/__hi64[z]{{{
  template <typename _Tp,
! 	  typename _R = __vector_type8_t<typename _VectorTraits<_Tp>::value_type>>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __lo64(_Tp __x)
    {
*************** template <typename _Tp,
*** 2226,2233 ****
    }
  
  template <typename _Tp,
! 	  typename _R
! 	  = __vector_type8_t<typename _VectorTraits<_Tp>::value_type>>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __hi64(_Tp __x)
    {
--- 2229,2235 ----
    }
  
  template <typename _Tp,
! 	  typename _R = __vector_type8_t<typename _VectorTraits<_Tp>::value_type>>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __hi64(_Tp __x)
    {
*************** template <typename _Tp,
*** 2238,2245 ****
    }
  
  template <typename _Tp,
! 	  typename _R
! 	  = __vector_type8_t<typename _VectorTraits<_Tp>::value_type>>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __hi64z([[maybe_unused]] _Tp __x)
    {
--- 2240,2246 ----
    }
  
  template <typename _Tp,
! 	  typename _R = __vector_type8_t<typename _VectorTraits<_Tp>::value_type>>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __hi64z([[maybe_unused]] _Tp __x)
    {
*************** template <>
*** 2350,2367 ****
  // the following excludes bool via __is_vectorizable
  #if _GLIBCXX_SIMD_HAVE_SSE
  template <typename _Tp, size_t _Bytes>
!   struct __intrinsic_type<_Tp, _Bytes,
! 			  enable_if_t<__is_vectorizable_v<_Tp> && _Bytes <= 64>>
    {
      static_assert(!is_same_v<_Tp, long double>,
  		  "no __intrinsic_type support for long double on x86");
  
!     static constexpr size_t _S_VBytes = _Bytes <= 16   ? 16
! 					: _Bytes <= 32 ? 32
! 						       : 64;
  
      using type [[__gnu__::__vector_size__(_S_VBytes)]]
!     = conditional_t<is_integral_v<_Tp>, long long int, _Tp>;
    };
  #endif // _GLIBCXX_SIMD_HAVE_SSE
  
--- 2351,2365 ----
  // the following excludes bool via __is_vectorizable
  #if _GLIBCXX_SIMD_HAVE_SSE
  template <typename _Tp, size_t _Bytes>
!   struct __intrinsic_type<_Tp, _Bytes, enable_if_t<__is_vectorizable_v<_Tp> && _Bytes <= 64>>
    {
      static_assert(!is_same_v<_Tp, long double>,
  		  "no __intrinsic_type support for long double on x86");
  
!     static constexpr size_t _S_VBytes = _Bytes <= 16 ? 16 : _Bytes <= 32 ? 32 : 64;
  
      using type [[__gnu__::__vector_size__(_S_VBytes)]]
!       = conditional_t<is_integral_v<_Tp>, long long int, _Tp>;
    };
  #endif // _GLIBCXX_SIMD_HAVE_SSE
  
*************** template <>
*** 2377,2391 ****
    struct __intrinsic_type<float, 16, void>
    { using type = float32x4_t; };
  
- #if _GLIBCXX_SIMD_HAVE_NEON_A64
  template <>
    struct __intrinsic_type<double, 8, void>
!   { using type = float64x1_t; };
  
  template <>
    struct __intrinsic_type<double, 16, void>
!   { using type = float64x2_t; };
  #endif
  
  #define _GLIBCXX_SIMD_ARM_INTRIN(_Bits, _Np)                                   \
  template <>                                                                    \
--- 2375,2395 ----
    struct __intrinsic_type<float, 16, void>
    { using type = float32x4_t; };
  
  template <>
    struct __intrinsic_type<double, 8, void>
!   {
! #if _GLIBCXX_SIMD_HAVE_NEON_A64
!    using type = float64x1_t;
! #endif
!   };
  
  template <>
    struct __intrinsic_type<double, 16, void>
!   {
! #if _GLIBCXX_SIMD_HAVE_NEON_A64
!     using type = float64x2_t;
  #endif
+   };
  
  #define _GLIBCXX_SIMD_ARM_INTRIN(_Bits, _Np)                                   \
  template <>                                                                    \
*************** _GLIBCXX_SIMD_ARM_INTRIN(64, 2);
*** 2407,2422 ****
  #undef _GLIBCXX_SIMD_ARM_INTRIN
  
  template <typename _Tp, size_t _Bytes>
!   struct __intrinsic_type<_Tp, _Bytes,
! 			  enable_if_t<__is_vectorizable_v<_Tp> && _Bytes <= 16>>
    {
      static constexpr int _SVecBytes = _Bytes <= 8 ? 8 : 16;
      using _Ip = __int_for_sizeof_t<_Tp>;
      using _Up = conditional_t<
        is_floating_point_v<_Tp>, _Tp,
        conditional_t<is_unsigned_v<_Tp>, make_unsigned_t<_Ip>, _Ip>>;
      static_assert(!is_same_v<_Tp, _Up> || _SVecBytes != _Bytes,
  		  "should use explicit specialization above");
      using type = typename __intrinsic_type<_Up, _SVecBytes>::type;
    };
  #endif // _GLIBCXX_SIMD_HAVE_NEON
--- 2411,2429 ----
  #undef _GLIBCXX_SIMD_ARM_INTRIN
  
  template <typename _Tp, size_t _Bytes>
!   struct __intrinsic_type<_Tp, _Bytes, enable_if_t<__is_vectorizable_v<_Tp> && _Bytes <= 16>>
    {
      static constexpr int _SVecBytes = _Bytes <= 8 ? 8 : 16;
+ 
      using _Ip = __int_for_sizeof_t<_Tp>;
+ 
      using _Up = conditional_t<
        is_floating_point_v<_Tp>, _Tp,
        conditional_t<is_unsigned_v<_Tp>, make_unsigned_t<_Ip>, _Ip>>;
+ 
      static_assert(!is_same_v<_Tp, _Up> || _SVecBytes != _Bytes,
  		  "should use explicit specialization above");
+ 
      using type = typename __intrinsic_type<_Up, _SVecBytes>::type;
    };
  #endif // _GLIBCXX_SIMD_HAVE_NEON
*************** _GLIBCXX_SIMD_PPC_INTRIN(unsigned long l
*** 2451,2473 ****
  #undef _GLIBCXX_SIMD_PPC_INTRIN
  
  template <typename _Tp, size_t _Bytes>
!   struct __intrinsic_type<_Tp, _Bytes,
! 			  enable_if_t<__is_vectorizable_v<_Tp> && _Bytes <= 16>>
    {
      static constexpr bool _S_is_ldouble = is_same_v<_Tp, long double>;
      // allow _Tp == long double with -mlong-double-64
      static_assert(!(_S_is_ldouble && sizeof(long double) > sizeof(double)),
  		  "no __intrinsic_type support for 128-bit floating point on PowerPC");
  #ifndef __VSX__
      static_assert(!(is_same_v<_Tp, double>
  		    || (_S_is_ldouble && sizeof(long double) == sizeof(double))),
  		  "no __intrinsic_type support for 64-bit floating point on PowerPC w/o VSX");
  #endif
!     using type =
!       typename __intrinsic_type_impl<
! 		 conditional_t<is_floating_point_v<_Tp>,
! 			       conditional_t<_S_is_ldouble, double, _Tp>,
! 			       __int_for_sizeof_t<_Tp>>>::type;
    };
  #endif // __ALTIVEC__
  
--- 2458,2511 ----
  #undef _GLIBCXX_SIMD_PPC_INTRIN
  
  template <typename _Tp, size_t _Bytes>
!   struct __intrinsic_type<_Tp, _Bytes, enable_if_t<__is_vectorizable_v<_Tp> && _Bytes <= 16>>
    {
      static constexpr bool _S_is_ldouble = is_same_v<_Tp, long double>;
+ 
      // allow _Tp == long double with -mlong-double-64
      static_assert(!(_S_is_ldouble && sizeof(long double) > sizeof(double)),
  		  "no __intrinsic_type support for 128-bit floating point on PowerPC");
+ 
  #ifndef __VSX__
      static_assert(!(is_same_v<_Tp, double>
  		    || (_S_is_ldouble && sizeof(long double) == sizeof(double))),
  		  "no __intrinsic_type support for 64-bit floating point on PowerPC w/o VSX");
  #endif
! 
!     static constexpr auto __element_type()
!     {
!       if constexpr (is_floating_point_v<_Tp>)
! 	{
! 	  if constexpr (_S_is_ldouble)
! 	    return double {};
! 	  else
! 	    return _Tp {};
! 	}
!       else if constexpr (is_signed_v<_Tp>)
! 	{
! 	  if constexpr (sizeof(_Tp) == sizeof(_SChar))
! 	    return _SChar {};
! 	  else if constexpr (sizeof(_Tp) == sizeof(short))
! 	    return short {};
! 	  else if constexpr (sizeof(_Tp) == sizeof(int))
! 	    return int {};
! 	  else if constexpr (sizeof(_Tp) == sizeof(_LLong))
! 	    return _LLong {};
! 	}
!       else
! 	{
! 	  if constexpr (sizeof(_Tp) == sizeof(_UChar))
! 	    return _UChar {};
! 	  else if constexpr (sizeof(_Tp) == sizeof(_UShort))
! 	    return _UShort {};
! 	  else if constexpr (sizeof(_Tp) == sizeof(_UInt))
! 	    return _UInt {};
! 	  else if constexpr (sizeof(_Tp) == sizeof(_ULLong))
! 	    return _ULLong {};
! 	}
!     }
! 
!     using type = typename __intrinsic_type_impl<decltype(__element_type())>::type;
    };
  #endif // __ALTIVEC__
  
*************** template <size_t _Width>
*** 2483,2504 ****
      static constexpr size_t _S_full_size = sizeof(_BuiltinType) * __CHAR_BIT__;
  
      _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper<bool, _S_full_size>
!     __as_full_vector() const { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper() = default;
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper(_BuiltinType __k)
!       : _M_data(__k) {};
  
!     _GLIBCXX_SIMD_INTRINSIC operator const _BuiltinType&() const
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC operator _BuiltinType&()
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC _BuiltinType __intrin() const
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr value_type operator[](size_t __i) const
      { return _M_data & (_BuiltinType(1) << __i); }
  
      template <size_t __i>
--- 2521,2549 ----
      static constexpr size_t _S_full_size = sizeof(_BuiltinType) * __CHAR_BIT__;
  
      _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper<bool, _S_full_size>
!     __as_full_vector() const
!     { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapper() = default;
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapper(_BuiltinType __k) : _M_data(__k) {};
! 
!     _GLIBCXX_SIMD_INTRINSIC
!     operator const _BuiltinType&() const
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC
!     operator _BuiltinType&()
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC _BuiltinType
!     __intrin() const
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr value_type
!     operator[](size_t __i) const
      { return _M_data & (_BuiltinType(1) << __i); }
  
      template <size_t __i>
*************** template <size_t _Width>
*** 2506,2512 ****
        operator[](_SizeConstant<__i>) const
        { return _M_data & (_BuiltinType(1) << __i); }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr void _M_set(size_t __i, value_type __x)
      {
        if (__x)
  	_M_data |= (_BuiltinType(1) << __i);
--- 2551,2558 ----
        operator[](_SizeConstant<__i>) const
        { return _M_data & (_BuiltinType(1) << __i); }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr void
!     _M_set(size_t __i, value_type __x)
      {
        if (__x)
  	_M_data |= (_BuiltinType(1) << __i);
*************** template <size_t _Width>
*** 2514,2524 ****
  	_M_data &= ~(_BuiltinType(1) << __i);
      }
  
!     _GLIBCXX_SIMD_INTRINSIC
!     constexpr bool _M_is_constprop() const
      { return __builtin_constant_p(_M_data); }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr bool _M_is_constprop_none_of() const
      {
        if (__builtin_constant_p(_M_data))
  	{
--- 2560,2571 ----
  	_M_data &= ~(_BuiltinType(1) << __i);
      }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr bool
!     _M_is_constprop() const
      { return __builtin_constant_p(_M_data); }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr bool
!     _M_is_constprop_none_of() const
      {
        if (__builtin_constant_p(_M_data))
  	{
*************** template <size_t _Width>
*** 2530,2536 ****
        return false;
      }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr bool _M_is_constprop_all_of() const
      {
        if (__builtin_constant_p(_M_data))
  	{
--- 2577,2584 ----
        return false;
      }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr bool
!     _M_is_constprop_all_of() const
      {
        if (__builtin_constant_p(_M_data))
  	{
*************** template <bool _MustZeroInitPadding, typ
*** 2552,2561 ****
  template <typename _BuiltinType>
    struct _SimdWrapperBase<false, _BuiltinType> // no padding or no SNaNs
    {
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapperBase() = default;
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapperBase(_BuiltinType __init)
!       : _M_data(__init)
!     {}
  
      _BuiltinType _M_data;
    };
--- 2600,2610 ----
  template <typename _BuiltinType>
    struct _SimdWrapperBase<false, _BuiltinType> // no padding or no SNaNs
    {
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapperBase() = default;
! 
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapperBase(_BuiltinType __init) : _M_data(__init) {}
  
      _BuiltinType _M_data;
    };
*************** template <typename _BuiltinType>
*** 2564,2573 ****
    struct _SimdWrapperBase<true, _BuiltinType> // with padding that needs to
  					      // never become SNaN
    {
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapperBase() : _M_data() {}
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapperBase(_BuiltinType __init)
!       : _M_data(__init)
!     {}
  
      _BuiltinType _M_data;
    };
--- 2613,2623 ----
    struct _SimdWrapperBase<true, _BuiltinType> // with padding that needs to
  					      // never become SNaN
    {
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapperBase() : _M_data() {}
! 
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapperBase(_BuiltinType __init) : _M_data(__init) {}
  
      _BuiltinType _M_data;
    };
*************** template <typename _Tp, size_t _Width>
*** 2606,2629 ****
      __as_full_vector() const
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper(initializer_list<_Tp> __init)
!       : _Base(__generate_from_n_evaluations<_Width, _BuiltinType>(
! 	[&](auto __i) { return __init.begin()[__i.value]; })) {}
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper() = default;
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper(const _SimdWrapper&)
!       = default;
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper(_SimdWrapper&&) = default;
  
      _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper&
      operator=(const _SimdWrapper&) = default;
      _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper&
      operator=(_SimdWrapper&&) = default;
  
      template <typename _V, typename = enable_if_t<disjunction_v<
  			     is_same<_V, __vector_type_t<_Tp, _Width>>,
  			     is_same<_V, __intrinsic_type_t<_Tp, _Width>>>>>
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper(_V __x)
        // __vector_bitcast can convert e.g. __m128 to __vector(2) float
        : _Base(__vector_bitcast<_Tp, _Width>(__x)) {}
  
--- 2656,2688 ----
      __as_full_vector() const
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapper(initializer_list<_Tp> __init)
!     : _Base(__generate_from_n_evaluations<_Width, _BuiltinType>(
! 	      [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		return __init.begin()[__i.value];
! 	      })) {}
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapper() = default;
! 
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapper(const _SimdWrapper&) = default;
! 
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapper(_SimdWrapper&&) = default;
  
      _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper&
      operator=(const _SimdWrapper&) = default;
+ 
      _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper&
      operator=(_SimdWrapper&&) = default;
  
      template <typename _V, typename = enable_if_t<disjunction_v<
  			     is_same<_V, __vector_type_t<_Tp, _Width>>,
  			     is_same<_V, __intrinsic_type_t<_Tp, _Width>>>>>
!       _GLIBCXX_SIMD_INTRINSIC constexpr
!       _SimdWrapper(_V __x)
        // __vector_bitcast can convert e.g. __m128 to __vector(2) float
        : _Base(__vector_bitcast<_Tp, _Width>(__x)) {}
  
*************** template <typename _Tp, size_t _Width>
*** 2633,2665 ****
        _GLIBCXX_SIMD_INTRINSIC constexpr
        operator _SimdTuple<_Tp, _As...>() const
        {
! 	const auto& dd = _M_data; // workaround for GCC7 ICE
! 	return __generate_from_n_evaluations<sizeof...(_As),
! 					     _SimdTuple<_Tp, _As...>>([&](
! 	  auto __i) constexpr { return dd[int(__i)]; });
        }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr operator const _BuiltinType&() const
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr operator _BuiltinType&()
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr _Tp operator[](size_t __i) const
      { return _M_data[__i]; }
  
      template <size_t __i>
!       _GLIBCXX_SIMD_INTRINSIC constexpr _Tp operator[](_SizeConstant<__i>) const
        { return _M_data[__i]; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr void _M_set(size_t __i, _Tp __x)
!     { _M_data[__i] = __x; }
  
      _GLIBCXX_SIMD_INTRINSIC
!     constexpr bool _M_is_constprop() const
      { return __builtin_constant_p(_M_data); }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr bool _M_is_constprop_none_of() const
      {
        if (__builtin_constant_p(_M_data))
  	{
--- 2692,2737 ----
        _GLIBCXX_SIMD_INTRINSIC constexpr
        operator _SimdTuple<_Tp, _As...>() const
        {
! 	return __generate_from_n_evaluations<sizeof...(_As), _SimdTuple<_Tp, _As...>>(
! 		 [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA
! 		 { return _M_data[int(__i)]; });
        }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     operator const _BuiltinType&() const
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     operator _BuiltinType&()
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr _Tp
!     operator[](size_t __i) const
      { return _M_data[__i]; }
  
      template <size_t __i>
!       _GLIBCXX_SIMD_INTRINSIC constexpr _Tp
!       operator[](_SizeConstant<__i>) const
        { return _M_data[__i]; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr void
!     _M_set(size_t __i, _Tp __x)
!     {
!       if (__builtin_is_constant_evaluated())
! 	_M_data = __generate_from_n_evaluations<_Width, _BuiltinType>([&](auto __j) {
! 		    return __j == __i ? __x : _M_data[__j()];
! 		  });
!       else
! 	_M_data[__i] = __x;
!     }
  
      _GLIBCXX_SIMD_INTRINSIC
!     constexpr bool
!     _M_is_constprop() const
      { return __builtin_constant_p(_M_data); }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr bool
!     _M_is_constprop_none_of() const
      {
        if (__builtin_constant_p(_M_data))
  	{
*************** template <typename _Tp, size_t _Width>
*** 2680,2686 ****
        return false;
      }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr bool _M_is_constprop_all_of() const
      {
        if (__builtin_constant_p(_M_data))
  	{
--- 2752,2759 ----
        return false;
      }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr bool
!     _M_is_constprop_all_of() const
      {
        if (__builtin_constant_p(_M_data))
  	{
*************** template <typename _Tp>
*** 2812,2817 ****
--- 2885,2916 ----
  } // namespace simd_abi
  
  // traits {{{1
+ template <typename _Tp>
+   struct is_simd_flag_type
+   : false_type
+   {};
+ 
+ template <>
+   struct is_simd_flag_type<element_aligned_tag>
+   : true_type
+   {};
+ 
+ template <>
+   struct is_simd_flag_type<vector_aligned_tag>
+   : true_type
+   {};
+ 
+ template <size_t _Np>
+   struct is_simd_flag_type<overaligned_tag<_Np>>
+   : __bool_constant<(_Np > 0) and __has_single_bit(_Np)>
+   {};
+ 
+ template <typename _Tp>
+   inline constexpr bool is_simd_flag_type_v = is_simd_flag_type<_Tp>::value;
+ 
+ template <typename _Tp, typename = enable_if_t<is_simd_flag_type_v<_Tp>>>
+   using _IsSimdFlagType = _Tp;
+ 
  // is_abi_tag {{{2
  template <typename _Tp, typename = void_t<>>
    struct is_abi_tag : false_type {};
*************** template <typename _Tp, typename _V, typ
*** 2878,2899 ****
    struct rebind_simd;
  
  template <typename _Tp, typename _Up, typename _Abi>
!   struct rebind_simd<
!     _Tp, simd<_Up, _Abi>,
!     void_t<simd_abi::deduce_t<_Tp, simd_size_v<_Up, _Abi>, _Abi>>>
!   {
!     using type
!       = simd<_Tp, simd_abi::deduce_t<_Tp, simd_size_v<_Up, _Abi>, _Abi>>;
!   };
  
  template <typename _Tp, typename _Up, typename _Abi>
!   struct rebind_simd<
!     _Tp, simd_mask<_Up, _Abi>,
!     void_t<simd_abi::deduce_t<_Tp, simd_size_v<_Up, _Abi>, _Abi>>>
!   {
!     using type
!       = simd_mask<_Tp, simd_abi::deduce_t<_Tp, simd_size_v<_Up, _Abi>, _Abi>>;
!   };
  
  template <typename _Tp, typename _V>
    using rebind_simd_t = typename rebind_simd<_Tp, _V>::type;
--- 2977,2990 ----
    struct rebind_simd;
  
  template <typename _Tp, typename _Up, typename _Abi>
!   struct rebind_simd<_Tp, simd<_Up, _Abi>,
! 		     void_t<simd_abi::deduce_t<_Tp, simd_size_v<_Up, _Abi>, _Abi>>>
!   { using type = simd<_Tp, simd_abi::deduce_t<_Tp, simd_size_v<_Up, _Abi>, _Abi>>; };
  
  template <typename _Tp, typename _Up, typename _Abi>
!   struct rebind_simd<_Tp, simd_mask<_Up, _Abi>,
! 		     void_t<simd_abi::deduce_t<_Tp, simd_size_v<_Up, _Abi>, _Abi>>>
!   { using type = simd_mask<_Tp, simd_abi::deduce_t<_Tp, simd_size_v<_Up, _Abi>, _Abi>>; };
  
  template <typename _Tp, typename _V>
    using rebind_simd_t = typename rebind_simd<_Tp, _V>::type;
*************** template <int _Np, typename _V, typename
*** 2903,2915 ****
    struct resize_simd;
  
  template <int _Np, typename _Tp, typename _Abi>
!   struct resize_simd<_Np, simd<_Tp, _Abi>,
! 		     void_t<simd_abi::deduce_t<_Tp, _Np, _Abi>>>
    { using type = simd<_Tp, simd_abi::deduce_t<_Tp, _Np, _Abi>>; };
  
  template <int _Np, typename _Tp, typename _Abi>
!   struct resize_simd<_Np, simd_mask<_Tp, _Abi>,
! 		     void_t<simd_abi::deduce_t<_Tp, _Np, _Abi>>>
    { using type = simd_mask<_Tp, simd_abi::deduce_t<_Tp, _Np, _Abi>>; };
  
  template <int _Np, typename _V>
--- 2994,3004 ----
    struct resize_simd;
  
  template <int _Np, typename _Tp, typename _Abi>
!   struct resize_simd<_Np, simd<_Tp, _Abi>, void_t<simd_abi::deduce_t<_Tp, _Np, _Abi>>>
    { using type = simd<_Tp, simd_abi::deduce_t<_Tp, _Np, _Abi>>; };
  
  template <int _Np, typename _Tp, typename _Abi>
!   struct resize_simd<_Np, simd_mask<_Tp, _Abi>, void_t<simd_abi::deduce_t<_Tp, _Np, _Abi>>>
    { using type = simd_mask<_Tp, simd_abi::deduce_t<_Tp, _Np, _Abi>>; };
  
  template <int _Np, typename _V>
*************** template <typename _Tp, size_t _Np>
*** 2958,2970 ****
  
  // casts [simd.casts] {{{1
  // static_simd_cast {{{2
! template <typename _Tp, typename _Up, typename _Ap, bool = is_simd_v<_Tp>,
! 	  typename = void>
    struct __static_simd_cast_return_type;
  
  template <typename _Tp, typename _A0, typename _Up, typename _Ap>
!   struct __static_simd_cast_return_type<simd_mask<_Tp, _A0>, _Up, _Ap, false,
! 					void>
    : __static_simd_cast_return_type<simd<_Tp, _A0>, _Up, _Ap> {};
  
  template <typename _Tp, typename _Up, typename _Ap>
--- 3047,3057 ----
  
  // casts [simd.casts] {{{1
  // static_simd_cast {{{2
! template <typename _Tp, typename _Up, typename _Ap, bool = is_simd_v<_Tp>, typename = void>
    struct __static_simd_cast_return_type;
  
  template <typename _Tp, typename _A0, typename _Up, typename _Ap>
!   struct __static_simd_cast_return_type<simd_mask<_Tp, _A0>, _Up, _Ap, false, void>
    : __static_simd_cast_return_type<simd<_Tp, _A0>, _Up, _Ap> {};
  
  template <typename _Tp, typename _Up, typename _Ap>
*************** template <typename _Tp, typename _Up, ty
*** 3147,3152 ****
--- 3234,3243 ----
    {
      if constexpr (is_same_v<typename _Tp::abi_type, _Ap>)
        return __x;
+     else if (__builtin_is_constant_evaluated())
+       return _Tp([&](auto __i) constexpr {
+ 	       return __i < simd_size_v<_Up, _Ap> ? __x[__i] : _Up();
+ 	     });
      else if constexpr (simd_size_v<_Up, _Ap> == 1)
        {
  	_Tp __r{};
*************** template <typename _Tp, int _Np>
*** 3193,3213 ****
    { return __x; }
  
  template <typename _Tp, typename _Ap>
!   _GLIBCXX_SIMD_INTRINSIC auto
    to_fixed_size(const simd<_Tp, _Ap>& __x)
    {
!     return simd<_Tp, simd_abi::fixed_size<simd_size_v<_Tp, _Ap>>>([&__x](
!       auto __i) constexpr { return __x[__i]; });
    }
  
  template <typename _Tp, typename _Ap>
!   _GLIBCXX_SIMD_INTRINSIC auto
    to_fixed_size(const simd_mask<_Tp, _Ap>& __x)
    {
!     constexpr int _Np = simd_mask<_Tp, _Ap>::size();
!     fixed_size_simd_mask<_Tp, _Np> __r;
!     __execute_n_times<_Np>([&](auto __i) constexpr { __r[__i] = __x[__i]; });
!     return __r;
    }
  
  // to_native {{{2
--- 3284,3302 ----
    { return __x; }
  
  template <typename _Tp, typename _Ap>
!   _GLIBCXX_SIMD_INTRINSIC fixed_size_simd<_Tp, simd_size_v<_Tp, _Ap>>
    to_fixed_size(const simd<_Tp, _Ap>& __x)
    {
!     using _Rp = fixed_size_simd<_Tp, simd_size_v<_Tp, _Ap>>;
!     return _Rp([&__x](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return __x[__i]; });
    }
  
  template <typename _Tp, typename _Ap>
!   _GLIBCXX_SIMD_INTRINSIC fixed_size_simd_mask<_Tp, simd_size_v<_Tp, _Ap>>
    to_fixed_size(const simd_mask<_Tp, _Ap>& __x)
    {
!     return {__private_init,
! 	    [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return __x[__i]; }};
    }
  
  // to_native {{{2
*************** template <typename _Tp, int _Np>
*** 3221,3236 ****
      return {__mem, vector_aligned};
    }
  
! template <typename _Tp, size_t _Np>
    _GLIBCXX_SIMD_INTRINSIC
    enable_if_t<(_Np == native_simd_mask<_Tp>::size()), native_simd_mask<_Tp>>
    to_native(const fixed_size_simd_mask<_Tp, _Np>& __x)
    {
!     return native_simd_mask<_Tp>([&](auto __i) constexpr { return __x[__i]; });
    }
  
  // to_compatible {{{2
! template <typename _Tp, size_t _Np>
    _GLIBCXX_SIMD_INTRINSIC enable_if_t<(_Np == simd<_Tp>::size()), simd<_Tp>>
    to_compatible(const simd<_Tp, simd_abi::fixed_size<_Np>>& __x)
    {
--- 3310,3327 ----
      return {__mem, vector_aligned};
    }
  
! template <typename _Tp, int _Np>
    _GLIBCXX_SIMD_INTRINSIC
    enable_if_t<(_Np == native_simd_mask<_Tp>::size()), native_simd_mask<_Tp>>
    to_native(const fixed_size_simd_mask<_Tp, _Np>& __x)
    {
!     return native_simd_mask<_Tp>(
! 	     __private_init,
! 	     [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return __x[__i]; });
    }
  
  // to_compatible {{{2
! template <typename _Tp, int _Np>
    _GLIBCXX_SIMD_INTRINSIC enable_if_t<(_Np == simd<_Tp>::size()), simd<_Tp>>
    to_compatible(const simd<_Tp, simd_abi::fixed_size<_Np>>& __x)
    {
*************** template <typename _Tp, size_t _Np>
*** 3239,3249 ****
      return {__mem, vector_aligned};
    }
  
! template <typename _Tp, size_t _Np>
    _GLIBCXX_SIMD_INTRINSIC
    enable_if_t<(_Np == simd_mask<_Tp>::size()), simd_mask<_Tp>>
    to_compatible(const simd_mask<_Tp, simd_abi::fixed_size<_Np>>& __x)
!   { return simd_mask<_Tp>([&](auto __i) constexpr { return __x[__i]; }); }
  
  // masked assignment [simd_mask.where] {{{1
  
--- 3330,3344 ----
      return {__mem, vector_aligned};
    }
  
! template <typename _Tp, int _Np>
    _GLIBCXX_SIMD_INTRINSIC
    enable_if_t<(_Np == simd_mask<_Tp>::size()), simd_mask<_Tp>>
    to_compatible(const simd_mask<_Tp, simd_abi::fixed_size<_Np>>& __x)
!   {
!     return simd_mask<_Tp>(
! 	     __private_init,
! 	     [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return __x[__i]; });
!   }
  
  // masked assignment [simd_mask.where] {{{1
  
*************** template <typename _M, typename _Tp>
*** 3276,3287 ****
  
    public:
      const_where_expression(const const_where_expression&) = delete;
      const_where_expression& operator=(const const_where_expression&) = delete;
  
!     _GLIBCXX_SIMD_INTRINSIC const_where_expression(const _M& __kk, const _Tp& dd)
!       : _M_k(__kk), _M_value(const_cast<_Tp&>(dd)) {}
  
!     _GLIBCXX_SIMD_INTRINSIC _V
      operator-() const&&
      {
        return {__private_init,
--- 3371,3384 ----
  
    public:
      const_where_expression(const const_where_expression&) = delete;
+ 
      const_where_expression& operator=(const const_where_expression&) = delete;
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     const_where_expression(const _M& __kk, const _Tp& dd)
!     : _M_k(__kk), _M_value(const_cast<_Tp&>(dd)) {}
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _V
      operator-() const&&
      {
        return {__private_init,
*************** template <typename _M, typename _Tp>
*** 3290,3297 ****
      }
  
      template <typename _Up, typename _Flags>
!       [[nodiscard]] _GLIBCXX_SIMD_INTRINSIC _V
!       copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _Flags) const&&
        {
  	return {__private_init,
  		_Impl::_S_masked_load(__data(_M_value), __data(_M_k),
--- 3387,3394 ----
      }
  
      template <typename _Up, typename _Flags>
!       [[nodiscard]] _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _V
!       copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _IsSimdFlagType<_Flags>) const&&
        {
  	return {__private_init,
  		_Impl::_S_masked_load(__data(_M_value), __data(_M_k),
*************** template <typename _M, typename _Tp>
*** 3299,3306 ****
        }
  
      template <typename _Up, typename _Flags>
!       _GLIBCXX_SIMD_INTRINSIC void
!       copy_to(_LoadStorePtr<_Up, value_type>* __mem, _Flags) const&&
        {
  	_Impl::_S_masked_store(__data(_M_value),
  			       _Flags::template _S_apply<_V>(__mem),
--- 3396,3403 ----
        }
  
      template <typename _Up, typename _Flags>
!       _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!       copy_to(_LoadStorePtr<_Up, value_type>* __mem, _IsSimdFlagType<_Flags>) const&&
        {
  	_Impl::_S_masked_store(__data(_M_value),
  			       _Flags::template _S_apply<_V>(__mem),
*************** template <typename _Tp>
*** 3320,3327 ****
      struct _Wrapper { using value_type = _V; };
  
    protected:
!     using value_type =
!       typename conditional_t<is_arithmetic_v<_V>, _Wrapper, _V>::value_type;
  
      _GLIBCXX_SIMD_INTRINSIC friend const _M&
      __get_mask(const const_where_expression& __x)
--- 3417,3424 ----
      struct _Wrapper { using value_type = _V; };
  
    protected:
!     using value_type
!       = typename conditional_t<is_arithmetic_v<_V>, _Wrapper, _V>::value_type;
  
      _GLIBCXX_SIMD_INTRINSIC friend const _M&
      __get_mask(const const_where_expression& __x)
*************** template <typename _Tp>
*** 3338,3357 ****
      const_where_expression(const const_where_expression&) = delete;
      const_where_expression& operator=(const const_where_expression&) = delete;
  
!     _GLIBCXX_SIMD_INTRINSIC const_where_expression(const bool __kk, const _Tp& dd)
!       : _M_k(__kk), _M_value(const_cast<_Tp&>(dd)) {}
  
!     _GLIBCXX_SIMD_INTRINSIC _V operator-() const&&
      { return _M_k ? -_M_value : _M_value; }
  
      template <typename _Up, typename _Flags>
!       [[nodiscard]] _GLIBCXX_SIMD_INTRINSIC _V
!       copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _Flags) const&&
        { return _M_k ? static_cast<_V>(__mem[0]) : _M_value; }
  
      template <typename _Up, typename _Flags>
!       _GLIBCXX_SIMD_INTRINSIC void
!       copy_to(_LoadStorePtr<_Up, value_type>* __mem, _Flags) const&&
        {
  	if (_M_k)
  	  __mem[0] = _M_value;
--- 3435,3456 ----
      const_where_expression(const const_where_expression&) = delete;
      const_where_expression& operator=(const const_where_expression&) = delete;
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     const_where_expression(const bool __kk, const _Tp& dd)
!     : _M_k(__kk), _M_value(const_cast<_Tp&>(dd)) {}
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _V
!     operator-() const&&
      { return _M_k ? -_M_value : _M_value; }
  
      template <typename _Up, typename _Flags>
!       [[nodiscard]] _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _V
!       copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _IsSimdFlagType<_Flags>) const&&
        { return _M_k ? static_cast<_V>(__mem[0]) : _M_value; }
  
      template <typename _Up, typename _Flags>
!       _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!       copy_to(_LoadStorePtr<_Up, value_type>* __mem, _IsSimdFlagType<_Flags>) const&&
        {
  	if (_M_k)
  	  __mem[0] = _M_value;
*************** template <typename _M, typename _Tp>
*** 3376,3393 ****
        is_same<typename _M::abi_type, typename _Tp::abi_type>::value, "");
      static_assert(_M::size() == _Tp::size(), "");
  
!     _GLIBCXX_SIMD_INTRINSIC friend _Tp& __get_lvalue(where_expression& __x)
      { return __x._M_value; }
  
    public:
      where_expression(const where_expression&) = delete;
      where_expression& operator=(const where_expression&) = delete;
  
!     _GLIBCXX_SIMD_INTRINSIC where_expression(const _M& __kk, _Tp& dd)
!       : const_where_expression<_M, _Tp>(__kk, dd) {}
  
      template <typename _Up>
!       _GLIBCXX_SIMD_INTRINSIC void operator=(_Up&& __x) &&
        {
  	_Impl::_S_masked_assign(__data(_M_k), __data(_M_value),
  				__to_value_type_or_member_type<_Tp>(
--- 3475,3495 ----
        is_same<typename _M::abi_type, typename _Tp::abi_type>::value, "");
      static_assert(_M::size() == _Tp::size(), "");
  
!     _GLIBCXX_SIMD_INTRINSIC friend constexpr _Tp&
!     __get_lvalue(where_expression& __x)
      { return __x._M_value; }
  
    public:
      where_expression(const where_expression&) = delete;
      where_expression& operator=(const where_expression&) = delete;
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR
!     where_expression(const _M& __kk, _Tp& dd)
!     : const_where_expression<_M, _Tp>(__kk, dd) {}
  
      template <typename _Up>
!       _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!       operator=(_Up&& __x) &&
        {
  	_Impl::_S_masked_assign(__data(_M_k), __data(_M_value),
  				__to_value_type_or_member_type<_Tp>(
*************** template <typename _M, typename _Tp>
*** 3396,3409 ****
  
  #define _GLIBCXX_SIMD_OP_(__op, __name)                                        \
    template <typename _Up>                                                      \
!     _GLIBCXX_SIMD_INTRINSIC void operator __op##=(_Up&& __x)&&                 \
      {                                                                          \
        _Impl::template _S_masked_cassign(                                       \
  	__data(_M_k), __data(_M_value),                                        \
  	__to_value_type_or_member_type<_Tp>(static_cast<_Up&&>(__x)),          \
! 	[](auto __impl, auto __lhs, auto __rhs) constexpr {                    \
! 	return __impl.__name(__lhs, __rhs);                                    \
! 	});                                                                    \
      }                                                                          \
    static_assert(true)
      _GLIBCXX_SIMD_OP_(+, _S_plus);
--- 3498,3512 ----
  
  #define _GLIBCXX_SIMD_OP_(__op, __name)                                        \
    template <typename _Up>                                                      \
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void                       \
!     operator __op##=(_Up&& __x)&&                                              \
      {                                                                          \
        _Impl::template _S_masked_cassign(                                       \
  	__data(_M_k), __data(_M_value),                                        \
  	__to_value_type_or_member_type<_Tp>(static_cast<_Up&&>(__x)),          \
! 	[](auto __impl, auto __lhs, auto __rhs)                                \
! 	  constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA                         \
! 	{ return __impl.__name(__lhs, __rhs); });                              \
      }                                                                          \
    static_assert(true)
      _GLIBCXX_SIMD_OP_(+, _S_plus);
*************** template <typename _M, typename _Tp>
*** 3418,3465 ****
      _GLIBCXX_SIMD_OP_(>>, _S_shift_right);
  #undef _GLIBCXX_SIMD_OP_
  
!     _GLIBCXX_SIMD_INTRINSIC void operator++() &&
      {
        __data(_M_value)
! 	= _Impl::template _S_masked_unary<__increment>(__data(_M_k),
! 						       __data(_M_value));
      }
  
!     _GLIBCXX_SIMD_INTRINSIC void operator++(int) &&
      {
        __data(_M_value)
! 	= _Impl::template _S_masked_unary<__increment>(__data(_M_k),
! 						       __data(_M_value));
      }
  
!     _GLIBCXX_SIMD_INTRINSIC void operator--() &&
      {
        __data(_M_value)
! 	= _Impl::template _S_masked_unary<__decrement>(__data(_M_k),
! 						       __data(_M_value));
      }
  
!     _GLIBCXX_SIMD_INTRINSIC void operator--(int) &&
      {
        __data(_M_value)
! 	= _Impl::template _S_masked_unary<__decrement>(__data(_M_k),
! 						       __data(_M_value));
      }
  
      // intentionally hides const_where_expression::copy_from
      template <typename _Up, typename _Flags>
!       _GLIBCXX_SIMD_INTRINSIC void
!       copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _Flags) &&
        {
! 	__data(_M_value)
! 	  = _Impl::_S_masked_load(__data(_M_value), __data(_M_k),
! 				  _Flags::template _S_apply<_Tp>(__mem));
        }
    };
  
  // where_expression<bool, T> {{{2
  template <typename _Tp>
!   class where_expression<bool, _Tp> : public const_where_expression<bool, _Tp>
    {
      using _M = bool;
      using typename const_where_expression<_M, _Tp>::value_type;
--- 3521,3568 ----
      _GLIBCXX_SIMD_OP_(>>, _S_shift_right);
  #undef _GLIBCXX_SIMD_OP_
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!     operator++() &&
      {
        __data(_M_value)
! 	= _Impl::template _S_masked_unary<__increment>(__data(_M_k), __data(_M_value));
      }
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!     operator++(int) &&
      {
        __data(_M_value)
! 	= _Impl::template _S_masked_unary<__increment>(__data(_M_k), __data(_M_value));
      }
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!     operator--() &&
      {
        __data(_M_value)
! 	= _Impl::template _S_masked_unary<__decrement>(__data(_M_k), __data(_M_value));
      }
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!     operator--(int) &&
      {
        __data(_M_value)
! 	= _Impl::template _S_masked_unary<__decrement>(__data(_M_k), __data(_M_value));
      }
  
      // intentionally hides const_where_expression::copy_from
      template <typename _Up, typename _Flags>
!       _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!       copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _IsSimdFlagType<_Flags>) &&
        {
! 	__data(_M_value) = _Impl::_S_masked_load(__data(_M_value), __data(_M_k),
! 						 _Flags::template _S_apply<_Tp>(__mem));
        }
    };
  
  // where_expression<bool, T> {{{2
  template <typename _Tp>
!   class where_expression<bool, _Tp>
!   : public const_where_expression<bool, _Tp>
    {
      using _M = bool;
      using typename const_where_expression<_M, _Tp>::value_type;
*************** template <typename _Tp>
*** 3470,3481 ****
      where_expression(const where_expression&) = delete;
      where_expression& operator=(const where_expression&) = delete;
  
!     _GLIBCXX_SIMD_INTRINSIC where_expression(const _M& __kk, _Tp& dd)
!       : const_where_expression<_M, _Tp>(__kk, dd) {}
  
  #define _GLIBCXX_SIMD_OP_(__op)                                                \
      template <typename _Up>                                                    \
!       _GLIBCXX_SIMD_INTRINSIC void operator __op(_Up&& __x)&&                  \
        { if (_M_k) _M_value __op static_cast<_Up&&>(__x); }
  
      _GLIBCXX_SIMD_OP_(=)
--- 3573,3586 ----
      where_expression(const where_expression&) = delete;
      where_expression& operator=(const where_expression&) = delete;
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR
!     where_expression(const _M& __kk, _Tp& dd)
!     : const_where_expression<_M, _Tp>(__kk, dd) {}
  
  #define _GLIBCXX_SIMD_OP_(__op)                                                \
      template <typename _Up>                                                    \
!       _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void                     \
!       operator __op(_Up&& __x)&&                                               \
        { if (_M_k) _M_value __op static_cast<_Up&&>(__x); }
  
      _GLIBCXX_SIMD_OP_(=)
*************** template <typename _Tp>
*** 3491,3557 ****
      _GLIBCXX_SIMD_OP_(>>=)
    #undef _GLIBCXX_SIMD_OP_
  
!     _GLIBCXX_SIMD_INTRINSIC void operator++() &&
      { if (_M_k) ++_M_value; }
  
!     _GLIBCXX_SIMD_INTRINSIC void operator++(int) &&
      { if (_M_k) ++_M_value; }
  
!     _GLIBCXX_SIMD_INTRINSIC void operator--() &&
      { if (_M_k) --_M_value; }
  
!     _GLIBCXX_SIMD_INTRINSIC void operator--(int) &&
      { if (_M_k) --_M_value; }
  
      // intentionally hides const_where_expression::copy_from
      template <typename _Up, typename _Flags>
!       _GLIBCXX_SIMD_INTRINSIC void
!       copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _Flags) &&
        { if (_M_k) _M_value = __mem[0]; }
    };
  
  // where {{{1
  template <typename _Tp, typename _Ap>
!   _GLIBCXX_SIMD_INTRINSIC where_expression<simd_mask<_Tp, _Ap>, simd<_Tp, _Ap>>
    where(const typename simd<_Tp, _Ap>::mask_type& __k, simd<_Tp, _Ap>& __value)
    { return {__k, __value}; }
  
  template <typename _Tp, typename _Ap>
!   _GLIBCXX_SIMD_INTRINSIC
!     const_where_expression<simd_mask<_Tp, _Ap>, simd<_Tp, _Ap>>
!     where(const typename simd<_Tp, _Ap>::mask_type& __k,
! 	  const simd<_Tp, _Ap>& __value)
    { return {__k, __value}; }
  
  template <typename _Tp, typename _Ap>
!   _GLIBCXX_SIMD_INTRINSIC
!     where_expression<simd_mask<_Tp, _Ap>, simd_mask<_Tp, _Ap>>
!     where(const remove_const_t<simd_mask<_Tp, _Ap>>& __k,
! 	  simd_mask<_Tp, _Ap>& __value)
    { return {__k, __value}; }
  
  template <typename _Tp, typename _Ap>
!   _GLIBCXX_SIMD_INTRINSIC
!     const_where_expression<simd_mask<_Tp, _Ap>, simd_mask<_Tp, _Ap>>
!     where(const remove_const_t<simd_mask<_Tp, _Ap>>& __k,
! 	  const simd_mask<_Tp, _Ap>& __value)
    { return {__k, __value}; }
  
  template <typename _Tp>
!   _GLIBCXX_SIMD_INTRINSIC where_expression<bool, _Tp>
    where(_ExactBool __k, _Tp& __value)
    { return {__k, __value}; }
  
  template <typename _Tp>
!   _GLIBCXX_SIMD_INTRINSIC const_where_expression<bool, _Tp>
    where(_ExactBool __k, const _Tp& __value)
    { return {__k, __value}; }
  
!   template <typename _Tp, typename _Ap>
!     void where(bool __k, simd<_Tp, _Ap>& __value) = delete;
  
!   template <typename _Tp, typename _Ap>
!     void where(bool __k, const simd<_Tp, _Ap>& __value) = delete;
  
  // proposed mask iterations {{{1
  namespace __proposed {
--- 3596,3666 ----
      _GLIBCXX_SIMD_OP_(>>=)
    #undef _GLIBCXX_SIMD_OP_
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!     operator++() &&
      { if (_M_k) ++_M_value; }
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!     operator++(int) &&
      { if (_M_k) ++_M_value; }
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!     operator--() &&
      { if (_M_k) --_M_value; }
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!     operator--(int) &&
      { if (_M_k) --_M_value; }
  
      // intentionally hides const_where_expression::copy_from
      template <typename _Up, typename _Flags>
!       _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!       copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _IsSimdFlagType<_Flags>) &&
        { if (_M_k) _M_value = __mem[0]; }
    };
  
  // where {{{1
  template <typename _Tp, typename _Ap>
!   _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR
!   where_expression<simd_mask<_Tp, _Ap>, simd<_Tp, _Ap>>
    where(const typename simd<_Tp, _Ap>::mask_type& __k, simd<_Tp, _Ap>& __value)
    { return {__k, __value}; }
  
  template <typename _Tp, typename _Ap>
!   _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR
!   const_where_expression<simd_mask<_Tp, _Ap>, simd<_Tp, _Ap>>
!   where(const typename simd<_Tp, _Ap>::mask_type& __k, const simd<_Tp, _Ap>& __value)
    { return {__k, __value}; }
  
  template <typename _Tp, typename _Ap>
!   _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR
!   where_expression<simd_mask<_Tp, _Ap>, simd_mask<_Tp, _Ap>>
!   where(const remove_const_t<simd_mask<_Tp, _Ap>>& __k, simd_mask<_Tp, _Ap>& __value)
    { return {__k, __value}; }
  
  template <typename _Tp, typename _Ap>
!   _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR
!   const_where_expression<simd_mask<_Tp, _Ap>, simd_mask<_Tp, _Ap>>
!   where(const remove_const_t<simd_mask<_Tp, _Ap>>& __k, const simd_mask<_Tp, _Ap>& __value)
    { return {__k, __value}; }
  
  template <typename _Tp>
!   _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR where_expression<bool, _Tp>
    where(_ExactBool __k, _Tp& __value)
    { return {__k, __value}; }
  
  template <typename _Tp>
!   _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR const_where_expression<bool, _Tp>
    where(_ExactBool __k, const _Tp& __value)
    { return {__k, __value}; }
  
! template <typename _Tp, typename _Ap>
!   _GLIBCXX_SIMD_CONSTEXPR void
!   where(bool __k, simd<_Tp, _Ap>& __value) = delete;
  
! template <typename _Tp, typename _Ap>
!   _GLIBCXX_SIMD_CONSTEXPR void
!   where(bool __k, const simd<_Tp, _Ap>& __value) = delete;
  
  // proposed mask iterations {{{1
  namespace __proposed {
*************** template <size_t _Np>
*** 3568,3577 ****
        size_t __mask;
        size_t __bit;
  
!       _GLIBCXX_SIMD_INTRINSIC void __next_bit()
        { __bit = __builtin_ctzl(__mask); }
  
!       _GLIBCXX_SIMD_INTRINSIC void __reset_lsb()
        {
  	// 01100100 - 1 = 01100011
  	__mask &= (__mask - 1);
--- 3677,3688 ----
        size_t __mask;
        size_t __bit;
  
!       _GLIBCXX_SIMD_INTRINSIC void
!       __next_bit()
        { __bit = __builtin_ctzl(__mask); }
  
!       _GLIBCXX_SIMD_INTRINSIC void
!       __reset_lsb()
        {
  	// 01100100 - 1 = 01100011
  	__mask &= (__mask - 1);
*************** template <size_t _Np>
*** 3583,3602 ****
        iterator(const iterator&) = default;
        iterator(iterator&&) = default;
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE size_t operator->() const
        { return __bit; }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE size_t operator*() const
        { return __bit; }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE iterator& operator++()
        {
  	__reset_lsb();
  	__next_bit();
  	return *this;
        }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE iterator operator++(int)
        {
  	iterator __tmp = *this;
  	__reset_lsb();
--- 3694,3717 ----
        iterator(const iterator&) = default;
        iterator(iterator&&) = default;
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE size_t
!       operator->() const
        { return __bit; }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE size_t
!       operator*() const
        { return __bit; }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE iterator&
!       operator++()
        {
  	__reset_lsb();
  	__next_bit();
  	return *this;
        }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE iterator
!       operator++(int)
        {
  	iterator __tmp = *this;
  	__reset_lsb();
*************** template <size_t _Np>
*** 3604,3620 ****
  	return __tmp;
        }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE bool operator==(const iterator& __rhs) const
        { return __mask == __rhs.__mask; }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE bool operator!=(const iterator& __rhs) const
        { return __mask != __rhs.__mask; }
      };
  
!     iterator begin() const
      { return __bits.to_ullong(); }
  
!     iterator end() const
      { return 0; }
    };
  
--- 3719,3739 ----
  	return __tmp;
        }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE bool
!       operator==(const iterator& __rhs) const
        { return __mask == __rhs.__mask; }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE bool
!       operator!=(const iterator& __rhs) const
        { return __mask != __rhs.__mask; }
      };
  
!     iterator
!     begin() const
      { return __bits.to_ullong(); }
  
!     iterator
!     end() const
      { return 0; }
    };
  
*************** template <typename _Tp, typename _Ap>
*** 3629,3643 ****
  // reductions [simd.reductions] {{{1
  template <typename _Tp, typename _Abi, typename _BinaryOperation = plus<>>
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _Tp
!   reduce(const simd<_Tp, _Abi>& __v,
! 	 _BinaryOperation __binary_op = _BinaryOperation())
    { return _Abi::_SimdImpl::_S_reduce(__v, __binary_op); }
  
  template <typename _M, typename _V, typename _BinaryOperation = plus<>>
    _GLIBCXX_SIMD_INTRINSIC typename _V::value_type
    reduce(const const_where_expression<_M, _V>& __x,
! 	 typename _V::value_type __identity_element,
! 	 _BinaryOperation __binary_op)
    {
      if (__builtin_expect(none_of(__get_mask(__x)), false))
        return __identity_element;
--- 3748,3760 ----
  // reductions [simd.reductions] {{{1
  template <typename _Tp, typename _Abi, typename _BinaryOperation = plus<>>
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _Tp
!   reduce(const simd<_Tp, _Abi>& __v, _BinaryOperation __binary_op = _BinaryOperation())
    { return _Abi::_SimdImpl::_S_reduce(__v, __binary_op); }
  
  template <typename _M, typename _V, typename _BinaryOperation = plus<>>
    _GLIBCXX_SIMD_INTRINSIC typename _V::value_type
    reduce(const const_where_expression<_M, _V>& __x,
! 	 typename _V::value_type __identity_element, _BinaryOperation __binary_op)
    {
      if (__builtin_expect(none_of(__get_mask(__x)), false))
        return __identity_element;
*************** template <typename _M, typename _V>
*** 3676,3691 ****
  template <typename _Tp, typename _Abi>
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _Tp
    hmin(const simd<_Tp, _Abi>& __v) noexcept
!   {
!     return _Abi::_SimdImpl::_S_reduce(__v, __detail::_Minimum());
!   }
  
  template <typename _Tp, typename _Abi>
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _Tp
    hmax(const simd<_Tp, _Abi>& __v) noexcept
!   {
!     return _Abi::_SimdImpl::_S_reduce(__v, __detail::_Maximum());
!   }
  
  template <typename _M, typename _V>
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR
--- 3793,3804 ----
  template <typename _Tp, typename _Abi>
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _Tp
    hmin(const simd<_Tp, _Abi>& __v) noexcept
!   { return _Abi::_SimdImpl::_S_reduce(__v, __detail::_Minimum()); }
  
  template <typename _Tp, typename _Abi>
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _Tp
    hmax(const simd<_Tp, _Abi>& __v) noexcept
!   { return _Abi::_SimdImpl::_S_reduce(__v, __detail::_Maximum()); }
  
  template <typename _M, typename _V>
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR
*************** template <typename _Tp, typename _Ap>
*** 3753,3760 ****
  
  template <typename _Tp, typename _Ap>
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR simd<_Tp, _Ap>
!   clamp(const simd<_Tp, _Ap>& __v, const simd<_Tp, _Ap>& __lo,
! 	const simd<_Tp, _Ap>& __hi)
    {
      using _Impl = typename _Ap::_SimdImpl;
      return {__private_init,
--- 3866,3872 ----
  
  template <typename _Tp, typename _Ap>
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR simd<_Tp, _Ap>
!   clamp(const simd<_Tp, _Ap>& __v, const simd<_Tp, _Ap>& __lo, const simd<_Tp, _Ap>& __hi)
    {
      using _Impl = typename _Ap::_SimdImpl;
      return {__private_init,
*************** template <size_t... _Sizes, typename _Tp
*** 3771,3783 ****
  
  // __extract_part {{{
  template <int _Index, int _Total, int _Combine = 1, typename _Tp, size_t _Np>
!   _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_CONST
    _SimdWrapper<_Tp, _Np / _Total * _Combine>
    __extract_part(const _SimdWrapper<_Tp, _Np> __x);
  
! template <int _Index, int _Parts, int _Combine = 1, typename _Tp, typename _A0,
! 	  typename... _As>
!   _GLIBCXX_SIMD_INTRINSIC auto
    __extract_part(const _SimdTuple<_Tp, _A0, _As...>& __x);
  
  // }}}
--- 3883,3894 ----
  
  // __extract_part {{{
  template <int _Index, int _Total, int _Combine = 1, typename _Tp, size_t _Np>
!   _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_CONST constexpr
    _SimdWrapper<_Tp, _Np / _Total * _Combine>
    __extract_part(const _SimdWrapper<_Tp, _Np> __x);
  
! template <int _Index, int _Parts, int _Combine = 1, typename _Tp, typename _A0, typename... _As>
!   _GLIBCXX_SIMD_INTRINSIC constexpr auto
    __extract_part(const _SimdTuple<_Tp, _A0, _As...>& __x);
  
  // }}}
*************** template <size_t _V0, size_t... _Values>
*** 3786,3792 ****
    struct _SizeList
    {
      template <size_t _I>
!       static constexpr size_t _S_at(_SizeConstant<_I> = {})
        {
  	if constexpr (_I == 0)
  	  return _V0;
--- 3897,3904 ----
    struct _SizeList
    {
      template <size_t _I>
!       static constexpr size_t
!       _S_at(_SizeConstant<_I> = {})
        {
  	if constexpr (_I == 0)
  	  return _V0;
*************** template <size_t _V0, size_t... _Values>
*** 3795,3801 ****
        }
  
      template <size_t _I>
!       static constexpr auto _S_before(_SizeConstant<_I> = {})
        {
  	if constexpr (_I == 0)
  	  return _SizeConstant<0>();
--- 3907,3914 ----
        }
  
      template <size_t _I>
!       static constexpr auto
!       _S_before(_SizeConstant<_I> = {})
        {
  	if constexpr (_I == 0)
  	  return _SizeConstant<0>();
*************** template <size_t _V0, size_t... _Values>
*** 3805,3811 ****
        }
  
      template <size_t _Np>
!       static constexpr auto _S_pop_front(_SizeConstant<_Np> = {})
        {
  	if constexpr (_Np == 0)
  	  return _SizeList();
--- 3918,3925 ----
        }
  
      template <size_t _Np>
!       static constexpr auto
!       _S_pop_front(_SizeConstant<_Np> = {})
        {
  	if constexpr (_Np == 0)
  	  return _SizeList();
*************** template <typename _V, typename _Ap,
*** 3900,3911 ****
        }
      else if (__x._M_is_constprop())
        {
! 	return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>([&](
! 	  auto __i) constexpr {
! 	  return _V([&](auto __j) constexpr {
! 	    return __x[__i * _V::size() + __j];
! 	  });
! 	});
        }
      else if constexpr (
        __is_fixed_size_abi_v<_Ap>
--- 4014,4024 ----
        }
      else if (__x._M_is_constprop())
        {
! 	return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>(
! 		 [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   return _V([&](auto __j) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA
! 			     { return __x[__i * _V::size() + __j]; });
! 		 });
        }
      else if constexpr (
        __is_fixed_size_abi_v<_Ap>
*************** template <typename _V, typename _Ap,
*** 3918,3966 ****
  #ifdef _GLIBCXX_SIMD_USE_ALIASING_LOADS
        const __may_alias<_Tp>* const __element_ptr
  	= reinterpret_cast<const __may_alias<_Tp>*>(&__data(__x));
!       return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>([&](
! 	auto __i) constexpr {
! 	return _V(__element_ptr + __i * _V::size(), vector_aligned);
!       });
  #else
        const auto& __xx = __data(__x);
!       return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>([&](
! 	auto __i) constexpr {
! 	[[maybe_unused]] constexpr size_t __offset
! 	  = decltype(__i)::value * _V::size();
! 	return _V([&](auto __j) constexpr {
! 	  constexpr _SizeConstant<__j + __offset> __k;
! 	  return __xx[__k];
! 	});
!       });
  #endif
      }
    else if constexpr (is_same_v<typename _V::abi_type, simd_abi::scalar>)
      {
        // normally memcpy should work here as well
!       return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>([&](
! 	auto __i) constexpr { return __x[__i]; });
      }
    else
      {
!       return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>([&](
! 	auto __i) constexpr {
! 	if constexpr (__is_fixed_size_abi_v<typename _V::abi_type>)
! 	  return _V([&](auto __j) constexpr {
! 	    return __x[__i * _V::size() + __j];
! 	  });
! 	else
! 	  return _V(__private_init,
! 		    __extract_part<decltype(__i)::value, _Parts>(__data(__x)));
!       });
      }
    }
  
  // }}}
  // split<simd_mask>(simd_mask) {{{
  template <typename _V, typename _Ap,
! 	  size_t _Parts
! 	  = simd_size_v<typename _V::simd_type::value_type, _Ap> / _V::size()>
    enable_if_t<is_simd_mask_v<_V> && simd_size_v<typename
      _V::simd_type::value_type, _Ap> == _Parts * _V::size(), array<_V, _Parts>>
    split(const simd_mask<typename _V::simd_type::value_type, _Ap>& __x)
--- 4031,4077 ----
  #ifdef _GLIBCXX_SIMD_USE_ALIASING_LOADS
        const __may_alias<_Tp>* const __element_ptr
  	= reinterpret_cast<const __may_alias<_Tp>*>(&__data(__x));
!       return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>(
! 	       [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA
! 	       { return _V(__element_ptr + __i * _V::size(), vector_aligned); });
  #else
        const auto& __xx = __data(__x);
!       return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>(
! 	       [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		 [[maybe_unused]] constexpr size_t __offset
! 		   = decltype(__i)::value * _V::size();
! 		 return _V([&](auto __j) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			  constexpr _SizeConstant<__j + __offset> __k;
! 			  return __xx[__k];
! 			});
! 	       });
  #endif
      }
    else if constexpr (is_same_v<typename _V::abi_type, simd_abi::scalar>)
      {
        // normally memcpy should work here as well
!       return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>(
! 	       [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return __x[__i]; });
      }
    else
      {
!       return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>(
! 	       [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		 if constexpr (__is_fixed_size_abi_v<typename _V::abi_type>)
! 		   return _V([&](auto __j) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			    return __x[__i * _V::size() + __j];
! 			  });
! 		 else
! 		   return _V(__private_init,
! 			     __extract_part<decltype(__i)::value, _Parts>(__data(__x)));
! 	       });
      }
    }
  
  // }}}
  // split<simd_mask>(simd_mask) {{{
  template <typename _V, typename _Ap,
! 	  size_t _Parts = simd_size_v<typename _V::simd_type::value_type, _Ap> / _V::size()>
    enable_if_t<is_simd_mask_v<_V> && simd_size_v<typename
      _V::simd_type::value_type, _Ap> == _Parts * _V::size(), array<_V, _Parts>>
    split(const simd_mask<typename _V::simd_type::value_type, _Ap>& __x)
*************** template <typename _V, typename _Ap,
*** 3976,3997 ****
      else if constexpr (_V::size() <= __CHAR_BIT__ * sizeof(_ULLong))
        {
  	const bitset __bits = __x.__to_bitset();
! 	return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>([&](
! 	  auto __i) constexpr {
! 	  constexpr size_t __offset = __i * _V::size();
! 	  return _V(__bitset_init, (__bits >> __offset).to_ullong());
! 	});
        }
      else
        {
! 	return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>([&](
! 	  auto __i) constexpr {
! 	  constexpr size_t __offset = __i * _V::size();
! 	  return _V(
! 	    __private_init, [&](auto __j) constexpr {
! 	      return __x[__j + __offset];
! 	    });
! 	});
        }
    }
  
--- 4087,4108 ----
      else if constexpr (_V::size() <= __CHAR_BIT__ * sizeof(_ULLong))
        {
  	const bitset __bits = __x.__to_bitset();
! 	return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>(
! 		 [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   constexpr size_t __offset = __i * _V::size();
! 		   return _V(__bitset_init, (__bits >> __offset).to_ullong());
! 		 });
        }
      else
        {
! 	return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>(
! 		 [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   constexpr size_t __offset = __i * _V::size();
! 		   return _V(__private_init,
! 			     [&](auto __j) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			       return __x[__j + __offset];
! 			     });
! 		 });
        }
    }
  
*************** template <size_t... _Sizes, typename _Tp
*** 4009,4020 ****
      using _V = __deduced_simd<_Tp, _N0>;
  
      if (__x._M_is_constprop())
!       return __generate_from_n_evaluations<sizeof...(_Sizes), _Tuple>([&](
! 	auto __i) constexpr {
! 	using _Vi = __deduced_simd<_Tp, _SL::_S_at(__i)>;
! 	constexpr size_t __offset = _SL::_S_before(__i);
! 	return _Vi([&](auto __j) constexpr { return __x[__offset + __j]; });
!       });
      else if constexpr (_Np == _N0)
        {
  	static_assert(sizeof...(_Sizes) == 1);
--- 4120,4133 ----
      using _V = __deduced_simd<_Tp, _N0>;
  
      if (__x._M_is_constprop())
!       return __generate_from_n_evaluations<sizeof...(_Sizes), _Tuple>(
! 	       [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		 using _Vi = __deduced_simd<_Tp, _SL::_S_at(__i)>;
! 		 constexpr size_t __offset = _SL::_S_before(__i);
! 		 return _Vi([&](auto __j) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			  return __x[__offset + __j];
! 			});
! 	       });
      else if constexpr (_Np == _N0)
        {
  	static_assert(sizeof...(_Sizes) == 1);
*************** template <size_t... _Sizes, typename _Tp
*** 4081,4108 ****
  #ifdef _GLIBCXX_SIMD_USE_ALIASING_LOADS
      const __may_alias<_Tp>* const __element_ptr
        = reinterpret_cast<const __may_alias<_Tp>*>(&__x);
!     return __generate_from_n_evaluations<sizeof...(_Sizes), _Tuple>([&](
!       auto __i) constexpr {
!       using _Vi = __deduced_simd<_Tp, _SL::_S_at(__i)>;
!       constexpr size_t __offset = _SL::_S_before(__i);
!       constexpr size_t __base_align = alignof(simd<_Tp, _Ap>);
!       constexpr size_t __a
! 	= __base_align - ((__offset * sizeof(_Tp)) % __base_align);
!       constexpr size_t __b = ((__a - 1) & __a) ^ __a;
!       constexpr size_t __alignment = __b == 0 ? __a : __b;
!       return _Vi(__element_ptr + __offset, overaligned<__alignment>);
!     });
  #else
!     return __generate_from_n_evaluations<sizeof...(_Sizes), _Tuple>([&](
!       auto __i) constexpr {
!       using _Vi = __deduced_simd<_Tp, _SL::_S_at(__i)>;
!       const auto& __xx = __data(__x);
!       using _Offset = decltype(_SL::_S_before(__i));
!       return _Vi([&](auto __j) constexpr {
! 	constexpr _SizeConstant<_Offset::value + __j> __k;
! 	return __xx[__k];
!       });
!     });
  #endif
    }
  
--- 4194,4221 ----
  #ifdef _GLIBCXX_SIMD_USE_ALIASING_LOADS
      const __may_alias<_Tp>* const __element_ptr
        = reinterpret_cast<const __may_alias<_Tp>*>(&__x);
!     return __generate_from_n_evaluations<sizeof...(_Sizes), _Tuple>(
! 	     [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	       using _Vi = __deduced_simd<_Tp, _SL::_S_at(__i)>;
! 	       constexpr size_t __offset = _SL::_S_before(__i);
! 	       constexpr size_t __base_align = alignof(simd<_Tp, _Ap>);
! 	       constexpr size_t __a
! 		 = __base_align - ((__offset * sizeof(_Tp)) % __base_align);
! 	       constexpr size_t __b = ((__a - 1) & __a) ^ __a;
! 	       constexpr size_t __alignment = __b == 0 ? __a : __b;
! 	       return _Vi(__element_ptr + __offset, overaligned<__alignment>);
! 	     });
  #else
!     return __generate_from_n_evaluations<sizeof...(_Sizes), _Tuple>(
! 	     [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	       using _Vi = __deduced_simd<_Tp, _SL::_S_at(__i)>;
! 	       const auto& __xx = __data(__x);
! 	       using _Offset = decltype(_SL::_S_before(__i));
! 	       return _Vi([&](auto __j) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			constexpr _SizeConstant<_Offset::value + __j> __k;
! 			return __xx[__k];
! 		      });
! 	     });
  #endif
    }
  
*************** template <size_t _I, typename _Tp, typen
*** 4123,4130 ****
  // __store_pack_of_simd {{{
  template <typename _Tp, typename _A0, typename... _As>
    _GLIBCXX_SIMD_INTRINSIC void
!   __store_pack_of_simd(char* __mem, const simd<_Tp, _A0>& __x0,
! 		       const simd<_Tp, _As>&... __xs)
    {
      constexpr size_t __n_bytes = sizeof(_Tp) * simd_size_v<_Tp, _A0>;
      __builtin_memcpy(__mem, &__data(__x0), __n_bytes);
--- 4236,4242 ----
  // __store_pack_of_simd {{{
  template <typename _Tp, typename _A0, typename... _As>
    _GLIBCXX_SIMD_INTRINSIC void
!   __store_pack_of_simd(char* __mem, const simd<_Tp, _A0>& __x0, const simd<_Tp, _As>&... __xs)
    {
      constexpr size_t __n_bytes = sizeof(_Tp) * simd_size_v<_Tp, _A0>;
      __builtin_memcpy(__mem, &__data(__x0), __n_bytes);
*************** template <typename _Tp, typename... _As,
*** 4144,4151 ****
        return simd_cast<_Rp>(__xs...);
      else if ((... && __xs._M_is_constprop()))
        return simd<_Tp,
! 		  simd_abi::deduce_t<_Tp, (simd_size_v<_Tp, _As> + ...)>>([&](
! 	auto __i) constexpr { return __subscript_in_pack<__i>(__xs...); });
      else
        {
  	_Rp __r{};
--- 4256,4264 ----
        return simd_cast<_Rp>(__xs...);
      else if ((... && __xs._M_is_constprop()))
        return simd<_Tp,
! 		  simd_abi::deduce_t<_Tp, (simd_size_v<_Tp, _As> + ...)>>(
! 	       [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA
! 	       { return __subscript_in_pack<__i>(__xs...); });
      else
        {
  	_Rp __r{};
*************** template <typename _Tp, typename _Abi, s
*** 4161,4169 ****
    _GLIBCXX_SIMD_CONSTEXPR __deduced_simd<_Tp, simd_size_v<_Tp, _Abi> * _Np>
    concat(const array<simd<_Tp, _Abi>, _Np>& __x)
    {
!     return __call_with_subscripts<_Np>(__x, [](const auto&... __xs) {
!       return concat(__xs...);
!     });
    }
  
  // }}}
--- 4274,4283 ----
    _GLIBCXX_SIMD_CONSTEXPR __deduced_simd<_Tp, simd_size_v<_Tp, _Abi> * _Np>
    concat(const array<simd<_Tp, _Abi>, _Np>& __x)
    {
!     return __call_with_subscripts<_Np>(
! 	     __x, [](const auto&... __xs) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	       return concat(__xs...);
! 	     });
    }
  
  // }}}
*************** template <typename _Up, typename _Access
*** 4178,4184 ****
      int _M_index;
      _Up& _M_obj;
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr _ValueType _M_read() const noexcept
      {
        if constexpr (is_arithmetic_v<_Up>)
  	return _M_obj;
--- 4292,4299 ----
      int _M_index;
      _Up& _M_obj;
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr _ValueType
!     _M_read() const noexcept
      {
        if constexpr (is_arithmetic_v<_Up>)
  	return _M_obj;
*************** template <typename _Up, typename _Access
*** 4187,4193 ****
      }
  
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC constexpr void _M_write(_Tp&& __x) const
        { _Accessor::_S_set(_M_obj, _M_index, static_cast<_Tp&&>(__x)); }
  
    public:
--- 4302,4309 ----
      }
  
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC constexpr void
!       _M_write(_Tp&& __x) const
        { _Accessor::_S_set(_M_obj, _M_index, static_cast<_Tp&&>(__x)); }
  
    public:
*************** template <typename _Up, typename _Access
*** 4197,4228 ****
  
      using value_type = _ValueType;
  
!     _GLIBCXX_SIMD_INTRINSIC _SmartReference(const _SmartReference&) = delete;
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr operator value_type() const noexcept
      { return _M_read(); }
  
!     template <typename _Tp,
! 	      typename
! 	      = _ValuePreservingOrInt<__remove_cvref_t<_Tp>, value_type>>
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference operator=(_Tp&& __x) &&
        {
  	_M_write(static_cast<_Tp&&>(__x));
  	return {_M_obj, _M_index};
        }
  
! #define _GLIBCXX_SIMD_OP_(__op)                                                \
!     template <typename _Tp,                                                    \
! 	      typename _TT                                                     \
! 	      = decltype(declval<value_type>() __op declval<_Tp>()),           \
! 	      typename = _ValuePreservingOrInt<__remove_cvref_t<_Tp>, _TT>,    \
! 	      typename = _ValuePreservingOrInt<_TT, value_type>>               \
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference                        \
!       operator __op##=(_Tp&& __x) &&                                           \
!       {                                                                        \
! 	const value_type& __lhs = _M_read();                                   \
! 	_M_write(__lhs __op __x);                                              \
! 	return {_M_obj, _M_index};                                             \
        }
      _GLIBCXX_SIMD_ALL_ARITHMETICS(_GLIBCXX_SIMD_OP_);
      _GLIBCXX_SIMD_ALL_SHIFTS(_GLIBCXX_SIMD_OP_);
--- 4313,4344 ----
  
      using value_type = _ValueType;
  
!     _GLIBCXX_SIMD_INTRINSIC
!     _SmartReference(const _SmartReference&) = delete;
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     operator value_type() const noexcept
      { return _M_read(); }
  
!     template <typename _Tp, typename = _ValuePreservingOrInt<__remove_cvref_t<_Tp>, value_type>>
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference
!       operator=(_Tp&& __x) &&
        {
  	_M_write(static_cast<_Tp&&>(__x));
  	return {_M_obj, _M_index};
        }
  
! #define _GLIBCXX_SIMD_OP_(__op)                                                   \
!     template <typename _Tp,                                                       \
! 	      typename _TT = decltype(declval<value_type>() __op declval<_Tp>()), \
! 	      typename = _ValuePreservingOrInt<__remove_cvref_t<_Tp>, _TT>,       \
! 	      typename = _ValuePreservingOrInt<_TT, value_type>>                  \
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference                           \
!       operator __op##=(_Tp&& __x) &&                                              \
!       {                                                                           \
! 	const value_type& __lhs = _M_read();                                      \
! 	_M_write(__lhs __op __x);                                                 \
! 	return {_M_obj, _M_index};                                                \
        }
      _GLIBCXX_SIMD_ALL_ARITHMETICS(_GLIBCXX_SIMD_OP_);
      _GLIBCXX_SIMD_ALL_SHIFTS(_GLIBCXX_SIMD_OP_);
*************** template <typename _Up, typename _Access
*** 4230,4238 ****
  #undef _GLIBCXX_SIMD_OP_
  
      template <typename _Tp = void,
! 	      typename
! 	      = decltype(++declval<conditional_t<true, value_type, _Tp>&>())>
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference operator++() &&
        {
  	value_type __x = _M_read();
  	_M_write(++__x);
--- 4346,4354 ----
  #undef _GLIBCXX_SIMD_OP_
  
      template <typename _Tp = void,
! 	      typename = decltype(++declval<conditional_t<true, value_type, _Tp>&>())>
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference
!       operator++() &&
        {
  	value_type __x = _M_read();
  	_M_write(++__x);
*************** template <typename _Up, typename _Access
*** 4240,4248 ****
        }
  
      template <typename _Tp = void,
! 	      typename
! 	      = decltype(declval<conditional_t<true, value_type, _Tp>&>()++)>
!       _GLIBCXX_SIMD_INTRINSIC constexpr value_type operator++(int) &&
        {
  	const value_type __r = _M_read();
  	value_type __x = __r;
--- 4356,4364 ----
        }
  
      template <typename _Tp = void,
! 	      typename = decltype(declval<conditional_t<true, value_type, _Tp>&>()++)>
!       _GLIBCXX_SIMD_INTRINSIC constexpr value_type
!       operator++(int) &&
        {
  	const value_type __r = _M_read();
  	value_type __x = __r;
*************** template <typename _Up, typename _Access
*** 4251,4259 ****
        }
  
      template <typename _Tp = void,
! 	      typename
! 	      = decltype(--declval<conditional_t<true, value_type, _Tp>&>())>
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference operator--() &&
        {
  	value_type __x = _M_read();
  	_M_write(--__x);
--- 4367,4375 ----
        }
  
      template <typename _Tp = void,
! 	      typename = decltype(--declval<conditional_t<true, value_type, _Tp>&>())>
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference
!       operator--() &&
        {
  	value_type __x = _M_read();
  	_M_write(--__x);
*************** template <typename _Up, typename _Access
*** 4261,4269 ****
        }
  
      template <typename _Tp = void,
! 	      typename
! 	      = decltype(declval<conditional_t<true, value_type, _Tp>&>()--)>
!       _GLIBCXX_SIMD_INTRINSIC constexpr value_type operator--(int) &&
        {
  	const value_type __r = _M_read();
  	value_type __x = __r;
--- 4377,4385 ----
        }
  
      template <typename _Tp = void,
! 	      typename = decltype(declval<conditional_t<true, value_type, _Tp>&>()--)>
!       _GLIBCXX_SIMD_INTRINSIC constexpr value_type
!       operator--(int) &&
        {
  	const value_type __r = _M_read();
  	value_type __x = __r;
*************** template <int _Bytes>
*** 4339,4345 ****
  template <template <int> class _Abi, int _Bytes, typename _Tp>
    struct __find_next_valid_abi
    {
!     static constexpr auto _S_choose()
      {
        constexpr int _NextBytes = std::__bit_ceil(_Bytes) / 2;
        using _NextAbi = _Abi<_NextBytes>;
--- 4455,4462 ----
  template <template <int> class _Abi, int _Bytes, typename _Tp>
    struct __find_next_valid_abi
    {
!     static constexpr auto
!     _S_choose()
      {
        constexpr int _NextBytes = std::__bit_ceil(_Bytes) / 2;
        using _NextAbi = _Abi<_NextBytes>;
*************** template <template <int> class _A0, temp
*** 4383,4389 ****
  	typename _AbiList<_Rest...>::template _FirstValidAbi<_Tp, _Np>>;
  
      template <typename _Tp, int _Np>
!       static constexpr auto _S_determine_best_abi()
        {
  	static_assert(_Np >= 1);
  	constexpr int _Bytes = sizeof(_Tp) * _Np;
--- 4500,4507 ----
  	typename _AbiList<_Rest...>::template _FirstValidAbi<_Tp, _Np>>;
  
      template <typename _Tp, int _Np>
!       static constexpr auto
!       _S_determine_best_abi()
        {
  	static_assert(_Np >= 1);
  	constexpr int _Bytes = sizeof(_Tp) * _Np;
*************** template <typename _Tp, typename _Abi>
*** 4496,4502 ****
  
      // }}}
      // access to internal representation (optional feature) {{{
!     _GLIBCXX_SIMD_ALWAYS_INLINE explicit
      simd_mask(typename _Traits::_MaskCastType __init)
      : _M_data{__init} {}
      // conversions to internal type is done in _MaskBase
--- 4614,4620 ----
  
      // }}}
      // access to internal representation (optional feature) {{{
!     _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR explicit
      simd_mask(typename _Traits::_MaskCastType __init)
      : _M_data{__init} {}
      // conversions to internal type is done in _MaskBase
*************** template <typename _Tp, typename _Abi>
*** 4507,4517 ****
      // Conversion of simd_mask to and from bitset makes it much easier to
      // interface with other facilities. I suggest adding `static
      // simd_mask::from_bitset` and `simd_mask::to_bitset`.
!     _GLIBCXX_SIMD_ALWAYS_INLINE static simd_mask
      __from_bitset(bitset<size()> bs)
      { return {__bitset_init, bs}; }
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE bitset<size()>
      __to_bitset() const
      { return _Impl::_S_to_bits(_M_data)._M_to_bitset(); }
  
--- 4625,4635 ----
      // Conversion of simd_mask to and from bitset makes it much easier to
      // interface with other facilities. I suggest adding `static
      // simd_mask::from_bitset` and `simd_mask::to_bitset`.
!     _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR static simd_mask
      __from_bitset(bitset<size()> bs)
      { return {__bitset_init, bs}; }
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR bitset<size()>
      __to_bitset() const
      { return _Impl::_S_to_bits(_M_data)._M_to_bitset(); }
  
*************** template <typename _Tp, typename _Abi>
*** 4536,4542 ****
      template <typename _Up, typename = enable_if_t<conjunction<
  			      is_same<abi_type, simd_abi::fixed_size<size()>>,
  			      is_same<_Up, _Up>>::value>>
!       _GLIBCXX_SIMD_ALWAYS_INLINE
        simd_mask(const simd_mask<_Up, simd_abi::fixed_size<size()>>& __x)
        : _M_data(_Impl::_S_from_bitmask(__data(__x), _S_type_tag)) {}
    #endif
--- 4654,4660 ----
      template <typename _Up, typename = enable_if_t<conjunction<
  			      is_same<abi_type, simd_abi::fixed_size<size()>>,
  			      is_same<_Up, _Up>>::value>>
!       _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR
        simd_mask(const simd_mask<_Up, simd_abi::fixed_size<size()>>& __x)
        : _M_data(_Impl::_S_from_bitmask(__data(__x), _S_type_tag)) {}
    #endif
*************** template <typename _Tp, typename _Abi>
*** 4544,4584 ****
      // }}}
      // load constructor {{{
      template <typename _Flags>
!       _GLIBCXX_SIMD_ALWAYS_INLINE
!       simd_mask(const value_type* __mem, _Flags)
!       : _M_data(_Impl::template _S_load<_Ip>(
! 	_Flags::template _S_apply<simd_mask>(__mem))) {}
  
      template <typename _Flags>
!       _GLIBCXX_SIMD_ALWAYS_INLINE
!       simd_mask(const value_type* __mem, simd_mask __k, _Flags)
        : _M_data{}
        {
! 	_M_data
! 	  = _Impl::_S_masked_load(_M_data, __k._M_data,
! 				  _Flags::template _S_apply<simd_mask>(__mem));
        }
  
      // }}}
      // loads [simd_mask.load] {{{
      template <typename _Flags>
!       _GLIBCXX_SIMD_ALWAYS_INLINE void
!       copy_from(const value_type* __mem, _Flags)
!       {
! 	_M_data = _Impl::template _S_load<_Ip>(
! 	  _Flags::template _S_apply<simd_mask>(__mem));
!       }
  
      // }}}
      // stores [simd_mask.store] {{{
      template <typename _Flags>
!       _GLIBCXX_SIMD_ALWAYS_INLINE void
!       copy_to(value_type* __mem, _Flags) const
        { _Impl::_S_store(_M_data, _Flags::template _S_apply<simd_mask>(__mem)); }
  
      // }}}
      // scalar access {{{
!     _GLIBCXX_SIMD_ALWAYS_INLINE reference
      operator[](size_t __i)
      {
        if (__i >= size())
--- 4662,4697 ----
      // }}}
      // load constructor {{{
      template <typename _Flags>
!       _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR
!       simd_mask(const value_type* __mem, _IsSimdFlagType<_Flags>)
!       : _M_data(_Impl::template _S_load<_Ip>(_Flags::template _S_apply<simd_mask>(__mem))) {}
  
      template <typename _Flags>
!       _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR
!       simd_mask(const value_type* __mem, simd_mask __k, _IsSimdFlagType<_Flags>)
        : _M_data{}
        {
! 	_M_data = _Impl::_S_masked_load(_M_data, __k._M_data,
! 					_Flags::template _S_apply<simd_mask>(__mem));
        }
  
      // }}}
      // loads [simd_mask.load] {{{
      template <typename _Flags>
!       _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR void
!       copy_from(const value_type* __mem, _IsSimdFlagType<_Flags>)
!       { _M_data = _Impl::template _S_load<_Ip>(_Flags::template _S_apply<simd_mask>(__mem)); }
  
      // }}}
      // stores [simd_mask.store] {{{
      template <typename _Flags>
!       _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR void
!       copy_to(value_type* __mem, _IsSimdFlagType<_Flags>) const
        { _Impl::_S_store(_M_data, _Flags::template _S_apply<simd_mask>(__mem)); }
  
      // }}}
      // scalar access {{{
!     _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR reference
      operator[](size_t __i)
      {
        if (__i >= size())
*************** template <typename _Tp, typename _Abi>
*** 4586,4592 ****
        return {_M_data, int(__i)};
      }
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE value_type
      operator[](size_t __i) const
      {
        if (__i >= size())
--- 4699,4705 ----
        return {_M_data, int(__i)};
      }
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR value_type
      operator[](size_t __i) const
      {
        if (__i >= size())
*************** template <typename _Tp, typename _Abi>
*** 4599,4605 ****
  
      // }}}
      // negation {{{
!     _GLIBCXX_SIMD_ALWAYS_INLINE simd_mask
      operator!() const
      { return {__private_init, _Impl::_S_bit_not(_M_data)}; }
  
--- 4712,4718 ----
  
      // }}}
      // negation {{{
!     _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR simd_mask
      operator!() const
      { return {__private_init, _Impl::_S_bit_not(_M_data)}; }
  
*************** template <typename _Tp, typename _Abi>
*** 4608,4616 ****
    #ifdef _GLIBCXX_SIMD_ENABLE_IMPLICIT_MASK_CAST
      // simd_mask<int> && simd_mask<uint> needs disambiguation
      template <typename _Up, typename _A2,
! 	      typename
! 	      = enable_if_t<is_convertible_v<simd_mask<_Up, _A2>, simd_mask>>>
!       _GLIBCXX_SIMD_ALWAYS_INLINE friend simd_mask
        operator&&(const simd_mask& __x, const simd_mask<_Up, _A2>& __y)
        {
  	return {__private_init,
--- 4721,4728 ----
    #ifdef _GLIBCXX_SIMD_ENABLE_IMPLICIT_MASK_CAST
      // simd_mask<int> && simd_mask<uint> needs disambiguation
      template <typename _Up, typename _A2,
! 	      typename = enable_if_t<is_convertible_v<simd_mask<_Up, _A2>, simd_mask>>>
!       _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR friend simd_mask
        operator&&(const simd_mask& __x, const simd_mask<_Up, _A2>& __y)
        {
  	return {__private_init,
*************** template <typename _Tp, typename _Abi>
*** 4618,4626 ****
        }
  
      template <typename _Up, typename _A2,
! 	      typename
! 	      = enable_if_t<is_convertible_v<simd_mask<_Up, _A2>, simd_mask>>>
!       _GLIBCXX_SIMD_ALWAYS_INLINE friend simd_mask
        operator||(const simd_mask& __x, const simd_mask<_Up, _A2>& __y)
        {
  	return {__private_init,
--- 4730,4737 ----
        }
  
      template <typename _Up, typename _A2,
! 	      typename = enable_if_t<is_convertible_v<simd_mask<_Up, _A2>, simd_mask>>>
!       _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR friend simd_mask
        operator||(const simd_mask& __x, const simd_mask<_Up, _A2>& __y)
        {
  	return {__private_init,
*************** template <typename _Tp, typename _Abi>
*** 4628,4672 ****
        }
    #endif // _GLIBCXX_SIMD_ENABLE_IMPLICIT_MASK_CAST
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE friend simd_mask
      operator&&(const simd_mask& __x, const simd_mask& __y)
!     {
!       return {__private_init, _Impl::_S_logical_and(__x._M_data, __y._M_data)};
!     }
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE friend simd_mask
      operator||(const simd_mask& __x, const simd_mask& __y)
!     {
!       return {__private_init, _Impl::_S_logical_or(__x._M_data, __y._M_data)};
!     }
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE friend simd_mask
      operator&(const simd_mask& __x, const simd_mask& __y)
      { return {__private_init, _Impl::_S_bit_and(__x._M_data, __y._M_data)}; }
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE friend simd_mask
      operator|(const simd_mask& __x, const simd_mask& __y)
      { return {__private_init, _Impl::_S_bit_or(__x._M_data, __y._M_data)}; }
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE friend simd_mask
      operator^(const simd_mask& __x, const simd_mask& __y)
      { return {__private_init, _Impl::_S_bit_xor(__x._M_data, __y._M_data)}; }
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE friend simd_mask&
      operator&=(simd_mask& __x, const simd_mask& __y)
      {
        __x._M_data = _Impl::_S_bit_and(__x._M_data, __y._M_data);
        return __x;
      }
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE friend simd_mask&
      operator|=(simd_mask& __x, const simd_mask& __y)
      {
        __x._M_data = _Impl::_S_bit_or(__x._M_data, __y._M_data);
        return __x;
      }
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE friend simd_mask&
      operator^=(simd_mask& __x, const simd_mask& __y)
      {
        __x._M_data = _Impl::_S_bit_xor(__x._M_data, __y._M_data);
--- 4739,4779 ----
        }
    #endif // _GLIBCXX_SIMD_ENABLE_IMPLICIT_MASK_CAST
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR friend simd_mask
      operator&&(const simd_mask& __x, const simd_mask& __y)
!     { return {__private_init, _Impl::_S_logical_and(__x._M_data, __y._M_data)}; }
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR friend simd_mask
      operator||(const simd_mask& __x, const simd_mask& __y)
!     { return {__private_init, _Impl::_S_logical_or(__x._M_data, __y._M_data)}; }
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR friend simd_mask
      operator&(const simd_mask& __x, const simd_mask& __y)
      { return {__private_init, _Impl::_S_bit_and(__x._M_data, __y._M_data)}; }
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR friend simd_mask
      operator|(const simd_mask& __x, const simd_mask& __y)
      { return {__private_init, _Impl::_S_bit_or(__x._M_data, __y._M_data)}; }
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR friend simd_mask
      operator^(const simd_mask& __x, const simd_mask& __y)
      { return {__private_init, _Impl::_S_bit_xor(__x._M_data, __y._M_data)}; }
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR friend simd_mask&
      operator&=(simd_mask& __x, const simd_mask& __y)
      {
        __x._M_data = _Impl::_S_bit_and(__x._M_data, __y._M_data);
        return __x;
      }
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR friend simd_mask&
      operator|=(simd_mask& __x, const simd_mask& __y)
      {
        __x._M_data = _Impl::_S_bit_or(__x._M_data, __y._M_data);
        return __x;
      }
  
!     _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR friend simd_mask&
      operator^=(simd_mask& __x, const simd_mask& __y)
      {
        __x._M_data = _Impl::_S_bit_xor(__x._M_data, __y._M_data);
*************** template <typename _Tp, typename _Abi>
*** 4696,4711 ****
        simd_mask(_PrivateInit, _Fp&& __gen)
        : _M_data()
        {
! 	__execute_n_times<size()>([&](auto __i) constexpr {
  	  _Impl::_S_set(_M_data, __i, __gen(__i));
  	});
        }
  
      // }}}
      // bitset_init ctor {{{
!     _GLIBCXX_SIMD_INTRINSIC simd_mask(_BitsetInit, bitset<size()> __init)
!     : _M_data(
! 	_Impl::_S_from_bitmask(_SanitizedBitMask<size()>(__init), _S_type_tag))
      {}
  
      // }}}
--- 4803,4818 ----
        simd_mask(_PrivateInit, _Fp&& __gen)
        : _M_data()
        {
! 	__execute_n_times<size()>([&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	  _Impl::_S_set(_M_data, __i, __gen(__i));
  	});
        }
  
      // }}}
      // bitset_init ctor {{{
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     simd_mask(_BitsetInit, bitset<size()> __init)
!     : _M_data(_Impl::_S_from_bitmask(_SanitizedBitMask<size()>(__init), _S_type_tag))
      {}
  
      // }}}
*************** template <typename _Tp, typename _Abi>
*** 4717,4724 ****
      struct _CvtProxy
      {
        template <typename _Up, typename _A2,
! 		typename
! 		= enable_if_t<simd_size_v<_Up, _A2> == simd_size_v<_Tp, _Abi>>>
  	_GLIBCXX_SIMD_ALWAYS_INLINE
  	operator simd_mask<_Up, _A2>() &&
  	{
--- 4824,4830 ----
      struct _CvtProxy
      {
        template <typename _Up, typename _A2,
! 		typename = enable_if_t<simd_size_v<_Up, _A2> == simd_size_v<_Tp, _Abi>>>
  	_GLIBCXX_SIMD_ALWAYS_INLINE
  	operator simd_mask<_Up, _A2>() &&
  	{
*************** template <typename _Tp, typename _Abi>
*** 4882,4888 ****
      if (__builtin_is_constant_evaluated() || __k._M_is_constprop())
        {
  	const int __r = __call_with_subscripts<simd_size_v<_Tp, _Abi>>(
! 	  __k, [](auto... __elements) { return ((__elements != 0) + ...); });
  	if (__builtin_is_constant_evaluated() || __builtin_constant_p(__r))
  	  return __r;
        }
--- 4988,4996 ----
      if (__builtin_is_constant_evaluated() || __k._M_is_constprop())
        {
  	const int __r = __call_with_subscripts<simd_size_v<_Tp, _Abi>>(
! 			  __k, [](auto... __elements) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			    return ((__elements != 0) + ...);
! 			  });
  	if (__builtin_is_constant_evaluated() || __builtin_constant_p(__r))
  	  return __r;
        }
*************** template <typename _Tp, typename _Abi>
*** 4897,4904 ****
        {
  	constexpr size_t _Np = simd_size_v<_Tp, _Abi>;
  	const size_t _Idx = __call_with_n_evaluations<_Np>(
! 	  [](auto... __indexes) { return std::min({__indexes...}); },
! 	  [&](auto __i) { return __k[__i] ? +__i : _Np; });
  	if (_Idx >= _Np)
  	  __invoke_ub("find_first_set(empty mask) is UB");
  	if (__builtin_constant_p(_Idx))
--- 5005,5015 ----
        {
  	constexpr size_t _Np = simd_size_v<_Tp, _Abi>;
  	const size_t _Idx = __call_with_n_evaluations<_Np>(
! 			      [](auto... __indexes) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 				return std::min({__indexes...});
! 			      }, [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 				return __k[__i] ? +__i : _Np;
! 			      });
  	if (_Idx >= _Np)
  	  __invoke_ub("find_first_set(empty mask) is UB");
  	if (__builtin_constant_p(_Idx))
*************** template <typename _Tp, typename _Abi>
*** 4915,4922 ****
        {
  	constexpr size_t _Np = simd_size_v<_Tp, _Abi>;
  	const int _Idx = __call_with_n_evaluations<_Np>(
! 	  [](auto... __indexes) { return std::max({__indexes...}); },
! 	  [&](auto __i) { return __k[__i] ? int(__i) : -1; });
  	if (_Idx < 0)
  	  __invoke_ub("find_first_set(empty mask) is UB");
  	if (__builtin_constant_p(_Idx))
--- 5026,5036 ----
        {
  	constexpr size_t _Np = simd_size_v<_Tp, _Abi>;
  	const int _Idx = __call_with_n_evaluations<_Np>(
! 			   [](auto... __indexes) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			     return std::max({__indexes...});
! 			   }, [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			     return __k[__i] ? int(__i) : -1;
! 			   });
  	if (_Idx < 0)
  	  __invoke_ub("find_first_set(empty mask) is UB");
  	if (__builtin_constant_p(_Idx))
*************** template <typename _V, typename _Tp, typ
*** 4965,4971 ****
    {
      using _Impl = typename _SimdTraits<_Tp, _Abi>::_SimdImpl;
  
!     _GLIBCXX_SIMD_INTRINSIC const _V& __derived() const
      { return *static_cast<const _V*>(this); }
  
      template <typename _Up>
--- 5079,5086 ----
    {
      using _Impl = typename _SimdTraits<_Tp, _Abi>::_SimdImpl;
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr const _V&
!     __derived() const
      { return *static_cast<const _V*>(this); }
  
      template <typename _Up>
*************** template <typename _Tp, typename _Abi>
*** 5185,5200 ****
  
      // load constructor
      template <typename _Up, typename _Flags>
!       _GLIBCXX_SIMD_ALWAYS_INLINE
!       simd(const _Up* __mem, _Flags)
        : _M_data(
  	  _Impl::_S_load(_Flags::template _S_apply<simd>(__mem), _S_type_tag))
        {}
  
      // loads [simd.load]
      template <typename _Up, typename _Flags>
!       _GLIBCXX_SIMD_ALWAYS_INLINE void
!       copy_from(const _Vectorizable<_Up>* __mem, _Flags)
        {
  	_M_data = static_cast<decltype(_M_data)>(
  	  _Impl::_S_load(_Flags::template _S_apply<simd>(__mem), _S_type_tag));
--- 5300,5315 ----
  
      // load constructor
      template <typename _Up, typename _Flags>
!       _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR
!       simd(const _Up* __mem, _IsSimdFlagType<_Flags>)
        : _M_data(
  	  _Impl::_S_load(_Flags::template _S_apply<simd>(__mem), _S_type_tag))
        {}
  
      // loads [simd.load]
      template <typename _Up, typename _Flags>
!       _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR void
!       copy_from(const _Vectorizable<_Up>* __mem, _IsSimdFlagType<_Flags>)
        {
  	_M_data = static_cast<decltype(_M_data)>(
  	  _Impl::_S_load(_Flags::template _S_apply<simd>(__mem), _S_type_tag));
*************** template <typename _Tp, typename _Abi>
*** 5202,5209 ****
  
      // stores [simd.store]
      template <typename _Up, typename _Flags>
!       _GLIBCXX_SIMD_ALWAYS_INLINE void
!       copy_to(_Vectorizable<_Up>* __mem, _Flags) const
        {
  	_Impl::_S_store(_M_data, _Flags::template _S_apply<simd>(__mem),
  			_S_type_tag);
--- 5317,5324 ----
  
      // stores [simd.store]
      template <typename _Up, typename _Flags>
!       _GLIBCXX_SIMD_ALWAYS_INLINE _GLIBCXX_SIMD_CONSTEXPR void
!       copy_to(_Vectorizable<_Up>* __mem, _IsSimdFlagType<_Flags>) const
        {
  	_Impl::_S_store(_M_data, _Flags::template _S_apply<simd>(__mem),
  			_S_type_tag);
*************** template <typename _Tp, typename _Abi>
*** 5374,5380 ****
      }
  
    private:
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR static mask_type
      _S_make_mask(typename mask_type::_MemberType __k)
      { return {__private_init, __k}; }
  
--- 5489,5495 ----
      }
  
    private:
!     _GLIBCXX_SIMD_INTRINSIC static constexpr mask_type
      _S_make_mask(typename mask_type::_MemberType __k)
      { return {__private_init, __k}; }
  
*************** namespace __float_bitwise_operators { //
*** 5401,5426 ****
  template <typename _Tp, typename _Ap>
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR simd<_Tp, _Ap>
    operator^(const simd<_Tp, _Ap>& __a, const simd<_Tp, _Ap>& __b)
!   {
!     return {__private_init,
! 	    _Ap::_SimdImpl::_S_bit_xor(__data(__a), __data(__b))};
!   }
  
  template <typename _Tp, typename _Ap>
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR simd<_Tp, _Ap>
    operator|(const simd<_Tp, _Ap>& __a, const simd<_Tp, _Ap>& __b)
!   {
!     return {__private_init,
! 	    _Ap::_SimdImpl::_S_bit_or(__data(__a), __data(__b))};
!   }
  
  template <typename _Tp, typename _Ap>
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR simd<_Tp, _Ap>
    operator&(const simd<_Tp, _Ap>& __a, const simd<_Tp, _Ap>& __b)
!   {
!     return {__private_init,
! 	    _Ap::_SimdImpl::_S_bit_and(__data(__a), __data(__b))};
!   }
  
  template <typename _Tp, typename _Ap>
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR
--- 5516,5532 ----
  template <typename _Tp, typename _Ap>
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR simd<_Tp, _Ap>
    operator^(const simd<_Tp, _Ap>& __a, const simd<_Tp, _Ap>& __b)
!   { return {__private_init, _Ap::_SimdImpl::_S_bit_xor(__data(__a), __data(__b))}; }
  
  template <typename _Tp, typename _Ap>
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR simd<_Tp, _Ap>
    operator|(const simd<_Tp, _Ap>& __a, const simd<_Tp, _Ap>& __b)
!   { return {__private_init, _Ap::_SimdImpl::_S_bit_or(__data(__a), __data(__b))}; }
  
  template <typename _Tp, typename _Ap>
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR simd<_Tp, _Ap>
    operator&(const simd<_Tp, _Ap>& __a, const simd<_Tp, _Ap>& __b)
!   { return {__private_init, _Ap::_SimdImpl::_S_bit_and(__data(__a), __data(__b))}; }
  
  template <typename _Tp, typename _Ap>
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd_builtin.h gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd_builtin.h
*** gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd_builtin.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd_builtin.h	Thu Jun 20 08:08:10 2024
*************** template <typename _V, typename = _Vecto
*** 52,58 ****
  // Index == -1 requests zeroing of the output element
  template <int... _Indices, typename _Tp, typename _TVT = _VectorTraits<_Tp>,
  	  typename = __detail::__odr_helper>
!   _Tp
    __vector_permute(_Tp __x)
    {
      static_assert(sizeof...(_Indices) == _TVT::_S_full_size);
--- 52,58 ----
  // Index == -1 requests zeroing of the output element
  template <int... _Indices, typename _Tp, typename _TVT = _VectorTraits<_Tp>,
  	  typename = __detail::__odr_helper>
!   constexpr _Tp
    __vector_permute(_Tp __x)
    {
      static_assert(sizeof...(_Indices) == _TVT::_S_full_size);
*************** template <int... _Indices, typename _Tp,
*** 65,71 ****
  // Index == -1 requests zeroing of the output element
  template <int... _Indices, typename _Tp, typename _TVT = _VectorTraits<_Tp>,
  	  typename = __detail::__odr_helper>
!   _Tp
    __vector_shuffle(_Tp __x, _Tp __y)
    {
      return _Tp{(_Indices == -1 ? 0
--- 65,71 ----
  // Index == -1 requests zeroing of the output element
  template <int... _Indices, typename _Tp, typename _TVT = _VectorTraits<_Tp>,
  	  typename = __detail::__odr_helper>
!   constexpr _Tp
    __vector_shuffle(_Tp __x, _Tp __y)
    {
      return _Tp{(_Indices == -1 ? 0
*************** template <unsigned __shift, typename _Tp
*** 194,208 ****
  	using _Up = decltype(__w);
  	return __intrin_bitcast<_Tp>(
  	  __call_with_n_evaluations<(sizeof(_Tp) - __shift) / __chunksize>(
! 	    [](auto... __chunks) { return _Up{__chunks...}; },
! 	    [&](auto __i) { return __w[__shift / __chunksize + __i]; }));
        }
    }
  
  // }}}
  // __extract_part(_SimdWrapper<_Tp, _Np>) {{{
  template <int _Index, int _Total, int _Combine, typename _Tp, size_t _Np>
!   _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_CONST
    _SimdWrapper<_Tp, _Np / _Total * _Combine>
    __extract_part(const _SimdWrapper<_Tp, _Np> __x)
    {
--- 194,211 ----
  	using _Up = decltype(__w);
  	return __intrin_bitcast<_Tp>(
  	  __call_with_n_evaluations<(sizeof(_Tp) - __shift) / __chunksize>(
! 	    [](auto... __chunks) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	      return _Up{__chunks...};
! 	    }, [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	      return __w[__shift / __chunksize + __i];
! 	    }));
        }
    }
  
  // }}}
  // __extract_part(_SimdWrapper<_Tp, _Np>) {{{
  template <int _Index, int _Total, int _Combine, typename _Tp, size_t _Np>
!   _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_CONST constexpr
    _SimdWrapper<_Tp, _Np / _Total * _Combine>
    __extract_part(const _SimdWrapper<_Tp, _Np> __x)
    {
*************** template <int _Index, int _Total, int _C
*** 225,231 ****
  	// by _Total");
  	if (__x._M_is_constprop())
  	  return __generate_from_n_evaluations<__return_size, _R>(
! 	    [&](auto __i) { return __x[__values_to_skip + __i]; });
  	if constexpr (_Index == 0 && _Total == 1)
  	  return __x;
  	else if constexpr (_Index == 0)
--- 228,236 ----
  	// by _Total");
  	if (__x._M_is_constprop())
  	  return __generate_from_n_evaluations<__return_size, _R>(
! 	    [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	      return __x[__values_to_skip + __i];
! 	    });
  	if constexpr (_Index == 0 && _Total == 1)
  	  return __x;
  	else if constexpr (_Index == 0)
*************** template <int _Index, int _Total, int _C
*** 273,280 ****
    __extract_part(const _SimdWrapper<bool, _Np> __x)
    {
      static_assert(_Combine == 1, "_Combine != 1 not implemented");
!     static_assert(__have_avx512f && _Np == _Np);
!     static_assert(_Total >= 2 && _Index + _Combine <= _Total && _Index >= 0);
      return __x._M_data >> (_Index * _Np / _Total);
    }
  
--- 278,284 ----
    __extract_part(const _SimdWrapper<bool, _Np> __x)
    {
      static_assert(_Combine == 1, "_Combine != 1 not implemented");
!     static_assert(__have_avx512f && _Total >= 2 && _Index + _Combine <= _Total && _Index >= 0);
      return __x._M_data >> (_Index * _Np / _Total);
    }
  
*************** template <typename _To,
*** 570,576 ****
  	constexpr auto _Np
  	  = _NParts == 0 ? _FromVT::_S_partial_width - _Offset : _NParts;
  	return __generate_from_n_evaluations<_Np, array<_To, _Np>>(
! 	  [&](auto __i) { return static_cast<_To>(__v[__i + _Offset]); });
        }
      else
        {
--- 574,582 ----
  	constexpr auto _Np
  	  = _NParts == 0 ? _FromVT::_S_partial_width - _Offset : _NParts;
  	return __generate_from_n_evaluations<_Np, array<_To, _Np>>(
! 		 [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   return static_cast<_To>(__v[__i + _Offset]);
! 		 });
        }
      else
        {
*************** template <typename _To,
*** 611,623 ****
  	      return __vector_bitcast<_FromT, decltype(__n)::value>(__vv);
  	    };
  	    [[maybe_unused]] const auto __vi = __to_intrin(__v);
! 	    auto&& __make_array = [](auto __x0, [[maybe_unused]] auto __x1) {
! 	      if constexpr (_Np == 1)
! 		return _R{__intrin_bitcast<_To>(__x0)};
! 	      else
! 		return _R{__intrin_bitcast<_To>(__x0),
! 			  __intrin_bitcast<_To>(__x1)};
! 	    };
  
  	    if constexpr (_Np == 0)
  	      return _R{};
--- 617,630 ----
  	      return __vector_bitcast<_FromT, decltype(__n)::value>(__vv);
  	    };
  	    [[maybe_unused]] const auto __vi = __to_intrin(__v);
! 	    auto&& __make_array
! 		= [](auto __x0, [[maybe_unused]] auto __x1) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		  if constexpr (_Np == 1)
! 		    return _R{__intrin_bitcast<_To>(__x0)};
! 		  else
! 		    return _R{__intrin_bitcast<_To>(__x0),
! 			      __intrin_bitcast<_To>(__x1)};
! 		};
  
  	    if constexpr (_Np == 0)
  	      return _R{};
*************** template <typename _To,
*** 642,648 ****
  		      = __convert_all<__vector_type16_t<int>, _Np>(
  			__adjust(_SizeConstant<_Np * 4>(), __v));
  		    return __generate_from_n_evaluations<_Np, _R>(
! 		      [&](auto __i) {
  			return __vector_convert<_To>(__as_wrapper(__ints[__i]));
  		      });
  		  }
--- 649,655 ----
  		      = __convert_all<__vector_type16_t<int>, _Np>(
  			__adjust(_SizeConstant<_Np * 4>(), __v));
  		    return __generate_from_n_evaluations<_Np, _R>(
! 		      [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  			return __vector_convert<_To>(__as_wrapper(__ints[__i]));
  		      });
  		  }
*************** template <typename _To,
*** 687,722 ****
  		  __vector_bitcast<int>(_mm_unpacklo_epi16(__vv[1], __vv[1])),
  		  __vector_bitcast<int>(_mm_unpackhi_epi16(__vv[1], __vv[1]))};
  		if constexpr (sizeof(_ToT) == 4)
! 		  return __generate_from_n_evaluations<_Np, _R>([&](auto __i) {
! 		    return __vector_convert<_To>(
! 		      _SimdWrapper<int, 4>(__vvvv[__i] >> 24));
! 		  });
  		else if constexpr (is_integral_v<_ToT>)
! 		  return __generate_from_n_evaluations<_Np, _R>([&](auto __i) {
! 		    const auto __signbits = __to_intrin(__vvvv[__i / 2] >> 31);
! 		    const auto __sx32 = __to_intrin(__vvvv[__i / 2] >> 24);
! 		    return __vector_bitcast<_ToT>(
! 		      __i % 2 == 0 ? _mm_unpacklo_epi32(__sx32, __signbits)
! 				   : _mm_unpackhi_epi32(__sx32, __signbits));
! 		  });
  		else
! 		  return __generate_from_n_evaluations<_Np, _R>([&](auto __i) {
! 		    const _SimdWrapper<int, 4> __int4 = __vvvv[__i / 2] >> 24;
! 		    return __vector_convert<_To>(
! 		      __i % 2 == 0 ? __int4
! 				   : _SimdWrapper<int, 4>(
! 				     _mm_unpackhi_epi64(__to_intrin(__int4),
! 							__to_intrin(__int4))));
! 		  });
  	      }
  	    else if constexpr (sizeof(_FromT) == 1 && sizeof(_ToT) == 4)
  	      {
  		const auto __shorts = __convert_all<__vector_type16_t<
  		  conditional_t<is_signed_v<_FromT>, short, unsigned short>>>(
  		  __adjust(_SizeConstant<(_Np + 1) / 2 * 8>(), __v));
! 		return __generate_from_n_evaluations<_Np, _R>([&](auto __i) {
! 		  return __convert_all<_To>(__shorts[__i / 2])[__i % 2];
! 		});
  	      }
  	    else if constexpr (sizeof(_FromT) == 2 && sizeof(_ToT) == 8
  			       && is_signed_v<_FromT> && is_integral_v<_ToT>)
--- 694,733 ----
  		  __vector_bitcast<int>(_mm_unpacklo_epi16(__vv[1], __vv[1])),
  		  __vector_bitcast<int>(_mm_unpackhi_epi16(__vv[1], __vv[1]))};
  		if constexpr (sizeof(_ToT) == 4)
! 		  return __generate_from_n_evaluations<_Np, _R>(
! 			   [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			     return __vector_convert<_To>(
! 				      _SimdWrapper<int, 4>(__vvvv[__i] >> 24));
! 			   });
  		else if constexpr (is_integral_v<_ToT>)
! 		  return __generate_from_n_evaluations<_Np, _R>(
! 			   [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			     const auto __signbits = __to_intrin(__vvvv[__i / 2] >> 31);
! 			     const auto __sx32 = __to_intrin(__vvvv[__i / 2] >> 24);
! 			     return __vector_bitcast<_ToT>(
! 				      __i % 2 == 0 ? _mm_unpacklo_epi32(__sx32, __signbits)
! 						   : _mm_unpackhi_epi32(__sx32, __signbits));
! 			   });
  		else
! 		  return __generate_from_n_evaluations<_Np, _R>(
! 			   [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			     const _SimdWrapper<int, 4> __int4 = __vvvv[__i / 2] >> 24;
! 			     return __vector_convert<_To>(
! 				      __i % 2 == 0 ? __int4
! 						   : _SimdWrapper<int, 4>(
! 						       _mm_unpackhi_epi64(__to_intrin(__int4),
! 									  __to_intrin(__int4))));
! 			   });
  	      }
  	    else if constexpr (sizeof(_FromT) == 1 && sizeof(_ToT) == 4)
  	      {
  		const auto __shorts = __convert_all<__vector_type16_t<
  		  conditional_t<is_signed_v<_FromT>, short, unsigned short>>>(
  		  __adjust(_SizeConstant<(_Np + 1) / 2 * 8>(), __v));
! 		return __generate_from_n_evaluations<_Np, _R>(
! 			 [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			   return __convert_all<_To>(__shorts[__i / 2])[__i % 2];
! 			 });
  	      }
  	    else if constexpr (sizeof(_FromT) == 2 && sizeof(_ToT) == 8
  			       && is_signed_v<_FromT> && is_integral_v<_ToT>)
*************** template <typename _To,
*** 736,744 ****
  		     __vector_bitcast<int>(
  		       _mm_unpackhi_epi32(_mm_srai_epi32(__vv[1], 16),
  					  _mm_srai_epi32(__vv[1], 31)))};
! 		return __generate_from_n_evaluations<_Np, _R>([&](auto __i) {
! 		  return __vector_bitcast<_ToT>(__vvvv[__i]);
! 		});
  	      }
  	    else if constexpr (sizeof(_FromT) <= 2 && sizeof(_ToT) == 8)
  	      {
--- 747,756 ----
  		     __vector_bitcast<int>(
  		       _mm_unpackhi_epi32(_mm_srai_epi32(__vv[1], 16),
  					  _mm_srai_epi32(__vv[1], 31)))};
! 		return __generate_from_n_evaluations<_Np, _R>(
! 			 [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			   return __vector_bitcast<_ToT>(__vvvv[__i]);
! 			 });
  	      }
  	    else if constexpr (sizeof(_FromT) <= 2 && sizeof(_ToT) == 8)
  	      {
*************** template <typename _To,
*** 747,755 ****
  		    is_signed_v<_FromT> || is_floating_point_v<_ToT>, int,
  		    unsigned int>>>(
  		    __adjust(_SizeConstant<(_Np + 1) / 2 * 4>(), __v));
! 		return __generate_from_n_evaluations<_Np, _R>([&](auto __i) {
! 		  return __convert_all<_To>(__ints[__i / 2])[__i % 2];
! 		});
  	      }
  	    else
  	      __assert_unreachable<_To>();
--- 759,768 ----
  		    is_signed_v<_FromT> || is_floating_point_v<_ToT>, int,
  		    unsigned int>>>(
  		    __adjust(_SizeConstant<(_Np + 1) / 2 * 4>(), __v));
! 		return __generate_from_n_evaluations<_Np, _R>(
! 			 [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			   return __convert_all<_To>(__ints[__i / 2])[__i % 2];
! 			 });
  	      }
  	    else
  	      __assert_unreachable<_To>();
*************** template <typename _To,
*** 779,792 ****
  		__extract_part<_Offset, _FromVT::_S_partial_width,
  			       _ToVT::_S_full_size>(__v))};
  	    else
! 	      return __generate_from_n_evaluations<_Np, _R>([&](
! 		auto __i) constexpr {
! 		auto __part
! 		  = __extract_part<__i * _ToVT::_S_full_size + _Offset,
! 				   _FromVT::_S_partial_width,
! 				   _ToVT::_S_full_size>(__v);
! 		return __vector_convert<_To>(__part);
! 	      });
  	  }
  	else if constexpr (_Offset == 0)
  	  return array<_To, 1>{__vector_convert<_To>(__v)};
--- 792,805 ----
  		__extract_part<_Offset, _FromVT::_S_partial_width,
  			       _ToVT::_S_full_size>(__v))};
  	    else
! 	      return __generate_from_n_evaluations<_Np, _R>(
! 		       [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			 auto __part
! 			   = __extract_part<__i * _ToVT::_S_full_size + _Offset,
! 					    _FromVT::_S_partial_width,
! 					    _ToVT::_S_full_size>(__v);
! 			 return __vector_convert<_To>(__part);
! 		       });
  	  }
  	else if constexpr (_Offset == 0)
  	  return array<_To, 1>{__vector_convert<_To>(__v)};
*************** template <typename _Tp, typename _Mp, ty
*** 822,843 ****
      // _SimdBase / base class for simd, providing extra conversions {{{
      struct _SimdBase2
      {
!       _GLIBCXX_SIMD_ALWAYS_INLINE
!       explicit operator __intrinsic_type_t<_Tp, _Np>() const
!       {
! 	return __to_intrin(static_cast<const simd<_Tp, _Abi>*>(this)->_M_data);
!       }
!       _GLIBCXX_SIMD_ALWAYS_INLINE
!       explicit operator __vector_type_t<_Tp, _Np>() const
!       {
! 	return static_cast<const simd<_Tp, _Abi>*>(this)->_M_data.__builtin();
!       }
      };
  
      struct _SimdBase1
      {
!       _GLIBCXX_SIMD_ALWAYS_INLINE
!       explicit operator __intrinsic_type_t<_Tp, _Np>() const
        { return __data(*static_cast<const simd<_Tp, _Abi>*>(this)); }
      };
  
--- 835,853 ----
      // _SimdBase / base class for simd, providing extra conversions {{{
      struct _SimdBase2
      {
!       _GLIBCXX_SIMD_ALWAYS_INLINE explicit
!       operator __intrinsic_type_t<_Tp, _Np>() const
!       { return __to_intrin(static_cast<const simd<_Tp, _Abi>*>(this)->_M_data); }
! 
!       _GLIBCXX_SIMD_ALWAYS_INLINE explicit
!       operator __vector_type_t<_Tp, _Np>() const
!       { return __data(*static_cast<const simd<_Tp, _Abi>*>(this)); }
      };
  
      struct _SimdBase1
      {
!       _GLIBCXX_SIMD_ALWAYS_INLINE explicit
!       operator __intrinsic_type_t<_Tp, _Np>() const
        { return __data(*static_cast<const simd<_Tp, _Abi>*>(this)); }
      };
  
*************** template <typename _Tp, typename _Mp, ty
*** 849,871 ****
      // _MaskBase {{{
      struct _MaskBase2
      {
!       _GLIBCXX_SIMD_ALWAYS_INLINE
!       explicit operator __intrinsic_type_t<_Tp, _Np>() const
!       {
! 	return static_cast<const simd_mask<_Tp, _Abi>*>(this)
! 	  ->_M_data.__intrin();
!       }
!       _GLIBCXX_SIMD_ALWAYS_INLINE
!       explicit operator __vector_type_t<_Tp, _Np>() const
!       {
! 	return static_cast<const simd_mask<_Tp, _Abi>*>(this)->_M_data._M_data;
!       }
      };
  
      struct _MaskBase1
      {
!       _GLIBCXX_SIMD_ALWAYS_INLINE
!       explicit operator __intrinsic_type_t<_Tp, _Np>() const
        { return __data(*static_cast<const simd_mask<_Tp, _Abi>*>(this)); }
      };
  
--- 859,877 ----
      // _MaskBase {{{
      struct _MaskBase2
      {
!       _GLIBCXX_SIMD_ALWAYS_INLINE explicit
!       operator __intrinsic_type_t<_Tp, _Np>() const
!       { return static_cast<const simd_mask<_Tp, _Abi>*>(this) ->_M_data.__intrin(); }
! 
!       _GLIBCXX_SIMD_ALWAYS_INLINE explicit
!       operator __vector_type_t<_Tp, _Np>() const
!       { return static_cast<const simd_mask<_Tp, _Abi>*>(this)->_M_data._M_data; }
      };
  
      struct _MaskBase1
      {
!       _GLIBCXX_SIMD_ALWAYS_INLINE explicit
!       operator __intrinsic_type_t<_Tp, _Np>() const
        { return __data(*static_cast<const simd_mask<_Tp, _Abi>*>(this)); }
      };
  
*************** template <typename _Tp, typename _Mp, ty
*** 884,889 ****
--- 890,896 ----
      public:
        _GLIBCXX_SIMD_ALWAYS_INLINE
        _MaskCastType(_Up __x) : _M_data(__x) {}
+ 
        _GLIBCXX_SIMD_ALWAYS_INLINE
        operator _MaskMember() const { return _M_data; }
      };
*************** template <typename _Tp, typename _Mp, ty
*** 897,905 ****
        _SimdMember _M_data;
  
      public:
!       _GLIBCXX_SIMD_ALWAYS_INLINE
        _SimdCastType1(_Ap __a) : _M_data(__vector_bitcast<_Tp>(__a)) {}
!       _GLIBCXX_SIMD_ALWAYS_INLINE
        operator _SimdMember() const { return _M_data; }
      };
  
--- 904,913 ----
        _SimdMember _M_data;
  
      public:
!       _GLIBCXX_SIMD_ALWAYS_INLINE constexpr
        _SimdCastType1(_Ap __a) : _M_data(__vector_bitcast<_Tp>(__a)) {}
! 
!       _GLIBCXX_SIMD_ALWAYS_INLINE constexpr
        operator _SimdMember() const { return _M_data; }
      };
  
*************** template <typename _Tp, typename _Mp, ty
*** 910,920 ****
        _SimdMember _M_data;
  
      public:
!       _GLIBCXX_SIMD_ALWAYS_INLINE
        _SimdCastType2(_Ap __a) : _M_data(__vector_bitcast<_Tp>(__a)) {}
!       _GLIBCXX_SIMD_ALWAYS_INLINE
        _SimdCastType2(_Bp __b) : _M_data(__b) {}
!       _GLIBCXX_SIMD_ALWAYS_INLINE
        operator _SimdMember() const { return _M_data; }
      };
  
--- 918,930 ----
        _SimdMember _M_data;
  
      public:
!       _GLIBCXX_SIMD_ALWAYS_INLINE constexpr
        _SimdCastType2(_Ap __a) : _M_data(__vector_bitcast<_Tp>(__a)) {}
! 
!       _GLIBCXX_SIMD_ALWAYS_INLINE constexpr
        _SimdCastType2(_Bp __b) : _M_data(__b) {}
! 
!       _GLIBCXX_SIMD_ALWAYS_INLINE constexpr
        operator _SimdMember() const { return _M_data; }
      };
  
*************** template <int _UsedBytes>
*** 1017,1039 ****
  	else
  	  {
  	    constexpr auto __size = _S_size<_Tp>;
! 	    _GLIBCXX_SIMD_USE_CONSTEXPR auto __r = __generate_vector<_UV>(
! 	      [](auto __i) constexpr { return __i < __size ? -1 : 0; });
  	    return __r;
  	  }
        }
  
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr __intrinsic_type_t<_Tp,
! 								  _S_size<_Tp>>
        _S_implicit_mask_intrin()
!       {
! 	return __to_intrin(
! 	  __vector_bitcast<_Tp>(_S_implicit_mask<_Tp>()._M_data));
!       }
  
      template <typename _TW, typename _TVT = _VectorTraits<_TW>>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _TW _S_masked(_TW __x)
        {
  	using _Tp = typename _TVT::value_type;
  	if constexpr (!_MaskMember<_Tp>::_S_is_partial)
--- 1027,1047 ----
  	else
  	  {
  	    constexpr auto __size = _S_size<_Tp>;
! 	    _GLIBCXX_SIMD_USE_CONSTEXPR auto __r
! 	      = __generate_vector<_UV>([](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA
! 				       { return __i < __size ? -1 : 0; });
  	    return __r;
  	  }
        }
  
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr __intrinsic_type_t<_Tp, _S_size<_Tp>>
        _S_implicit_mask_intrin()
!       { return __to_intrin(__vector_bitcast<_Tp>(_S_implicit_mask<_Tp>()._M_data)); }
  
      template <typename _TW, typename _TVT = _VectorTraits<_TW>>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _TW
!       _S_masked(_TW __x)
        {
  	using _Tp = typename _TVT::value_type;
  	if constexpr (!_MaskMember<_Tp>::_S_is_partial)
*************** template <int _UsedBytes>
*** 1155,1162 ****
        { return __implicit_mask_n<_S_size<_Tp>>(); }
  
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr __bool_storage_member_type_t<
! 	_S_size<_Tp>>
        _S_implicit_mask_intrin()
        { return __implicit_mask_n<_S_size<_Tp>>(); }
  
--- 1163,1169 ----
        { return __implicit_mask_n<_S_size<_Tp>>(); }
  
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr __bool_storage_member_type_t<_S_size<_Tp>>
        _S_implicit_mask_intrin()
        { return __implicit_mask_n<_S_size<_Tp>>(); }
  
*************** template <int _UsedBytes>
*** 1208,1214 ****
  	    if constexpr (is_integral_v<typename _TVT::value_type>)
  	      return __x
  		     | __generate_vector<_Tp, _S_full_size<_Tp>>(
! 		       [](auto __i) -> _Tp {
  			 if (__i < _Np)
  			   return 0;
  			 else
--- 1215,1221 ----
  	    if constexpr (is_integral_v<typename _TVT::value_type>)
  	      return __x
  		     | __generate_vector<_Tp, _S_full_size<_Tp>>(
! 		       [](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA -> _Tp {
  			 if (__i < _Np)
  			   return 0;
  			 else
*************** struct _CommonImplBuiltin
*** 1287,1331 ****
  
    // }}}
    // _S_store {{{
    template <size_t _ReqBytes = 0, typename _TV>
!     _GLIBCXX_SIMD_INTRINSIC static void _S_store(_TV __x, void* __addr)
      {
        constexpr size_t _Bytes = _ReqBytes == 0 ? sizeof(__x) : _ReqBytes;
        static_assert(sizeof(__x) >= _Bytes);
  
        if constexpr (__is_vector_type_v<_TV>)
! 	{
! 	  using _Tp = typename _VectorTraits<_TV>::value_type;
! 	  constexpr size_t _Np = _Bytes / sizeof(_Tp);
! 	  static_assert(_Np * sizeof(_Tp) == _Bytes);
! 
! #ifdef _GLIBCXX_SIMD_WORKAROUND_PR90424
! 	  using _Up = conditional_t<
! 	    (is_integral_v<_Tp> || _Bytes < 4),
! 	    conditional_t<(sizeof(__x) > sizeof(long long)), long long, _Tp>,
! 	    float>;
! 	  const auto __v = __vector_bitcast<_Up>(__x);
! #else // _GLIBCXX_SIMD_WORKAROUND_PR90424
! 	  const __vector_type_t<_Tp, _Np> __v = __x;
! #endif // _GLIBCXX_SIMD_WORKAROUND_PR90424
! 
! 	  if constexpr ((_Bytes & (_Bytes - 1)) != 0)
! 	    {
! 	      constexpr size_t _MoreBytes = std::__bit_ceil(_Bytes);
! 	      alignas(decltype(__v)) char __tmp[_MoreBytes];
! 	      __builtin_memcpy(__tmp, &__v, _MoreBytes);
! 	      __builtin_memcpy(__addr, __tmp, _Bytes);
! 	    }
! 	  else
! 	    __builtin_memcpy(__addr, &__v, _Bytes);
! 	}
        else
  	__builtin_memcpy(__addr, &__x, _Bytes);
      }
  
    template <typename _Tp, size_t _Np>
!     _GLIBCXX_SIMD_INTRINSIC static void _S_store(_SimdWrapper<_Tp, _Np> __x,
! 						 void* __addr)
      { _S_store<_Np * sizeof(_Tp)>(__x._M_data, __addr); }
  
    // }}}
--- 1294,1329 ----
  
    // }}}
    // _S_store {{{
+   template <size_t _Bytes>
+     _GLIBCXX_SIMD_INTRINSIC static void
+     _S_memcpy(char* __dst, const char* __src)
+     {
+       if constexpr (_Bytes > 0)
+ 	{
+ 	  constexpr size_t _Ns = std::__bit_floor(_Bytes);
+ 	  __builtin_memcpy(__dst, __src, _Ns);
+ 	  _S_memcpy<_Bytes - _Ns>(__dst + _Ns, __src + _Ns);
+ 	}
+     }
+ 
    template <size_t _ReqBytes = 0, typename _TV>
!     _GLIBCXX_SIMD_INTRINSIC static void
!     _S_store(_TV __x, void* __addr)
      {
        constexpr size_t _Bytes = _ReqBytes == 0 ? sizeof(__x) : _ReqBytes;
        static_assert(sizeof(__x) >= _Bytes);
  
+ #if !defined __clang__ && _GLIBCXX_SIMD_WORKAROUND_PR90424
        if constexpr (__is_vector_type_v<_TV>)
! 	_S_memcpy<_Bytes>(reinterpret_cast<char*>(__addr), reinterpret_cast<const char*>(&__x));
        else
+ #endif // _GLIBCXX_SIMD_WORKAROUND_PR90424
  	__builtin_memcpy(__addr, &__x, _Bytes);
      }
  
    template <typename _Tp, size_t _Np>
!     _GLIBCXX_SIMD_INTRINSIC static void
!     _S_store(_SimdWrapper<_Tp, _Np> __x, void* __addr)
      { _S_store<_Np * sizeof(_Tp)>(__x._M_data, __addr); }
  
    // }}}
*************** struct _CommonImplBuiltin
*** 1336,1341 ****
--- 1334,1344 ----
      {
        if constexpr (_Np == 1)
  	__mem[0] = __x[0];
+       else if (__builtin_is_constant_evaluated())
+ 	{
+ 	  for (size_t __i = 0; __i < _Np; ++__i)
+ 	    __mem[__i] = __x[__i];
+ 	}
        else if constexpr (_Np == 2)
  	{
  	  short __bool2 = (__x._M_to_bits() * 0x81) & 0x0101;
*************** struct _CommonImplBuiltin
*** 1348,1373 ****
  	}
        else
  	{
! 	  __execute_n_times<__div_roundup(_Np, 4)>([&](auto __i) {
! 	    constexpr int __offset = __i * 4;
! 	    constexpr int __remaining = _Np - __offset;
! 	    if constexpr (__remaining > 4 && __remaining <= 7)
! 	      {
! 		const _ULLong __bool7
! 		  = (__x.template _M_extract<__offset>()._M_to_bits()
! 		     * 0x40810204081ULL)
! 		    & 0x0101010101010101ULL;
! 		_S_store<__remaining>(__bool7, __mem + __offset);
! 	      }
! 	    else if constexpr (__remaining >= 4)
! 	      {
! 		int __bits = __x.template _M_extract<__offset>()._M_to_bits();
! 		if constexpr (__remaining > 7)
! 		  __bits &= 0xf;
! 		const int __bool4 = (__bits * 0x204081) & 0x01010101;
! 		_S_store<4>(__bool4, __mem + __offset);
! 	      }
! 	  });
  	}
      }
  
--- 1351,1377 ----
  	}
        else
  	{
! 	  __execute_n_times<__div_roundup(_Np, 4)>(
! 	    [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	      constexpr int __offset = __i * 4;
! 	      constexpr int __remaining = _Np - __offset;
! 	      if constexpr (__remaining > 4 && __remaining <= 7)
! 		{
! 		  const _ULLong __bool7
! 		    = (__x.template _M_extract<__offset>()._M_to_bits()
! 			 * 0x40810204081ULL)
! 			& 0x0101010101010101ULL;
! 		  _S_store<__remaining>(__bool7, __mem + __offset);
! 		}
! 	      else if constexpr (__remaining >= 4)
! 		{
! 		  int __bits = __x.template _M_extract<__offset>()._M_to_bits();
! 		  if constexpr (__remaining > 7)
! 		    __bits &= 0xf;
! 		  const int __bool4 = (__bits * 0x204081) & 0x01010101;
! 		  _S_store<4>(__bool4, __mem + __offset);
! 		}
! 	    });
  	}
      }
  
*************** template <typename _Abi, typename>
*** 1414,1425 ****
  
      // _M_make_simd(_SimdWrapper/__intrinsic_type_t) {{{2
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static simd<_Tp, _Abi>
        _M_make_simd(_SimdWrapper<_Tp, _Np> __x)
        { return {__private_init, __x}; }
  
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static simd<_Tp, _Abi>
        _M_make_simd(__intrinsic_type_t<_Tp, _Np> __x)
        { return {__private_init, __vector_bitcast<_Tp>(__x)}; }
  
--- 1418,1429 ----
  
      // _M_make_simd(_SimdWrapper/__intrinsic_type_t) {{{2
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr simd<_Tp, _Abi>
        _M_make_simd(_SimdWrapper<_Tp, _Np> __x)
        { return {__private_init, __x}; }
  
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr simd<_Tp, _Abi>
        _M_make_simd(__intrinsic_type_t<_Tp, _Np> __x)
        { return {__private_init, __vector_bitcast<_Tp>(__x)}; }
  
*************** template <typename _Abi, typename>
*** 1431,1451 ****
  
      // _S_generator {{{2
      template <typename _Fp, typename _Tp>
!       inline static constexpr _SimdMember<_Tp> _S_generator(_Fp&& __gen,
! 							    _TypeTag<_Tp>)
        {
! 	return __generate_vector<_Tp, _S_full_size<_Tp>>([&](
! 	  auto __i) constexpr {
! 	  if constexpr (__i < _S_size<_Tp>)
! 	    return __gen(__i);
! 	  else
! 	    return 0;
! 	});
        }
  
      // _S_load {{{2
      template <typename _Tp, typename _Up>
!       _GLIBCXX_SIMD_INTRINSIC static _SimdMember<_Tp>
        _S_load(const _Up* __mem, _TypeTag<_Tp>) noexcept
        {
  	constexpr size_t _Np = _S_size<_Tp>;
--- 1435,1455 ----
  
      // _S_generator {{{2
      template <typename _Fp, typename _Tp>
!       inline static constexpr _SimdMember<_Tp>
!       _S_generator(_Fp&& __gen, _TypeTag<_Tp>)
        {
! 	return __generate_vector<_Tp, _S_full_size<_Tp>>(
! 		 [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   if constexpr (__i < _S_size<_Tp>)
! 		     return __gen(__i);
! 		   else
! 		     return 0;
! 		 });
        }
  
      // _S_load {{{2
      template <typename _Tp, typename _Up>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdMember<_Tp>
        _S_load(const _Up* __mem, _TypeTag<_Tp>) noexcept
        {
  	constexpr size_t _Np = _S_size<_Tp>;
*************** template <typename _Abi, typename>
*** 1454,1464 ****
  	    : (is_floating_point_v<_Up> && __have_avx) || __have_avx2 ? 32
  								      : 16;
  	constexpr size_t __bytes_to_load = sizeof(_Up) * _Np;
! 	if constexpr (sizeof(_Up) > 8)
! 	  return __generate_vector<_Tp, _SimdMember<_Tp>::_S_full_size>([&](
! 	    auto __i) constexpr {
! 	    return static_cast<_Tp>(__i < _Np ? __mem[__i] : 0);
! 	  });
  	else if constexpr (is_same_v<_Up, _Tp>)
  	  return _CommonImpl::template _S_load<_Tp, _S_full_size<_Tp>,
  					       _Np * sizeof(_Tp)>(__mem);
--- 1458,1473 ----
  	    : (is_floating_point_v<_Up> && __have_avx) || __have_avx2 ? 32
  								      : 16;
  	constexpr size_t __bytes_to_load = sizeof(_Up) * _Np;
! 	if (__builtin_is_constant_evaluated())
! 	  return __generate_vector<_Tp, _S_full_size<_Tp>>(
! 		   [&](auto __i) constexpr {
! 		     return static_cast<_Tp>(__i < _Np ? __mem[__i] : 0);
! 		   });
! 	else if constexpr (sizeof(_Up) > 8 or __vectorized_sizeof<_Up>() <= sizeof(_Up))
! 	  return __generate_vector<_Tp, _SimdMember<_Tp>::_S_full_size>(
! 		   [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		     return static_cast<_Tp>(__i < _Np ? __mem[__i] : 0);
! 		   });
  	else if constexpr (is_same_v<_Up, _Tp>)
  	  return _CommonImpl::template _S_load<_Tp, _S_full_size<_Tp>,
  					       _Np * sizeof(_Tp)>(__mem);
*************** template <typename _Abi, typename>
*** 1470,1482 ****
  	    constexpr size_t __n_loads = __bytes_to_load / __max_load_size;
  	    constexpr size_t __elements_per_load = _Np / __n_loads;
  	    return __call_with_n_evaluations<__n_loads>(
! 	      [](auto... __uncvted) {
! 		return __convert<_SimdMember<_Tp>>(__uncvted...);
! 	      },
! 	      [&](auto __i) {
! 		return _CommonImpl::template _S_load<_Up, __elements_per_load>(
! 		  __mem + __i * __elements_per_load);
! 	      });
  	  }
  	else if constexpr (__bytes_to_load % (__max_load_size / 2) == 0
  			   && __max_load_size > 16)
--- 1479,1490 ----
  	    constexpr size_t __n_loads = __bytes_to_load / __max_load_size;
  	    constexpr size_t __elements_per_load = _Np / __n_loads;
  	    return __call_with_n_evaluations<__n_loads>(
! 		     [](auto... __uncvted) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		       return __convert<_SimdMember<_Tp>>(__uncvted...);
! 		     }, [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		       return _CommonImpl::template _S_load<_Up, __elements_per_load>(
! 						      __mem + __i * __elements_per_load);
! 		     });
  	  }
  	else if constexpr (__bytes_to_load % (__max_load_size / 2) == 0
  			   && __max_load_size > 16)
*************** template <typename _Abi, typename>
*** 1485,1529 ****
  	      = __bytes_to_load / (__max_load_size / 2);
  	    constexpr size_t __elements_per_load = _Np / __n_loads;
  	    return __call_with_n_evaluations<__n_loads>(
! 	      [](auto... __uncvted) {
! 		return __convert<_SimdMember<_Tp>>(__uncvted...);
! 	      },
! 	      [&](auto __i) {
! 		return _CommonImpl::template _S_load<_Up, __elements_per_load>(
! 		  __mem + __i * __elements_per_load);
! 	      });
  	  }
  	else // e.g. int[] -> <char, 9>
  	  return __call_with_subscripts(
! 	    __mem, make_index_sequence<_Np>(), [](auto... __args) {
! 	      return __vector_type_t<_Tp, _S_full_size<_Tp>>{
! 		static_cast<_Tp>(__args)...};
! 	    });
        }
  
      // _S_masked_load {{{2
      template <typename _Tp, size_t _Np, typename _Up>
!       static inline _SimdWrapper<_Tp, _Np>
        _S_masked_load(_SimdWrapper<_Tp, _Np> __merge, _MaskMember<_Tp> __k,
  		     const _Up* __mem) noexcept
        {
! 	_BitOps::_S_bit_iteration(_MaskImpl::_S_to_bits(__k), [&](auto __i) {
! 	  __merge._M_set(__i, static_cast<_Tp>(__mem[__i]));
! 	});
  	return __merge;
        }
  
      // _S_store {{{2
      template <typename _Tp, typename _Up>
!       _GLIBCXX_SIMD_INTRINSIC static void
        _S_store(_SimdMember<_Tp> __v, _Up* __mem, _TypeTag<_Tp>) noexcept
        {
  	// TODO: converting int -> "smaller int" can be optimized with AVX512
  	constexpr size_t _Np = _S_size<_Tp>;
  	constexpr size_t __max_store_size
  	  = _SuperImpl::template _S_max_store_size<_Up>;
! 	if constexpr (sizeof(_Up) > 8)
! 	  __execute_n_times<_Np>([&](auto __i) constexpr {
  	    __mem[__i] = __v[__i];
  	  });
  	else if constexpr (is_same_v<_Up, _Tp>)
--- 1493,1542 ----
  	      = __bytes_to_load / (__max_load_size / 2);
  	    constexpr size_t __elements_per_load = _Np / __n_loads;
  	    return __call_with_n_evaluations<__n_loads>(
! 		     [](auto... __uncvted) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		       return __convert<_SimdMember<_Tp>>(__uncvted...);
! 		     }, [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		       return _CommonImpl::template _S_load<_Up, __elements_per_load>(
! 						      __mem + __i * __elements_per_load);
! 		     });
  	  }
  	else // e.g. int[] -> <char, 9>
  	  return __call_with_subscripts(
! 	    __mem, make_index_sequence<_Np>(),
! 		   [](auto... __args) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		     return __vector_type_t<_Tp, _S_full_size<_Tp>>{static_cast<_Tp>(__args)...};
! 		   });
        }
  
      // _S_masked_load {{{2
      template <typename _Tp, size_t _Np, typename _Up>
!       static constexpr inline _SimdWrapper<_Tp, _Np>
        _S_masked_load(_SimdWrapper<_Tp, _Np> __merge, _MaskMember<_Tp> __k,
  		     const _Up* __mem) noexcept
        {
! 	_BitOps::_S_bit_iteration(_MaskImpl::_S_to_bits(__k),
! 				  [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 				    __merge._M_set(__i, static_cast<_Tp>(__mem[__i]));
! 				  });
  	return __merge;
        }
  
      // _S_store {{{2
      template <typename _Tp, typename _Up>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr void
        _S_store(_SimdMember<_Tp> __v, _Up* __mem, _TypeTag<_Tp>) noexcept
        {
  	// TODO: converting int -> "smaller int" can be optimized with AVX512
  	constexpr size_t _Np = _S_size<_Tp>;
  	constexpr size_t __max_store_size
  	  = _SuperImpl::template _S_max_store_size<_Up>;
! 	if (__builtin_is_constant_evaluated())
! 	  {
! 	    for (size_t __i = 0; __i < _Np; ++__i)
! 	      __mem[__i] = __v[__i];
! 	  }
! 	else if constexpr (sizeof(_Up) > 8 or __vectorized_sizeof<_Up>() <= sizeof(_Up))
! 	  __execute_n_times<_Np>([&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	    __mem[__i] = __v[__i];
  	  });
  	else if constexpr (is_same_v<_Up, _Tp>)
*************** template <typename _Abi, typename>
*** 1540,1548 ****
  	    using _V = __vector_type_t<_Up, __vsize>;
  	    const array<_V, __stores> __converted
  	      = __convert_all<_V, __stores>(__v);
! 	    __execute_n_times<__full_stores>([&](auto __i) constexpr {
! 	      _CommonImpl::_S_store(__converted[__i], __mem + __i * __vsize);
! 	    });
  	    if constexpr (__full_stores < __stores)
  	      _CommonImpl::template _S_store<(_Np - __full_stores * __vsize)
  					     * sizeof(_Up)>(
--- 1553,1562 ----
  	    using _V = __vector_type_t<_Up, __vsize>;
  	    const array<_V, __stores> __converted
  	      = __convert_all<_V, __stores>(__v);
! 	    __execute_n_times<__full_stores>(
! 	      [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		_CommonImpl::_S_store(__converted[__i], __mem + __i * __vsize);
! 	      });
  	    if constexpr (__full_stores < __stores)
  	      _CommonImpl::template _S_store<(_Np - __full_stores * __vsize)
  					     * sizeof(_Up)>(
*************** template <typename _Abi, typename>
*** 1552,1563 ****
  
      // _S_masked_store_nocvt {{{2
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static void
!       _S_masked_store_nocvt(_SimdWrapper<_Tp, _Np> __v, _Tp* __mem,
! 			    _MaskMember<_Tp> __k)
        {
  	_BitOps::_S_bit_iteration(
! 	  _MaskImpl::_S_to_bits(__k), [&](auto __i) constexpr {
  	    __mem[__i] = __v[__i];
  	  });
        }
--- 1566,1577 ----
  
      // _S_masked_store_nocvt {{{2
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr void
!       _S_masked_store_nocvt(_SimdWrapper<_Tp, _Np> __v, _Tp* __mem, _MaskMember<_Tp> __k)
        {
  	_BitOps::_S_bit_iteration(
! 	  _MaskImpl::_S_to_bits(__k),
! 	  [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	    __mem[__i] = __v[__i];
  	  });
        }
*************** template <typename _Abi, typename>
*** 1565,1573 ****
      // _S_masked_store {{{2
      template <typename _TW, typename _TVT = _VectorTraits<_TW>,
  	      typename _Tp = typename _TVT::value_type, typename _Up>
!       static inline void
!       _S_masked_store(const _TW __v, _Up* __mem, const _MaskMember<_Tp> __k)
! 	noexcept
        {
  	constexpr size_t _TV_size = _S_size<_Tp>;
  	[[maybe_unused]] const auto __vi = __to_intrin(__v);
--- 1579,1586 ----
      // _S_masked_store {{{2
      template <typename _TW, typename _TVT = _VectorTraits<_TW>,
  	      typename _Tp = typename _TVT::value_type, typename _Up>
!       static constexpr inline void
!       _S_masked_store(const _TW __v, _Up* __mem, const _MaskMember<_Tp> __k) noexcept
        {
  	constexpr size_t _TV_size = _S_size<_Tp>;
  	[[maybe_unused]] const auto __vi = __to_intrin(__v);
*************** template <typename _Abi, typename>
*** 1579,1585 ****
  	    _Up> || (is_integral_v<_Tp> && is_integral_v<_Up> && sizeof(_Tp) == sizeof(_Up)))
  	  {
  	    // bitwise or no conversion, reinterpret:
! 	    const _MaskMember<_Up> __kk = [&]() {
  	      if constexpr (__is_bitmask_v<decltype(__k)>)
  		return _MaskMember<_Up>(__k._M_data);
  	      else
--- 1592,1598 ----
  	    _Up> || (is_integral_v<_Tp> && is_integral_v<_Up> && sizeof(_Tp) == sizeof(_Up)))
  	  {
  	    // bitwise or no conversion, reinterpret:
! 	    const _MaskMember<_Up> __kk = [&]() _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	      if constexpr (__is_bitmask_v<decltype(__k)>)
  		return _MaskMember<_Up>(__k._M_data);
  	      else
*************** template <typename _Abi, typename>
*** 1604,1610 ****
  	    if constexpr (_UW_size == _TV_size) // one convert+store
  	      {
  		const _UW __converted = __convert<_UW>(__v);
! 		_SuperImpl::_S_masked_store_nocvt(
  		  __converted, __mem,
  		  _UAbi::_MaskImpl::template _S_convert<
  		    __int_for_sizeof_t<_Up>>(__k));
--- 1617,1623 ----
  	    if constexpr (_UW_size == _TV_size) // one convert+store
  	      {
  		const _UW __converted = __convert<_UW>(__v);
! 		_UAbi::_SimdImpl::_S_masked_store_nocvt(
  		  __converted, __mem,
  		  _UAbi::_MaskImpl::template _S_convert<
  		    __int_for_sizeof_t<_Up>>(__k));
*************** template <typename _Abi, typename>
*** 1618,1625 ****
  		constexpr size_t _NParts = _S_full_size<_Tp> / _UW_size;
  		const array<_UV, _NAllStores> __converted
  		  = __convert_all<_UV, _NAllStores>(__v);
! 		__execute_n_times<_NFullStores>([&](auto __i) {
! 		  _SuperImpl::_S_masked_store_nocvt(
  		    _UW(__converted[__i]), __mem + __i * _UW_size,
  		    _UAbi::_MaskImpl::template _S_convert<
  		      __int_for_sizeof_t<_Up>>(
--- 1631,1638 ----
  		constexpr size_t _NParts = _S_full_size<_Tp> / _UW_size;
  		const array<_UV, _NAllStores> __converted
  		  = __convert_all<_UV, _NAllStores>(__v);
! 		__execute_n_times<_NFullStores>([&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		  _UAbi::_SimdImpl::_S_masked_store_nocvt(
  		    _UW(__converted[__i]), __mem + __i * _UW_size,
  		    _UAbi::_MaskImpl::template _S_convert<
  		      __int_for_sizeof_t<_Up>>(
*************** template <typename _Abi, typename>
*** 1627,1633 ****
  		});
  		if constexpr (_NAllStores
  			      > _NFullStores) // one partial at the end
! 		  _SuperImpl::_S_masked_store_nocvt(
  		    _UW(__converted[_NFullStores]),
  		    __mem + _NFullStores * _UW_size,
  		    _UAbi::_MaskImpl::template _S_convert<
--- 1640,1646 ----
  		});
  		if constexpr (_NAllStores
  			      > _NFullStores) // one partial at the end
! 		  _UAbi::_SimdImpl::_S_masked_store_nocvt(
  		    _UW(__converted[_NFullStores]),
  		    __mem + _NFullStores * _UW_size,
  		    _UAbi::_MaskImpl::template _S_convert<
*************** template <typename _Abi, typename>
*** 1637,1646 ****
  	      }
  	  }
  	else
! 	  _BitOps::_S_bit_iteration(
! 	    _MaskImpl::_S_to_bits(__k), [&](auto __i) constexpr {
! 	      __mem[__i] = static_cast<_Up>(__v[__i]);
! 	    });
        }
  
      // _S_complement {{{2
--- 1650,1659 ----
  	      }
  	  }
  	else
! 	  _BitOps::_S_bit_iteration(_MaskImpl::_S_to_bits(__k),
! 				    [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 				      __mem[__i] = static_cast<_Up>(__v[__i]);
! 				    });
        }
  
      // _S_complement {{{2
*************** template <typename _Abi, typename>
*** 1794,1800 ****
      // reductions {{{2
      template <size_t _Np, size_t... _Is, size_t... _Zeros, typename _Tp,
  	      typename _BinaryOperation>
!       _GLIBCXX_SIMD_INTRINSIC static _Tp
        _S_reduce_partial(index_sequence<_Is...>, index_sequence<_Zeros...>,
  			simd<_Tp, _Abi> __x, _BinaryOperation&& __binary_op)
        {
--- 1807,1813 ----
      // reductions {{{2
      template <size_t _Np, size_t... _Is, size_t... _Zeros, typename _Tp,
  	      typename _BinaryOperation>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
        _S_reduce_partial(index_sequence<_Is...>, index_sequence<_Zeros...>,
  			simd<_Tp, _Abi> __x, _BinaryOperation&& __binary_op)
        {
*************** template <typename _Abi, typename>
*** 1824,1829 ****
--- 1837,1849 ----
  	else if constexpr (_Np == 2)
  	  return __binary_op(simd<_Tp, simd_abi::scalar>(__x[0]),
  			     simd<_Tp, simd_abi::scalar>(__x[1]))[0];
+ 	else if (__builtin_is_constant_evaluated())
+ 	  {
+ 	    simd<_Tp, simd_abi::scalar> __acc = __x[0];
+ 	    for (size_t __i = 1; __i < _Np; ++__i)
+ 	      __acc = __binary_op(__acc, simd<_Tp, simd_abi::scalar>(__x[__i]));
+ 	    return __acc[0];
+ 	  }
  	else if constexpr (_Abi::template _S_is_partial<_Tp>) //{{{
  	  {
  	    [[maybe_unused]] constexpr auto __full_size
*************** template <typename _Abi, typename>
*** 1929,1963 ****
      // frexp, modf and copysign implemented in simd_math.h
  #define _GLIBCXX_SIMD_MATH_FALLBACK(__name)                                    \
      template <typename _Tp, typename... _More>                                 \
!       static _Tp _S_##__name(const _Tp& __x, const _More&... __more)           \
        {                                                                        \
  	return __generate_vector<_Tp>(                                         \
! 	  [&](auto __i) { return __name(__x[__i], __more[__i]...); });         \
        }
  
  #define _GLIBCXX_SIMD_MATH_FALLBACK_MASKRET(__name)                            \
      template <typename _Tp, typename... _More>                                 \
!       static typename _Tp::mask_type _S_##__name(const _Tp& __x,               \
! 						 const _More&... __more)       \
        {                                                                        \
  	return __generate_vector<_Tp>(                                         \
! 	  [&](auto __i) { return __name(__x[__i], __more[__i]...); });         \
        }
  
! #define _GLIBCXX_SIMD_MATH_FALLBACK_FIXEDRET(_RetTp, __name)                   \
!     template <typename _Tp, typename... _More>                                 \
!       static auto _S_##__name(const _Tp& __x, const _More&... __more)          \
!       {                                                                        \
! 	return __fixed_size_storage_t<_RetTp,                                  \
! 				      _VectorTraits<_Tp>::_S_partial_width>::  \
! 	  _S_generate([&](auto __meta) constexpr {                             \
! 	    return __meta._S_generator(                                        \
! 	      [&](auto __i) {                                                  \
! 		return __name(__x[__meta._S_offset + __i],                     \
! 			      __more[__meta._S_offset + __i]...);              \
! 	      },                                                               \
! 	      static_cast<_RetTp*>(nullptr));                                  \
! 	  });                                                                  \
        }
  
      _GLIBCXX_SIMD_MATH_FALLBACK(acos)
--- 1949,1989 ----
      // frexp, modf and copysign implemented in simd_math.h
  #define _GLIBCXX_SIMD_MATH_FALLBACK(__name)                                    \
      template <typename _Tp, typename... _More>                                 \
!       static _Tp                                                               \
!       _S_##__name(const _Tp& __x, const _More&... __more)                      \
        {                                                                        \
  	return __generate_vector<_Tp>(                                         \
! 		 [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {            \
! 		   return __name(__x[__i], __more[__i]...);                    \
! 		 });                                                           \
        }
  
  #define _GLIBCXX_SIMD_MATH_FALLBACK_MASKRET(__name)                            \
      template <typename _Tp, typename... _More>                                 \
!       static typename _Tp::mask_type                                           \
!       _S_##__name(const _Tp& __x, const _More&... __more)                      \
        {                                                                        \
  	return __generate_vector<_Tp>(                                         \
! 		 [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {            \
! 		   return __name(__x[__i], __more[__i]...);                    \
! 		 });                                                           \
        }
  
! #define _GLIBCXX_SIMD_MATH_FALLBACK_FIXEDRET(_RetTp, __name)                          \
!     template <typename _Tp, typename... _More>                                        \
!       static auto                                                                     \
!       _S_##__name(const _Tp& __x, const _More&... __more)                             \
!       {                                                                               \
! 	return __fixed_size_storage_t<_RetTp,                                         \
! 				      _VectorTraits<_Tp>::_S_partial_width>::         \
! 	  _S_generate([&](auto __meta) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { \
! 	    return __meta._S_generator(                                               \
! 	      [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {                      \
! 		return __name(__x[__meta._S_offset + __i],                            \
! 			      __more[__meta._S_offset + __i]...);                     \
! 	      },                                                                      \
! 	      static_cast<_RetTp*>(nullptr));                                         \
! 	  });                                                                         \
        }
  
      _GLIBCXX_SIMD_MATH_FALLBACK(acos)
*************** template <typename _Abi, typename>
*** 2010,2016 ****
        _S_remquo(const _Tp __x, const _Tp __y,
  		__fixed_size_storage_t<int, _TVT::_S_partial_width>* __z)
        {
! 	return __generate_vector<_Tp>([&](auto __i) {
  	  int __tmp;
  	  auto __r = remquo(__x[__i], __y[__i], &__tmp);
  	  __z->_M_set(__i, __tmp);
--- 2036,2042 ----
        _S_remquo(const _Tp __x, const _Tp __y,
  		__fixed_size_storage_t<int, _TVT::_S_partial_width>* __z)
        {
! 	return __generate_vector<_Tp>([&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	  int __tmp;
  	  auto __r = remquo(__x[__i], __y[__i], &__tmp);
  	  __z->_M_set(__i, __tmp);
*************** template <typename _Abi, typename>
*** 2094,2115 ****
  #undef _GLIBCXX_SIMD_MATH_FALLBACK_FIXEDRET
      // _S_abs {{{3
      template <typename _Tp, size_t _Np>
!     _GLIBCXX_SIMD_INTRINSIC static _SimdWrapper<_Tp, _Np>
!     _S_abs(_SimdWrapper<_Tp, _Np> __x) noexcept
!     {
!       // if (__builtin_is_constant_evaluated())
!       //  {
!       //    return __x._M_data < 0 ? -__x._M_data : __x._M_data;
!       //  }
!       if constexpr (is_floating_point_v<_Tp>)
! 	// `v < 0 ? -v : v` cannot compile to the efficient implementation of
! 	// masking the signbit off because it must consider v == -0
  
! 	// ~(-0.) & v would be easy, but breaks with fno-signed-zeros
! 	return __and(_S_absmask<__vector_type_t<_Tp, _Np>>, __x._M_data);
!       else
! 	return __x._M_data < 0 ? -__x._M_data : __x._M_data;
!     }
  
      // }}}3
      // _S_plus_minus {{{
--- 2120,2141 ----
  #undef _GLIBCXX_SIMD_MATH_FALLBACK_FIXEDRET
      // _S_abs {{{3
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static _SimdWrapper<_Tp, _Np>
!       _S_abs(_SimdWrapper<_Tp, _Np> __x) noexcept
!       {
! 	// if (__builtin_is_constant_evaluated())
! 	//  {
! 	//    return __x._M_data < 0 ? -__x._M_data : __x._M_data;
! 	//  }
! 	if constexpr (is_floating_point_v<_Tp>)
! 	  // `v < 0 ? -v : v` cannot compile to the efficient implementation of
! 	  // masking the signbit off because it must consider v == -0
  
! 	  // ~(-0.) & v would be easy, but breaks with fno-signed-zeros
! 	  return __and(_S_absmask<__vector_type_t<_Tp, _Np>>, __x._M_data);
! 	else
! 	  return __x._M_data < 0 ? -__x._M_data : __x._M_data;
!       }
  
      // }}}3
      // _S_plus_minus {{{
*************** template <typename _Abi, typename>
*** 2117,2455 ****
      // - _TV must be __vector_type_t<floating-point type, N>.
      // - _UV must be _TV or floating-point type.
      template <typename _TV, typename _UV>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _TV _S_plus_minus(_TV __x,
! 							       _UV __y) noexcept
!     {
!   #if defined __i386__ && !defined __SSE_MATH__
!       if constexpr (sizeof(__x) == 8)
! 	{ // operations on __x would use the FPU
! 	  static_assert(is_same_v<_TV, __vector_type_t<float, 2>>);
! 	  const auto __x4 = __vector_bitcast<float, 4>(__x);
! 	  if constexpr (is_same_v<_TV, _UV>)
! 	    return __vector_bitcast<float, 2>(
! 	      _S_plus_minus(__x4, __vector_bitcast<float, 4>(__y)));
! 	  else
! 	    return __vector_bitcast<float, 2>(_S_plus_minus(__x4, __y));
! 	}
!   #endif
!   #if !defined __clang__ && __GCC_IEC_559 == 0
!       if (__builtin_is_constant_evaluated()
! 	  || (__builtin_constant_p(__x) && __builtin_constant_p(__y)))
  	return (__x + __y) - __y;
!       else
! 	return [&] {
! 	  __x += __y;
! 	  if constexpr(__have_sse)
! 	    {
! 	      if constexpr (sizeof(__x) >= 16)
! 		asm("" : "+x"(__x));
! 	      else if constexpr (is_same_v<__vector_type_t<float, 2>, _TV>)
! 		asm("" : "+x"(__x[0]), "+x"(__x[1]));
! 	      else
! 		__assert_unreachable<_TV>();
! 	    }
! 	  else if constexpr(__have_neon)
! 	    asm("" : "+w"(__x));
! 	  else if constexpr (__have_power_vmx)
! 	    {
! 	      if constexpr (is_same_v<__vector_type_t<float, 2>, _TV>)
! 		asm("" : "+fgr"(__x[0]), "+fgr"(__x[1]));
! 	      else
! 		asm("" : "+v"(__x));
! 	    }
! 	  else
! 	    asm("" : "+g"(__x));
! 	  return __x - __y;
! 	}();
!   #else
!       return (__x + __y) - __y;
!   #endif
!     }
  
      // }}}
      // _S_nearbyint {{{3
      template <typename _Tp, typename _TVT = _VectorTraits<_Tp>>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_nearbyint(_Tp __x_) noexcept
!     {
!       using value_type = typename _TVT::value_type;
!       using _V = typename _TVT::type;
!       const _V __x = __x_;
!       const _V __absx = __and(__x, _S_absmask<_V>);
!       static_assert(__CHAR_BIT__ * sizeof(1ull) >= __digits_v<value_type>);
!       _GLIBCXX_SIMD_USE_CONSTEXPR _V __shifter_abs
! 	= _V() + (1ull << (__digits_v<value_type> - 1));
!       const _V __shifter = __or(__and(_S_signmask<_V>, __x), __shifter_abs);
!       const _V __shifted = _S_plus_minus(__x, __shifter);
!       return __absx < __shifter_abs ? __shifted : __x;
!     }
  
      // _S_rint {{{3
      template <typename _Tp, typename _TVT = _VectorTraits<_Tp>>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_rint(_Tp __x) noexcept
!     {
!       return _SuperImpl::_S_nearbyint(__x);
!     }
  
      // _S_trunc {{{3
      template <typename _Tp, size_t _Np>
!     _GLIBCXX_SIMD_INTRINSIC static _SimdWrapper<_Tp, _Np>
!     _S_trunc(_SimdWrapper<_Tp, _Np> __x)
!     {
!       using _V = __vector_type_t<_Tp, _Np>;
!       const _V __absx = __and(__x._M_data, _S_absmask<_V>);
!       static_assert(__CHAR_BIT__ * sizeof(1ull) >= __digits_v<_Tp>);
!       constexpr _Tp __shifter = 1ull << (__digits_v<_Tp> - 1);
!       _V __truncated = _S_plus_minus(__absx, __shifter);
!       __truncated -= __truncated > __absx ? _V() + 1 : _V();
!       return __absx < __shifter ? __or(__xor(__absx, __x._M_data), __truncated)
! 				: __x._M_data;
!     }
  
      // _S_round {{{3
      template <typename _Tp, size_t _Np>
!     _GLIBCXX_SIMD_INTRINSIC static _SimdWrapper<_Tp, _Np>
!     _S_round(_SimdWrapper<_Tp, _Np> __x)
!     {
!       const auto __abs_x = _SuperImpl::_S_abs(__x);
!       const auto __t_abs = _SuperImpl::_S_trunc(__abs_x)._M_data;
!       const auto __r_abs // round(abs(x)) =
! 	= __t_abs + (__abs_x._M_data - __t_abs >= _Tp(.5) ? _Tp(1) : 0);
!       return __or(__xor(__abs_x._M_data, __x._M_data), __r_abs);
!     }
  
      // _S_floor {{{3
      template <typename _Tp, size_t _Np>
!     _GLIBCXX_SIMD_INTRINSIC static _SimdWrapper<_Tp, _Np>
!     _S_floor(_SimdWrapper<_Tp, _Np> __x)
!     {
!       const auto __y = _SuperImpl::_S_trunc(__x)._M_data;
!       const auto __negative_input
! 	= __vector_bitcast<_Tp>(__x._M_data < __vector_broadcast<_Np, _Tp>(0));
!       const auto __mask
! 	= __andnot(__vector_bitcast<_Tp>(__y == __x._M_data), __negative_input);
!       return __or(__andnot(__mask, __y),
! 		  __and(__mask, __y - __vector_broadcast<_Np, _Tp>(1)));
!     }
  
      // _S_ceil {{{3
      template <typename _Tp, size_t _Np>
!     _GLIBCXX_SIMD_INTRINSIC static _SimdWrapper<_Tp, _Np>
!     _S_ceil(_SimdWrapper<_Tp, _Np> __x)
!     {
!       const auto __y = _SuperImpl::_S_trunc(__x)._M_data;
!       const auto __negative_input
! 	= __vector_bitcast<_Tp>(__x._M_data < __vector_broadcast<_Np, _Tp>(0));
!       const auto __inv_mask
! 	= __or(__vector_bitcast<_Tp>(__y == __x._M_data), __negative_input);
!       return __or(__and(__inv_mask, __y),
! 		  __andnot(__inv_mask, __y + __vector_broadcast<_Np, _Tp>(1)));
!     }
  
      // _S_isnan {{{3
      template <typename _Tp, size_t _Np>
!     _GLIBCXX_SIMD_INTRINSIC static _MaskMember<_Tp>
!     _S_isnan([[maybe_unused]] _SimdWrapper<_Tp, _Np> __x)
!     {
!   #if __FINITE_MATH_ONLY__
!       return {}; // false
!   #elif !defined __SUPPORT_SNAN__
!       return ~(__x._M_data == __x._M_data);
!   #elif defined __STDC_IEC_559__
!       using _Ip = __int_for_sizeof_t<_Tp>;
!       const auto __absn = __vector_bitcast<_Ip>(_SuperImpl::_S_abs(__x));
!       const auto __infn
! 	= __vector_bitcast<_Ip>(__vector_broadcast<_Np>(__infinity_v<_Tp>));
!       return __infn < __absn;
!   #else
!   #error "Not implemented: how to support SNaN but non-IEC559 floating-point?"
!   #endif
!     }
  
      // _S_isfinite {{{3
      template <typename _Tp, size_t _Np>
!     _GLIBCXX_SIMD_INTRINSIC static _MaskMember<_Tp>
!     _S_isfinite([[maybe_unused]] _SimdWrapper<_Tp, _Np> __x)
!     {
!   #if __FINITE_MATH_ONLY__
!       using _UV = typename _MaskMember<_Tp>::_BuiltinType;
!       _GLIBCXX_SIMD_USE_CONSTEXPR _UV __alltrue = ~_UV();
!       return __alltrue;
!   #else
!       // if all exponent bits are set, __x is either inf or NaN
!       using _Ip = __int_for_sizeof_t<_Tp>;
!       const auto __absn = __vector_bitcast<_Ip>(_SuperImpl::_S_abs(__x));
!       const auto __maxn
! 	= __vector_bitcast<_Ip>(__vector_broadcast<_Np>(__finite_max_v<_Tp>));
!       return __absn <= __maxn;
!   #endif
!     }
  
      // _S_isunordered {{{3
      template <typename _Tp, size_t _Np>
!     _GLIBCXX_SIMD_INTRINSIC static _MaskMember<_Tp>
!     _S_isunordered(_SimdWrapper<_Tp, _Np> __x, _SimdWrapper<_Tp, _Np> __y)
!     {
!       return __or(_S_isnan(__x), _S_isnan(__y));
!     }
  
      // _S_signbit {{{3
      template <typename _Tp, size_t _Np>
!     _GLIBCXX_SIMD_INTRINSIC static _MaskMember<_Tp>
!     _S_signbit(_SimdWrapper<_Tp, _Np> __x)
!     {
!       using _Ip = __int_for_sizeof_t<_Tp>;
!       return __vector_bitcast<_Ip>(__x) < 0;
!       // Arithmetic right shift (SRA) would also work (instead of compare), but
!       // 64-bit SRA isn't available on x86 before AVX512. And in general,
!       // compares are more likely to be efficient than SRA.
!     }
  
      // _S_isinf {{{3
      template <typename _Tp, size_t _Np>
!     _GLIBCXX_SIMD_INTRINSIC static _MaskMember<_Tp>
!     _S_isinf([[maybe_unused]] _SimdWrapper<_Tp, _Np> __x)
!     {
!   #if __FINITE_MATH_ONLY__
!       return {}; // false
!   #else
!       return _SuperImpl::template _S_equal_to<_Tp, _Np>(_SuperImpl::_S_abs(__x),
! 							__vector_broadcast<_Np>(
! 							  __infinity_v<_Tp>));
!       // alternative:
!       // compare to inf using the corresponding integer type
!       /*
! 	 return
! 	 __vector_bitcast<_Tp>(__vector_bitcast<__int_for_sizeof_t<_Tp>>(
! 			       _S_abs(__x)._M_data)
! 	 ==
! 	 __vector_bitcast<__int_for_sizeof_t<_Tp>>(__vector_broadcast<_Np>(
! 	 __infinity_v<_Tp>)));
! 	 */
!   #endif
!     }
  
      // _S_isnormal {{{3
      template <typename _Tp, size_t _Np>
!     _GLIBCXX_SIMD_INTRINSIC static _MaskMember<_Tp>
!     _S_isnormal(_SimdWrapper<_Tp, _Np> __x)
!     {
!       using _Ip = __int_for_sizeof_t<_Tp>;
!       const auto __absn = __vector_bitcast<_Ip>(_SuperImpl::_S_abs(__x));
!       const auto __minn
! 	= __vector_bitcast<_Ip>(__vector_broadcast<_Np>(__norm_min_v<_Tp>));
!   #if __FINITE_MATH_ONLY__
!       return __absn >= __minn;
!   #else
!       const auto __maxn
! 	= __vector_bitcast<_Ip>(__vector_broadcast<_Np>(__finite_max_v<_Tp>));
!       return __minn <= __absn && __absn <= __maxn;
!   #endif
!     }
  
      // _S_fpclassify {{{3
      template <typename _Tp, size_t _Np>
!     _GLIBCXX_SIMD_INTRINSIC static __fixed_size_storage_t<int, _Np>
!     _S_fpclassify(_SimdWrapper<_Tp, _Np> __x)
!     {
!       using _I = __int_for_sizeof_t<_Tp>;
!       const auto __xn
! 	= __vector_bitcast<_I>(__to_intrin(_SuperImpl::_S_abs(__x)));
!       constexpr size_t _NI = sizeof(__xn) / sizeof(_I);
!       _GLIBCXX_SIMD_USE_CONSTEXPR auto __minn
! 	= __vector_bitcast<_I>(__vector_broadcast<_NI>(__norm_min_v<_Tp>));
!       _GLIBCXX_SIMD_USE_CONSTEXPR auto __infn
! 	= __vector_bitcast<_I>(__vector_broadcast<_NI>(__infinity_v<_Tp>));
  
!       _GLIBCXX_SIMD_USE_CONSTEXPR auto __fp_normal
! 	= __vector_broadcast<_NI, _I>(FP_NORMAL);
!   #if !__FINITE_MATH_ONLY__
!       _GLIBCXX_SIMD_USE_CONSTEXPR auto __fp_nan
! 	= __vector_broadcast<_NI, _I>(FP_NAN);
!       _GLIBCXX_SIMD_USE_CONSTEXPR auto __fp_infinite
! 	= __vector_broadcast<_NI, _I>(FP_INFINITE);
!   #endif
!   #ifndef __FAST_MATH__
!       _GLIBCXX_SIMD_USE_CONSTEXPR auto __fp_subnormal
! 	= __vector_broadcast<_NI, _I>(FP_SUBNORMAL);
!   #endif
!       _GLIBCXX_SIMD_USE_CONSTEXPR auto __fp_zero
! 	= __vector_broadcast<_NI, _I>(FP_ZERO);
  
!       __vector_type_t<_I, _NI>
! 	__tmp = __xn < __minn
    #ifdef __FAST_MATH__
! 		  ? __fp_zero
    #else
! 		  ? (__xn == 0 ? __fp_zero : __fp_subnormal)
    #endif
    #if __FINITE_MATH_ONLY__
! 		  : __fp_normal;
    #else
! 		  : (__xn < __infn ? __fp_normal
! 				   : (__xn == __infn ? __fp_infinite : __fp_nan));
    #endif
  
!       if constexpr (sizeof(_I) == sizeof(int))
! 	{
! 	  using _FixedInt = __fixed_size_storage_t<int, _Np>;
! 	  const auto __as_int = __vector_bitcast<int, _Np>(__tmp);
! 	  if constexpr (_FixedInt::_S_tuple_size == 1)
! 	    return {__as_int};
! 	  else if constexpr (_FixedInt::_S_tuple_size == 2
! 			     && is_same_v<
! 			       typename _FixedInt::_SecondType::_FirstAbi,
! 			       simd_abi::scalar>)
! 	    return {__extract<0, 2>(__as_int), __as_int[_Np - 1]};
! 	  else if constexpr (_FixedInt::_S_tuple_size == 2)
! 	    return {__extract<0, 2>(__as_int),
! 		    __auto_bitcast(__extract<1, 2>(__as_int))};
! 	  else
! 	    __assert_unreachable<_Tp>();
! 	}
!       else if constexpr (_Np == 2 && sizeof(_I) == 8
! 			 && __fixed_size_storage_t<int, _Np>::_S_tuple_size == 2)
! 	{
! 	  const auto __aslong = __vector_bitcast<_LLong>(__tmp);
! 	  return {int(__aslong[0]), {int(__aslong[1])}};
! 	}
!   #if _GLIBCXX_SIMD_X86INTRIN
!       else if constexpr (sizeof(_Tp) == 8 && sizeof(__tmp) == 32
! 			 && __fixed_size_storage_t<int, _Np>::_S_tuple_size == 1)
! 	return {_mm_packs_epi32(__to_intrin(__lo128(__tmp)),
! 				__to_intrin(__hi128(__tmp)))};
!       else if constexpr (sizeof(_Tp) == 8 && sizeof(__tmp) == 64
! 			 && __fixed_size_storage_t<int, _Np>::_S_tuple_size == 1)
! 	return {_mm512_cvtepi64_epi32(__to_intrin(__tmp))};
!   #endif // _GLIBCXX_SIMD_X86INTRIN
!       else if constexpr (__fixed_size_storage_t<int, _Np>::_S_tuple_size == 1)
! 	return {__call_with_subscripts<_Np>(__vector_bitcast<_LLong>(__tmp),
! 					    [](auto... __l) {
! 					      return __make_wrapper<int>(__l...);
! 					    })};
!       else
! 	__assert_unreachable<_Tp>();
!     }
  
      // _S_increment & _S_decrement{{{2
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static void
        _S_increment(_SimdWrapper<_Tp, _Np>& __x)
        { __x = __x._M_data + 1; }
  
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static void
        _S_decrement(_SimdWrapper<_Tp, _Np>& __x)
        { __x = __x._M_data - 1; }
  
      // smart_reference access {{{2
      template <typename _Tp, size_t _Np, typename _Up>
!       _GLIBCXX_SIMD_INTRINSIC constexpr static void
        _S_set(_SimdWrapper<_Tp, _Np>& __v, int __i, _Up&& __x) noexcept
        { __v._M_set(__i, static_cast<_Up&&>(__x)); }
  
      // _S_masked_assign{{{2
      template <typename _Tp, typename _K, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static void
        _S_masked_assign(_SimdWrapper<_K, _Np> __k, _SimdWrapper<_Tp, _Np>& __lhs,
  		       __type_identity_t<_SimdWrapper<_Tp, _Np>> __rhs)
        {
--- 2143,2479 ----
      // - _TV must be __vector_type_t<floating-point type, N>.
      // - _UV must be _TV or floating-point type.
      template <typename _TV, typename _UV>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _TV
!       _S_plus_minus(_TV __x, _UV __y) noexcept
!       {
! #if defined __i386__ && !defined __SSE_MATH__
! 	if constexpr (sizeof(__x) == 8)
! 	  { // operations on __x would use the FPU
! 	    static_assert(is_same_v<_TV, __vector_type_t<float, 2>>);
! 	    const auto __x4 = __vector_bitcast<float, 4>(__x);
! 	    if constexpr (is_same_v<_TV, _UV>)
! 	      return __vector_bitcast<float, 2>(
! 		       _S_plus_minus(__x4, __vector_bitcast<float, 4>(__y)));
! 	    else
! 	      return __vector_bitcast<float, 2>(_S_plus_minus(__x4, __y));
! 	  }
! #endif
! #if !defined __clang__ && __GCC_IEC_559 == 0
! 	if (__builtin_is_constant_evaluated()
! 	      || (__builtin_constant_p(__x) && __builtin_constant_p(__y)))
! 	  return (__x + __y) - __y;
! 	else
! 	  return [&] {
! 	    __x += __y;
! 	    if constexpr(__have_sse)
! 	      {
! 		if constexpr (sizeof(__x) >= 16)
! 		  asm("" : "+x"(__x));
! 		else if constexpr (is_same_v<__vector_type_t<float, 2>, _TV>)
! 		  asm("" : "+x"(__x[0]), "+x"(__x[1]));
! 		else
! 		  __assert_unreachable<_TV>();
! 	      }
! 	    else if constexpr(__have_neon)
! 	      asm("" : "+w"(__x));
! 	    else if constexpr (__have_power_vmx)
! 	      {
! 		if constexpr (is_same_v<__vector_type_t<float, 2>, _TV>)
! 		  asm("" : "+fgr"(__x[0]), "+fgr"(__x[1]));
! 		else
! 		  asm("" : "+v"(__x));
! 	      }
! 	    else
! 	      asm("" : "+g"(__x));
! 	    return __x - __y;
! 	  }();
! #else
  	return (__x + __y) - __y;
! #endif
!       }
  
      // }}}
      // _S_nearbyint {{{3
      template <typename _Tp, typename _TVT = _VectorTraits<_Tp>>
!       _GLIBCXX_SIMD_INTRINSIC static _Tp
!       _S_nearbyint(_Tp __x_) noexcept
!       {
! 	using value_type = typename _TVT::value_type;
! 	using _V = typename _TVT::type;
! 	const _V __x = __x_;
! 	const _V __absx = __and(__x, _S_absmask<_V>);
! 	static_assert(__CHAR_BIT__ * sizeof(1ull) >= __digits_v<value_type>);
! 	_GLIBCXX_SIMD_USE_CONSTEXPR _V __shifter_abs
! 	  = _V() + (1ull << (__digits_v<value_type> - 1));
! 	const _V __shifter = __or(__and(_S_signmask<_V>, __x), __shifter_abs);
! 	const _V __shifted = _S_plus_minus(__x, __shifter);
! 	return __absx < __shifter_abs ? __shifted : __x;
!       }
  
      // _S_rint {{{3
      template <typename _Tp, typename _TVT = _VectorTraits<_Tp>>
!       _GLIBCXX_SIMD_INTRINSIC static _Tp
!       _S_rint(_Tp __x) noexcept
!       { return _SuperImpl::_S_nearbyint(__x); }
  
      // _S_trunc {{{3
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static _SimdWrapper<_Tp, _Np>
!       _S_trunc(_SimdWrapper<_Tp, _Np> __x)
!       {
! 	using _V = __vector_type_t<_Tp, _Np>;
! 	const _V __absx = __and(__x._M_data, _S_absmask<_V>);
! 	static_assert(__CHAR_BIT__ * sizeof(1ull) >= __digits_v<_Tp>);
! 	constexpr _Tp __shifter = 1ull << (__digits_v<_Tp> - 1);
! 	_V __truncated = _S_plus_minus(__absx, __shifter);
! 	__truncated -= __truncated > __absx ? _V() + 1 : _V();
! 	return __absx < __shifter ? __or(__xor(__absx, __x._M_data), __truncated)
! 				  : __x._M_data;
!       }
  
      // _S_round {{{3
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static _SimdWrapper<_Tp, _Np>
!       _S_round(_SimdWrapper<_Tp, _Np> __x)
!       {
! 	const auto __abs_x = _SuperImpl::_S_abs(__x);
! 	const auto __t_abs = _SuperImpl::_S_trunc(__abs_x)._M_data;
! 	const auto __r_abs // round(abs(x)) =
! 	  = __t_abs + (__abs_x._M_data - __t_abs >= _Tp(.5) ? _Tp(1) : 0);
! 	return __or(__xor(__abs_x._M_data, __x._M_data), __r_abs);
!       }
  
      // _S_floor {{{3
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static _SimdWrapper<_Tp, _Np>
!       _S_floor(_SimdWrapper<_Tp, _Np> __x)
!       {
! 	const auto __y = _SuperImpl::_S_trunc(__x)._M_data;
! 	const auto __negative_input
! 	  = __vector_bitcast<_Tp>(__x._M_data < __vector_broadcast<_Np, _Tp>(0));
! 	const auto __mask
! 	  = __andnot(__vector_bitcast<_Tp>(__y == __x._M_data), __negative_input);
! 	return __or(__andnot(__mask, __y),
! 		    __and(__mask, __y - __vector_broadcast<_Np, _Tp>(1)));
!       }
  
      // _S_ceil {{{3
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static _SimdWrapper<_Tp, _Np>
!       _S_ceil(_SimdWrapper<_Tp, _Np> __x)
!       {
! 	const auto __y = _SuperImpl::_S_trunc(__x)._M_data;
! 	const auto __negative_input
! 	  = __vector_bitcast<_Tp>(__x._M_data < __vector_broadcast<_Np, _Tp>(0));
! 	const auto __inv_mask
! 	  = __or(__vector_bitcast<_Tp>(__y == __x._M_data), __negative_input);
! 	return __or(__and(__inv_mask, __y),
! 		    __andnot(__inv_mask, __y + __vector_broadcast<_Np, _Tp>(1)));
!       }
  
      // _S_isnan {{{3
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static _MaskMember<_Tp>
!       _S_isnan([[maybe_unused]] _SimdWrapper<_Tp, _Np> __x)
!       {
! #if __FINITE_MATH_ONLY__
! 	return {}; // false
! #elif !defined __SUPPORT_SNAN__
! 	return ~(__x._M_data == __x._M_data);
! #elif defined __STDC_IEC_559__
! 	using _Ip = __int_for_sizeof_t<_Tp>;
! 	const auto __absn = __vector_bitcast<_Ip>(_SuperImpl::_S_abs(__x));
! 	const auto __infn
! 	  = __vector_bitcast<_Ip>(__vector_broadcast<_Np>(__infinity_v<_Tp>));
! 	return __infn < __absn;
! #else
! #error "Not implemented: how to support SNaN but non-IEC559 floating-point?"
! #endif
!       }
  
      // _S_isfinite {{{3
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static _MaskMember<_Tp>
!       _S_isfinite([[maybe_unused]] _SimdWrapper<_Tp, _Np> __x)
!       {
! #if __FINITE_MATH_ONLY__
! 	using _UV = typename _MaskMember<_Tp>::_BuiltinType;
! 	_GLIBCXX_SIMD_USE_CONSTEXPR _UV __alltrue = ~_UV();
! 	return __alltrue;
! #else
! 	// if all exponent bits are set, __x is either inf or NaN
! 	using _Ip = __int_for_sizeof_t<_Tp>;
! 	const auto __absn = __vector_bitcast<_Ip>(_SuperImpl::_S_abs(__x));
! 	const auto __maxn
! 	  = __vector_bitcast<_Ip>(__vector_broadcast<_Np>(__finite_max_v<_Tp>));
! 	return __absn <= __maxn;
! #endif
!       }
  
      // _S_isunordered {{{3
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static _MaskMember<_Tp>
!       _S_isunordered(_SimdWrapper<_Tp, _Np> __x, _SimdWrapper<_Tp, _Np> __y)
!       { return __or(_S_isnan(__x), _S_isnan(__y)); }
  
      // _S_signbit {{{3
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static _MaskMember<_Tp>
!       _S_signbit(_SimdWrapper<_Tp, _Np> __x)
!       {
! 	using _Ip = __int_for_sizeof_t<_Tp>;
! 	return __vector_bitcast<_Ip>(__x) < 0;
! 	// Arithmetic right shift (SRA) would also work (instead of compare), but
! 	// 64-bit SRA isn't available on x86 before AVX512. And in general,
! 	// compares are more likely to be efficient than SRA.
!       }
  
      // _S_isinf {{{3
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static _MaskMember<_Tp>
!       _S_isinf([[maybe_unused]] _SimdWrapper<_Tp, _Np> __x)
!       {
! #if __FINITE_MATH_ONLY__
! 	return {}; // false
! #else
! 	return _SuperImpl::template _S_equal_to<_Tp, _Np>(_SuperImpl::_S_abs(__x),
! 							  __vector_broadcast<_Np>(
! 							    __infinity_v<_Tp>));
! 	// alternative:
! 	// compare to inf using the corresponding integer type
! 	/*
! 	   return
! 	   __vector_bitcast<_Tp>(__vector_bitcast<__int_for_sizeof_t<_Tp>>(
! 				 _S_abs(__x)._M_data)
! 	   ==
! 	   __vector_bitcast<__int_for_sizeof_t<_Tp>>(__vector_broadcast<_Np>(
! 	   __infinity_v<_Tp>)));
! 	   */
! #endif
!       }
  
      // _S_isnormal {{{3
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static _MaskMember<_Tp>
!       _S_isnormal(_SimdWrapper<_Tp, _Np> __x)
!       {
! 	using _Ip = __int_for_sizeof_t<_Tp>;
! 	const auto __absn = __vector_bitcast<_Ip>(_SuperImpl::_S_abs(__x));
! 	const auto __minn
! 	  = __vector_bitcast<_Ip>(__vector_broadcast<_Np>(__norm_min_v<_Tp>));
! #if __FINITE_MATH_ONLY__
! 	return __absn >= __minn;
! #else
! 	const auto __maxn
! 	  = __vector_bitcast<_Ip>(__vector_broadcast<_Np>(__finite_max_v<_Tp>));
! 	return __minn <= __absn && __absn <= __maxn;
! #endif
!       }
  
      // _S_fpclassify {{{3
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static __fixed_size_storage_t<int, _Np>
!       _S_fpclassify(_SimdWrapper<_Tp, _Np> __x)
!       {
! 	using _I = __int_for_sizeof_t<_Tp>;
! 	const auto __xn
! 	  = __vector_bitcast<_I>(__to_intrin(_SuperImpl::_S_abs(__x)));
! 	constexpr size_t _NI = sizeof(__xn) / sizeof(_I);
! 	_GLIBCXX_SIMD_USE_CONSTEXPR auto __minn
! 	  = __vector_bitcast<_I>(__vector_broadcast<_NI>(__norm_min_v<_Tp>));
  
! 	_GLIBCXX_SIMD_USE_CONSTEXPR auto __fp_normal
! 	  = __vector_broadcast<_NI, _I>(FP_NORMAL);
! #if !__FINITE_MATH_ONLY__
! 	_GLIBCXX_SIMD_USE_CONSTEXPR auto __infn
! 	  = __vector_bitcast<_I>(__vector_broadcast<_NI>(__infinity_v<_Tp>));
! 	_GLIBCXX_SIMD_USE_CONSTEXPR auto __fp_nan
! 	  = __vector_broadcast<_NI, _I>(FP_NAN);
! 	_GLIBCXX_SIMD_USE_CONSTEXPR auto __fp_infinite
! 	  = __vector_broadcast<_NI, _I>(FP_INFINITE);
! #endif
! #ifndef __FAST_MATH__
! 	_GLIBCXX_SIMD_USE_CONSTEXPR auto __fp_subnormal
! 	  = __vector_broadcast<_NI, _I>(FP_SUBNORMAL);
! #endif
! 	_GLIBCXX_SIMD_USE_CONSTEXPR auto __fp_zero
! 	  = __vector_broadcast<_NI, _I>(FP_ZERO);
  
! 	__vector_type_t<_I, _NI>
! 	  __tmp = __xn < __minn
    #ifdef __FAST_MATH__
! 		    ? __fp_zero
    #else
! 		    ? (__xn == 0 ? __fp_zero : __fp_subnormal)
    #endif
    #if __FINITE_MATH_ONLY__
! 		    : __fp_normal;
    #else
! 		    : (__xn < __infn ? __fp_normal
! 				     : (__xn == __infn ? __fp_infinite : __fp_nan));
    #endif
  
! 	if constexpr (sizeof(_I) == sizeof(int))
! 	  {
! 	    using _FixedInt = __fixed_size_storage_t<int, _Np>;
! 	    const auto __as_int = __vector_bitcast<int, _Np>(__tmp);
! 	    if constexpr (_FixedInt::_S_tuple_size == 1)
! 	      return {__as_int};
! 	    else if constexpr (_FixedInt::_S_tuple_size == 2
! 				 && is_same_v<
! 				      typename _FixedInt::_SecondType::_FirstAbi,
! 				      simd_abi::scalar>)
! 	      return {__extract<0, 2>(__as_int), __as_int[_Np - 1]};
! 	    else if constexpr (_FixedInt::_S_tuple_size == 2)
! 	      return {__extract<0, 2>(__as_int),
! 		      __auto_bitcast(__extract<1, 2>(__as_int))};
! 	    else
! 	      __assert_unreachable<_Tp>();
! 	  }
! 	else if constexpr (_Np == 2 && sizeof(_I) == 8
! 			     && __fixed_size_storage_t<int, _Np>::_S_tuple_size == 2)
! 	  {
! 	    const auto __aslong = __vector_bitcast<_LLong>(__tmp);
! 	    return {int(__aslong[0]), {int(__aslong[1])}};
! 	  }
! #if _GLIBCXX_SIMD_X86INTRIN
! 	else if constexpr (sizeof(_Tp) == 8 && sizeof(__tmp) == 32
! 			     && __fixed_size_storage_t<int, _Np>::_S_tuple_size == 1)
! 	  return {_mm_packs_epi32(__to_intrin(__lo128(__tmp)),
! 				  __to_intrin(__hi128(__tmp)))};
! 	else if constexpr (sizeof(_Tp) == 8 && sizeof(__tmp) == 64
! 			     && __fixed_size_storage_t<int, _Np>::_S_tuple_size == 1)
! 	  return {_mm512_cvtepi64_epi32(__to_intrin(__tmp))};
! #endif // _GLIBCXX_SIMD_X86INTRIN
! 	else if constexpr (__fixed_size_storage_t<int, _Np>::_S_tuple_size == 1)
! 	  return {__call_with_subscripts<_Np>(__vector_bitcast<_LLong>(__tmp),
! 					      [](auto... __l) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 						return __make_wrapper<int>(__l...);
! 					      })};
! 	else
! 	  __assert_unreachable<_Tp>();
!       }
  
      // _S_increment & _S_decrement{{{2
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr void
        _S_increment(_SimdWrapper<_Tp, _Np>& __x)
        { __x = __x._M_data + 1; }
  
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr void
        _S_decrement(_SimdWrapper<_Tp, _Np>& __x)
        { __x = __x._M_data - 1; }
  
      // smart_reference access {{{2
      template <typename _Tp, size_t _Np, typename _Up>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr void
        _S_set(_SimdWrapper<_Tp, _Np>& __v, int __i, _Up&& __x) noexcept
        { __v._M_set(__i, static_cast<_Up&&>(__x)); }
  
      // _S_masked_assign{{{2
      template <typename _Tp, typename _K, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr void
        _S_masked_assign(_SimdWrapper<_K, _Np> __k, _SimdWrapper<_Tp, _Np>& __lhs,
  		       __type_identity_t<_SimdWrapper<_Tp, _Np>> __rhs)
        {
*************** template <typename _Abi, typename>
*** 2462,2468 ****
        }
  
      template <typename _Tp, typename _K, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static void
        _S_masked_assign(_SimdWrapper<_K, _Np> __k, _SimdWrapper<_Tp, _Np>& __lhs,
  		       __type_identity_t<_Tp> __rhs)
        {
--- 2486,2492 ----
        }
  
      template <typename _Tp, typename _K, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr void
        _S_masked_assign(_SimdWrapper<_K, _Np> __k, _SimdWrapper<_Tp, _Np>& __lhs,
  		       __type_identity_t<_Tp> __rhs)
        {
*************** template <typename _Abi, typename>
*** 2490,2496 ****
  
      // _S_masked_cassign {{{2
      template <typename _Op, typename _Tp, typename _K, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static void
        _S_masked_cassign(const _SimdWrapper<_K, _Np> __k,
  			_SimdWrapper<_Tp, _Np>& __lhs,
  			const __type_identity_t<_SimdWrapper<_Tp, _Np>> __rhs,
--- 2514,2520 ----
  
      // _S_masked_cassign {{{2
      template <typename _Op, typename _Tp, typename _K, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr void
        _S_masked_cassign(const _SimdWrapper<_K, _Np> __k,
  			_SimdWrapper<_Tp, _Np>& __lhs,
  			const __type_identity_t<_SimdWrapper<_Tp, _Np>> __rhs,
*************** template <typename _Abi, typename>
*** 2506,2512 ****
        }
  
      template <typename _Op, typename _Tp, typename _K, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static void
        _S_masked_cassign(const _SimdWrapper<_K, _Np> __k,
  			_SimdWrapper<_Tp, _Np>& __lhs,
  			const __type_identity_t<_Tp> __rhs, _Op __op)
--- 2530,2536 ----
        }
  
      template <typename _Op, typename _Tp, typename _K, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr void
        _S_masked_cassign(const _SimdWrapper<_K, _Np> __k,
  			_SimdWrapper<_Tp, _Np>& __lhs,
  			const __type_identity_t<_Tp> __rhs, _Op __op)
*************** template <typename _Abi, typename>
*** 2515,2521 ****
      // _S_masked_unary {{{2
      template <template <typename> class _Op, typename _Tp, typename _K,
  	      size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static _SimdWrapper<_Tp, _Np>
        _S_masked_unary(const _SimdWrapper<_K, _Np> __k,
  		      const _SimdWrapper<_Tp, _Np> __v)
        {
--- 2539,2545 ----
      // _S_masked_unary {{{2
      template <template <typename> class _Op, typename _Tp, typename _K,
  	      size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
        _S_masked_unary(const _SimdWrapper<_K, _Np> __k,
  		      const _SimdWrapper<_Tp, _Np> __v)
        {
*************** template <typename _Abi, typename>
*** 2525,2532 ****
  	_Op<decltype(__vv)> __op;
  	if (__k._M_is_constprop_all_of())
  	  return __data(__op(__vv));
! 	else
! 	  return _CommonImpl::_S_blend(__k, __v, __data(__op(__vv)));
        }
  
      //}}}2
--- 2549,2579 ----
  	_Op<decltype(__vv)> __op;
  	if (__k._M_is_constprop_all_of())
  	  return __data(__op(__vv));
! 	else if constexpr (is_same_v<_Op<void>, __increment<void>>)
! 	  {
! 	    static_assert(not std::is_same_v<_K, bool>);
! 	    if constexpr (is_integral_v<_Tp>)
! 	      // Take a shortcut knowing that __k is an integer vector with values -1 or 0.
! 	      return __v._M_data - __vector_bitcast<_Tp>(__k._M_data);
! 	    else if constexpr (not __have_avx2)
! 	      return __v._M_data
! 		       + __vector_bitcast<_Tp>(__k._M_data & __builtin_bit_cast(
! 							       _K, _Tp(1)));
! 	    // starting with AVX2 it is more efficient to blend after add
! 	  }
! 	else if constexpr (is_same_v<_Op<void>, __decrement<void>>)
! 	  {
! 	    static_assert(not std::is_same_v<_K, bool>);
! 	    if constexpr (is_integral_v<_Tp>)
! 	      // Take a shortcut knowing that __k is an integer vector with values -1 or 0.
! 	      return __v._M_data + __vector_bitcast<_Tp>(__k._M_data);
! 	    else if constexpr (not __have_avx2)
! 	      return __v._M_data
! 		       - __vector_bitcast<_Tp>(__k._M_data & __builtin_bit_cast(
! 							       _K, _Tp(1)));
! 	    // starting with AVX2 it is more efficient to blend after sub
! 	  }
! 	return _CommonImpl::_S_blend(__k, __v, __data(__op(__vv)));
        }
  
      //}}}2
*************** struct _MaskImplBuiltinMixin
*** 2554,2566 ****
      _S_to_maskvector(_BitMask<_Np, _Sanitized> __x)
      {
        static_assert(is_same_v<_Up, __int_for_sizeof_t<_Up>>);
!       return __generate_vector<__vector_type_t<_Up, _ToN>>([&](
! 	auto __i) constexpr {
! 	if constexpr (__i < _Np)
! 	  return __x[__i] ? ~_Up() : _Up();
! 	else
! 	  return _Up();
!       });
      }
  
    template <typename _Up, size_t _UpN = 0, typename _Tp, size_t _Np,
--- 2601,2613 ----
      _S_to_maskvector(_BitMask<_Np, _Sanitized> __x)
      {
        static_assert(is_same_v<_Up, __int_for_sizeof_t<_Up>>);
!       return __generate_vector<__vector_type_t<_Up, _ToN>>(
! 	       [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		 if constexpr (__i < _Np)
! 		   return __x[__i] ? ~_Up() : _Up();
! 		 else
! 		   return _Up();
! 	       });
      }
  
    template <typename _Up, size_t _UpN = 0, typename _Tp, size_t _Np,
*************** struct _MaskImplBuiltinMixin
*** 2601,2613 ****
  	  -1, -1, -1, -1, -1>(__y); else
  	  */
  	  {
! 	    return __generate_vector<__vector_type_t<_Up, _ToN>>([&](
! 	      auto __i) constexpr {
! 	      if constexpr (__i < _Np)
! 		return _Up(__x[__i.value]);
! 	      else
! 		return _Up();
! 	    });
  	  }
  	}
      }
--- 2648,2660 ----
  	  -1, -1, -1, -1, -1>(__y); else
  	  */
  	  {
! 	    return __generate_vector<__vector_type_t<_Up, _ToN>>(
! 		     [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		       if constexpr (__i < _Np)
! 			 return _Up(__x[__i.value]);
! 		       else
! 			 return _Up();
! 		     });
  	  }
  	}
      }
*************** struct _MaskImplBuiltinMixin
*** 2625,2631 ****
  	= __vector_bitcast<_Up>(__x) >> (sizeof(_Up) * __CHAR_BIT__ - 1);
        _ULLong __r = 0;
        __execute_n_times<_Np>(
! 	[&](auto __i) { __r |= _ULLong(__bools[__i.value]) << __i; });
        return __r;
      }
  
--- 2672,2680 ----
  	= __vector_bitcast<_Up>(__x) >> (sizeof(_Up) * __CHAR_BIT__ - 1);
        _ULLong __r = 0;
        __execute_n_times<_Np>(
! 	[&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	  __r |= _ULLong(__bools[__i.value]) << __i;
! 	});
        return __r;
      }
  
*************** template <typename _Abi, typename>
*** 2657,2666 ****
      template <typename _Tp>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _MaskMember<_Tp>
        _S_broadcast(bool __x)
!       {
! 	return __x ? _Abi::template _S_implicit_mask<_Tp>()
! 		   : _MaskMember<_Tp>();
!       }
  
      // }}}
      // _S_load {{{
--- 2706,2712 ----
      template <typename _Tp>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _MaskMember<_Tp>
        _S_broadcast(bool __x)
!       { return __x ? _Abi::template _S_implicit_mask<_Tp>() : _MaskMember<_Tp>(); }
  
      // }}}
      // _S_load {{{
*************** template <typename _Abi, typename>
*** 2669,2685 ****
        _S_load(const bool* __mem)
        {
  	using _I = __int_for_sizeof_t<_Tp>;
! 	if constexpr (sizeof(_Tp) == sizeof(bool))
! 	  {
! 	    const auto __bools
! 	      = _CommonImpl::template _S_load<_I, _S_size<_Tp>>(__mem);
! 	    // bool is {0, 1}, everything else is UB
! 	    return __bools > 0;
! 	  }
! 	else
! 	  return __generate_vector<_I, _S_size<_Tp>>([&](auto __i) constexpr {
! 	    return __mem[__i] ? ~_I() : _I();
! 	  });
        }
  
      // }}}
--- 2715,2732 ----
        _S_load(const bool* __mem)
        {
  	using _I = __int_for_sizeof_t<_Tp>;
! 	if (not __builtin_is_constant_evaluated())
! 	  if constexpr (sizeof(_Tp) == sizeof(bool))
! 	    {
! 	      const auto __bools
! 		= _CommonImpl::template _S_load<_I, _S_size<_Tp>>(__mem);
! 	      // bool is {0, 1}, everything else is UB
! 	      return __bools > 0;
! 	    }
! 	return __generate_vector<_I, _S_size<_Tp>>(
! 		 [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   return __mem[__i] ? ~_I() : _I();
! 		 });
        }
  
      // }}}
*************** template <typename _Abi, typename>
*** 2752,2758 ****
  	// AVX(2) has 32/64 bit maskload, but nothing at 8 bit granularity
  	auto __tmp = __wrapper_bitcast<__int_for_sizeof_t<_Tp>>(__merge);
  	_BitOps::_S_bit_iteration(_SuperImpl::_S_to_bits(__mask),
! 				  [&](auto __i) {
  				    __tmp._M_set(__i, -__mem[__i]);
  				  });
  	__merge = __wrapper_bitcast<_Tp>(__tmp);
--- 2799,2805 ----
  	// AVX(2) has 32/64 bit maskload, but nothing at 8 bit granularity
  	auto __tmp = __wrapper_bitcast<__int_for_sizeof_t<_Tp>>(__merge);
  	_BitOps::_S_bit_iteration(_SuperImpl::_S_to_bits(__mask),
! 				  [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  				    __tmp._M_set(__i, -__mem[__i]);
  				  });
  	__merge = __wrapper_bitcast<_Tp>(__tmp);
*************** template <typename _Abi, typename>
*** 2761,2770 ****
  
      // _S_store {{{2
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static void _S_store(_SimdWrapper<_Tp, _Np> __v,
! 						   bool* __mem) noexcept
        {
! 	__execute_n_times<_Np>([&](auto __i) constexpr {
  	  __mem[__i] = __v[__i];
  	});
        }
--- 2808,2817 ----
  
      // _S_store {{{2
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr void
!       _S_store(_SimdWrapper<_Tp, _Np> __v, bool* __mem) noexcept
        {
! 	__execute_n_times<_Np>([&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	  __mem[__i] = __v[__i];
  	});
        }
*************** template <typename _Abi, typename>
*** 2775,2805 ****
        _S_masked_store(const _SimdWrapper<_Tp, _Np> __v, bool* __mem,
  		      const _SimdWrapper<_Tp, _Np> __k) noexcept
        {
! 	_BitOps::_S_bit_iteration(
! 	  _SuperImpl::_S_to_bits(__k), [&](auto __i) constexpr {
! 	    __mem[__i] = __v[__i];
! 	  });
        }
  
      // _S_from_bitmask{{{2
      template <size_t _Np, typename _Tp>
        _GLIBCXX_SIMD_INTRINSIC static _MaskMember<_Tp>
        _S_from_bitmask(_SanitizedBitMask<_Np> __bits, _TypeTag<_Tp>)
!       {
! 	return _SuperImpl::template _S_to_maskvector<_Tp, _S_size<_Tp>>(__bits);
!       }
  
      // logical and bitwise operators {{{2
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_logical_and(const _SimdWrapper<_Tp, _Np>& __x,
! 		     const _SimdWrapper<_Tp, _Np>& __y)
        { return __and(__x._M_data, __y._M_data); }
  
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_logical_or(const _SimdWrapper<_Tp, _Np>& __x,
! 		    const _SimdWrapper<_Tp, _Np>& __y)
        { return __or(__x._M_data, __y._M_data); }
  
      template <typename _Tp, size_t _Np>
--- 2822,2848 ----
        _S_masked_store(const _SimdWrapper<_Tp, _Np> __v, bool* __mem,
  		      const _SimdWrapper<_Tp, _Np> __k) noexcept
        {
! 	_BitOps::_S_bit_iteration(_SuperImpl::_S_to_bits(__k),
! 				  [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 				    __mem[__i] = __v[__i];
! 				  });
        }
  
      // _S_from_bitmask{{{2
      template <size_t _Np, typename _Tp>
        _GLIBCXX_SIMD_INTRINSIC static _MaskMember<_Tp>
        _S_from_bitmask(_SanitizedBitMask<_Np> __bits, _TypeTag<_Tp>)
!       { return _SuperImpl::template _S_to_maskvector<_Tp, _S_size<_Tp>>(__bits); }
  
      // logical and bitwise operators {{{2
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_logical_and(const _SimdWrapper<_Tp, _Np>& __x, const _SimdWrapper<_Tp, _Np>& __y)
        { return __and(__x._M_data, __y._M_data); }
  
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_logical_or(const _SimdWrapper<_Tp, _Np>& __x, const _SimdWrapper<_Tp, _Np>& __y)
        { return __or(__x._M_data, __y._M_data); }
  
      template <typename _Tp, size_t _Np>
*************** template <typename _Abi, typename>
*** 2815,2840 ****
  
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_bit_and(const _SimdWrapper<_Tp, _Np>& __x,
! 		 const _SimdWrapper<_Tp, _Np>& __y)
        { return __and(__x._M_data, __y._M_data); }
  
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_bit_or(const _SimdWrapper<_Tp, _Np>& __x,
! 		const _SimdWrapper<_Tp, _Np>& __y)
        { return __or(__x._M_data, __y._M_data); }
  
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_bit_xor(const _SimdWrapper<_Tp, _Np>& __x,
! 		 const _SimdWrapper<_Tp, _Np>& __y)
        { return __xor(__x._M_data, __y._M_data); }
  
      // smart_reference access {{{2
      template <typename _Tp, size_t _Np>
!       static constexpr void _S_set(_SimdWrapper<_Tp, _Np>& __k, int __i,
! 				   bool __x) noexcept
        {
  	if constexpr (is_same_v<_Tp, bool>)
  	  __k._M_set(__i, __x);
--- 2858,2880 ----
  
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_bit_and(const _SimdWrapper<_Tp, _Np>& __x, const _SimdWrapper<_Tp, _Np>& __y)
        { return __and(__x._M_data, __y._M_data); }
  
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_bit_or(const _SimdWrapper<_Tp, _Np>& __x, const _SimdWrapper<_Tp, _Np>& __y)
        { return __or(__x._M_data, __y._M_data); }
  
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_bit_xor(const _SimdWrapper<_Tp, _Np>& __x, const _SimdWrapper<_Tp, _Np>& __y)
        { return __xor(__x._M_data, __y._M_data); }
  
      // smart_reference access {{{2
      template <typename _Tp, size_t _Np>
!       static constexpr void
!       _S_set(_SimdWrapper<_Tp, _Np>& __k, int __i, bool __x) noexcept
        {
  	if constexpr (is_same_v<_Tp, bool>)
  	  __k._M_set(__i, __x);
*************** template <typename _Abi, typename>
*** 2845,2851 ****
  	      {
  		__k = __generate_from_n_evaluations<_Np,
  						    __vector_type_t<_Tp, _Np>>(
! 		  [&](auto __j) {
  		    if (__i == static_cast<int>(__j))
  		      return _Tp(-__x);
  		    else
--- 2885,2891 ----
  	      {
  		__k = __generate_from_n_evaluations<_Np,
  						    __vector_type_t<_Tp, _Np>>(
! 		  [&](auto __j) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  		    if (__i == static_cast<int>(__j))
  		      return _Tp(-__x);
  		    else
*************** template <typename _Abi, typename>
*** 2860,2874 ****
      // _S_masked_assign{{{2
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static void
!       _S_masked_assign(_SimdWrapper<_Tp, _Np> __k,
! 		       _SimdWrapper<_Tp, _Np>& __lhs,
  		       __type_identity_t<_SimdWrapper<_Tp, _Np>> __rhs)
        { __lhs = _CommonImpl::_S_blend(__k, __lhs, __rhs); }
  
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static void
!       _S_masked_assign(_SimdWrapper<_Tp, _Np> __k,
! 		       _SimdWrapper<_Tp, _Np>& __lhs, bool __rhs)
        {
  	if (__builtin_constant_p(__rhs))
  	  {
--- 2900,2912 ----
      // _S_masked_assign{{{2
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static void
!       _S_masked_assign(_SimdWrapper<_Tp, _Np> __k, _SimdWrapper<_Tp, _Np>& __lhs,
  		       __type_identity_t<_SimdWrapper<_Tp, _Np>> __rhs)
        { __lhs = _CommonImpl::_S_blend(__k, __lhs, __rhs); }
  
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static void
!       _S_masked_assign(_SimdWrapper<_Tp, _Np> __k, _SimdWrapper<_Tp, _Np>& __lhs, bool __rhs)
        {
  	if (__builtin_constant_p(__rhs))
  	  {
*************** template <typename _Abi, typename>
*** 2890,2896 ****
        {
  	return __call_with_subscripts(
  	  __data(__k), make_index_sequence<_S_size<_Tp>>(),
! 	  [](const auto... __ent) constexpr { return (... && !(__ent == 0)); });
        }
  
      // }}}
--- 2928,2935 ----
        {
  	return __call_with_subscripts(
  	  __data(__k), make_index_sequence<_S_size<_Tp>>(),
! 	  [](const auto... __ent) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA
! 	  { return (... && !(__ent == 0)); });
        }
  
      // }}}
*************** template <typename _Abi, typename>
*** 2901,2907 ****
        {
  	return __call_with_subscripts(
  	  __data(__k), make_index_sequence<_S_size<_Tp>>(),
! 	  [](const auto... __ent) constexpr { return (... || !(__ent == 0)); });
        }
  
      // }}}
--- 2940,2947 ----
        {
  	return __call_with_subscripts(
  	  __data(__k), make_index_sequence<_S_size<_Tp>>(),
! 	  [](const auto... __ent) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA
! 	  { return (... || !(__ent == 0)); });
        }
  
      // }}}
*************** template <typename _Abi, typename>
*** 2912,2918 ****
        {
  	return __call_with_subscripts(
  	  __data(__k), make_index_sequence<_S_size<_Tp>>(),
! 	  [](const auto... __ent) constexpr { return (... && (__ent == 0)); });
        }
  
      // }}}
--- 2952,2959 ----
        {
  	return __call_with_subscripts(
  	  __data(__k), make_index_sequence<_S_size<_Tp>>(),
! 	  [](const auto... __ent) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA
! 	  { return (... && (__ent == 0)); });
        }
  
      // }}}
*************** template <typename _Abi, typename>
*** 2945,2964 ****
      template <typename _Tp>
        _GLIBCXX_SIMD_INTRINSIC static int
        _S_find_first_set(simd_mask<_Tp, _Abi> __k)
!       {
! 	return std::__countr_zero(
! 	  _SuperImpl::_S_to_bits(__data(__k))._M_to_bits());
!       }
  
      // }}}
      // _S_find_last_set {{{
      template <typename _Tp>
        _GLIBCXX_SIMD_INTRINSIC static int
        _S_find_last_set(simd_mask<_Tp, _Abi> __k)
!       {
! 	return std::__bit_width(
! 	  _SuperImpl::_S_to_bits(__data(__k))._M_to_bits()) - 1;
!       }
  
      // }}}
    };
--- 2986,2999 ----
      template <typename _Tp>
        _GLIBCXX_SIMD_INTRINSIC static int
        _S_find_first_set(simd_mask<_Tp, _Abi> __k)
!       { return std::__countr_zero(_SuperImpl::_S_to_bits(__data(__k))._M_to_bits()); }
  
      // }}}
      // _S_find_last_set {{{
      template <typename _Tp>
        _GLIBCXX_SIMD_INTRINSIC static int
        _S_find_last_set(simd_mask<_Tp, _Abi> __k)
!       { return std::__bit_width(_SuperImpl::_S_to_bits(__data(__k))._M_to_bits()) - 1; }
  
      // }}}
    };
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd_converter.h gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd_converter.h
*** gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd_converter.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd_converter.h	Thu Jun 20 08:08:10 2024
*************** template <typename _From, typename _To,
*** 121,127 ****
  	{
  	  return __call_with_subscripts(
  	    __x, make_index_sequence<_Np>(),
! 	    [](auto... __values) constexpr->_Ret {
  	      return __make_simd_tuple<_To, decltype((void) __values,
  						     simd_abi::scalar())...>(
  		static_cast<_To>(__values)...);
--- 121,127 ----
  	{
  	  return __call_with_subscripts(
  	    __x, make_index_sequence<_Np>(),
! 	    [](auto... __values) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA -> _Ret {
  	      return __make_simd_tuple<_To, decltype((void) __values,
  						     simd_abi::scalar())...>(
  		static_cast<_To>(__values)...);
*************** template <typename _From, typename _To,
*** 233,239 ****
  	  static_assert(_Ret::_FirstAbi::template _S_is_partial<_To>);
  	  return _Ret{__generate_from_n_evaluations<
  	    _Np, typename _VectorTraits<typename _Ret::_FirstType>::type>(
! 	    [&](auto __i) { return static_cast<_To>(__x[__i]); })};
  	}
        else
  	{
--- 233,241 ----
  	  static_assert(_Ret::_FirstAbi::template _S_is_partial<_To>);
  	  return _Ret{__generate_from_n_evaluations<
  	    _Np, typename _VectorTraits<typename _Ret::_FirstType>::type>(
! 	    [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	      return static_cast<_To>(__x[__i]);
! 	    })};
  	}
        else
  	{
*************** template <typename _From, typename _To,
*** 241,247 ****
  	  constexpr auto __n
  	    = __div_roundup(_Ret::_S_first_size, _Arg::_S_first_size);
  	  return __call_with_n_evaluations<__n>(
! 	    [&__x](auto... __uncvted) {
  	      // assuming _Arg Abi tags for all __i are _Arg::_FirstAbi
  	      _SimdConverter<_From, typename _Arg::_FirstAbi, _To,
  			     typename _Ret::_FirstAbi>
--- 243,249 ----
  	  constexpr auto __n
  	    = __div_roundup(_Ret::_S_first_size, _Arg::_S_first_size);
  	  return __call_with_n_evaluations<__n>(
! 	    [&__x](auto... __uncvted) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	      // assuming _Arg Abi tags for all __i are _Arg::_FirstAbi
  	      _SimdConverter<_From, typename _Arg::_FirstAbi, _To,
  			     typename _Ret::_FirstAbi>
*************** template <typename _From, typename _To,
*** 255,262 ****
  		    _From, simd_abi::fixed_size<_Np - _Ret::_S_first_size>, _To,
  		    simd_abi::fixed_size<_Np - _Ret::_S_first_size>>()(
  		    __simd_tuple_pop_front<_Ret::_S_first_size>(__x))};
! 	    },
! 	    [&__x](auto __i) { return __get_tuple_at<__i>(__x); });
  	}
      }
    };
--- 257,265 ----
  		    _From, simd_abi::fixed_size<_Np - _Ret::_S_first_size>, _To,
  		    simd_abi::fixed_size<_Np - _Ret::_S_first_size>>()(
  		    __simd_tuple_pop_front<_Ret::_S_first_size>(__x))};
! 	    }, [&__x](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	      return __get_tuple_at<__i>(__x);
! 	    });
  	}
      }
    };
*************** template <typename _From, int _Np, typen
*** 322,334 ****
  	return __vector_convert<__vector_type_t<_To, _Np>>(__x.first);
        else if constexpr (_Arg::_S_is_homogeneous)
  	return __call_with_n_evaluations<_Arg::_S_tuple_size>(
! 	  [](auto... __members) {
  	    if constexpr ((is_convertible_v<decltype(__members), _To> && ...))
  	      return __vector_type_t<_To, _Np>{static_cast<_To>(__members)...};
  	    else
  	      return __vector_convert<__vector_type_t<_To, _Np>>(__members...);
! 	  },
! 	  [&](auto __i) { return __get_tuple_at<__i>(__x); });
        else if constexpr (__fixed_size_storage_t<_To, _Np>::_S_tuple_size == 1)
  	{
  	  _SimdConverter<_From, simd_abi::fixed_size<_Np>, _To,
--- 325,338 ----
  	return __vector_convert<__vector_type_t<_To, _Np>>(__x.first);
        else if constexpr (_Arg::_S_is_homogeneous)
  	return __call_with_n_evaluations<_Arg::_S_tuple_size>(
! 	  [](auto... __members) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	    if constexpr ((is_convertible_v<decltype(__members), _To> && ...))
  	      return __vector_type_t<_To, _Np>{static_cast<_To>(__members)...};
  	    else
  	      return __vector_convert<__vector_type_t<_To, _Np>>(__members...);
! 	  }, [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	    return __get_tuple_at<__i>(__x);
! 	  });
        else if constexpr (__fixed_size_storage_t<_To, _Np>::_S_tuple_size == 1)
  	{
  	  _SimdConverter<_From, simd_abi::fixed_size<_Np>, _To,
*************** template <typename _From, int _Np, typen
*** 340,346 ****
  	{
  	  const _SimdWrapper<_From, _Np> __xv
  	    = __generate_from_n_evaluations<_Np, __vector_type_t<_From, _Np>>(
! 	      [&](auto __i) { return __x[__i]; });
  	  return __vector_convert<__vector_type_t<_To, _Np>>(__xv);
  	}
      }
--- 344,350 ----
  	{
  	  const _SimdWrapper<_From, _Np> __xv
  	    = __generate_from_n_evaluations<_Np, __vector_type_t<_From, _Np>>(
! 		[&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return __x[__i]; });
  	  return __vector_convert<__vector_type_t<_To, _Np>>(__xv);
  	}
      }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd_detail.h gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd_detail.h
*** gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd_detail.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd_detail.h	Thu Jun 20 08:08:10 2024
***************
*** 254,262 ****
--- 254,264 ----
  
  #ifdef __clang__
  #define _GLIBCXX_SIMD_NORMAL_MATH
+ #define _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA
  #else
  #define _GLIBCXX_SIMD_NORMAL_MATH                                              \
    [[__gnu__::__optimize__("finite-math-only,no-signed-zeros")]]
+ #define _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA __attribute__((__always_inline__))
  #endif
  #define _GLIBCXX_SIMD_NEVER_INLINE [[__gnu__::__noinline__]]
  #define _GLIBCXX_SIMD_INTRINSIC                                                \
***************
*** 265,271 ****
  #define _GLIBCXX_SIMD_IS_UNLIKELY(__x) __builtin_expect(__x, 0)
  #define _GLIBCXX_SIMD_IS_LIKELY(__x) __builtin_expect(__x, 1)
  
! #if defined __STRICT_ANSI__ && __STRICT_ANSI__
  #define _GLIBCXX_SIMD_CONSTEXPR
  #define _GLIBCXX_SIMD_USE_CONSTEXPR_API const
  #else
--- 267,273 ----
  #define _GLIBCXX_SIMD_IS_UNLIKELY(__x) __builtin_expect(__x, 0)
  #define _GLIBCXX_SIMD_IS_LIKELY(__x) __builtin_expect(__x, 1)
  
! #if __STRICT_ANSI__ || defined __clang__
  #define _GLIBCXX_SIMD_CONSTEXPR
  #define _GLIBCXX_SIMD_USE_CONSTEXPR_API const
  #else
***************
*** 294,299 ****
--- 296,303 ----
  #ifdef _GLIBCXX_SIMD_NO_ALWAYS_INLINE
  #undef _GLIBCXX_SIMD_ALWAYS_INLINE
  #define _GLIBCXX_SIMD_ALWAYS_INLINE inline
+ #undef _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA
+ #define _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA
  #undef _GLIBCXX_SIMD_INTRINSIC
  #define _GLIBCXX_SIMD_INTRINSIC inline
  #endif
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd_fixed_size.h gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd_fixed_size.h
*** gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd_fixed_size.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd_fixed_size.h	Thu Jun 20 08:08:10 2024
*************** template <typename _Tp, typename _A0, ty
*** 55,64 ****
  
  template <size_t _I, typename _Tp, typename _A0, typename... _As>
    struct __simd_tuple_element<_I, _SimdTuple<_Tp, _A0, _As...>>
!   {
!     using type =
!       typename __simd_tuple_element<_I - 1, _SimdTuple<_Tp, _As...>>::type;
!   };
  
  template <size_t _I, typename _Tp>
    using __simd_tuple_element_t = typename __simd_tuple_element<_I, _Tp>::type;
--- 55,61 ----
  
  template <size_t _I, typename _Tp, typename _A0, typename... _As>
    struct __simd_tuple_element<_I, _SimdTuple<_Tp, _A0, _As...>>
!   { using type = typename __simd_tuple_element<_I - 1, _SimdTuple<_Tp, _As...>>::type; };
  
  template <size_t _I, typename _Tp>
    using __simd_tuple_element_t = typename __simd_tuple_element<_I, _Tp>::type;
*************** template <typename _Tp, typename... _A0s
*** 80,89 ****
    }
  
  template <typename _Tp, typename _A10, typename... _A1s>
!   _GLIBCXX_SIMD_INTRINSIC constexpr _SimdTuple<_Tp, simd_abi::scalar, _A10,
! 					       _A1s...>
!   __simd_tuple_concat(const _Tp& __left,
! 		      const _SimdTuple<_Tp, _A10, _A1s...>& __right)
    { return {__left, __right}; }
  
  // }}}
--- 77,84 ----
    }
  
  template <typename _Tp, typename _A10, typename... _A1s>
!   _GLIBCXX_SIMD_INTRINSIC constexpr _SimdTuple<_Tp, simd_abi::scalar, _A10, _A1s...>
!   __simd_tuple_concat(const _Tp& __left, const _SimdTuple<_Tp, _A10, _A1s...>& __right)
    { return {__left, __right}; }
  
  // }}}
*************** struct __as_simd_tuple {};
*** 112,148 ****
  
  template <typename _Tp, typename _A0, typename... _Abis>
    _GLIBCXX_SIMD_INTRINSIC constexpr simd<_Tp, _A0>
!   __simd_tuple_get_impl(__as_simd, const _SimdTuple<_Tp, _A0, _Abis...>& __t,
! 			_SizeConstant<0>)
    { return {__private_init, __t.first}; }
  
  template <typename _Tp, typename _A0, typename... _Abis>
    _GLIBCXX_SIMD_INTRINSIC constexpr const auto&
!   __simd_tuple_get_impl(__as_simd_tuple,
! 			const _SimdTuple<_Tp, _A0, _Abis...>& __t,
  			_SizeConstant<0>)
    { return __t.first; }
  
  template <typename _Tp, typename _A0, typename... _Abis>
    _GLIBCXX_SIMD_INTRINSIC constexpr auto&
!   __simd_tuple_get_impl(__as_simd_tuple, _SimdTuple<_Tp, _A0, _Abis...>& __t,
! 			_SizeConstant<0>)
    { return __t.first; }
  
  template <typename _R, size_t _Np, typename _Tp, typename... _Abis>
    _GLIBCXX_SIMD_INTRINSIC constexpr auto
!   __simd_tuple_get_impl(_R, const _SimdTuple<_Tp, _Abis...>& __t,
! 			_SizeConstant<_Np>)
    { return __simd_tuple_get_impl(_R(), __t.second, _SizeConstant<_Np - 1>()); }
  
  template <size_t _Np, typename _Tp, typename... _Abis>
    _GLIBCXX_SIMD_INTRINSIC constexpr auto&
!   __simd_tuple_get_impl(__as_simd_tuple, _SimdTuple<_Tp, _Abis...>& __t,
! 			_SizeConstant<_Np>)
!   {
!     return __simd_tuple_get_impl(__as_simd_tuple(), __t.second,
! 				 _SizeConstant<_Np - 1>());
!   }
  
  template <size_t _Np, typename _Tp, typename... _Abis>
    _GLIBCXX_SIMD_INTRINSIC constexpr auto
--- 107,135 ----
  
  template <typename _Tp, typename _A0, typename... _Abis>
    _GLIBCXX_SIMD_INTRINSIC constexpr simd<_Tp, _A0>
!   __simd_tuple_get_impl(__as_simd, const _SimdTuple<_Tp, _A0, _Abis...>& __t, _SizeConstant<0>)
    { return {__private_init, __t.first}; }
  
  template <typename _Tp, typename _A0, typename... _Abis>
    _GLIBCXX_SIMD_INTRINSIC constexpr const auto&
!   __simd_tuple_get_impl(__as_simd_tuple, const _SimdTuple<_Tp, _A0, _Abis...>& __t,
  			_SizeConstant<0>)
    { return __t.first; }
  
  template <typename _Tp, typename _A0, typename... _Abis>
    _GLIBCXX_SIMD_INTRINSIC constexpr auto&
!   __simd_tuple_get_impl(__as_simd_tuple, _SimdTuple<_Tp, _A0, _Abis...>& __t, _SizeConstant<0>)
    { return __t.first; }
  
  template <typename _R, size_t _Np, typename _Tp, typename... _Abis>
    _GLIBCXX_SIMD_INTRINSIC constexpr auto
!   __simd_tuple_get_impl(_R, const _SimdTuple<_Tp, _Abis...>& __t, _SizeConstant<_Np>)
    { return __simd_tuple_get_impl(_R(), __t.second, _SizeConstant<_Np - 1>()); }
  
  template <size_t _Np, typename _Tp, typename... _Abis>
    _GLIBCXX_SIMD_INTRINSIC constexpr auto&
!   __simd_tuple_get_impl(__as_simd_tuple, _SimdTuple<_Tp, _Abis...>& __t, _SizeConstant<_Np>)
!   { return __simd_tuple_get_impl(__as_simd_tuple(), __t.second, _SizeConstant<_Np - 1>()); }
  
  template <size_t _Np, typename _Tp, typename... _Abis>
    _GLIBCXX_SIMD_INTRINSIC constexpr auto
*************** template <size_t _Np, typename _Tp, type
*** 154,169 ****
  template <size_t _Np, typename _Tp, typename... _Abis>
    _GLIBCXX_SIMD_INTRINSIC constexpr auto
    __get_tuple_at(const _SimdTuple<_Tp, _Abis...>& __t)
!   {
!     return __simd_tuple_get_impl(__as_simd_tuple(), __t, _SizeConstant<_Np>());
!   }
  
  template <size_t _Np, typename _Tp, typename... _Abis>
    _GLIBCXX_SIMD_INTRINSIC constexpr auto&
    __get_tuple_at(_SimdTuple<_Tp, _Abis...>& __t)
!   {
!     return __simd_tuple_get_impl(__as_simd_tuple(), __t, _SizeConstant<_Np>());
!   }
  
  // __tuple_element_meta {{{1
  template <typename _Tp, typename _Abi, size_t _Offset>
--- 141,152 ----
  template <size_t _Np, typename _Tp, typename... _Abis>
    _GLIBCXX_SIMD_INTRINSIC constexpr auto
    __get_tuple_at(const _SimdTuple<_Tp, _Abis...>& __t)
!   { return __simd_tuple_get_impl(__as_simd_tuple(), __t, _SizeConstant<_Np>()); }
  
  template <size_t _Np, typename _Tp, typename... _Abis>
    _GLIBCXX_SIMD_INTRINSIC constexpr auto&
    __get_tuple_at(_SimdTuple<_Tp, _Abis...>& __t)
!   { return __simd_tuple_get_impl(__as_simd_tuple(), __t, _SizeConstant<_Np>()); }
  
  // __tuple_element_meta {{{1
  template <typename _Tp, typename _Abi, size_t _Offset>
*************** template <typename _Tp, typename _Abi, s
*** 183,207 ****
      static constexpr _MaskImpl _S_mask_impl = {};
  
      template <size_t _Np, bool _Sanitized>
!       _GLIBCXX_SIMD_INTRINSIC static auto
        _S_submask(_BitMask<_Np, _Sanitized> __bits)
        { return __bits.template _M_extract<_Offset, _S_size()>(); }
  
      template <size_t _Np, bool _Sanitized>
!       _GLIBCXX_SIMD_INTRINSIC static _MaskMember
        _S_make_mask(_BitMask<_Np, _Sanitized> __bits)
        {
  	return _MaskImpl::template _S_convert<_Tp>(
  	  __bits.template _M_extract<_Offset, _S_size()>()._M_sanitized());
        }
  
!     _GLIBCXX_SIMD_INTRINSIC static _ULLong
      _S_mask_to_shifted_ullong(_MaskMember __k)
      { return _MaskImpl::_S_to_bits(__k).to_ullong() << _Offset; }
    };
  
  template <size_t _Offset, typename _Tp, typename _Abi, typename... _As>
!   _GLIBCXX_SIMD_INTRINSIC
    __tuple_element_meta<_Tp, _Abi, _Offset>
    __make_meta(const _SimdTuple<_Tp, _Abi, _As...>&)
    { return {}; }
--- 166,190 ----
      static constexpr _MaskImpl _S_mask_impl = {};
  
      template <size_t _Np, bool _Sanitized>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr auto
        _S_submask(_BitMask<_Np, _Sanitized> __bits)
        { return __bits.template _M_extract<_Offset, _S_size()>(); }
  
      template <size_t _Np, bool _Sanitized>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _MaskMember
        _S_make_mask(_BitMask<_Np, _Sanitized> __bits)
        {
  	return _MaskImpl::template _S_convert<_Tp>(
  	  __bits.template _M_extract<_Offset, _S_size()>()._M_sanitized());
        }
  
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _ULLong
      _S_mask_to_shifted_ullong(_MaskMember __k)
      { return _MaskImpl::_S_to_bits(__k).to_ullong() << _Offset; }
    };
  
  template <size_t _Offset, typename _Tp, typename _Abi, typename... _As>
!   _GLIBCXX_SIMD_INTRINSIC constexpr
    __tuple_element_meta<_Tp, _Abi, _Offset>
    __make_meta(const _SimdTuple<_Tp, _Abi, _As...>&)
    { return {}; }
*************** template <size_t _Offset, typename _Base
*** 213,229 ****
    {
      static inline constexpr size_t _S_offset = _Offset;
  
!     _GLIBCXX_SIMD_INTRINSIC char* _M_as_charptr()
!     {
!       return reinterpret_cast<char*>(this)
! 	     + _S_offset * sizeof(typename _Base::value_type);
!     }
  
!     _GLIBCXX_SIMD_INTRINSIC const char* _M_as_charptr() const
!     {
!       return reinterpret_cast<const char*>(this)
! 	     + _S_offset * sizeof(typename _Base::value_type);
!     }
    };
  
  // make _WithOffset<_WithOffset> ill-formed to use:
--- 196,208 ----
    {
      static inline constexpr size_t _S_offset = _Offset;
  
!     _GLIBCXX_SIMD_INTRINSIC char*
!     _M_as_charptr()
!     { return reinterpret_cast<char*>(this) + _S_offset * sizeof(typename _Base::value_type); }
  
!     _GLIBCXX_SIMD_INTRINSIC const char*
!     _M_as_charptr() const
!     { return reinterpret_cast<const char*>(this) + _S_offset * sizeof(typename _Base::value_type); }
    };
  
  // make _WithOffset<_WithOffset> ill-formed to use:
*************** template <size_t _Offset, typename _Tp>
*** 240,258 ****
    _GLIBCXX_SIMD_INTRINSIC
    decltype(auto)
    __add_offset(const _Tp& __base)
!   {
!     return static_cast<const _WithOffset<_Offset, __remove_cvref_t<_Tp>>&>(
!       __base);
!   }
  
  template <size_t _Offset, size_t _ExistingOffset, typename _Tp>
    _GLIBCXX_SIMD_INTRINSIC
    decltype(auto)
    __add_offset(_WithOffset<_ExistingOffset, _Tp>& __base)
!   {
!     return static_cast<_WithOffset<_Offset + _ExistingOffset, _Tp>&>(
!       static_cast<_Tp&>(__base));
!   }
  
  template <size_t _Offset, size_t _ExistingOffset, typename _Tp>
    _GLIBCXX_SIMD_INTRINSIC
--- 219,231 ----
    _GLIBCXX_SIMD_INTRINSIC
    decltype(auto)
    __add_offset(const _Tp& __base)
!   { return static_cast<const _WithOffset<_Offset, __remove_cvref_t<_Tp>>&>(__base); }
  
  template <size_t _Offset, size_t _ExistingOffset, typename _Tp>
    _GLIBCXX_SIMD_INTRINSIC
    decltype(auto)
    __add_offset(_WithOffset<_ExistingOffset, _Tp>& __base)
!   { return static_cast<_WithOffset<_Offset + _ExistingOffset, _Tp>&>(static_cast<_Tp&>(__base)); }
  
  template <size_t _Offset, size_t _ExistingOffset, typename _Tp>
    _GLIBCXX_SIMD_INTRINSIC
*************** template <typename _FirstType, typename
*** 298,304 ****
      _SecondType second;
  
      _GLIBCXX_SIMD_INTRINSIC
!     constexpr bool _M_is_constprop() const
      {
        if constexpr (is_class_v<_FirstType>)
  	return first._M_is_constprop() && second._M_is_constprop();
--- 271,278 ----
      _SecondType second;
  
      _GLIBCXX_SIMD_INTRINSIC
!     constexpr bool
!     _M_is_constprop() const
      {
        if constexpr (is_class_v<_FirstType>)
  	return first._M_is_constprop() && second._M_is_constprop();
*************** template <typename _FirstType, typename
*** 314,320 ****
      static constexpr _SimdTuple<_Tp> second = {};
  
      _GLIBCXX_SIMD_INTRINSIC
!     constexpr bool _M_is_constprop() const
      {
        if constexpr (is_class_v<_FirstType>)
  	return first._M_is_constprop();
--- 288,295 ----
      static constexpr _SimdTuple<_Tp> second = {};
  
      _GLIBCXX_SIMD_INTRINSIC
!     constexpr bool
!     _M_is_constprop() const
      {
        if constexpr (is_class_v<_FirstType>)
  	return first._M_is_constprop();
*************** template <typename _Tp, typename _Abi0,
*** 353,377 ****
        = default;
  
      template <typename _Up>
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SimdTuple(_Up&& __x)
        : _Base{static_cast<_Up&&>(__x)} {}
  
      template <typename _Up, typename _Up2>
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SimdTuple(_Up&& __x, _Up2&& __y)
        : _Base{static_cast<_Up&&>(__x), static_cast<_Up2&&>(__y)} {}
  
      template <typename _Up>
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SimdTuple(_Up&& __x, _SimdTuple<_Tp>)
        : _Base{static_cast<_Up&&>(__x)} {}
  
!     _GLIBCXX_SIMD_INTRINSIC char* _M_as_charptr()
      { return reinterpret_cast<char*>(this); }
  
!     _GLIBCXX_SIMD_INTRINSIC const char* _M_as_charptr() const
      { return reinterpret_cast<const char*>(this); }
  
      template <size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC constexpr auto& _M_at()
        {
  	if constexpr (_Np == 0)
  	  return first;
--- 328,358 ----
        = default;
  
      template <typename _Up>
!       _GLIBCXX_SIMD_INTRINSIC constexpr
!       _SimdTuple(_Up&& __x)
        : _Base{static_cast<_Up&&>(__x)} {}
  
      template <typename _Up, typename _Up2>
!       _GLIBCXX_SIMD_INTRINSIC constexpr
!       _SimdTuple(_Up&& __x, _Up2&& __y)
        : _Base{static_cast<_Up&&>(__x), static_cast<_Up2&&>(__y)} {}
  
      template <typename _Up>
!       _GLIBCXX_SIMD_INTRINSIC constexpr
!       _SimdTuple(_Up&& __x, _SimdTuple<_Tp>)
        : _Base{static_cast<_Up&&>(__x)} {}
  
!     _GLIBCXX_SIMD_INTRINSIC char*
!     _M_as_charptr()
      { return reinterpret_cast<char*>(this); }
  
!     _GLIBCXX_SIMD_INTRINSIC const char*
!     _M_as_charptr() const
      { return reinterpret_cast<const char*>(this); }
  
      template <size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC constexpr auto&
!       _M_at()
        {
  	if constexpr (_Np == 0)
  	  return first;
*************** template <typename _Tp, typename _Abi0,
*** 380,386 ****
        }
  
      template <size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC constexpr const auto& _M_at() const
        {
  	if constexpr (_Np == 0)
  	  return first;
--- 361,368 ----
        }
  
      template <size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC constexpr const auto&
!       _M_at() const
        {
  	if constexpr (_Np == 0)
  	  return first;
*************** template <typename _Tp, typename _Abi0,
*** 389,395 ****
        }
  
      template <size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC constexpr auto _M_simd_at() const
        {
  	if constexpr (_Np == 0)
  	  return simd<_Tp, _Abi0>(__private_init, first);
--- 371,378 ----
        }
  
      template <size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC constexpr auto
!       _M_simd_at() const
        {
  	if constexpr (_Np == 0)
  	  return simd<_Tp, _Abi0>(__private_init, first);
*************** template <typename _Tp, typename _Abi0,
*** 434,447 ****
  	if constexpr (is_same_v<_SimdTuple, __remove_cvref_t<_Tup>>)
  	  return __tup.first;
  	else if (__builtin_is_constant_evaluated())
! 	  return __fixed_size_storage_t<_TupT, _S_first_size>::_S_generate([&](
! 	    auto __meta) constexpr {
! 	    return __meta._S_generator(
! 	      [&](auto __i) constexpr { return __tup[__i]; },
! 	      static_cast<_TupT*>(nullptr));
  	  });
  	else
! 	  return [&]() {
  	    __fixed_size_storage_t<_TupT, _S_first_size> __r;
  	    __builtin_memcpy(__r._M_as_charptr(), __tup._M_as_charptr(),
  			     sizeof(__r));
--- 417,431 ----
  	if constexpr (is_same_v<_SimdTuple, __remove_cvref_t<_Tup>>)
  	  return __tup.first;
  	else if (__builtin_is_constant_evaluated())
! 	  return __fixed_size_storage_t<_TupT, _S_first_size>::_S_generate(
! 		   [&](auto __meta) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		     return __meta._S_generator(
! 			      [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 				return __tup[__i];
! 			      }, static_cast<_TupT*>(nullptr));
  	  });
  	else
! 	  return [&]() { // not always_inline; allow the compiler to decide
  	    __fixed_size_storage_t<_TupT, _S_first_size> __r;
  	    __builtin_memcpy(__r._M_as_charptr(), __tup._M_as_charptr(),
  			     sizeof(__r));
*************** template <typename _Tp, typename _Abi0,
*** 515,526 ****
  			 negation<is_const<remove_reference_t<_More>>>>) )
  	  {
  	    // need to write back at least one of __more after calling __fun
! 	    auto&& __first = [&](auto... __args) constexpr
! 	    {
  	      auto __r = __fun(__tuple_element_meta<_Tp, _Abi0, 0>(), first,
  			       __args...);
  	      [[maybe_unused]] auto&& __ignore_me = {(
! 		[](auto&& __dst, const auto& __src) {
  		  if constexpr (is_assignable_v<decltype(__dst),
  						decltype(__dst)>)
  		    {
--- 499,509 ----
  			 negation<is_const<remove_reference_t<_More>>>>) )
  	  {
  	    // need to write back at least one of __more after calling __fun
! 	    auto&& __first = [&](auto... __args) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	      auto __r = __fun(__tuple_element_meta<_Tp, _Abi0, 0>(), first,
  			       __args...);
  	      [[maybe_unused]] auto&& __ignore_me = {(
! 		[](auto&& __dst, const auto& __src) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  		  if constexpr (is_assignable_v<decltype(__dst),
  						decltype(__dst)>)
  		    {
*************** template <typename _Tp, typename _Abi0,
*** 530,537 ****
  		}(static_cast<_More&&>(__more), __args),
  		0)...};
  	      return __r;
! 	    }
! 	    (_M_extract_argument(__more)...);
  	    if constexpr (_S_tuple_size == 1)
  	      return {__first};
  	    else
--- 513,519 ----
  		}(static_cast<_More&&>(__more), __args),
  		0)...};
  	      return __r;
! 	    }(_M_extract_argument(__more)...);
  	    if constexpr (_S_tuple_size == 1)
  	      return {__first};
  	    else
*************** template <typename _Tp, typename _Abi0,
*** 553,560 ****
        }
  
      template <typename _R = _Tp, typename _Fp, typename... _More>
!       _GLIBCXX_SIMD_INTRINSIC auto _M_apply_r(_Fp&& __fun,
! 					      const _More&... __more) const
        {
  	auto&& __first = __fun(__tuple_element_meta<_Tp, _Abi0, 0>(), first,
  			       __more.first...);
--- 535,542 ----
        }
  
      template <typename _R = _Tp, typename _Fp, typename... _More>
!       _GLIBCXX_SIMD_INTRINSIC constexpr auto
!       _M_apply_r(_Fp&& __fun, const _More&... __more) const
        {
  	auto&& __first = __fun(__tuple_element_meta<_Tp, _Abi0, 0>(), first,
  			       __more.first...);
*************** template <typename _Tp, typename _Abi0,
*** 591,641 ****
  	  return second[integral_constant<_Up, _I - simd_size_v<_Tp, _Abi0>>()];
        }
  
!     _GLIBCXX_SIMD_INTRINSIC
!     _Tp operator[](size_t __i) const noexcept
      {
        if constexpr (_S_tuple_size == 1)
  	return _M_subscript_read(__i);
-       else
- 	{
  #ifdef _GLIBCXX_SIMD_USE_ALIASING_LOADS
! 	  return reinterpret_cast<const __may_alias<_Tp>*>(this)[__i];
! #else
! 	  if constexpr (__is_scalar_abi<_Abi0>())
! 	    {
! 	      const _Tp* ptr = &first;
! 	      return ptr[__i];
! 	    }
! 	  else
! 	    return __i < simd_size_v<_Tp, _Abi0>
! 		     ? _M_subscript_read(__i)
! 		     : second[__i - simd_size_v<_Tp, _Abi0>];
  #endif
  	}
      }
  
!     _GLIBCXX_SIMD_INTRINSIC
!     void _M_set(size_t __i, _Tp __val) noexcept
      {
        if constexpr (_S_tuple_size == 1)
  	return _M_subscript_write(__i, __val);
-       else
- 	{
  #ifdef _GLIBCXX_SIMD_USE_ALIASING_LOADS
! 	  reinterpret_cast<__may_alias<_Tp>*>(this)[__i] = __val;
! #else
! 	  if (__i < simd_size_v<_Tp, _Abi0>)
! 	    _M_subscript_write(__i, __val);
! 	  else
! 	    second._M_set(__i - simd_size_v<_Tp, _Abi0>, __val);
  #endif
! 	}
      }
  
    private:
      // _M_subscript_read/_write {{{
!     _GLIBCXX_SIMD_INTRINSIC
!     _Tp _M_subscript_read([[maybe_unused]] size_t __i) const noexcept
      {
        if constexpr (__is_vectorizable_v<_FirstType>)
  	return first;
--- 573,616 ----
  	  return second[integral_constant<_Up, _I - simd_size_v<_Tp, _Abi0>>()];
        }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr _Tp
!     operator[](size_t __i) const noexcept
      {
        if constexpr (_S_tuple_size == 1)
  	return _M_subscript_read(__i);
  #ifdef _GLIBCXX_SIMD_USE_ALIASING_LOADS
!       else if (not __builtin_is_constant_evaluated())
! 	return reinterpret_cast<const __may_alias<_Tp>*>(this)[__i];
  #endif
+       else if constexpr (__is_scalar_abi<_Abi0>())
+ 	{
+ 	  const _Tp* ptr = &first;
+ 	  return ptr[__i];
  	}
+       else
+ 	return __i < simd_size_v<_Tp, _Abi0> ? _M_subscript_read(__i)
+ 					     : second[__i - simd_size_v<_Tp, _Abi0>];
      }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr void
!     _M_set(size_t __i, _Tp __val) noexcept
      {
        if constexpr (_S_tuple_size == 1)
  	return _M_subscript_write(__i, __val);
  #ifdef _GLIBCXX_SIMD_USE_ALIASING_LOADS
!       else if (not __builtin_is_constant_evaluated())
! 	reinterpret_cast<__may_alias<_Tp>*>(this)[__i] = __val;
  #endif
!       else if (__i < simd_size_v<_Tp, _Abi0>)
! 	_M_subscript_write(__i, __val);
!       else
! 	second._M_set(__i - simd_size_v<_Tp, _Abi0>, __val);
      }
  
    private:
      // _M_subscript_read/_write {{{
!     _GLIBCXX_SIMD_INTRINSIC constexpr _Tp
!     _M_subscript_read([[maybe_unused]] size_t __i) const noexcept
      {
        if constexpr (__is_vectorizable_v<_FirstType>)
  	return first;
*************** template <typename _Tp, typename _Abi0,
*** 643,650 ****
  	return first[__i];
      }
  
!     _GLIBCXX_SIMD_INTRINSIC
!     void _M_subscript_write([[maybe_unused]] size_t __i, _Tp __y) noexcept
      {
        if constexpr (__is_vectorizable_v<_FirstType>)
  	first = __y;
--- 618,625 ----
  	return first[__i];
      }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr void
!     _M_subscript_write([[maybe_unused]] size_t __i, _Tp __y) noexcept
      {
        if constexpr (__is_vectorizable_v<_FirstType>)
  	first = __y;
*************** template <typename _Tp, typename _Abi0,
*** 657,678 ****
  
  // __make_simd_tuple {{{1
  template <typename _Tp, typename _A0>
!   _GLIBCXX_SIMD_INTRINSIC _SimdTuple<_Tp, _A0>
    __make_simd_tuple(simd<_Tp, _A0> __x0)
    { return {__data(__x0)}; }
  
  template <typename _Tp, typename _A0, typename... _As>
!   _GLIBCXX_SIMD_INTRINSIC _SimdTuple<_Tp, _A0, _As...>
    __make_simd_tuple(const simd<_Tp, _A0>& __x0, const simd<_Tp, _As>&... __xs)
    { return {__data(__x0), __make_simd_tuple(__xs...)}; }
  
  template <typename _Tp, typename _A0>
!   _GLIBCXX_SIMD_INTRINSIC _SimdTuple<_Tp, _A0>
    __make_simd_tuple(const typename _SimdTraits<_Tp, _A0>::_SimdMember& __arg0)
    { return {__arg0}; }
  
  template <typename _Tp, typename _A0, typename _A1, typename... _Abis>
!   _GLIBCXX_SIMD_INTRINSIC _SimdTuple<_Tp, _A0, _A1, _Abis...>
    __make_simd_tuple(
      const typename _SimdTraits<_Tp, _A0>::_SimdMember& __arg0,
      const typename _SimdTraits<_Tp, _A1>::_SimdMember& __arg1,
--- 632,653 ----
  
  // __make_simd_tuple {{{1
  template <typename _Tp, typename _A0>
!   _GLIBCXX_SIMD_INTRINSIC constexpr _SimdTuple<_Tp, _A0>
    __make_simd_tuple(simd<_Tp, _A0> __x0)
    { return {__data(__x0)}; }
  
  template <typename _Tp, typename _A0, typename... _As>
!   _GLIBCXX_SIMD_INTRINSIC constexpr _SimdTuple<_Tp, _A0, _As...>
    __make_simd_tuple(const simd<_Tp, _A0>& __x0, const simd<_Tp, _As>&... __xs)
    { return {__data(__x0), __make_simd_tuple(__xs...)}; }
  
  template <typename _Tp, typename _A0>
!   _GLIBCXX_SIMD_INTRINSIC constexpr _SimdTuple<_Tp, _A0>
    __make_simd_tuple(const typename _SimdTraits<_Tp, _A0>::_SimdMember& __arg0)
    { return {__arg0}; }
  
  template <typename _Tp, typename _A0, typename _A1, typename... _Abis>
!   _GLIBCXX_SIMD_INTRINSIC constexpr _SimdTuple<_Tp, _A0, _A1, _Abis...>
    __make_simd_tuple(
      const typename _SimdTraits<_Tp, _A0>::_SimdMember& __arg0,
      const typename _SimdTraits<_Tp, _A1>::_SimdMember& __arg1,
*************** template <typename _Tp, size_t _Np,
*** 688,695 ****
  	  size_t _Offset = 0, // skip this many elements in __from0
  	  typename _R = __fixed_size_storage_t<_Tp, _Np>, typename _V0,
  	  typename _V0VT = _VectorTraits<_V0>, typename... _VX>
!   _GLIBCXX_SIMD_INTRINSIC _R constexpr __to_simd_tuple(const _V0 __from0,
! 						       const _VX... __fromX)
    {
      static_assert(is_same_v<typename _V0VT::value_type, _Tp>);
      static_assert(_Offset < _V0VT::_S_full_size);
--- 663,669 ----
  	  size_t _Offset = 0, // skip this many elements in __from0
  	  typename _R = __fixed_size_storage_t<_Tp, _Np>, typename _V0,
  	  typename _V0VT = _VectorTraits<_V0>, typename... _VX>
!   _GLIBCXX_SIMD_INTRINSIC _R constexpr __to_simd_tuple(const _V0 __from0, const _VX... __fromX)
    {
      static_assert(is_same_v<typename _V0VT::value_type, _Tp>);
      static_assert(_Offset < _V0VT::_S_full_size);
*************** template <typename _Tp, size_t _Np, type
*** 776,793 ****
  	  sizeof...(_VX) == 0,
  	  "An array of scalars must be the last argument to __to_simd_tuple");
  	return __call_with_subscripts(
! 	  __from,
! 	  make_index_sequence<_NV>(), [&](const auto... __args) constexpr {
! 	    return __simd_tuple_concat(
! 	      _SimdTuple<_Tp, simd_abi::scalar>{__args}..., _SimdTuple<_Tp>());
! 	  });
        }
      else
        return __call_with_subscripts(
! 	__from,
! 	make_index_sequence<_NV>(), [&](const auto... __args) constexpr {
! 	  return __to_simd_tuple<_Tp, _Np>(__args..., __fromX...);
! 	});
    }
  
  template <size_t, typename _Tp>
--- 750,767 ----
  	  sizeof...(_VX) == 0,
  	  "An array of scalars must be the last argument to __to_simd_tuple");
  	return __call_with_subscripts(
! 		 __from, make_index_sequence<_NV>(),
! 		 [&](const auto... __args) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   return __simd_tuple_concat(
! 			    _SimdTuple<_Tp, simd_abi::scalar>{__args}..., _SimdTuple<_Tp>());
! 		 });
        }
      else
        return __call_with_subscripts(
! 	       __from, make_index_sequence<_NV>(),
! 	       [&](const auto... __args) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		 return __to_simd_tuple<_Tp, _Np>(__args..., __fromX...);
! 	       });
    }
  
  template <size_t, typename _Tp>
*************** template <typename _Tp, typename _A0, si
*** 816,834 ****
  
  // __optimize_simd_tuple {{{1
  template <typename _Tp>
!   _GLIBCXX_SIMD_INTRINSIC _SimdTuple<_Tp>
    __optimize_simd_tuple(const _SimdTuple<_Tp>)
    { return {}; }
  
  template <typename _Tp, typename _Ap>
!   _GLIBCXX_SIMD_INTRINSIC const _SimdTuple<_Tp, _Ap>&
    __optimize_simd_tuple(const _SimdTuple<_Tp, _Ap>& __x)
    { return __x; }
  
  template <typename _Tp, typename _A0, typename _A1, typename... _Abis,
  	  typename _R = __fixed_size_storage_t<
  	    _Tp, _SimdTuple<_Tp, _A0, _A1, _Abis...>::_S_size()>>
!   _GLIBCXX_SIMD_INTRINSIC _R
    __optimize_simd_tuple(const _SimdTuple<_Tp, _A0, _A1, _Abis...>& __x)
    {
      using _Tup = _SimdTuple<_Tp, _A0, _A1, _Abis...>;
--- 790,808 ----
  
  // __optimize_simd_tuple {{{1
  template <typename _Tp>
!   _GLIBCXX_SIMD_INTRINSIC constexpr _SimdTuple<_Tp>
    __optimize_simd_tuple(const _SimdTuple<_Tp>)
    { return {}; }
  
  template <typename _Tp, typename _Ap>
!   _GLIBCXX_SIMD_INTRINSIC constexpr const _SimdTuple<_Tp, _Ap>&
    __optimize_simd_tuple(const _SimdTuple<_Tp, _Ap>& __x)
    { return __x; }
  
  template <typename _Tp, typename _A0, typename _A1, typename... _Abis,
  	  typename _R = __fixed_size_storage_t<
  	    _Tp, _SimdTuple<_Tp, _A0, _A1, _Abis...>::_S_size()>>
!   _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __optimize_simd_tuple(const _SimdTuple<_Tp, _A0, _A1, _Abis...>& __x)
    {
      using _Tup = _SimdTuple<_Tp, _A0, _A1, _Abis...>;
*************** template <typename _Tp, typename _A0, ty
*** 841,847 ****
  		       || _A0::template _S_is_partial<_Tp>)
        return {__generate_from_n_evaluations<_R::_S_first_size,
  					    typename _R::_FirstType>(
! 		[&](auto __i) { return __x[__i]; }),
  	      __optimize_simd_tuple(
  		__simd_tuple_pop_front<_R::_S_first_size>(__x))};
      else if constexpr (is_same_v<_A0, _A1>
--- 815,821 ----
  		       || _A0::template _S_is_partial<_Tp>)
        return {__generate_from_n_evaluations<_R::_S_first_size,
  					    typename _R::_FirstType>(
! 		[&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return __x[__i]; }),
  	      __optimize_simd_tuple(
  		__simd_tuple_pop_front<_R::_S_first_size>(__x))};
      else if constexpr (is_same_v<_A0, _A1>
*************** template <size_t _Offset = 0, typename _
*** 901,911 ****
  // __for_each(_SimdTuple &, const _SimdTuple &, Fun) {{{1
  template <size_t _Offset = 0, typename _Tp, typename _A0, typename _Fp>
    _GLIBCXX_SIMD_INTRINSIC constexpr void
!   __for_each(_SimdTuple<_Tp, _A0>& __a, const _SimdTuple<_Tp, _A0>& __b,
! 	     _Fp&& __fun)
!   {
!     static_cast<_Fp&&>(__fun)(__make_meta<_Offset>(__a), __a.first, __b.first);
!   }
  
  template <size_t _Offset = 0, typename _Tp, typename _A0, typename _A1,
  	  typename... _As, typename _Fp>
--- 875,882 ----
  // __for_each(_SimdTuple &, const _SimdTuple &, Fun) {{{1
  template <size_t _Offset = 0, typename _Tp, typename _A0, typename _Fp>
    _GLIBCXX_SIMD_INTRINSIC constexpr void
!   __for_each(_SimdTuple<_Tp, _A0>& __a, const _SimdTuple<_Tp, _A0>& __b, _Fp&& __fun)
!   { static_cast<_Fp&&>(__fun)(__make_meta<_Offset>(__a), __a.first, __b.first); }
  
  template <size_t _Offset = 0, typename _Tp, typename _A0, typename _A1,
  	  typename... _As, typename _Fp>
*************** template <size_t _Offset = 0, typename _
*** 921,931 ****
  // __for_each(const _SimdTuple &, const _SimdTuple &, Fun) {{{1
  template <size_t _Offset = 0, typename _Tp, typename _A0, typename _Fp>
    _GLIBCXX_SIMD_INTRINSIC constexpr void
!   __for_each(const _SimdTuple<_Tp, _A0>& __a, const _SimdTuple<_Tp, _A0>& __b,
! 	     _Fp&& __fun)
!   {
!     static_cast<_Fp&&>(__fun)(__make_meta<_Offset>(__a), __a.first, __b.first);
!   }
  
  template <size_t _Offset = 0, typename _Tp, typename _A0, typename _A1,
  	  typename... _As, typename _Fp>
--- 892,899 ----
  // __for_each(const _SimdTuple &, const _SimdTuple &, Fun) {{{1
  template <size_t _Offset = 0, typename _Tp, typename _A0, typename _Fp>
    _GLIBCXX_SIMD_INTRINSIC constexpr void
!   __for_each(const _SimdTuple<_Tp, _A0>& __a, const _SimdTuple<_Tp, _A0>& __b, _Fp&& __fun)
!   { static_cast<_Fp&&>(__fun)(__make_meta<_Offset>(__a), __a.first, __b.first); }
  
  template <size_t _Offset = 0, typename _Tp, typename _A0, typename _A1,
  	  typename... _As, typename _Fp>
*************** template <size_t _Offset = 0, typename _
*** 940,948 ****
  
  // }}}1
  // __extract_part(_SimdTuple) {{{
! template <int _Index, int _Total, int _Combine, typename _Tp, typename _A0,
! 	  typename... _As>
!   _GLIBCXX_SIMD_INTRINSIC auto // __vector_type_t or _SimdTuple
    __extract_part(const _SimdTuple<_Tp, _A0, _As...>& __x)
    {
      // worst cases:
--- 908,915 ----
  
  // }}}1
  // __extract_part(_SimdTuple) {{{
! template <int _Index, int _Total, int _Combine, typename _Tp, typename _A0, typename... _As>
!   _GLIBCXX_SIMD_INTRINSIC constexpr auto // __vector_type_t or _SimdTuple
    __extract_part(const _SimdTuple<_Tp, _A0, _As...>& __x)
    {
      // worst cases:
*************** template <int _Index, int _Total, int _C
*** 994,1003 ****
  	return __as_vector(simd<_Tp, _RetAbi>(element_ptr, element_aligned));
  #else
  	[[maybe_unused]] constexpr size_t __offset = __values_to_skip;
! 	return __as_vector(simd<_Tp, _RetAbi>([&](auto __i) constexpr {
! 	  constexpr _SizeConstant<__i + __offset> __k;
! 	  return __x[__k];
! 	}));
  #endif
        }
  
--- 961,971 ----
  	return __as_vector(simd<_Tp, _RetAbi>(element_ptr, element_aligned));
  #else
  	[[maybe_unused]] constexpr size_t __offset = __values_to_skip;
! 	return __as_vector(simd<_Tp, _RetAbi>(
! 			     [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			       constexpr _SizeConstant<__i + __offset> __k;
! 			       return __x[__k];
! 			     }));
  #endif
        }
  
*************** template <typename _Tp, bool = is_arithm
*** 1042,1052 ****
      _Tp _M_data;
      using _TT = __remove_cvref_t<_Tp>;
  
!     _GLIBCXX_SIMD_INTRINSIC
      operator _TT()
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC
      operator _TT&()
      {
        static_assert(is_lvalue_reference<_Tp>::value, "");
--- 1010,1020 ----
      _Tp _M_data;
      using _TT = __remove_cvref_t<_Tp>;
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
      operator _TT()
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
      operator _TT&()
      {
        static_assert(is_lvalue_reference<_Tp>::value, "");
*************** template <typename _Tp, bool = is_arithm
*** 1054,1060 ****
        return _M_data;
      }
  
!     _GLIBCXX_SIMD_INTRINSIC
      operator _TT*()
      {
        static_assert(is_lvalue_reference<_Tp>::value, "");
--- 1022,1028 ----
        return _M_data;
      }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
      operator _TT*()
      {
        static_assert(is_lvalue_reference<_Tp>::value, "");
*************** template <typename _Tp, bool = is_arithm
*** 1062,1090 ****
        return &_M_data;
      }
  
!     _GLIBCXX_SIMD_INTRINSIC
!     constexpr __autocvt_to_simd(_Tp dd) : _M_data(dd) {}
  
      template <typename _Abi>
!       _GLIBCXX_SIMD_INTRINSIC
        operator simd<typename _TT::value_type, _Abi>()
        { return {__private_init, _M_data}; }
  
      template <typename _Abi>
!       _GLIBCXX_SIMD_INTRINSIC
        operator simd<typename _TT::value_type, _Abi>&()
!       {
! 	return *reinterpret_cast<simd<typename _TT::value_type, _Abi>*>(
! 	  &_M_data);
!       }
  
      template <typename _Abi>
!       _GLIBCXX_SIMD_INTRINSIC
        operator simd<typename _TT::value_type, _Abi>*()
!       {
! 	return reinterpret_cast<simd<typename _TT::value_type, _Abi>*>(
! 	  &_M_data);
!       }
    };
  
  template <typename _Tp>
--- 1030,1052 ----
        return &_M_data;
      }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     __autocvt_to_simd(_Tp dd) : _M_data(dd) {}
  
      template <typename _Abi>
!       _GLIBCXX_SIMD_INTRINSIC constexpr
        operator simd<typename _TT::value_type, _Abi>()
        { return {__private_init, _M_data}; }
  
      template <typename _Abi>
!       _GLIBCXX_SIMD_INTRINSIC constexpr
        operator simd<typename _TT::value_type, _Abi>&()
!       { return *reinterpret_cast<simd<typename _TT::value_type, _Abi>*>(&_M_data); }
  
      template <typename _Abi>
!       _GLIBCXX_SIMD_INTRINSIC constexpr
        operator simd<typename _TT::value_type, _Abi>*()
!       { return reinterpret_cast<simd<typename _TT::value_type, _Abi>*>(&_M_data); }
    };
  
  template <typename _Tp>
*************** template <typename _Tp>
*** 1104,1114 ****
      ~__autocvt_to_simd()
      { _M_data = __data(_M_fd).first; }
  
!     _GLIBCXX_SIMD_INTRINSIC
      operator fixed_size_simd<_TT, 1>()
      { return _M_fd; }
  
!     _GLIBCXX_SIMD_INTRINSIC
      operator fixed_size_simd<_TT, 1> &()
      {
        static_assert(is_lvalue_reference<_Tp>::value, "");
--- 1066,1076 ----
      ~__autocvt_to_simd()
      { _M_data = __data(_M_fd).first; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
      operator fixed_size_simd<_TT, 1>()
      { return _M_fd; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
      operator fixed_size_simd<_TT, 1> &()
      {
        static_assert(is_lvalue_reference<_Tp>::value, "");
*************** template <typename _Tp>
*** 1116,1122 ****
        return _M_fd;
      }
  
!     _GLIBCXX_SIMD_INTRINSIC
      operator fixed_size_simd<_TT, 1> *()
      {
        static_assert(is_lvalue_reference<_Tp>::value, "");
--- 1078,1084 ----
        return _M_fd;
      }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
      operator fixed_size_simd<_TT, 1> *()
      {
        static_assert(is_lvalue_reference<_Tp>::value, "");
*************** template <int _Np>
*** 1193,1208 ****
  	{
  	  // The following ensures, function arguments are passed via the stack.
  	  // This is important for ABI compatibility across TU boundaries
! 	  _GLIBCXX_SIMD_ALWAYS_INLINE
  	  _SimdBase(const _SimdBase&) {}
  	  _SimdBase() = default;
  
! 	  _GLIBCXX_SIMD_ALWAYS_INLINE
! 	  explicit operator const _SimdMember &() const
  	  { return static_cast<const simd<_Tp, _Fixed>*>(this)->_M_data; }
  
! 	  _GLIBCXX_SIMD_ALWAYS_INLINE
! 	  explicit operator array<_Tp, _Np>() const
  	  {
  	    array<_Tp, _Np> __r;
  	    // _SimdMember can be larger because of higher alignment
--- 1155,1171 ----
  	{
  	  // The following ensures, function arguments are passed via the stack.
  	  // This is important for ABI compatibility across TU boundaries
! 	  _GLIBCXX_SIMD_ALWAYS_INLINE constexpr
  	  _SimdBase(const _SimdBase&) {}
+ 
  	  _SimdBase() = default;
  
! 	  _GLIBCXX_SIMD_ALWAYS_INLINE constexpr explicit
! 	  operator const _SimdMember &() const
  	  { return static_cast<const simd<_Tp, _Fixed>*>(this)->_M_data; }
  
! 	  _GLIBCXX_SIMD_ALWAYS_INLINE constexpr explicit
! 	  operator array<_Tp, _Np>() const
  	  {
  	    array<_Tp, _Np> __r;
  	    // _SimdMember can be larger because of higher alignment
*************** template <int _Np>
*** 1222,1233 ****
  	// _SimdCastType {{{
  	struct _SimdCastType
  	{
! 	  _GLIBCXX_SIMD_ALWAYS_INLINE
  	  _SimdCastType(const array<_Tp, _Np>&);
! 	  _GLIBCXX_SIMD_ALWAYS_INLINE
  	  _SimdCastType(const _SimdMember& dd) : _M_data(dd) {}
! 	  _GLIBCXX_SIMD_ALWAYS_INLINE
! 	  explicit operator const _SimdMember &() const { return _M_data; }
  
  	private:
  	  const _SimdMember& _M_data;
--- 1185,1198 ----
  	// _SimdCastType {{{
  	struct _SimdCastType
  	{
! 	  _GLIBCXX_SIMD_ALWAYS_INLINE constexpr
  	  _SimdCastType(const array<_Tp, _Np>&);
! 
! 	  _GLIBCXX_SIMD_ALWAYS_INLINE constexpr
  	  _SimdCastType(const _SimdMember& dd) : _M_data(dd) {}
! 
! 	  _GLIBCXX_SIMD_ALWAYS_INLINE constexpr explicit
! 	  operator const _SimdMember &() const { return _M_data; }
  
  	private:
  	  const _SimdMember& _M_data;
*************** template <int _Np, typename>
*** 1284,1335 ****
  
      // broadcast {{{2
      template <typename _Tp>
!       static constexpr inline _SimdMember<_Tp> _S_broadcast(_Tp __x) noexcept
        {
! 	return _SimdMember<_Tp>::_S_generate([&](auto __meta) constexpr {
! 	  return __meta._S_broadcast(__x);
! 	});
        }
  
      // _S_generator {{{2
      template <typename _Fp, typename _Tp>
!       static constexpr inline _SimdMember<_Tp> _S_generator(_Fp&& __gen,
! 							    _TypeTag<_Tp>)
        {
! 	return _SimdMember<_Tp>::_S_generate([&__gen](auto __meta) constexpr {
! 	  return __meta._S_generator(
! 	    [&](auto __i) constexpr {
! 	      return __i < _Np ? __gen(_SizeConstant<__meta._S_offset + __i>())
! 			       : 0;
! 	    },
! 	    _TypeTag<_Tp>());
! 	});
        }
  
      // _S_load {{{2
      template <typename _Tp, typename _Up>
!       static inline _SimdMember<_Tp> _S_load(const _Up* __mem,
! 					     _TypeTag<_Tp>) noexcept
        {
! 	return _SimdMember<_Tp>::_S_generate([&](auto __meta) {
! 	  return __meta._S_load(&__mem[__meta._S_offset], _TypeTag<_Tp>());
! 	});
        }
  
      // _S_masked_load {{{2
      template <typename _Tp, typename... _As, typename _Up>
!       static inline _SimdTuple<_Tp, _As...>
        _S_masked_load(const _SimdTuple<_Tp, _As...>& __old,
  		     const _MaskMember __bits, const _Up* __mem) noexcept
        {
  	auto __merge = __old;
! 	__for_each(__merge, [&](auto __meta, auto& __native) {
  	  if (__meta._S_submask(__bits).any())
  #pragma GCC diagnostic push
! 	  // __mem + __mem._S_offset could be UB ([expr.add]/4.3, but it punts
! 	  // the responsibility for avoiding UB to the caller of the masked load
! 	  // via the mask. Consequently, the compiler may assume this branch is
! 	  // unreachable, if the pointer arithmetic is UB.
  #pragma GCC diagnostic ignored "-Warray-bounds"
  	    __native
  	      = __meta._S_masked_load(__native, __meta._S_make_mask(__bits),
--- 1249,1304 ----
  
      // broadcast {{{2
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdMember<_Tp>
!       _S_broadcast(_Tp __x) noexcept
        {
! 	return _SimdMember<_Tp>::_S_generate(
! 		 [&](auto __meta) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   return __meta._S_broadcast(__x);
! 		 });
        }
  
      // _S_generator {{{2
      template <typename _Fp, typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdMember<_Tp>
!       _S_generator(_Fp&& __gen, _TypeTag<_Tp>)
        {
! 	return _SimdMember<_Tp>::_S_generate(
! 		 [&__gen](auto __meta) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   return __meta._S_generator(
! 			    [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			      return __i < _Np ? __gen(_SizeConstant<__meta._S_offset + __i>())
! 					       : 0;
! 			    },
! 			    _TypeTag<_Tp>());
! 		 });
        }
  
      // _S_load {{{2
      template <typename _Tp, typename _Up>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdMember<_Tp>
!       _S_load(const _Up* __mem, _TypeTag<_Tp>) noexcept
        {
! 	return _SimdMember<_Tp>::_S_generate(
! 		 [&](auto __meta) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   return __meta._S_load(&__mem[__meta._S_offset], _TypeTag<_Tp>());
! 		 });
        }
  
      // _S_masked_load {{{2
      template <typename _Tp, typename... _As, typename _Up>
!       _GLIBCXX_SIMD_INTRINSIC static _SimdTuple<_Tp, _As...>
        _S_masked_load(const _SimdTuple<_Tp, _As...>& __old,
  		     const _MaskMember __bits, const _Up* __mem) noexcept
        {
  	auto __merge = __old;
! 	__for_each(__merge, [&](auto __meta, auto& __native) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	  if (__meta._S_submask(__bits).any())
  #pragma GCC diagnostic push
! 	    // Dereferencing __mem + __meta._S_offset could be UB ([expr.add]/4.3).
! 	    // It is the responsibility of the caller of the masked load (via the mask's value) to
! 	    // avoid UB. Consequently, the compiler may assume this branch is unreachable, if the
! 	    // pointer arithmetic is UB.
  #pragma GCC diagnostic ignored "-Warray-bounds"
  	    __native
  	      = __meta._S_masked_load(__native, __meta._S_make_mask(__bits),
*************** template <int _Np, typename>
*** 1341,1361 ****
  
      // _S_store {{{2
      template <typename _Tp, typename _Up>
!       static inline void _S_store(const _SimdMember<_Tp>& __v, _Up* __mem,
! 				  _TypeTag<_Tp>) noexcept
        {
! 	__for_each(__v, [&](auto __meta, auto __native) {
  	  __meta._S_store(__native, &__mem[__meta._S_offset], _TypeTag<_Tp>());
  	});
        }
  
      // _S_masked_store {{{2
      template <typename _Tp, typename... _As, typename _Up>
!       static inline void _S_masked_store(const _SimdTuple<_Tp, _As...>& __v,
! 					 _Up* __mem,
! 					 const _MaskMember __bits) noexcept
        {
! 	__for_each(__v, [&](auto __meta, auto __native) {
  	  if (__meta._S_submask(__bits).any())
  #pragma GCC diagnostic push
  	  // __mem + __mem._S_offset could be UB ([expr.add]/4.3, but it punts
--- 1310,1330 ----
  
      // _S_store {{{2
      template <typename _Tp, typename _Up>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr void
!       _S_store(const _SimdMember<_Tp>& __v, _Up* __mem, _TypeTag<_Tp>) noexcept
        {
! 	__for_each(__v, [&](auto __meta, auto __native) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	  __meta._S_store(__native, &__mem[__meta._S_offset], _TypeTag<_Tp>());
  	});
        }
  
      // _S_masked_store {{{2
      template <typename _Tp, typename... _As, typename _Up>
!       _GLIBCXX_SIMD_INTRINSIC static void
!       _S_masked_store(const _SimdTuple<_Tp, _As...>& __v, _Up* __mem,
! 		      const _MaskMember __bits) noexcept
        {
! 	__for_each(__v, [&](auto __meta, auto __native) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	  if (__meta._S_submask(__bits).any())
  #pragma GCC diagnostic push
  	  // __mem + __mem._S_offset could be UB ([expr.add]/4.3, but it punts
*************** template <int _Np, typename>
*** 1371,1382 ****
  
      // negation {{{2
      template <typename _Tp, typename... _As>
!       static inline _MaskMember
        _S_negate(const _SimdTuple<_Tp, _As...>& __x) noexcept
        {
  	_MaskMember __bits = 0;
  	__for_each(
! 	  __x, [&__bits](auto __meta, auto __native) constexpr {
  	    __bits
  	      |= __meta._S_mask_to_shifted_ullong(__meta._S_negate(__native));
  	  });
--- 1340,1351 ----
  
      // negation {{{2
      template <typename _Tp, typename... _As>
!       static constexpr inline _MaskMember
        _S_negate(const _SimdTuple<_Tp, _As...>& __x) noexcept
        {
  	_MaskMember __bits = 0;
  	__for_each(
! 	  __x, [&__bits](auto __meta, auto __native) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	    __bits
  	      |= __meta._S_mask_to_shifted_ullong(__meta._S_negate(__native));
  	  });
*************** template <int _Np, typename>
*** 1414,1420 ****
  	  {
  	    const auto& __x2 = __call_with_n_evaluations<
  	      __div_roundup(_Tup::_S_tuple_size, 2)>(
! 	      [](auto __first_simd, auto... __remaining) {
  		if constexpr (sizeof...(__remaining) == 0)
  		  return __first_simd;
  		else
--- 1383,1389 ----
  	  {
  	    const auto& __x2 = __call_with_n_evaluations<
  	      __div_roundup(_Tup::_S_tuple_size, 2)>(
! 	      [](auto __first_simd, auto... __remaining) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  		if constexpr (sizeof...(__remaining) == 0)
  		  return __first_simd;
  		else
*************** template <int _Np, typename>
*** 1428,1434 ****
  		      __make_simd_tuple(__first_simd, __remaining...));
  		  }
  	      },
! 	      [&](auto __i) {
  		auto __left = __tup.template _M_simd_at<2 * __i>();
  		if constexpr (2 * __i + 1 == _Tup::_S_tuple_size)
  		  return __left;
--- 1397,1403 ----
  		      __make_simd_tuple(__first_simd, __remaining...));
  		  }
  	      },
! 	      [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  		auto __left = __tup.template _M_simd_at<2 * __i>();
  		if constexpr (2 * __i + 1 == _Tup::_S_tuple_size)
  		  return __left;
*************** template <int _Np, typename>
*** 1444,1450 ****
  			_GLIBCXX_SIMD_USE_CONSTEXPR_API
  			typename _LT::mask_type __k(
  			  __private_init,
! 			  [](auto __j) constexpr { return __j < _RT::size(); });
  			_LT __ext_right = __left;
  			where(__k, __ext_right)
  			  = __proposed::resizing_simd_cast<_LT>(__right);
--- 1413,1421 ----
  			_GLIBCXX_SIMD_USE_CONSTEXPR_API
  			typename _LT::mask_type __k(
  			  __private_init,
! 			  [](auto __j) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			    return __j < _RT::size();
! 			  });
  			_LT __ext_right = __left;
  			where(__k, __ext_right)
  			  = __proposed::resizing_simd_cast<_LT>(__right);
*************** template <int _Np, typename>
*** 1459,1482 ****
  
      // _S_min, _S_max {{{2
      template <typename _Tp, typename... _As>
!       static inline constexpr _SimdTuple<_Tp, _As...>
!       _S_min(const _SimdTuple<_Tp, _As...>& __a,
! 	     const _SimdTuple<_Tp, _As...>& __b)
        {
  	return __a._M_apply_per_chunk(
! 	  [](auto __impl, auto __aa, auto __bb) constexpr {
  	    return __impl._S_min(__aa, __bb);
  	  },
  	  __b);
        }
  
      template <typename _Tp, typename... _As>
!       static inline constexpr _SimdTuple<_Tp, _As...>
!       _S_max(const _SimdTuple<_Tp, _As...>& __a,
! 	     const _SimdTuple<_Tp, _As...>& __b)
        {
  	return __a._M_apply_per_chunk(
! 	  [](auto __impl, auto __aa, auto __bb) constexpr {
  	    return __impl._S_max(__aa, __bb);
  	  },
  	  __b);
--- 1430,1451 ----
  
      // _S_min, _S_max {{{2
      template <typename _Tp, typename... _As>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdTuple<_Tp, _As...>
!       _S_min(const _SimdTuple<_Tp, _As...>& __a, const _SimdTuple<_Tp, _As...>& __b)
        {
  	return __a._M_apply_per_chunk(
! 	  [](auto __impl, auto __aa, auto __bb) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	    return __impl._S_min(__aa, __bb);
  	  },
  	  __b);
        }
  
      template <typename _Tp, typename... _As>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdTuple<_Tp, _As...>
!       _S_max(const _SimdTuple<_Tp, _As...>& __a, const _SimdTuple<_Tp, _As...>& __b)
        {
  	return __a._M_apply_per_chunk(
! 	  [](auto __impl, auto __aa, auto __bb) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	    return __impl._S_max(__aa, __bb);
  	  },
  	  __b);
*************** template <int _Np, typename>
*** 1484,1519 ****
  
      // _S_complement {{{2
      template <typename _Tp, typename... _As>
!       static inline constexpr _SimdTuple<_Tp, _As...>
        _S_complement(const _SimdTuple<_Tp, _As...>& __x) noexcept
        {
! 	return __x._M_apply_per_chunk([](auto __impl, auto __xx) constexpr {
! 	  return __impl._S_complement(__xx);
! 	});
        }
  
      // _S_unary_minus {{{2
      template <typename _Tp, typename... _As>
!       static inline constexpr _SimdTuple<_Tp, _As...>
        _S_unary_minus(const _SimdTuple<_Tp, _As...>& __x) noexcept
        {
! 	return __x._M_apply_per_chunk([](auto __impl, auto __xx) constexpr {
! 	  return __impl._S_unary_minus(__xx);
! 	});
        }
  
      // arithmetic operators {{{2
  
! #define _GLIBCXX_SIMD_FIXED_OP(name_, op_)                                     \
!     template <typename _Tp, typename... _As>                                   \
!       static inline constexpr _SimdTuple<_Tp, _As...> name_(                   \
! 	const _SimdTuple<_Tp, _As...>& __x, const _SimdTuple<_Tp, _As...>& __y)\
!       {                                                                        \
! 	return __x._M_apply_per_chunk(                                         \
! 	  [](auto __impl, auto __xx, auto __yy) constexpr {                    \
! 	    return __impl.name_(__xx, __yy);                                   \
! 	  },                                                                   \
! 	  __y);                                                                \
        }
  
      _GLIBCXX_SIMD_FIXED_OP(_S_plus, +)
--- 1453,1490 ----
  
      // _S_complement {{{2
      template <typename _Tp, typename... _As>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdTuple<_Tp, _As...>
        _S_complement(const _SimdTuple<_Tp, _As...>& __x) noexcept
        {
! 	return __x._M_apply_per_chunk(
! 		 [](auto __impl, auto __xx) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   return __impl._S_complement(__xx);
! 		 });
        }
  
      // _S_unary_minus {{{2
      template <typename _Tp, typename... _As>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdTuple<_Tp, _As...>
        _S_unary_minus(const _SimdTuple<_Tp, _As...>& __x) noexcept
        {
! 	return __x._M_apply_per_chunk(
! 		 [](auto __impl, auto __xx) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   return __impl._S_unary_minus(__xx);
! 		 });
        }
  
      // arithmetic operators {{{2
  
! #define _GLIBCXX_SIMD_FIXED_OP(name_, op_)                                                     \
!     template <typename _Tp, typename... _As>                                                   \
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdTuple<_Tp, _As...> name_(                  \
! 	const _SimdTuple<_Tp, _As...>& __x, const _SimdTuple<_Tp, _As...>& __y)                \
!       {                                                                                        \
! 	return __x._M_apply_per_chunk(                                                         \
! 	  [](auto __impl, auto __xx, auto __yy) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { \
! 	    return __impl.name_(__xx, __yy);                                                   \
! 	  },                                                                                   \
! 	  __y);                                                                                \
        }
  
      _GLIBCXX_SIMD_FIXED_OP(_S_plus, +)
*************** template <int _Np, typename>
*** 1529,1549 ****
  #undef _GLIBCXX_SIMD_FIXED_OP
  
      template <typename _Tp, typename... _As>
!       static inline constexpr _SimdTuple<_Tp, _As...>
        _S_bit_shift_left(const _SimdTuple<_Tp, _As...>& __x, int __y)
        {
! 	return __x._M_apply_per_chunk([__y](auto __impl, auto __xx) constexpr {
! 	  return __impl._S_bit_shift_left(__xx, __y);
! 	});
        }
  
      template <typename _Tp, typename... _As>
!       static inline constexpr _SimdTuple<_Tp, _As...>
        _S_bit_shift_right(const _SimdTuple<_Tp, _As...>& __x, int __y)
        {
! 	return __x._M_apply_per_chunk([__y](auto __impl, auto __xx) constexpr {
! 	  return __impl._S_bit_shift_right(__xx, __y);
! 	});
        }
  
    // math {{{2
--- 1500,1522 ----
  #undef _GLIBCXX_SIMD_FIXED_OP
  
      template <typename _Tp, typename... _As>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdTuple<_Tp, _As...>
        _S_bit_shift_left(const _SimdTuple<_Tp, _As...>& __x, int __y)
        {
! 	return __x._M_apply_per_chunk(
! 		 [__y](auto __impl, auto __xx) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   return __impl._S_bit_shift_left(__xx, __y);
! 		 });
        }
  
      template <typename _Tp, typename... _As>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdTuple<_Tp, _As...>
        _S_bit_shift_right(const _SimdTuple<_Tp, _As...>& __x, int __y)
        {
! 	return __x._M_apply_per_chunk(
! 		 [__y](auto __impl, auto __xx) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   return __impl._S_bit_shift_right(__xx, __y);
! 		 });
        }
  
    // math {{{2
*************** template <int _Np, typename>
*** 1557,1591 ****
  	  {                                                                    \
  	    if constexpr (is_same_v<_Tp, _RetTp>)                              \
  	      return __x._M_apply_per_chunk(                                   \
! 		[](auto __impl, auto __xx) constexpr {                         \
! 		  using _V = typename decltype(__impl)::simd_type;             \
! 		  return __data(__name(_V(__private_init, __xx)));             \
! 		});                                                            \
  	    else                                                               \
  	      return __optimize_simd_tuple(                                    \
! 		__x.template _M_apply_r<_RetTp>([](auto __impl, auto __xx) {   \
! 		  return __impl._S_##__name(__xx);                             \
! 		}));                                                           \
  	  }                                                                    \
  	else if constexpr (                                                    \
  	  is_same_v<                                                           \
  	    _Tp,                                                               \
  	    _RetTp> && (... && is_same_v<_SimdTuple<_Tp, _As...>, _More>) )    \
  	  return __x._M_apply_per_chunk(                                       \
! 	    [](auto __impl, auto __xx, auto... __pack) constexpr {             \
! 	      using _V = typename decltype(__impl)::simd_type;                 \
! 	      return __data(__name(_V(__private_init, __xx),                   \
! 				   _V(__private_init, __pack)...));            \
! 	    },                                                                 \
! 	    __more...);                                                        \
  	else if constexpr (is_same_v<_Tp, _RetTp>)                             \
  	  return __x._M_apply_per_chunk(                                       \
! 	    [](auto __impl, auto __xx, auto... __pack) constexpr {             \
! 	      using _V = typename decltype(__impl)::simd_type;                 \
! 	      return __data(__name(_V(__private_init, __xx),                   \
! 				   __autocvt_to_simd(__pack)...));             \
! 	    },                                                                 \
! 	    __more...);                                                        \
  	else                                                                   \
  	  __assert_unreachable<_Tp>();                                         \
        }
--- 1530,1569 ----
  	  {                                                                    \
  	    if constexpr (is_same_v<_Tp, _RetTp>)                              \
  	      return __x._M_apply_per_chunk(                                   \
! 		       [](auto __impl, auto __xx)                              \
! 			 constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA          \
! 		       {                                                       \
! 			 using _V = typename decltype(__impl)::simd_type;      \
! 			 return __data(__name(_V(__private_init, __xx)));      \
! 		       });                                                     \
  	    else                                                               \
  	      return __optimize_simd_tuple(                                    \
! 		       __x.template _M_apply_r<_RetTp>(                        \
! 			 [](auto __impl, auto __xx)                            \
! 			   _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA                  \
! 			 { return __impl._S_##__name(__xx); }));               \
  	  }                                                                    \
  	else if constexpr (                                                    \
  	  is_same_v<                                                           \
  	    _Tp,                                                               \
  	    _RetTp> && (... && is_same_v<_SimdTuple<_Tp, _As...>, _More>) )    \
  	  return __x._M_apply_per_chunk(                                       \
! 		   [](auto __impl, auto __xx, auto... __pack)                  \
! 		     constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA              \
! 		   {                                                           \
! 		     using _V = typename decltype(__impl)::simd_type;          \
! 		     return __data(__name(_V(__private_init, __xx),            \
! 					  _V(__private_init, __pack)...));     \
! 		   }, __more...);                                              \
  	else if constexpr (is_same_v<_Tp, _RetTp>)                             \
  	  return __x._M_apply_per_chunk(                                       \
! 		   [](auto __impl, auto __xx, auto... __pack)                  \
! 		     constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA              \
! 		   {                                                           \
! 		     using _V = typename decltype(__impl)::simd_type;          \
! 		     return __data(__name(_V(__private_init, __xx),            \
! 					  __autocvt_to_simd(__pack)...));      \
! 		   }, __more...);                                              \
  	else                                                                   \
  	  __assert_unreachable<_Tp>();                                         \
        }
*************** template <int _Np, typename>
*** 1651,1666 ****
  #undef _GLIBCXX_SIMD_APPLY_ON_TUPLE
  
      template <typename _Tp, typename... _Abis>
!       static _SimdTuple<_Tp, _Abis...> _S_remquo(
! 	const _SimdTuple<_Tp, _Abis...>& __x,
! 	const _SimdTuple<_Tp, _Abis...>& __y,
! 	__fixed_size_storage_t<int, _SimdTuple<_Tp, _Abis...>::_S_size()>* __z)
        {
  	return __x._M_apply_per_chunk(
! 	  [](auto __impl, const auto __xx, const auto __yy, auto& __zz) {
! 	    return __impl._S_remquo(__xx, __yy, &__zz);
! 	  },
! 	  __y, *__z);
        }
  
      template <typename _Tp, typename... _As>
--- 1629,1643 ----
  #undef _GLIBCXX_SIMD_APPLY_ON_TUPLE
  
      template <typename _Tp, typename... _Abis>
!       static inline _SimdTuple<_Tp, _Abis...>
!       _S_remquo(const _SimdTuple<_Tp, _Abis...>& __x, const _SimdTuple<_Tp, _Abis...>& __y,
! 		__fixed_size_storage_t<int, _SimdTuple<_Tp, _Abis...>::_S_size()>* __z)
        {
  	return __x._M_apply_per_chunk(
! 		 [](auto __impl, const auto __xx, const auto __yy, auto& __zz)
! 		   _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA
! 		 { return __impl._S_remquo(__xx, __yy, &__zz); },
! 		 __y, *__z);
        }
  
      template <typename _Tp, typename... _As>
*************** template <int _Np, typename>
*** 1669,1690 ****
  	       __fixed_size_storage_t<int, _Np>& __exp) noexcept
        {
  	return __x._M_apply_per_chunk(
! 	  [](auto __impl, const auto& __a, auto& __b) {
! 	    return __data(
! 	      frexp(typename decltype(__impl)::simd_type(__private_init, __a),
! 		    __autocvt_to_simd(__b)));
! 	  },
! 	  __exp);
        }
  
! #define _GLIBCXX_SIMD_TEST_ON_TUPLE_(name_)                                    \
!     template <typename _Tp, typename... _As>                                   \
!       static inline _MaskMember                                                \
! 	_S_##name_(const _SimdTuple<_Tp, _As...>& __x) noexcept                \
!       {                                                                        \
! 	return _M_test([](auto __impl,                                         \
! 			  auto __xx) { return __impl._S_##name_(__xx); },      \
! 		       __x);                                                   \
        }
  
      _GLIBCXX_SIMD_TEST_ON_TUPLE_(isinf)
--- 1646,1665 ----
  	       __fixed_size_storage_t<int, _Np>& __exp) noexcept
        {
  	return __x._M_apply_per_chunk(
! 		 [](auto __impl, const auto& __a, auto& __b) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   return __data(frexp(typename decltype(__impl)::simd_type(__private_init, __a),
! 				       __autocvt_to_simd(__b)));
! 		 }, __exp);
        }
  
! #define _GLIBCXX_SIMD_TEST_ON_TUPLE_(name_)                                              \
!     template <typename _Tp, typename... _As>                                             \
!       static inline _MaskMember                                                          \
!       _S_##name_(const _SimdTuple<_Tp, _As...>& __x) noexcept                            \
!       {                                                                                  \
! 	return _M_test([] (auto __impl, auto __xx) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA  { \
! 		 return __impl._S_##name_(__xx);                                         \
! 	       }, __x);                                                                  \
        }
  
      _GLIBCXX_SIMD_TEST_ON_TUPLE_(isinf)
*************** template <int _Np, typename>
*** 1700,1706 ****
        _S_increment(_SimdTuple<_Ts...>& __x)
        {
  	__for_each(
! 	  __x, [](auto __meta, auto& native) constexpr {
  	    __meta._S_increment(native);
  	  });
        }
--- 1675,1681 ----
        _S_increment(_SimdTuple<_Ts...>& __x)
        {
  	__for_each(
! 	  __x, [](auto __meta, auto& native) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	    __meta._S_increment(native);
  	  });
        }
*************** template <int _Np, typename>
*** 1710,1716 ****
        _S_decrement(_SimdTuple<_Ts...>& __x)
        {
  	__for_each(
! 	  __x, [](auto __meta, auto& native) constexpr {
  	    __meta._S_decrement(native);
  	  });
        }
--- 1685,1691 ----
        _S_decrement(_SimdTuple<_Ts...>& __x)
        {
  	__for_each(
! 	  __x, [](auto __meta, auto& native) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	    __meta._S_decrement(native);
  	  });
        }
*************** template <int _Np, typename>
*** 1718,1732 ****
      // compares {{{2
  #define _GLIBCXX_SIMD_CMP_OPERATIONS(__cmp)                                    \
      template <typename _Tp, typename... _As>                                   \
!       _GLIBCXX_SIMD_INTRINSIC constexpr static _MaskMember                     \
        __cmp(const _SimdTuple<_Tp, _As...>& __x,                                \
  	    const _SimdTuple<_Tp, _As...>& __y)                                \
        {                                                                        \
! 	return _M_test(                                                        \
! 	  [](auto __impl, auto __xx, auto __yy) constexpr {                    \
! 	    return __impl.__cmp(__xx, __yy);                                   \
! 	  },                                                                   \
! 	  __x, __y);                                                           \
        }
  
      _GLIBCXX_SIMD_CMP_OPERATIONS(_S_equal_to)
--- 1693,1706 ----
      // compares {{{2
  #define _GLIBCXX_SIMD_CMP_OPERATIONS(__cmp)                                    \
      template <typename _Tp, typename... _As>                                   \
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _MaskMember                     \
        __cmp(const _SimdTuple<_Tp, _As...>& __x,                                \
  	    const _SimdTuple<_Tp, _As...>& __y)                                \
        {                                                                        \
! 	return _M_test([](auto __impl, auto __xx, auto __yy)                   \
! 			 constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA          \
! 		       { return __impl.__cmp(__xx, __yy); },                   \
! 		       __x, __y);                                              \
        }
  
      _GLIBCXX_SIMD_CMP_OPERATIONS(_S_equal_to)
*************** template <int _Np, typename>
*** 1743,1775 ****
  
      // smart_reference access {{{2
      template <typename _Tp, typename... _As, typename _Up>
!       _GLIBCXX_SIMD_INTRINSIC static void _S_set(_SimdTuple<_Tp, _As...>& __v,
! 						 int __i, _Up&& __x) noexcept
        { __v._M_set(__i, static_cast<_Up&&>(__x)); }
  
      // _S_masked_assign {{{2
      template <typename _Tp, typename... _As>
!       _GLIBCXX_SIMD_INTRINSIC static void
        _S_masked_assign(const _MaskMember __bits, _SimdTuple<_Tp, _As...>& __lhs,
  		       const __type_identity_t<_SimdTuple<_Tp, _As...>>& __rhs)
        {
! 	__for_each(
! 	  __lhs, __rhs,
! 	  [&](auto __meta, auto& __native_lhs, auto __native_rhs) constexpr {
! 	    __meta._S_masked_assign(__meta._S_make_mask(__bits), __native_lhs,
! 				    __native_rhs);
! 	  });
        }
  
      // Optimization for the case where the RHS is a scalar. No need to broadcast
      // the scalar to a simd first.
      template <typename _Tp, typename... _As>
!       _GLIBCXX_SIMD_INTRINSIC static void
        _S_masked_assign(const _MaskMember __bits, _SimdTuple<_Tp, _As...>& __lhs,
  		       const __type_identity_t<_Tp> __rhs)
        {
  	__for_each(
! 	  __lhs, [&](auto __meta, auto& __native_lhs) constexpr {
  	    __meta._S_masked_assign(__meta._S_make_mask(__bits), __native_lhs,
  				    __rhs);
  	  });
--- 1717,1750 ----
  
      // smart_reference access {{{2
      template <typename _Tp, typename... _As, typename _Up>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr void
!       _S_set(_SimdTuple<_Tp, _As...>& __v, int __i, _Up&& __x) noexcept
        { __v._M_set(__i, static_cast<_Up&&>(__x)); }
  
      // _S_masked_assign {{{2
      template <typename _Tp, typename... _As>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr void
        _S_masked_assign(const _MaskMember __bits, _SimdTuple<_Tp, _As...>& __lhs,
  		       const __type_identity_t<_SimdTuple<_Tp, _As...>>& __rhs)
        {
! 	__for_each(__lhs, __rhs,
! 		   [&](auto __meta, auto& __native_lhs, auto __native_rhs)
! 		     constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA
! 		   {
! 		     __meta._S_masked_assign(__meta._S_make_mask(__bits), __native_lhs,
! 					     __native_rhs);
! 		   });
        }
  
      // Optimization for the case where the RHS is a scalar. No need to broadcast
      // the scalar to a simd first.
      template <typename _Tp, typename... _As>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr void
        _S_masked_assign(const _MaskMember __bits, _SimdTuple<_Tp, _As...>& __lhs,
  		       const __type_identity_t<_Tp> __rhs)
        {
  	__for_each(
! 	  __lhs, [&](auto __meta, auto& __native_lhs) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	    __meta._S_masked_assign(__meta._S_make_mask(__bits), __native_lhs,
  				    __rhs);
  	  });
*************** template <int _Np, typename>
*** 1777,1804 ****
  
      // _S_masked_cassign {{{2
      template <typename _Op, typename _Tp, typename... _As>
!       static inline void _S_masked_cassign(const _MaskMember __bits,
! 					   _SimdTuple<_Tp, _As...>& __lhs,
! 					   const _SimdTuple<_Tp, _As...>& __rhs,
! 					   _Op __op)
        {
! 	__for_each(
! 	  __lhs, __rhs,
! 	  [&](auto __meta, auto& __native_lhs, auto __native_rhs) constexpr {
! 	    __meta.template _S_masked_cassign(__meta._S_make_mask(__bits),
! 					      __native_lhs, __native_rhs, __op);
! 	  });
        }
  
      // Optimization for the case where the RHS is a scalar. No need to broadcast
      // the scalar to a simd first.
      template <typename _Op, typename _Tp, typename... _As>
!       static inline void _S_masked_cassign(const _MaskMember __bits,
! 					   _SimdTuple<_Tp, _As...>& __lhs,
! 					   const _Tp& __rhs, _Op __op)
        {
  	__for_each(
! 	  __lhs, [&](auto __meta, auto& __native_lhs) constexpr {
  	    __meta.template _S_masked_cassign(__meta._S_make_mask(__bits),
  					      __native_lhs, __rhs, __op);
  	  });
--- 1752,1779 ----
  
      // _S_masked_cassign {{{2
      template <typename _Op, typename _Tp, typename... _As>
!       static constexpr inline void
!       _S_masked_cassign(const _MaskMember __bits, _SimdTuple<_Tp, _As...>& __lhs,
! 			const _SimdTuple<_Tp, _As...>& __rhs, _Op __op)
        {
! 	__for_each(__lhs, __rhs,
! 		   [&](auto __meta, auto& __native_lhs, auto __native_rhs)
! 		     constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA
! 		   {
! 		     __meta.template _S_masked_cassign(__meta._S_make_mask(__bits),
! 						       __native_lhs, __native_rhs, __op);
! 		   });
        }
  
      // Optimization for the case where the RHS is a scalar. No need to broadcast
      // the scalar to a simd first.
      template <typename _Op, typename _Tp, typename... _As>
!       static constexpr inline void
!       _S_masked_cassign(const _MaskMember __bits, _SimdTuple<_Tp, _As...>& __lhs,
! 			const _Tp& __rhs, _Op __op)
        {
  	__for_each(
! 	  __lhs, [&](auto __meta, auto& __native_lhs) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	    __meta.template _S_masked_cassign(__meta._S_make_mask(__bits),
  					      __native_lhs, __rhs, __op);
  	  });
*************** template <int _Np, typename>
*** 1806,1812 ****
  
      // _S_masked_unary {{{2
      template <template <typename> class _Op, typename _Tp, typename... _As>
!       static inline _SimdTuple<_Tp, _As...>
        _S_masked_unary(const _MaskMember __bits, const _SimdTuple<_Tp, _As...>& __v)
        {
  	return __v._M_apply_wrapped([&__bits](auto __meta,
--- 1781,1787 ----
  
      // _S_masked_unary {{{2
      template <template <typename> class _Op, typename _Tp, typename... _As>
!       static constexpr inline _SimdTuple<_Tp, _As...>
        _S_masked_unary(const _MaskMember __bits, const _SimdTuple<_Tp, _As...>& __v)
        {
  	return __v._M_apply_wrapped([&__bits](auto __meta,
*************** template <int _Np, typename>
*** 1853,1858 ****
--- 1828,1840 ----
        _GLIBCXX_SIMD_INTRINSIC static constexpr _MaskMember
        _S_load(const bool* __mem)
        {
+ 	if (__builtin_is_constant_evaluated())
+ 	  {
+ 	    _MaskMember __r{};
+ 	    for (size_t __i = 0; __i < _Np; ++__i)
+ 	      __r.set(__i, __mem[__i]);
+ 	    return __r;
+ 	  }
  	using _Ip = __int_for_sizeof_t<bool>;
  	// the following load uses element_aligned and relies on __mem already
  	// carrying alignment information from when this load function was
*************** template <int _Np, typename>
*** 1888,1905 ****
      // }}}
      // _S_from_bitmask {{{2
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static _MaskMember
        _S_from_bitmask(_MaskMember __bits, _TypeTag<_Tp>) noexcept
        { return __bits; }
  
      // _S_load {{{2
!     static inline _MaskMember _S_load(const bool* __mem) noexcept
      {
        // TODO: _UChar is not necessarily the best type to use here. For smaller
        // _Np _UShort, _UInt, _ULLong, float, and double can be more efficient.
        _ULLong __r = 0;
        using _Vs = __fixed_size_storage_t<_UChar, _Np>;
!       __for_each(_Vs{}, [&](auto __meta, auto) {
  	__r |= __meta._S_mask_to_shifted_ullong(
  	  __meta._S_mask_impl._S_load(&__mem[__meta._S_offset],
  				      _SizeConstant<__meta._S_size()>()));
--- 1870,1888 ----
      // }}}
      // _S_from_bitmask {{{2
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _MaskMember
        _S_from_bitmask(_MaskMember __bits, _TypeTag<_Tp>) noexcept
        { return __bits; }
  
      // _S_load {{{2
!     static constexpr inline _MaskMember
!     _S_load(const bool* __mem) noexcept
      {
        // TODO: _UChar is not necessarily the best type to use here. For smaller
        // _Np _UShort, _UInt, _ULLong, float, and double can be more efficient.
        _ULLong __r = 0;
        using _Vs = __fixed_size_storage_t<_UChar, _Np>;
!       __for_each(_Vs{}, [&](auto __meta, auto) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	__r |= __meta._S_mask_to_shifted_ullong(
  	  __meta._S_mask_impl._S_load(&__mem[__meta._S_offset],
  				      _SizeConstant<__meta._S_size()>()));
*************** template <int _Np, typename>
*** 1908,1926 ****
      }
  
      // _S_masked_load {{{2
!     static inline _MaskMember _S_masked_load(_MaskMember __merge,
! 					     _MaskMember __mask,
! 					     const bool* __mem) noexcept
      {
!       _BitOps::_S_bit_iteration(__mask.to_ullong(), [&](auto __i) {
! 	__merge.set(__i, __mem[__i]);
!       });
        return __merge;
      }
  
      // _S_store {{{2
!     static inline void _S_store(const _MaskMember __bitmask,
! 				bool* __mem) noexcept
      {
        if constexpr (_Np == 1)
  	__mem[0] = __bitmask[0];
--- 1891,1909 ----
      }
  
      // _S_masked_load {{{2
!     static constexpr inline _MaskMember
!     _S_masked_load(_MaskMember __merge, _MaskMember __mask, const bool* __mem) noexcept
      {
!       _BitOps::_S_bit_iteration(__mask.to_ullong(),
! 				[&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 				  __merge.set(__i, __mem[__i]);
! 				});
        return __merge;
      }
  
      // _S_store {{{2
!     static constexpr inline void
!     _S_store(const _MaskMember __bitmask, bool* __mem) noexcept
      {
        if constexpr (_Np == 1)
  	__mem[0] = __bitmask[0];
*************** template <int _Np, typename>
*** 1929,1946 ****
      }
  
      // _S_masked_store {{{2
!     static inline void _S_masked_store(const _MaskMember __v, bool* __mem,
! 				       const _MaskMember __k) noexcept
      {
!       _BitOps::_S_bit_iteration(__k, [&](auto __i) { __mem[__i] = __v[__i]; });
      }
  
      // logical and bitwise operators {{{2
!     _GLIBCXX_SIMD_INTRINSIC static _MaskMember
      _S_logical_and(const _MaskMember& __x, const _MaskMember& __y) noexcept
      { return __x & __y; }
  
!     _GLIBCXX_SIMD_INTRINSIC static _MaskMember
      _S_logical_or(const _MaskMember& __x, const _MaskMember& __y) noexcept
      { return __x | __y; }
  
--- 1912,1930 ----
      }
  
      // _S_masked_store {{{2
!     static constexpr inline void
!     _S_masked_store(const _MaskMember __v, bool* __mem, const _MaskMember __k) noexcept
      {
!       _BitOps::_S_bit_iteration(
! 	__k, [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { __mem[__i] = __v[__i]; });
      }
  
      // logical and bitwise operators {{{2
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _MaskMember
      _S_logical_and(const _MaskMember& __x, const _MaskMember& __y) noexcept
      { return __x & __y; }
  
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _MaskMember
      _S_logical_or(const _MaskMember& __x, const _MaskMember& __y) noexcept
      { return __x | __y; }
  
*************** template <int _Np, typename>
*** 1948,1980 ****
      _S_bit_not(const _MaskMember& __x) noexcept
      { return ~__x; }
  
!     _GLIBCXX_SIMD_INTRINSIC static _MaskMember
      _S_bit_and(const _MaskMember& __x, const _MaskMember& __y) noexcept
      { return __x & __y; }
  
!     _GLIBCXX_SIMD_INTRINSIC static _MaskMember
      _S_bit_or(const _MaskMember& __x, const _MaskMember& __y) noexcept
      { return __x | __y; }
  
!     _GLIBCXX_SIMD_INTRINSIC static _MaskMember
      _S_bit_xor(const _MaskMember& __x, const _MaskMember& __y) noexcept
      { return __x ^ __y; }
  
      // smart_reference access {{{2
!     _GLIBCXX_SIMD_INTRINSIC static void _S_set(_MaskMember& __k, int __i,
! 					       bool __x) noexcept
      { __k.set(__i, __x); }
  
      // _S_masked_assign {{{2
!     _GLIBCXX_SIMD_INTRINSIC static void
!     _S_masked_assign(const _MaskMember __k, _MaskMember& __lhs,
! 		     const _MaskMember __rhs)
      { __lhs = (__lhs & ~__k) | (__rhs & __k); }
  
      // Optimization for the case where the RHS is a scalar.
!     _GLIBCXX_SIMD_INTRINSIC static void _S_masked_assign(const _MaskMember __k,
! 							 _MaskMember& __lhs,
! 							 const bool __rhs)
      {
        if (__rhs)
  	__lhs |= __k;
--- 1932,1962 ----
      _S_bit_not(const _MaskMember& __x) noexcept
      { return ~__x; }
  
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _MaskMember
      _S_bit_and(const _MaskMember& __x, const _MaskMember& __y) noexcept
      { return __x & __y; }
  
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _MaskMember
      _S_bit_or(const _MaskMember& __x, const _MaskMember& __y) noexcept
      { return __x | __y; }
  
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _MaskMember
      _S_bit_xor(const _MaskMember& __x, const _MaskMember& __y) noexcept
      { return __x ^ __y; }
  
      // smart_reference access {{{2
!     _GLIBCXX_SIMD_INTRINSIC static constexpr void
!     _S_set(_MaskMember& __k, int __i, bool __x) noexcept
      { __k.set(__i, __x); }
  
      // _S_masked_assign {{{2
!     _GLIBCXX_SIMD_INTRINSIC static constexpr void
!     _S_masked_assign(const _MaskMember __k, _MaskMember& __lhs, const _MaskMember __rhs)
      { __lhs = (__lhs & ~__k) | (__rhs & __k); }
  
      // Optimization for the case where the RHS is a scalar.
!     _GLIBCXX_SIMD_INTRINSIC static constexpr void
!     _S_masked_assign(const _MaskMember __k, _MaskMember& __lhs, const bool __rhs)
      {
        if (__rhs)
  	__lhs |= __k;
*************** template <int _Np, typename>
*** 1985,2009 ****
      // }}}2
      // _S_all_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static bool _S_all_of(simd_mask<_Tp, _Abi> __k)
        { return __data(__k).all(); }
  
      // }}}
      // _S_any_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static bool _S_any_of(simd_mask<_Tp, _Abi> __k)
        { return __data(__k).any(); }
  
      // }}}
      // _S_none_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static bool _S_none_of(simd_mask<_Tp, _Abi> __k)
        { return __data(__k).none(); }
  
      // }}}
      // _S_some_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static bool
        _S_some_of([[maybe_unused]] simd_mask<_Tp, _Abi> __k)
        {
  	if constexpr (_Np == 1)
--- 1967,1994 ----
      // }}}2
      // _S_all_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!       _S_all_of(simd_mask<_Tp, _Abi> __k)
        { return __data(__k).all(); }
  
      // }}}
      // _S_any_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!       _S_any_of(simd_mask<_Tp, _Abi> __k)
        { return __data(__k).any(); }
  
      // }}}
      // _S_none_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!       _S_none_of(simd_mask<_Tp, _Abi> __k)
        { return __data(__k).none(); }
  
      // }}}
      // _S_some_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr bool
        _S_some_of([[maybe_unused]] simd_mask<_Tp, _Abi> __k)
        {
  	if constexpr (_Np == 1)
*************** template <int _Np, typename>
*** 2015,2034 ****
      // }}}
      // _S_popcount {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static int _S_popcount(simd_mask<_Tp, _Abi> __k)
        { return __data(__k).count(); }
  
      // }}}
      // _S_find_first_set {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static int
        _S_find_first_set(simd_mask<_Tp, _Abi> __k)
        { return std::__countr_zero(__data(__k).to_ullong()); }
  
      // }}}
      // _S_find_last_set {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static int
        _S_find_last_set(simd_mask<_Tp, _Abi> __k)
        { return std::__bit_width(__data(__k).to_ullong()) - 1; }
  
--- 2000,2020 ----
      // }}}
      // _S_popcount {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr int
!       _S_popcount(simd_mask<_Tp, _Abi> __k)
        { return __data(__k).count(); }
  
      // }}}
      // _S_find_first_set {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr int
        _S_find_first_set(simd_mask<_Tp, _Abi> __k)
        { return std::__countr_zero(__data(__k).to_ullong()); }
  
      // }}}
      // _S_find_last_set {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr int
        _S_find_last_set(simd_mask<_Tp, _Abi> __k)
        { return std::__bit_width(__data(__k).to_ullong()) - 1; }
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd_math.h gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd_math.h
*** gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd_math.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd_math.h	Thu Jun 20 08:08:10 2024
*************** template <typename _Tp, typename _Abi, t
*** 788,794 ****
  
  	// __exponent(__x) returns the exponent value (bias removed) as
  	// simd<_Up> with integral _Up
! 	auto&& __exponent = [](const _V& __v) {
  	  using namespace std::experimental::__proposed;
  	  using _IV = rebind_simd_t<
  	    conditional_t<sizeof(_Tp) == sizeof(_LLong), _LLong, int>, _V>;
--- 788,794 ----
  
  	// __exponent(__x) returns the exponent value (bias removed) as
  	// simd<_Up> with integral _Up
! 	auto&& __exponent = [](const _V& __v) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	  using namespace std::experimental::__proposed;
  	  using _IV = rebind_simd_t<
  	    conditional_t<sizeof(_Tp) == sizeof(_LLong), _LLong, int>, _V>;
*************** template <typename _R, typename _ToApply
*** 931,937 ****
    {
      return {__private_init,
  	    __data(__arg0)._M_apply_per_chunk(
! 	      [&](auto __impl, const auto&... __inner) {
  		using _V = typename decltype(__impl)::simd_type;
  		return __data(__apply(_V(__private_init, __inner)...));
  	      },
--- 931,937 ----
    {
      return {__private_init,
  	    __data(__arg0)._M_apply_per_chunk(
! 	      [&](auto __impl, const auto&... __inner) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  		using _V = typename decltype(__impl)::simd_type;
  		return __data(__apply(_V(__private_init, __inner)...));
  	      },
*************** _GLIBCXX_SIMD_CVTING2(hypot)
*** 1092,1099 ****
      if constexpr (__is_fixed_size_abi_v<_Abi> && _V::size() > 1)
        {
  	return __fixed_size_apply<simd<_Tp, _Abi>>(
! 	  [](auto __a, auto __b, auto __c) { return hypot(__a, __b, __c); },
! 	  __x, __y, __z);
        }
      else
        {
--- 1092,1100 ----
      if constexpr (__is_fixed_size_abi_v<_Abi> && _V::size() > 1)
        {
  	return __fixed_size_apply<simd<_Tp, _Abi>>(
! 		 [](auto __a, auto __b, auto __c) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   return hypot(__a, __b, __c);
! 		 }, __x, __y, __z);
        }
      else
        {
*************** template <typename _Tp, typename _Abi, t
*** 1380,1388 ****
  		 const fixed_size_simd<unsigned, simd_size_v<_Tp, _Abi>>& __m,
  		 const simd<_Tp, _Abi>& __x)
    {
!     return simd<_Tp, _Abi>([&](auto __i) {
!       return std::assoc_laguerre(__n[__i], __m[__i], __x[__i]);
!     });
    }
  
  template <typename _Tp, typename _Abi, typename = __detail::__odr_helper>
--- 1381,1389 ----
  		 const fixed_size_simd<unsigned, simd_size_v<_Tp, _Abi>>& __m,
  		 const simd<_Tp, _Abi>& __x)
    {
!     return simd<_Tp, _Abi>([&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	     return std::assoc_laguerre(__n[__i], __m[__i], __x[__i]);
! 	   });
    }
  
  template <typename _Tp, typename _Abi, typename = __detail::__odr_helper>
*************** template <typename _Tp, typename _Abi, t
*** 1391,1399 ****
  		 const fixed_size_simd<unsigned, simd_size_v<_Tp, _Abi>>& __m,
  		 const simd<_Tp, _Abi>& __x)
    {
!     return simd<_Tp, _Abi>([&](auto __i) {
!       return std::assoc_legendre(__n[__i], __m[__i], __x[__i]);
!     });
    }
  
  _GLIBCXX_SIMD_MATH_CALL2_(beta, _Tp)
--- 1392,1400 ----
  		 const fixed_size_simd<unsigned, simd_size_v<_Tp, _Abi>>& __m,
  		 const simd<_Tp, _Abi>& __x)
    {
!     return simd<_Tp, _Abi>([&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	     return std::assoc_legendre(__n[__i], __m[__i], __x[__i]);
! 	   });
    }
  
  _GLIBCXX_SIMD_MATH_CALL2_(beta, _Tp)
*************** template <typename _Tp, typename _Abi, t
*** 1414,1421 ****
    hermite(const fixed_size_simd<unsigned, simd_size_v<_Tp, _Abi>>& __n,
  	  const simd<_Tp, _Abi>& __x)
    {
!     return simd<_Tp, _Abi>(
!       [&](auto __i) { return std::hermite(__n[__i], __x[__i]); });
    }
  
  template <typename _Tp, typename _Abi, typename = __detail::__odr_helper>
--- 1415,1423 ----
    hermite(const fixed_size_simd<unsigned, simd_size_v<_Tp, _Abi>>& __n,
  	  const simd<_Tp, _Abi>& __x)
    {
!     return simd<_Tp, _Abi>([&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	     return std::hermite(__n[__i], __x[__i]);
! 	   });
    }
  
  template <typename _Tp, typename _Abi, typename = __detail::__odr_helper>
*************** template <typename _Tp, typename _Abi, t
*** 1423,1430 ****
    laguerre(const fixed_size_simd<unsigned, simd_size_v<_Tp, _Abi>>& __n,
  	   const simd<_Tp, _Abi>& __x)
    {
!     return simd<_Tp, _Abi>(
!       [&](auto __i) { return std::laguerre(__n[__i], __x[__i]); });
    }
  
  template <typename _Tp, typename _Abi, typename = __detail::__odr_helper>
--- 1425,1433 ----
    laguerre(const fixed_size_simd<unsigned, simd_size_v<_Tp, _Abi>>& __n,
  	   const simd<_Tp, _Abi>& __x)
    {
!     return simd<_Tp, _Abi>([&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	     return std::laguerre(__n[__i], __x[__i]);
! 	   });
    }
  
  template <typename _Tp, typename _Abi, typename = __detail::__odr_helper>
*************** template <typename _Tp, typename _Abi, t
*** 1432,1439 ****
    legendre(const fixed_size_simd<unsigned, simd_size_v<_Tp, _Abi>>& __n,
  	   const simd<_Tp, _Abi>& __x)
    {
!     return simd<_Tp, _Abi>(
!       [&](auto __i) { return std::legendre(__n[__i], __x[__i]); });
    }
  
  _GLIBCXX_SIMD_MATH_CALL_(riemann_zeta)
--- 1435,1443 ----
    legendre(const fixed_size_simd<unsigned, simd_size_v<_Tp, _Abi>>& __n,
  	   const simd<_Tp, _Abi>& __x)
    {
!     return simd<_Tp, _Abi>([&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	     return std::legendre(__n[__i], __x[__i]);
! 	   });
    }
  
  _GLIBCXX_SIMD_MATH_CALL_(riemann_zeta)
*************** template <typename _Tp, typename _Abi, t
*** 1443,1450 ****
    sph_bessel(const fixed_size_simd<unsigned, simd_size_v<_Tp, _Abi>>& __n,
  	     const simd<_Tp, _Abi>& __x)
    {
!     return simd<_Tp, _Abi>(
!       [&](auto __i) { return std::sph_bessel(__n[__i], __x[__i]); });
    }
  
  template <typename _Tp, typename _Abi, typename = __detail::__odr_helper>
--- 1447,1455 ----
    sph_bessel(const fixed_size_simd<unsigned, simd_size_v<_Tp, _Abi>>& __n,
  	     const simd<_Tp, _Abi>& __x)
    {
!     return simd<_Tp, _Abi>([&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	     return std::sph_bessel(__n[__i], __x[__i]);
! 	   });
    }
  
  template <typename _Tp, typename _Abi, typename = __detail::__odr_helper>
*************** template <typename _Tp, typename _Abi, t
*** 1453,1461 ****
  	       const fixed_size_simd<unsigned, simd_size_v<_Tp, _Abi>>& __m,
  	       const simd<_Tp, _Abi>& theta)
    {
!     return simd<_Tp, _Abi>([&](auto __i) {
!       return std::assoc_legendre(__l[__i], __m[__i], theta[__i]);
!     });
    }
  
  template <typename _Tp, typename _Abi, typename = __detail::__odr_helper>
--- 1458,1466 ----
  	       const fixed_size_simd<unsigned, simd_size_v<_Tp, _Abi>>& __m,
  	       const simd<_Tp, _Abi>& theta)
    {
!     return simd<_Tp, _Abi>([&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	     return std::assoc_legendre(__l[__i], __m[__i], theta[__i]);
! 	   });
    }
  
  template <typename _Tp, typename _Abi, typename = __detail::__odr_helper>
*************** template <typename _Tp, typename _Abi, t
*** 1463,1470 ****
    sph_neumann(const fixed_size_simd<unsigned, simd_size_v<_Tp, _Abi>>& __n,
  	      const simd<_Tp, _Abi>& __x)
    {
!     return simd<_Tp, _Abi>(
!       [&](auto __i) { return std::sph_neumann(__n[__i], __x[__i]); });
    }
  // }}}
  
--- 1468,1476 ----
    sph_neumann(const fixed_size_simd<unsigned, simd_size_v<_Tp, _Abi>>& __n,
  	      const simd<_Tp, _Abi>& __x)
    {
!     return simd<_Tp, _Abi>([&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	     return std::sph_neumann(__n[__i], __x[__i]);
! 	   });
    }
  // }}}
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd_neon.h gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd_neon.h
*** gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd_neon.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd_neon.h	Thu Jun 20 08:08:10 2024
*************** template <typename _Abi, typename>
*** 61,67 ****
        _S_masked_load(_SimdWrapper<_Tp, _Np> __merge, _MaskMember<_Tp> __k,
  		     const _Up* __mem) noexcept
        {
! 	__execute_n_times<_Np>([&](auto __i) {
  	  if (__k[__i] != 0)
  	    __merge._M_set(__i, static_cast<_Tp>(__mem[__i]));
  	});
--- 61,67 ----
        _S_masked_load(_SimdWrapper<_Tp, _Np> __merge, _MaskMember<_Tp> __k,
  		     const _Up* __mem) noexcept
        {
! 	__execute_n_times<_Np>([&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	  if (__k[__i] != 0)
  	    __merge._M_set(__i, static_cast<_Tp>(__mem[__i]));
  	});
*************** template <typename _Abi, typename>
*** 75,81 ****
        _S_masked_store_nocvt(_SimdWrapper<_Tp, _Np> __v, _Tp* __mem,
  			    _MaskMember<_Tp> __k)
        {
! 	__execute_n_times<_Np>([&](auto __i) {
  	  if (__k[__i] != 0)
  	    __mem[__i] = __v[__i];
  	});
--- 75,81 ----
        _S_masked_store_nocvt(_SimdWrapper<_Tp, _Np> __v, _Tp* __mem,
  			    _MaskMember<_Tp> __k)
        {
! 	__execute_n_times<_Np>([&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	  if (__k[__i] != 0)
  	    __mem[__i] = __v[__i];
  	});
*************** template <typename _Abi, typename>
*** 84,140 ****
      // }}}
      // _S_reduce {{{
      template <typename _Tp, typename _BinaryOperation>
!       _GLIBCXX_SIMD_INTRINSIC static _Tp
        _S_reduce(simd<_Tp, _Abi> __x, _BinaryOperation&& __binary_op)
        {
! 	constexpr size_t _Np = __x.size();
! 	if constexpr (sizeof(__x) == 16 && _Np >= 4
! 		      && !_Abi::template _S_is_partial<_Tp>)
! 	  {
! 	    const auto __halves = split<simd<_Tp, simd_abi::_Neon<8>>>(__x);
! 	    const auto __y = __binary_op(__halves[0], __halves[1]);
! 	    return _SimdImplNeon<simd_abi::_Neon<8>>::_S_reduce(
! 	      __y, static_cast<_BinaryOperation&&>(__binary_op));
! 	  }
! 	else if constexpr (_Np == 8)
! 	  {
! 	    __x = __binary_op(__x, _Base::template _M_make_simd<_Tp, _Np>(
! 				     __vector_permute<1, 0, 3, 2, 5, 4, 7, 6>(
! 				       __x._M_data)));
! 	    __x = __binary_op(__x, _Base::template _M_make_simd<_Tp, _Np>(
! 				     __vector_permute<3, 2, 1, 0, 7, 6, 5, 4>(
! 				       __x._M_data)));
! 	    __x = __binary_op(__x, _Base::template _M_make_simd<_Tp, _Np>(
! 				     __vector_permute<7, 6, 5, 4, 3, 2, 1, 0>(
! 				       __x._M_data)));
! 	    return __x[0];
! 	  }
! 	else if constexpr (_Np == 4)
! 	  {
! 	    __x
! 	      = __binary_op(__x, _Base::template _M_make_simd<_Tp, _Np>(
! 				   __vector_permute<1, 0, 3, 2>(__x._M_data)));
! 	    __x
! 	      = __binary_op(__x, _Base::template _M_make_simd<_Tp, _Np>(
! 				   __vector_permute<3, 2, 1, 0>(__x._M_data)));
! 	    return __x[0];
! 	  }
! 	else if constexpr (_Np == 2)
  	  {
! 	    __x = __binary_op(__x, _Base::template _M_make_simd<_Tp, _Np>(
! 				     __vector_permute<1, 0>(__x._M_data)));
! 	    return __x[0];
  	  }
! 	else
! 	  return _Base::_S_reduce(__x,
! 				  static_cast<_BinaryOperation&&>(__binary_op));
        }
  
      // }}}
      // math {{{
      // _S_sqrt {{{
      template <typename _Tp, typename _TVT = _VectorTraits<_Tp>>
!       _GLIBCXX_SIMD_INTRINSIC static _Tp _S_sqrt(_Tp __x)
        {
  	if constexpr (__have_neon_a64)
  	  {
--- 84,137 ----
      // }}}
      // _S_reduce {{{
      template <typename _Tp, typename _BinaryOperation>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
        _S_reduce(simd<_Tp, _Abi> __x, _BinaryOperation&& __binary_op)
        {
! 	if (not __builtin_is_constant_evaluated())
  	  {
! 	    constexpr size_t _Np = __x.size();
! 	    if constexpr (sizeof(__x) == 16 && _Np >= 4
! 			    && !_Abi::template _S_is_partial<_Tp>)
! 	      {
! 		const auto __halves = split<simd<_Tp, simd_abi::_Neon<8>>>(__x);
! 		const auto __y = __binary_op(__halves[0], __halves[1]);
! 		return _SimdImplNeon<simd_abi::_Neon<8>>::_S_reduce(
! 			 __y, static_cast<_BinaryOperation&&>(__binary_op));
! 	      }
! 	    else if constexpr (_Np == 8)
! 	      {
! 		__x = __binary_op(__x, _Base::template _M_make_simd<_Tp, _Np>(
! 					 __vector_permute<1, 0, 3, 2, 5, 4, 7, 6>(__x._M_data)));
! 		__x = __binary_op(__x, _Base::template _M_make_simd<_Tp, _Np>(
! 					 __vector_permute<3, 2, 1, 0, 7, 6, 5, 4>(__x._M_data)));
! 		__x = __binary_op(__x, _Base::template _M_make_simd<_Tp, _Np>(
! 					 __vector_permute<7, 6, 5, 4, 3, 2, 1, 0>(__x._M_data)));
! 		return __x[0];
! 	      }
! 	    else if constexpr (_Np == 4)
! 	      {
! 		__x = __binary_op(__x, _Base::template _M_make_simd<_Tp, _Np>(
! 					 __vector_permute<1, 0, 3, 2>(__x._M_data)));
! 		__x = __binary_op(__x, _Base::template _M_make_simd<_Tp, _Np>(
! 					 __vector_permute<3, 2, 1, 0>(__x._M_data)));
! 		return __x[0];
! 	      }
! 	    else if constexpr (_Np == 2)
! 	      {
! 		__x = __binary_op(__x, _Base::template _M_make_simd<_Tp, _Np>(
! 					 __vector_permute<1, 0>(__x._M_data)));
! 		return __x[0];
! 	      }
  	  }
! 	return _Base::_S_reduce(__x, static_cast<_BinaryOperation&&>(__binary_op));
        }
  
      // }}}
      // math {{{
      // _S_sqrt {{{
      template <typename _Tp, typename _TVT = _VectorTraits<_Tp>>
!       _GLIBCXX_SIMD_INTRINSIC static _Tp
!       _S_sqrt(_Tp __x)
        {
  	if constexpr (__have_neon_a64)
  	  {
*************** template <typename _Abi, typename>
*** 157,163 ****
      // }}}
      // _S_trunc {{{
      template <typename _TW, typename _TVT = _VectorTraits<_TW>>
!       _GLIBCXX_SIMD_INTRINSIC static _TW _S_trunc(_TW __x)
        {
  	using _Tp = typename _TVT::value_type;
  	if constexpr (__have_neon_a32)
--- 154,161 ----
      // }}}
      // _S_trunc {{{
      template <typename _TW, typename _TVT = _VectorTraits<_TW>>
!       _GLIBCXX_SIMD_INTRINSIC static _TW
!       _S_trunc(_TW __x)
        {
  	using _Tp = typename _TVT::value_type;
  	if constexpr (__have_neon_a32)
*************** template <typename _Abi, typename>
*** 216,222 ****
      // }}}
      // _S_floor {{{
      template <typename _Tp, typename _TVT = _VectorTraits<_Tp>>
!       _GLIBCXX_SIMD_INTRINSIC static _Tp _S_floor(_Tp __x)
        {
  	if constexpr (__have_neon_a32)
  	  {
--- 214,221 ----
      // }}}
      // _S_floor {{{
      template <typename _Tp, typename _TVT = _VectorTraits<_Tp>>
!       _GLIBCXX_SIMD_INTRINSIC static _Tp
!       _S_floor(_Tp __x)
        {
  	if constexpr (__have_neon_a32)
  	  {
*************** template <typename _Abi, typename>
*** 239,245 ****
      // }}}
      // _S_ceil {{{
      template <typename _Tp, typename _TVT = _VectorTraits<_Tp>>
!       _GLIBCXX_SIMD_INTRINSIC static _Tp _S_ceil(_Tp __x)
        {
  	if constexpr (__have_neon_a32)
  	  {
--- 238,245 ----
      // }}}
      // _S_ceil {{{
      template <typename _Tp, typename _TVT = _VectorTraits<_Tp>>
!       _GLIBCXX_SIMD_INTRINSIC static _Tp
!       _S_ceil(_Tp __x)
        {
  	if constexpr (__have_neon_a32)
  	  {
*************** struct _MaskImplNeonMixin
*** 286,292 ****
  	    {
  	      constexpr auto __bitsel
  		= __generate_from_n_evaluations<16, __vector_type_t<_I, 16>>(
! 		  [&](auto __i) {
  		    return static_cast<_I>(
  		      __i < _Np ? (__i < 8 ? 1 << __i : 1 << (__i - 8)) : 0);
  		  });
--- 286,292 ----
  	    {
  	      constexpr auto __bitsel
  		= __generate_from_n_evaluations<16, __vector_type_t<_I, 16>>(
! 		  [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  		    return static_cast<_I>(
  		      __i < _Np ? (__i < 8 ? 1 << __i : 1 << (__i - 8)) : 0);
  		  });
*************** struct _MaskImplNeonMixin
*** 306,312 ****
  	    {
  	      constexpr auto __bitsel
  		= __generate_from_n_evaluations<8, __vector_type_t<_I, 8>>(
! 		  [&](auto __i) {
  		    return static_cast<_I>(__i < _Np ? 1 << __i : 0);
  		  });
  	      __asint &= __bitsel;
--- 306,312 ----
  	    {
  	      constexpr auto __bitsel
  		= __generate_from_n_evaluations<8, __vector_type_t<_I, 8>>(
! 		  [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  		    return static_cast<_I>(__i < _Np ? 1 << __i : 0);
  		  });
  	      __asint &= __bitsel;
*************** struct _MaskImplNeonMixin
*** 322,328 ****
  	    {
  	      constexpr auto __bitsel
  		= __generate_from_n_evaluations<4, __vector_type_t<_I, 4>>(
! 		  [&](auto __i) {
  		    return static_cast<_I>(__i < _Np ? 1 << __i : 0);
  		  });
  	      __asint &= __bitsel;
--- 322,328 ----
  	    {
  	      constexpr auto __bitsel
  		= __generate_from_n_evaluations<4, __vector_type_t<_I, 4>>(
! 		  [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  		    return static_cast<_I>(__i < _Np ? 1 << __i : 0);
  		  });
  	      __asint &= __bitsel;
*************** struct _MaskImplNeonMixin
*** 346,352 ****
  	    {
  	      constexpr auto __bitsel
  		= __generate_from_n_evaluations<8, __vector_type_t<_I, 8>>(
! 		  [&](auto __i) {
  		    return static_cast<_I>(__i < _Np ? 1 << __i : 0);
  		  });
  	      __asint &= __bitsel;
--- 346,352 ----
  	    {
  	      constexpr auto __bitsel
  		= __generate_from_n_evaluations<8, __vector_type_t<_I, 8>>(
! 		  [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  		    return static_cast<_I>(__i < _Np ? 1 << __i : 0);
  		  });
  	      __asint &= __bitsel;
*************** struct _MaskImplNeonMixin
*** 361,367 ****
  	    {
  	      constexpr auto __bitsel
  		= __generate_from_n_evaluations<4, __vector_type_t<_I, 4>>(
! 		  [&](auto __i) {
  		    return static_cast<_I>(__i < _Np ? 1 << __i : 0);
  		  });
  	      __asint &= __bitsel;
--- 361,367 ----
  	    {
  	      constexpr auto __bitsel
  		= __generate_from_n_evaluations<4, __vector_type_t<_I, 4>>(
! 		  [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  		    return static_cast<_I>(__i < _Np ? 1 << __i : 0);
  		  });
  	      __asint &= __bitsel;
*************** template <typename _Abi, typename>
*** 400,406 ****
  
      // _S_all_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static bool _S_all_of(simd_mask<_Tp, _Abi> __k)
        {
  	const auto __kk
  	  = __vector_bitcast<char>(__k._M_data)
--- 400,407 ----
  
      // _S_all_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static bool
!       _S_all_of(simd_mask<_Tp, _Abi> __k)
        {
  	const auto __kk
  	  = __vector_bitcast<char>(__k._M_data)
*************** template <typename _Abi, typename>
*** 419,425 ****
      // }}}
      // _S_any_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static bool _S_any_of(simd_mask<_Tp, _Abi> __k)
        {
  	const auto __kk
  	  = __vector_bitcast<char>(__k._M_data)
--- 420,427 ----
      // }}}
      // _S_any_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static bool
!       _S_any_of(simd_mask<_Tp, _Abi> __k)
        {
  	const auto __kk
  	  = __vector_bitcast<char>(__k._M_data)
*************** template <typename _Abi, typename>
*** 438,444 ****
      // }}}
      // _S_none_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static bool _S_none_of(simd_mask<_Tp, _Abi> __k)
        {
  	const auto __kk = _Abi::_S_masked(__k._M_data);
  	if constexpr (sizeof(__k) == 16)
--- 440,447 ----
      // }}}
      // _S_none_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static bool
!       _S_none_of(simd_mask<_Tp, _Abi> __k)
        {
  	const auto __kk = _Abi::_S_masked(__k._M_data);
  	if constexpr (sizeof(__k) == 16)
*************** template <typename _Abi, typename>
*** 472,478 ****
      // }}}
      // _S_popcount {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static int _S_popcount(simd_mask<_Tp, _Abi> __k)
        {
  	if constexpr (sizeof(_Tp) == 1)
  	  {
--- 475,482 ----
      // }}}
      // _S_popcount {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static int
!       _S_popcount(simd_mask<_Tp, _Abi> __k)
        {
  	if constexpr (sizeof(_Tp) == 1)
  	  {
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd_ppc.h gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd_ppc.h
*** gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd_ppc.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd_ppc.h	Thu Jun 20 08:08:10 2024
*************** template <typename _Abi, typename>
*** 64,70 ****
  	__x = _Base::_S_bit_shift_left(__x, __y);
  	if constexpr (sizeof(_Tp) < sizeof(int))
  	  {
! 	    if (__y >= sizeof(_Tp) * __CHAR_BIT__)
  	      return {};
  	  }
  	return __x;
--- 64,70 ----
  	__x = _Base::_S_bit_shift_left(__x, __y);
  	if constexpr (sizeof(_Tp) < sizeof(int))
  	  {
! 	    if (__y >= int(sizeof(_Tp) * __CHAR_BIT__))
  	      return {};
  	  }
  	return __x;
*************** template <typename _Abi, typename>
*** 124,135 ****
  
      // _S_popcount {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static int _S_popcount(simd_mask<_Tp, _Abi> __k)
        {
  	const auto __kv = __as_vector(__k);
  	if constexpr (__have_power10vec)
  	  {
! 	    return vec_cntm(__to_intrin(__kv), 1);
  	  }
  	else if constexpr (sizeof(_Tp) >= sizeof(int))
  	  {
--- 124,137 ----
  
      // _S_popcount {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static int
!       _S_popcount(simd_mask<_Tp, _Abi> __k)
        {
  	const auto __kv = __as_vector(__k);
  	if constexpr (__have_power10vec)
  	  {
! 	    using _Intrin = __intrinsic_type16_t<make_unsigned_t<__int_for_sizeof_t<_Tp>>>;
! 	    return vec_cntm(reinterpret_cast<_Intrin>(__kv), 1);
  	  }
  	else if constexpr (sizeof(_Tp) >= sizeof(int))
  	  {
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd_scalar.h gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd_scalar.h
*** gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd_scalar.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd_scalar.h	Thu Jun 20 08:08:10 2024
*************** struct simd_abi::_Scalar
*** 74,80 ****
    template <typename _Tp>
      static constexpr bool _S_is_valid_v = _IsValid<_Tp>::value;
  
!   _GLIBCXX_SIMD_INTRINSIC static constexpr bool _S_masked(bool __x)
    { return __x; }
  
    using _CommonImpl = _CommonImplScalar;
--- 74,81 ----
    template <typename _Tp>
      static constexpr bool _S_is_valid_v = _IsValid<_Tp>::value;
  
!   _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!   _S_masked(bool __x)
    { return __x; }
  
    using _CommonImpl = _CommonImplScalar;
*************** struct _CommonImplScalar
*** 110,116 ****
  {
    // _S_store {{{
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static void _S_store(_Tp __x, void* __addr)
      { __builtin_memcpy(__addr, &__x, sizeof(_Tp)); }
  
    // }}}
--- 111,118 ----
  {
    // _S_store {{{
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static void
!     _S_store(_Tp __x, void* __addr)
      { __builtin_memcpy(__addr, &__x, sizeof(_Tp)); }
  
    // }}}
*************** struct _SimdImplScalar
*** 138,163 ****
  
    // _S_broadcast {{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp _S_broadcast(_Tp __x) noexcept
      { return __x; }
  
    // _S_generator {{{2
    template <typename _Fp, typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp _S_generator(_Fp&& __gen,
! 							      _TypeTag<_Tp>)
      { return __gen(_SizeConstant<0>()); }
  
    // _S_load {{{2
    template <typename _Tp, typename _Up>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_load(const _Up* __mem,
! 					       _TypeTag<_Tp>) noexcept
      { return static_cast<_Tp>(__mem[0]); }
  
    // _S_masked_load {{{2
    template <typename _Tp, typename _Up>
!     _GLIBCXX_SIMD_INTRINSIC
!     static _Tp _S_masked_load(_Tp __merge, bool __k,
! 				     const _Up* __mem) noexcept
      {
        if (__k)
  	__merge = static_cast<_Tp>(__mem[0]);
--- 140,165 ----
  
    // _S_broadcast {{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
!     _S_broadcast(_Tp __x) noexcept
      { return __x; }
  
    // _S_generator {{{2
    template <typename _Fp, typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
!     _S_generator(_Fp&& __gen, _TypeTag<_Tp>)
      { return __gen(_SizeConstant<0>()); }
  
    // _S_load {{{2
    template <typename _Tp, typename _Up>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
!     _S_load(const _Up* __mem, _TypeTag<_Tp>) noexcept
      { return static_cast<_Tp>(__mem[0]); }
  
    // _S_masked_load {{{2
    template <typename _Tp, typename _Up>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
!     _S_masked_load(_Tp __merge, bool __k, const _Up* __mem) noexcept
      {
        if (__k)
  	__merge = static_cast<_Tp>(__mem[0]);
*************** struct _SimdImplScalar
*** 166,262 ****
  
    // _S_store {{{2
    template <typename _Tp, typename _Up>
!     _GLIBCXX_SIMD_INTRINSIC
!     static void _S_store(_Tp __v, _Up* __mem, _TypeTag<_Tp>) noexcept
      { __mem[0] = static_cast<_Up>(__v); }
  
    // _S_masked_store {{{2
    template <typename _Tp, typename _Up>
!     _GLIBCXX_SIMD_INTRINSIC
!     static void _S_masked_store(const _Tp __v, _Up* __mem,
! 				       const bool __k) noexcept
      { if (__k) __mem[0] = __v; }
  
    // _S_negate {{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC
!     static constexpr bool _S_negate(_Tp __x) noexcept
      { return !__x; }
  
    // _S_reduce {{{2
    template <typename _Tp, typename _BinaryOperation>
!     _GLIBCXX_SIMD_INTRINSIC
!     static constexpr _Tp
      _S_reduce(const simd<_Tp, simd_abi::scalar>& __x, const _BinaryOperation&)
      { return __x._M_data; }
  
    // _S_min, _S_max {{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC
!     static constexpr _Tp _S_min(const _Tp __a, const _Tp __b)
      { return std::min(__a, __b); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC
!     static constexpr _Tp _S_max(const _Tp __a, const _Tp __b)
      { return std::max(__a, __b); }
  
    // _S_complement {{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC
!     static constexpr _Tp _S_complement(_Tp __x) noexcept
      { return static_cast<_Tp>(~__x); }
  
    // _S_unary_minus {{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC
!     static constexpr _Tp _S_unary_minus(_Tp __x) noexcept
      { return static_cast<_Tp>(-__x); }
  
    // arithmetic operators {{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC
!     static constexpr _Tp _S_plus(_Tp __x, _Tp __y)
      {
        return static_cast<_Tp>(__promote_preserving_unsigned(__x)
  			      + __promote_preserving_unsigned(__y));
      }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC
!     static constexpr _Tp _S_minus(_Tp __x, _Tp __y)
      {
        return static_cast<_Tp>(__promote_preserving_unsigned(__x)
  			      - __promote_preserving_unsigned(__y));
      }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC
!     static constexpr _Tp _S_multiplies(_Tp __x, _Tp __y)
      {
        return static_cast<_Tp>(__promote_preserving_unsigned(__x)
  			      * __promote_preserving_unsigned(__y));
      }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC
!     static constexpr _Tp _S_divides(_Tp __x, _Tp __y)
      {
        return static_cast<_Tp>(__promote_preserving_unsigned(__x)
  			      / __promote_preserving_unsigned(__y));
      }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC
!     static constexpr _Tp _S_modulus(_Tp __x, _Tp __y)
      {
        return static_cast<_Tp>(__promote_preserving_unsigned(__x)
  			      % __promote_preserving_unsigned(__y));
      }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC
!     static constexpr _Tp _S_bit_and(_Tp __x, _Tp __y)
      {
        if constexpr (is_floating_point_v<_Tp>)
  	{
--- 168,262 ----
  
    // _S_store {{{2
    template <typename _Tp, typename _Up>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr void
!     _S_store(_Tp __v, _Up* __mem, _TypeTag<_Tp>) noexcept
      { __mem[0] = static_cast<_Up>(__v); }
  
    // _S_masked_store {{{2
    template <typename _Tp, typename _Up>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr void
!     _S_masked_store(const _Tp __v, _Up* __mem, const bool __k) noexcept
      { if (__k) __mem[0] = __v; }
  
    // _S_negate {{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!     _S_negate(_Tp __x) noexcept
      { return !__x; }
  
    // _S_reduce {{{2
    template <typename _Tp, typename _BinaryOperation>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
      _S_reduce(const simd<_Tp, simd_abi::scalar>& __x, const _BinaryOperation&)
      { return __x._M_data; }
  
    // _S_min, _S_max {{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
!     _S_min(const _Tp __a, const _Tp __b)
      { return std::min(__a, __b); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
!     _S_max(const _Tp __a, const _Tp __b)
      { return std::max(__a, __b); }
  
    // _S_complement {{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
!     _S_complement(_Tp __x) noexcept
      { return static_cast<_Tp>(~__x); }
  
    // _S_unary_minus {{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
!     _S_unary_minus(_Tp __x) noexcept
      { return static_cast<_Tp>(-__x); }
  
    // arithmetic operators {{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
!     _S_plus(_Tp __x, _Tp __y)
      {
        return static_cast<_Tp>(__promote_preserving_unsigned(__x)
  			      + __promote_preserving_unsigned(__y));
      }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
!     _S_minus(_Tp __x, _Tp __y)
      {
        return static_cast<_Tp>(__promote_preserving_unsigned(__x)
  			      - __promote_preserving_unsigned(__y));
      }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
!     _S_multiplies(_Tp __x, _Tp __y)
      {
        return static_cast<_Tp>(__promote_preserving_unsigned(__x)
  			      * __promote_preserving_unsigned(__y));
      }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
!     _S_divides(_Tp __x, _Tp __y)
      {
        return static_cast<_Tp>(__promote_preserving_unsigned(__x)
  			      / __promote_preserving_unsigned(__y));
      }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
!     _S_modulus(_Tp __x, _Tp __y)
      {
        return static_cast<_Tp>(__promote_preserving_unsigned(__x)
  			      % __promote_preserving_unsigned(__y));
      }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
!     _S_bit_and(_Tp __x, _Tp __y)
      {
        if constexpr (is_floating_point_v<_Tp>)
  	{
*************** struct _SimdImplScalar
*** 269,276 ****
      }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC
!     static constexpr _Tp _S_bit_or(_Tp __x, _Tp __y)
      {
        if constexpr (is_floating_point_v<_Tp>)
  	{
--- 269,276 ----
      }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
!     _S_bit_or(_Tp __x, _Tp __y)
      {
        if constexpr (is_floating_point_v<_Tp>)
  	{
*************** struct _SimdImplScalar
*** 283,290 ****
      }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC
!     static constexpr _Tp _S_bit_xor(_Tp __x, _Tp __y)
      {
        if constexpr (is_floating_point_v<_Tp>)
  	{
--- 283,290 ----
      }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
!     _S_bit_xor(_Tp __x, _Tp __y)
      {
        if constexpr (is_floating_point_v<_Tp>)
  	{
*************** struct _SimdImplScalar
*** 297,309 ****
      }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC
!     static constexpr _Tp _S_bit_shift_left(_Tp __x, int __y)
      { return static_cast<_Tp>(__promote_preserving_unsigned(__x) << __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC
!     static constexpr _Tp _S_bit_shift_right(_Tp __x, int __y)
      { return static_cast<_Tp>(__promote_preserving_unsigned(__x) >> __y); }
  
    // math {{{2
--- 297,309 ----
      }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
!     _S_bit_shift_left(_Tp __x, int __y)
      { return static_cast<_Tp>(__promote_preserving_unsigned(__x) << __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
!     _S_bit_shift_right(_Tp __x, int __y)
      { return static_cast<_Tp>(__promote_preserving_unsigned(__x) >> __y); }
  
    // math {{{2
*************** struct _SimdImplScalar
*** 312,611 ****
      using _ST = _SimdTuple<_Tp, simd_abi::scalar>;
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_acos(_Tp __x)
      { return std::acos(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_asin(_Tp __x)
      { return std::asin(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_atan(_Tp __x)
      { return std::atan(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_cos(_Tp __x)
      { return std::cos(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_sin(_Tp __x)
      { return std::sin(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_tan(_Tp __x)
      { return std::tan(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_acosh(_Tp __x)
      { return std::acosh(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_asinh(_Tp __x)
      { return std::asinh(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_atanh(_Tp __x)
      { return std::atanh(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_cosh(_Tp __x)
      { return std::cosh(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_sinh(_Tp __x)
      { return std::sinh(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_tanh(_Tp __x)
      { return std::tanh(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_atan2(_Tp __x, _Tp __y)
      { return std::atan2(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_exp(_Tp __x)
      { return std::exp(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_exp2(_Tp __x)
      { return std::exp2(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_expm1(_Tp __x)
      { return std::expm1(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_log(_Tp __x)
      { return std::log(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_log10(_Tp __x)
      { return std::log10(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_log1p(_Tp __x)
      { return std::log1p(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_log2(_Tp __x)
      { return std::log2(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_logb(_Tp __x)
      { return std::logb(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _ST<int> _S_ilogb(_Tp __x)
      { return {std::ilogb(__x)}; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_pow(_Tp __x, _Tp __y)
      { return std::pow(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_abs(_Tp __x)
      { return std::abs(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_fabs(_Tp __x)
      { return std::fabs(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_sqrt(_Tp __x)
      { return std::sqrt(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_cbrt(_Tp __x)
      { return std::cbrt(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_erf(_Tp __x)
      { return std::erf(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_erfc(_Tp __x)
      { return std::erfc(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_lgamma(_Tp __x)
      { return std::lgamma(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_tgamma(_Tp __x)
      { return std::tgamma(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_trunc(_Tp __x)
      { return std::trunc(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_floor(_Tp __x)
      { return std::floor(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_ceil(_Tp __x)
      { return std::ceil(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_nearbyint(_Tp __x)
      { return std::nearbyint(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_rint(_Tp __x)
      { return std::rint(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _ST<long> _S_lrint(_Tp __x)
      { return {std::lrint(__x)}; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _ST<long long> _S_llrint(_Tp __x)
      { return {std::llrint(__x)}; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_round(_Tp __x)
      { return std::round(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _ST<long> _S_lround(_Tp __x)
      { return {std::lround(__x)}; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _ST<long long> _S_llround(_Tp __x)
      { return {std::llround(__x)}; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_ldexp(_Tp __x, _ST<int> __y)
      { return std::ldexp(__x, __y.first); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_scalbn(_Tp __x, _ST<int> __y)
      { return std::scalbn(__x, __y.first); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_scalbln(_Tp __x, _ST<long> __y)
      { return std::scalbln(__x, __y.first); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_fmod(_Tp __x, _Tp __y)
      { return std::fmod(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_remainder(_Tp __x, _Tp __y)
      { return std::remainder(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_nextafter(_Tp __x, _Tp __y)
      { return std::nextafter(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_fdim(_Tp __x, _Tp __y)
      { return std::fdim(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_fmax(_Tp __x, _Tp __y)
      { return std::fmax(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_fmin(_Tp __x, _Tp __y)
      { return std::fmin(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_fma(_Tp __x, _Tp __y, _Tp __z)
      { return std::fma(__x, __y, __z); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_remquo(_Tp __x, _Tp __y, _ST<int>* __z)
      { return std::remquo(__x, __y, &__z->first); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static _ST<int> _S_fpclassify(_Tp __x)
      { return {std::fpclassify(__x)}; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool _S_isfinite(_Tp __x)
      { return std::isfinite(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool _S_isinf(_Tp __x)
      { return std::isinf(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool _S_isnan(_Tp __x)
      { return std::isnan(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool _S_isnormal(_Tp __x)
      { return std::isnormal(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool _S_signbit(_Tp __x)
      { return std::signbit(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool _S_isgreater(_Tp __x, _Tp __y)
      { return std::isgreater(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool _S_isgreaterequal(_Tp __x,
! 								    _Tp __y)
      { return std::isgreaterequal(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool _S_isless(_Tp __x, _Tp __y)
      { return std::isless(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool _S_islessequal(_Tp __x, _Tp __y)
      { return std::islessequal(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool _S_islessgreater(_Tp __x,
! 								   _Tp __y)
      { return std::islessgreater(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool _S_isunordered(_Tp __x,
! 								 _Tp __y)
      { return std::isunordered(__x, __y); }
  
    // _S_increment & _S_decrement{{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC
!     constexpr static void _S_increment(_Tp& __x)
      { ++__x; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC
!     constexpr static void _S_decrement(_Tp& __x)
      { --__x; }
  
  
    // compares {{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool _S_equal_to(_Tp __x, _Tp __y)
      { return __x == __y; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool _S_not_equal_to(_Tp __x,
! 								  _Tp __y)
      { return __x != __y; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool _S_less(_Tp __x, _Tp __y)
      { return __x < __y; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool _S_less_equal(_Tp __x,
! 								_Tp __y)
      { return __x <= __y; }
  
    // smart_reference access {{{2
    template <typename _Tp, typename _Up>
!     _GLIBCXX_SIMD_INTRINSIC
!     constexpr static void _S_set(_Tp& __v, [[maybe_unused]] int __i,
! 				 _Up&& __x) noexcept
      {
        _GLIBCXX_DEBUG_ASSERT(__i == 0);
        __v = static_cast<_Up&&>(__x);
--- 312,673 ----
      using _ST = _SimdTuple<_Tp, simd_abi::scalar>;
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_acos(_Tp __x)
      { return std::acos(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_asin(_Tp __x)
      { return std::asin(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_atan(_Tp __x)
      { return std::atan(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_cos(_Tp __x)
      { return std::cos(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_sin(_Tp __x)
      { return std::sin(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_tan(_Tp __x)
      { return std::tan(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_acosh(_Tp __x)
      { return std::acosh(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_asinh(_Tp __x)
      { return std::asinh(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_atanh(_Tp __x)
      { return std::atanh(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_cosh(_Tp __x)
      { return std::cosh(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_sinh(_Tp __x)
      { return std::sinh(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_tanh(_Tp __x)
      { return std::tanh(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_atan2(_Tp __x, _Tp __y)
      { return std::atan2(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_exp(_Tp __x)
      { return std::exp(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_exp2(_Tp __x)
      { return std::exp2(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_expm1(_Tp __x)
      { return std::expm1(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_log(_Tp __x)
      { return std::log(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_log10(_Tp __x)
      { return std::log10(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_log1p(_Tp __x)
      { return std::log1p(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_log2(_Tp __x)
      { return std::log2(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_logb(_Tp __x)
      { return std::logb(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _ST<int>
!     _S_ilogb(_Tp __x)
      { return {std::ilogb(__x)}; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_pow(_Tp __x, _Tp __y)
      { return std::pow(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_abs(_Tp __x)
      { return std::abs(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_fabs(_Tp __x)
      { return std::fabs(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_sqrt(_Tp __x)
      { return std::sqrt(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_cbrt(_Tp __x)
      { return std::cbrt(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_erf(_Tp __x)
      { return std::erf(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_erfc(_Tp __x)
      { return std::erfc(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_lgamma(_Tp __x)
      { return std::lgamma(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_tgamma(_Tp __x)
      { return std::tgamma(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_trunc(_Tp __x)
      { return std::trunc(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_floor(_Tp __x)
      { return std::floor(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_ceil(_Tp __x)
      { return std::ceil(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_nearbyint(_Tp __x)
      { return std::nearbyint(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_rint(_Tp __x)
      { return std::rint(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _ST<long>
!     _S_lrint(_Tp __x)
      { return {std::lrint(__x)}; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _ST<long long>
!     _S_llrint(_Tp __x)
      { return {std::llrint(__x)}; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_round(_Tp __x)
      { return std::round(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _ST<long>
!     _S_lround(_Tp __x)
      { return {std::lround(__x)}; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _ST<long long>
!     _S_llround(_Tp __x)
      { return {std::llround(__x)}; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_ldexp(_Tp __x, _ST<int> __y)
      { return std::ldexp(__x, __y.first); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_scalbn(_Tp __x, _ST<int> __y)
      { return std::scalbn(__x, __y.first); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_scalbln(_Tp __x, _ST<long> __y)
      { return std::scalbln(__x, __y.first); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_fmod(_Tp __x, _Tp __y)
      { return std::fmod(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_remainder(_Tp __x, _Tp __y)
      { return std::remainder(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_nextafter(_Tp __x, _Tp __y)
      { return std::nextafter(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_fdim(_Tp __x, _Tp __y)
      { return std::fdim(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_fmax(_Tp __x, _Tp __y)
      { return std::fmax(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_fmin(_Tp __x, _Tp __y)
      { return std::fmin(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_fma(_Tp __x, _Tp __y, _Tp __z)
      { return std::fma(__x, __y, __z); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_remquo(_Tp __x, _Tp __y, _ST<int>* __z)
      { return std::remquo(__x, __y, &__z->first); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _ST<int>
!     _S_fpclassify(_Tp __x)
      { return {std::fpclassify(__x)}; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!     _S_isfinite(_Tp __x)
      { return std::isfinite(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!     _S_isinf(_Tp __x)
      { return std::isinf(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!     _S_isnan(_Tp __x)
      { return std::isnan(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!     _S_isnormal(_Tp __x)
      { return std::isnormal(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!     _S_signbit(_Tp __x)
      { return std::signbit(__x); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!     _S_isgreater(_Tp __x, _Tp __y)
      { return std::isgreater(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!     _S_isgreaterequal(_Tp __x, _Tp __y)
      { return std::isgreaterequal(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!     _S_isless(_Tp __x, _Tp __y)
      { return std::isless(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!     _S_islessequal(_Tp __x, _Tp __y)
      { return std::islessequal(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!     _S_islessgreater(_Tp __x, _Tp __y)
      { return std::islessgreater(__x, __y); }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!     _S_isunordered(_Tp __x, _Tp __y)
      { return std::isunordered(__x, __y); }
  
    // _S_increment & _S_decrement{{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr void
!     _S_increment(_Tp& __x)
      { ++__x; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr void
!     _S_decrement(_Tp& __x)
      { --__x; }
  
  
    // compares {{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!     _S_equal_to(_Tp __x, _Tp __y)
      { return __x == __y; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!     _S_not_equal_to(_Tp __x, _Tp __y)
      { return __x != __y; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!     _S_less(_Tp __x, _Tp __y)
      { return __x < __y; }
  
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!     _S_less_equal(_Tp __x, _Tp __y)
      { return __x <= __y; }
  
    // smart_reference access {{{2
    template <typename _Tp, typename _Up>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr void
!     _S_set(_Tp& __v, [[maybe_unused]] int __i, _Up&& __x) noexcept
      {
        _GLIBCXX_DEBUG_ASSERT(__i == 0);
        __v = static_cast<_Up&&>(__x);
*************** struct _SimdImplScalar
*** 613,632 ****
  
    // _S_masked_assign {{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static void
      _S_masked_assign(bool __k, _Tp& __lhs, _Tp __rhs)
      { if (__k) __lhs = __rhs; }
  
    // _S_masked_cassign {{{2
    template <typename _Op, typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static void
      _S_masked_cassign(const bool __k, _Tp& __lhs, const _Tp __rhs, _Op __op)
      { if (__k) __lhs = __op(_SimdImplScalar{}, __lhs, __rhs); }
  
    // _S_masked_unary {{{2
    template <template <typename> class _Op, typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static _Tp _S_masked_unary(const bool __k,
! 								 const _Tp __v)
      { return static_cast<_Tp>(__k ? _Op<_Tp>{}(__v) : __v); }
  
    // }}}2
--- 675,694 ----
  
    // _S_masked_assign {{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr void
      _S_masked_assign(bool __k, _Tp& __lhs, _Tp __rhs)
      { if (__k) __lhs = __rhs; }
  
    // _S_masked_cassign {{{2
    template <typename _Op, typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr void
      _S_masked_cassign(const bool __k, _Tp& __lhs, const _Tp __rhs, _Op __op)
      { if (__k) __lhs = __op(_SimdImplScalar{}, __lhs, __rhs); }
  
    // _S_masked_unary {{{2
    template <template <typename> class _Op, typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr _Tp
!     _S_masked_unary(const bool __k, const _Tp __v)
      { return static_cast<_Tp>(__k ? _Op<_Tp>{}(__v) : __v); }
  
    // }}}2
*************** struct _MaskImplScalar
*** 643,655 ****
    // }}}
    // _S_broadcast {{{
    template <typename>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool _S_broadcast(bool __x)
      { return __x; }
  
    // }}}
    // _S_load {{{
    template <typename>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool _S_load(const bool* __mem)
      { return __mem[0]; }
  
    // }}}
--- 705,719 ----
    // }}}
    // _S_broadcast {{{
    template <typename>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!     _S_broadcast(bool __x)
      { return __x; }
  
    // }}}
    // _S_load {{{
    template <typename>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!     _S_load(const bool* __mem)
      { return __mem[0]; }
  
    // }}}
*************** struct _MaskImplScalar
*** 673,684 ****
    // }}}
    // _S_from_bitmask {{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool
      _S_from_bitmask(_SanitizedBitMask<1> __bits, _TypeTag<_Tp>) noexcept
      { return __bits[0]; }
  
    // _S_masked_load {{{2
!   _GLIBCXX_SIMD_INTRINSIC constexpr static bool
    _S_masked_load(bool __merge, bool __mask, const bool* __mem) noexcept
    {
      if (__mask)
--- 737,748 ----
    // }}}
    // _S_from_bitmask {{{2
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
      _S_from_bitmask(_SanitizedBitMask<1> __bits, _TypeTag<_Tp>) noexcept
      { return __bits[0]; }
  
    // _S_masked_load {{{2
!   _GLIBCXX_SIMD_INTRINSIC static constexpr bool
    _S_masked_load(bool __merge, bool __mask, const bool* __mem) noexcept
    {
      if (__mask)
*************** struct _MaskImplScalar
*** 687,697 ****
    }
  
    // _S_store {{{2
!   _GLIBCXX_SIMD_INTRINSIC static void _S_store(bool __v, bool* __mem) noexcept
    { __mem[0] = __v; }
  
    // _S_masked_store {{{2
!   _GLIBCXX_SIMD_INTRINSIC static void
    _S_masked_store(const bool __v, bool* __mem, const bool __k) noexcept
    {
      if (__k)
--- 751,762 ----
    }
  
    // _S_store {{{2
!   _GLIBCXX_SIMD_INTRINSIC static constexpr void
!   _S_store(bool __v, bool* __mem) noexcept
    { __mem[0] = __v; }
  
    // _S_masked_store {{{2
!   _GLIBCXX_SIMD_INTRINSIC static constexpr void
    _S_masked_store(const bool __v, bool* __mem, const bool __k) noexcept
    {
      if (__k)
*************** struct _MaskImplScalar
*** 699,740 ****
    }
  
    // logical and bitwise operators {{{2
!   _GLIBCXX_SIMD_INTRINSIC
!   static constexpr bool _S_logical_and(bool __x, bool __y)
    { return __x && __y; }
  
!   _GLIBCXX_SIMD_INTRINSIC
!   static constexpr bool _S_logical_or(bool __x, bool __y)
    { return __x || __y; }
  
!   _GLIBCXX_SIMD_INTRINSIC
!   static constexpr bool _S_bit_not(bool __x)
    { return !__x; }
  
!   _GLIBCXX_SIMD_INTRINSIC
!   static constexpr bool _S_bit_and(bool __x, bool __y)
    { return __x && __y; }
  
!   _GLIBCXX_SIMD_INTRINSIC
!   static constexpr bool _S_bit_or(bool __x, bool __y)
    { return __x || __y; }
  
!   _GLIBCXX_SIMD_INTRINSIC
!   static constexpr bool _S_bit_xor(bool __x, bool __y)
    { return __x != __y; }
  
    // smart_reference access {{{2
!   _GLIBCXX_SIMD_INTRINSIC
!   constexpr static void _S_set(bool& __k, [[maybe_unused]] int __i,
! 			       bool __x) noexcept
    {
      _GLIBCXX_DEBUG_ASSERT(__i == 0);
      __k = __x;
    }
  
    // _S_masked_assign {{{2
!   _GLIBCXX_SIMD_INTRINSIC static void _S_masked_assign(bool __k, bool& __lhs,
! 						       bool __rhs)
    {
      if (__k)
        __lhs = __rhs;
--- 764,804 ----
    }
  
    // logical and bitwise operators {{{2
!   _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!   _S_logical_and(bool __x, bool __y)
    { return __x && __y; }
  
!   _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!   _S_logical_or(bool __x, bool __y)
    { return __x || __y; }
  
!   _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!   _S_bit_not(bool __x)
    { return !__x; }
  
!   _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!   _S_bit_and(bool __x, bool __y)
    { return __x && __y; }
  
!   _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!   _S_bit_or(bool __x, bool __y)
    { return __x || __y; }
  
!   _GLIBCXX_SIMD_INTRINSIC static constexpr bool
!   _S_bit_xor(bool __x, bool __y)
    { return __x != __y; }
  
    // smart_reference access {{{2
!   _GLIBCXX_SIMD_INTRINSIC static constexpr void
!   _S_set(bool& __k, [[maybe_unused]] int __i, bool __x) noexcept
    {
      _GLIBCXX_DEBUG_ASSERT(__i == 0);
      __k = __x;
    }
  
    // _S_masked_assign {{{2
!   _GLIBCXX_SIMD_INTRINSIC static constexpr void
!   _S_masked_assign(bool __k, bool& __lhs, bool __rhs)
    {
      if (__k)
        __lhs = __rhs;
*************** struct _MaskImplScalar
*** 743,791 ****
    // }}}2
    // _S_all_of {{{
    template <typename _Tp, typename _Abi>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool
      _S_all_of(simd_mask<_Tp, _Abi> __k)
      { return __k._M_data; }
  
    // }}}
    // _S_any_of {{{
    template <typename _Tp, typename _Abi>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool
      _S_any_of(simd_mask<_Tp, _Abi> __k)
      { return __k._M_data; }
  
    // }}}
    // _S_none_of {{{
    template <typename _Tp, typename _Abi>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool
      _S_none_of(simd_mask<_Tp, _Abi> __k)
      { return !__k._M_data; }
  
    // }}}
    // _S_some_of {{{
    template <typename _Tp, typename _Abi>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static bool
      _S_some_of(simd_mask<_Tp, _Abi>)
      { return false; }
  
    // }}}
    // _S_popcount {{{
    template <typename _Tp, typename _Abi>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static int
      _S_popcount(simd_mask<_Tp, _Abi> __k)
      { return __k._M_data; }
  
    // }}}
    // _S_find_first_set {{{
    template <typename _Tp, typename _Abi>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static int
      _S_find_first_set(simd_mask<_Tp, _Abi>)
      { return 0; }
  
    // }}}
    // _S_find_last_set {{{
    template <typename _Tp, typename _Abi>
!     _GLIBCXX_SIMD_INTRINSIC constexpr static int
      _S_find_last_set(simd_mask<_Tp, _Abi>)
      { return 0; }
  
--- 807,855 ----
    // }}}2
    // _S_all_of {{{
    template <typename _Tp, typename _Abi>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
      _S_all_of(simd_mask<_Tp, _Abi> __k)
      { return __k._M_data; }
  
    // }}}
    // _S_any_of {{{
    template <typename _Tp, typename _Abi>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
      _S_any_of(simd_mask<_Tp, _Abi> __k)
      { return __k._M_data; }
  
    // }}}
    // _S_none_of {{{
    template <typename _Tp, typename _Abi>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
      _S_none_of(simd_mask<_Tp, _Abi> __k)
      { return !__k._M_data; }
  
    // }}}
    // _S_some_of {{{
    template <typename _Tp, typename _Abi>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr bool
      _S_some_of(simd_mask<_Tp, _Abi>)
      { return false; }
  
    // }}}
    // _S_popcount {{{
    template <typename _Tp, typename _Abi>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr int
      _S_popcount(simd_mask<_Tp, _Abi> __k)
      { return __k._M_data; }
  
    // }}}
    // _S_find_first_set {{{
    template <typename _Tp, typename _Abi>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr int
      _S_find_first_set(simd_mask<_Tp, _Abi>)
      { return 0; }
  
    // }}}
    // _S_find_last_set {{{
    template <typename _Tp, typename _Abi>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr int
      _S_find_last_set(simd_mask<_Tp, _Abi>)
      { return 0; }
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd_x86.h gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd_x86.h
*** gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd_x86.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd_x86.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_SIMD_BEGIN_NAMESPACE
*** 40,49 ****
  template <typename _Tp, size_t _Np>
    _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper<__int_for_sizeof_t<_Tp>, _Np>
    __to_masktype(_SimdWrapper<_Tp, _Np> __x)
!   {
!     return reinterpret_cast<__vector_type_t<__int_for_sizeof_t<_Tp>, _Np>>(
!       __x._M_data);
!   }
  
  template <typename _TV,
  	  typename _TVT
--- 40,46 ----
  template <typename _Tp, size_t _Np>
    _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper<__int_for_sizeof_t<_Tp>, _Np>
    __to_masktype(_SimdWrapper<_Tp, _Np> __x)
!   { return reinterpret_cast<__vector_type_t<__int_for_sizeof_t<_Tp>, _Np>>(__x._M_data); }
  
  template <typename _TV,
  	  typename _TVT
*************** template <typename _Tp>
*** 366,371 ****
--- 363,415 ----
  
  // }}}
  
+ #ifdef __clang__
+ template <size_t _Np, typename _Tp, typename _Kp>
+   _GLIBCXX_SIMD_INTRINSIC constexpr auto
+   __movm(_Kp __k) noexcept
+   {
+     static_assert(is_unsigned_v<_Kp>);
+     if constexpr (sizeof(_Tp) == 1 && __have_avx512bw)
+       {
+ 	if constexpr (_Np <= 16 && __have_avx512vl)
+ 	  return __builtin_ia32_cvtmask2b128(__k);
+ 	else if constexpr (_Np <= 32 && __have_avx512vl)
+ 	  return __builtin_ia32_cvtmask2b256(__k);
+ 	else
+ 	  return __builtin_ia32_cvtmask2b512(__k);
+       }
+     else if constexpr (sizeof(_Tp) == 2 && __have_avx512bw)
+       {
+ 	if constexpr (_Np <= 8 && __have_avx512vl)
+ 	  return __builtin_ia32_cvtmask2w128(__k);
+ 	else if constexpr (_Np <= 16 && __have_avx512vl)
+ 	  return __builtin_ia32_cvtmask2w256(__k);
+ 	else
+ 	  return __builtin_ia32_cvtmask2w512(__k);
+       }
+     else if constexpr (sizeof(_Tp) == 4 && __have_avx512dq)
+       {
+ 	if constexpr (_Np <= 4 && __have_avx512vl)
+ 	  return __builtin_ia32_cvtmask2d128(__k);
+ 	else if constexpr (_Np <= 8 && __have_avx512vl)
+ 	  return __builtin_ia32_cvtmask2d256(__k);
+ 	else
+ 	  return __builtin_ia32_cvtmask2d512(__k);
+       }
+     else if constexpr (sizeof(_Tp) == 8 && __have_avx512dq)
+       {
+ 	if constexpr (_Np <= 2 && __have_avx512vl)
+ 	  return __builtin_ia32_cvtmask2q128(__k);
+ 	else if constexpr (_Np <= 4 && __have_avx512vl)
+ 	  return __builtin_ia32_cvtmask2q256(__k);
+ 	else
+ 	  return __builtin_ia32_cvtmask2q512(__k);
+       }
+     else
+       __assert_unreachable<_Tp>();
+   }
+ #endif // __clang__
+ 
  #ifdef _GLIBCXX_SIMD_WORKAROUND_PR85048
  #include "simd_x86_conversions.h"
  #endif
*************** struct _CommonImplX86 : _CommonImplBuilt
*** 434,440 ****
  #ifdef _GLIBCXX_SIMD_WORKAROUND_PR85048
    // _S_converts_via_decomposition {{{
    template <typename _From, typename _To, size_t _ToSize>
!     static constexpr bool _S_converts_via_decomposition()
      {
        if constexpr (is_integral_v<
  		      _From> && is_integral_v<_To> && sizeof(_From) == 8
--- 478,485 ----
  #ifdef _GLIBCXX_SIMD_WORKAROUND_PR85048
    // _S_converts_via_decomposition {{{
    template <typename _From, typename _To, size_t _ToSize>
!     static constexpr bool
!     _S_converts_via_decomposition()
      {
        if constexpr (is_integral_v<
  		      _From> && is_integral_v<_To> && sizeof(_From) == 8
*************** struct _CommonImplX86 : _CommonImplBuilt
*** 465,476 ****
    using _CommonImplBuiltin::_S_store;
  
    template <typename _Tp, size_t _Np>
!     _GLIBCXX_SIMD_INTRINSIC static void _S_store(_SimdWrapper<_Tp, _Np> __x,
! 						 void* __addr)
      {
        constexpr size_t _Bytes = _Np * sizeof(_Tp);
  
!       if constexpr ((_Bytes & (_Bytes - 1)) != 0 && __have_avx512bw_vl)
  	{
  	  const auto __v = __to_intrin(__x);
  
--- 510,523 ----
    using _CommonImplBuiltin::_S_store;
  
    template <typename _Tp, size_t _Np>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr void
!     _S_store(_SimdWrapper<_Tp, _Np> __x, void* __addr)
      {
        constexpr size_t _Bytes = _Np * sizeof(_Tp);
  
!       if (__builtin_is_constant_evaluated())
! 	_CommonImplBuiltin::_S_store(__x, __addr);
!       else if constexpr ((_Bytes & (_Bytes - 1)) != 0 && __have_avx512bw_vl)
  	{
  	  const auto __v = __to_intrin(__x);
  
*************** struct _CommonImplX86 : _CommonImplBuilt
*** 536,552 ****
      _GLIBCXX_SIMD_INTRINSIC static constexpr void
      _S_store_bool_array(const _BitMask<_Np, _Sanitized> __x, bool* __mem)
      {
!       if constexpr (__have_avx512bw_vl) // don't care for BW w/o VL
! 	_S_store<_Np>(1 & __vector_bitcast<_UChar, _Np>([=]() constexpr {
! 			if constexpr (_Np <= 16)
! 			  return _mm_movm_epi8(__x._M_to_bits());
! 			else if constexpr (_Np <= 32)
! 			  return _mm256_movm_epi8(__x._M_to_bits());
! 			else if constexpr (_Np <= 64)
! 			  return _mm512_movm_epi8(__x._M_to_bits());
! 			else
! 			  __assert_unreachable<_SizeConstant<_Np>>();
! 		      }()),
  		      __mem);
        else if constexpr (__have_bmi2)
  	{
--- 583,602 ----
      _GLIBCXX_SIMD_INTRINSIC static constexpr void
      _S_store_bool_array(const _BitMask<_Np, _Sanitized> __x, bool* __mem)
      {
!       if (__builtin_is_constant_evaluated())
! 	_CommonImplBuiltin::_S_store_bool_array(__x, __mem);
!       else if constexpr (__have_avx512bw_vl) // don't care for BW w/o VL
! 	_S_store<_Np>(1 & __vector_bitcast<_UChar, _Np>(
! 			    [=]() constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			      if constexpr (_Np <= 16)
! 				return _mm_movm_epi8(__x._M_to_bits());
! 			      else if constexpr (_Np <= 32)
! 				return _mm256_movm_epi8(__x._M_to_bits());
! 			      else if constexpr (_Np <= 64)
! 				return _mm512_movm_epi8(__x._M_to_bits());
! 			      else
! 				__assert_unreachable<_SizeConstant<_Np>>();
! 			    }()),
  		      __mem);
        else if constexpr (__have_bmi2)
  	{
*************** struct _CommonImplX86 : _CommonImplBuilt
*** 554,560 ****
  	    _S_store<_Np>(_pdep_u32(__x._M_to_bits(), 0x01010101U), __mem);
  	  else
  	    __execute_n_times<__div_roundup(_Np, sizeof(size_t))>(
! 	      [&](auto __i) {
  		constexpr size_t __offset = __i * sizeof(size_t);
  		constexpr int __todo = std::min(sizeof(size_t), _Np - __offset);
  		if constexpr (__todo == 1)
--- 604,610 ----
  	    _S_store<_Np>(_pdep_u32(__x._M_to_bits(), 0x01010101U), __mem);
  	  else
  	    __execute_n_times<__div_roundup(_Np, sizeof(size_t))>(
! 	      [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  		constexpr size_t __offset = __i * sizeof(size_t);
  		constexpr int __todo = std::min(sizeof(size_t), _Np - __offset);
  		if constexpr (__todo == 1)
*************** struct _CommonImplX86 : _CommonImplBuilt
*** 575,581 ****
  	      });
  	}
        else if constexpr (__have_sse2 && _Np > 7)
! 	__execute_n_times<__div_roundup(_Np, 16)>([&](auto __i) {
  	  constexpr int __offset = __i * 16;
  	  constexpr int __todo = std::min(16, int(_Np) - __offset);
  	  const int __bits = __x.template _M_extract<__offset>()._M_to_bits();
--- 625,631 ----
  	      });
  	}
        else if constexpr (__have_sse2 && _Np > 7)
! 	__execute_n_times<__div_roundup(_Np, 16)>([&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	  constexpr int __offset = __i * 16;
  	  constexpr int __todo = std::min(16, int(_Np) - __offset);
  	  const int __bits = __x.template _M_extract<__offset>()._M_to_bits();
*************** struct _CommonImplX86 : _CommonImplBuilt
*** 620,633 ****
      _GLIBCXX_SIMD_INTRINSIC static _TV
      _S_blend_avx512(const _Kp __k, const _TV __a, const _TV __b) noexcept
      {
- #ifdef __clang__
-       // FIXME: this does a boolean choice, not a blend
-       return __k ? __a : __b;
- #else
        static_assert(__is_vector_type_v<_TV>);
        using _Tp = typename _VectorTraits<_TV>::value_type;
        static_assert(sizeof(_TV) >= 16);
        static_assert(sizeof(_Tp) <= 8);
        using _IntT
  	= conditional_t<(sizeof(_Tp) > 2),
  			conditional_t<sizeof(_Tp) == 4, int, long long>,
--- 670,682 ----
      _GLIBCXX_SIMD_INTRINSIC static _TV
      _S_blend_avx512(const _Kp __k, const _TV __a, const _TV __b) noexcept
      {
        static_assert(__is_vector_type_v<_TV>);
        using _Tp = typename _VectorTraits<_TV>::value_type;
        static_assert(sizeof(_TV) >= 16);
        static_assert(sizeof(_Tp) <= 8);
+ #ifdef __clang__
+       return __movm<_VectorTraits<_TV>::_S_full_size, _Tp>(__k) ? __b : __a;
+ #else
        using _IntT
  	= conditional_t<(sizeof(_Tp) > 2),
  			conditional_t<sizeof(_Tp) == 4, int, long long>,
*************** struct _CommonImplX86 : _CommonImplBuilt
*** 701,708 ****
    // Requires: _Tp to be an intrinsic type (integers blend per byte) and 16/32
    //           Bytes wide
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp _S_blend_intrin(_Tp __k, _Tp __a,
! 						       _Tp __b) noexcept
      {
        static_assert(is_same_v<decltype(__to_intrin(__a)), _Tp>);
        constexpr struct
--- 750,757 ----
    // Requires: _Tp to be an intrinsic type (integers blend per byte) and 16/32
    //           Bytes wide
    template <typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static _Tp
!     _S_blend_intrin(_Tp __k, _Tp __a, _Tp __b) noexcept
      {
        static_assert(is_same_v<decltype(__to_intrin(__a)), _Tp>);
        constexpr struct
*************** struct _CommonImplX86 : _CommonImplBuilt
*** 765,773 ****
        static_assert(is_same_v<_Tp, _Tp> && __have_avx512f);
        if (__k._M_is_constprop() && __at0._M_is_constprop()
  	  && __at1._M_is_constprop())
! 	return __generate_from_n_evaluations<_Np,
! 					     __vector_type_t<_Tp, _Np>>([&](
! 	  auto __i) constexpr { return __k[__i] ? __at1[__i] : __at0[__i]; });
        else if constexpr (sizeof(__at0) == 64
  			 || (__have_avx512vl && sizeof(__at0) >= 16))
  	return _S_blend_avx512(__k._M_data, __at0._M_data, __at1._M_data);
--- 814,823 ----
        static_assert(is_same_v<_Tp, _Tp> && __have_avx512f);
        if (__k._M_is_constprop() && __at0._M_is_constprop()
  	  && __at1._M_is_constprop())
! 	return __generate_from_n_evaluations<_Np, __vector_type_t<_Tp, _Np>>(
! 		 [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   return __k[__i] ? __at1[__i] : __at0[__i];
! 		 });
        else if constexpr (sizeof(__at0) == 64
  			 || (__have_avx512vl && sizeof(__at0) >= 16))
  	return _S_blend_avx512(__k._M_data, __at0._M_data, __at1._M_data);
*************** template <typename _Abi, typename>
*** 841,846 ****
--- 891,897 ----
  	= (sizeof(_Tp) >= 4 && __have_avx512f) || __have_avx512bw  ? 64
  	  : (is_floating_point_v<_Tp>&& __have_avx) || __have_avx2 ? 32
  								   : 16;
+ 
      using _MaskImpl = typename _Abi::_MaskImpl;
  
      // _S_masked_load {{{
*************** template <typename _Abi, typename>
*** 994,1002 ****
  	      }
  	    else
  	      _BitOps::_S_bit_iteration(_MaskImpl::_S_to_bits(__k),
! 					[&](auto __i) {
! 					  __merge._M_set(__i, static_cast<_Tp>(
! 								__mem[__i]));
  					});
  	  }
  	/* Very uncertain, that the following improves anything. Needs
--- 1045,1052 ----
  	      }
  	    else
  	      _BitOps::_S_bit_iteration(_MaskImpl::_S_to_bits(__k),
! 					[&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 					  __merge._M_set(__i, static_cast<_Tp>(__mem[__i]));
  					});
  	  }
  	/* Very uncertain, that the following improves anything. Needs
*************** template <typename _Abi, typename>
*** 1032,1039 ****
      // _S_masked_store_nocvt {{{
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static void
!       _S_masked_store_nocvt(_SimdWrapper<_Tp, _Np> __v, _Tp* __mem,
! 			    _SimdWrapper<bool, _Np> __k)
        {
  	[[maybe_unused]] const auto __vi = __to_intrin(__v);
  	if constexpr (sizeof(__vi) == 64)
--- 1082,1088 ----
      // _S_masked_store_nocvt {{{
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static void
!       _S_masked_store_nocvt(_SimdWrapper<_Tp, _Np> __v, _Tp* __mem, _SimdWrapper<bool, _Np> __k)
        {
  	[[maybe_unused]] const auto __vi = __to_intrin(__v);
  	if constexpr (sizeof(__vi) == 64)
*************** template <typename _Abi, typename>
*** 1057,1087 ****
  		else
  		  _mm512_mask_storeu_pd(__mem, __k, __vi);
  	      }
- #if 0 // with KNL either sizeof(_Tp) >= 4 or sizeof(_vi) <= 32
-       // with Skylake-AVX512, __have_avx512bw is true
- 	  else if constexpr (__have_sse2)
- 	    {
- 	      using _M   = __vector_type_t<_Tp, _Np>;
- 	      using _MVT = _VectorTraits<_M>;
- 	      _mm_maskmoveu_si128(__auto_bitcast(__extract<0, 4>(__v._M_data)),
- 				  __auto_bitcast(_MaskImpl::template _S_convert<_Tp, _Np>(__k._M_data)),
- 				  reinterpret_cast<char*>(__mem));
- 	      _mm_maskmoveu_si128(__auto_bitcast(__extract<1, 4>(__v._M_data)),
- 				  __auto_bitcast(_MaskImpl::template _S_convert<_Tp, _Np>(
- 				    __k._M_data >> 1 * _MVT::_S_full_size)),
- 				  reinterpret_cast<char*>(__mem) + 1 * 16);
- 	      _mm_maskmoveu_si128(__auto_bitcast(__extract<2, 4>(__v._M_data)),
- 				  __auto_bitcast(_MaskImpl::template _S_convert<_Tp, _Np>(
- 				    __k._M_data >> 2 * _MVT::_S_full_size)),
- 				  reinterpret_cast<char*>(__mem) + 2 * 16);
- 	      if constexpr (_Np > 48 / sizeof(_Tp))
- 		_mm_maskmoveu_si128(
- 		  __auto_bitcast(__extract<3, 4>(__v._M_data)),
- 		  __auto_bitcast(_MaskImpl::template _S_convert<_Tp, _Np>(
- 		    __k._M_data >> 3 * _MVT::_S_full_size)),
- 		  reinterpret_cast<char*>(__mem) + 3 * 16);
- 	    }
- #endif
  	    else
  	      __assert_unreachable<_Tp>();
  	  }
--- 1106,1111 ----
*************** template <typename _Abi, typename>
*** 1184,1191 ****
  	    else if constexpr (__have_avx && sizeof(_Tp) == 8)
  	      _mm_maskstore_pd(reinterpret_cast<double*>(__mem), __ki,
  			       __vector_bitcast<double>(__vi));
! 	    else if constexpr (__have_sse2)
! 	      _mm_maskmoveu_si128(__vi, __ki, reinterpret_cast<char*>(__mem));
  	  }
  	else if constexpr (sizeof(__v) == 32)
  	  {
--- 1208,1215 ----
  	    else if constexpr (__have_avx && sizeof(_Tp) == 8)
  	      _mm_maskstore_pd(reinterpret_cast<double*>(__mem), __ki,
  			       __vector_bitcast<double>(__vi));
! 	    else
! 	      _Base::_S_masked_store_nocvt(__v, __mem, __k);
  	  }
  	else if constexpr (sizeof(__v) == 32)
  	  {
*************** template <typename _Abi, typename>
*** 1210,1222 ****
  	    else if constexpr (__have_avx && sizeof(_Tp) == 8)
  	      _mm256_maskstore_pd(reinterpret_cast<double*>(__mem), __ki,
  				  __vector_bitcast<double>(__v));
! 	    else if constexpr (__have_sse2)
! 	      {
! 		_mm_maskmoveu_si128(__lo128(__vi), __lo128(__ki),
! 				    reinterpret_cast<char*>(__mem));
! 		_mm_maskmoveu_si128(__hi128(__vi), __hi128(__ki),
! 				    reinterpret_cast<char*>(__mem) + 16);
! 	      }
  	  }
  	else
  	  __assert_unreachable<_Tp>();
--- 1234,1241 ----
  	    else if constexpr (__have_avx && sizeof(_Tp) == 8)
  	      _mm256_maskstore_pd(reinterpret_cast<double*>(__mem), __ki,
  				  __vector_bitcast<double>(__v));
! 	    else
! 	      _Base::_S_masked_store_nocvt(__v, __mem, __k);
  	  }
  	else
  	  __assert_unreachable<_Tp>();
*************** template <typename _Abi, typename>
*** 1300,1306 ****
      // }}}
      // _S_multiplies {{{
      template <typename _V, typename _VVT = _VectorTraits<_V>>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _V _S_multiplies(_V __x, _V __y)
        {
  	using _Tp = typename _VVT::value_type;
  	if (__builtin_is_constant_evaluated() || __x._M_is_constprop()
--- 1319,1326 ----
      // }}}
      // _S_multiplies {{{
      template <typename _V, typename _VVT = _VectorTraits<_V>>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr _V
!       _S_multiplies(_V __x, _V __y)
        {
  	using _Tp = typename _VVT::value_type;
  	if (__builtin_is_constant_evaluated() || __x._M_is_constprop()
*************** template <typename _Abi, typename>
*** 1417,1427 ****
  	      const auto __yf = __convert_all<_FloatV, __n_floatv>(
  		_Abi::__make_padding_nonzero(__as_vector(__y)));
  	      return __call_with_n_evaluations<__n_floatv>(
! 		[](auto... __quotients) {
  		  return __vector_convert<_R>(__quotients...);
  		},
! 		[&__xf,
! 		 &__yf](auto __i) -> _SimdWrapper<_Float, __n_intermediate> {
  #if __RECIPROCAL_MATH__
  		  // If -freciprocal-math is active, using the `/` operator is
  		  // incorrect because it may be translated to an imprecise
--- 1437,1448 ----
  	      const auto __yf = __convert_all<_FloatV, __n_floatv>(
  		_Abi::__make_padding_nonzero(__as_vector(__y)));
  	      return __call_with_n_evaluations<__n_floatv>(
! 		[](auto... __quotients) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  		  return __vector_convert<_R>(__quotients...);
  		},
! 		[&__xf, &__yf](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA
! 		  -> _SimdWrapper<_Float, __n_intermediate>
! 		{
  #if __RECIPROCAL_MATH__
  		  // If -freciprocal-math is active, using the `/` operator is
  		  // incorrect because it may be translated to an imprecise
*************** template <typename _Abi, typename>
*** 1477,1482 ****
--- 1498,1505 ----
  	  */
  	return _Base::_S_divides(__x, __y);
        }
+ #else
+     using _Base::_S_divides;
  #endif // _GLIBCXX_SIMD_WORKAROUND_PR90993
  
      // }}}
*************** template <typename _Abi, typename>
*** 1980,1986 ****
  	      {
  		auto __mask = __vector_bitcast<_UChar>(
  		  __vector_bitcast<_UShort>(__iy) << 5);
! 		auto __maskl = [&]() {
  		  return __to_intrin(__vector_bitcast<_UShort>(__mask) << 8);
  		};
  		auto __xh = __vector_bitcast<short>(__ix);
--- 2003,2009 ----
  	      {
  		auto __mask = __vector_bitcast<_UChar>(
  		  __vector_bitcast<_UShort>(__iy) << 5);
! 		auto __maskl = [&]() _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  		  return __to_intrin(__vector_bitcast<_UShort>(__mask) << 8);
  		};
  		auto __xh = __vector_bitcast<short>(__ix);
*************** template <typename _Abi, typename>
*** 2067,2085 ****
  	  }                                                      //}}}
  	else if constexpr (sizeof(_Up) == 2 && sizeof(__x) >= 4) //{{{
  	  {
! 	    [[maybe_unused]] auto __blend_0xaa = [](auto __a, auto __b) {
! 	      if constexpr (sizeof(__a) == 16)
! 		return _mm_blend_epi16(__to_intrin(__a), __to_intrin(__b),
! 				       0xaa);
! 	      else if constexpr (sizeof(__a) == 32)
! 		return _mm256_blend_epi16(__to_intrin(__a), __to_intrin(__b),
! 					  0xaa);
! 	      else if constexpr (sizeof(__a) == 64)
! 		return _mm512_mask_blend_epi16(0xaaaa'aaaaU, __to_intrin(__a),
! 					       __to_intrin(__b));
! 	      else
! 		__assert_unreachable<decltype(__a)>();
! 	    };
  	    if constexpr (__have_avx512bw_vl && sizeof(_Tp) <= 16)
  	      return __intrin_bitcast<_V>(is_signed_v<_Up>
  					    ? _mm_srav_epi16(__ix, __iy)
--- 2090,2109 ----
  	  }                                                      //}}}
  	else if constexpr (sizeof(_Up) == 2 && sizeof(__x) >= 4) //{{{
  	  {
! 	    [[maybe_unused]] auto __blend_0xaa
! 	      = [](auto __a, auto __b) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		if constexpr (sizeof(__a) == 16)
! 		  return _mm_blend_epi16(__to_intrin(__a), __to_intrin(__b),
! 					 0xaa);
! 		else if constexpr (sizeof(__a) == 32)
! 		  return _mm256_blend_epi16(__to_intrin(__a), __to_intrin(__b),
! 					    0xaa);
! 		else if constexpr (sizeof(__a) == 64)
! 		  return _mm512_mask_blend_epi16(0xaaaa'aaaaU, __to_intrin(__a),
! 						 __to_intrin(__b));
! 		else
! 		  __assert_unreachable<decltype(__a)>();
! 	      };
  	    if constexpr (__have_avx512bw_vl && sizeof(_Tp) <= 16)
  	      return __intrin_bitcast<_V>(is_signed_v<_Up>
  					    ? _mm_srav_epi16(__ix, __iy)
*************** template <typename _Abi, typename>
*** 2136,2144 ****
  	      {
  		auto __k = __vector_bitcast<_UShort>(__iy) << 11;
  		auto __x128 = __vector_bitcast<_Up>(__ix);
! 		auto __mask = [](__vector_type16_t<_UShort> __kk) {
! 		  return __vector_bitcast<short>(__kk) < 0;
! 		};
  		// do __x128 = 0 where __y[4] is set
  		__x128 = __mask(__k) ? decltype(__x128)() : __x128;
  		// do __x128 =>> 8 where __y[3] is set
--- 2160,2169 ----
  	      {
  		auto __k = __vector_bitcast<_UShort>(__iy) << 11;
  		auto __x128 = __vector_bitcast<_Up>(__ix);
! 		auto __mask
! 		  = [](__vector_type16_t<_UShort> __kk) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		    return __vector_bitcast<short>(__kk) < 0;
! 		  };
  		// do __x128 = 0 where __y[4] is set
  		__x128 = __mask(__k) ? decltype(__x128)() : __x128;
  		// do __x128 =>> 8 where __y[3] is set
*************** template <typename _Abi, typename>
*** 2178,2184 ****
  	      }
  	    else
  	      {
! 		auto __shift = [](auto __a, auto __b) {
  		  if constexpr (is_signed_v<_Up>)
  		    return _mm_sra_epi32(__a, __b);
  		  else
--- 2203,2209 ----
  	      }
  	    else
  	      {
! 		auto __shift = [](auto __a, auto __b) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  		  if constexpr (is_signed_v<_Up>)
  		    return _mm_sra_epi32(__a, __b);
  		  else
*************** template <typename _Abi, typename>
*** 2268,2281 ****
  	  } // }}}
  	else if (__builtin_is_constant_evaluated())
  	  return _Base::_S_equal_to(__x, __y);
! 	else if constexpr (sizeof(__x) == 8) // {{{
  	  {
  	    const auto __r128 = __vector_bitcast<_Tp, 16 / sizeof(_Tp)>(__x)
  				== __vector_bitcast<_Tp, 16 / sizeof(_Tp)>(__y);
! 	    _MaskMember<_Tp> __r64;
  	    __builtin_memcpy(&__r64._M_data, &__r128, sizeof(__r64));
  	    return __r64;
! 	  } // }}}
  	else
  	  return _Base::_S_equal_to(__x, __y);
        }
--- 2293,2306 ----
  	  } // }}}
  	else if (__builtin_is_constant_evaluated())
  	  return _Base::_S_equal_to(__x, __y);
! 	else if constexpr (sizeof(__x) == 8)
  	  {
  	    const auto __r128 = __vector_bitcast<_Tp, 16 / sizeof(_Tp)>(__x)
  				== __vector_bitcast<_Tp, 16 / sizeof(_Tp)>(__y);
! 	    _MaskMember<_Tp> __r64{};
  	    __builtin_memcpy(&__r64._M_data, &__r128, sizeof(__r64));
  	    return __r64;
! 	  }
  	else
  	  return _Base::_S_equal_to(__x, __y);
        }
*************** template <typename _Abi, typename>
*** 2346,2352 ****
  	  {
  	    const auto __r128 = __vector_bitcast<_Tp, 16 / sizeof(_Tp)>(__x)
  				!= __vector_bitcast<_Tp, 16 / sizeof(_Tp)>(__y);
! 	    _MaskMember<_Tp> __r64;
  	    __builtin_memcpy(&__r64._M_data, &__r128, sizeof(__r64));
  	    return __r64;
  	  }
--- 2371,2377 ----
  	  {
  	    const auto __r128 = __vector_bitcast<_Tp, 16 / sizeof(_Tp)>(__x)
  				!= __vector_bitcast<_Tp, 16 / sizeof(_Tp)>(__y);
! 	    _MaskMember<_Tp> __r64{};
  	    __builtin_memcpy(&__r64._M_data, &__r128, sizeof(__r64));
  	    return __r64;
  	  }
*************** template <typename _Abi, typename>
*** 2454,2460 ****
  	  {
  	    const auto __r128 = __vector_bitcast<_Tp, 16 / sizeof(_Tp)>(__x)
  				< __vector_bitcast<_Tp, 16 / sizeof(_Tp)>(__y);
! 	    _MaskMember<_Tp> __r64;
  	    __builtin_memcpy(&__r64._M_data, &__r128, sizeof(__r64));
  	    return __r64;
  	  }
--- 2479,2485 ----
  	  {
  	    const auto __r128 = __vector_bitcast<_Tp, 16 / sizeof(_Tp)>(__x)
  				< __vector_bitcast<_Tp, 16 / sizeof(_Tp)>(__y);
! 	    _MaskMember<_Tp> __r64{};
  	    __builtin_memcpy(&__r64._M_data, &__r128, sizeof(__r64));
  	    return __r64;
  	  }
*************** template <typename _Abi, typename>
*** 2562,2568 ****
  	  {
  	    const auto __r128 = __vector_bitcast<_Tp, 16 / sizeof(_Tp)>(__x)
  				<= __vector_bitcast<_Tp, 16 / sizeof(_Tp)>(__y);
! 	    _MaskMember<_Tp> __r64;
  	    __builtin_memcpy(&__r64._M_data, &__r128, sizeof(__r64));
  	    return __r64;
  	  }
--- 2587,2593 ----
  	  {
  	    const auto __r128 = __vector_bitcast<_Tp, 16 / sizeof(_Tp)>(__x)
  				<= __vector_bitcast<_Tp, 16 / sizeof(_Tp)>(__y);
! 	    _MaskMember<_Tp> __r64{};
  	    __builtin_memcpy(&__r64._M_data, &__r128, sizeof(__r64));
  	    return __r64;
  	  }
*************** template <typename _Abi, typename>
*** 2735,2741 ****
      // }}}
      // _S_nearbyint {{{
      template <typename _Tp, typename _TVT = _VectorTraits<_Tp>>
!       _GLIBCXX_SIMD_INTRINSIC static _Tp _S_nearbyint(_Tp __x) noexcept
        {
  	if constexpr (_TVT::template _S_is<float, 16>)
  	  return _mm512_roundscale_ps(__x, 0x0c);
--- 2760,2767 ----
      // }}}
      // _S_nearbyint {{{
      template <typename _Tp, typename _TVT = _VectorTraits<_Tp>>
!       _GLIBCXX_SIMD_INTRINSIC static _Tp
!       _S_nearbyint(_Tp __x) noexcept
        {
  	if constexpr (_TVT::template _S_is<float, 16>)
  	  return _mm512_roundscale_ps(__x, 0x0c);
*************** template <typename _Abi, typename>
*** 2760,2766 ****
      // }}}
      // _S_rint {{{
      template <typename _Tp, typename _TVT = _VectorTraits<_Tp>>
!       _GLIBCXX_SIMD_INTRINSIC static _Tp _S_rint(_Tp __x) noexcept
        {
  	if constexpr (_TVT::template _S_is<float, 16>)
  	  return _mm512_roundscale_ps(__x, 0x04);
--- 2786,2793 ----
      // }}}
      // _S_rint {{{
      template <typename _Tp, typename _TVT = _VectorTraits<_Tp>>
!       _GLIBCXX_SIMD_INTRINSIC static _Tp
!       _S_rint(_Tp __x) noexcept
        {
  	if constexpr (_TVT::template _S_is<float, 16>)
  	  return _mm512_roundscale_ps(__x, 0x04);
*************** template <typename _Abi, typename>
*** 2908,2914 ****
      // _S_isnonzerovalue_mask {{{
      // (isnormal | is subnormal == !isinf & !isnan & !is zero)
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static auto _S_isnonzerovalue_mask(_Tp __x)
        {
  	using _Traits = _VectorTraits<_Tp>;
  	if constexpr (__have_avx512dq_vl)
--- 2935,2942 ----
      // _S_isnonzerovalue_mask {{{
      // (isnormal | is subnormal == !isinf & !isnan & !is zero)
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static auto
!       _S_isnonzerovalue_mask(_Tp __x)
        {
  	using _Traits = _VectorTraits<_Tp>;
  	if constexpr (__have_avx512dq_vl)
*************** template <typename _Abi, typename>
*** 3175,3182 ****
      // }}}
      // _S_isgreater {{{
      template <typename _Tp, size_t _Np>
!       static constexpr _MaskMember<_Tp> _S_isgreater(_SimdWrapper<_Tp, _Np> __x,
! 						     _SimdWrapper<_Tp, _Np> __y)
        {
  	const auto __xi = __to_intrin(__x);
  	const auto __yi = __to_intrin(__y);
--- 3203,3210 ----
      // }}}
      // _S_isgreater {{{
      template <typename _Tp, size_t _Np>
!       static constexpr _MaskMember<_Tp>
!       _S_isgreater(_SimdWrapper<_Tp, _Np> __x, _SimdWrapper<_Tp, _Np> __y)
        {
  	const auto __xi = __to_intrin(__x);
  	const auto __yi = __to_intrin(__y);
*************** template <typename _Abi, typename>
*** 3293,3300 ****
      // }}}
      // _S_isless {{{
      template <typename _Tp, size_t _Np>
!       static constexpr _MaskMember<_Tp> _S_isless(_SimdWrapper<_Tp, _Np> __x,
! 						  _SimdWrapper<_Tp, _Np> __y)
        {
  	const auto __xi = __to_intrin(__x);
  	const auto __yi = __to_intrin(__y);
--- 3321,3328 ----
      // }}}
      // _S_isless {{{
      template <typename _Tp, size_t _Np>
!       static constexpr _MaskMember<_Tp>
!       _S_isless(_SimdWrapper<_Tp, _Np> __x, _SimdWrapper<_Tp, _Np> __y)
        {
  	const auto __xi = __to_intrin(__x);
  	const auto __yi = __to_intrin(__y);
*************** template <typename _Abi, typename>
*** 3458,3463 ****
--- 3486,3571 ----
        }
  
      //}}} }}}
+     template <template <typename> class _Op, typename _Tp, typename _K, size_t _Np>
+       _GLIBCXX_SIMD_INTRINSIC static _SimdWrapper<_Tp, _Np>
+       _S_masked_unary(const _SimdWrapper<_K, _Np> __k, const _SimdWrapper<_Tp, _Np> __v)
+       {
+ 	if (__k._M_is_constprop_none_of())
+ 	  return __v;
+ 	else if (__k._M_is_constprop_all_of())
+ 	  {
+ 	    auto __vv = _Base::_M_make_simd(__v);
+ 	    _Op<decltype(__vv)> __op;
+ 	    return __data(__op(__vv));
+ 	  }
+ 	else if constexpr (__is_bitmask_v<decltype(__k)>
+ 			     && (is_same_v<_Op<void>, __increment<void>>
+ 				   || is_same_v<_Op<void>, __decrement<void>>))
+ 	  {
+ 	    // optimize masked unary increment and decrement as masked sub +/-1
+ 	    constexpr int __pm_one
+ 	      = is_same_v<_Op<void>, __increment<void>> ? -1 : 1;
+ #ifdef __clang__
+ 	    return __movm<_Np, _Tp>(__k._M_data) ? __v._M_data - __pm_one : __v._M_data;
+ #else // __clang__
+ 	    using _TV = __vector_type_t<_Tp, _Np>;
+ 	    constexpr size_t __bytes = sizeof(__v) < 16 ? 16 : sizeof(__v);
+ 	    constexpr size_t __width = __bytes / sizeof(_Tp);
+ 	    if constexpr (is_integral_v<_Tp>)
+ 	      {
+ 		constexpr bool __lp64 = sizeof(long) == sizeof(long long);
+ 		using _Ip = std::make_signed_t<_Tp>;
+ 		using _Up = std::conditional_t<
+ 			      std::is_same_v<_Ip, long>,
+ 			      std::conditional_t<__lp64, long long, int>,
+ 			      std::conditional_t<
+ 				std::is_same_v<_Ip, signed char>, char, _Ip>>;
+ 		const auto __value = __intrin_bitcast<__vector_type_t<_Up, __width>>(__v._M_data);
+ #define _GLIBCXX_SIMD_MASK_SUB(_Sizeof, _Width, _Instr)                        \
+   if constexpr (sizeof(_Tp) == _Sizeof && sizeof(__value) == _Width)           \
+     return __intrin_bitcast<_TV>(__builtin_ia32_##_Instr##_mask(__value,       \
+ 	     __vector_broadcast<__width>(_Up(__pm_one)), __value, __k._M_data))
+ 		_GLIBCXX_SIMD_MASK_SUB(1, 64, psubb512);
+ 		_GLIBCXX_SIMD_MASK_SUB(1, 32, psubb256);
+ 		_GLIBCXX_SIMD_MASK_SUB(1, 16, psubb128);
+ 		_GLIBCXX_SIMD_MASK_SUB(2, 64, psubw512);
+ 		_GLIBCXX_SIMD_MASK_SUB(2, 32, psubw256);
+ 		_GLIBCXX_SIMD_MASK_SUB(2, 16, psubw128);
+ 		_GLIBCXX_SIMD_MASK_SUB(4, 64, psubd512);
+ 		_GLIBCXX_SIMD_MASK_SUB(4, 32, psubd256);
+ 		_GLIBCXX_SIMD_MASK_SUB(4, 16, psubd128);
+ 		_GLIBCXX_SIMD_MASK_SUB(8, 64, psubq512);
+ 		_GLIBCXX_SIMD_MASK_SUB(8, 32, psubq256);
+ 		_GLIBCXX_SIMD_MASK_SUB(8, 16, psubq128);
+ #undef _GLIBCXX_SIMD_MASK_SUB
+ 	      }
+ 	    else
+ 	      {
+ 		const auto __value = __intrin_bitcast<__vector_type_t<_Tp, __width>>(__v._M_data);
+ #define _GLIBCXX_SIMD_MASK_SUB_512(_Sizeof, _Width, _Instr)                    \
+   if constexpr (sizeof(_Tp) == _Sizeof && sizeof(__value) == _Width)           \
+     return __builtin_ia32_##_Instr##_mask(                                     \
+ 	     __value, __vector_broadcast<__width>(_Tp(__pm_one)), __value,     \
+ 	     __k._M_data, _MM_FROUND_CUR_DIRECTION)
+ #define _GLIBCXX_SIMD_MASK_SUB(_Sizeof, _Width, _Instr)                        \
+   if constexpr (sizeof(_Tp) == _Sizeof && sizeof(__value) == _Width)           \
+     return __intrin_bitcast<_TV>(__builtin_ia32_##_Instr##_mask(               \
+ 	     __value, __vector_broadcast<__width>(_Tp(__pm_one)), __value,     \
+ 	     __k._M_data))
+ 		_GLIBCXX_SIMD_MASK_SUB_512(4, 64, subps512);
+ 		_GLIBCXX_SIMD_MASK_SUB(4, 32, subps256);
+ 		_GLIBCXX_SIMD_MASK_SUB(4, 16, subps128);
+ 		_GLIBCXX_SIMD_MASK_SUB_512(8, 64, subpd512);
+ 		_GLIBCXX_SIMD_MASK_SUB(8, 32, subpd256);
+ 		_GLIBCXX_SIMD_MASK_SUB(8, 16, subpd128);
+ #undef _GLIBCXX_SIMD_MASK_SUB_512
+ #undef _GLIBCXX_SIMD_MASK_SUB
+ 	      }
+ #endif // __clang__
+ 	  }
+ 	else
+ 	  return _Base::template _S_masked_unary<_Op>(__k, __v);
+       }
    };
  
  // }}}
*************** struct _MaskImplX86Mixin
*** 3471,3478 ****
  
    // _S_to_maskvector(bool) {{{
    template <typename _Up, size_t _ToN = 1, typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr enable_if_t<
!       is_same_v<_Tp, bool>, _SimdWrapper<_Up, _ToN>>
      _S_to_maskvector(_Tp __x)
      {
        static_assert(is_same_v<_Up, __int_for_sizeof_t<_Up>>);
--- 3579,3586 ----
  
    // _S_to_maskvector(bool) {{{
    template <typename _Up, size_t _ToN = 1, typename _Tp>
!     _GLIBCXX_SIMD_INTRINSIC static constexpr
!     enable_if_t<is_same_v<_Tp, bool>, _SimdWrapper<_Up, _ToN>>
      _S_to_maskvector(_Tp __x)
      {
        static_assert(is_same_v<_Up, __int_for_sizeof_t<_Up>>);
*************** struct _MaskImplX86Mixin
*** 3482,3489 ****
  
    // }}}
    // _S_to_maskvector(_SanitizedBitMask) {{{
!   template <typename _Up, size_t _UpN = 0, size_t _Np,
! 	    size_t _ToN = _UpN == 0 ? _Np : _UpN>
      _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Up, _ToN>
      _S_to_maskvector(_SanitizedBitMask<_Np> __x)
      {
--- 3590,3596 ----
  
    // }}}
    // _S_to_maskvector(_SanitizedBitMask) {{{
!   template <typename _Up, size_t _UpN = 0, size_t _Np, size_t _ToN = _UpN == 0 ? _Np : _UpN>
      _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Up, _ToN>
      _S_to_maskvector(_SanitizedBitMask<_Np> __x)
      {
*************** struct _MaskImplX86Mixin
*** 3495,3501 ****
  	return _S_to_maskvector<_Up, _ToN>(__k);
        else if (__x._M_is_constprop() || __builtin_is_constant_evaluated())
  	return __generate_from_n_evaluations<std::min(_ToN, _Np), _UV>(
! 	  [&](auto __i) -> _Up { return -__x[__i.value]; });
        else if constexpr (sizeof(_Up) == 1)
  	{
  	  if constexpr (sizeof(_UI) == 16)
--- 3602,3608 ----
  	return _S_to_maskvector<_Up, _ToN>(__k);
        else if (__x._M_is_constprop() || __builtin_is_constant_evaluated())
  	return __generate_from_n_evaluations<std::min(_ToN, _Np), _UV>(
! 	  [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA -> _Up { return -__x[__i.value]; });
        else if constexpr (sizeof(_Up) == 1)
  	{
  	  if constexpr (sizeof(_UI) == 16)
*************** struct _MaskImplX86Mixin
*** 3740,3748 ****
        else if constexpr (__bits_per_element >= _ToN)
  	{
  	  constexpr auto __bitmask
! 	    = __generate_vector<_V>([](auto __i) constexpr->_UpUInt {
! 		return __i < _ToN ? 1ull << __i : 0;
! 	      });
  	  const auto __bits
  	    = __vector_broadcast<_ToN, _UpUInt>(__k) & __bitmask;
  	  if constexpr (__bits_per_element > _ToN)
--- 3847,3855 ----
        else if constexpr (__bits_per_element >= _ToN)
  	{
  	  constexpr auto __bitmask
! 	    = __generate_vector<_V>([](auto __i)
! 				    constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA -> _UpUInt
! 				    { return __i < _ToN ? 1ull << __i : 0; });
  	  const auto __bits
  	    = __vector_broadcast<_ToN, _UpUInt>(__k) & __bitmask;
  	  if constexpr (__bits_per_element > _ToN)
*************** struct _MaskImplX86Mixin
*** 3753,3763 ****
        else
  	{
  	  const _V __tmp
! 	    = __generate_vector<_V>([&](auto __i) constexpr {
  		return static_cast<_UpUInt>(
  		  __k >> (__bits_per_element * (__i / __bits_per_element)));
  	      })
! 	      & __generate_vector<_V>([](auto __i) constexpr {
  		  return static_cast<_UpUInt>(1ull
  					      << (__i % __bits_per_element));
  		}); // mask bit index
--- 3860,3870 ----
        else
  	{
  	  const _V __tmp
! 	    = __generate_vector<_V>([&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  		return static_cast<_UpUInt>(
  		  __k >> (__bits_per_element * (__i / __bits_per_element)));
  	      })
! 	      & __generate_vector<_V>([](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  		  return static_cast<_UpUInt>(1ull
  					      << (__i % __bits_per_element));
  		}); // mask bit index
*************** struct _MaskImplX86Mixin
*** 3793,3799 ****
  	      const auto __y = __vector_bitcast<__int_for_sizeof_t<_Tp>>(__x);
  	      return __generate_from_n_evaluations<std::min(_ToN, _Np),
  						   __vector_type_t<_Up, _ToN>>(
! 		[&](auto __i) -> _Up { return __y[__i.value]; });
  	    }
  	  using _To = __vector_type_t<_Up, _ToN>;
  	  [[maybe_unused]] constexpr size_t _FromN = _Np;
--- 3900,3906 ----
  	      const auto __y = __vector_bitcast<__int_for_sizeof_t<_Tp>>(__x);
  	      return __generate_from_n_evaluations<std::min(_ToN, _Np),
  						   __vector_type_t<_Up, _ToN>>(
! 		[&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA -> _Up { return __y[__i.value]; });
  	    }
  	  using _To = __vector_type_t<_Up, _ToN>;
  	  [[maybe_unused]] constexpr size_t _FromN = _Np;
*************** struct _MaskImplX86Mixin
*** 4128,4135 ****
  	    {
  	      const auto __bools = -__x._M_data;
  	      const _ULLong __k = __call_with_n_evaluations<_Np>(
! 		[](auto... __bits) { return (__bits | ...); },
! 		[&](auto __i) { return _ULLong(__bools[+__i]) << __i; });
  	      if (__builtin_is_constant_evaluated()
  		  || __builtin_constant_p(__k))
  		return __k;
--- 4235,4245 ----
  	    {
  	      const auto __bools = -__x._M_data;
  	      const _ULLong __k = __call_with_n_evaluations<_Np>(
! 		[](auto... __bits) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		  return (__bits | ...);
! 		}, [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		  return _ULLong(__bools[+__i]) << __i;
! 		});
  	      if (__builtin_is_constant_evaluated()
  		  || __builtin_constant_p(__k))
  		return __k;
*************** template <typename _Abi, typename>
*** 4283,4297 ****
        _S_load(const bool* __mem)
        {
  	static_assert(is_same_v<_Tp, __int_for_sizeof_t<_Tp>>);
! 	if constexpr (__have_avx512bw)
  	  {
! 	    const auto __to_vec_or_bits = [](auto __bits) -> decltype(auto) {
! 	      if constexpr (__is_avx512_abi<_Abi>())
! 		return __bits;
! 	      else
! 		return _S_to_maskvector<_Tp>(
! 		  _BitMask<_S_size<_Tp>>(__bits)._M_sanitized());
! 	    };
  
  	    if constexpr (_S_size<_Tp> <= 16 && __have_avx512vl)
  	      {
--- 4393,4420 ----
        _S_load(const bool* __mem)
        {
  	static_assert(is_same_v<_Tp, __int_for_sizeof_t<_Tp>>);
! 	if (__builtin_is_constant_evaluated())
  	  {
! 	    if constexpr (__is_avx512_abi<_Abi>())
! 	      {
! 		_MaskMember<_Tp> __r{};
! 		for (size_t __i = 0; __i < _S_size<_Tp>; ++__i)
! 		  __r._M_data |= _ULLong(__mem[__i]) << __i;
! 		return __r;
! 	      }
! 	    else
! 	      return _Base::template _S_load<_Tp>(__mem);
! 	  }
! 	else if constexpr (__have_avx512bw)
! 	  {
! 	    const auto __to_vec_or_bits
! 	      = [](auto __bits) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA -> decltype(auto) {
! 		if constexpr (__is_avx512_abi<_Abi>())
! 		  return __bits;
! 		else
! 		  return _S_to_maskvector<_Tp>(
! 			   _BitMask<_S_size<_Tp>>(__bits)._M_sanitized());
! 	      };
  
  	    if constexpr (_S_size<_Tp> <= 16 && __have_avx512vl)
  	      {
*************** template <typename _Abi, typename>
*** 4478,4484 ****
  	      }
  	    else
  	      {
! 		_BitOps::_S_bit_iteration(__mask, [&](auto __i) {
  		  __merge._M_set(__i, __mem[__i]);
  		});
  		return __merge;
--- 4601,4607 ----
  	      }
  	    else
  	      {
! 		_BitOps::_S_bit_iteration(__mask, [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  		  __merge._M_set(__i, __mem[__i]);
  		});
  		return __merge;
*************** template <typename _Abi, typename>
*** 4550,4563 ****
  
      // _S_store {{{2
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static void _S_store(_SimdWrapper<_Tp, _Np> __v,
! 						   bool* __mem) noexcept
        {
! 	if constexpr (__is_avx512_abi<_Abi>())
  	  {
  	    if constexpr (__have_avx512bw_vl)
  	      _CommonImplX86::_S_store<_Np>(
! 		__vector_bitcast<char>([](auto __data) {
  		  if constexpr (_Np <= 16)
  		    return _mm_maskz_set1_epi8(__data, 1);
  		  else if constexpr (_Np <= 32)
--- 4673,4688 ----
  
      // _S_store {{{2
      template <typename _Tp, size_t _Np>
!       _GLIBCXX_SIMD_INTRINSIC static constexpr void
!       _S_store(_SimdWrapper<_Tp, _Np> __v, bool* __mem) noexcept
        {
! 	if (__builtin_is_constant_evaluated())
! 	  _Base::_S_store(__v, __mem);
! 	else if constexpr (__is_avx512_abi<_Abi>())
  	  {
  	    if constexpr (__have_avx512bw_vl)
  	      _CommonImplX86::_S_store<_Np>(
! 		__vector_bitcast<char>([](auto __data) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  		  if constexpr (_Np <= 16)
  		    return _mm_maskz_set1_epi8(__data, 1);
  		  else if constexpr (_Np <= 32)
*************** template <typename _Abi, typename>
*** 4635,4641 ****
  	    if constexpr (_Np <= 4 && sizeof(_Tp) == 8)
  	      {
  		auto __k = __intrin_bitcast<__m256i>(__to_intrin(__v));
! 		int __bool4;
  		if constexpr (__have_avx2)
  		  __bool4 = _mm256_movemask_epi8(__k);
  		else
--- 4760,4766 ----
  	    if constexpr (_Np <= 4 && sizeof(_Tp) == 8)
  	      {
  		auto __k = __intrin_bitcast<__m256i>(__to_intrin(__v));
! 		int __bool4{};
  		if constexpr (__have_avx2)
  		  __bool4 = _mm256_movemask_epi8(__k);
  		else
*************** template <typename _Abi, typename>
*** 4715,4726 ****
      // logical and bitwise operators {{{2
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_logical_and(const _SimdWrapper<_Tp, _Np>& __x,
! 		     const _SimdWrapper<_Tp, _Np>& __y)
        {
  	if constexpr (is_same_v<_Tp, bool>)
  	  {
! 	    if constexpr (__have_avx512dq && _Np <= 8)
  	      return _kand_mask8(__x._M_data, __y._M_data);
  	    else if constexpr (_Np <= 16)
  	      return _kand_mask16(__x._M_data, __y._M_data);
--- 4840,4852 ----
      // logical and bitwise operators {{{2
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_logical_and(const _SimdWrapper<_Tp, _Np>& __x, const _SimdWrapper<_Tp, _Np>& __y)
        {
  	if constexpr (is_same_v<_Tp, bool>)
  	  {
! 	    if (__builtin_is_constant_evaluated())
! 	      return __x._M_data & __y._M_data;
! 	    else if constexpr (__have_avx512dq && _Np <= 8)
  	      return _kand_mask8(__x._M_data, __y._M_data);
  	    else if constexpr (_Np <= 16)
  	      return _kand_mask16(__x._M_data, __y._M_data);
*************** template <typename _Abi, typename>
*** 4737,4748 ****
  
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_logical_or(const _SimdWrapper<_Tp, _Np>& __x,
! 		    const _SimdWrapper<_Tp, _Np>& __y)
        {
  	if constexpr (is_same_v<_Tp, bool>)
  	  {
! 	    if constexpr (__have_avx512dq && _Np <= 8)
  	      return _kor_mask8(__x._M_data, __y._M_data);
  	    else if constexpr (_Np <= 16)
  	      return _kor_mask16(__x._M_data, __y._M_data);
--- 4863,4875 ----
  
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_logical_or(const _SimdWrapper<_Tp, _Np>& __x, const _SimdWrapper<_Tp, _Np>& __y)
        {
  	if constexpr (is_same_v<_Tp, bool>)
  	  {
! 	    if (__builtin_is_constant_evaluated())
! 	      return __x._M_data | __y._M_data;
! 	    else if constexpr (__have_avx512dq && _Np <= 8)
  	      return _kor_mask8(__x._M_data, __y._M_data);
  	    else if constexpr (_Np <= 16)
  	      return _kor_mask16(__x._M_data, __y._M_data);
*************** template <typename _Abi, typename>
*** 4763,4769 ****
        {
  	if constexpr (is_same_v<_Tp, bool>)
  	  {
! 	    if constexpr (__have_avx512dq && _Np <= 8)
  	      return _kandn_mask8(__x._M_data,
  				  _Abi::template __implicit_mask_n<_Np>());
  	    else if constexpr (_Np <= 16)
--- 4890,4898 ----
        {
  	if constexpr (is_same_v<_Tp, bool>)
  	  {
! 	    if (__builtin_is_constant_evaluated())
! 	      return __x._M_data ^ _Abi::template __implicit_mask_n<_Np>();
! 	    else if constexpr (__have_avx512dq && _Np <= 8)
  	      return _kandn_mask8(__x._M_data,
  				  _Abi::template __implicit_mask_n<_Np>());
  	    else if constexpr (_Np <= 16)
*************** template <typename _Abi, typename>
*** 4784,4795 ****
  
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_bit_and(const _SimdWrapper<_Tp, _Np>& __x,
! 		 const _SimdWrapper<_Tp, _Np>& __y)
        {
  	if constexpr (is_same_v<_Tp, bool>)
  	  {
! 	    if constexpr (__have_avx512dq && _Np <= 8)
  	      return _kand_mask8(__x._M_data, __y._M_data);
  	    else if constexpr (_Np <= 16)
  	      return _kand_mask16(__x._M_data, __y._M_data);
--- 4913,4925 ----
  
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_bit_and(const _SimdWrapper<_Tp, _Np>& __x, const _SimdWrapper<_Tp, _Np>& __y)
        {
  	if constexpr (is_same_v<_Tp, bool>)
  	  {
! 	    if (__builtin_is_constant_evaluated())
! 	      return __x._M_data & __y._M_data;
! 	    else if constexpr (__have_avx512dq && _Np <= 8)
  	      return _kand_mask8(__x._M_data, __y._M_data);
  	    else if constexpr (_Np <= 16)
  	      return _kand_mask16(__x._M_data, __y._M_data);
*************** template <typename _Abi, typename>
*** 4806,4817 ****
  
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_bit_or(const _SimdWrapper<_Tp, _Np>& __x,
! 		const _SimdWrapper<_Tp, _Np>& __y)
        {
  	if constexpr (is_same_v<_Tp, bool>)
  	  {
! 	    if constexpr (__have_avx512dq && _Np <= 8)
  	      return _kor_mask8(__x._M_data, __y._M_data);
  	    else if constexpr (_Np <= 16)
  	      return _kor_mask16(__x._M_data, __y._M_data);
--- 4936,4948 ----
  
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_bit_or(const _SimdWrapper<_Tp, _Np>& __x, const _SimdWrapper<_Tp, _Np>& __y)
        {
  	if constexpr (is_same_v<_Tp, bool>)
  	  {
! 	    if (__builtin_is_constant_evaluated())
! 	      return __x._M_data | __y._M_data;
! 	    else if constexpr (__have_avx512dq && _Np <= 8)
  	      return _kor_mask8(__x._M_data, __y._M_data);
  	    else if constexpr (_Np <= 16)
  	      return _kor_mask16(__x._M_data, __y._M_data);
*************** template <typename _Abi, typename>
*** 4828,4839 ****
  
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_bit_xor(const _SimdWrapper<_Tp, _Np>& __x,
! 		 const _SimdWrapper<_Tp, _Np>& __y)
        {
  	if constexpr (is_same_v<_Tp, bool>)
  	  {
! 	    if constexpr (__have_avx512dq && _Np <= 8)
  	      return _kxor_mask8(__x._M_data, __y._M_data);
  	    else if constexpr (_Np <= 16)
  	      return _kxor_mask16(__x._M_data, __y._M_data);
--- 4959,4971 ----
  
      template <typename _Tp, size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static constexpr _SimdWrapper<_Tp, _Np>
!       _S_bit_xor(const _SimdWrapper<_Tp, _Np>& __x, const _SimdWrapper<_Tp, _Np>& __y)
        {
  	if constexpr (is_same_v<_Tp, bool>)
  	  {
! 	    if (__builtin_is_constant_evaluated())
! 	      return __x._M_data ^ __y._M_data;
! 	    else if constexpr (__have_avx512dq && _Np <= 8)
  	      return _kxor_mask8(__x._M_data, __y._M_data);
  	    else if constexpr (_Np <= 16)
  	      return _kxor_mask16(__x._M_data, __y._M_data);
*************** template <typename _Abi, typename>
*** 4853,4860 ****
      template <size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static void
        _S_masked_assign(_SimdWrapper<bool, _Np> __k,
! 		       _SimdWrapper<bool, _Np>& __lhs,
! 		       _SimdWrapper<bool, _Np> __rhs)
        {
  	__lhs._M_data
  	  = (~__k._M_data & __lhs._M_data) | (__k._M_data & __rhs._M_data);
--- 4985,4991 ----
      template <size_t _Np>
        _GLIBCXX_SIMD_INTRINSIC static void
        _S_masked_assign(_SimdWrapper<bool, _Np> __k,
! 		       _SimdWrapper<bool, _Np>& __lhs, _SimdWrapper<bool, _Np> __rhs)
        {
  	__lhs._M_data
  	  = (~__k._M_data & __lhs._M_data) | (__k._M_data & __rhs._M_data);
*************** template <typename _Abi, typename>
*** 4876,4882 ****
      //}}}
      // _S_all_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static bool _S_all_of(simd_mask<_Tp, _Abi> __k)
        {
  	if constexpr (__is_sse_abi<_Abi>() || __is_avx_abi<_Abi>())
  	  {
--- 5007,5014 ----
      //}}}
      // _S_all_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static bool
!       _S_all_of(simd_mask<_Tp, _Abi> __k)
        {
  	if constexpr (__is_sse_abi<_Abi>() || __is_avx_abi<_Abi>())
  	  {
*************** template <typename _Abi, typename>
*** 4932,4938 ****
      // }}}
      // _S_any_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static bool _S_any_of(simd_mask<_Tp, _Abi> __k)
        {
  	if constexpr (__is_sse_abi<_Abi>() || __is_avx_abi<_Abi>())
  	  {
--- 5064,5071 ----
      // }}}
      // _S_any_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static bool
!       _S_any_of(simd_mask<_Tp, _Abi> __k)
        {
  	if constexpr (__is_sse_abi<_Abi>() || __is_avx_abi<_Abi>())
  	  {
*************** template <typename _Abi, typename>
*** 4967,4973 ****
      // }}}
      // _S_none_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static bool _S_none_of(simd_mask<_Tp, _Abi> __k)
        {
  	if constexpr (__is_sse_abi<_Abi>() || __is_avx_abi<_Abi>())
  	  {
--- 5100,5107 ----
      // }}}
      // _S_none_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static bool
!       _S_none_of(simd_mask<_Tp, _Abi> __k)
        {
  	if constexpr (__is_sse_abi<_Abi>() || __is_avx_abi<_Abi>())
  	  {
*************** template <typename _Abi, typename>
*** 5002,5008 ****
      // }}}
      // _S_some_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static bool _S_some_of(simd_mask<_Tp, _Abi> __k)
        {
  	if constexpr (__is_sse_abi<_Abi>() || __is_avx_abi<_Abi>())
  	  {
--- 5136,5143 ----
      // }}}
      // _S_some_of {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static bool
!       _S_some_of(simd_mask<_Tp, _Abi> __k)
        {
  	if constexpr (__is_sse_abi<_Abi>() || __is_avx_abi<_Abi>())
  	  {
*************** template <typename _Abi, typename>
*** 5043,5049 ****
      // }}}
      // _S_popcount {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static int _S_popcount(simd_mask<_Tp, _Abi> __k)
        {
  	constexpr size_t _Np = simd_size_v<_Tp, _Abi>;
  	const auto __kk = _Abi::_S_masked(__k._M_data)._M_data;
--- 5178,5185 ----
      // }}}
      // _S_popcount {{{
      template <typename _Tp>
!       _GLIBCXX_SIMD_INTRINSIC static int
!       _S_popcount(simd_mask<_Tp, _Abi> __k)
        {
  	constexpr size_t _Np = simd_size_v<_Tp, _Abi>;
  	const auto __kk = _Abi::_S_masked(__k._M_data)._M_data;
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/experimental/internet gcc-12.4.0/libstdc++-v3/include/experimental/internet
*** gcc-12.3.0/libstdc++-v3/include/experimental/internet	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/experimental/internet	Thu Jun 20 08:08:10 2024
*************** namespace ip
*** 1310,1326 ****
      constexpr address_v6 address() const noexcept { return _M_addr; }
      constexpr int prefix_length() const noexcept { return _M_prefix_len; }
  
!     constexpr address_v6 network() const noexcept; // TODO
  
      address_v6_range
      hosts() const noexcept
      {
        if (is_host())
  	return { address(), *++address_v6_iterator(address()) };
!       return {}; // { network(), XXX broadcast() XXX }; // TODO
      }
  
!     constexpr network_v6
      canonical() const noexcept
      { return network_v6{network(), prefix_length()}; }
  
--- 1310,1344 ----
      constexpr address_v6 address() const noexcept { return _M_addr; }
      constexpr int prefix_length() const noexcept { return _M_prefix_len; }
  
!     _GLIBCXX17_CONSTEXPR address_v6
!     network() const noexcept
!     {
!       address_v6::bytes_type __bytes = _M_addr.to_bytes();
!       int __nbytes = (_M_prefix_len + 7) / 8;
!       for (int __n = __nbytes; __n < 16; ++__n)
! 	__bytes[__n] = 0;
!       if (int __zbits = (__nbytes * 8) - _M_prefix_len)
! 	__bytes[__nbytes - 1] &= 0xFF << __zbits;
!       return address_v6(__bytes, _M_addr.scope_id());
!     }
  
      address_v6_range
      hosts() const noexcept
      {
        if (is_host())
  	return { address(), *++address_v6_iterator(address()) };
! 
!       address_v6::bytes_type __bytes = _M_addr.to_bytes();
!       int __nbytes = (_M_prefix_len + 7) / 8;
!       for (int __n = __nbytes; __n < 16; ++__n)
! 	__bytes[__n] = 0xFF;
!       if (int __bits = (__nbytes * 8) - _M_prefix_len)
! 	__bytes[__nbytes - 1] |= (1 << __bits) - 1;
!       address_v6 __last(__bytes, _M_addr.scope_id());
!       return { network(), *++address_v6_iterator(__last) };
      }
  
!     _GLIBCXX17_CONSTEXPR network_v6
      canonical() const noexcept
      { return network_v6{network(), prefix_length()}; }
  
*************** namespace ip
*** 1342,1348 ****
        to_string(const _Allocator& __a = _Allocator()) const
        {
  	return address().to_string(__a) + '/'
! 	  + std::to_string(prefix_length());
        }
  
    private:
--- 1360,1366 ----
        to_string(const _Allocator& __a = _Allocator()) const
        {
  	return address().to_string(__a) + '/'
! 		 + std::to_string(prefix_length()).c_str();
        }
  
    private:
*************** namespace ip
*** 1457,1462 ****
--- 1475,1481 ----
      operator<<(basic_ostream<_CharT, _Traits>& __os, const network_v6& __net)
      { return __os << __net.to_string(); }
  
+ #if defined IPPROTO_TCP || defined  IPPROTO_UDP
    /// An IP endpoint.
    template<typename _InternetProtocol>
      class basic_endpoint
*************** namespace ip
*** 2091,2096 ****
--- 2110,2116 ----
        __ec = std::make_error_code(errc::operation_not_supported);
  #endif
      }
+ #endif // IPPROTO_TCP || IPPROTO_UDP
  
    /** The name of the local host.
     * @{
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/experimental/type_traits gcc-12.4.0/libstdc++-v3/include/experimental/type_traits
*** gcc-12.3.0/libstdc++-v3/include/experimental/type_traits	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/experimental/type_traits	Thu Jun 20 08:08:10 2024
*************** template <typename _Tp, unsigned _Idx =
*** 223,229 ****
  
  // See C++14 20.10.6, type relations
  template <typename _Tp, typename _Up>
!   constexpr bool is_same_v = is_same<_Tp, _Up>::value;
  template <typename _Base, typename _Derived>
    constexpr bool is_base_of_v = is_base_of<_Base, _Derived>::value;
  template <typename _From, typename _To>
--- 223,231 ----
  
  // See C++14 20.10.6, type relations
  template <typename _Tp, typename _Up>
!   constexpr bool is_same_v = false;
! template <typename _Tp>
!   constexpr bool is_same_v<_Tp, _Tp> = true;
  template <typename _Base, typename _Derived>
    constexpr bool is_base_of_v = is_base_of<_Base, _Derived>::value;
  template <typename _From, typename _To>
*************** struct nonesuch : private __nonesuchbase
*** 266,288 ****
  };
  #pragma GCC diagnostic pop
  
- template<template<typename...> class _Op, typename... _Args>
-   using is_detected
-     = typename std::__detector<nonesuch, void, _Op, _Args...>::value_t;
- 
- template<template<typename...> class _Op, typename... _Args>
-   constexpr bool is_detected_v = is_detected<_Op, _Args...>::value;
- 
- template<template<typename...> class _Op, typename... _Args>
-   using detected_t
-     = typename std::__detector<nonesuch, void, _Op, _Args...>::type;
- 
  template<typename _Default, template<typename...> class _Op, typename... _Args>
    using detected_or = std::__detected_or<_Default, _Op, _Args...>;
  
  template<typename _Default, template<typename...> class _Op, typename... _Args>
    using detected_or_t = typename detected_or<_Default, _Op, _Args...>::type;
  
  template<typename _Expected, template<typename...> class _Op, typename... _Args>
    using is_detected_exact = is_same<_Expected, detected_t<_Op, _Args...>>;
  
--- 268,288 ----
  };
  #pragma GCC diagnostic pop
  
  template<typename _Default, template<typename...> class _Op, typename... _Args>
    using detected_or = std::__detected_or<_Default, _Op, _Args...>;
  
  template<typename _Default, template<typename...> class _Op, typename... _Args>
    using detected_or_t = typename detected_or<_Default, _Op, _Args...>::type;
  
+ template<template<typename...> class _Op, typename... _Args>
+   using detected_t = detected_or_t<nonesuch, _Op, _Args...>;
+ 
+ template<template<typename...> class _Op, typename... _Args>
+   using is_detected = typename detected_or<void, _Op, _Args...>::__is_detected;
+ 
+ template<template<typename...> class _Op, typename... _Args>
+   constexpr bool is_detected_v = is_detected<_Op, _Args...>::value;
+ 
  template<typename _Expected, template<typename...> class _Op, typename... _Args>
    using is_detected_exact = is_same<_Expected, detected_t<_Op, _Args...>>;
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/ext/functional gcc-12.4.0/libstdc++-v3/include/ext/functional
*** gcc-12.3.0/libstdc++-v3/include/ext/functional	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/ext/functional	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 394,401 ****
      { _M_initialize(161803398u); }
    };
  
- #pragma GCC diagnostic pop
- 
    // Mem_fun adaptor helper functions mem_fun1 and mem_fun1_ref,
    // provided for backward compatibility, they are no longer part of
    // the C++ standard.
--- 394,399 ----
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 420,425 ****
--- 418,425 ----
      mem_fun1_ref(_Ret (_Tp::*__f)(_Arg) const)
      { return std::const_mem_fun1_ref_t<_Ret, _Tp, _Arg>(__f); }
  
+ #pragma GCC diagnostic pop
+ 
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/ext/new_allocator.h gcc-12.4.0/libstdc++-v3/include/ext/new_allocator.h
*** gcc-12.3.0/libstdc++-v3/include/ext/new_allocator.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/ext/new_allocator.h	Thu Jun 20 08:08:10 2024
*************** namespace __gnu_cxx _GLIBCXX_VISIBILITY(
*** 36,49 ****
  _GLIBCXX_BEGIN_NAMESPACE_VERSION
  
    /**
!    *  @brief  An allocator that uses global new, as per C++03 [20.4.1].
     *  @ingroup allocators
     *
     *  This is precisely the allocator defined in the C++ Standard.
!    *    - all allocation calls operator new
!    *    - all deallocation calls operator delete
     *
     *  @tparam  _Tp  Type of allocated object.
     */
    template<typename _Tp>
      class new_allocator : public std::__new_allocator<_Tp>
--- 36,55 ----
  _GLIBCXX_BEGIN_NAMESPACE_VERSION
  
    /**
!    *  @brief  An allocator that uses global `new`, as per C++03 [20.4.1].
     *  @ingroup allocators
     *
     *  This is precisely the allocator defined in the C++ Standard.
!    *    - all allocation calls `operator new`
!    *    - all deallocation calls `operator delete`
!    *
!    *  This is a non-standard extension that can be used to guarantee
!    *  allocation from `new` even if the library has been configured to
!    *  use a different implementation for `std::allocator`.
     *
     *  @tparam  _Tp  Type of allocated object.
+    *
+    *  @headerfile ext/new_allocator.h
     */
    template<typename _Tp>
      class new_allocator : public std::__new_allocator<_Tp>
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/array gcc-12.4.0/libstdc++-v3/include/std/array
*** gcc-12.3.0/libstdc++-v3/include/std/array	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/array	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 424,442 ****
        return std::move(std::get<_Int>(__arr));
      }
  
! #if __cplusplus > 201703L
  #define __cpp_lib_to_array 201907L
- 
-   template<bool _Move = false, typename _Tp, size_t... _Idx>
-     constexpr array<remove_cv_t<_Tp>, sizeof...(_Idx)>
-     __to_array(_Tp (&__a)[sizeof...(_Idx)], index_sequence<_Idx...>)
-     {
-       if constexpr (_Move)
- 	return {{std::move(__a[_Idx])...}};
-       else
- 	return {{__a[_Idx]...}};
-     }
- 
    template<typename _Tp, size_t _Nm>
      [[nodiscard]]
      constexpr array<remove_cv_t<_Tp>, _Nm>
--- 424,431 ----
        return std::move(std::get<_Int>(__arr));
      }
  
! #if __cplusplus >= 202002L && __cpp_generic_lambdas >= 201707L
  #define __cpp_lib_to_array 201907L
    template<typename _Tp, size_t _Nm>
      [[nodiscard]]
      constexpr array<remove_cv_t<_Tp>, _Nm>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 446,453 ****
        static_assert(!is_array_v<_Tp>);
        static_assert(is_constructible_v<_Tp, _Tp&>);
        if constexpr (is_constructible_v<_Tp, _Tp&>)
! 	return __to_array(__a, make_index_sequence<_Nm>{});
!       __builtin_unreachable(); // FIXME: see PR c++/91388
      }
  
    template<typename _Tp, size_t _Nm>
--- 435,458 ----
        static_assert(!is_array_v<_Tp>);
        static_assert(is_constructible_v<_Tp, _Tp&>);
        if constexpr (is_constructible_v<_Tp, _Tp&>)
! 	{
! 	  if constexpr (is_trivial_v<_Tp>)
! 	    {
! 	      array<remove_cv_t<_Tp>, _Nm> __arr;
! 	      if (!__is_constant_evaluated() && _Nm != 0)
! 		__builtin_memcpy((void*)__arr.data(), (void*)__a, sizeof(__a));
! 	      else
! 		for (size_t __i = 0; __i < _Nm; ++__i)
! 		  __arr._M_elems[__i] = __a[__i];
! 	      return __arr;
! 	    }
! 	  else
! 	    return [&__a]<size_t... _Idx>(index_sequence<_Idx...>) {
! 	      return array<remove_cv_t<_Tp>, _Nm>{{ __a[_Idx]... }};
! 	    }(make_index_sequence<_Nm>{});
! 	}
!       else
! 	__builtin_unreachable(); // FIXME: see PR c++/91388
      }
  
    template<typename _Tp, size_t _Nm>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 459,466 ****
        static_assert(!is_array_v<_Tp>);
        static_assert(is_move_constructible_v<_Tp>);
        if constexpr (is_move_constructible_v<_Tp>)
! 	return __to_array<1>(__a, make_index_sequence<_Nm>{});
!       __builtin_unreachable(); // FIXME: see PR c++/91388
      }
  #endif // C++20
  
--- 464,487 ----
        static_assert(!is_array_v<_Tp>);
        static_assert(is_move_constructible_v<_Tp>);
        if constexpr (is_move_constructible_v<_Tp>)
! 	{
! 	  if constexpr (is_trivial_v<_Tp>)
! 	    {
! 	      array<remove_cv_t<_Tp>, _Nm> __arr;
! 	      if (!__is_constant_evaluated() && _Nm != 0)
! 		__builtin_memcpy((void*)__arr.data(), (void*)__a, sizeof(__a));
! 	      else
! 		for (size_t __i = 0; __i < _Nm; ++__i)
! 		  __arr._M_elems[__i] = __a[__i];
! 	      return __arr;
! 	    }
! 	  else
! 	    return [&__a]<size_t... _Idx>(index_sequence<_Idx...>) {
! 	      return array<remove_cv_t<_Tp>, _Nm>{{ std::move(__a[_Idx])... }};
! 	    }(make_index_sequence<_Nm>{});
! 	}
!       else
! 	__builtin_unreachable(); // FIXME: see PR c++/91388
      }
  #endif // C++20
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/atomic gcc-12.4.0/libstdc++-v3/include/std/atomic
*** gcc-12.3.0/libstdc++-v3/include/std/atomic	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/atomic	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 181,191 ****
  #endif // __cpp_lib_atomic_wait
    };
  
! #if __cplusplus <= 201703L
! # define _GLIBCXX20_INIT(I)
! #else
  # define _GLIBCXX20_INIT(I) = I
  #endif
  
    /**
     *  @brief Generic atomic type, primary class template.
--- 181,193 ----
  #endif // __cpp_lib_atomic_wait
    };
  
! /// @cond undocumented
! #if __cpp_lib_atomic_value_initialization
  # define _GLIBCXX20_INIT(I) = I
+ #else
+ # define _GLIBCXX20_INIT(I)
  #endif
+ /// @endcond
  
    /**
     *  @brief Generic atomic type, primary class template.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/charconv gcc-12.4.0/libstdc++-v3/include/std/charconv
*** gcc-12.3.0/libstdc++-v3/include/std/charconv	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/charconv	Thu Jun 20 08:08:10 2024
*************** namespace __detail
*** 236,242 ****
        static_assert(is_unsigned<_Tp>::value, "implementation bug");
  
        to_chars_result __res;
!       unsigned __len;
  
        if _GLIBCXX17_CONSTEXPR (__gnu_cxx::__int_traits<_Tp>::__digits <= 16)
  	{
--- 236,242 ----
        static_assert(is_unsigned<_Tp>::value, "implementation bug");
  
        to_chars_result __res;
!       unsigned __len = 0;
  
        if _GLIBCXX17_CONSTEXPR (__gnu_cxx::__int_traits<_Tp>::__digits <= 16)
  	{
*************** namespace __detail
*** 458,464 ****
  
        // __glibcxx_assert((__base & (__base - 1)) == 0);
        // __glibcxx_assert(_DecOnly ? __base <= 8 : __base <= 32);
!       const int __log2_base = __countr_zero(__base);
  
        const ptrdiff_t __len = __last - __first;
        ptrdiff_t __i = 0;
--- 458,464 ----
  
        // __glibcxx_assert((__base & (__base - 1)) == 0);
        // __glibcxx_assert(_DecOnly ? __base <= 8 : __base <= 32);
!       const int __log2_base = __countr_zero(unsigned(__base & 0x3f));
  
        const ptrdiff_t __len = __last - __first;
        ptrdiff_t __i = 0;
*************** namespace __detail
*** 510,518 ****
      __from_chars_alnum(const char*& __first, const char* __last, _Tp& __val,
  		       int __base)
      {
!       // __glibcxx_assert(!_DecOnly || __base <= 10);
  
!       const int __bits_per_digit = __bit_width(__base);
        int __unused_bits_lower_bound = __gnu_cxx::__int_traits<_Tp>::__digits;
        for (; __first != __last; ++__first)
  	{
--- 510,518 ----
      __from_chars_alnum(const char*& __first, const char* __last, _Tp& __val,
  		       int __base)
      {
!       // __glibcxx_assert(_DecOnly ? __base <= 10 : __base <= 36);
  
!       const int __bits_per_digit = __bit_width(unsigned(__base & 0x3f));
        int __unused_bits_lower_bound = __gnu_cxx::__int_traits<_Tp>::__digits;
        for (; __first != __last; ++__first)
  	{
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/chrono gcc-12.4.0/libstdc++-v3/include/std/chrono
*** gcc-12.3.0/libstdc++-v3/include/std/chrono	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/chrono	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 134,151 ****
  
      namespace __detail
      {
!       // Compute the remainder of the Euclidean division of __n divided by __d.
!       // Euclidean division truncates toward negative infinity and always
!       // produces a remainder in the range of [0,__d-1] (whereas standard
!       // division truncates toward zero and yields a nonpositive remainder
!       // for negative __n).
        constexpr unsigned
!       __modulo(long long __n, unsigned __d)
        {
! 	if (__n >= 0)
! 	  return __n % __d;
! 	else
! 	  return (__d + (__n % __d)) % __d;
        }
  
        inline constexpr unsigned __days_per_month[12]
--- 134,180 ----
  
      namespace __detail
      {
!       // Helper to __add_modulo and __sub_modulo.
!       template <unsigned __d, typename _Tp>
!       consteval auto
!       __modulo_offset()
!       {
! 	using _Up = make_unsigned_t<_Tp>;
! 	auto constexpr __a = _Up(-1) - _Up(255 + __d - 2);
! 	auto constexpr __b = _Up(__d * (__a / __d) - 1);
! 	// Notice: b <= a - 1 <= _Up(-1) - (255 + d - 1) and b % d = d - 1.
! 	return _Up(-1) - __b; // >= 255 + d - 1
!       }
! 
!       // Compute the remainder of the Euclidean division of __x + __y divided by
!       // __d without overflowing.  Typically, __x <= 255 + d - 1 is sum of
!       // weekday/month with a shift in [0, d - 1] and __y is a duration count.
!       template <unsigned __d, typename _Tp>
        constexpr unsigned
!       __add_modulo(unsigned __x, _Tp __y)
        {
! 	using _Up = make_unsigned_t<_Tp>;
! 	// For __y >= 0, _Up(__y) has the same mathematical value as __y and
! 	// this function simply returns (__x + _Up(__y)) % d.  Typically, this
! 	// doesn't overflow since the range of _Up contains many more positive
! 	// values than _Tp's.  For __y < 0, _Up(__y) has a mathematical value in
! 	// the upper-half range of _Up so that adding a positive value to it
! 	// might overflow.  Moreover, most likely, _Up(__y) != __y mod d.  To
! 	// fix both issues we subtract from _Up(__y) an __offset >=
! 	// 255 + d - 1 to make room for the addition to __x and shift the modulo
! 	// to the correct value.
! 	auto const __offset = __y >= 0 ? _Up(0) : __modulo_offset<__d, _Tp>();
! 	return (__x + _Up(__y) - __offset) % __d;
!       }
! 
!       // Similar to __add_modulo but for __x - __y.
!       template <unsigned __d, typename _Tp>
!       constexpr unsigned
!       __sub_modulo(unsigned __x, _Tp __y)
!       {
! 	using _Up = make_unsigned_t<_Tp>;
! 	auto const __offset = __y <= 0 ? _Up(0) : __modulo_offset<__d, _Tp>();
! 	return (__x - _Up(__y) - __offset) % __d;
        }
  
        inline constexpr unsigned __days_per_month[12]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 339,346 ****
        friend constexpr month
        operator+(const month& __x, const months& __y) noexcept
        {
! 	auto __n = static_cast<long long>(unsigned{__x}) + (__y.count() - 1);
! 	return month{__detail::__modulo(__n, 12) + 1};
        }
  
        friend constexpr month
--- 368,377 ----
        friend constexpr month
        operator+(const month& __x, const months& __y) noexcept
        {
! 	// modulo(x + (y - 1), 12) = modulo(x + (y - 1) + 12, 12)
! 	//                         = modulo((x + 11) + y    , 12)
! 	return month{1 + __detail::__add_modulo<12>(
! 	  unsigned{__x} + 11, __y.count())};
        }
  
        friend constexpr month
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 349,355 ****
  
        friend constexpr month
        operator-(const month& __x, const months& __y) noexcept
!       { return __x + -__y; }
  
        friend constexpr months
        operator-(const month& __x,  const month& __y) noexcept
--- 380,391 ----
  
        friend constexpr month
        operator-(const month& __x, const months& __y) noexcept
!       {
! 	// modulo(x + (-y - 1), 12) = modulo(x + (-y - 1) + 12, 12)
! 	//                          = modulo((x + 11) - y     , 12)
! 	return month{1 + __detail::__sub_modulo<12>(
! 	  unsigned{__x} + 11, __y.count())};
!       }
  
        friend constexpr months
        operator-(const month& __x,  const month& __y) noexcept
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 476,504 ****
        constexpr bool
        is_leap() const noexcept
        {
! 	// Testing divisibility by 100 first gives better performance, that is,
! 	// return (_M_y % 100 != 0 || _M_y % 400 == 0) && _M_y % 4 == 0;
! 
! 	// It gets even faster if _M_y is in [-536870800, 536870999]
! 	// (which is the case here) and _M_y % 100 is replaced by
! 	// __is_multiple_of_100 below.
  
  	// References:
  	// [1] https://github.com/cassioneri/calendar
! 	// [2] https://accu.org/journals/overload/28/155/overload155.pdf#page=16
! 
! 	// Furthermore, if y%100 == 0, then y%400==0 is equivalent to y%16==0,
! 	// so we can simplify it to (!mult_100 && y % 4 == 0) || y % 16 == 0,
! 	// which is equivalent to (y & (mult_100 ? 15 : 3)) == 0.
! 	// See https://gcc.gnu.org/pipermail/libstdc++/2021-June/052815.html
  
! 	constexpr uint32_t __multiplier   = 42949673;
! 	constexpr uint32_t __bound        = 42949669;
! 	constexpr uint32_t __max_dividend = 1073741799;
! 	constexpr uint32_t __offset       = __max_dividend / 2 / 100 * 100;
! 	const bool __is_multiple_of_100
! 	  = __multiplier * (_M_y + __offset) < __bound;
! 	return (_M_y & (__is_multiple_of_100 ? 15 : 3)) == 0;
        }
  
        explicit constexpr
--- 512,540 ----
        constexpr bool
        is_leap() const noexcept
        {
! 	// Testing divisibility by 100 first gives better performance [1], i.e.,
! 	//     return _M_y % 100 == 0 ? _M_y % 400 == 0 : _M_y % 16 == 0;
! 	// Furthermore, if _M_y % 100 == 0, then _M_y % 400 == 0 is equivalent
! 	// to _M_y % 16 == 0, so we can simplify it to
! 	//     return _M_y % 100 == 0 ? _M_y % 16 == 0 : _M_y % 4 == 0.  // #1
! 	// Similarly, we can replace 100 with 25 (which is good since
! 	// _M_y % 25 == 0 requires one fewer instruction than _M_y % 100 == 0
! 	// [2]):
! 	//     return _M_y % 25 == 0 ? _M_y % 16 == 0 : _M_y % 4 == 0.  // #2
! 	// Indeed, first assume _M_y % 4 != 0.  Then _M_y % 16 != 0 and hence,
! 	// _M_y % 4 == 0 and _M_y % 16 == 0 are both false.  Therefore, #2
! 	// returns false as it should (regardless of _M_y % 25.) Now assume
! 	// _M_y % 4 == 0.  In this case, _M_y % 25 == 0 if, and only if,
! 	// _M_y % 100 == 0, that is, #1 and #2 are equivalent.  Finally, #2 is
! 	// equivalent to
! 	//     return (_M_y & (_M_y % 25 == 0 ? 15 : 3)) == 0.
  
  	// References:
  	// [1] https://github.com/cassioneri/calendar
! 	// [2] https://godbolt.org/z/55G8rn77e
! 	// [3] https://gcc.gnu.org/pipermail/libstdc++/2021-June/052815.html
  
! 	return (_M_y & (_M_y % 25 == 0 ? 15 : 3)) == 0;
        }
  
        explicit constexpr
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 573,580 ****
        static constexpr weekday
        _S_from_days(const days& __d)
        {
! 	auto __n = __d.count();
! 	return weekday(__n >= -4 ? (__n + 4) % 7 : (__n + 5) % 7 + 6);
        }
  
      public:
--- 609,615 ----
        static constexpr weekday
        _S_from_days(const days& __d)
        {
! 	return weekday{__detail::__add_modulo<7>(4, __d.count())};
        }
  
      public:
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 664,671 ****
        friend constexpr weekday
        operator+(const weekday& __x, const days& __y) noexcept
        {
! 	auto __n = static_cast<long long>(__x._M_wd) + __y.count();
! 	return weekday{__detail::__modulo(__n, 7)};
        }
  
        friend constexpr weekday
--- 699,705 ----
        friend constexpr weekday
        operator+(const weekday& __x, const days& __y) noexcept
        {
! 	return weekday{__detail::__add_modulo<7>(__x._M_wd, __y.count())};
        }
  
        friend constexpr weekday
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 674,686 ****
  
        friend constexpr weekday
        operator-(const weekday& __x, const days& __y) noexcept
!       { return __x + -__y; }
  
        friend constexpr days
        operator-(const weekday& __x, const weekday& __y) noexcept
        {
! 	auto __n = static_cast<long long>(__x._M_wd) - __y._M_wd;
! 	return days{__detail::__modulo(__n, 7)};
        }
  
        // TODO: operator<<, from_stream.
--- 708,722 ----
  
        friend constexpr weekday
        operator-(const weekday& __x, const days& __y) noexcept
!       {
! 	return weekday{__detail::__sub_modulo<7>(__x._M_wd, __y.count())};
!       }
  
        friend constexpr days
        operator-(const weekday& __x, const weekday& __y) noexcept
        {
! 	const auto __n = __x.c_encoding() - __y.c_encoding();
! 	return static_cast<int>(__n) >= 0 ? days{__n} : days{__n + 7};
        }
  
        // TODO: operator<<, from_stream.
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1461,1482 ****
        {
  	const auto __m = static_cast<unsigned>(month());
  
! 	// Excluding February, the last day of month __m is either 30 or 31 or,
! 	// in another words, it is 30 + b = 30 | b, where b is in {0, 1}.
  
! 	// If __m in {1, 3, 4, 5, 6, 7}, then b is 1 if, and only if __m is odd.
! 	// Hence, b = __m & 1 = (__m ^ 0) & 1.
  
! 	// If __m in {8, 9, 10, 11, 12}, then b is 1 if, and only if __m is even.
! 	// Hence, b = (__m ^ 1) & 1.
  
  	// Therefore, b = (__m ^ c) & 1, where c = 0, if __m < 8, or c = 1 if
  	// __m >= 8, that is, c = __m >> 3.
  
! 	// The above mathematically justifies this implementation whose
! 	// performance does not depend on look-up tables being on the L1 cache.
! 	return chrono::day{__m != 2 ? ((__m ^ (__m >> 3)) & 1) | 30
! 				    : _M_y.is_leap() ? 29 : 28};
        }
  
        constexpr
--- 1497,1522 ----
        {
  	const auto __m = static_cast<unsigned>(month());
  
! 	// The result is unspecified if __m < 1 or __m > 12.  Hence, assume
! 	// 1 <= __m <= 12.  For __m != 2, day() == 30 or day() == 31 or, in
! 	// other words, day () == 30 | b, where b is in {0, 1}.
  
! 	// If __m in {1, 3, 4, 5, 6, 7}, then b is 1 if, and only if, __m is
! 	// odd.  Hence, b = __m & 1 = (__m ^ 0) & 1.
  
! 	// If __m in {8, 9, 10, 11, 12}, then b is 1 if, and only if, __m is
! 	// even.  Hence, b = (__m ^ 1) & 1.
  
  	// Therefore, b = (__m ^ c) & 1, where c = 0, if __m < 8, or c = 1 if
  	// __m >= 8, that is, c = __m >> 3.
  
! 	// Since 30 = (11110)_2 and __m <= 31 = (11111)_2, the "& 1" in b's
! 	// calculation is unnecessary.
! 
! 	// The performance of this implementation does not depend on look-up
! 	// tables being on the L1 cache.
! 	return chrono::day{__m != 2 ? (__m ^ (__m >> 3)) | 30
! 	  : _M_y.is_leap() ? 29 : 28};
        }
  
        constexpr
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/complex gcc-12.4.0/libstdc++-v3/include/std/complex
*** gcc-12.3.0/libstdc++-v3/include/std/complex	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/complex	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1098,1103 ****
--- 1098,1107 ----
        }
  #endif
  
+ #if __cplusplus >= 201103L
+       _GLIBCXX14_CONSTEXPR complex(const complex&) = default;
+ #endif
+ 
        explicit _GLIBCXX_CONSTEXPR complex(const complex<double>&);
        explicit _GLIBCXX_CONSTEXPR complex(const complex<long double>&);
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1244,1249 ****
--- 1248,1257 ----
        }
  #endif
  
+ #if __cplusplus >= 201103L
+       _GLIBCXX14_CONSTEXPR complex(const complex&) = default;
+ #endif
+ 
        _GLIBCXX_CONSTEXPR complex(const complex<float>& __z)
        : _M_value(__z.__rep()) { }
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1391,1396 ****
--- 1399,1408 ----
        }
  #endif
  
+ #if __cplusplus >= 201103L
+       _GLIBCXX14_CONSTEXPR complex(const complex&) = default;
+ #endif
+ 
        _GLIBCXX_CONSTEXPR complex(const complex<float>& __z)
        : _M_value(__z.__rep()) { }
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/condition_variable gcc-12.4.0/libstdc++-v3/include/std/condition_variable
*** gcc-12.3.0/libstdc++-v3/include/std/condition_variable	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/condition_variable	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 234,240 ****
      void (*_M_cb)(void*);
    };
  
!   inline namespace _V2 {
  
    /// condition_variable_any
    // Like above, but mutex is not required to have try_lock.
--- 234,240 ----
      void (*_M_cb)(void*);
    };
  
! _GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(_V2)
  
    /// condition_variable_any
    // Like above, but mutex is not required to have try_lock.
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 439,445 ****
  #endif
    };
  
!   } // end inline namespace
  
    /// @} group condition_variables
  _GLIBCXX_END_NAMESPACE_VERSION
--- 439,445 ----
  #endif
    };
  
! _GLIBCXX_END_INLINE_ABI_NAMESPACE(_V2)
  
    /// @} group condition_variables
  _GLIBCXX_END_NAMESPACE_VERSION
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/filesystem gcc-12.4.0/libstdc++-v3/include/std/filesystem
*** gcc-12.3.0/libstdc++-v3/include/std/filesystem	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/filesystem	Thu Jun 20 08:08:10 2024
***************
*** 39,44 ****
--- 39,46 ----
   *
   * Utilities for performing operations on file systems and their components,
   * such as paths, regular files, and directories.
+  *
+  * @since C++17
   */
  
  #include <bits/fs_fwd.h>
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/future gcc-12.4.0/libstdc++-v3/include/std/future
*** gcc-12.3.0/libstdc++-v3/include/std/future	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/future	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 623,632 ****
        class _Async_state_impl;
  
      template<typename _Signature>
!       class _Task_state_base;
  
      template<typename _Fn, typename _Alloc, typename _Signature>
!       class _Task_state;
  
      template<typename _Res_ptr, typename _Fn,
  	     typename _Res = typename _Res_ptr::element_type::result_type>
--- 623,632 ----
        class _Async_state_impl;
  
      template<typename _Signature>
!       struct _Task_state_base;
  
      template<typename _Fn, typename _Alloc, typename _Signature>
!       struct _Task_state;
  
      template<typename _Res_ptr, typename _Fn,
  	     typename _Res = typename _Res_ptr::element_type::result_type>
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/iomanip gcc-12.4.0/libstdc++-v3/include/std/iomanip
*** gcc-12.3.0/libstdc++-v3/include/std/iomanip	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/iomanip	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 455,460 ****
--- 455,461 ----
     * @param __string String to quote.
     * @param __delim  Character to quote string with.
     * @param __escape Escape character to escape itself or quote character.
+    * @since C++14
     */
    template<typename _CharT>
      inline auto
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/mutex gcc-12.4.0/libstdc++-v3/include/std/mutex
*** gcc-12.3.0/libstdc++-v3/include/std/mutex	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/mutex	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 62,67 ****
--- 62,68 ----
     */
  
  #ifdef _GLIBCXX_HAS_GTHREADS
+   /// @cond undocumented
  
    // Common base class for std::recursive_mutex and std::recursive_timed_mutex
    class __recursive_mutex_base
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 89,96 ****
      { __gthread_recursive_mutex_destroy(&_M_mutex); }
  #endif
    };
  
!   /// The standard recursive mutex type.
    class recursive_mutex : private __recursive_mutex_base
    {
    public:
--- 90,106 ----
      { __gthread_recursive_mutex_destroy(&_M_mutex); }
  #endif
    };
+   /// @endcond
  
!   /** The standard recursive mutex type.
!    *
!    * A recursive mutex can be locked more than once by the same thread.
!    * Other threads cannot lock the mutex until the owning thread unlocks it
!    * as many times as it was locked.
!    *
!    * @headerfile mutex
!    * @since C++11
!    */
    class recursive_mutex : private __recursive_mutex_base
    {
    public:
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 132,137 ****
--- 142,149 ----
    };
  
  #if _GTHREAD_USE_MUTEX_TIMEDLOCK
+   /// @cond undocumented
+ 
    template<typename _Derived>
      class __timed_mutex_impl
      {
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 207,214 ****
  	  return false;
  	}
      };
  
!   /// The standard timed mutex type.
    class timed_mutex
    : private __mutex_base, public __timed_mutex_impl<timed_mutex>
    {
--- 219,234 ----
  	  return false;
  	}
      };
+   /// @endcond
  
!   /** The standard timed mutex type.
!    *
!    * A non-recursive mutex that supports a timeout when trying to acquire the
!    * lock.
!    *
!    * @headerfile mutex
!    * @since C++11
!    */
    class timed_mutex
    : private __mutex_base, public __timed_mutex_impl<timed_mutex>
    {
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 268,279 ****
  
  #if _GLIBCXX_USE_PTHREAD_MUTEX_CLOCKLOCK
        bool
!       _M_clocklock(clockid_t clockid, const __gthread_time_t& __ts)
!       { return !pthread_mutex_clocklock(&_M_mutex, clockid, &__ts); }
  #endif
    };
  
!   /// recursive_timed_mutex
    class recursive_timed_mutex
    : private __recursive_mutex_base,
      public __timed_mutex_impl<recursive_timed_mutex>
--- 288,308 ----
  
  #if _GLIBCXX_USE_PTHREAD_MUTEX_CLOCKLOCK
        bool
!       _M_clocklock(clockid_t __clockid, const __gthread_time_t& __ts)
!       { return !pthread_mutex_clocklock(&_M_mutex, __clockid, &__ts); }
  #endif
    };
  
!   /** The standard recursive timed mutex type.
!    *
!    * A recursive mutex that supports a timeout when trying to acquire the
!    * lock. A recursive mutex can be locked more than once by the same thread.
!    * Other threads cannot lock the mutex until the owning thread unlocks it
!    * as many times as it was locked.
!    *
!    * @headerfile mutex
!    * @since C++11
!    */
    class recursive_timed_mutex
    : private __recursive_mutex_base,
      public __timed_mutex_impl<recursive_timed_mutex>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 334,341 ****
  
  #ifdef _GLIBCXX_USE_PTHREAD_MUTEX_CLOCKLOCK
        bool
!       _M_clocklock(clockid_t clockid, const __gthread_time_t& __ts)
!       { return !pthread_mutex_clocklock(&_M_mutex, clockid, &__ts); }
  #endif
    };
  
--- 363,370 ----
  
  #ifdef _GLIBCXX_USE_PTHREAD_MUTEX_CLOCKLOCK
        bool
!       _M_clocklock(clockid_t __clockid, const __gthread_time_t& __ts)
!       { return !pthread_mutex_clocklock(&_M_mutex, __clockid, &__ts); }
  #endif
    };
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 687,692 ****
--- 716,724 ----
     *
     * A scoped_lock controls mutex ownership within a scope, releasing
     * ownership in the destructor.
+    *
+    * @headerfile mutex
+    * @since C++17
     */
    template<typename... _MutexTypes>
      class scoped_lock
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/optional gcc-12.4.0/libstdc++-v3/include/std/optional
*** gcc-12.3.0/libstdc++-v3/include/std/optional	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/optional	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1420,1426 ****
  #ifdef __cpp_lib_three_way_comparison
    template<typename _Tp, typename _Up>
      requires (!__is_optional_v<_Up>)
!       && three_way_comparable_with<_Tp, _Up>
      constexpr compare_three_way_result_t<_Tp, _Up>
      operator<=>(const optional<_Tp>& __x, const _Up& __v)
      { return bool(__x) ? *__x <=> __v : strong_ordering::less; }
--- 1420,1426 ----
  #ifdef __cpp_lib_three_way_comparison
    template<typename _Tp, typename _Up>
      requires (!__is_optional_v<_Up>)
!       && three_way_comparable_with<_Up, _Tp>
      constexpr compare_three_way_result_t<_Tp, _Up>
      operator<=>(const optional<_Tp>& __x, const _Up& __v)
      { return bool(__x) ? *__x <=> __v : strong_ordering::less; }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/ratio gcc-12.4.0/libstdc++-v3/include/std/ratio
*** gcc-12.3.0/libstdc++-v3/include/std/ratio	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/ratio	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 289,297 ****
--- 289,331 ----
  
    /// @cond undocumented
  
+   template<typename _Tp>
+     struct __is_ratio
+     : std::false_type
+     { };
+ 
+   template<intmax_t _Num, intmax_t _Den>
+     struct __is_ratio<ratio<_Num, _Den>>
+     : std::true_type
+     { };
+ 
+ #if __cpp_variable_templates
+   template<typename _Tp>
+     constexpr bool __is_ratio_v = false;
+   template<intmax_t _Num, intmax_t _Den>
+     constexpr bool __is_ratio_v<ratio<_Num, _Den>> = true;
+ #endif
+ 
+   template<typename _R1, typename _R2>
+     constexpr bool
+     __are_both_ratios() noexcept
+     {
+ #if __cpp_variable_templates && __cpp_if_constexpr
+       if constexpr (__is_ratio_v<_R1>)
+ 	if constexpr (__is_ratio_v<_R2>)
+ 	  return true;
+       return false;
+ #else
+       return __and_<__is_ratio<_R1>, __is_ratio<_R2>>::value;
+ #endif
+     }
+ 
    template<typename _R1, typename _R2>
      struct __ratio_multiply
      {
+       static_assert(std::__are_both_ratios<_R1, _R2>(),
+ 		    "both template arguments must be a std::ratio");
+ 
      private:
        static const intmax_t __gcd1 =
          __static_gcd<_R1::num, _R2::den>::value;
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 356,362 ****
    template<typename _R1, typename _R2>
      struct ratio_equal
      : integral_constant<bool, _R1::num == _R2::num && _R1::den == _R2::den>
!     { };
  
    /// ratio_not_equal
    template<typename _R1, typename _R2>
--- 390,399 ----
    template<typename _R1, typename _R2>
      struct ratio_equal
      : integral_constant<bool, _R1::num == _R2::num && _R1::den == _R2::den>
!     {
!       static_assert(std::__are_both_ratios<_R1, _R2>(),
! 		    "both template arguments must be a std::ratio");
!     };
  
    /// ratio_not_equal
    template<typename _R1, typename _R2>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 402,408 ****
    template<typename _R1, typename _R2>
      struct ratio_less
      : __ratio_less_impl<_R1, _R2>::type
!     { };
  
    /// ratio_less_equal
    template<typename _R1, typename _R2>
--- 439,448 ----
    template<typename _R1, typename _R2>
      struct ratio_less
      : __ratio_less_impl<_R1, _R2>::type
!     {
!       static_assert(std::__are_both_ratios<_R1, _R2>(),
! 		    "both template arguments must be a std::ratio");
!     };
  
    /// ratio_less_equal
    template<typename _R1, typename _R2>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 430,442 ****
    template <typename _R1, typename _R2>
      inline constexpr bool ratio_less_v = ratio_less<_R1, _R2>::value;
    template <typename _R1, typename _R2>
!     inline constexpr bool ratio_less_equal_v =
!       ratio_less_equal<_R1, _R2>::value;
    template <typename _R1, typename _R2>
      inline constexpr bool ratio_greater_v = ratio_greater<_R1, _R2>::value;
    template <typename _R1, typename _R2>
      inline constexpr bool ratio_greater_equal_v
!     = ratio_greater_equal<_R1, _R2>::value;
  #endif // C++17
  
    /// @cond undocumented
--- 470,482 ----
    template <typename _R1, typename _R2>
      inline constexpr bool ratio_less_v = ratio_less<_R1, _R2>::value;
    template <typename _R1, typename _R2>
!     inline constexpr bool ratio_less_equal_v
!       = ratio_less_equal<_R1, _R2>::value;
    template <typename _R1, typename _R2>
      inline constexpr bool ratio_greater_v = ratio_greater<_R1, _R2>::value;
    template <typename _R1, typename _R2>
      inline constexpr bool ratio_greater_equal_v
!       = ratio_greater_equal<_R1, _R2>::value;
  #endif // C++17
  
    /// @cond undocumented
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 513,518 ****
--- 553,561 ----
    template<typename _R1, typename _R2>
      struct __ratio_add
      {
+       static_assert(std::__are_both_ratios<_R1, _R2>(),
+ 		    "both template arguments must be a std::ratio");
+ 
        typedef typename __ratio_add_impl<_R1, _R2>::type type;
        static constexpr intmax_t num = type::num;
        static constexpr intmax_t den = type::den;
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/scoped_allocator gcc-12.4.0/libstdc++-v3/include/std/scoped_allocator
*** gcc-12.3.0/libstdc++-v3/include/std/scoped_allocator	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/scoped_allocator	Thu Jun 20 08:08:10 2024
***************
*** 24,30 ****
  
  /** @file include/scoped_allocator
   *  This is a Standard C++ Library header.
-  *  @ingroup allocators
   */
  
  #ifndef _SCOPED_ALLOCATOR
--- 24,29 ----
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 66,72 ****
      struct __outermost_type
      {
        using type = _Alloc;
!       static type& _S_outermost(_Alloc& __a) { return __a; }
      };
  
    template<typename _Alloc>
--- 65,71 ----
      struct __outermost_type
      {
        using type = _Alloc;
!       static type& _S_outermost(_Alloc& __a) noexcept { return __a; }
      };
  
    template<typename _Alloc>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 80,86 ****
        >;
  
        static typename __base::type&
!       _S_outermost(_Alloc& __a)
        { return __base::_S_outermost(__a.outer_allocator()); }
      };
  
--- 79,85 ----
        >;
  
        static typename __base::type&
!       _S_outermost(_Alloc& __a) noexcept
        { return __base::_S_outermost(__a.outer_allocator()); }
      };
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 105,115 ****
        __inner_type_impl& operator=(__inner_type_impl&&) = default;
  
        template<typename _Alloc>
!       __inner_type_impl(const __inner_type_impl<_Alloc>& __other)
        { }
  
        template<typename _Alloc>
!       __inner_type_impl(__inner_type_impl<_Alloc>&& __other)
        { }
  
        __type&
--- 104,114 ----
        __inner_type_impl& operator=(__inner_type_impl&&) = default;
  
        template<typename _Alloc>
!       __inner_type_impl(const __inner_type_impl<_Alloc>& __other) noexcept
        { }
  
        template<typename _Alloc>
!       __inner_type_impl(__inner_type_impl<_Alloc>&& __other) noexcept
        { }
  
        __type&
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 138,153 ****
        __inner_type_impl& operator=(__inner_type_impl&&) = default;
  
        template<typename... _Allocs>
!       __inner_type_impl(const __inner_type_impl<_Allocs...>& __other)
        : _M_inner(__other._M_inner) { }
  
        template<typename... _Allocs>
!       __inner_type_impl(__inner_type_impl<_Allocs...>&& __other)
        : _M_inner(std::move(__other._M_inner)) { }
  
      template<typename... _Args>
        explicit
!       __inner_type_impl(_Args&&... __args)
        : _M_inner(std::forward<_Args>(__args)...) { }
  
        __type&
--- 137,152 ----
        __inner_type_impl& operator=(__inner_type_impl&&) = default;
  
        template<typename... _Allocs>
!       __inner_type_impl(const __inner_type_impl<_Allocs...>& __other) noexcept
        : _M_inner(__other._M_inner) { }
  
        template<typename... _Allocs>
!       __inner_type_impl(__inner_type_impl<_Allocs...>&& __other) noexcept
        : _M_inner(std::move(__other._M_inner)) { }
  
      template<typename... _Args>
        explicit
!       __inner_type_impl(_Args&&... __args) noexcept
        : _M_inner(std::forward<_Args>(__args)...) { }
  
        __type&
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 165,171 ****
        { return _M_inner == __other._M_inner; }
  
      private:
!       template<typename...> friend class __inner_type_impl;
        template<typename, typename...> friend class scoped_allocator_adaptor;
  
        __type _M_inner;
--- 164,170 ----
        { return _M_inner == __other._M_inner; }
  
      private:
!       template<typename...> friend struct __inner_type_impl;
        template<typename, typename...> friend class scoped_allocator_adaptor;
  
        __type _M_inner;
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 187,193 ****
          friend class scoped_allocator_adaptor;
  
        template<typename...>
!         friend class __inner_type_impl;
  
        tuple<const _OuterAlloc&, const _InnerAllocs&...>
        _M_tie() const noexcept
--- 186,192 ----
          friend class scoped_allocator_adaptor;
  
        template<typename...>
! 	friend struct __inner_type_impl;
  
        tuple<const _OuterAlloc&, const _InnerAllocs&...>
        _M_tie() const noexcept
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 308,338 ****
  
        template<typename _Outer2, typename = _Constructible<_Outer2>>
          scoped_allocator_adaptor(_Outer2&& __outer,
!                                  const _InnerAllocs&... __inner)
          : _OuterAlloc(std::forward<_Outer2>(__outer)),
            _M_inner(__inner...)
          { }
  
!       scoped_allocator_adaptor(const scoped_allocator_adaptor& __other)
        : _OuterAlloc(__other.outer_allocator()),
  	_M_inner(__other._M_inner)
        { }
  
!       scoped_allocator_adaptor(scoped_allocator_adaptor&& __other)
        : _OuterAlloc(std::move(__other.outer_allocator())),
  	_M_inner(std::move(__other._M_inner))
        { }
  
        template<typename _Outer2, typename = _Constructible<const _Outer2&>>
          scoped_allocator_adaptor(
!             const scoped_allocator_adaptor<_Outer2, _InnerAllocs...>& __other)
          : _OuterAlloc(__other.outer_allocator()),
            _M_inner(__other._M_inner)
          { }
  
        template<typename _Outer2, typename = _Constructible<_Outer2>>
          scoped_allocator_adaptor(
!             scoped_allocator_adaptor<_Outer2, _InnerAllocs...>&& __other)
          : _OuterAlloc(std::move(__other.outer_allocator())),
            _M_inner(std::move(__other._M_inner))
          { }
--- 307,338 ----
  
        template<typename _Outer2, typename = _Constructible<_Outer2>>
          scoped_allocator_adaptor(_Outer2&& __outer,
!                                  const _InnerAllocs&... __inner) noexcept
          : _OuterAlloc(std::forward<_Outer2>(__outer)),
            _M_inner(__inner...)
          { }
  
!       scoped_allocator_adaptor(const scoped_allocator_adaptor& __other) noexcept
        : _OuterAlloc(__other.outer_allocator()),
  	_M_inner(__other._M_inner)
        { }
  
!       scoped_allocator_adaptor(scoped_allocator_adaptor&& __other) noexcept
        : _OuterAlloc(std::move(__other.outer_allocator())),
  	_M_inner(std::move(__other._M_inner))
        { }
  
        template<typename _Outer2, typename = _Constructible<const _Outer2&>>
          scoped_allocator_adaptor(
! 	  const scoped_allocator_adaptor<_Outer2, _InnerAllocs...>& __other
! 	) noexcept
          : _OuterAlloc(__other.outer_allocator()),
            _M_inner(__other._M_inner)
          { }
  
        template<typename _Outer2, typename = _Constructible<_Outer2>>
          scoped_allocator_adaptor(
! 	  scoped_allocator_adaptor<_Outer2, _InnerAllocs...>&& __other) noexcept
          : _OuterAlloc(std::move(__other.outer_allocator())),
            _M_inner(std::move(__other._M_inner))
          { }
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 343,367 ****
        scoped_allocator_adaptor&
        operator=(scoped_allocator_adaptor&&) = default;
  
!       inner_allocator_type& inner_allocator() noexcept
        { return _M_inner._M_get(this); }
  
!       const inner_allocator_type& inner_allocator() const noexcept
        { return _M_inner._M_get(this); }
  
!       outer_allocator_type& outer_allocator() noexcept
        { return static_cast<_OuterAlloc&>(*this); }
  
!       const outer_allocator_type& outer_allocator() const noexcept
        { return static_cast<const _OuterAlloc&>(*this); }
  
!       _GLIBCXX_NODISCARD pointer allocate(size_type __n)
        { return __traits::allocate(outer_allocator(), __n); }
  
!       _GLIBCXX_NODISCARD pointer allocate(size_type __n, const_void_pointer __hint)
        { return __traits::allocate(outer_allocator(), __n, __hint); }
  
!       void deallocate(pointer __p, size_type __n)
        { return __traits::deallocate(outer_allocator(), __p, __n); }
  
        size_type max_size() const
--- 343,373 ----
        scoped_allocator_adaptor&
        operator=(scoped_allocator_adaptor&&) = default;
  
!       inner_allocator_type&
!       inner_allocator() noexcept
        { return _M_inner._M_get(this); }
  
!       const inner_allocator_type&
!       inner_allocator() const noexcept
        { return _M_inner._M_get(this); }
  
!       outer_allocator_type&
!       outer_allocator() noexcept
        { return static_cast<_OuterAlloc&>(*this); }
  
!       const outer_allocator_type&
!       outer_allocator() const noexcept
        { return static_cast<const _OuterAlloc&>(*this); }
  
!       _GLIBCXX_NODISCARD pointer
!       allocate(size_type __n)
        { return __traits::allocate(outer_allocator(), __n); }
  
!       _GLIBCXX_NODISCARD pointer
!       allocate(size_type __n, const_void_pointer __hint)
        { return __traits::allocate(outer_allocator(), __n, __hint); }
  
!       void deallocate(pointer __p, size_type __n) noexcept
        { return __traits::deallocate(outer_allocator(), __p, __n); }
  
        size_type max_size() const
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/shared_mutex gcc-12.4.0/libstdc++-v3/include/std/shared_mutex
*** gcc-12.3.0/libstdc++-v3/include/std/shared_mutex	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/shared_mutex	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 801,807 ****
        unlock()
        {
  	if (!_M_owns)
! 	  __throw_system_error(int(errc::resource_deadlock_would_occur));
  	_M_pm->unlock_shared();
  	_M_owns = false;
        }
--- 801,807 ----
        unlock()
        {
  	if (!_M_owns)
! 	  __throw_system_error(int(errc::operation_not_permitted));
  	_M_pm->unlock_shared();
  	_M_owns = false;
        }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/spanstream gcc-12.4.0/libstdc++-v3/include/std/spanstream
*** gcc-12.3.0/libstdc++-v3/include/std/spanstream	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/spanstream	Thu Jun 20 08:08:10 2024
*************** template<typename _CharT, typename _Trai
*** 134,140 ****
      basic_streambuf<_CharT, _Traits>*
      setbuf(_CharT* __s, streamsize __n) override
      {
!       span({__s, __n});
        return this;
      }
  
--- 134,141 ----
      basic_streambuf<_CharT, _Traits>*
      setbuf(_CharT* __s, streamsize __n) override
      {
!       __glibcxx_assert(__n >= 0);
!       this->span(std::span<_CharT>(__s, __n));
        return this;
      }
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/sstream gcc-12.4.0/libstdc++-v3/include/std/sstream
*** gcc-12.3.0/libstdc++-v3/include/std/sstream	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/sstream	Thu Jun 20 08:08:10 2024
***************
*** 41,50 ****
--- 41,55 ----
  
  #if __cplusplus > 201703L && _GLIBCXX_USE_CXX11_ABI
  # define _GLIBCXX_LVAL_REF_QUAL &
+ # define _GLIBCXX_SSTREAM_ALWAYS_INLINE
  #else
  # define _GLIBCXX_LVAL_REF_QUAL
+ // For symbols that are not exported from libstdc++.so for the COW string ABI.
+ # define _GLIBCXX_SSTREAM_ALWAYS_INLINE [[__gnu__::__always_inline__]]
  #endif
  
+ 
+ 
  namespace std _GLIBCXX_VISIBILITY(default)
  {
  _GLIBCXX_BEGIN_NAMESPACE_VERSION
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 249,255 ****
  	return __ret;
        }
  
! #if __cplusplus > 201703L && _GLIBCXX_USE_CXX11_ABI
  #if __cpp_concepts
        template<__allocator_like _SAlloc>
  	basic_string<_CharT, _Traits, _SAlloc>
--- 254,261 ----
  	return __ret;
        }
  
! #if __cplusplus > 201703L
! #if _GLIBCXX_USE_CXX11_ABI
  #if __cpp_concepts
        template<__allocator_like _SAlloc>
  	basic_string<_CharT, _Traits, _SAlloc>
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 273,279 ****
--- 279,287 ----
  	_M_sync(_M_string.data(), 0, 0);
  	return __str;
        }
+ #endif // cxx11 ABI
  
+       _GLIBCXX_SSTREAM_ALWAYS_INLINE
        basic_string_view<char_type, traits_type>
        view() const noexcept
        {
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 696,702 ****
        str() const _GLIBCXX_LVAL_REF_QUAL
        { return _M_stringbuf.str(); }
  
! #if __cplusplus > 201703L && _GLIBCXX_USE_CXX11_ABI
  #if __cpp_concepts
        template<__allocator_like _SAlloc>
  	basic_string<_CharT, _Traits, _SAlloc>
--- 704,711 ----
        str() const _GLIBCXX_LVAL_REF_QUAL
        { return _M_stringbuf.str(); }
  
! #if __cplusplus > 201703L
! #if _GLIBCXX_USE_CXX11_ABI
  #if __cpp_concepts
        template<__allocator_like _SAlloc>
  	basic_string<_CharT, _Traits, _SAlloc>
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 707,717 ****
        __string_type
        str() &&
        { return std::move(_M_stringbuf).str(); }
  
        basic_string_view<char_type, traits_type>
        view() const noexcept
        { return _M_stringbuf.view(); }
! #endif
  
        /**
         *  @brief  Setting a new buffer.
--- 716,728 ----
        __string_type
        str() &&
        { return std::move(_M_stringbuf).str(); }
+ #endif // cxx11 ABI
  
+       _GLIBCXX_SSTREAM_ALWAYS_INLINE
        basic_string_view<char_type, traits_type>
        view() const noexcept
        { return _M_stringbuf.view(); }
! #endif // C++20
  
        /**
         *  @brief  Setting a new buffer.
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 917,923 ****
        str() const _GLIBCXX_LVAL_REF_QUAL
        { return _M_stringbuf.str(); }
  
! #if __cplusplus > 201703L && _GLIBCXX_USE_CXX11_ABI
  #if __cpp_concepts
        template<__allocator_like _SAlloc>
  	basic_string<_CharT, _Traits, _SAlloc>
--- 928,935 ----
        str() const _GLIBCXX_LVAL_REF_QUAL
        { return _M_stringbuf.str(); }
  
! #if __cplusplus > 201703L
! #if _GLIBCXX_USE_CXX11_ABI
  #if __cpp_concepts
        template<__allocator_like _SAlloc>
  	basic_string<_CharT, _Traits, _SAlloc>
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 928,938 ****
        __string_type
        str() &&
        { return std::move(_M_stringbuf).str(); }
  
        basic_string_view<char_type, traits_type>
        view() const noexcept
        { return _M_stringbuf.view(); }
! #endif
  
        /**
         *  @brief  Setting a new buffer.
--- 940,952 ----
        __string_type
        str() &&
        { return std::move(_M_stringbuf).str(); }
+ #endif // cxx11 ABI
  
+       _GLIBCXX_SSTREAM_ALWAYS_INLINE
        basic_string_view<char_type, traits_type>
        view() const noexcept
        { return _M_stringbuf.view(); }
! #endif // C++20
  
        /**
         *  @brief  Setting a new buffer.
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 1136,1142 ****
        str() const _GLIBCXX_LVAL_REF_QUAL
        { return _M_stringbuf.str(); }
  
! #if __cplusplus > 201703L && _GLIBCXX_USE_CXX11_ABI
  #if __cpp_concepts
        template<__allocator_like _SAlloc>
  	basic_string<_CharT, _Traits, _SAlloc>
--- 1150,1157 ----
        str() const _GLIBCXX_LVAL_REF_QUAL
        { return _M_stringbuf.str(); }
  
! #if __cplusplus > 201703L
! #if _GLIBCXX_USE_CXX11_ABI
  #if __cpp_concepts
        template<__allocator_like _SAlloc>
  	basic_string<_CharT, _Traits, _SAlloc>
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 1147,1157 ****
        __string_type
        str() &&
        { return std::move(_M_stringbuf).str(); }
  
        basic_string_view<char_type, traits_type>
        view() const noexcept
        { return _M_stringbuf.view(); }
! #endif
  
        /**
         *  @brief  Setting a new buffer.
--- 1162,1174 ----
        __string_type
        str() &&
        { return std::move(_M_stringbuf).str(); }
+ #endif // cxx11 ABI
  
+       _GLIBCXX_SSTREAM_ALWAYS_INLINE
        basic_string_view<char_type, traits_type>
        view() const noexcept
        { return _M_stringbuf.view(); }
! #endif // C++20
  
        /**
         *  @brief  Setting a new buffer.
*************** _GLIBCXX_END_NAMESPACE_CXX11
*** 1213,1218 ****
--- 1230,1236 ----
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace
  
+ #undef _GLIBCXX_SSTREAM_ALWAYS_INLINE
  #undef _GLIBCXX_LVAL_REF_QUAL
  
  #include <bits/sstream.tcc>
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/stacktrace gcc-12.4.0/libstdc++-v3/include/std/stacktrace
*** gcc-12.3.0/libstdc++-v3/include/std/stacktrace	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/stacktrace	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 487,493 ****
        at(size_type __n) const
        {
  	if (__n >= size())
! 	  __throw_out_of_range("basic_stack_trace::at: bad frame number");
  	return begin()[__n];
        }
  
--- 487,493 ----
        at(size_type __n) const
        {
  	if (__n >= size())
! 	  __throw_out_of_range("basic_stacktrace::at: bad frame number");
  	return begin()[__n];
        }
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 782,788 ****
        size_t
        operator()(const basic_stacktrace<_Allocator>& __st) const noexcept
        {
! 	hash<stacktrace_entry::native_handle_type> __h;
  	size_t __val = _Hash_impl::hash(__st.size());
  	for (const auto& __f : __st)
  	  __val = _Hash_impl::__hash_combine(__h(__f), __val);
--- 782,788 ----
        size_t
        operator()(const basic_stacktrace<_Allocator>& __st) const noexcept
        {
! 	hash<stacktrace_entry> __h;
  	size_t __val = _Hash_impl::hash(__st.size());
  	for (const auto& __f : __st)
  	  __val = _Hash_impl::__hash_combine(__h(__f), __val);
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/string_view gcc-12.4.0/libstdc++-v3/include/std/string_view
*** gcc-12.3.0/libstdc++-v3/include/std/string_view	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/string_view	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 160,167 ****
  	  && (!requires (_DRange& __d) {
  		__d.operator ::std::basic_string_view<_CharT, _Traits>();
  	      })
- 	  && (!requires { typename _DRange::traits_type; }
- 	      || is_same_v<typename _DRange::traits_type, _Traits>)
  	constexpr explicit
  	basic_string_view(_Range&& __r)
  	noexcept(noexcept(ranges::size(__r)) && noexcept(ranges::data(__r)))
--- 160,165 ----
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 280,286 ****
  
        constexpr void
        remove_suffix(size_type __n) noexcept
!       { this->_M_len -= __n; }
  
        constexpr void
        swap(basic_string_view& __sv) noexcept
--- 278,287 ----
  
        constexpr void
        remove_suffix(size_type __n) noexcept
!       {
! 	__glibcxx_assert(this->_M_len >= __n);
! 	this->_M_len -= __n;
!       }
  
        constexpr void
        swap(basic_string_view& __sv) noexcept
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/syncstream gcc-12.4.0/libstdc++-v3/include/std/syncstream
*** gcc-12.3.0/libstdc++-v3/include/std/syncstream	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/syncstream	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 284,290 ****
  
        ~basic_osyncstream() = default;
  
!       basic_osyncstream& operator=(basic_osyncstream&&) noexcept = default;
  
        syncbuf_type* rdbuf() const noexcept
        { return const_cast<syncbuf_type*>(&_M_syncbuf); }
--- 284,290 ----
  
        ~basic_osyncstream() = default;
  
!       basic_osyncstream& operator=(basic_osyncstream&&) = default;
  
        syncbuf_type* rdbuf() const noexcept
        { return const_cast<syncbuf_type*>(&_M_syncbuf); }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/system_error gcc-12.4.0/libstdc++-v3/include/std/system_error
*** gcc-12.3.0/libstdc++-v3/include/std/system_error	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/system_error	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 77,83 ****
  #endif // C++17
    /// @}
  
!   inline namespace _V2 {
  
    /** @addtogroup diagnostics
     * @{
--- 77,83 ----
  #endif // C++17
    /// @}
  
! _GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(_V2)
  
    /** @addtogroup diagnostics
     * @{
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 188,194 ****
    system_category() noexcept;
  
    /// @}
!   } // end inline namespace
  
    /** @addtogroup diagnostics
     * @{
--- 188,195 ----
    system_category() noexcept;
  
    /// @}
! 
! _GLIBCXX_END_INLINE_ABI_NAMESPACE(_V2)
  
    /** @addtogroup diagnostics
     * @{
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/tuple gcc-12.4.0/libstdc++-v3/include/std/tuple
*** gcc-12.3.0/libstdc++-v3/include/std/tuple	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/tuple	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 801,806 ****
--- 801,813 ----
  	tuple(allocator_arg_t __tag, const _Alloc& __a)
  	: _Inherited(__tag, __a) { }
  
+       template<typename _Alloc,
+ 	       _ExplicitDefaultCtor<is_object<_Alloc>::value> = false>
+ 	_GLIBCXX20_CONSTEXPR
+ 	explicit
+ 	tuple(allocator_arg_t __tag, const _Alloc& __a)
+ 	: _Inherited(__tag, __a) { }
+ 
        template<typename _Alloc, bool _NotEmpty = (sizeof...(_Elements) >= 1),
  	       _ImplicitCtor<_NotEmpty, const _Elements&...> = true>
  	_GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1155,1160 ****
--- 1162,1174 ----
  	tuple(allocator_arg_t __tag, const _Alloc& __a)
  	: _Inherited(__tag, __a) { }
  
+       template<typename _Alloc,
+ 	       _ExplicitDefaultCtor<is_object<_Alloc>::value, _T1, _T2> = false>
+ 	_GLIBCXX20_CONSTEXPR
+ 	explicit
+ 	tuple(allocator_arg_t __tag, const _Alloc& __a)
+ 	: _Inherited(__tag, __a) { }
+ 
        template<typename _Alloc, bool _Dummy = true,
  	       _ImplicitCtor<_Dummy, const _T1&, const _T2&> = true>
  	_GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1572,1577 ****
--- 1586,1592 ----
  #endif // three_way_comparison
  
    // NB: DR 705.
+   /// Create a tuple containing copies of the arguments
    template<typename... _Elements>
      constexpr tuple<typename __decay_and_strip<_Elements>::__type...>
      make_tuple(_Elements&&... __args)
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1583,1589 ****
  
    // _GLIBCXX_RESOLVE_LIB_DEFECTS
    // 2275. Why is forward_as_tuple not constexpr?
!   /// std::forward_as_tuple
    template<typename... _Elements>
      constexpr tuple<_Elements&&...>
      forward_as_tuple(_Elements&&... __args) noexcept
--- 1598,1604 ----
  
    // _GLIBCXX_RESOLVE_LIB_DEFECTS
    // 2275. Why is forward_as_tuple not constexpr?
!   /// Create a tuple of lvalue or rvalue references to the arguments
    template<typename... _Elements>
      constexpr tuple<_Elements&&...>
      forward_as_tuple(_Elements&&... __args) noexcept
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1610,1616 ****
      constexpr const _Tp&&
      get(const array<_Tp, _Nm>&&) noexcept;
  
! 
    template<size_t, typename, typename, size_t>
      struct __make_tuple_impl;
  
--- 1625,1631 ----
      constexpr const _Tp&&
      get(const array<_Tp, _Nm>&&) noexcept;
  
!   /// @cond undocumented
    template<size_t, typename, typename, size_t>
      struct __make_tuple_impl;
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1722,1729 ****
    template<typename... _Tps>
      struct __is_tuple_like_impl<tuple<_Tps...>> : true_type
      { };
  
!   /// tuple_cat
    template<typename... _Tpls, typename = typename
             enable_if<__and_<__is_tuple_like<_Tpls>...>::value>::type>
      constexpr auto
--- 1737,1745 ----
    template<typename... _Tps>
      struct __is_tuple_like_impl<tuple<_Tps...>> : true_type
      { };
+   /// @endcond
  
!   /// Create a `tuple` containing all elements from multiple tuple-like objects
    template<typename... _Tpls, typename = typename
             enable_if<__and_<__is_tuple_like<_Tpls>...>::value>::type>
      constexpr auto
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1738,1750 ****
  
    // _GLIBCXX_RESOLVE_LIB_DEFECTS
    // 2301. Why is tie not constexpr?
!   /// tie
    template<typename... _Elements>
      constexpr tuple<_Elements&...>
      tie(_Elements&... __args) noexcept
      { return tuple<_Elements&...>(__args...); }
  
!   /// swap
    template<typename... _Elements>
      _GLIBCXX20_CONSTEXPR
      inline
--- 1754,1766 ----
  
    // _GLIBCXX_RESOLVE_LIB_DEFECTS
    // 2301. Why is tie not constexpr?
!   /// Return a tuple of lvalue references bound to the arguments
    template<typename... _Elements>
      constexpr tuple<_Elements&...>
      tie(_Elements&... __args) noexcept
      { return tuple<_Elements&...>(__args...); }
  
!   /// Exchange the values of two tuples
    template<typename... _Elements>
      _GLIBCXX20_CONSTEXPR
      inline
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1760,1765 ****
--- 1776,1782 ----
      { __x.swap(__y); }
  
  #if __cplusplus > 201402L || !defined(__STRICT_ANSI__) // c++1z or gnu++11
+   /// Exchange the values of two const tuples (if const elements can be swapped)
    template<typename... _Elements>
      _GLIBCXX20_CONSTEXPR
      typename enable_if<!__and_<__is_swappable<_Elements>...>::value>::type
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1780,1785 ****
--- 1797,1817 ----
  
    // _GLIBCXX_RESOLVE_LIB_DEFECTS
    // 2773. Making std::ignore constexpr
+   /** Used with `std::tie` to ignore an element of a tuple
+    *
+    * When using `std::tie` to assign the elements of a tuple to variables,
+    * unwanted elements can be ignored by using `std::ignore`. For example:
+    *
+    * ```
+    * int x, y;
+    * std::tie(x, std::ignore, y) = std::make_tuple(1, 2, 3);
+    * ```
+    *
+    * This assignment will perform `x=1; std::ignore=2; y=3;` which results
+    * in the second element being ignored.
+    *
+    * @since C++11
+    */
    _GLIBCXX17_INLINE constexpr _Swallow_assign ignore{};
  
    /// Partial specialization for tuples
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/type_traits gcc-12.4.0/libstdc++-v3/include/std/type_traits
*** gcc-12.3.0/libstdc++-v3/include/std/type_traits	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/type_traits	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 2632,2644 ****
  
    /// @cond undocumented
  
    /// Implementation of the detection idiom (negative case).
    template<typename _Default, typename _AlwaysVoid,
  	   template<typename...> class _Op, typename... _Args>
      struct __detector
      {
-       using value_t = false_type;
        using type = _Default;
      };
  
    /// Implementation of the detection idiom (positive case).
--- 2632,2665 ----
  
    /// @cond undocumented
  
+   // Detection idiom.
+   // Detect whether _Op<_Args...> is a valid type, use default _Def if not.
+ 
+ #if __cpp_concepts
+   // Implementation of the detection idiom (negative case).
+   template<typename _Def, template<typename...> class _Op, typename... _Args>
+     struct __detected_or
+     {
+       using type = _Def;
+       using __is_detected = false_type;
+     };
+ 
+   // Implementation of the detection idiom (positive case).
+   template<typename _Def, template<typename...> class _Op, typename... _Args>
+     requires requires { typename _Op<_Args...>; }
+     struct __detected_or<_Def, _Op, _Args...>
+     {
+       using type = _Op<_Args...>;
+       using __is_detected = true_type;
+     };
+ #else
    /// Implementation of the detection idiom (negative case).
    template<typename _Default, typename _AlwaysVoid,
  	   template<typename...> class _Op, typename... _Args>
      struct __detector
      {
        using type = _Default;
+       using __is_detected = false_type;
      };
  
    /// Implementation of the detection idiom (positive case).
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 2646,2659 ****
  	    typename... _Args>
      struct __detector<_Default, __void_t<_Op<_Args...>>, _Op, _Args...>
      {
-       using value_t = true_type;
        using type = _Op<_Args...>;
      };
  
-   // Detect whether _Op<_Args...> is a valid type, use _Default if not.
    template<typename _Default, template<typename...> class _Op,
  	   typename... _Args>
      using __detected_or = __detector<_Default, void, _Op, _Args...>;
  
    // _Op<_Args...> if that is a valid type, otherwise _Default.
    template<typename _Default, template<typename...> class _Op,
--- 2667,2680 ----
  	    typename... _Args>
      struct __detector<_Default, __void_t<_Op<_Args...>>, _Op, _Args...>
      {
        using type = _Op<_Args...>;
+       using __is_detected = true_type;
      };
  
    template<typename _Default, template<typename...> class _Op,
  	   typename... _Args>
      using __detected_or = __detector<_Default, void, _Op, _Args...>;
+ #endif // __cpp_concepts
  
    // _Op<_Args...> if that is a valid type, otherwise _Default.
    template<typename _Default, template<typename...> class _Op,
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/utility gcc-12.4.0/libstdc++-v3/include/std/utility
*** gcc-12.3.0/libstdc++-v3/include/std/utility	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/utility	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 86,91 ****
--- 86,95 ----
  #if __cplusplus >= 201402L
  #define __cpp_lib_exchange_function 201304L
  
+ #if __cplusplus > 201703L
+ # define __cpp_lib_constexpr_algorithms 201806L
+ #endif
+ 
    /// Assign @p __new_val to @p __obj and return its previous value.
    template <typename _Tp, typename _Up = _Tp>
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 160,181 ****
      cmp_greater_equal(_Tp __t, _Up __u) noexcept
      { return !std::cmp_less(__t, __u); }
  
!   template<typename _Up, typename _Tp>
      constexpr bool
      in_range(_Tp __t) noexcept
      {
!       static_assert(__is_standard_integer<_Up>::value);
        static_assert(__is_standard_integer<_Tp>::value);
        using __gnu_cxx::__int_traits;
  
!       if constexpr (is_signed_v<_Tp> == is_signed_v<_Up>)
! 	return __int_traits<_Up>::__min <= __t
! 	  && __t <= __int_traits<_Up>::__max;
        else if constexpr (is_signed_v<_Tp>)
  	return __t >= 0
! 	  && make_unsigned_t<_Tp>(__t) <= __int_traits<_Up>::__max;
        else
! 	return __t <= make_unsigned_t<_Up>(__int_traits<_Up>::__max);
      }
  
  #if __cplusplus > 202002L
--- 164,185 ----
      cmp_greater_equal(_Tp __t, _Up __u) noexcept
      { return !std::cmp_less(__t, __u); }
  
!   template<typename _Res, typename _Tp>
      constexpr bool
      in_range(_Tp __t) noexcept
      {
!       static_assert(__is_standard_integer<_Res>::value);
        static_assert(__is_standard_integer<_Tp>::value);
        using __gnu_cxx::__int_traits;
  
!       if constexpr (is_signed_v<_Tp> == is_signed_v<_Res>)
! 	return __int_traits<_Res>::__min <= __t
! 	  && __t <= __int_traits<_Res>::__max;
        else if constexpr (is_signed_v<_Tp>)
  	return __t >= 0
! 	  && make_unsigned_t<_Tp>(__t) <= __int_traits<_Res>::__max;
        else
! 	return __t <= make_unsigned_t<_Res>(__int_traits<_Res>::__max);
      }
  
  #if __cplusplus > 202002L
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/valarray gcc-12.4.0/libstdc++-v3/include/std/valarray
*** gcc-12.3.0/libstdc++-v3/include/std/valarray	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/valarray	Thu Jun 20 08:08:10 2024
*************** namespace __detail
*** 60,81 ****
          template<class, class> class _Meta1,
          template<class, class> class _Meta2,
          class _Dom1, class _Dom2>
!     class _BinClos;
  
    template<template<class, class> class _Meta, class _Dom>
!     class _SClos;
  
    template<template<class, class> class _Meta, class _Dom>
!     class _GClos;
  
    template<template<class, class> class _Meta, class _Dom>
!     class _IClos;
  
    template<template<class, class> class _Meta, class _Dom>
!     class _ValFunClos;
  
    template<template<class, class> class _Meta, class _Dom>
!     class _RefFunClos;
  } // namespace __detail
  
    using __detail::_UnClos;
--- 60,81 ----
          template<class, class> class _Meta1,
          template<class, class> class _Meta2,
          class _Dom1, class _Dom2>
!     struct _BinClos;
  
    template<template<class, class> class _Meta, class _Dom>
!     struct _SClos;
  
    template<template<class, class> class _Meta, class _Dom>
!     struct _GClos;
  
    template<template<class, class> class _Meta, class _Dom>
!     struct _IClos;
  
    template<template<class, class> class _Meta, class _Dom>
!     struct _ValFunClos;
  
    template<template<class, class> class _Meta, class _Dom>
!     struct _RefFunClos;
  } // namespace __detail
  
    using __detail::_UnClos;
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/std/variant gcc-12.4.0/libstdc++-v3/include/std/variant
*** gcc-12.3.0/libstdc++-v3/include/std/variant	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/std/variant	Thu Jun 20 08:08:10 2024
*************** namespace __variant
*** 321,326 ****
--- 321,353 ----
      __get(_Variant&& __v) noexcept
      { return __variant::__get_n<_Np>(std::forward<_Variant>(__v)._M_u); }
  
+   // Gets the _Uninitialized to construct into for __u.
+   template<size_t _Np, typename _Union>
+     constexpr decltype(auto)
+     __construct_n(_Union& __u) noexcept
+     {
+       if constexpr (_Np == 0)
+ 	return &__u._M_first;
+       else if constexpr (_Np == 1)
+ 	{
+ 	  std::_Construct(&__u._M_rest);
+ 	  return &__u._M_rest._M_first;
+ 	}
+       else if constexpr (_Np == 2)
+ 	{
+ 	  std::_Construct(&__u._M_rest);
+ 	  std::_Construct(&__u._M_rest._M_rest);
+ 	  return &__u._M_rest._M_rest._M_first;
+ 	}
+       else
+ 	{
+ 	  std::_Construct(&__u._M_rest);
+ 	  std::_Construct(&__u._M_rest._M_rest);
+ 	  std::_Construct(&__u._M_rest._M_rest._M_rest);
+ 	  return __variant::__construct_n<_Np - 3>(__u._M_rest._M_rest._M_rest);
+ 	}
+     }
+ 
    template<typename... _Types>
      struct _Traits
      {
*************** namespace __variant
*** 537,544 ****
      __emplace(_Variant_storage<_Triv, _Types...>& __v, _Args&&... __args)
      {
        __v._M_reset();
!       auto* __addr = std::__addressof(__variant::__get_n<_Np>(__v._M_u));
!       std::_Construct(__addr, std::forward<_Args>(__args)...);
        // Construction didn't throw, so can set the new index now:
        __v._M_index = _Np;
      }
--- 564,572 ----
      __emplace(_Variant_storage<_Triv, _Types...>& __v, _Args&&... __args)
      {
        __v._M_reset();
!       auto* __addr = __variant::__construct_n<_Np>(__v._M_u);
!       std::_Construct(__addr, in_place_index<0>,
! 		      std::forward<_Args>(__args)...);
        // Construction didn't throw, so can set the new index now:
        __v._M_index = _Np;
      }
*************** namespace __variant
*** 1122,1128 ****
      {
        static_assert(__detail::__variant::__exactly_once<_Tp, _Types...>,
  		    "T must occur exactly once in alternatives");
-       static_assert(!is_void_v<_Tp>, "_Tp must not be void");
        constexpr size_t __n = std::__find_uniq_type_in_pack<_Tp, _Types...>();
        return std::get<__n>(__v);
      }
--- 1150,1155 ----
*************** namespace __variant
*** 1133,1139 ****
      {
        static_assert(__detail::__variant::__exactly_once<_Tp, _Types...>,
  		    "T must occur exactly once in alternatives");
-       static_assert(!is_void_v<_Tp>, "_Tp must not be void");
        constexpr size_t __n = std::__find_uniq_type_in_pack<_Tp, _Types...>();
        return std::get<__n>(std::move(__v));
      }
--- 1160,1165 ----
*************** namespace __variant
*** 1144,1150 ****
      {
        static_assert(__detail::__variant::__exactly_once<_Tp, _Types...>,
  		    "T must occur exactly once in alternatives");
-       static_assert(!is_void_v<_Tp>, "_Tp must not be void");
        constexpr size_t __n = std::__find_uniq_type_in_pack<_Tp, _Types...>();
        return std::get<__n>(__v);
      }
--- 1170,1175 ----
*************** namespace __variant
*** 1155,1161 ****
      {
        static_assert(__detail::__variant::__exactly_once<_Tp, _Types...>,
  		    "T must occur exactly once in alternatives");
-       static_assert(!is_void_v<_Tp>, "_Tp must not be void");
        constexpr size_t __n = std::__find_uniq_type_in_pack<_Tp, _Types...>();
        return std::get<__n>(std::move(__v));
      }
--- 1180,1185 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/tr2/dynamic_bitset gcc-12.4.0/libstdc++-v3/include/tr2/dynamic_bitset
*** gcc-12.3.0/libstdc++-v3/include/tr2/dynamic_bitset	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/tr2/dynamic_bitset	Thu Jun 20 08:08:10 2024
*************** namespace tr2
*** 622,628 ****
  	  // Watch for npos.
  	  this->_M_Nb = (__n > __str.size() ? __str.size() - __pos : __n);
  	  this->resize(this->_M_Nb);
! 	  this->_M_copy_from_string(__str, __pos, __n);
  	}
  
        /**
--- 622,628 ----
  	  // Watch for npos.
  	  this->_M_Nb = (__n > __str.size() ? __str.size() - __pos : __n);
  	  this->resize(this->_M_Nb);
! 	  this->_M_copy_from_string(__str, __pos, __n, __zero, __one);
  	}
  
        /**
diff -Nrcpad gcc-12.3.0/libstdc++-v3/libsupc++/Makefile.am gcc-12.4.0/libstdc++-v3/libsupc++/Makefile.am
*** gcc-12.3.0/libstdc++-v3/libsupc++/Makefile.am	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/libsupc++/Makefile.am	Thu Jun 20 08:08:10 2024
*************** atomicity_file = ${glibcxx_srcdir}/$(ATO
*** 132,137 ****
--- 132,145 ----
  atomicity.cc: ${atomicity_file}
  	$(LN_S) ${atomicity_file} ./atomicity.cc || true
  
+ if OS_IS_DARWIN
+ # See PR 112397
+ new_opvnt.lo: new_opvnt.cc
+ 	$(LTCXXCOMPILE) -fno-reorder-blocks-and-partition -I. -c $<
+ new_opvnt.o: new_opvnt.cc
+ 	$(CXXCOMPILE) -fno-reorder-blocks-and-partition -I. -c $<
+ endif
+ 
  # AM_CXXFLAGS needs to be in each subdirectory so that it can be
  # modified in a per-library or per-sub-library way.  Need to manually
  # set this option because CONFIG_CXXFLAGS has to be after
diff -Nrcpad gcc-12.3.0/libstdc++-v3/libsupc++/Makefile.in gcc-12.4.0/libstdc++-v3/libsupc++/Makefile.in
*** gcc-12.3.0/libstdc++-v3/libsupc++/Makefile.in	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/libsupc++/Makefile.in	Thu Jun 20 08:08:10 2024
*************** cp-demangle.o: cp-demangle.c
*** 973,978 ****
--- 973,984 ----
  atomicity.cc: ${atomicity_file}
  	$(LN_S) ${atomicity_file} ./atomicity.cc || true
  
+ # See PR 112397
+ @OS_IS_DARWIN_TRUE@new_opvnt.lo: new_opvnt.cc
+ @OS_IS_DARWIN_TRUE@	$(LTCXXCOMPILE) -fno-reorder-blocks-and-partition -I. -c $<
+ @OS_IS_DARWIN_TRUE@new_opvnt.o: new_opvnt.cc
+ @OS_IS_DARWIN_TRUE@	$(CXXCOMPILE) -fno-reorder-blocks-and-partition -I. -c $<
+ 
  install-stdHEADERS: $(std_HEADERS)
  	@$(NORMAL_INSTALL)
  	$(mkinstalldirs) $(DESTDIR)$(stddir)
diff -Nrcpad gcc-12.3.0/libstdc++-v3/libsupc++/cxxabi_init_exception.h gcc-12.4.0/libstdc++-v3/libsupc++/cxxabi_init_exception.h
*** gcc-12.3.0/libstdc++-v3/libsupc++/cxxabi_init_exception.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/libsupc++/cxxabi_init_exception.h	Thu Jun 20 08:08:10 2024
*************** namespace __cxxabiv1
*** 67,74 ****
  
        // Initialize exception (this is a GNU extension)
        __cxa_refcounted_exception*
!       __cxa_init_primary_exception(void *object, std::type_info *tinfo,
!                 void (_GLIBCXX_CDTOR_CALLABI *dest) (void *)) _GLIBCXX_NOTHROW;
  
      }
  } // namespace __cxxabiv1
--- 67,75 ----
  
        // Initialize exception (this is a GNU extension)
        __cxa_refcounted_exception*
!       __cxa_init_primary_exception(void *__object, std::type_info *__tinfo,
!                 void (_GLIBCXX_CDTOR_CALLABI *__dest) (void *))
! 	_GLIBCXX_NOTHROW;
  
      }
  } // namespace __cxxabiv1
diff -Nrcpad gcc-12.3.0/libstdc++-v3/libsupc++/eh_globals.cc gcc-12.4.0/libstdc++-v3/libsupc++/eh_globals.cc
*** gcc-12.3.0/libstdc++-v3/libsupc++/eh_globals.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/libsupc++/eh_globals.cc	Thu Jun 20 08:08:10 2024
*************** __cxxabiv1::__cxa_get_globals() _GLIBCXX
*** 70,88 ****
  
  namespace
  {
-   struct constant_init
-   {
-     union {
-       unsigned char unused;
-       __cxa_eh_globals obj;
-     };
-     constexpr constant_init() : obj() { }
- 
-     ~constant_init() { /* do nothing, union member is not destroyed */ }
-   };
- 
    // Single-threaded fallback buffer.
!   __constinit constant_init eh_globals;
  }
  
  #if __GTHREADS
--- 70,77 ----
  
  namespace
  {
    // Single-threaded fallback buffer.
!   __constinit __cxa_eh_globals eh_globals;
  }
  
  #if __GTHREADS
*************** __cxxabiv1::__cxa_get_globals_fast() _GL
*** 143,149 ****
    if (init._S_init)
      g = static_cast<__cxa_eh_globals*>(__gthread_getspecific(init._M_key));
    else
!     g = &eh_globals.obj;
    return g;
  }
  
--- 132,138 ----
    if (init._S_init)
      g = static_cast<__cxa_eh_globals*>(__gthread_getspecific(init._M_key));
    else
!     g = &eh_globals;
    return g;
  }
  
*************** __cxxabiv1::__cxa_get_globals() _GLIBCXX
*** 168,174 ****
  	}
      }
    else
!     g = &eh_globals.obj;
    return g;
  }
  
--- 157,163 ----
  	}
      }
    else
!     g = &eh_globals;
    return g;
  }
  
*************** __cxxabiv1::__cxa_get_globals() _GLIBCXX
*** 176,186 ****
  
  extern "C" __cxa_eh_globals*
  __cxxabiv1::__cxa_get_globals_fast() _GLIBCXX_NOTHROW
! { return &eh_globals.obj; }
  
  extern "C" __cxa_eh_globals*
  __cxxabiv1::__cxa_get_globals() _GLIBCXX_NOTHROW
! { return &eh_globals.obj; }
  
  #endif
  
--- 165,175 ----
  
  extern "C" __cxa_eh_globals*
  __cxxabiv1::__cxa_get_globals_fast() _GLIBCXX_NOTHROW
! { return &eh_globals; }
  
  extern "C" __cxa_eh_globals*
  __cxxabiv1::__cxa_get_globals() _GLIBCXX_NOTHROW
! { return &eh_globals; }
  
  #endif
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/libsupc++/exception_ptr.h gcc-12.4.0/libstdc++-v3/libsupc++/exception_ptr.h
*** gcc-12.3.0/libstdc++-v3/libsupc++/exception_ptr.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/libsupc++/exception_ptr.h	Thu Jun 20 08:08:10 2024
*************** namespace std
*** 271,277 ****
    // instead of a working one compiled with RTTI and/or exceptions enabled.
    template<typename _Ex>
      __attribute__ ((__always_inline__))
!     exception_ptr
      make_exception_ptr(_Ex) _GLIBCXX_USE_NOEXCEPT
      { return exception_ptr(); }
  #endif
--- 271,277 ----
    // instead of a working one compiled with RTTI and/or exceptions enabled.
    template<typename _Ex>
      __attribute__ ((__always_inline__))
!     inline exception_ptr
      make_exception_ptr(_Ex) _GLIBCXX_USE_NOEXCEPT
      { return exception_ptr(); }
  #endif
diff -Nrcpad gcc-12.3.0/libstdc++-v3/libsupc++/new_opa.cc gcc-12.4.0/libstdc++-v3/libsupc++/new_opa.cc
*** gcc-12.3.0/libstdc++-v3/libsupc++/new_opa.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/libsupc++/new_opa.cc	Thu Jun 20 08:08:10 2024
*************** using std::bad_alloc;
*** 46,57 ****
  using std::size_t;
  extern "C"
  {
! # if _GLIBCXX_HAVE_ALIGNED_ALLOC
    void *aligned_alloc(size_t alignment, size_t size);
  # elif _GLIBCXX_HAVE__ALIGNED_MALLOC
    void *_aligned_malloc(size_t size, size_t alignment);
- # elif _GLIBCXX_HAVE_POSIX_MEMALIGN
-   void *posix_memalign(void **, size_t alignment, size_t size);
  # elif _GLIBCXX_HAVE_MEMALIGN
    void *memalign(size_t alignment, size_t size);
  # else
--- 46,57 ----
  using std::size_t;
  extern "C"
  {
! # if _GLIBCXX_HAVE_POSIX_MEMALIGN
!   int posix_memalign(void **, size_t alignment, size_t size);
! # elif _GLIBCXX_HAVE_ALIGNED_ALLOC
    void *aligned_alloc(size_t alignment, size_t size);
  # elif _GLIBCXX_HAVE__ALIGNED_MALLOC
    void *_aligned_malloc(size_t size, size_t alignment);
  # elif _GLIBCXX_HAVE_MEMALIGN
    void *memalign(size_t alignment, size_t size);
  # else
*************** extern "C"
*** 63,75 ****
  #endif
  
  namespace __gnu_cxx {
! #if _GLIBCXX_HAVE_ALIGNED_ALLOC
! using ::aligned_alloc;
! #elif _GLIBCXX_HAVE__ALIGNED_MALLOC
! static inline void*
! aligned_alloc (std::size_t al, std::size_t sz)
! { return _aligned_malloc(sz, al); }
! #elif _GLIBCXX_HAVE_POSIX_MEMALIGN
  static inline void*
  aligned_alloc (std::size_t al, std::size_t sz)
  {
--- 63,72 ----
  #endif
  
  namespace __gnu_cxx {
! // Prefer posix_memalign if available, because it's older than aligned_alloc
! // and so more likely to be provided by replacement malloc libraries that
! // predate the addition of aligned_alloc. See PR libstdc++/113258.
! #if _GLIBCXX_HAVE_POSIX_MEMALIGN
  static inline void*
  aligned_alloc (std::size_t al, std::size_t sz)
  {
*************** aligned_alloc (std::size_t al, std::size
*** 83,88 ****
--- 80,91 ----
      return ptr;
    return nullptr;
  }
+ #elif _GLIBCXX_HAVE_ALIGNED_ALLOC
+ using ::aligned_alloc;
+ #elif _GLIBCXX_HAVE__ALIGNED_MALLOC
+ static inline void*
+ aligned_alloc (std::size_t al, std::size_t sz)
+ { return _aligned_malloc(sz, al); }
  #elif _GLIBCXX_HAVE_MEMALIGN
  static inline void*
  aligned_alloc (std::size_t al, std::size_t sz)
*************** operator new (std::size_t sz, std::align
*** 128,134 ****
    if (__builtin_expect (sz == 0, false))
      sz = 1;
  
! #if _GLIBCXX_HAVE_ALIGNED_ALLOC
  # if defined _AIX || defined __APPLE__
    /* AIX 7.2.0.0 aligned_alloc incorrectly has posix_memalign's requirement
     * that alignment is a multiple of sizeof(void*).
--- 131,138 ----
    if (__builtin_expect (sz == 0, false))
      sz = 1;
  
! #if _GLIBCXX_HAVE_POSIX_MEMALIGN
! #elif _GLIBCXX_HAVE_ALIGNED_ALLOC
  # if defined _AIX || defined __APPLE__
    /* AIX 7.2.0.0 aligned_alloc incorrectly has posix_memalign's requirement
     * that alignment is a multiple of sizeof(void*).
diff -Nrcpad gcc-12.3.0/libstdc++-v3/python/libstdcxx/v6/printers.py gcc-12.4.0/libstdc++-v3/python/libstdcxx/v6/printers.py
*** gcc-12.3.0/libstdc++-v3/python/libstdcxx/v6/printers.py	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/python/libstdcxx/v6/printers.py	Thu Jun 20 08:08:10 2024
***************
*** 18,26 ****
  import gdb
  import itertools
  import re
! import sys, os, errno
  
! ### Python 2 + Python 3 compatibility code
  
  # Resources about compatibility:
  #
--- 18,28 ----
  import gdb
  import itertools
  import re
! import sys
! import os
! import errno
  
! # Python 2 + Python 3 compatibility code
  
  # Resources about compatibility:
  #
*************** import sys, os, errno
*** 37,43 ****
  # <https://sourceware.org/bugzilla/show_bug.cgi?id=17138>
  
  if sys.version_info[0] > 2:
!     ### Python 3 stuff
      Iterator = object
      # Python 3 folds these into the normal functions.
      imap = map
--- 39,45 ----
  # <https://sourceware.org/bugzilla/show_bug.cgi?id=17138>
  
  if sys.version_info[0] > 2:
!     # Python 3 stuff
      Iterator = object
      # Python 3 folds these into the normal functions.
      imap = map
*************** if sys.version_info[0] > 2:
*** 45,51 ****
      # Also, int subsumes long
      long = int
  else:
!     ### Python 2 stuff
      class Iterator:
          """Compatibility mixin for iterators
  
--- 47,53 ----
      # Also, int subsumes long
      long = int
  else:
!     # Python 2 stuff
      class Iterator:
          """Compatibility mixin for iterators
  
*************** except ImportError:
*** 82,87 ****
--- 84,91 ----
  # Starting with the type ORIG, search for the member type NAME.  This
  # handles searching upward through superclasses.  This is needed to
  # work around http://sourceware.org/bugzilla/show_bug.cgi?id=13615.
+ 
+ 
  def find_type(orig, name):
      typ = orig.strip_typedefs()
      while True:
*************** def find_type(orig, name):
*** 100,110 ****
          else:
              raise ValueError("Cannot find type %s::%s" % (str(orig), name))
  
  _versioned_namespace = '__8::'
  
  def lookup_templ_spec(templ, *args):
      """
!     Lookup template specialization templ<args...>
      """
      t = '{}<{}>'.format(templ, ', '.join([str(a) for a in args]))
      try:
--- 104,116 ----
          else:
              raise ValueError("Cannot find type %s::%s" % (str(orig), name))
  
+ 
  _versioned_namespace = '__8::'
  
+ 
  def lookup_templ_spec(templ, *args):
      """
!     Lookup template specialization templ<args...>.
      """
      t = '{}<{}>'.format(templ, ', '.join([str(a) for a in args]))
      try:
*************** def lookup_templ_spec(templ, *args):
*** 112,118 ****
      except gdb.error as e:
          # Type not found, try again in versioned namespace.
          global _versioned_namespace
!         if _versioned_namespace and _versioned_namespace not in templ:
              t = t.replace('::', '::' + _versioned_namespace, 1)
              try:
                  return gdb.lookup_type(t)
--- 118,124 ----
      except gdb.error as e:
          # Type not found, try again in versioned namespace.
          global _versioned_namespace
!         if _versioned_namespace not in templ:
              t = t.replace('::', '::' + _versioned_namespace, 1)
              try:
                  return gdb.lookup_type(t)
*************** def lookup_templ_spec(templ, *args):
*** 125,138 ****
  # see https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91997 for details.
  def lookup_node_type(nodename, containertype):
      """
!     Lookup specialization of template NODENAME corresponding to CONTAINERTYPE.
!     e.g. if NODENAME is '_List_node' and CONTAINERTYPE is std::list<int>
!     then return the type std::_List_node<int>.
!     Returns None if not found.
      """
      # If nodename is unqualified, assume it's in namespace std.
      if '::' not in nodename:
          nodename = 'std::' + nodename
      try:
          valtype = find_type(containertype, 'value_type')
      except:
--- 131,151 ----
  # see https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91997 for details.
  def lookup_node_type(nodename, containertype):
      """
!     Lookup specialization of template nodename corresponding to containertype.
! 
!     nodename - The name of a class template, as a String
!     containertype - The container, as a gdb.Type
! 
!     Return a gdb.Type for the corresponding specialization of nodename,
!     or None if the type cannot be found.
! 
!     e.g. lookup_node_type('_List_node', gdb.lookup_type('std::list<int>'))
!     will return a gdb.Type for the type std::_List_node<int>.
      """
      # If nodename is unqualified, assume it's in namespace std.
      if '::' not in nodename:
          nodename = 'std::' + nodename
+     # Use either containertype's value_type or its first template argument.
      try:
          valtype = find_type(containertype, 'value_type')
      except:
*************** def lookup_node_type(nodename, container
*** 152,163 ****
                      pass
          return None
  
  def is_member_of_namespace(typ, *namespaces):
      """
      Test whether a type is a member of one of the specified namespaces.
      The type can be specified as a string or a gdb.Type object.
      """
!     if type(typ) is gdb.Type:
          typ = str(typ)
      typ = strip_versioned_namespace(typ)
      for namespace in namespaces:
--- 165,177 ----
                      pass
          return None
  
+ 
  def is_member_of_namespace(typ, *namespaces):
      """
      Test whether a type is a member of one of the specified namespaces.
      The type can be specified as a string or a gdb.Type object.
      """
!     if isinstance(typ, gdb.Type):
          typ = str(typ)
      typ = strip_versioned_namespace(typ)
      for namespace in namespaces:
*************** def is_member_of_namespace(typ, *namespa
*** 165,198 ****
              return True
      return False
  
  def is_specialization_of(x, template_name):
      "Test if a type is a given template instantiation."
      global _versioned_namespace
!     if type(x) is gdb.Type:
          x = x.tag
!     if _versioned_namespace:
!         return re.match('^std::(%s)?%s<.*>$' % (_versioned_namespace, template_name), x) is not None
      return re.match('^std::%s<.*>$' % template_name, x) is not None
  
  def strip_versioned_namespace(typename):
      global _versioned_namespace
!     if _versioned_namespace:
!         return typename.replace(_versioned_namespace, '')
!     return typename
  
  def strip_inline_namespaces(type_str):
!     "Remove known inline namespaces from the canonical name of a type."
      type_str = strip_versioned_namespace(type_str)
      type_str = type_str.replace('std::__cxx11::', 'std::')
      expt_ns = 'std::experimental::'
      for lfts_ns in ('fundamentals_v1', 'fundamentals_v2'):
!         type_str = type_str.replace(expt_ns+lfts_ns+'::', expt_ns)
      fs_ns = expt_ns + 'filesystem::'
!     type_str = type_str.replace(fs_ns+'v1::', fs_ns)
      return type_str
  
  def get_template_arg_list(type_obj):
!     "Return a type's template arguments as a list"
      n = 0
      template_args = []
      while True:
--- 179,213 ----
              return True
      return False
  
+ 
  def is_specialization_of(x, template_name):
      "Test if a type is a given template instantiation."
      global _versioned_namespace
!     if isinstance(x, gdb.Type):
          x = x.tag
!     template_name = '(%s)?%s' % (_versioned_namespace, template_name)
      return re.match('^std::%s<.*>$' % template_name, x) is not None
  
+ 
  def strip_versioned_namespace(typename):
      global _versioned_namespace
!     return typename.replace(_versioned_namespace, '')
! 
  
  def strip_inline_namespaces(type_str):
!     """Remove known inline namespaces from the canonical name of a type."""
      type_str = strip_versioned_namespace(type_str)
      type_str = type_str.replace('std::__cxx11::', 'std::')
      expt_ns = 'std::experimental::'
      for lfts_ns in ('fundamentals_v1', 'fundamentals_v2'):
!         type_str = type_str.replace(expt_ns + lfts_ns + '::', expt_ns)
      fs_ns = expt_ns + 'filesystem::'
!     type_str = type_str.replace(fs_ns + 'v1::', fs_ns)
      return type_str
  
+ 
  def get_template_arg_list(type_obj):
!     """Return a type's template arguments as a list."""
      n = 0
      template_args = []
      while True:
*************** def get_template_arg_list(type_obj):
*** 202,209 ****
              return template_args
          n += 1
  
  class SmartPtrIterator(Iterator):
!     "An iterator for smart pointer types with a single 'child' value"
  
      def __init__(self, val):
          self.val = val
--- 217,225 ----
              return template_args
          n += 1
  
+ 
  class SmartPtrIterator(Iterator):
!     """An iterator for smart pointer types with a single 'child' value."""
  
      def __init__(self, val):
          self.val = val
*************** class SmartPtrIterator(Iterator):
*** 217,244 ****
          self.val, val = None, self.val
          return ('get()', val)
  
  class SharedPointerPrinter:
!     "Print a shared_ptr, weak_ptr, atomic<shared_ptr>, or atomic<weak_ptr>"
  
!     def __init__ (self, typename, val):
          self.typename = strip_versioned_namespace(typename)
          self.val = val
          self.pointer = val['_M_ptr']
  
!     def children (self):
          return SmartPtrIterator(self.pointer)
  
      # Return the _Sp_counted_base<>* that holds the refcounts.
!     def _get_refcounts (self):
          if self.typename == 'std::atomic':
              # A tagged pointer is stored as uintptr_t.
              ptr_val = self.val['_M_refcount']['_M_val']['_M_i']
!             ptr_val = ptr_val - (ptr_val % 2) # clear lock bit
              ptr_type = find_type(self.val['_M_refcount'].type, 'pointer')
              return ptr_val.cast(ptr_type)
          return self.val['_M_refcount']['_M_pi']
  
!     def to_string (self):
          state = 'empty'
          refcounts = self._get_refcounts()
          targ = self.val.type.template_argument(0)
--- 233,263 ----
          self.val, val = None, self.val
          return ('get()', val)
  
+ 
  class SharedPointerPrinter:
!     """
!     Print a shared_ptr, weak_ptr, atomic<shared_ptr>, or atomic<weak_ptr>.
!     """
  
!     def __init__(self, typename, val):
          self.typename = strip_versioned_namespace(typename)
          self.val = val
          self.pointer = val['_M_ptr']
  
!     def children(self):
          return SmartPtrIterator(self.pointer)
  
      # Return the _Sp_counted_base<>* that holds the refcounts.
!     def _get_refcounts(self):
          if self.typename == 'std::atomic':
              # A tagged pointer is stored as uintptr_t.
              ptr_val = self.val['_M_refcount']['_M_val']['_M_i']
!             ptr_val = ptr_val - (ptr_val % 2)  # clear lock bit
              ptr_type = find_type(self.val['_M_refcount'].type, 'pointer')
              return ptr_val.cast(ptr_type)
          return self.val['_M_refcount']['_M_pi']
  
!     def to_string(self):
          state = 'empty'
          refcounts = self._get_refcounts()
          targ = self.val.type.template_argument(0)
*************** class SharedPointerPrinter:
*** 250,268 ****
              if usecount == 0:
                  state = 'expired, weak count %d' % weakcount
              else:
!                 state = 'use count %d, weak count %d' % (usecount, weakcount - 1)
          return '%s<%s> (%s)' % (self.typename, targ, state)
  
  def _tuple_impl_get(val):
!     "Return the tuple element stored in a _Tuple_impl<N, T> base class."
      bases = val.type.fields()
      if not bases[-1].is_base_class:
!         raise ValueError("Unsupported implementation for std::tuple: %s" % str(val.type))
      # Get the _Head_base<N, T> base class:
      head_base = val.cast(bases[-1].type)
      fields = head_base.type.fields()
      if len(fields) == 0:
!         raise ValueError("Unsupported implementation for std::tuple: %s" % str(val.type))
      if fields[0].name == '_M_head_impl':
          # The tuple element is the _Head_base::_M_head_impl data member.
          return head_base['_M_head_impl']
--- 269,291 ----
              if usecount == 0:
                  state = 'expired, weak count %d' % weakcount
              else:
!                 state = 'use count %d, weak count %d' % (
!                     usecount, weakcount - 1)
          return '%s<%s> (%s)' % (self.typename, targ, state)
  
+ 
  def _tuple_impl_get(val):
!     """Return the tuple element stored in a _Tuple_impl<N, T> base class."""
      bases = val.type.fields()
      if not bases[-1].is_base_class:
!         raise ValueError(
!             "Unsupported implementation for std::tuple: %s" % str(val.type))
      # Get the _Head_base<N, T> base class:
      head_base = val.cast(bases[-1].type)
      fields = head_base.type.fields()
      if len(fields) == 0:
!         raise ValueError(
!             "Unsupported implementation for std::tuple: %s" % str(val.type))
      if fields[0].name == '_M_head_impl':
          # The tuple element is the _Head_base::_M_head_impl data member.
          return head_base['_M_head_impl']
*************** def _tuple_impl_get(val):
*** 271,280 ****
          # Cast to that empty base class.
          return head_base.cast(fields[0].type)
      else:
!         raise ValueError("Unsupported implementation for std::tuple: %s" % str(val.type))
  
  def tuple_get(n, val):
!     "Return the result of std::get<n>(val) on a std::tuple"
      tuple_size = len(get_template_arg_list(val.type))
      if n > tuple_size:
          raise ValueError("Out of range index for std::get<N> on std::tuple")
--- 294,305 ----
          # Cast to that empty base class.
          return head_base.cast(fields[0].type)
      else:
!         raise ValueError(
!             "Unsupported implementation for std::tuple: %s" % str(val.type))
! 
  
  def tuple_get(n, val):
!     """Return the result of std::get<n>(val) on a std::tuple."""
      tuple_size = len(get_template_arg_list(val.type))
      if n > tuple_size:
          raise ValueError("Out of range index for std::get<N> on std::tuple")
*************** def tuple_get(n, val):
*** 286,325 ****
          n -= 1
      return _tuple_impl_get(node)
  
  def unique_ptr_get(val):
!     "Return the result of val.get() on a std::unique_ptr"
      # std::unique_ptr<T, D> contains a std::tuple<D::pointer, D>,
      # either as a direct data member _M_t (the old implementation)
      # or within a data member of type __uniq_ptr_data.
      impl_type = val.type.fields()[0].type.strip_typedefs()
      # Check for new implementations first:
      if is_specialization_of(impl_type, '__uniq_ptr_data') \
!         or is_specialization_of(impl_type, '__uniq_ptr_impl'):
          tuple_member = val['_M_t']['_M_t']
      elif is_specialization_of(impl_type, 'tuple'):
          tuple_member = val['_M_t']
      else:
!         raise ValueError("Unsupported implementation for unique_ptr: %s" % str(impl_type))
      return tuple_get(0, tuple_member)
  
  class UniquePointerPrinter:
!     "Print a unique_ptr"
  
!     def __init__ (self, typename, val):
          self.val = val
  
!     def children (self):
          return SmartPtrIterator(unique_ptr_get(self.val))
  
!     def to_string (self):
!         return ('std::unique_ptr<%s>' % (str(self.val.type.template_argument(0))))
  
  def get_value_from_aligned_membuf(buf, valtype):
!     """Returns the value held in a __gnu_cxx::__aligned_membuf."""
      return buf['_M_storage'].address.cast(valtype.pointer()).dereference()
  
  def get_value_from_list_node(node):
!     """Returns the value held in an _List_node<_Val>"""
      try:
          member = node.type.fields()[1].name
          if member == '_M_data':
--- 311,356 ----
          n -= 1
      return _tuple_impl_get(node)
  
+ 
  def unique_ptr_get(val):
!     """Return the result of val.get() on a std::unique_ptr."""
      # std::unique_ptr<T, D> contains a std::tuple<D::pointer, D>,
      # either as a direct data member _M_t (the old implementation)
      # or within a data member of type __uniq_ptr_data.
      impl_type = val.type.fields()[0].type.strip_typedefs()
      # Check for new implementations first:
      if is_specialization_of(impl_type, '__uniq_ptr_data') \
!             or is_specialization_of(impl_type, '__uniq_ptr_impl'):
          tuple_member = val['_M_t']['_M_t']
      elif is_specialization_of(impl_type, 'tuple'):
          tuple_member = val['_M_t']
      else:
!         raise ValueError(
!             "Unsupported implementation for unique_ptr: %s" % str(impl_type))
      return tuple_get(0, tuple_member)
  
+ 
  class UniquePointerPrinter:
!     """Print a unique_ptr."""
  
!     def __init__(self, typename, val):
          self.val = val
  
!     def children(self):
          return SmartPtrIterator(unique_ptr_get(self.val))
  
!     def to_string(self):
!         t = self.val.type.template_argument(0)
!         return 'std::unique_ptr<{}>'.format(str(t))
! 
  
  def get_value_from_aligned_membuf(buf, valtype):
!     """Return the value held in a __gnu_cxx::__aligned_membuf."""
      return buf['_M_storage'].address.cast(valtype.pointer()).dereference()
  
+ 
  def get_value_from_list_node(node):
!     """Return the value held in an _List_node<_Val>."""
      try:
          member = node.type.fields()[1].name
          if member == '_M_data':
*************** def get_value_from_list_node(node):
*** 333,340 ****
          pass
      raise ValueError("Unsupported implementation for %s" % str(node.type))
  
  class StdListPrinter:
!     "Print a std::list"
  
      class _iterator(Iterator):
          def __init__(self, nodetype, head):
--- 364,372 ----
          pass
      raise ValueError("Unsupported implementation for %s" % str(node.type))
  
+ 
  class StdListPrinter:
!     """Print a std::list."""
  
      class _iterator(Iterator):
          def __init__(self, nodetype, head):
*************** class StdListPrinter:
*** 370,375 ****
--- 402,408 ----
              return 'empty %s' % (self.typename)
          return '%s' % (self.typename)
  
+ 
  class NodeIteratorPrinter:
      def __init__(self, typename, val, contname, nodename):
          self.val = val
*************** class NodeIteratorPrinter:
*** 383,403 ****
          node = self.val['_M_node'].cast(self.nodetype.pointer()).dereference()
          return str(get_value_from_list_node(node))
  
  class StdListIteratorPrinter(NodeIteratorPrinter):
!     "Print std::list::iterator"
  
      def __init__(self, typename, val):
          NodeIteratorPrinter.__init__(self, typename, val, 'list', '_List_node')
  
  class StdFwdListIteratorPrinter(NodeIteratorPrinter):
!     "Print std::forward_list::iterator"
  
      def __init__(self, typename, val):
          NodeIteratorPrinter.__init__(self, typename, val, 'forward_list',
                                       '_Fwd_list_node')
  
  class StdSlistPrinter:
!     "Print a __gnu_cxx::slist"
  
      class _iterator(Iterator):
          def __init__(self, nodetype, head):
--- 416,439 ----
          node = self.val['_M_node'].cast(self.nodetype.pointer()).dereference()
          return str(get_value_from_list_node(node))
  
+ 
  class StdListIteratorPrinter(NodeIteratorPrinter):
!     """Print std::list::iterator."""
  
      def __init__(self, typename, val):
          NodeIteratorPrinter.__init__(self, typename, val, 'list', '_List_node')
  
+ 
  class StdFwdListIteratorPrinter(NodeIteratorPrinter):
!     """Print std::forward_list::iterator."""
  
      def __init__(self, typename, val):
          NodeIteratorPrinter.__init__(self, typename, val, 'forward_list',
                                       '_Fwd_list_node')
  
+ 
  class StdSlistPrinter:
!     """Print a __gnu_cxx::slist."""
  
      class _iterator(Iterator):
          def __init__(self, nodetype, head):
*************** class StdSlistPrinter:
*** 429,436 ****
              return 'empty __gnu_cxx::slist'
          return '__gnu_cxx::slist'
  
  class StdSlistIteratorPrinter:
!     "Print __gnu_cxx::slist::iterator"
  
      def __init__(self, typename, val):
          self.val = val
--- 465,473 ----
              return 'empty __gnu_cxx::slist'
          return '__gnu_cxx::slist'
  
+ 
  class StdSlistIteratorPrinter:
!     """Print __gnu_cxx::slist::iterator."""
  
      def __init__(self, typename, val):
          self.val = val
*************** class StdSlistIteratorPrinter:
*** 438,457 ****
      def to_string(self):
          if not self.val['_M_node']:
              return 'non-dereferenceable iterator for __gnu_cxx::slist'
!         nodetype = lookup_node_type('__gnu_cxx::_Slist_node', self.val.type).pointer()
          return str(self.val['_M_node'].cast(nodetype).dereference()['_M_data'])
  
  class StdVectorPrinter:
!     "Print a std::vector"
  
      class _iterator(Iterator):
!         def __init__ (self, start, finish, bitvec):
              self.bitvec = bitvec
              if bitvec:
!                 self.item   = start['_M_p']
!                 self.so     = 0
                  self.finish = finish['_M_p']
!                 self.fo     = finish['_M_offset']
                  itype = self.item.dereference().type
                  self.isize = 8 * itype.sizeof
              else:
--- 475,496 ----
      def to_string(self):
          if not self.val['_M_node']:
              return 'non-dereferenceable iterator for __gnu_cxx::slist'
!         nodetype = lookup_node_type(
!             '__gnu_cxx::_Slist_node', self.val.type).pointer()
          return str(self.val['_M_node'].cast(nodetype).dereference()['_M_data'])
  
+ 
  class StdVectorPrinter:
!     """Print a std::vector."""
  
      class _iterator(Iterator):
!         def __init__(self, start, finish, bitvec):
              self.bitvec = bitvec
              if bitvec:
!                 self.item = start['_M_p']
!                 self.so = 0
                  self.finish = finish['_M_p']
!                 self.fo = finish['_M_offset']
                  itype = self.item.dereference().type
                  self.isize = 8 * itype.sizeof
              else:
*************** class StdVectorPrinter:
*** 498,519 ****
          if self.is_bool:
              start = self.val['_M_impl']['_M_start']['_M_p']
              finish = self.val['_M_impl']['_M_finish']['_M_p']
!             fo     = self.val['_M_impl']['_M_finish']['_M_offset']
              itype = start.dereference().type
              bl = 8 * itype.sizeof
!             length   = bl * (finish - start) + fo
              capacity = bl * (end - start)
              return ('%s<bool> of length %d, capacity %d'
!                     % (self.typename, int (length), int (capacity)))
          else:
              return ('%s of length %d, capacity %d'
!                     % (self.typename, int (finish - start), int (end - start)))
  
      def display_hint(self):
          return 'array'
  
  class StdVectorIteratorPrinter:
!     "Print std::vector::iterator"
  
      def __init__(self, typename, val):
          self.val = val
--- 537,559 ----
          if self.is_bool:
              start = self.val['_M_impl']['_M_start']['_M_p']
              finish = self.val['_M_impl']['_M_finish']['_M_p']
!             fo = self.val['_M_impl']['_M_finish']['_M_offset']
              itype = start.dereference().type
              bl = 8 * itype.sizeof
!             length = bl * (finish - start) + fo
              capacity = bl * (end - start)
              return ('%s<bool> of length %d, capacity %d'
!                     % (self.typename, int(length), int(capacity)))
          else:
              return ('%s of length %d, capacity %d'
!                     % (self.typename, int(finish - start), int(end - start)))
  
      def display_hint(self):
          return 'array'
  
+ 
  class StdVectorIteratorPrinter:
!     """Print std::vector::iterator."""
  
      def __init__(self, typename, val):
          self.val = val
*************** class StdVectorIteratorPrinter:
*** 523,530 ****
              return 'non-dereferenceable iterator for std::vector'
          return str(self.val['_M_current'].dereference())
  
  class StdBitIteratorPrinter:
!     "Print std::vector<bool>'s _Bit_iterator and _Bit_const_iterator"
  
      def __init__(self, typename, val):
          self.val = val
--- 563,571 ----
              return 'non-dereferenceable iterator for std::vector'
          return str(self.val['_M_current'].dereference())
  
+ 
  class StdBitIteratorPrinter:
!     """Print std::vector<bool>'s _Bit_iterator and _Bit_const_iterator."""
  
      def __init__(self, typename, val):
          self.val = val
*************** class StdBitIteratorPrinter:
*** 532,541 ****
      def to_string(self):
          if not self.val['_M_p']:
              return 'non-dereferenceable iterator for std::vector<bool>'
!         return bool(self.val['_M_p'].dereference() & (1 << self.val['_M_offset']))
  
  class StdBitReferencePrinter:
!     "Print std::vector<bool>::reference"
  
      def __init__(self, typename, val):
          self.val = val
--- 573,584 ----
      def to_string(self):
          if not self.val['_M_p']:
              return 'non-dereferenceable iterator for std::vector<bool>'
!         return bool(self.val['_M_p'].dereference()
!                     & (1 << self.val['_M_offset']))
! 
  
  class StdBitReferencePrinter:
!     """Print std::vector<bool>::reference."""
  
      def __init__(self, typename, val):
          self.val = val
*************** class StdBitReferencePrinter:
*** 545,595 ****
              return 'invalid std::vector<bool>::reference'
          return bool(self.val['_M_p'].dereference() & (self.val['_M_mask']))
  
  class StdTuplePrinter:
!     "Print a std::tuple"
  
      class _iterator(Iterator):
          @staticmethod
!         def _is_nonempty_tuple (nodes):
!             if len (nodes) == 2:
!                 if is_specialization_of (nodes[1].type, '__tuple_base'):
                      return True
!             elif len (nodes) == 1:
                  return True
!             elif len (nodes) == 0:
                  return False
!             raise ValueError("Top of tuple tree does not consist of a single node.")
  
!         def __init__ (self, head):
              self.head = head
  
              # Set the base class as the initial head of the
              # tuple.
!             nodes = self.head.type.fields ()
!             if self._is_nonempty_tuple (nodes):
                  # Set the actual head to the first pair.
!                 self.head  = self.head.cast (nodes[0].type)
              self.count = 0
  
!         def __iter__ (self):
              return self
  
!         def __next__ (self):
              # Check for further recursions in the inheritance tree.
              # For a GCC 5+ tuple self.head is None after visiting all nodes:
              if not self.head:
                  raise StopIteration
!             nodes = self.head.type.fields ()
              # For a GCC 4.x tuple there is a final node with no fields:
!             if len (nodes) == 0:
                  raise StopIteration
              # Check that this iteration has an expected structure.
!             if len (nodes) > 2:
!                 raise ValueError("Cannot parse more than 2 nodes in a tuple tree.")
  
!             if len (nodes) == 1:
                  # This is the last node of a GCC 5+ std::tuple.
!                 impl = self.head.cast (nodes[0].type)
                  self.head = None
              else:
                  # Either a node before the last node, or the last node of
--- 588,641 ----
              return 'invalid std::vector<bool>::reference'
          return bool(self.val['_M_p'].dereference() & (self.val['_M_mask']))
  
+ 
  class StdTuplePrinter:
!     """Print a std::tuple."""
  
      class _iterator(Iterator):
          @staticmethod
!         def _is_nonempty_tuple(nodes):
!             if len(nodes) == 2:
!                 if is_specialization_of(nodes[1].type, '__tuple_base'):
                      return True
!             elif len(nodes) == 1:
                  return True
!             elif len(nodes) == 0:
                  return False
!             raise ValueError(
!                 "Top of tuple tree does not consist of a single node.")
  
!         def __init__(self, head):
              self.head = head
  
              # Set the base class as the initial head of the
              # tuple.
!             nodes = self.head.type.fields()
!             if self._is_nonempty_tuple(nodes):
                  # Set the actual head to the first pair.
!                 self.head = self.head.cast(nodes[0].type)
              self.count = 0
  
!         def __iter__(self):
              return self
  
!         def __next__(self):
              # Check for further recursions in the inheritance tree.
              # For a GCC 5+ tuple self.head is None after visiting all nodes:
              if not self.head:
                  raise StopIteration
!             nodes = self.head.type.fields()
              # For a GCC 4.x tuple there is a final node with no fields:
!             if len(nodes) == 0:
                  raise StopIteration
              # Check that this iteration has an expected structure.
!             if len(nodes) > 2:
!                 raise ValueError(
!                     "Cannot parse more than 2 nodes in a tuple tree.")
  
!             if len(nodes) == 1:
                  # This is the last node of a GCC 5+ std::tuple.
!                 impl = self.head.cast(nodes[0].type)
                  self.head = None
              else:
                  # Either a node before the last node, or the last node of
*************** class StdTuplePrinter:
*** 599,651 ****
                  # - Right node is the actual class contained in the tuple.
  
                  # Process right node.
!                 impl = self.head.cast (nodes[1].type)
  
                  # Process left node and set it as head.
!                 self.head  = self.head.cast (nodes[0].type)
  
              self.count = self.count + 1
  
              # Finally, check the implementation.  If it is
              # wrapped in _M_head_impl return that, otherwise return
              # the value "as is".
!             fields = impl.type.fields ()
!             if len (fields) < 1 or fields[0].name != "_M_head_impl":
                  return ('[%d]' % self.count, impl)
              else:
                  return ('[%d]' % self.count, impl['_M_head_impl'])
  
!     def __init__ (self, typename, val):
          self.typename = strip_versioned_namespace(typename)
!         self.val = val;
  
!     def children (self):
!         return self._iterator (self.val)
  
!     def to_string (self):
!         if len (self.val.type.fields ()) == 0:
              return 'empty %s' % (self.typename)
          return '%s containing' % (self.typename)
  
  class StdStackOrQueuePrinter:
!     "Print a std::stack or std::queue"
  
!     def __init__ (self, typename, val):
          self.typename = strip_versioned_namespace(typename)
          self.visualizer = gdb.default_visualizer(val['c'])
  
!     def children (self):
          return self.visualizer.children()
  
!     def to_string (self):
          return '%s wrapping: %s' % (self.typename,
                                      self.visualizer.to_string())
  
!     def display_hint (self):
!         if hasattr (self.visualizer, 'display_hint'):
!             return self.visualizer.display_hint ()
          return None
  
  class RbtreeIterator(Iterator):
      """
      Turn an RB-tree-based container (std::map, std::set etc.) into
--- 645,699 ----
                  # - Right node is the actual class contained in the tuple.
  
                  # Process right node.
!                 impl = self.head.cast(nodes[1].type)
  
                  # Process left node and set it as head.
!                 self.head = self.head.cast(nodes[0].type)
  
              self.count = self.count + 1
  
              # Finally, check the implementation.  If it is
              # wrapped in _M_head_impl return that, otherwise return
              # the value "as is".
!             fields = impl.type.fields()
!             if len(fields) < 1 or fields[0].name != "_M_head_impl":
                  return ('[%d]' % self.count, impl)
              else:
                  return ('[%d]' % self.count, impl['_M_head_impl'])
  
!     def __init__(self, typename, val):
          self.typename = strip_versioned_namespace(typename)
!         self.val = val
  
!     def children(self):
!         return self._iterator(self.val)
  
!     def to_string(self):
!         if len(self.val.type.fields()) == 0:
              return 'empty %s' % (self.typename)
          return '%s containing' % (self.typename)
  
+ 
  class StdStackOrQueuePrinter:
!     """Print a std::stack or std::queue."""
  
!     def __init__(self, typename, val):
          self.typename = strip_versioned_namespace(typename)
          self.visualizer = gdb.default_visualizer(val['c'])
  
!     def children(self):
          return self.visualizer.children()
  
!     def to_string(self):
          return '%s wrapping: %s' % (self.typename,
                                      self.visualizer.to_string())
  
!     def display_hint(self):
!         if hasattr(self.visualizer, 'display_hint'):
!             return self.visualizer.display_hint()
          return None
  
+ 
  class RbtreeIterator(Iterator):
      """
      Turn an RB-tree-based container (std::map, std::set etc.) into
*************** class RbtreeIterator(Iterator):
*** 661,667 ****
          return self
  
      def __len__(self):
!         return int (self.size)
  
      def __next__(self):
          if self.count == self.size:
--- 709,715 ----
          return self
  
      def __len__(self):
!         return int(self.size)
  
      def __next__(self):
          if self.count == self.size:
*************** class RbtreeIterator(Iterator):
*** 685,692 ****
              self.node = node
          return result
  
  def get_value_from_Rb_tree_node(node):
!     """Returns the value held in an _Rb_tree_node<_Val>"""
      try:
          member = node.type.fields()[1].name
          if member == '_M_value_field':
--- 733,741 ----
              self.node = node
          return result
  
+ 
  def get_value_from_Rb_tree_node(node):
!     """Return the value held in an _Rb_tree_node<_Val>."""
      try:
          member = node.type.fields()[1].name
          if member == '_M_value_field':
*************** def get_value_from_Rb_tree_node(node):
*** 703,731 ****
  # This is a pretty printer for std::_Rb_tree_iterator (which is
  # std::map::iterator), and has nothing to do with the RbtreeIterator
  # class above.
  class StdRbtreeIteratorPrinter:
!     "Print std::map::iterator, std::set::iterator, etc."
  
!     def __init__ (self, typename, val):
          self.val = val
          nodetype = lookup_node_type('_Rb_tree_node', self.val.type)
          self.link_type = nodetype.pointer()
  
!     def to_string (self):
          if not self.val['_M_node']:
              return 'non-dereferenceable iterator for associative container'
          node = self.val['_M_node'].cast(self.link_type).dereference()
          return str(get_value_from_Rb_tree_node(node))
  
  class StdDebugIteratorPrinter:
!     "Print a debug enabled version of an iterator"
  
!     def __init__ (self, typename, val):
          self.val = val
  
      # Just strip away the encapsulating __gnu_debug::_Safe_iterator
      # and return the wrapped iterator value.
!     def to_string (self):
          base_type = gdb.lookup_type('__gnu_debug::_Safe_iterator_base')
          itype = self.val.type.template_argument(0)
          safe_seq = self.val.cast(base_type)['_M_sequence']
--- 752,783 ----
  # This is a pretty printer for std::_Rb_tree_iterator (which is
  # std::map::iterator), and has nothing to do with the RbtreeIterator
  # class above.
+ 
+ 
  class StdRbtreeIteratorPrinter:
!     """Print std::map::iterator, std::set::iterator, etc."""
  
!     def __init__(self, typename, val):
          self.val = val
          nodetype = lookup_node_type('_Rb_tree_node', self.val.type)
          self.link_type = nodetype.pointer()
  
!     def to_string(self):
          if not self.val['_M_node']:
              return 'non-dereferenceable iterator for associative container'
          node = self.val['_M_node'].cast(self.link_type).dereference()
          return str(get_value_from_Rb_tree_node(node))
  
+ 
  class StdDebugIteratorPrinter:
!     """Print a debug enabled version of an iterator."""
  
!     def __init__(self, typename, val):
          self.val = val
  
      # Just strip away the encapsulating __gnu_debug::_Safe_iterator
      # and return the wrapped iterator value.
!     def to_string(self):
          base_type = gdb.lookup_type('__gnu_debug::_Safe_iterator_base')
          itype = self.val.type.template_argument(0)
          safe_seq = self.val.cast(base_type)['_M_sequence']
*************** class StdDebugIteratorPrinter:
*** 735,746 ****
              return "invalid iterator"
          return str(self.val.cast(itype))
  
  def num_elements(num):
      """Return either "1 element" or "N elements" depending on the argument."""
      return '1 element' if num == 1 else '%d elements' % num
  
  class StdMapPrinter:
!     "Print a std::map or std::multimap"
  
      # Turn an RbtreeIterator into a pretty-print iterator.
      class _iter(Iterator):
--- 787,800 ----
              return "invalid iterator"
          return str(self.val.cast(itype))
  
+ 
  def num_elements(num):
      """Return either "1 element" or "N elements" depending on the argument."""
      return '1 element' if num == 1 else '%d elements' % num
  
+ 
  class StdMapPrinter:
!     """Print a std::map or std::multimap."""
  
      # Turn an RbtreeIterator into a pretty-print iterator.
      class _iter(Iterator):
*************** class StdMapPrinter:
*** 765,787 ****
              self.count = self.count + 1
              return result
  
!     def __init__ (self, typename, val):
          self.typename = strip_versioned_namespace(typename)
          self.val = val
  
!     def to_string (self):
          return '%s with %s' % (self.typename,
!                                num_elements(len(RbtreeIterator (self.val))))
  
!     def children (self):
          node = lookup_node_type('_Rb_tree_node', self.val.type).pointer()
!         return self._iter (RbtreeIterator (self.val), node)
  
!     def display_hint (self):
          return 'map'
  
  class StdSetPrinter:
!     "Print a std::set or std::multiset"
  
      # Turn an RbtreeIterator into a pretty-print iterator.
      class _iter(Iterator):
--- 819,842 ----
              self.count = self.count + 1
              return result
  
!     def __init__(self, typename, val):
          self.typename = strip_versioned_namespace(typename)
          self.val = val
  
!     def to_string(self):
          return '%s with %s' % (self.typename,
!                                num_elements(len(RbtreeIterator(self.val))))
  
!     def children(self):
          node = lookup_node_type('_Rb_tree_node', self.val.type).pointer()
!         return self._iter(RbtreeIterator(self.val), node)
  
!     def display_hint(self):
          return 'map'
  
+ 
  class StdSetPrinter:
!     """Print a std::set or std::multiset."""
  
      # Turn an RbtreeIterator into a pretty-print iterator.
      class _iter(Iterator):
*************** class StdSetPrinter:
*** 803,833 ****
              self.count = self.count + 1
              return result
  
!     def __init__ (self, typename, val):
          self.typename = strip_versioned_namespace(typename)
          self.val = val
  
!     def to_string (self):
          return '%s with %s' % (self.typename,
!                                num_elements(len(RbtreeIterator (self.val))))
  
!     def children (self):
          node = lookup_node_type('_Rb_tree_node', self.val.type).pointer()
!         return self._iter (RbtreeIterator (self.val), node)
  
  class StdBitsetPrinter:
!     "Print a std::bitset"
  
      def __init__(self, typename, val):
          self.typename = strip_versioned_namespace(typename)
          self.val = val
  
!     def to_string (self):
          # If template_argument handled values, we could print the
          # size.  Or we could use a regexp on the type.
          return '%s' % (self.typename)
  
!     def children (self):
          try:
              # An empty bitset may not have any members which will
              # result in an exception being thrown.
--- 858,889 ----
              self.count = self.count + 1
              return result
  
!     def __init__(self, typename, val):
          self.typename = strip_versioned_namespace(typename)
          self.val = val
  
!     def to_string(self):
          return '%s with %s' % (self.typename,
!                                num_elements(len(RbtreeIterator(self.val))))
  
!     def children(self):
          node = lookup_node_type('_Rb_tree_node', self.val.type).pointer()
!         return self._iter(RbtreeIterator(self.val), node)
! 
  
  class StdBitsetPrinter:
!     """Print a std::bitset."""
  
      def __init__(self, typename, val):
          self.typename = strip_versioned_namespace(typename)
          self.val = val
  
!     def to_string(self):
          # If template_argument handled values, we could print the
          # size.  Or we could use a regexp on the type.
          return '%s' % (self.typename)
  
!     def children(self):
          try:
              # An empty bitset may not have any members which will
              # result in an exception being thrown.
*************** class StdBitsetPrinter:
*** 841,847 ****
          # array.  This depends on the template specialization used.
          # If it is a single long, convert to a single element list.
          if wtype.code == gdb.TYPE_CODE_ARRAY:
!             tsize = wtype.target ().sizeof
          else:
              words = [words]
              tsize = wtype.sizeof
--- 897,903 ----
          # array.  This depends on the template specialization used.
          # If it is a single long, convert to a single element list.
          if wtype.code == gdb.TYPE_CODE_ARRAY:
!             tsize = wtype.target().sizeof
          else:
              words = [words]
              tsize = wtype.sizeof
*************** class StdBitsetPrinter:
*** 861,868 ****
              byte = byte + 1
          return result
  
  class StdDequePrinter:
!     "Print a std::deque"
  
      class _iter(Iterator):
          def __init__(self, node, start, end, last, buffer_size):
--- 917,925 ----
              byte = byte + 1
          return result
  
+ 
  class StdDequePrinter:
!     """Print a std::deque."""
  
      class _iter(Iterator):
          def __init__(self, node, start, end, last, buffer_size):
*************** class StdDequePrinter:
*** 900,906 ****
          self.elttype = val.type.template_argument(0)
          size = self.elttype.sizeof
          if size < 512:
!             self.buffer_size = int (512 / size)
          else:
              self.buffer_size = 1
  
--- 957,963 ----
          self.elttype = val.type.template_argument(0)
          size = self.elttype.sizeof
          if size < 512:
!             self.buffer_size = int(512 / size)
          else:
              self.buffer_size = 1
  
*************** class StdDequePrinter:
*** 922,932 ****
          return self._iter(start['_M_node'], start['_M_cur'], start['_M_last'],
                            end['_M_cur'], self.buffer_size)
  
!     def display_hint (self):
          return 'array'
  
  class StdDequeIteratorPrinter:
!     "Print std::deque::iterator"
  
      def __init__(self, typename, val):
          self.val = val
--- 979,990 ----
          return self._iter(start['_M_node'], start['_M_cur'], start['_M_last'],
                            end['_M_cur'], self.buffer_size)
  
!     def display_hint(self):
          return 'array'
  
+ 
  class StdDequeIteratorPrinter:
!     """Print std::deque::iterator."""
  
      def __init__(self, typename, val):
          self.val = val
*************** class StdDequeIteratorPrinter:
*** 936,943 ****
              return 'non-dereferenceable iterator for std::deque'
          return str(self.val['_M_cur'].dereference())
  
  class StdStringPrinter:
!     "Print a std::basic_string of some kind"
  
      def __init__(self, typename, val):
          self.val = val
--- 994,1002 ----
              return 'non-dereferenceable iterator for std::deque'
          return str(self.val['_M_cur'].dereference())
  
+ 
  class StdStringPrinter:
!     """Print a std::basic_string of some kind."""
  
      def __init__(self, typename, val):
          self.val = val
*************** class StdStringPrinter:
*** 947,976 ****
          # Make sure &string works, too.
          type = self.val.type
          if type.code == gdb.TYPE_CODE_REF:
!             type = type.target ()
  
          # Calculate the length of the string so that to_string returns
          # the string according to length, not according to first null
          # encountered.
!         ptr = self.val ['_M_dataplus']['_M_p']
          if self.new_string:
              length = self.val['_M_string_length']
              # https://sourceware.org/bugzilla/show_bug.cgi?id=17728
              ptr = ptr.cast(ptr.type.strip_typedefs())
          else:
!             realtype = type.unqualified ().strip_typedefs ()
!             reptype = gdb.lookup_type (str (realtype) + '::_Rep').pointer ()
              header = ptr.cast(reptype) - 1
!             length = header.dereference ()['_M_length']
          if hasattr(ptr, "lazy_string"):
!             return ptr.lazy_string (length = length)
!         return ptr.string (length = length)
  
!     def display_hint (self):
          return 'string'
  
  class Tr1HashtableIterator(Iterator):
!     def __init__ (self, hashtable):
          self.buckets = hashtable['_M_buckets']
          self.bucket = 0
          self.bucket_count = hashtable['_M_bucket_count']
--- 1006,1035 ----
          # Make sure &string works, too.
          type = self.val.type
          if type.code == gdb.TYPE_CODE_REF:
!             type = type.target()
  
          # Calculate the length of the string so that to_string returns
          # the string according to length, not according to first null
          # encountered.
!         ptr = self.val['_M_dataplus']['_M_p']
          if self.new_string:
              length = self.val['_M_string_length']
              # https://sourceware.org/bugzilla/show_bug.cgi?id=17728
              ptr = ptr.cast(ptr.type.strip_typedefs())
          else:
!             realtype = type.unqualified().strip_typedefs()
!             reptype = gdb.lookup_type(str(realtype) + '::_Rep').pointer()
              header = ptr.cast(reptype) - 1
!             length = header.dereference()['_M_length']
          if hasattr(ptr, "lazy_string"):
!             return ptr.lazy_string(length=length)
!         return ptr.string(length=length)
  
!     def display_hint(self):
          return 'string'
  
  class Tr1HashtableIterator(Iterator):
!     def __init__(self, hashtable):
          self.buckets = hashtable['_M_buckets']
          self.bucket = 0
          self.bucket_count = hashtable['_M_bucket_count']
*************** class Tr1HashtableIterator(Iterator):
*** 982,996 ****
                  break
              self.bucket = self.bucket + 1
  
!     def __iter__ (self):
          return self
  
!     def __next__ (self):
          if self.node == 0:
              raise StopIteration
          node = self.node.cast(self.node_type)
          result = node.dereference()['_M_v']
!         self.node = node.dereference()['_M_next'];
          if self.node == 0:
              self.bucket = self.bucket + 1
              while self.bucket != self.bucket_count:
--- 1041,1055 ----
                  break
              self.bucket = self.bucket + 1
  
!     def __iter__(self):
          return self
  
!     def __next__(self):
          if self.node == 0:
              raise StopIteration
          node = self.node.cast(self.node_type)
          result = node.dereference()['_M_v']
!         self.node = node.dereference()['_M_next']
          if self.node == 0:
              self.bucket = self.bucket + 1
              while self.bucket != self.bucket_count:
*************** class Tr1HashtableIterator(Iterator):
*** 1000,1005 ****
--- 1059,1065 ----
                  self.bucket = self.bucket + 1
          return result
  
+ 
  class StdHashtableIterator(Iterator):
      def __init__(self, hashtable):
          self.node = hashtable['_M_before_begin']['_M_nxt']
*************** class StdHashtableIterator(Iterator):
*** 1021,1098 ****
          valptr = valptr.cast(elt.type.template_argument(0).pointer())
          return valptr.dereference()
  
  class Tr1UnorderedSetPrinter:
!     "Print a std::unordered_set or tr1::unordered_set"
  
!     def __init__ (self, typename, val):
          self.typename = strip_versioned_namespace(typename)
          self.val = val
  
!     def hashtable (self):
          if self.typename.startswith('std::tr1'):
              return self.val
          return self.val['_M_h']
  
!     def to_string (self):
          count = self.hashtable()['_M_element_count']
          return '%s with %s' % (self.typename, num_elements(count))
  
      @staticmethod
!     def format_count (i):
          return '[%d]' % i
  
!     def children (self):
!         counter = imap (self.format_count, itertools.count())
          if self.typename.startswith('std::tr1'):
!             return izip (counter, Tr1HashtableIterator (self.hashtable()))
!         return izip (counter, StdHashtableIterator (self.hashtable()))
  
  class Tr1UnorderedMapPrinter:
!     "Print a std::unordered_map or tr1::unordered_map"
  
!     def __init__ (self, typename, val):
          self.typename = strip_versioned_namespace(typename)
          self.val = val
  
!     def hashtable (self):
          if self.typename.startswith('std::tr1'):
              return self.val
          return self.val['_M_h']
  
!     def to_string (self):
          count = self.hashtable()['_M_element_count']
          return '%s with %s' % (self.typename, num_elements(count))
  
      @staticmethod
!     def flatten (list):
          for elt in list:
              for i in elt:
                  yield i
  
      @staticmethod
!     def format_one (elt):
          return (elt['first'], elt['second'])
  
      @staticmethod
!     def format_count (i):
          return '[%d]' % i
  
!     def children (self):
!         counter = imap (self.format_count, itertools.count())
          # Map over the hash table and flatten the result.
          if self.typename.startswith('std::tr1'):
!             data = self.flatten (imap (self.format_one, Tr1HashtableIterator (self.hashtable())))
              # Zip the two iterators together.
!             return izip (counter, data)
!         data = self.flatten (imap (self.format_one, StdHashtableIterator (self.hashtable())))
          # Zip the two iterators together.
!         return izip (counter, data)
  
!     def display_hint (self):
          return 'map'
  
  class StdForwardListPrinter:
!     "Print a std::forward_list"
  
      class _iterator(Iterator):
          def __init__(self, nodetype, head):
--- 1081,1163 ----
          valptr = valptr.cast(elt.type.template_argument(0).pointer())
          return valptr.dereference()
  
+ 
  class Tr1UnorderedSetPrinter:
!     """Print a std::unordered_set or tr1::unordered_set."""
  
!     def __init__(self, typename, val):
          self.typename = strip_versioned_namespace(typename)
          self.val = val
  
!     def hashtable(self):
          if self.typename.startswith('std::tr1'):
              return self.val
          return self.val['_M_h']
  
!     def to_string(self):
          count = self.hashtable()['_M_element_count']
          return '%s with %s' % (self.typename, num_elements(count))
  
      @staticmethod
!     def format_count(i):
          return '[%d]' % i
  
!     def children(self):
!         counter = imap(self.format_count, itertools.count())
          if self.typename.startswith('std::tr1'):
!             return izip(counter, Tr1HashtableIterator(self.hashtable()))
!         return izip(counter, StdHashtableIterator(self.hashtable()))
! 
  
  class Tr1UnorderedMapPrinter:
!     """Print a std::unordered_map or tr1::unordered_map."""
  
!     def __init__(self, typename, val):
          self.typename = strip_versioned_namespace(typename)
          self.val = val
  
!     def hashtable(self):
          if self.typename.startswith('std::tr1'):
              return self.val
          return self.val['_M_h']
  
!     def to_string(self):
          count = self.hashtable()['_M_element_count']
          return '%s with %s' % (self.typename, num_elements(count))
  
      @staticmethod
!     def flatten(list):
          for elt in list:
              for i in elt:
                  yield i
  
      @staticmethod
!     def format_one(elt):
          return (elt['first'], elt['second'])
  
      @staticmethod
!     def format_count(i):
          return '[%d]' % i
  
!     def children(self):
!         counter = imap(self.format_count, itertools.count())
          # Map over the hash table and flatten the result.
          if self.typename.startswith('std::tr1'):
!             data = self.flatten(
!                 imap(self.format_one, Tr1HashtableIterator(self.hashtable())))
              # Zip the two iterators together.
!             return izip(counter, data)
!         data = self.flatten(
!             imap(self.format_one, StdHashtableIterator(self.hashtable())))
          # Zip the two iterators together.
!         return izip(counter, data)
  
!     def display_hint(self):
          return 'map'
  
+ 
  class StdForwardListPrinter:
!     """Print a std::forward_list."""
  
      class _iterator(Iterator):
          def __init__(self, nodetype, head):
*************** class StdForwardListPrinter:
*** 1127,1142 ****
              return 'empty %s' % self.typename
          return '%s' % self.typename
  
  class SingleObjContainerPrinter(object):
!     "Base class for printers of containers of single objects"
  
!     def __init__ (self, val, viz, hint = None):
          self.contained_value = val
          self.visualizer = viz
          self.hint = hint
  
      def _recognize(self, type):
!         """Return TYPE as a string after applying type printers"""
          global _use_type_printing
          if not _use_type_printing:
              return str(type)
--- 1192,1208 ----
              return 'empty %s' % self.typename
          return '%s' % self.typename
  
+ 
  class SingleObjContainerPrinter(object):
!     """Base class for printers of containers of single objects."""
  
!     def __init__(self, val, viz, hint=None):
          self.contained_value = val
          self.visualizer = viz
          self.hint = hint
  
      def _recognize(self, type):
!         """Return type as a string after applying type printers."""
          global _use_type_printing
          if not _use_type_printing:
              return str(type)
*************** class SingleObjContainerPrinter(object):
*** 1144,1153 ****
                                                  type) or str(type)
  
      class _contained(Iterator):
!         def __init__ (self, val):
              self.val = val
  
!         def __iter__ (self):
              return self
  
          def __next__(self):
--- 1210,1219 ----
                                                  type) or str(type)
  
      class _contained(Iterator):
!         def __init__(self, val):
              self.val = val
  
!         def __iter__(self):
              return self
  
          def __next__(self):
*************** class SingleObjContainerPrinter(object):
*** 1157,1178 ****
              self.val = None
              return ('[contained value]', retval)
  
!     def children (self):
          if self.contained_value is None:
!             return self._contained (None)
!         if hasattr (self.visualizer, 'children'):
!             return self.visualizer.children ()
!         return self._contained (self.contained_value)
  
!     def display_hint (self):
!         # if contained value is a map we want to display in the same way
!         if hasattr (self.visualizer, 'children') and hasattr (self.visualizer, 'display_hint'):
!             return self.visualizer.display_hint ()
          return self.hint
  
  def function_pointer_to_name(f):
!     "Find the name of the function referred to by the gdb.Value f, "
!     " which should contain a function pointer from the program."
  
      # Turn the function pointer into an actual address.
      # This is needed to unpack ppc64 function descriptors.
--- 1223,1246 ----
              self.val = None
              return ('[contained value]', retval)
  
!     def children(self):
          if self.contained_value is None:
!             return self._contained(None)
!         if hasattr(self.visualizer, 'children'):
!             return self.visualizer.children()
!         return self._contained(self.contained_value)
  
!     def display_hint(self):
!         if (hasattr(self.visualizer, 'children')
!                 and hasattr(self.visualizer, 'display_hint')):
!             # If contained value is a map we want to display in the same way.
!             return self.visualizer.display_hint()
          return self.hint
  
+ 
  def function_pointer_to_name(f):
!     """Find the name of the function referred to by the gdb.Value f,
!     which should contain a function pointer from the program."""
  
      # Turn the function pointer into an actual address.
      # This is needed to unpack ppc64 function descriptors.
*************** def function_pointer_to_name(f):
*** 1193,1204 ****
      except:
          return None
  
  class StdExpAnyPrinter(SingleObjContainerPrinter):
!     "Print a std::any or std::experimental::any"
  
!     def __init__ (self, typename, val):
          self.typename = strip_versioned_namespace(typename)
!         self.typename = re.sub('^std::experimental::fundamentals_v\d::', 'std::experimental::', self.typename, 1)
          self.val = val
          self.contained_type = None
          contained_value = None
--- 1261,1274 ----
      except:
          return None
  
+ 
  class StdExpAnyPrinter(SingleObjContainerPrinter):
!     """Print a std::any or std::experimental::any."""
  
!     def __init__(self, typename, val):
          self.typename = strip_versioned_namespace(typename)
!         self.typename = re.sub(r'^std::experimental::fundamentals_v\d::',
!                                'std::experimental::', self.typename, 1)
          self.val = val
          self.contained_type = None
          contained_value = None
*************** class StdExpAnyPrinter(SingleObjContaine
*** 1207,1224 ****
          if mgr != 0:
              func = function_pointer_to_name(mgr)
              if not func:
!                 raise ValueError("Invalid function pointer in %s" % (self.typename))
!             rx = r"""({0}::_Manager_\w+<.*>)::_S_manage\((enum )?{0}::_Op, (const {0}|{0} const) ?\*, (union )?{0}::_Arg ?\*\)""".format(typename)
              m = re.match(rx, func)
              if not m:
!                 raise ValueError("Unknown manager function in %s" % self.typename)
  
              mgrname = m.group(1)
              # FIXME need to expand 'std::string' so that gdb.lookup_type works
              if 'std::string' in mgrname:
!                 mgrname = re.sub("std::string(?!\w)", str(gdb.lookup_type('std::string').strip_typedefs()), m.group(1))
! 
!             mgrtype = gdb.lookup_type(mgrname)
              self.contained_type = mgrtype.template_argument(0)
              valptr = None
              if '::_Manager_internal' in mgrname:
--- 1277,1325 ----
          if mgr != 0:
              func = function_pointer_to_name(mgr)
              if not func:
!                 raise ValueError(
!                     "Invalid function pointer in %s" % (self.typename))
!             # We want to use this regular expression:
!             # T::_Manager_xxx<.*>::_S_manage\(T::_Op, const T\*, T::_Arg\*\)
!             # where T is std::any or std::experimental::any.
!             # But we need to account for variances in demangled names
!             # between GDB versions, e.g. 'enum T::_Op' instead of 'T::_Op'.
!             rx = (
!                 r"({0}::_Manager_\w+<.*>)::_S_manage\("
!                 r"(enum )?{0}::_Op, (const {0}|{0} const) ?\*, "
!                 r"(union )?{0}::_Arg ?\*\)"
!             ).format(typename)
              m = re.match(rx, func)
              if not m:
!                 raise ValueError(
!                     "Unknown manager function in %s" % self.typename)
  
              mgrname = m.group(1)
              # FIXME need to expand 'std::string' so that gdb.lookup_type works
              if 'std::string' in mgrname:
!                 mgrtypes = []
!                 for s in StdExpAnyPrinter._string_types():
!                     try:
!                         x = re.sub(r"std::string(?!\w)", s, m.group(1))
!                         # The following lookup might raise gdb.error if the
!                         # manager function was never instantiated for 's' in
!                         # the program, because there will be no such type.
!                         mgrtypes.append(gdb.lookup_type(x))
!                     except gdb.error:
!                         pass
!                 if len(mgrtypes) != 1:
!                     # FIXME: this is unlikely in practice, but possible for
!                     # programs that use both old and new string types with
!                     # std::any in a single program. Can we do better?
!                     # Maybe find the address of each type's _S_manage and
!                     # compare to the address stored in _M_manager?
!                     raise ValueError(
!                         'Cannot uniquely determine std::string type '
!                         'used in std::any'
!                     )
!                 mgrtype = mgrtypes[0]
!             else:
!                 mgrtype = gdb.lookup_type(mgrname)
              self.contained_type = mgrtype.template_argument(0)
              valptr = None
              if '::_Manager_internal' in mgrname:
*************** class StdExpAnyPrinter(SingleObjContaine
*** 1226,1252 ****
              elif '::_Manager_external' in mgrname:
                  valptr = self.val['_M_storage']['_M_ptr']
              else:
!                 raise ValueError("Unknown manager function in %s" % self.typename)
!             contained_value = valptr.cast(self.contained_type.pointer()).dereference()
              visualizer = gdb.default_visualizer(contained_value)
!         super(StdExpAnyPrinter, self).__init__ (contained_value, visualizer)
  
!     def to_string (self):
          if self.contained_type is None:
              return '%s [no contained value]' % self.typename
          desc = "%s containing " % self.typename
!         if hasattr (self.visualizer, 'children'):
!             return desc + self.visualizer.to_string ()
!         valtype = self._recognize (self.contained_type)
          return desc + strip_versioned_namespace(str(valtype))
  
  class StdExpOptionalPrinter(SingleObjContainerPrinter):
!     "Print a std::optional or std::experimental::optional"
  
!     def __init__ (self, typename, val):
!         valtype = self._recognize (val.type.template_argument(0))
          typename = strip_versioned_namespace(typename)
!         self.typename = re.sub('^std::(experimental::|)(fundamentals_v\d::|)(.*)', r'std::\1\3<%s>' % valtype, typename, 1)
          payload = val['_M_payload']
          if self.typename.startswith('std::experimental'):
              engaged = val['_M_engaged']
--- 1327,1371 ----
              elif '::_Manager_external' in mgrname:
                  valptr = self.val['_M_storage']['_M_ptr']
              else:
!                 raise ValueError(
!                     "Unknown manager function in %s" % self.typename)
!             contained_value = valptr.cast(
!                 self.contained_type.pointer()).dereference()
              visualizer = gdb.default_visualizer(contained_value)
!         super(StdExpAnyPrinter, self).__init__(contained_value, visualizer)
  
!     def to_string(self):
          if self.contained_type is None:
              return '%s [no contained value]' % self.typename
          desc = "%s containing " % self.typename
!         if hasattr(self.visualizer, 'children'):
!             return desc + self.visualizer.to_string()
!         valtype = self._recognize(self.contained_type)
          return desc + strip_versioned_namespace(str(valtype))
  
+     @staticmethod
+     def _string_types():
+         # This lookup for std::string might return the __cxx11 version,
+         # but that's not necessarily the one used by the std::any
+         # manager function we're trying to find.
+         strings = {str(gdb.lookup_type('std::string').strip_typedefs())}
+         # So also consider all the other possible std::string types!
+         s = 'basic_string<char, std::char_traits<char>, std::allocator<char> >'
+         quals = ['std::', 'std::__cxx11::',
+                  'std::' + _versioned_namespace]
+         strings |= {q + s for q in quals}  # set of unique strings
+         return strings
+ 
+ 
  class StdExpOptionalPrinter(SingleObjContainerPrinter):
!     """Print a std::optional or std::experimental::optional."""
  
!     def __init__(self, typename, val):
!         valtype = self._recognize(val.type.template_argument(0))
          typename = strip_versioned_namespace(typename)
!         self.typename = re.sub(
!             r'^std::(experimental::|)(fundamentals_v\d::|)(.*)',
!             r'std::\1\3<%s>' % valtype, typename, 1)
          payload = val['_M_payload']
          if self.typename.startswith('std::experimental'):
              engaged = val['_M_engaged']
*************** class StdExpOptionalPrinter(SingleObjCon
*** 1259,1279 ****
                  contained_value = contained_value['_M_value']
              except:
                  pass
!         visualizer = gdb.default_visualizer (contained_value)
          if not engaged:
              contained_value = None
!         super (StdExpOptionalPrinter, self).__init__ (contained_value, visualizer)
  
!     def to_string (self):
          if self.contained_value is None:
              return "%s [no contained value]" % self.typename
!         if hasattr (self.visualizer, 'children'):
              return "%s containing %s" % (self.typename,
                                           self.visualizer.to_string())
          return self.typename
  
  class StdVariantPrinter(SingleObjContainerPrinter):
!     "Print a std::variant"
  
      def __init__(self, typename, val):
          alternatives = get_template_arg_list(val.type)
--- 1378,1400 ----
                  contained_value = contained_value['_M_value']
              except:
                  pass
!         visualizer = gdb.default_visualizer(contained_value)
          if not engaged:
              contained_value = None
!         super(StdExpOptionalPrinter, self).__init__(
!             contained_value, visualizer)
  
!     def to_string(self):
          if self.contained_value is None:
              return "%s [no contained value]" % self.typename
!         if hasattr(self.visualizer, 'children'):
              return "%s containing %s" % (self.typename,
                                           self.visualizer.to_string())
          return self.typename
  
+ 
  class StdVariantPrinter(SingleObjContainerPrinter):
!     """Print a std::variant."""
  
      def __init__(self, typename, val):
          alternatives = get_template_arg_list(val.type)
*************** class StdVariantPrinter(SingleObjContain
*** 1287,1295 ****
          else:
              self.contained_type = alternatives[int(self.index)]
              addr = val['_M_u']['_M_first']['_M_storage'].address
!             contained_value = addr.cast(self.contained_type.pointer()).dereference()
              visualizer = gdb.default_visualizer(contained_value)
!         super (StdVariantPrinter, self).__init__(contained_value, visualizer, 'array')
  
      def to_string(self):
          if self.contained_value is None:
--- 1408,1418 ----
          else:
              self.contained_type = alternatives[int(self.index)]
              addr = val['_M_u']['_M_first']['_M_storage'].address
!             contained_value = addr.cast(
!                 self.contained_type.pointer()).dereference()
              visualizer = gdb.default_visualizer(contained_value)
!         super(StdVariantPrinter, self).__init__(
!             contained_value, visualizer, 'array')
  
      def to_string(self):
          if self.contained_value is None:
*************** class StdVariantPrinter(SingleObjContain
*** 1299,1316 ****
                                                      self.visualizer.to_string())
          return "%s [index %d]" % (self.typename, self.index)
  
  class StdNodeHandlePrinter(SingleObjContainerPrinter):
!     "Print a container node handle"
  
      def __init__(self, typename, val):
          self.value_type = val.type.template_argument(1)
          nodetype = val.type.template_argument(2).template_argument(0)
!         self.is_rb_tree_node = is_specialization_of(nodetype.name, '_Rb_tree_node')
          self.is_map_node = val.type.template_argument(0) != self.value_type
          nodeptr = val['_M_ptr']
          if nodeptr:
              if self.is_rb_tree_node:
!                 contained_value = get_value_from_Rb_tree_node(nodeptr.dereference())
              else:
                  contained_value = get_value_from_aligned_membuf(nodeptr['_M_storage'],
                                                                  self.value_type)
--- 1422,1442 ----
                                                      self.visualizer.to_string())
          return "%s [index %d]" % (self.typename, self.index)
  
+ 
  class StdNodeHandlePrinter(SingleObjContainerPrinter):
!     """Print a container node handle."""
  
      def __init__(self, typename, val):
          self.value_type = val.type.template_argument(1)
          nodetype = val.type.template_argument(2).template_argument(0)
!         self.is_rb_tree_node = is_specialization_of(
!             nodetype.name, '_Rb_tree_node')
          self.is_map_node = val.type.template_argument(0) != self.value_type
          nodeptr = val['_M_ptr']
          if nodeptr:
              if self.is_rb_tree_node:
!                 contained_value = get_value_from_Rb_tree_node(
!                     nodeptr.dereference())
              else:
                  contained_value = get_value_from_aligned_membuf(nodeptr['_M_storage'],
                                                                  self.value_type)
*************** class StdNodeHandlePrinter(SingleObjCont
*** 1328,1336 ****
          if not self.is_rb_tree_node:
              desc += 'unordered '
          if self.is_map_node:
!             desc += 'map';
          else:
!             desc += 'set';
  
          if self.contained_value:
              desc += ' with element'
--- 1454,1462 ----
          if not self.is_rb_tree_node:
              desc += 'unordered '
          if self.is_map_node:
!             desc += 'map'
          else:
!             desc += 'set'
  
          if self.contained_value:
              desc += ' with element'
*************** class StdNodeHandlePrinter(SingleObjCont
*** 1340,1370 ****
          else:
              return 'empty %s' % desc
  
  class StdExpStringViewPrinter:
!     "Print a std::basic_string_view or std::experimental::basic_string_view"
  
!     def __init__ (self, typename, val):
          self.val = val
  
!     def to_string (self):
          ptr = self.val['_M_str']
          len = self.val['_M_len']
!         if hasattr (ptr, "lazy_string"):
!             return ptr.lazy_string (length = len)
!         return ptr.string (length = len)
  
!     def display_hint (self):
          return 'string'
  
  class StdExpPathPrinter:
!     "Print a std::experimental::filesystem::path"
  
!     def __init__ (self, typename, val):
          self.val = val
          self.typename = typename
          start = self.val['_M_cmpts']['_M_impl']['_M_start']
          finish = self.val['_M_cmpts']['_M_impl']['_M_finish']
!         self.num_cmpts = int (finish - start)
  
      def _path_type(self):
          t = str(self.val['_M_type'])
--- 1466,1500 ----
          else:
              return 'empty %s' % desc
  
+ 
  class StdExpStringViewPrinter:
!     """
!     Print a std::basic_string_view or std::experimental::basic_string_view
!     """
  
!     def __init__(self, typename, val):
          self.val = val
  
!     def to_string(self):
          ptr = self.val['_M_str']
          len = self.val['_M_len']
!         if hasattr(ptr, "lazy_string"):
!             return ptr.lazy_string(length=len)
!         return ptr.string(length=len)
  
!     def display_hint(self):
          return 'string'
  
+ 
  class StdExpPathPrinter:
!     """Print a std::experimental::filesystem::path."""
  
!     def __init__(self, typename, val):
          self.val = val
          self.typename = typename
          start = self.val['_M_cmpts']['_M_impl']['_M_start']
          finish = self.val['_M_cmpts']['_M_impl']['_M_finish']
!         self.num_cmpts = int(finish - start)
  
      def _path_type(self):
          t = str(self.val['_M_type'])
*************** class StdExpPathPrinter:
*** 1374,1381 ****
              return "root-name"
          return None
  
!     def to_string (self):
!         path = "%s" % self.val ['_M_pathname']
          if self.num_cmpts == 0:
              t = self._path_type()
              if t:
--- 1504,1511 ----
              return "root-name"
          return None
  
!     def to_string(self):
!         path = "%s" % self.val['_M_pathname']
          if self.num_cmpts == 0:
              t = self._path_type()
              if t:
*************** class StdExpPathPrinter:
*** 1408,1417 ****
      def children(self):
          return self._iterator(self.val['_M_cmpts'], self.typename)
  
  class StdPathPrinter:
!     "Print a std::filesystem::path"
  
!     def __init__ (self, typename, val):
          self.val = val
          self.typename = typename
          impl = unique_ptr_get(self.val['_M_cmpts']['_M_impl'])
--- 1538,1548 ----
      def children(self):
          return self._iterator(self.val['_M_cmpts'], self.typename)
  
+ 
  class StdPathPrinter:
!     """Print a std::filesystem::path."""
  
!     def __init__(self, typename, val):
          self.val = val
          self.typename = typename
          impl = unique_ptr_get(self.val['_M_cmpts']['_M_impl'])
*************** class StdPathPrinter:
*** 1429,1436 ****
              return "root-name"
          return None
  
!     def to_string (self):
!         path = "%s" % self.val ['_M_pathname']
          if self.type != 0:
              t = self._path_type()
              if t:
--- 1560,1567 ----
              return "root-name"
          return None
  
!     def to_string(self):
!         path = "%s" % self.val['_M_pathname']
          if self.type != 0:
              t = self._path_type()
              if t:
*************** class StdPathPrinter:
*** 1444,1450 ****
                  # We can't access _Impl::_M_size because _Impl is incomplete
                  # so cast to int* to access the _M_size member at offset zero,
                  int_type = gdb.lookup_type('int')
!                 cmpt_type = gdb.lookup_type(pathtype+'::_Cmpt')
                  char_type = gdb.lookup_type('char')
                  impl = impl.cast(int_type.pointer())
                  size = impl.dereference()
--- 1575,1581 ----
                  # We can't access _Impl::_M_size because _Impl is incomplete
                  # so cast to int* to access the _M_size member at offset zero,
                  int_type = gdb.lookup_type('int')
!                 cmpt_type = gdb.lookup_type(pathtype + '::_Cmpt')
                  char_type = gdb.lookup_type('char')
                  impl = impl.cast(int_type.pointer())
                  size = impl.dereference()
*************** class StdPathPrinter:
*** 1482,1494 ****
  
  
  class StdPairPrinter:
!     "Print a std::pair object, with 'first' and 'second' as children"
  
      def __init__(self, typename, val):
          self.val = val
  
      class _iter(Iterator):
!         "An iterator for std::pair types. Returns 'first' then 'second'."
  
          def __init__(self, val):
              self.val = val
--- 1613,1625 ----
  
  
  class StdPairPrinter:
!     """Print a std::pair object, with 'first' and 'second' as children."""
  
      def __init__(self, typename, val):
          self.val = val
  
      class _iter(Iterator):
!         """An iterator for std::pair types. Returns 'first' then 'second'."""
  
          def __init__(self, val):
              self.val = val
*************** class StdPairPrinter:
*** 1513,1539 ****
      def to_string(self):
          return None
  
  class StdCmpCatPrinter:
!     "Print a comparison category object"
  
!     def __init__ (self, typename, val):
!         self.typename = typename[typename.rfind(':')+1:]
          self.val = val['_M_value']
  
!     def to_string (self):
          if self.typename == 'strong_ordering' and self.val == 0:
              name = 'equal'
          else:
!             names = {2:'unordered', -1:'less', 0:'equivalent', 1:'greater'}
              name = names[int(self.val)]
          return 'std::{}::{}'.format(self.typename, name)
  
  class StdErrorCodePrinter:
!     "Print a std::error_code or std::error_condition"
  
      _system_is_posix = None  # Whether std::system_category() use errno values.
  
!     def __init__ (self, typename, val):
          self.val = val
          self.typename = strip_versioned_namespace(typename)
          # Do this only once ...
--- 1644,1672 ----
      def to_string(self):
          return None
  
+ 
  class StdCmpCatPrinter:
!     """Print a comparison category object."""
  
!     def __init__(self, typename, val):
!         self.typename = typename[typename.rfind(':') + 1:]
          self.val = val['_M_value']
  
!     def to_string(self):
          if self.typename == 'strong_ordering' and self.val == 0:
              name = 'equal'
          else:
!             names = {2: 'unordered', -1: 'less', 0: 'equivalent', 1: 'greater'}
              name = names[int(self.val)]
          return 'std::{}::{}'.format(self.typename, name)
  
+ 
  class StdErrorCodePrinter:
!     """Print a std::error_code or std::error_condition."""
  
      _system_is_posix = None  # Whether std::system_category() use errno values.
  
!     def __init__(self, typename, val):
          self.val = val
          self.typename = strip_versioned_namespace(typename)
          # Do this only once ...
*************** class StdErrorCodePrinter:
*** 1577,1590 ****
  
      @classmethod
      def _category_info(cls, cat):
!         "Return details of a std::error_category"
  
          name = None
          enum = None
          is_errno = False
  
          # Try these first, or we get "warning: RTTI symbol not found" when
!         # using cat.dynamic_type on the local class types for Net TS categories.
          func, enum = cls._match_net_ts_category(cat)
          if func is not None:
              return (None, func, enum, is_errno)
--- 1710,1724 ----
  
      @classmethod
      def _category_info(cls, cat):
!         """Return details of a std::error_category."""
  
          name = None
          enum = None
          is_errno = False
  
          # Try these first, or we get "warning: RTTI symbol not found" when
!         # using cat.dynamic_type on the local class types for Net TS
!         # categories.
          func, enum = cls._match_net_ts_category(cat)
          if func is not None:
              return (None, func, enum, is_errno)
*************** class StdErrorCodePrinter:
*** 1619,1636 ****
  
      @staticmethod
      def _unqualified_name(name):
!         "Strip any nested-name-specifier from NAME to give an unqualified name"
          return name.split('::')[-1]
  
!     def to_string (self):
          value = self.val['_M_value']
          cat = self.val['_M_cat']
          name, alt_name, enum, is_errno = self._category_info(cat)
          if value == 0:
!             default_cats = { 'error_code' : 'system',
!                              'error_condition' : 'generic' }
              if name == default_cats[self._unqualified_name(self.typename)]:
!                 return self.typename + ' = { }' # default-constructed value
  
          strval = str(value)
          if is_errno and value != 0:
--- 1753,1772 ----
  
      @staticmethod
      def _unqualified_name(name):
!         """
!         Strip any nested-name-specifier from name to give an unqualified name.
!         """
          return name.split('::')[-1]
  
!     def to_string(self):
          value = self.val['_M_value']
          cat = self.val['_M_cat']
          name, alt_name, enum, is_errno = self._category_info(cat)
          if value == 0:
!             default_cats = {'error_code': 'system',
!                             'error_condition': 'generic'}
              if name == default_cats[self._unqualified_name(self.typename)]:
!                 return self.typename + ' = { }'  # default-constructed value
  
          strval = str(value)
          if is_errno and value != 0:
*************** class StdErrorCodePrinter:
*** 1649,1674 ****
  
  
  class StdRegexStatePrinter:
!     "Print a state node in the NFA for a std::regex"
  
!     def __init__ (self, typename, val):
          self.val = val
          self.typename = typename
  
!     def to_string (self):
          opcode = str(self.val['_M_opcode'])
          if opcode:
              opcode = opcode[25:]
          next_id = self.val['_M_next']
  
!         variants = {'repeat':'alt', 'alternative':'alt',
!                     'subexpr_begin':'subexpr', 'subexpr_end':'subexpr',
!                     'line_begin_assertion':None, 'line_end_assertion':None,
!                     'word_boundary':'neg', 'subexpr_lookahead':'neg',
!                     'backref':'backref_index',
!                     'match':None, 'accept':None,
!                     'dummy':None, 'unknown':None
!                    }
          v = variants[opcode]
  
          s = "opcode={}, next={}".format(opcode, next_id)
--- 1785,1810 ----
  
  
  class StdRegexStatePrinter:
!     """Print a state node in the NFA for a std::regex."""
  
!     def __init__(self, typename, val):
          self.val = val
          self.typename = typename
  
!     def to_string(self):
          opcode = str(self.val['_M_opcode'])
          if opcode:
              opcode = opcode[25:]
          next_id = self.val['_M_next']
  
!         variants = {'repeat': 'alt', 'alternative': 'alt',
!                     'subexpr_begin': 'subexpr', 'subexpr_end': 'subexpr',
!                     'line_begin_assertion': None, 'line_end_assertion': None,
!                     'word_boundary': 'neg', 'subexpr_lookahead': 'neg',
!                     'backref': 'backref_index',
!                     'match': None, 'accept': None,
!                     'dummy': None, 'unknown': None
!                     }
          v = variants[opcode]
  
          s = "opcode={}, next={}".format(opcode, next_id)
*************** class StdRegexStatePrinter:
*** 1676,1683 ****
              s = "{}, {}={}".format(s, v, self.val['_M_' + v])
          return "{%s}" % (s)
  
  class StdSpanPrinter:
!     "Print a std::span"
  
      class iterator(Iterator):
          def __init__(self, begin, size):
--- 1812,1820 ----
              s = "{}, {}={}".format(s, v, self.val['_M_' + v])
          return "{%s}" % (s)
  
+ 
  class StdSpanPrinter:
!     """Print a std::span."""
  
      class iterator(Iterator):
          def __init__(self, begin, size):
*************** class StdSpanPrinter:
*** 1685,1694 ****
              self.begin = begin
              self.size = size
  
!         def __iter__ (self):
              return self
  
!         def __next__ (self):
              if self.count == self.size:
                  raise StopIteration
  
--- 1822,1831 ----
              self.begin = begin
              self.size = size
  
!         def __iter__(self):
              return self
  
!         def __next__(self):
              if self.count == self.size:
                  raise StopIteration
  
*************** class StdSpanPrinter:
*** 1699,1705 ****
      def __init__(self, typename, val):
          self.typename = strip_versioned_namespace(typename)
          self.val = val
!         if val.type.template_argument(1) == gdb.parse_and_eval('static_cast<std::size_t>(-1)'):
              self.size = val['_M_extent']['_M_extent_value']
          else:
              self.size = val.type.template_argument(1)
--- 1836,1843 ----
      def __init__(self, typename, val):
          self.typename = strip_versioned_namespace(typename)
          self.val = val
!         size_max = gdb.parse_and_eval('static_cast<std::size_t>(-1)')
!         if val.type.template_argument(1) == size_max:
              self.size = val['_M_extent']['_M_extent_value']
          else:
              self.size = val.type.template_argument(1)
*************** class StdSpanPrinter:
*** 1713,1720 ****
      def display_hint(self):
          return 'array'
  
  class StdInitializerListPrinter:
!     "Print a std::initializer_list"
  
      def __init__(self, typename, val):
          self.typename = typename
--- 1851,1859 ----
      def display_hint(self):
          return 'array'
  
+ 
  class StdInitializerListPrinter:
!     """Print a std::initializer_list."""
  
      def __init__(self, typename, val):
          self.typename = typename
*************** class StdInitializerListPrinter:
*** 1730,1737 ****
      def display_hint(self):
          return 'array'
  
  class StdAtomicPrinter:
!     "Print a std:atomic"
  
      def __init__(self, typename, val):
          self.typename = strip_versioned_namespace(typename)
--- 1869,1877 ----
      def display_hint(self):
          return 'array'
  
+ 
  class StdAtomicPrinter:
!     """Print a std:atomic."""
  
      def __init__(self, typename, val):
          self.typename = strip_versioned_namespace(typename)
*************** class StdAtomicPrinter:
*** 1740,1746 ****
          self.value_type = self.val.type.template_argument(0)
          if self.value_type.tag is not None:
              typ = strip_versioned_namespace(self.value_type.tag)
!             if typ.startswith('std::shared_ptr<') or typ.startswith('std::weak_ptr<'):
                  impl = val['_M_impl']
                  self.shptr_printer = SharedPointerPrinter(typename, impl)
                  self.children = self._shptr_children
--- 1880,1887 ----
          self.value_type = self.val.type.template_argument(0)
          if self.value_type.tag is not None:
              typ = strip_versioned_namespace(self.value_type.tag)
!             if (typ.startswith('std::shared_ptr<')
!                     or typ.startswith('std::weak_ptr<')):
                  impl = val['_M_impl']
                  self.shptr_printer = SharedPointerPrinter(typename, impl)
                  self.children = self._shptr_children
*************** class RxPrinter(object):
*** 1778,1790 ****
              return None
  
          if value.type.code == gdb.TYPE_CODE_REF:
!             if hasattr(gdb.Value,"referenced_value"):
                  value = value.referenced_value()
  
          return self.function(self.name, value)
  
  # A pretty-printer that conforms to the "PrettyPrinter" protocol from
  # gdb.printing.  It can also be used directly as an old-style printer.
  class Printer(object):
      def __init__(self, name):
          super(Printer, self).__init__()
--- 1919,1933 ----
              return None
  
          if value.type.code == gdb.TYPE_CODE_REF:
!             if hasattr(gdb.Value, "referenced_value"):
                  value = value.referenced_value()
  
          return self.function(self.name, value)
  
  # A pretty-printer that conforms to the "PrettyPrinter" protocol from
  # gdb.printing.  It can also be used directly as an old-style printer.
+ 
+ 
  class Printer(object):
      def __init__(self, name):
          super(Printer, self).__init__()
*************** class Printer(object):
*** 1798,1804 ****
          # A small sanity check.
          # FIXME
          if not self.compiled_rx.match(name):
!             raise ValueError('libstdc++ programming error: "%s" does not match' % name)
          printer = RxPrinter(name, function)
          self.subprinters.append(printer)
          self.lookup[name] = printer
--- 1941,1948 ----
          # A small sanity check.
          # FIXME
          if not self.compiled_rx.match(name):
!             raise ValueError(
!                 'libstdc++ programming error: "%s" does not match' % name)
          printer = RxPrinter(name, function)
          self.subprinters.append(printer)
          self.lookup[name] = printer
*************** class Printer(object):
*** 1806,1813 ****
      # Add a name using _GLIBCXX_BEGIN_NAMESPACE_VERSION.
      def add_version(self, base, name, function):
          self.add(base + name, function)
!         if _versioned_namespace and not '__cxx11' in base:
!             vbase = re.sub('^(std|__gnu_cxx)::', r'\g<0>%s' % _versioned_namespace, base)
              self.add(vbase + name, function)
  
      # Add a name using _GLIBCXX_BEGIN_NAMESPACE_CONTAINER.
--- 1950,1958 ----
      # Add a name using _GLIBCXX_BEGIN_NAMESPACE_VERSION.
      def add_version(self, base, name, function):
          self.add(base + name, function)
!         if '__cxx11' not in base:
!             vbase = re.sub('^(std|__gnu_cxx)::', r'\g<0>%s' %
!                            _versioned_namespace, base)
              self.add(vbase + name, function)
  
      # Add a name using _GLIBCXX_BEGIN_NAMESPACE_CONTAINER.
*************** class Printer(object):
*** 1819,1828 ****
      def get_basic_type(type):
          # If it points to a reference, get the reference.
          if type.code == gdb.TYPE_CODE_REF:
!             type = type.target ()
  
          # Get the unqualified type, stripped of typedefs.
!         type = type.unqualified ().strip_typedefs ()
  
          return type.tag
  
--- 1964,1973 ----
      def get_basic_type(type):
          # If it points to a reference, get the reference.
          if type.code == gdb.TYPE_CODE_REF:
!             type = type.target()
  
          # Get the unqualified type, stripped of typedefs.
!         type = type.unqualified().strip_typedefs()
  
          return type.tag
  
*************** class Printer(object):
*** 1840,1846 ****
          basename = match.group(1)
  
          if val.type.code == gdb.TYPE_CODE_REF:
!             if hasattr(gdb.Value,"referenced_value"):
                  val = val.referenced_value()
  
          if basename in self.lookup:
--- 1985,1991 ----
          basename = match.group(1)
  
          if val.type.code == gdb.TYPE_CODE_REF:
!             if hasattr(gdb.Value, "referenced_value"):
                  val = val.referenced_value()
  
          if basename in self.lookup:
*************** class Printer(object):
*** 1849,1865 ****
          # Cannot find a pretty printer.  Return None.
          return None
  
  libstdcxx_printer = None
  
  class TemplateTypePrinter(object):
!     r"""
      A type printer for class templates with default template arguments.
  
      Recognizes specializations of class templates and prints them without
      any template arguments that use a default template argument.
      Type printers are recursively applied to the template arguments.
  
!     e.g. replace "std::vector<T, std::allocator<T> >" with "std::vector<T>".
      """
  
      def __init__(self, name, defargs):
--- 1994,2012 ----
          # Cannot find a pretty printer.  Return None.
          return None
  
+ 
  libstdcxx_printer = None
  
+ 
  class TemplateTypePrinter(object):
!     """
      A type printer for class templates with default template arguments.
  
      Recognizes specializations of class templates and prints them without
      any template arguments that use a default template argument.
      Type printers are recursively applied to the template arguments.
  
!     e.g. replace 'std::vector<T, std::allocator<T> >' with 'std::vector<T>'.
      """
  
      def __init__(self, name, defargs):
*************** class TemplateTypePrinter(object):
*** 1868,1874 ****
          self.enabled = True
  
      class _recognizer(object):
!         "The recognizer class for TemplateTypePrinter."
  
          def __init__(self, name, defargs):
              self.name = name
--- 2015,2021 ----
          self.enabled = True
  
      class _recognizer(object):
!         """The recognizer class for TemplateTypePrinter."""
  
          def __init__(self, name, defargs):
              self.name = name
*************** class TemplateTypePrinter(object):
*** 1933,1939 ****
              if type_obj.code == gdb.TYPE_CODE_ARRAY:
                  type_str = self._recognize_subtype(type_obj.target())
                  if str(type_obj.strip_typedefs()).endswith('[]'):
!                     return type_str + '[]' # array of unknown bound
                  return "%s[%d]" % (type_str, type_obj.range()[1] + 1)
              if type_obj.code == gdb.TYPE_CODE_REF:
                  return self._recognize_subtype(type_obj.target()) + '&'
--- 2080,2086 ----
              if type_obj.code == gdb.TYPE_CODE_ARRAY:
                  type_str = self._recognize_subtype(type_obj.target())
                  if str(type_obj.strip_typedefs()).endswith('[]'):
!                     return type_str + '[]'  # array of unknown bound
                  return "%s[%d]" % (type_str, type_obj.range()[1] + 1)
              if type_obj.code == gdb.TYPE_CODE_REF:
                  return self._recognize_subtype(type_obj.target()) + '&'
*************** class TemplateTypePrinter(object):
*** 1942,1958 ****
                      return self._recognize_subtype(type_obj.target()) + '&&'
  
              type_str = gdb.types.apply_type_recognizers(
!                     gdb.types.get_type_recognizers(), type_obj)
              if type_str:
                  return type_str
              return str(type_obj)
  
      def instantiate(self):
!         "Return a recognizer object for this type printer."
          return self._recognizer(self.name, self.defargs)
  
  def add_one_template_type_printer(obj, name, defargs):
!     r"""
      Add a type printer for a class template with default template arguments.
  
      Args:
--- 2089,2106 ----
                      return self._recognize_subtype(type_obj.target()) + '&&'
  
              type_str = gdb.types.apply_type_recognizers(
!                 gdb.types.get_type_recognizers(), type_obj)
              if type_str:
                  return type_str
              return str(type_obj)
  
      def instantiate(self):
!         """Return a recognizer object for this type printer."""
          return self._recognizer(self.name, self.defargs)
  
+ 
  def add_one_template_type_printer(obj, name, defargs):
!     """
      Add a type printer for a class template with default template arguments.
  
      Args:
*************** def add_one_template_type_printer(obj, n
*** 1966,1990 ****
      { 2: 'std::hash<{0}>',
        3: 'std::equal_to<{0}>',
        4: 'std::allocator<std::pair<const {0}, {1}> >' }
- 
      """
!     printer = TemplateTypePrinter('std::'+name, defargs)
      gdb.types.register_type_printer(obj, printer)
  
      # Add type printer for same type in debug namespace:
!     printer = TemplateTypePrinter('std::__debug::'+name, defargs)
      gdb.types.register_type_printer(obj, printer)
  
!     if _versioned_namespace and not '__cxx11' in name:
          # Add second type printer for same type in versioned namespace:
          ns = 'std::' + _versioned_namespace
          # PR 86112 Cannot use dict comprehension here:
!         defargs = dict((n, d.replace('std::', ns)) for (n,d) in defargs.items())
!         printer = TemplateTypePrinter(ns+name, defargs)
          gdb.types.register_type_printer(obj, printer)
  
  class FilteringTypePrinter(object):
!     r"""
      A type printer that uses typedef names for common template specializations.
  
      Args:
--- 2114,2138 ----
      { 2: 'std::hash<{0}>',
        3: 'std::equal_to<{0}>',
        4: 'std::allocator<std::pair<const {0}, {1}> >' }
      """
!     printer = TemplateTypePrinter('std::' + name, defargs)
      gdb.types.register_type_printer(obj, printer)
  
      # Add type printer for same type in debug namespace:
!     printer = TemplateTypePrinter('std::__debug::' + name, defargs)
      gdb.types.register_type_printer(obj, printer)
  
!     if '__cxx11' not in name:
          # Add second type printer for same type in versioned namespace:
          ns = 'std::' + _versioned_namespace
          # PR 86112 Cannot use dict comprehension here:
!         defargs = dict((n, d.replace('std::', ns))
!                        for (n, d) in defargs.items())
!         printer = TemplateTypePrinter(ns + name, defargs)
          gdb.types.register_type_printer(obj, printer)
  
  class FilteringTypePrinter(object):
!     """
      A type printer that uses typedef names for common template specializations.
  
      Args:
*************** class FilteringTypePrinter(object):
*** 2009,2015 ****
          self.enabled = True
  
      class _recognizer(object):
!         "The recognizer class for FilteringTypePrinter."
  
          def __init__(self, template, name, targ1):
              self.template = template
--- 2157,2163 ----
          self.enabled = True
  
      class _recognizer(object):
!         """The recognizer class for FilteringTypePrinter."""
  
          def __init__(self, template, name, targ1):
              self.template = template
*************** class FilteringTypePrinter(object):
*** 2027,2033 ****
  
              if self.type_obj is None:
                  if self.targ1 is not None:
!                     if not type_obj.tag.startswith('{}<{}'.format(self.template, self.targ1)):
                          # Filter didn't match.
                          return None
                  elif not type_obj.tag.startswith(self.template):
--- 2175,2182 ----
  
              if self.type_obj is None:
                  if self.targ1 is not None:
!                     s = '{}<{}'.format(self.template, self.targ1)
!                     if not type_obj.tag.startswith(s):
                          # Filter didn't match.
                          return None
                  elif not type_obj.tag.startswith(self.template):
*************** class FilteringTypePrinter(object):
*** 2042,2069 ****
              if self.type_obj is None:
                  return None
  
!             if gdb.types.get_basic_type(self.type_obj) == gdb.types.get_basic_type(type_obj):
                  return strip_inline_namespaces(self.name)
  
!             # Workaround ambiguous typedefs matching both std:: and std::__cxx11:: symbols.
              if self.template.split('::')[-1] == 'basic_string':
!                 if self.type_obj.tag.replace('__cxx11::', '') == type_obj.tag.replace('__cxx11::', ''):
                      return strip_inline_namespaces(self.name)
  
              return None
  
      def instantiate(self):
!         "Return a recognizer object for this type printer."
          return self._recognizer(self.template, self.name, self.targ1)
  
! def add_one_type_printer(obj, template, name, targ1 = None):
      printer = FilteringTypePrinter('std::' + template, 'std::' + name, targ1)
      gdb.types.register_type_printer(obj, printer)
!     if _versioned_namespace and not '__cxx11' in template:
          ns = 'std::' + _versioned_namespace
          printer = FilteringTypePrinter(ns + template, ns + name, targ1)
          gdb.types.register_type_printer(obj, printer)
  
  def register_type_printers(obj):
      global _use_type_printing
  
--- 2191,2225 ----
              if self.type_obj is None:
                  return None
  
!             t1 = gdb.types.get_basic_type(self.type_obj)
!             t2 = gdb.types.get_basic_type(type_obj)
!             if t1 == t2:
                  return strip_inline_namespaces(self.name)
  
!             # Workaround ambiguous typedefs matching both std:: and
!             # std::__cxx11:: symbols.
              if self.template.split('::')[-1] == 'basic_string':
!                 s1 = self.type_obj.tag.replace('__cxx11::', '')
!                 s2 = type_obj.tag.replace('__cxx11::', '')
!                 if s1 == s2:
                      return strip_inline_namespaces(self.name)
  
              return None
  
      def instantiate(self):
!         """Return a recognizer object for this type printer."""
          return self._recognizer(self.template, self.name, self.targ1)
  
! 
! def add_one_type_printer(obj, template, name, targ1=None):
      printer = FilteringTypePrinter('std::' + template, 'std::' + name, targ1)
      gdb.types.register_type_printer(obj, printer)
!     if '__cxx11' not in template:
          ns = 'std::' + _versioned_namespace
          printer = FilteringTypePrinter(ns + template, ns + name, targ1)
          gdb.types.register_type_printer(obj, printer)
  
+ 
  def register_type_printers(obj):
      global _use_type_printing
  
*************** def register_type_printers(obj):
*** 2077,2087 ****
                 ('u16', 'char16_t'),
                 ('u32', 'char32_t')):
          add_one_type_printer(obj, 'basic_string', ch[0] + 'string', ch[1])
!         add_one_type_printer(obj, '__cxx11::basic_string', ch[0] + 'string', ch[1])
          # Typedefs for __cxx11::basic_string used to be in namespace __cxx11:
          add_one_type_printer(obj, '__cxx11::basic_string',
                               '__cxx11::' + ch[0] + 'string', ch[1])
!         add_one_type_printer(obj, 'basic_string_view', ch[0] + 'string_view', ch[1])
  
      # Add type printers for typedefs std::istream, std::wistream etc.
      for ch in (('', 'char'), ('w', 'wchar_t')):
--- 2233,2245 ----
                 ('u16', 'char16_t'),
                 ('u32', 'char32_t')):
          add_one_type_printer(obj, 'basic_string', ch[0] + 'string', ch[1])
!         add_one_type_printer(obj, '__cxx11::basic_string',
!                              ch[0] + 'string', ch[1])
          # Typedefs for __cxx11::basic_string used to be in namespace __cxx11:
          add_one_type_printer(obj, '__cxx11::basic_string',
                               '__cxx11::' + ch[0] + 'string', ch[1])
!         add_one_type_printer(obj, 'basic_string_view',
!                              ch[0] + 'string_view', ch[1])
  
      # Add type printers for typedefs std::istream, std::wistream etc.
      for ch in (('', 'char'), ('w', 'wchar_t')):
*************** def register_type_printers(obj):
*** 2097,2105 ****
      # Add type printers for typedefs regex, wregex, cmatch, wcmatch etc.
      for abi in ('', '__cxx11::'):
          for ch in (('', 'char'), ('w', 'wchar_t')):
!             add_one_type_printer(obj, abi + 'basic_regex', abi + ch[0] + 'regex', ch[1])
          for ch in ('c', 's', 'wc', 'ws'):
!             add_one_type_printer(obj, abi + 'match_results', abi + ch + 'match')
              for x in ('sub_match', 'regex_iterator', 'regex_token_iterator'):
                  add_one_type_printer(obj, abi + x, abi + ch + x)
  
--- 2255,2265 ----
      # Add type printers for typedefs regex, wregex, cmatch, wcmatch etc.
      for abi in ('', '__cxx11::'):
          for ch in (('', 'char'), ('w', 'wchar_t')):
!             add_one_type_printer(obj, abi + 'basic_regex',
!                                  abi + ch[0] + 'regex', ch[1])
          for ch in ('c', 's', 'wc', 'ws'):
!             add_one_type_printer(
!                 obj, abi + 'match_results', abi + ch + 'match')
              for x in ('sub_match', 'regex_iterator', 'regex_token_iterator'):
                  add_one_type_printer(obj, abi + x, abi + ch + x)
  
*************** def register_type_printers(obj):
*** 2135,2175 ****
  
      # Do not show defaulted template arguments in class templates.
      add_one_template_type_printer(obj, 'unique_ptr',
!             { 1: 'std::default_delete<{0}>' })
!     add_one_template_type_printer(obj, 'deque', { 1: 'std::allocator<{0}>'})
!     add_one_template_type_printer(obj, 'forward_list', { 1: 'std::allocator<{0}>'})
!     add_one_template_type_printer(obj, 'list', { 1: 'std::allocator<{0}>'})
!     add_one_template_type_printer(obj, '__cxx11::list', { 1: 'std::allocator<{0}>'})
!     add_one_template_type_printer(obj, 'vector', { 1: 'std::allocator<{0}>'})
      add_one_template_type_printer(obj, 'map',
!             { 2: 'std::less<{0}>',
!               3: 'std::allocator<std::pair<{0} const, {1}>>' })
      add_one_template_type_printer(obj, 'multimap',
!             { 2: 'std::less<{0}>',
!               3: 'std::allocator<std::pair<{0} const, {1}>>' })
      add_one_template_type_printer(obj, 'set',
!             { 1: 'std::less<{0}>', 2: 'std::allocator<{0}>' })
      add_one_template_type_printer(obj, 'multiset',
!             { 1: 'std::less<{0}>', 2: 'std::allocator<{0}>' })
      add_one_template_type_printer(obj, 'unordered_map',
!             { 2: 'std::hash<{0}>',
!               3: 'std::equal_to<{0}>',
!               4: 'std::allocator<std::pair<{0} const, {1}>>'})
      add_one_template_type_printer(obj, 'unordered_multimap',
!             { 2: 'std::hash<{0}>',
!               3: 'std::equal_to<{0}>',
!               4: 'std::allocator<std::pair<{0} const, {1}>>'})
      add_one_template_type_printer(obj, 'unordered_set',
!             { 1: 'std::hash<{0}>',
!               2: 'std::equal_to<{0}>',
!               3: 'std::allocator<{0}>'})
      add_one_template_type_printer(obj, 'unordered_multiset',
!             { 1: 'std::hash<{0}>',
!               2: 'std::equal_to<{0}>',
!               3: 'std::allocator<{0}>'})
  
! def register_libstdcxx_printers (obj):
!     "Register libstdc++ pretty-printers with objfile Obj."
  
      global _use_gdb_pp
      global libstdcxx_printer
--- 2295,2338 ----
  
      # Do not show defaulted template arguments in class templates.
      add_one_template_type_printer(obj, 'unique_ptr',
!                                   {1: 'std::default_delete<{0}>'})
!     add_one_template_type_printer(obj, 'deque', {1: 'std::allocator<{0}>'})
!     add_one_template_type_printer(
!         obj, 'forward_list', {1: 'std::allocator<{0}>'})
!     add_one_template_type_printer(obj, 'list', {1: 'std::allocator<{0}>'})
!     add_one_template_type_printer(
!         obj, '__cxx11::list', {1: 'std::allocator<{0}>'})
!     add_one_template_type_printer(obj, 'vector', {1: 'std::allocator<{0}>'})
      add_one_template_type_printer(obj, 'map',
!                                   {2: 'std::less<{0}>',
!                                    3: 'std::allocator<std::pair<{0} const, {1}>>'})
      add_one_template_type_printer(obj, 'multimap',
!                                   {2: 'std::less<{0}>',
!                                    3: 'std::allocator<std::pair<{0} const, {1}>>'})
      add_one_template_type_printer(obj, 'set',
!                                   {1: 'std::less<{0}>', 2: 'std::allocator<{0}>'})
      add_one_template_type_printer(obj, 'multiset',
!                                   {1: 'std::less<{0}>', 2: 'std::allocator<{0}>'})
      add_one_template_type_printer(obj, 'unordered_map',
!                                   {2: 'std::hash<{0}>',
!                                    3: 'std::equal_to<{0}>',
!                                    4: 'std::allocator<std::pair<{0} const, {1}>>'})
      add_one_template_type_printer(obj, 'unordered_multimap',
!                                   {2: 'std::hash<{0}>',
!                                    3: 'std::equal_to<{0}>',
!                                    4: 'std::allocator<std::pair<{0} const, {1}>>'})
      add_one_template_type_printer(obj, 'unordered_set',
!                                   {1: 'std::hash<{0}>',
!                                    2: 'std::equal_to<{0}>',
!                                    3: 'std::allocator<{0}>'})
      add_one_template_type_printer(obj, 'unordered_multiset',
!                                   {1: 'std::hash<{0}>',
!                                    2: 'std::equal_to<{0}>',
!                                    3: 'std::allocator<{0}>'})
  
! 
! def register_libstdcxx_printers(obj):
!     """Register libstdc++ pretty-printers with objfile Obj."""
  
      global _use_gdb_pp
      global libstdcxx_printer
*************** def register_libstdcxx_printers (obj):
*** 2183,2189 ****
  
      register_type_printers(obj)
  
! def build_libstdcxx_dictionary ():
      global libstdcxx_printer
  
      libstdcxx_printer = Printer("libstdc++-v6")
--- 2346,2353 ----
  
      register_type_printers(obj)
  
! 
! def build_libstdcxx_dictionary():
      global libstdcxx_printer
  
      libstdcxx_printer = Printer("libstdc++-v6")
*************** def build_libstdcxx_dictionary ():
*** 2192,2198 ****
      # In order from:
      # http://gcc.gnu.org/onlinedocs/libstdc++/latest-doxygen/a01847.html
      libstdcxx_printer.add_version('std::', 'basic_string', StdStringPrinter)
!     libstdcxx_printer.add_version('std::__cxx11::', 'basic_string', StdStringPrinter)
      libstdcxx_printer.add_container('std::', 'bitset', StdBitsetPrinter)
      libstdcxx_printer.add_container('std::', 'deque', StdDequePrinter)
      libstdcxx_printer.add_container('std::', 'list', StdListPrinter)
--- 2356,2363 ----
      # In order from:
      # http://gcc.gnu.org/onlinedocs/libstdc++/latest-doxygen/a01847.html
      libstdcxx_printer.add_version('std::', 'basic_string', StdStringPrinter)
!     libstdcxx_printer.add_version(
!         'std::__cxx11::', 'basic_string', StdStringPrinter)
      libstdcxx_printer.add_container('std::', 'bitset', StdBitsetPrinter)
      libstdcxx_printer.add_container('std::', 'deque', StdDequePrinter)
      libstdcxx_printer.add_container('std::', 'list', StdListPrinter)
*************** def build_libstdcxx_dictionary ():
*** 2242,2249 ****
      libstdcxx_printer.add_container('std::', 'forward_list',
                                      StdForwardListPrinter)
  
!     libstdcxx_printer.add_version('std::tr1::', 'shared_ptr', SharedPointerPrinter)
!     libstdcxx_printer.add_version('std::tr1::', 'weak_ptr', SharedPointerPrinter)
      libstdcxx_printer.add_version('std::tr1::', 'unordered_map',
                                    Tr1UnorderedMapPrinter)
      libstdcxx_printer.add_version('std::tr1::', 'unordered_set',
--- 2407,2416 ----
      libstdcxx_printer.add_container('std::', 'forward_list',
                                      StdForwardListPrinter)
  
!     libstdcxx_printer.add_version(
!         'std::tr1::', 'shared_ptr', SharedPointerPrinter)
!     libstdcxx_printer.add_version(
!         'std::tr1::', 'weak_ptr', SharedPointerPrinter)
      libstdcxx_printer.add_version('std::tr1::', 'unordered_map',
                                    Tr1UnorderedMapPrinter)
      libstdcxx_printer.add_version('std::tr1::', 'unordered_set',
*************** def build_libstdcxx_dictionary ():
*** 2305,2311 ****
                                    '_Node_handle', StdNodeHandlePrinter)
  
      # C++20 components
!     libstdcxx_printer.add_version('std::', 'partial_ordering', StdCmpCatPrinter)
      libstdcxx_printer.add_version('std::', 'weak_ordering', StdCmpCatPrinter)
      libstdcxx_printer.add_version('std::', 'strong_ordering', StdCmpCatPrinter)
      libstdcxx_printer.add_version('std::', 'span', StdSpanPrinter)
--- 2472,2479 ----
                                    '_Node_handle', StdNodeHandlePrinter)
  
      # C++20 components
!     libstdcxx_printer.add_version(
!         'std::', 'partial_ordering', StdCmpCatPrinter)
      libstdcxx_printer.add_version('std::', 'weak_ordering', StdCmpCatPrinter)
      libstdcxx_printer.add_version('std::', 'strong_ordering', StdCmpCatPrinter)
      libstdcxx_printer.add_version('std::', 'span', StdSpanPrinter)
*************** def build_libstdcxx_dictionary ():
*** 2331,2341 ****
          libstdcxx_printer.add_version('__gnu_cxx::', '__normal_iterator',
                                        StdVectorIteratorPrinter)
          libstdcxx_printer.add_container('std::', '_Bit_iterator',
!                                       StdBitIteratorPrinter)
          libstdcxx_printer.add_container('std::', '_Bit_const_iterator',
!                                       StdBitIteratorPrinter)
          libstdcxx_printer.add_container('std::', '_Bit_reference',
!                                       StdBitReferencePrinter)
          libstdcxx_printer.add_version('__gnu_cxx::', '_Slist_iterator',
                                        StdSlistIteratorPrinter)
          libstdcxx_printer.add_container('std::', '_Fwd_list_iterator',
--- 2499,2509 ----
          libstdcxx_printer.add_version('__gnu_cxx::', '__normal_iterator',
                                        StdVectorIteratorPrinter)
          libstdcxx_printer.add_container('std::', '_Bit_iterator',
!                                         StdBitIteratorPrinter)
          libstdcxx_printer.add_container('std::', '_Bit_const_iterator',
!                                         StdBitIteratorPrinter)
          libstdcxx_printer.add_container('std::', '_Bit_reference',
!                                         StdBitReferencePrinter)
          libstdcxx_printer.add_version('__gnu_cxx::', '_Slist_iterator',
                                        StdSlistIteratorPrinter)
          libstdcxx_printer.add_container('std::', '_Fwd_list_iterator',
*************** def build_libstdcxx_dictionary ():
*** 2348,2351 ****
          libstdcxx_printer.add('__gnu_debug::_Safe_iterator',
                                StdDebugIteratorPrinter)
  
! build_libstdcxx_dictionary ()
--- 2516,2520 ----
          libstdcxx_printer.add('__gnu_debug::_Safe_iterator',
                                StdDebugIteratorPrinter)
  
! 
! build_libstdcxx_dictionary()
diff -Nrcpad gcc-12.3.0/libstdc++-v3/python/libstdcxx/v6/xmethods.py gcc-12.4.0/libstdc++-v3/python/libstdcxx/v6/xmethods.py
*** gcc-12.3.0/libstdc++-v3/python/libstdcxx/v6/xmethods.py	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/python/libstdcxx/v6/xmethods.py	Thu Jun 20 08:08:10 2024
*************** import re
*** 21,32 ****
--- 21,47 ----
  
  matcher_name_prefix = 'libstdc++::'
  
+ 
  def get_bool_type():
      return gdb.lookup_type('bool')
  
  def get_std_size_type():
      return gdb.lookup_type('std::size_t')
  
+ _versioned_namespace = '__8::'
+ 
+ def is_specialization_of(x, template_name):
+     """
+     Test whether a type is a specialization of the named class template.
+     The type can be specified as a string or a gdb.Type object.
+     The template should be the name of a class template as a string,
+     without any 'std' qualification.
+     """
+     if isinstance(x, gdb.Type):
+         x = x.tag
+     template_name = '(%s)?%s' % (_versioned_namespace, template_name)
+     return re.match(r'^std::(__\d::)?%s<.*>$' % template_name, x) is not None
+ 
  class LibStdCxxXMethod(gdb.xmethod.XMethod):
      def __init__(self, name, worker_class):
          gdb.xmethod.XMethod.__init__(self, name)
*************** class LibStdCxxXMethod(gdb.xmethod.XMeth
*** 34,39 ****
--- 49,55 ----
  
  # Xmethods for std::array
  
+ 
  class ArrayWorkerBase(gdb.xmethod.XMethodWorker):
      def __init__(self, val_type, size):
          self._val_type = val_type
*************** class ArrayWorkerBase(gdb.xmethod.XMetho
*** 43,48 ****
--- 59,65 ----
          nullptr = gdb.parse_and_eval('(void *) 0')
          return nullptr.cast(self._val_type.pointer()).dereference()
  
+ 
  class ArraySizeWorker(ArrayWorkerBase):
      def __init__(self, val_type, size):
          ArrayWorkerBase.__init__(self, val_type, size)
*************** class ArraySizeWorker(ArrayWorkerBase):
*** 56,61 ****
--- 73,79 ----
      def __call__(self, obj):
          return self._size
  
+ 
  class ArrayEmptyWorker(ArrayWorkerBase):
      def __init__(self, val_type, size):
          ArrayWorkerBase.__init__(self, val_type, size)
*************** class ArrayEmptyWorker(ArrayWorkerBase):
*** 69,74 ****
--- 87,93 ----
      def __call__(self, obj):
          return (int(self._size) == 0)
  
+ 
  class ArrayFrontWorker(ArrayWorkerBase):
      def __init__(self, val_type, size):
          ArrayWorkerBase.__init__(self, val_type, size)
*************** class ArrayFrontWorker(ArrayWorkerBase):
*** 85,90 ****
--- 104,110 ----
          else:
              return self.null_value()
  
+ 
  class ArrayBackWorker(ArrayWorkerBase):
      def __init__(self, val_type, size):
          ArrayWorkerBase.__init__(self, val_type, size)
*************** class ArrayBackWorker(ArrayWorkerBase):
*** 101,106 ****
--- 121,127 ----
          else:
              return self.null_value()
  
+ 
  class ArrayAtWorker(ArrayWorkerBase):
      def __init__(self, val_type, size):
          ArrayWorkerBase.__init__(self, val_type, size)
*************** class ArrayAtWorker(ArrayWorkerBase):
*** 117,122 ****
--- 138,144 ----
                               ((int(index), self._size)))
          return obj['_M_elems'][index]
  
+ 
  class ArraySubscriptWorker(ArrayWorkerBase):
      def __init__(self, val_type, size):
          ArrayWorkerBase.__init__(self, val_type, size)
*************** class ArraySubscriptWorker(ArrayWorkerBa
*** 133,138 ****
--- 155,161 ----
          else:
              return self.null_value()
  
+ 
  class ArrayMethodsMatcher(gdb.xmethod.XMethodMatcher):
      def __init__(self):
          gdb.xmethod.XMethodMatcher.__init__(self,
*************** class ArrayMethodsMatcher(gdb.xmethod.XM
*** 148,154 ****
          self.methods = [self._method_dict[m] for m in self._method_dict]
  
      def match(self, class_type, method_name):
!         if not re.match('^std::(__\d+::)?array<.*>$', class_type.tag):
              return None
          method = self._method_dict.get(method_name)
          if method is None or not method.enabled:
--- 171,177 ----
          self.methods = [self._method_dict[m] for m in self._method_dict]
  
      def match(self, class_type, method_name):
!         if not is_specialization_of(class_type, 'array'):
              return None
          method = self._method_dict.get(method_name)
          if method is None or not method.enabled:
*************** class ArrayMethodsMatcher(gdb.xmethod.XM
*** 160,183 ****
              return None
          return method.worker_class(value_type, size)
  
  # Xmethods for std::deque
  
  class DequeWorkerBase(gdb.xmethod.XMethodWorker):
      def __init__(self, val_type):
          self._val_type = val_type
          self._bufsize = 512 // val_type.sizeof or 1
  
      def size(self, obj):
!         first_node = obj['_M_impl']['_M_start']['_M_node']
!         last_node = obj['_M_impl']['_M_finish']['_M_node']
!         cur = obj['_M_impl']['_M_finish']['_M_cur']
!         first = obj['_M_impl']['_M_finish']['_M_first']
!         return (last_node - first_node) * self._bufsize + (cur - first)
  
      def index(self, obj, idx):
!         first_node = obj['_M_impl']['_M_start']['_M_node']
!         index_node = first_node + int(idx) // self._bufsize
!         return index_node[0][idx % self._bufsize]
  
  class DequeEmptyWorker(DequeWorkerBase):
      def get_arg_types(self):
--- 183,216 ----
              return None
          return method.worker_class(value_type, size)
  
+ 
  # Xmethods for std::deque
  
+ 
  class DequeWorkerBase(gdb.xmethod.XMethodWorker):
      def __init__(self, val_type):
          self._val_type = val_type
          self._bufsize = 512 // val_type.sizeof or 1
  
      def size(self, obj):
!         start = obj['_M_impl']['_M_start']
!         finish = obj['_M_impl']['_M_finish']
!         if start['_M_cur'] == finish['_M_cur']:
!             return 0
!         return (self._bufsize
!                 * (finish['_M_node'] - start['_M_node'] - 1)
!                 + (finish['_M_cur'] - finish['_M_first'])
!                 + (start['_M_last'] - start['_M_cur']))
  
      def index(self, obj, idx):
!         start = obj['_M_impl']['_M_start']
!         first_node_size = start['_M_last'] - start['_M_cur']
!         if idx < first_node_size:
!             return start['_M_cur'][idx]
!         idx = idx - first_node_size
!         index_node = start['_M_node'][1 + int(idx) // self._bufsize]
!         return index_node[idx % self._bufsize]
! 
  
  class DequeEmptyWorker(DequeWorkerBase):
      def get_arg_types(self):
*************** class DequeEmptyWorker(DequeWorkerBase):
*** 190,195 ****
--- 223,229 ----
          return (obj['_M_impl']['_M_start']['_M_cur'] ==
                  obj['_M_impl']['_M_finish']['_M_cur'])
  
+ 
  class DequeSizeWorker(DequeWorkerBase):
      def get_arg_types(self):
          return None
*************** class DequeSizeWorker(DequeWorkerBase):
*** 200,205 ****
--- 234,240 ----
      def __call__(self, obj):
          return self.size(obj)
  
+ 
  class DequeFrontWorker(DequeWorkerBase):
      def get_arg_types(self):
          return None
*************** class DequeFrontWorker(DequeWorkerBase):
*** 210,215 ****
--- 245,251 ----
      def __call__(self, obj):
          return obj['_M_impl']['_M_start']['_M_cur'][0]
  
+ 
  class DequeBackWorker(DequeWorkerBase):
      def get_arg_types(self):
          return None
*************** class DequeBackWorker(DequeWorkerBase):
*** 219,230 ****
  
      def __call__(self, obj):
          if (obj['_M_impl']['_M_finish']['_M_cur'] ==
!             obj['_M_impl']['_M_finish']['_M_first']):
              prev_node = obj['_M_impl']['_M_finish']['_M_node'] - 1
              return prev_node[0][self._bufsize - 1]
          else:
              return obj['_M_impl']['_M_finish']['_M_cur'][-1]
  
  class DequeSubscriptWorker(DequeWorkerBase):
      def get_arg_types(self):
          return get_std_size_type()
--- 255,267 ----
  
      def __call__(self, obj):
          if (obj['_M_impl']['_M_finish']['_M_cur'] ==
!                 obj['_M_impl']['_M_finish']['_M_first']):
              prev_node = obj['_M_impl']['_M_finish']['_M_node'] - 1
              return prev_node[0][self._bufsize - 1]
          else:
              return obj['_M_impl']['_M_finish']['_M_cur'][-1]
  
+ 
  class DequeSubscriptWorker(DequeWorkerBase):
      def get_arg_types(self):
          return get_std_size_type()
*************** class DequeSubscriptWorker(DequeWorkerBa
*** 235,240 ****
--- 272,278 ----
      def __call__(self, obj, subscript):
          return self.index(obj, subscript)
  
+ 
  class DequeAtWorker(DequeWorkerBase):
      def get_arg_types(self):
          return get_std_size_type()
*************** class DequeAtWorker(DequeWorkerBase):
*** 248,254 ****
              raise IndexError('Deque index "%d" should not be >= %d.' %
                               (int(index), deque_size))
          else:
!            return self.index(obj, index)
  
  class DequeMethodsMatcher(gdb.xmethod.XMethodMatcher):
      def __init__(self):
--- 286,293 ----
              raise IndexError('Deque index "%d" should not be >= %d.' %
                               (int(index), deque_size))
          else:
!             return self.index(obj, index)
! 
  
  class DequeMethodsMatcher(gdb.xmethod.XMethodMatcher):
      def __init__(self):
*************** class DequeMethodsMatcher(gdb.xmethod.XM
*** 265,271 ****
          self.methods = [self._method_dict[m] for m in self._method_dict]
  
      def match(self, class_type, method_name):
!         if not re.match('^std::(__\d+::)?deque<.*>$', class_type.tag):
              return None
          method = self._method_dict.get(method_name)
          if method is None or not method.enabled:
--- 304,310 ----
          self.methods = [self._method_dict[m] for m in self._method_dict]
  
      def match(self, class_type, method_name):
!         if not is_specialization_of(class_type, 'deque'):
              return None
          method = self._method_dict.get(method_name)
          if method is None or not method.enabled:
*************** class DequeMethodsMatcher(gdb.xmethod.XM
*** 274,279 ****
--- 313,319 ----
  
  # Xmethods for std::forward_list
  
+ 
  class ForwardListWorkerBase(gdb.xmethod.XMethodMatcher):
      def __init__(self, val_type, node_type):
          self._val_type = val_type
*************** class ForwardListWorkerBase(gdb.xmethod.
*** 282,287 ****
--- 322,328 ----
      def get_arg_types(self):
          return None
  
+ 
  class ForwardListEmptyWorker(ForwardListWorkerBase):
      def get_result_type(self, obj):
          return get_bool_type()
*************** class ForwardListEmptyWorker(ForwardList
*** 289,294 ****
--- 330,336 ----
      def __call__(self, obj):
          return obj['_M_impl']['_M_head']['_M_next'] == 0
  
+ 
  class ForwardListFrontWorker(ForwardListWorkerBase):
      def get_result_type(self, obj):
          return self._val_type
*************** class ForwardListFrontWorker(ForwardList
*** 298,303 ****
--- 340,346 ----
          val_address = node['_M_storage']['_M_storage'].address
          return val_address.cast(self._val_type.pointer()).dereference()
  
+ 
  class ForwardListMethodsMatcher(gdb.xmethod.XMethodMatcher):
      def __init__(self):
          matcher_name = matcher_name_prefix + 'forward_list'
*************** class ForwardListMethodsMatcher(gdb.xmet
*** 309,315 ****
          self.methods = [self._method_dict[m] for m in self._method_dict]
  
      def match(self, class_type, method_name):
!         if not re.match('^std::(__\d+::)?forward_list<.*>$', class_type.tag):
              return None
          method = self._method_dict.get(method_name)
          if method is None or not method.enabled:
--- 352,358 ----
          self.methods = [self._method_dict[m] for m in self._method_dict]
  
      def match(self, class_type, method_name):
!         if not is_specialization_of(class_type, 'forward_list'):
              return None
          method = self._method_dict.get(method_name)
          if method is None or not method.enabled:
*************** class ForwardListMethodsMatcher(gdb.xmet
*** 320,325 ****
--- 363,369 ----
  
  # Xmethods for std::list
  
+ 
  class ListWorkerBase(gdb.xmethod.XMethodWorker):
      def __init__(self, val_type, node_type):
          self._val_type = val_type
*************** class ListWorkerBase(gdb.xmethod.XMethod
*** 337,342 ****
--- 381,387 ----
          addr = node['_M_storage'].address
          return addr.cast(self._val_type.pointer()).dereference()
  
+ 
  class ListEmptyWorker(ListWorkerBase):
      def get_result_type(self, obj):
          return get_bool_type()
*************** class ListEmptyWorker(ListWorkerBase):
*** 348,353 ****
--- 393,399 ----
          else:
              return False
  
+ 
  class ListSizeWorker(ListWorkerBase):
      def get_result_type(self, obj):
          return get_std_size_type()
*************** class ListSizeWorker(ListWorkerBase):
*** 361,366 ****
--- 407,413 ----
              size += 1
          return size
  
+ 
  class ListFrontWorker(ListWorkerBase):
      def get_result_type(self, obj):
          return self._val_type
*************** class ListFrontWorker(ListWorkerBase):
*** 369,374 ****
--- 416,422 ----
          node = obj['_M_impl']['_M_node']['_M_next'].cast(self._node_type)
          return self.get_value_from_node(node)
  
+ 
  class ListBackWorker(ListWorkerBase):
      def get_result_type(self, obj):
          return self._val_type
*************** class ListBackWorker(ListWorkerBase):
*** 377,382 ****
--- 425,431 ----
          prev_node = obj['_M_impl']['_M_node']['_M_prev'].cast(self._node_type)
          return self.get_value_from_node(prev_node)
  
+ 
  class ListMethodsMatcher(gdb.xmethod.XMethodMatcher):
      def __init__(self):
          gdb.xmethod.XMethodMatcher.__init__(self,
*************** class ListMethodsMatcher(gdb.xmethod.XMe
*** 390,396 ****
          self.methods = [self._method_dict[m] for m in self._method_dict]
  
      def match(self, class_type, method_name):
!         if not re.match('^std::(__\d+::)?(__cxx11::)?list<.*>$', class_type.tag):
              return None
          method = self._method_dict.get(method_name)
          if method is None or not method.enabled:
--- 439,445 ----
          self.methods = [self._method_dict[m] for m in self._method_dict]
  
      def match(self, class_type, method_name):
!         if not is_specialization_of(class_type, '(__cxx11::)?list'):
              return None
          method = self._method_dict.get(method_name)
          if method is None or not method.enabled:
*************** class ListMethodsMatcher(gdb.xmethod.XMe
*** 401,406 ****
--- 450,456 ----
  
  # Xmethods for std::vector
  
+ 
  class VectorWorkerBase(gdb.xmethod.XMethodWorker):
      def __init__(self, val_type):
          self._val_type = val_type
*************** class VectorWorkerBase(gdb.xmethod.XMeth
*** 425,430 ****
--- 475,481 ----
          else:
              return obj['_M_impl']['_M_start'][index]
  
+ 
  class VectorEmptyWorker(VectorWorkerBase):
      def get_arg_types(self):
          return None
*************** class VectorEmptyWorker(VectorWorkerBase
*** 435,440 ****
--- 486,492 ----
      def __call__(self, obj):
          return int(self.size(obj)) == 0
  
+ 
  class VectorSizeWorker(VectorWorkerBase):
      def get_arg_types(self):
          return None
*************** class VectorSizeWorker(VectorWorkerBase)
*** 445,450 ****
--- 497,503 ----
      def __call__(self, obj):
          return self.size(obj)
  
+ 
  class VectorFrontWorker(VectorWorkerBase):
      def get_arg_types(self):
          return None
*************** class VectorFrontWorker(VectorWorkerBase
*** 455,460 ****
--- 508,514 ----
      def __call__(self, obj):
          return self.get(obj, 0)
  
+ 
  class VectorBackWorker(VectorWorkerBase):
      def get_arg_types(self):
          return None
*************** class VectorBackWorker(VectorWorkerBase)
*** 465,470 ****
--- 519,525 ----
      def __call__(self, obj):
          return self.get(obj, int(self.size(obj)) - 1)
  
+ 
  class VectorAtWorker(VectorWorkerBase):
      def get_arg_types(self):
          return get_std_size_type()
*************** class VectorAtWorker(VectorWorkerBase):
*** 479,484 ****
--- 534,540 ----
                               ((int(index), size)))
          return self.get(obj, int(index))
  
+ 
  class VectorSubscriptWorker(VectorWorkerBase):
      def get_arg_types(self):
          return get_std_size_type()
*************** class VectorSubscriptWorker(VectorWorker
*** 489,494 ****
--- 545,551 ----
      def __call__(self, obj, subscript):
          return self.get(obj, int(subscript))
  
+ 
  class VectorMethodsMatcher(gdb.xmethod.XMethodMatcher):
      def __init__(self):
          gdb.xmethod.XMethodMatcher.__init__(self,
*************** class VectorMethodsMatcher(gdb.xmethod.X
*** 505,511 ****
          self.methods = [self._method_dict[m] for m in self._method_dict]
  
      def match(self, class_type, method_name):
!         if not re.match('^std::(__\d+::)?vector<.*>$', class_type.tag):
              return None
          method = self._method_dict.get(method_name)
          if method is None or not method.enabled:
--- 562,568 ----
          self.methods = [self._method_dict[m] for m in self._method_dict]
  
      def match(self, class_type, method_name):
!         if not is_specialization_of(class_type, 'vector'):
              return None
          method = self._method_dict.get(method_name)
          if method is None or not method.enabled:
*************** class VectorMethodsMatcher(gdb.xmethod.X
*** 514,519 ****
--- 571,577 ----
  
  # Xmethods for associative containers
  
+ 
  class AssociativeContainerWorkerBase(gdb.xmethod.XMethodWorker):
      def __init__(self, unordered):
          self._unordered = unordered
*************** class AssociativeContainerWorkerBase(gdb
*** 527,532 ****
--- 585,591 ----
      def get_arg_types(self):
          return None
  
+ 
  class AssociativeContainerEmptyWorker(AssociativeContainerWorkerBase):
      def get_result_type(self, obj):
          return get_bool_type()
*************** class AssociativeContainerEmptyWorker(As
*** 534,539 ****
--- 593,599 ----
      def __call__(self, obj):
          return int(self.node_count(obj)) == 0
  
+ 
  class AssociativeContainerSizeWorker(AssociativeContainerWorkerBase):
      def get_result_type(self, obj):
          return get_std_size_type()
*************** class AssociativeContainerSizeWorker(Ass
*** 541,546 ****
--- 601,607 ----
      def __call__(self, obj):
          return self.node_count(obj)
  
+ 
  class AssociativeContainerMethodsMatcher(gdb.xmethod.XMethodMatcher):
      def __init__(self, name):
          gdb.xmethod.XMethodMatcher.__init__(self,
*************** class AssociativeContainerMethodsMatcher
*** 554,560 ****
          self.methods = [self._method_dict[m] for m in self._method_dict]
  
      def match(self, class_type, method_name):
!         if not re.match('^std::(__\d+::)?%s<.*>$' % self._name, class_type.tag):
              return None
          method = self._method_dict.get(method_name)
          if method is None or not method.enabled:
--- 615,621 ----
          self.methods = [self._method_dict[m] for m in self._method_dict]
  
      def match(self, class_type, method_name):
!         if not is_specialization_of(class_type, self._name):
              return None
          method = self._method_dict.get(method_name)
          if method is None or not method.enabled:
*************** class AssociativeContainerMethodsMatcher
*** 564,571 ****
  
  # Xmethods for std::unique_ptr
  
  class UniquePtrGetWorker(gdb.xmethod.XMethodWorker):
!     "Implements std::unique_ptr<T>::get() and std::unique_ptr<T>::operator->()"
  
      def __init__(self, elem_type):
          self._is_array = elem_type.code == gdb.TYPE_CODE_ARRAY
--- 625,635 ----
  
  # Xmethods for std::unique_ptr
  
+ 
  class UniquePtrGetWorker(gdb.xmethod.XMethodWorker):
!     """
!     Implement std::unique_ptr<T>::get() and std::unique_ptr<T>::operator->().
!     """
  
      def __init__(self, elem_type):
          self._is_array = elem_type.code == gdb.TYPE_CODE_ARRAY
*************** class UniquePtrGetWorker(gdb.xmethod.XMe
*** 581,599 ****
          return self._elem_type.pointer()
  
      def _supports(self, method_name):
!         "operator-> is not supported for unique_ptr<T[]>"
          return method_name == 'get' or not self._is_array
  
      def __call__(self, obj):
          impl_type = obj.dereference().type.fields()[0].type.tag
          # Check for new implementations first:
!         if re.match('^std::(__\d+::)?__uniq_ptr_(data|impl)<.*>$', impl_type):
              tuple_member = obj['_M_t']['_M_t']
!         elif re.match('^std::(__\d+::)?tuple<.*>$', impl_type):
              tuple_member = obj['_M_t']
          else:
              return None
!         tuple_impl_type = tuple_member.type.fields()[0].type # _Tuple_impl
          tuple_head_type = tuple_impl_type.fields()[1].type   # _Head_base
          head_field = tuple_head_type.fields()[0]
          if head_field.name == '_M_head_impl':
--- 645,663 ----
          return self._elem_type.pointer()
  
      def _supports(self, method_name):
!         # operator-> is not supported for unique_ptr<T[]>
          return method_name == 'get' or not self._is_array
  
      def __call__(self, obj):
          impl_type = obj.dereference().type.fields()[0].type.tag
          # Check for new implementations first:
!         if is_specialization_of(impl_type, '__uniq_ptr_(data|impl)'):
              tuple_member = obj['_M_t']['_M_t']
!         elif is_specialization_of(impl_type, 'tuple'):
              tuple_member = obj['_M_t']
          else:
              return None
!         tuple_impl_type = tuple_member.type.fields()[0].type  # _Tuple_impl
          tuple_head_type = tuple_impl_type.fields()[1].type   # _Head_base
          head_field = tuple_head_type.fields()[0]
          if head_field.name == '_M_head_impl':
*************** class UniquePtrGetWorker(gdb.xmethod.XMe
*** 603,610 ****
          else:
              return None
  
  class UniquePtrDerefWorker(UniquePtrGetWorker):
!     "Implements std::unique_ptr<T>::operator*()"
  
      def __init__(self, elem_type):
          UniquePtrGetWorker.__init__(self, elem_type)
--- 667,675 ----
          else:
              return None
  
+ 
  class UniquePtrDerefWorker(UniquePtrGetWorker):
!     """Implement std::unique_ptr<T>::operator*()."""
  
      def __init__(self, elem_type):
          UniquePtrGetWorker.__init__(self, elem_type)
*************** class UniquePtrDerefWorker(UniquePtrGetW
*** 613,626 ****
          return self._elem_type
  
      def _supports(self, method_name):
!         "operator* is not supported for unique_ptr<T[]>"
          return not self._is_array
  
      def __call__(self, obj):
          return UniquePtrGetWorker.__call__(self, obj).dereference()
  
  class UniquePtrSubscriptWorker(UniquePtrGetWorker):
!     "Implements std::unique_ptr<T>::operator[](size_t)"
  
      def __init__(self, elem_type):
          UniquePtrGetWorker.__init__(self, elem_type)
--- 678,692 ----
          return self._elem_type
  
      def _supports(self, method_name):
!         # operator* is not supported for unique_ptr<T[]>
          return not self._is_array
  
      def __call__(self, obj):
          return UniquePtrGetWorker.__call__(self, obj).dereference()
  
+ 
  class UniquePtrSubscriptWorker(UniquePtrGetWorker):
!     """Implement std::unique_ptr<T>::operator[](size_t)."""
  
      def __init__(self, elem_type):
          UniquePtrGetWorker.__init__(self, elem_type)
*************** class UniquePtrSubscriptWorker(UniquePtr
*** 632,643 ****
          return self._elem_type
  
      def _supports(self, method_name):
!         "operator[] is only supported for unique_ptr<T[]>"
          return self._is_array
  
      def __call__(self, obj, index):
          return UniquePtrGetWorker.__call__(self, obj)[index]
  
  class UniquePtrMethodsMatcher(gdb.xmethod.XMethodMatcher):
      def __init__(self):
          gdb.xmethod.XMethodMatcher.__init__(self,
--- 698,710 ----
          return self._elem_type
  
      def _supports(self, method_name):
!         # operator[] is only supported for unique_ptr<T[]>
          return self._is_array
  
      def __call__(self, obj, index):
          return UniquePtrGetWorker.__call__(self, obj)[index]
  
+ 
  class UniquePtrMethodsMatcher(gdb.xmethod.XMethodMatcher):
      def __init__(self):
          gdb.xmethod.XMethodMatcher.__init__(self,
*************** class UniquePtrMethodsMatcher(gdb.xmetho
*** 651,657 ****
          self.methods = [self._method_dict[m] for m in self._method_dict]
  
      def match(self, class_type, method_name):
!         if not re.match('^std::(__\d+::)?unique_ptr<.*>$', class_type.tag):
              return None
          method = self._method_dict.get(method_name)
          if method is None or not method.enabled:
--- 718,724 ----
          self.methods = [self._method_dict[m] for m in self._method_dict]
  
      def match(self, class_type, method_name):
!         if not is_specialization_of(class_type, 'unique_ptr'):
              return None
          method = self._method_dict.get(method_name)
          if method is None or not method.enabled:
*************** class UniquePtrMethodsMatcher(gdb.xmetho
*** 663,670 ****
  
  # Xmethods for std::shared_ptr
  
  class SharedPtrGetWorker(gdb.xmethod.XMethodWorker):
!     "Implements std::shared_ptr<T>::get() and std::shared_ptr<T>::operator->()"
  
      def __init__(self, elem_type):
          self._is_array = elem_type.code == gdb.TYPE_CODE_ARRAY
--- 730,740 ----
  
  # Xmethods for std::shared_ptr
  
+ 
  class SharedPtrGetWorker(gdb.xmethod.XMethodWorker):
!     """
!     Implements std::shared_ptr<T>::get() and std::shared_ptr<T>::operator->().
!     """
  
      def __init__(self, elem_type):
          self._is_array = elem_type.code == gdb.TYPE_CODE_ARRAY
*************** class SharedPtrGetWorker(gdb.xmethod.XMe
*** 680,693 ****
          return self._elem_type.pointer()
  
      def _supports(self, method_name):
!         "operator-> is not supported for shared_ptr<T[]>"
          return method_name == 'get' or not self._is_array
  
      def __call__(self, obj):
          return obj['_M_ptr']
  
  class SharedPtrDerefWorker(SharedPtrGetWorker):
!     "Implements std::shared_ptr<T>::operator*()"
  
      def __init__(self, elem_type):
          SharedPtrGetWorker.__init__(self, elem_type)
--- 750,764 ----
          return self._elem_type.pointer()
  
      def _supports(self, method_name):
!         # operator-> is not supported for shared_ptr<T[]>
          return method_name == 'get' or not self._is_array
  
      def __call__(self, obj):
          return obj['_M_ptr']
  
+ 
  class SharedPtrDerefWorker(SharedPtrGetWorker):
!     """Implement std::shared_ptr<T>::operator*()."""
  
      def __init__(self, elem_type):
          SharedPtrGetWorker.__init__(self, elem_type)
*************** class SharedPtrDerefWorker(SharedPtrGetW
*** 696,709 ****
          return self._elem_type
  
      def _supports(self, method_name):
!         "operator* is not supported for shared_ptr<T[]>"
          return not self._is_array
  
      def __call__(self, obj):
          return SharedPtrGetWorker.__call__(self, obj).dereference()
  
  class SharedPtrSubscriptWorker(SharedPtrGetWorker):
!     "Implements std::shared_ptr<T>::operator[](size_t)"
  
      def __init__(self, elem_type):
          SharedPtrGetWorker.__init__(self, elem_type)
--- 767,781 ----
          return self._elem_type
  
      def _supports(self, method_name):
!         # operator* is not supported for shared_ptr<T[]>
          return not self._is_array
  
      def __call__(self, obj):
          return SharedPtrGetWorker.__call__(self, obj).dereference()
  
+ 
  class SharedPtrSubscriptWorker(SharedPtrGetWorker):
!     """Implement std::shared_ptr<T>::operator[](size_t)."""
  
      def __init__(self, elem_type):
          SharedPtrGetWorker.__init__(self, elem_type)
*************** class SharedPtrSubscriptWorker(SharedPtr
*** 715,733 ****
          return self._elem_type
  
      def _supports(self, method_name):
!         "operator[] is only supported for shared_ptr<T[]>"
          return self._is_array
  
      def __call__(self, obj, index):
          # Check bounds if _elem_type is an array of known bound
!         m = re.match('.*\[(\d+)]$', str(self._elem_type))
          if m and index >= int(m.group(1)):
              raise IndexError('shared_ptr<%s> index "%d" should not be >= %d.' %
                               (self._elem_type, int(index), int(m.group(1))))
          return SharedPtrGetWorker.__call__(self, obj)[index]
  
  class SharedPtrUseCountWorker(gdb.xmethod.XMethodWorker):
!     "Implements std::shared_ptr<T>::use_count()"
  
      def __init__(self, elem_type):
          pass
--- 787,806 ----
          return self._elem_type
  
      def _supports(self, method_name):
!         # operator[] is only supported for shared_ptr<T[]>
          return self._is_array
  
      def __call__(self, obj, index):
          # Check bounds if _elem_type is an array of known bound
!         m = re.match(r'.*\[(\d+)]$', str(self._elem_type))
          if m and index >= int(m.group(1)):
              raise IndexError('shared_ptr<%s> index "%d" should not be >= %d.' %
                               (self._elem_type, int(index), int(m.group(1))))
          return SharedPtrGetWorker.__call__(self, obj)[index]
  
+ 
  class SharedPtrUseCountWorker(gdb.xmethod.XMethodWorker):
!     """Implement std::shared_ptr<T>::use_count()."""
  
      def __init__(self, elem_type):
          pass
*************** class SharedPtrUseCountWorker(gdb.xmetho
*** 745,752 ****
          refcounts = obj['_M_refcount']['_M_pi']
          return refcounts['_M_use_count'] if refcounts else 0
  
  class SharedPtrUniqueWorker(SharedPtrUseCountWorker):
!     "Implements std::shared_ptr<T>::unique()"
  
      def __init__(self, elem_type):
          SharedPtrUseCountWorker.__init__(self, elem_type)
--- 818,826 ----
          refcounts = obj['_M_refcount']['_M_pi']
          return refcounts['_M_use_count'] if refcounts else 0
  
+ 
  class SharedPtrUniqueWorker(SharedPtrUseCountWorker):
!     """Implement std::shared_ptr<T>::unique()."""
  
      def __init__(self, elem_type):
          SharedPtrUseCountWorker.__init__(self, elem_type)
*************** class SharedPtrUniqueWorker(SharedPtrUse
*** 757,762 ****
--- 831,837 ----
      def __call__(self, obj):
          return SharedPtrUseCountWorker.__call__(self, obj) == 1
  
+ 
  class SharedPtrMethodsMatcher(gdb.xmethod.XMethodMatcher):
      def __init__(self):
          gdb.xmethod.XMethodMatcher.__init__(self,
*************** class SharedPtrMethodsMatcher(gdb.xmetho
*** 772,778 ****
          self.methods = [self._method_dict[m] for m in self._method_dict]
  
      def match(self, class_type, method_name):
!         if not re.match('^std::(__\d+::)?shared_ptr<.*>$', class_type.tag):
              return None
          method = self._method_dict.get(method_name)
          if method is None or not method.enabled:
--- 847,853 ----
          self.methods = [self._method_dict[m] for m in self._method_dict]
  
      def match(self, class_type, method_name):
!         if not is_specialization_of(class_type, 'shared_ptr'):
              return None
          method = self._method_dict.get(method_name)
          if method is None or not method.enabled:
*************** class SharedPtrMethodsMatcher(gdb.xmetho
*** 782,787 ****
--- 857,863 ----
              return worker
          return None
  
+ 
  def register_libstdcxx_xmethods(locus):
      gdb.xmethod.register_xmethod_matcher(locus, ArrayMethodsMatcher())
      gdb.xmethod.register_xmethod_matcher(locus, ForwardListMethodsMatcher())
diff -Nrcpad gcc-12.3.0/libstdc++-v3/scripts/extract_symvers.in gcc-12.4.0/libstdc++-v3/scripts/extract_symvers.in
*** gcc-12.3.0/libstdc++-v3/scripts/extract_symvers.in	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/scripts/extract_symvers.in	Thu Jun 20 08:08:10 2024
*************** SunOS)
*** 54,61 ****
    ${readelf} ${lib} |\
    sed -e 's/ \[<other>: [A-Fa-f0-9]*\] //' -e '/\.dynsym/,/^$/p;d' |\
    sed -e 's/ \[<localentry>: [0-9]*\] //' |\
!   egrep -v ' (LOCAL|UND) ' |\
!   egrep -v ' (_DYNAMIC|_GLOBAL_OFFSET_TABLE_|_PROCEDURE_LINKAGE_TABLE_|_edata|_end|_etext)$' |\
    sed -e 's/ <processor specific>: / <processor_specific>:_/g' |\
    sed -e 's/ <OS specific>: / <OS_specific>:_/g' |\
    sed -e 's/ <unknown>: / <unknown>:_/g' |\
--- 54,61 ----
    ${readelf} ${lib} |\
    sed -e 's/ \[<other>: [A-Fa-f0-9]*\] //' -e '/\.dynsym/,/^$/p;d' |\
    sed -e 's/ \[<localentry>: [0-9]*\] //' |\
!   grep -E -v ' (LOCAL|UND) ' |\
!   grep -E -v ' (_DYNAMIC|_GLOBAL_OFFSET_TABLE_|_PROCEDURE_LINKAGE_TABLE_|_edata|_end|_etext)$' |\
    sed -e 's/ <processor specific>: / <processor_specific>:_/g' |\
    sed -e 's/ <OS specific>: / <OS_specific>:_/g' |\
    sed -e 's/ <unknown>: / <unknown>:_/g' |\
diff -Nrcpad gcc-12.3.0/libstdc++-v3/scripts/run_doxygen gcc-12.4.0/libstdc++-v3/scripts/run_doxygen
*** gcc-12.3.0/libstdc++-v3/scripts/run_doxygen	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/scripts/run_doxygen	Thu Jun 20 08:08:10 2024
*************** cxxflags="-Og -g -std=gnu++23"
*** 291,297 ****
  $gxx $cppflags $cxxflags ${srcdir}/doc/doxygen/stdheader.cc -o ./stdheader || exit 1
  # Doxygen outputs something like "\fC#include <unique_lock\&.h>\fP" and
  # we want that internal header to be replaced with something like <mutex>.
! problematic=`egrep -l '#include <.*h>' [a-z]*.3`
  for f in $problematic; do
      # this is also slow, but safe and easy to debug
      oldh=`sed -n '/fC#include </s/.*<\(.*\)>.*/\1/p' $f`
--- 291,297 ----
  $gxx $cppflags $cxxflags ${srcdir}/doc/doxygen/stdheader.cc -o ./stdheader || exit 1
  # Doxygen outputs something like "\fC#include <unique_lock\&.h>\fP" and
  # we want that internal header to be replaced with something like <mutex>.
! problematic=`grep -E -l '#include <.*h>' [a-z]*.3`
  for f in $problematic; do
      # this is also slow, but safe and easy to debug
      oldh=`sed -n '/fC#include </s/.*<\(.*\)>.*/\1/p' $f`
*************** rm stdheader
*** 303,309 ****
  # Some of the pages for generated modules have text that confuses certain
  # implementations of man(1), e.g. on GNU/Linux.  We need to have another
  # top-level *roff tag to /stop/ the .SH NAME entry.
! problematic=`egrep --files-without-match '^\.SH SYNOPSIS' [A-Z]*.3`
  #problematic='Containers.3 Sequences.3 Assoc_containers.3 Iterator_types.3'
  
  for f in $problematic; do
--- 303,309 ----
  # Some of the pages for generated modules have text that confuses certain
  # implementations of man(1), e.g. on GNU/Linux.  We need to have another
  # top-level *roff tag to /stop/ the .SH NAME entry.
! problematic=`grep -E --files-without-match '^\.SH SYNOPSIS' [A-Z]*.3`
  #problematic='Containers.3 Sequences.3 Assoc_containers.3 Iterator_types.3'
  
  for f in $problematic; do
diff -Nrcpad gcc-12.3.0/libstdc++-v3/src/Makefile.am gcc-12.4.0/libstdc++-v3/src/Makefile.am
*** gcc-12.3.0/libstdc++-v3/src/Makefile.am	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/src/Makefile.am	Thu Jun 20 08:08:10 2024
*************** else
*** 96,101 ****
--- 96,111 ----
  ldbl_alt128_compat_sources =
  endif
  
+ if ENABLE_SYMVERS_GNU_NAMESPACE
+ cxx0x_compat_sources =
+ else
+ cxx0x_compat_sources = \
+ 	compatibility-atomic-c++0x.cc \
+ 	compatibility-c++0x.cc \
+ 	compatibility-chrono.cc \
+ 	compatibility-condvar.cc \
+ 	compatibility-thread-c++0x.cc
+ endif
  
  parallel_compat_sources = \
  	compatibility-parallel_list.cc  compatibility-parallel_list-2.cc
*************** cxx98_sources = \
*** 108,118 ****
  	${ldbl_compat_sources}
  
  cxx11_sources = \
! 	compatibility-c++0x.cc \
! 	compatibility-atomic-c++0x.cc \
! 	compatibility-thread-c++0x.cc \
! 	compatibility-chrono.cc \
! 	compatibility-condvar.cc \
  	${ldbl_alt128_compat_sources}
  
  libstdc___la_SOURCES = $(cxx98_sources) $(cxx11_sources)
--- 118,124 ----
  	${ldbl_compat_sources}
  
  cxx11_sources = \
! 	${cxx0x_compat_sources} \
  	${ldbl_alt128_compat_sources}
  
  libstdc___la_SOURCES = $(cxx98_sources) $(cxx11_sources)
diff -Nrcpad gcc-12.3.0/libstdc++-v3/src/Makefile.in gcc-12.4.0/libstdc++-v3/src/Makefile.in
*** gcc-12.3.0/libstdc++-v3/src/Makefile.in	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/src/Makefile.in	Thu Jun 20 08:08:10 2024
*************** am__DEPENDENCIES_1 =
*** 153,166 ****
  @GLIBCXX_LDBL_COMPAT_TRUE@am__objects_1 = compatibility-ldbl.lo
  am__objects_2 = compatibility.lo compatibility-debug_list.lo \
  	compatibility-debug_list-2.lo $(am__objects_1)
! @ENABLE_DUAL_ABI_TRUE@@GLIBCXX_LDBL_ALT128_COMPAT_TRUE@am__objects_3 = compatibility-ldbl-alt128-cxx11.lo
! @GLIBCXX_LDBL_ALT128_COMPAT_TRUE@am__objects_4 =  \
  @GLIBCXX_LDBL_ALT128_COMPAT_TRUE@	compatibility-ldbl-alt128.lo \
! @GLIBCXX_LDBL_ALT128_COMPAT_TRUE@	$(am__objects_3)
! am__objects_5 = compatibility-c++0x.lo compatibility-atomic-c++0x.lo \
! 	compatibility-thread-c++0x.lo compatibility-chrono.lo \
! 	compatibility-condvar.lo $(am__objects_4)
! am_libstdc___la_OBJECTS = $(am__objects_2) $(am__objects_5)
  libstdc___la_OBJECTS = $(am_libstdc___la_OBJECTS)
  @VTV_CYGMIN_FALSE@am_libstdc___la_rpath = -rpath $(toolexeclibdir)
  @VTV_CYGMIN_TRUE@am_libstdc___la_rpath = -rpath $(toolexeclibdir)
--- 153,169 ----
  @GLIBCXX_LDBL_COMPAT_TRUE@am__objects_1 = compatibility-ldbl.lo
  am__objects_2 = compatibility.lo compatibility-debug_list.lo \
  	compatibility-debug_list-2.lo $(am__objects_1)
! @ENABLE_SYMVERS_GNU_NAMESPACE_FALSE@am__objects_3 = compatibility-atomic-c++0x.lo \
! @ENABLE_SYMVERS_GNU_NAMESPACE_FALSE@	compatibility-c++0x.lo \
! @ENABLE_SYMVERS_GNU_NAMESPACE_FALSE@	compatibility-chrono.lo \
! @ENABLE_SYMVERS_GNU_NAMESPACE_FALSE@	compatibility-condvar.lo \
! @ENABLE_SYMVERS_GNU_NAMESPACE_FALSE@	compatibility-thread-c++0x.lo
! @ENABLE_DUAL_ABI_TRUE@@GLIBCXX_LDBL_ALT128_COMPAT_TRUE@am__objects_4 = compatibility-ldbl-alt128-cxx11.lo
! @GLIBCXX_LDBL_ALT128_COMPAT_TRUE@am__objects_5 =  \
  @GLIBCXX_LDBL_ALT128_COMPAT_TRUE@	compatibility-ldbl-alt128.lo \
! @GLIBCXX_LDBL_ALT128_COMPAT_TRUE@	$(am__objects_4)
! am__objects_6 = $(am__objects_3) $(am__objects_5)
! am_libstdc___la_OBJECTS = $(am__objects_2) $(am__objects_6)
  libstdc___la_OBJECTS = $(am_libstdc___la_OBJECTS)
  @VTV_CYGMIN_FALSE@am_libstdc___la_rpath = -rpath $(toolexeclibdir)
  @VTV_CYGMIN_TRUE@am_libstdc___la_rpath = -rpath $(toolexeclibdir)
*************** SUBDIRS = c++98 c++11 c++17 c++20 $(file
*** 512,517 ****
--- 515,528 ----
  @GLIBCXX_LDBL_ALT128_COMPAT_TRUE@	compatibility-ldbl-alt128.cc \
  @GLIBCXX_LDBL_ALT128_COMPAT_TRUE@	${ldbl_alt128_compat_cxx11_sources}
  
+ @ENABLE_SYMVERS_GNU_NAMESPACE_FALSE@cxx0x_compat_sources = \
+ @ENABLE_SYMVERS_GNU_NAMESPACE_FALSE@	compatibility-atomic-c++0x.cc \
+ @ENABLE_SYMVERS_GNU_NAMESPACE_FALSE@	compatibility-c++0x.cc \
+ @ENABLE_SYMVERS_GNU_NAMESPACE_FALSE@	compatibility-chrono.cc \
+ @ENABLE_SYMVERS_GNU_NAMESPACE_FALSE@	compatibility-condvar.cc \
+ @ENABLE_SYMVERS_GNU_NAMESPACE_FALSE@	compatibility-thread-c++0x.cc
+ 
+ @ENABLE_SYMVERS_GNU_NAMESPACE_TRUE@cxx0x_compat_sources = 
  parallel_compat_sources = \
  	compatibility-parallel_list.cc  compatibility-parallel_list-2.cc
  
*************** cxx98_sources = \
*** 522,532 ****
  	${ldbl_compat_sources}
  
  cxx11_sources = \
! 	compatibility-c++0x.cc \
! 	compatibility-atomic-c++0x.cc \
! 	compatibility-thread-c++0x.cc \
! 	compatibility-chrono.cc \
! 	compatibility-condvar.cc \
  	${ldbl_alt128_compat_sources}
  
  libstdc___la_SOURCES = $(cxx98_sources) $(cxx11_sources)
--- 533,539 ----
  	${ldbl_compat_sources}
  
  cxx11_sources = \
! 	${cxx0x_compat_sources} \
  	${ldbl_alt128_compat_sources}
  
  libstdc___la_SOURCES = $(cxx98_sources) $(cxx11_sources)
diff -Nrcpad gcc-12.3.0/libstdc++-v3/src/c++11/Makefile.am gcc-12.4.0/libstdc++-v3/src/c++11/Makefile.am
*** gcc-12.3.0/libstdc++-v3/src/c++11/Makefile.am	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/src/c++11/Makefile.am	Thu Jun 20 08:08:10 2024
*************** cxx11_abi_sources =
*** 52,57 ****
--- 52,58 ----
  endif
  
  sources = \
+ 	assert_fail.cc \
  	chrono.cc \
  	codecvt.cc \
  	condition_variable.cc \
diff -Nrcpad gcc-12.3.0/libstdc++-v3/src/c++11/Makefile.in gcc-12.4.0/libstdc++-v3/src/c++11/Makefile.in
*** gcc-12.3.0/libstdc++-v3/src/c++11/Makefile.in	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/src/c++11/Makefile.in	Thu Jun 20 08:08:10 2024
*************** libc__11convenience_la_LIBADD =
*** 127,135 ****
  @ENABLE_DUAL_ABI_TRUE@	cxx11-ios_failure.lo \
  @ENABLE_DUAL_ABI_TRUE@	cxx11-shim_facets.lo cxx11-stdexcept.lo
  am__objects_2 = ctype_configure_char.lo ctype_members.lo
! am__objects_3 = chrono.lo codecvt.lo condition_variable.lo \
! 	cow-stdexcept.lo ctype.lo debug.lo functexcept.lo \
! 	functional.lo futex.lo future.lo hash_c++0x.lo \
  	hashtable_c++0x.lo ios.lo limits.lo mutex.lo placeholders.lo \
  	random.lo regex.lo shared_ptr.lo snprintf_lite.lo \
  	system_error.lo thread.lo $(am__objects_1) $(am__objects_2)
--- 127,135 ----
  @ENABLE_DUAL_ABI_TRUE@	cxx11-ios_failure.lo \
  @ENABLE_DUAL_ABI_TRUE@	cxx11-shim_facets.lo cxx11-stdexcept.lo
  am__objects_2 = ctype_configure_char.lo ctype_members.lo
! am__objects_3 = assert_fail.lo chrono.lo codecvt.lo \
! 	condition_variable.lo cow-stdexcept.lo ctype.lo debug.lo \
! 	functexcept.lo functional.lo futex.lo future.lo hash_c++0x.lo \
  	hashtable_c++0x.lo ios.lo limits.lo mutex.lo placeholders.lo \
  	random.lo regex.lo shared_ptr.lo snprintf_lite.lo \
  	system_error.lo thread.lo $(am__objects_1) $(am__objects_2)
*************** host_sources = \
*** 466,471 ****
--- 466,472 ----
  @ENABLE_DUAL_ABI_TRUE@	cxx11-stdexcept.cc
  
  sources = \
+ 	assert_fail.cc \
  	chrono.cc \
  	codecvt.cc \
  	condition_variable.cc \
diff -Nrcpad gcc-12.3.0/libstdc++-v3/src/c++11/assert_fail.cc gcc-12.4.0/libstdc++-v3/src/c++11/assert_fail.cc
*** gcc-12.3.0/libstdc++-v3/src/c++11/assert_fail.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/src/c++11/assert_fail.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,44 ----
+ // Debugging mode support code -*- C++ -*-
+ 
+ // Copyright (C) 2021-2023 Free Software Foundation, Inc.
+ //
+ // This file is part of the GNU ISO C++ Library.  This library is free
+ // software; you can redistribute it and/or modify it under the
+ // terms of the GNU General Public License as published by the
+ // Free Software Foundation; either version 3, or (at your option)
+ // any later version.
+ 
+ // This library is distributed in the hope that it will be useful,
+ // but WITHOUT ANY WARRANTY; without even the implied warranty of
+ // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ // GNU General Public License for more details.
+ 
+ // Under Section 7 of GPL version 3, you are granted additional
+ // permissions described in the GCC Runtime Library Exception, version
+ // 3.1, as published by the Free Software Foundation.
+ 
+ // You should have received a copy of the GNU General Public License and
+ // a copy of the GCC Runtime Library Exception along with this program;
+ // see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ // <http://www.gnu.org/licenses/>.
+ 
+ #include <cstdio>	// for std::fprintf, stderr
+ #include <cstdlib>	// for std::abort
+ 
+ #ifdef _GLIBCXX_VERBOSE_ASSERT
+ namespace std
+ {
+   [[__noreturn__]]
+   void
+   __glibcxx_assert_fail(const char* file, int line,
+ 			const char* function, const char* condition) noexcept
+   {
+     if (file && function && condition)
+       fprintf(stderr, "%s:%d: %s: Assertion '%s' failed.\n",
+ 	      file, line, function, condition);
+     else if (function)
+       fprintf(stderr, "%s: Undefined behavior detected.\n", function);
+     abort();
+   }
+ }
+ #endif
diff -Nrcpad gcc-12.3.0/libstdc++-v3/src/c++11/chrono.cc gcc-12.4.0/libstdc++-v3/src/c++11/chrono.cc
*** gcc-12.3.0/libstdc++-v3/src/c++11/chrono.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/src/c++11/chrono.cc	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 43,50 ****
  
    namespace chrono
    {
!     // XXX GLIBCXX_ABI Deprecated
!     inline namespace _V2 {
  
      constexpr bool system_clock::is_steady;
  
--- 43,49 ----
  
    namespace chrono
    {
! _GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(_V2)
  
      constexpr bool system_clock::is_steady;
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 94,100 ****
  #endif
      }
  
!   } // end inline namespace _V2
    } // namespace chrono
  
  _GLIBCXX_END_NAMESPACE_VERSION
--- 93,99 ----
  #endif
      }
  
! _GLIBCXX_END_INLINE_ABI_NAMESPACE(_V2)
    } // namespace chrono
  
  _GLIBCXX_END_NAMESPACE_VERSION
diff -Nrcpad gcc-12.3.0/libstdc++-v3/src/c++11/codecvt.cc gcc-12.4.0/libstdc++-v3/src/c++11/codecvt.cc
*** gcc-12.3.0/libstdc++-v3/src/c++11/codecvt.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/src/c++11/codecvt.cc	Thu Jun 20 08:08:10 2024
*************** namespace
*** 256,274 ****
        return incomplete_mb_character;
      char32_t c1 = (unsigned char) from[0];
      // https://en.wikipedia.org/wiki/UTF-8#Sample_code
!     if (c1 < 0x80)
      {
        ++from;
        return c1;
      }
!     else if (c1 < 0xC2) // continuation or overlong 2-byte sequence
        return invalid_mb_sequence;
      else if (c1 < 0xE0) // 2-byte sequence
      {
!       if (avail < 2)
  	return incomplete_mb_character;
        char32_t c2 = (unsigned char) from[1];
!       if ((c2 & 0xC0) != 0x80)
  	return invalid_mb_sequence;
        char32_t c = (c1 << 6) + c2 - 0x3080;
        if (c <= maxcode)
--- 256,274 ----
        return incomplete_mb_character;
      char32_t c1 = (unsigned char) from[0];
      // https://en.wikipedia.org/wiki/UTF-8#Sample_code
!     if (c1 < 0x80) [[likely]]
      {
        ++from;
        return c1;
      }
!     else if (c1 < 0xC2) [[unlikely]] // continuation or overlong 2-byte sequence
        return invalid_mb_sequence;
      else if (c1 < 0xE0) // 2-byte sequence
      {
!       if (avail < 2) [[unlikely]]
  	return incomplete_mb_character;
        char32_t c2 = (unsigned char) from[1];
!       if ((c2 & 0xC0) != 0x80) [[unlikely]]
  	return invalid_mb_sequence;
        char32_t c = (c1 << 6) + c2 - 0x3080;
        if (c <= maxcode)
*************** namespace
*** 277,320 ****
      }
      else if (c1 < 0xF0) // 3-byte sequence
      {
!       if (avail < 3)
  	return incomplete_mb_character;
        char32_t c2 = (unsigned char) from[1];
!       if ((c2 & 0xC0) != 0x80)
  	return invalid_mb_sequence;
!       if (c1 == 0xE0 && c2 < 0xA0) // overlong
  	return invalid_mb_sequence;
        char32_t c3 = (unsigned char) from[2];
!       if ((c3 & 0xC0) != 0x80)
  	return invalid_mb_sequence;
        char32_t c = (c1 << 12) + (c2 << 6) + c3 - 0xE2080;
        if (c <= maxcode)
  	from += 3;
        return c;
      }
!     else if (c1 < 0xF5) // 4-byte sequence
      {
!       if (avail < 4)
  	return incomplete_mb_character;
        char32_t c2 = (unsigned char) from[1];
!       if ((c2 & 0xC0) != 0x80)
  	return invalid_mb_sequence;
!       if (c1 == 0xF0 && c2 < 0x90) // overlong
  	return invalid_mb_sequence;
!       if (c1 == 0xF4 && c2 >= 0x90) // > U+10FFFF
!       return invalid_mb_sequence;
        char32_t c3 = (unsigned char) from[2];
!       if ((c3 & 0xC0) != 0x80)
  	return invalid_mb_sequence;
        char32_t c4 = (unsigned char) from[3];
!       if ((c4 & 0xC0) != 0x80)
  	return invalid_mb_sequence;
        char32_t c = (c1 << 18) + (c2 << 12) + (c3 << 6) + c4 - 0x3C82080;
        if (c <= maxcode)
  	from += 4;
        return c;
      }
!     else // > U+10FFFF
        return invalid_mb_sequence;
    }
  
--- 277,326 ----
      }
      else if (c1 < 0xF0) // 3-byte sequence
      {
!       if (avail < 2) [[unlikely]]
  	return incomplete_mb_character;
        char32_t c2 = (unsigned char) from[1];
!       if ((c2 & 0xC0) != 0x80) [[unlikely]]
  	return invalid_mb_sequence;
!       if (c1 == 0xE0 && c2 < 0xA0) [[unlikely]] // overlong
  	return invalid_mb_sequence;
+       if (avail < 3) [[unlikely]]
+ 	return incomplete_mb_character;
        char32_t c3 = (unsigned char) from[2];
!       if ((c3 & 0xC0) != 0x80) [[unlikely]]
  	return invalid_mb_sequence;
        char32_t c = (c1 << 12) + (c2 << 6) + c3 - 0xE2080;
        if (c <= maxcode)
  	from += 3;
        return c;
      }
!     else if (c1 < 0xF5 && maxcode > 0xFFFF) // 4-byte sequence
      {
!       if (avail < 2) [[unlikely]]
  	return incomplete_mb_character;
        char32_t c2 = (unsigned char) from[1];
!       if ((c2 & 0xC0) != 0x80) [[unlikely]]
  	return invalid_mb_sequence;
!       if (c1 == 0xF0 && c2 < 0x90) [[unlikely]] // overlong
  	return invalid_mb_sequence;
!       if (c1 == 0xF4 && c2 >= 0x90) [[unlikely]] // > U+10FFFF
! 	return invalid_mb_sequence;
!       if (avail < 3) [[unlikely]]
! 	return incomplete_mb_character;
        char32_t c3 = (unsigned char) from[2];
!       if ((c3 & 0xC0) != 0x80) [[unlikely]]
  	return invalid_mb_sequence;
+       if (avail < 4) [[unlikely]]
+ 	return incomplete_mb_character;
        char32_t c4 = (unsigned char) from[3];
!       if ((c4 & 0xC0) != 0x80) [[unlikely]]
  	return invalid_mb_sequence;
        char32_t c = (c1 << 18) + (c2 << 12) + (c3 << 6) + c4 - 0x3C82080;
        if (c <= maxcode)
  	from += 4;
        return c;
      }
!     else [[unlikely]] // > U+10FFFF
        return invalid_mb_sequence;
    }
  
*************** namespace
*** 324,343 ****
    {
      if (code_point < 0x80)
        {
! 	if (to.size() < 1)
  	  return false;
  	to = code_point;
        }
      else if (code_point <= 0x7FF)
        {
! 	if (to.size() < 2)
  	  return false;
  	to = (code_point >> 6) + 0xC0;
  	to = (code_point & 0x3F) + 0x80;
        }
      else if (code_point <= 0xFFFF)
        {
! 	if (to.size() < 3)
  	  return false;
  	to = (code_point >> 12) + 0xE0;
  	to = ((code_point >> 6) & 0x3F) + 0x80;
--- 330,349 ----
    {
      if (code_point < 0x80)
        {
! 	if (to.size() < 1) [[unlikely]]
  	  return false;
  	to = code_point;
        }
      else if (code_point <= 0x7FF)
        {
! 	if (to.size() < 2) [[unlikely]]
  	  return false;
  	to = (code_point >> 6) + 0xC0;
  	to = (code_point & 0x3F) + 0x80;
        }
      else if (code_point <= 0xFFFF)
        {
! 	if (to.size() < 3) [[unlikely]]
  	  return false;
  	to = (code_point >> 12) + 0xE0;
  	to = ((code_point >> 6) & 0x3F) + 0x80;
*************** namespace
*** 345,358 ****
        }
      else if (code_point <= 0x10FFFF)
        {
! 	if (to.size() < 4)
  	  return false;
  	to = (code_point >> 18) + 0xF0;
  	to = ((code_point >> 12) & 0x3F) + 0x80;
  	to = ((code_point >> 6) & 0x3F) + 0x80;
  	to = (code_point & 0x3F) + 0x80;
        }
!     else
        return false;
      return true;
    }
--- 351,364 ----
        }
      else if (code_point <= 0x10FFFF)
        {
! 	if (to.size() < 4) [[unlikely]]
  	  return false;
  	to = (code_point >> 18) + 0xF0;
  	to = ((code_point >> 12) & 0x3F) + 0x80;
  	to = ((code_point >> 6) & 0x3F) + 0x80;
  	to = (code_point & 0x3F) + 0x80;
        }
!     else [[unlikely]]
        return false;
      return true;
    }
*************** namespace
*** 397,412 ****
  			  unsigned long maxcode, codecvt_mode mode)
      {
        const size_t avail = from.size();
!       if (avail == 0)
  	return incomplete_mb_character;
        int inc = 1;
        char32_t c = adjust_byte_order(from[0], mode);
        if (is_high_surrogate(c))
  	{
! 	  if (avail < 2)
  	    return incomplete_mb_character;
  	  const char16_t c2 = adjust_byte_order(from[1], mode);
! 	  if (is_low_surrogate(c2))
  	    {
  	      c = surrogate_pair_to_code_point(c, c2);
  	      inc = 2;
--- 403,418 ----
  			  unsigned long maxcode, codecvt_mode mode)
      {
        const size_t avail = from.size();
!       if (avail == 0) [[unlikely]]
  	return incomplete_mb_character;
        int inc = 1;
        char32_t c = adjust_byte_order(from[0], mode);
        if (is_high_surrogate(c))
  	{
! 	  if (avail < 2) [[unlikely]]
  	    return incomplete_mb_character;
  	  const char16_t c2 = adjust_byte_order(from[1], mode);
! 	  if (is_low_surrogate(c2)) [[likely]]
  	    {
  	      c = surrogate_pair_to_code_point(c, c2);
  	      inc = 2;
*************** namespace
*** 414,420 ****
  	  else
  	    return invalid_mb_sequence;
  	}
!       else if (is_low_surrogate(c))
  	return invalid_mb_sequence;
        if (c <= maxcode)
  	from += inc;
--- 420,426 ----
  	  else
  	    return invalid_mb_sequence;
  	}
!       else if (is_low_surrogate(c)) [[unlikely]]
  	return invalid_mb_sequence;
        if (c <= maxcode)
  	from += inc;
*************** namespace
*** 458,466 ****
      while (from.size() && to.size())
        {
  	const char32_t codepoint = read_utf8_code_point(from, maxcode);
! 	if (codepoint == incomplete_mb_character)
  	  return codecvt_base::partial;
! 	if (codepoint > maxcode)
  	  return codecvt_base::error;
  	to = codepoint;
        }
--- 464,472 ----
      while (from.size() && to.size())
        {
  	const char32_t codepoint = read_utf8_code_point(from, maxcode);
! 	if (codepoint == incomplete_mb_character) [[unlikely]]
  	  return codecvt_base::partial;
! 	if (codepoint > maxcode) [[unlikely]]
  	  return codecvt_base::error;
  	to = codepoint;
        }
*************** namespace
*** 473,486 ****
    ucs4_out(range<const char32_t>& from, range<C>& to,
             unsigned long maxcode = max_code_point, codecvt_mode mode = {})
    {
!     if (!write_utf8_bom(to, mode))
        return codecvt_base::partial;
      while (from.size())
        {
  	const char32_t c = from[0];
! 	if (c > maxcode)
  	  return codecvt_base::error;
! 	if (!write_utf8_code_point(to, c))
  	  return codecvt_base::partial;
  	++from;
        }
--- 479,492 ----
    ucs4_out(range<const char32_t>& from, range<C>& to,
             unsigned long maxcode = max_code_point, codecvt_mode mode = {})
    {
!     if (!write_utf8_bom(to, mode)) [[unlikely]]
        return codecvt_base::partial;
      while (from.size())
        {
  	const char32_t c = from[0];
! 	if (c > maxcode) [[unlikely]]
  	  return codecvt_base::error;
! 	if (!write_utf8_code_point(to, c)) [[unlikely]]
  	  return codecvt_base::partial;
  	++from;
        }
*************** namespace
*** 496,504 ****
      while (from.size() && to.size())
        {
  	const char32_t codepoint = read_utf16_code_point(from, maxcode, mode);
! 	if (codepoint == incomplete_mb_character)
  	  return codecvt_base::partial;
! 	if (codepoint > maxcode)
  	  return codecvt_base::error;
  	to = codepoint;
        }
--- 502,510 ----
      while (from.size() && to.size())
        {
  	const char32_t codepoint = read_utf16_code_point(from, maxcode, mode);
! 	if (codepoint == incomplete_mb_character) [[unlikely]]
  	  return codecvt_base::partial;
! 	if (codepoint > maxcode) [[unlikely]]
  	  return codecvt_base::error;
  	to = codepoint;
        }
*************** namespace
*** 510,523 ****
    ucs4_out(range<const char32_t>& from, range<char16_t, false>& to,
             unsigned long maxcode = max_code_point, codecvt_mode mode = {})
    {
!     if (!write_utf16_bom(to, mode))
        return codecvt_base::partial;
      while (from.size())
        {
  	const char32_t c = from[0];
! 	if (c > maxcode)
  	  return codecvt_base::error;
! 	if (!write_utf16_code_point(to, c, mode))
  	  return codecvt_base::partial;
  	++from;
        }
--- 516,529 ----
    ucs4_out(range<const char32_t>& from, range<char16_t, false>& to,
             unsigned long maxcode = max_code_point, codecvt_mode mode = {})
    {
!     if (!write_utf16_bom(to, mode)) [[unlikely]]
        return codecvt_base::partial;
      while (from.size())
        {
  	const char32_t c = from[0];
! 	if (c > maxcode) [[unlikely]]
  	  return codecvt_base::error;
! 	if (!write_utf16_code_point(to, c, mode)) [[unlikely]]
  	  return codecvt_base::partial;
  	++from;
        }
*************** namespace
*** 527,560 ****
    // Flag indicating whether to process UTF-16 or UCS2
    enum class surrogates { allowed, disallowed };
  
!   // utf8 -> utf16 (or utf8 -> ucs2 if s == surrogates::disallowed)
!   template<typename C8, typename C16>
    codecvt_base::result
!   utf16_in(range<const C8>& from, range<C16>& to,
! 	   unsigned long maxcode = max_code_point, codecvt_mode mode = {},
! 	   surrogates s = surrogates::allowed)
    {
      read_utf8_bom(from, mode);
      while (from.size() && to.size())
        {
  	auto orig = from;
  	const char32_t codepoint = read_utf8_code_point(from, maxcode);
! 	if (codepoint == incomplete_mb_character)
! 	  {
! 	    if (s == surrogates::allowed)
! 	      return codecvt_base::partial;
! 	    else
! 	      return codecvt_base::error; // No surrogates in UCS2
! 	  }
  	if (codepoint > maxcode)
  	  return codecvt_base::error;
! 	if (!write_utf16_code_point(to, codepoint, mode))
  	  {
  	    from = orig; // rewind to previous position
  	    return codecvt_base::partial;
  	  }
        }
!     return codecvt_base::ok;
    }
  
    // utf16 -> utf8 (or ucs2 -> utf8 if s == surrogates::disallowed)
--- 533,560 ----
    // Flag indicating whether to process UTF-16 or UCS2
    enum class surrogates { allowed, disallowed };
  
!   // utf8 -> utf16 (or utf8 -> ucs2 if maxcode <= 0xFFFF)
!   template <typename C8, typename C16>
    codecvt_base::result
!   utf16_in(range<const C8> &from, range<C16> &to,
! 	   unsigned long maxcode = max_code_point, codecvt_mode mode = {})
    {
      read_utf8_bom(from, mode);
      while (from.size() && to.size())
        {
  	auto orig = from;
  	const char32_t codepoint = read_utf8_code_point(from, maxcode);
! 	if (codepoint == incomplete_mb_character) [[unlikely]]
! 	  return codecvt_base::partial;
  	if (codepoint > maxcode)
  	  return codecvt_base::error;
! 	if (!write_utf16_code_point(to, codepoint, mode)) [[unlikely]]
  	  {
  	    from = orig; // rewind to previous position
  	    return codecvt_base::partial;
  	  }
        }
!     return from.size() ? codecvt_base::partial : codecvt_base::ok;
    }
  
    // utf16 -> utf8 (or ucs2 -> utf8 if s == surrogates::disallowed)
*************** namespace
*** 564,570 ****
  	    unsigned long maxcode = max_code_point, codecvt_mode mode = {},
  	    surrogates s = surrogates::allowed)
    {
!     if (!write_utf8_bom(to, mode))
        return codecvt_base::partial;
      while (from.size())
        {
--- 564,570 ----
  	    unsigned long maxcode = max_code_point, codecvt_mode mode = {},
  	    surrogates s = surrogates::allowed)
    {
!     if (!write_utf8_bom(to, mode)) [[unlikely]]
        return codecvt_base::partial;
      while (from.size())
        {
*************** namespace
*** 572,585 ****
  	int inc = 1;
  	if (is_high_surrogate(c))
  	  {
! 	    if (s == surrogates::disallowed)
  	      return codecvt_base::error; // No surrogates in UCS-2
  
! 	    if (from.size() < 2)
! 	      return codecvt_base::ok; // stop converting at this point
  
  	    const char32_t c2 = from[1];
! 	    if (is_low_surrogate(c2))
  	      {
  		c = surrogate_pair_to_code_point(c, c2);
  		inc = 2;
--- 572,585 ----
  	int inc = 1;
  	if (is_high_surrogate(c))
  	  {
! 	    if (s == surrogates::disallowed) [[unlikely]]
  	      return codecvt_base::error; // No surrogates in UCS-2
  
! 	    if (from.size() < 2) [[unlikely]]
! 	      return codecvt_base::partial; // stop converting at this point
  
  	    const char32_t c2 = from[1];
! 	    if (is_low_surrogate(c2)) [[likely]]
  	      {
  		c = surrogate_pair_to_code_point(c, c2);
  		inc = 2;
*************** namespace
*** 587,597 ****
  	    else
  	      return codecvt_base::error;
  	  }
! 	else if (is_low_surrogate(c))
  	  return codecvt_base::error;
! 	if (c > maxcode)
  	  return codecvt_base::error;
! 	if (!write_utf8_code_point(to, c))
  	  return codecvt_base::partial;
  	from += inc;
        }
--- 587,597 ----
  	    else
  	      return codecvt_base::error;
  	  }
! 	else if (is_low_surrogate(c)) [[unlikely]]
  	  return codecvt_base::error;
! 	if (c > maxcode) [[unlikely]]
  	  return codecvt_base::error;
! 	if (!write_utf8_code_point(to, c)) [[unlikely]]
  	  return codecvt_base::partial;
  	from += inc;
        }
*************** namespace
*** 629,635 ****
    {
      // UCS-2 only supports characters in the BMP, i.e. one UTF-16 code unit:
      maxcode = std::min(max_single_utf16_unit, maxcode);
!     return utf16_in(from, to, maxcode, mode, surrogates::disallowed);
    }
  
    // ucs2 -> utf8
--- 629,635 ----
    {
      // UCS-2 only supports characters in the BMP, i.e. one UTF-16 code unit:
      maxcode = std::min(max_single_utf16_unit, maxcode);
!     return utf16_in(from, to, maxcode, mode);
    }
  
    // ucs2 -> utf8
diff -Nrcpad gcc-12.3.0/libstdc++-v3/src/c++11/compatibility-c++0x.cc gcc-12.4.0/libstdc++-v3/src/c++11/compatibility-c++0x.cc
*** gcc-12.3.0/libstdc++-v3/src/c++11/compatibility-c++0x.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/src/c++11/compatibility-c++0x.cc	Thu Jun 20 08:08:10 2024
***************
*** 40,45 ****
--- 40,49 ----
  # error "compatibility-c++0x.cc must be compiled with -std=gnu++0x"
  #endif
  
+ #if _GLIBCXX_INLINE_VERSION
+ # error "compatibility-thread-c++0x.cc is not needed for gnu-versioned-namespace"
+ #endif
+ 
  #ifdef _GLIBCXX_SHARED
  
  namespace std _GLIBCXX_VISIBILITY(default)
diff -Nrcpad gcc-12.3.0/libstdc++-v3/src/c++11/compatibility-chrono.cc gcc-12.4.0/libstdc++-v3/src/c++11/compatibility-chrono.cc
*** gcc-12.3.0/libstdc++-v3/src/c++11/compatibility-chrono.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/src/c++11/compatibility-chrono.cc	Thu Jun 20 08:08:10 2024
***************
*** 24,29 ****
--- 24,33 ----
  
  #include <bits/c++config.h>
  
+ #if _GLIBCXX_INLINE_VERSION
+ # error "compatibility-thread-c++0x.cc is not needed for gnu-versioned-namespace"
+ #endif
+ 
  #ifdef _GLIBCXX_USE_C99_STDINT_TR1
  
  #ifdef _GLIBCXX_USE_GETTIMEOFDAY
diff -Nrcpad gcc-12.3.0/libstdc++-v3/src/c++11/compatibility-condvar.cc gcc-12.4.0/libstdc++-v3/src/c++11/compatibility-condvar.cc
*** gcc-12.3.0/libstdc++-v3/src/c++11/compatibility-condvar.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/src/c++11/compatibility-condvar.cc	Thu Jun 20 08:08:10 2024
***************
*** 28,33 ****
--- 28,37 ----
  # error "compatibility-condvar-c++0x.cc must be compiled with -std=gnu++11"
  #endif
  
+ #if _GLIBCXX_INLINE_VERSION
+ # error "compatibility-thread-c++0x.cc is not needed for gnu-versioned-namespace"
+ #endif
+ 
  #if defined(_GLIBCXX_HAS_GTHREADS) && defined(_GLIBCXX_USE_C99_STDINT_TR1)
  
  #define condition_variable_any condition_variable_anyXX
diff -Nrcpad gcc-12.3.0/libstdc++-v3/src/c++11/compatibility-thread-c++0x.cc gcc-12.4.0/libstdc++-v3/src/c++11/compatibility-thread-c++0x.cc
*** gcc-12.3.0/libstdc++-v3/src/c++11/compatibility-thread-c++0x.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/src/c++11/compatibility-thread-c++0x.cc	Thu Jun 20 08:08:10 2024
***************
*** 35,40 ****
--- 35,44 ----
  # error "compatibility-thread-c++0x.cc must be compiled with -std=gnu++0x"
  #endif
  
+ #if _GLIBCXX_INLINE_VERSION
+ # error "compatibility-thread-c++0x.cc is not needed for gnu-versioned-namespace"
+ #endif
+ 
  #define _GLIBCXX_ASM_SYMVER(cur, old, version) \
     asm (".symver " #cur "," #old "@@@" #version);
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/src/c++11/debug.cc gcc-12.4.0/libstdc++-v3/src/c++11/debug.cc
*** gcc-12.3.0/libstdc++-v3/src/c++11/debug.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/src/c++11/debug.cc	Thu Jun 20 08:08:10 2024
***************
*** 24,29 ****
--- 24,30 ----
  
  #include <bits/move.h>
  #include <bits/stl_iterator_base_types.h>
+ #include <ext/atomicity.h> // __is_single_threaded
  
  #include <debug/formatter.h>
  #include <debug/safe_base.h>
***************
*** 44,67 ****
  
  #include "mutex_pool.h"
  
- #ifdef _GLIBCXX_VERBOSE_ASSERT
- namespace std
- {
-   [[__noreturn__]]
-   void
-   __glibcxx_assert_fail(const char* file, int line,
- 			const char* function, const char* condition) noexcept
-   {
-     if (file && function && condition)
-       fprintf(stderr, "%s:%d: %s: Assertion '%s' failed.\n",
- 	      file, line, function, condition);
-     else if (function)
-       fprintf(stderr, "%s: Undefined behavior detected.\n", function);
-     abort();
-   }
- }
- #endif
- 
  using namespace std;
  
  namespace
--- 45,50 ----
*************** namespace
*** 173,178 ****
--- 156,186 ----
  	__old->_M_reset();
        }
    }
+ 
+   void*
+   acquire_sequence_ptr_for_lock(__gnu_debug::_Safe_sequence_base*& seq)
+   {
+ #ifdef __GTHREADS
+     if (!__gnu_cxx::__is_single_threaded())
+       return __atomic_load_n(&seq, __ATOMIC_ACQUIRE);
+ #endif
+     return seq;
+   }
+ 
+   void
+   reset_sequence_ptr(__gnu_debug::_Safe_sequence_base*& seq)
+   {
+ #ifdef __GTHREADS
+     if (!__gnu_cxx::__is_single_threaded())
+       {
+ 	__atomic_store_n(&seq, (__gnu_debug::_Safe_sequence_base*)nullptr,
+ 			 __ATOMIC_RELEASE);
+ 	return;
+       }
+ #endif
+     seq = nullptr;
+   }
+ 
  } // anonymous namespace
  
  namespace __gnu_debug
*************** namespace __gnu_debug
*** 403,409 ****
      // If the sequence destructor runs between loading the pointer and
      // locking the mutex, it will detach this iterator and set _M_sequence
      // to null, and then _M_detach_single() will do nothing.
!     if (auto seq = __atomic_load_n(&_M_sequence, __ATOMIC_ACQUIRE))
        {
  	__gnu_cxx::__scoped_lock sentry(get_safe_base_mutex(seq));
  	_M_detach_single();
--- 411,417 ----
      // If the sequence destructor runs between loading the pointer and
      // locking the mutex, it will detach this iterator and set _M_sequence
      // to null, and then _M_detach_single() will do nothing.
!     if (auto seq = acquire_sequence_ptr_for_lock(_M_sequence))
        {
  	__gnu_cxx::__scoped_lock sentry(get_safe_base_mutex(seq));
  	_M_detach_single();
*************** namespace __gnu_debug
*** 425,431 ****
    _Safe_iterator_base::
    _M_reset() throw ()
    {
!     __atomic_store_n(&_M_sequence, (_Safe_sequence_base*)0, __ATOMIC_RELEASE);
      _M_version = 0;
      _M_prior = 0;
      _M_next = 0;
--- 433,439 ----
    _Safe_iterator_base::
    _M_reset() throw ()
    {
!     reset_sequence_ptr(_M_sequence);
      _M_version = 0;
      _M_prior = 0;
      _M_next = 0;
*************** namespace __gnu_debug
*** 485,491 ****
    _Safe_local_iterator_base::
    _M_detach()
    {
!     if (auto seq = __atomic_load_n(&_M_sequence, __ATOMIC_ACQUIRE))
        {
  	__gnu_cxx::__scoped_lock sentry(get_safe_base_mutex(seq));
  	_M_detach_single();
--- 493,499 ----
    _Safe_local_iterator_base::
    _M_detach()
    {
!     if (auto seq = acquire_sequence_ptr_for_lock(_M_sequence))
        {
  	__gnu_cxx::__scoped_lock sentry(get_safe_base_mutex(seq));
  	_M_detach_single();
diff -Nrcpad gcc-12.3.0/libstdc++-v3/src/c++11/system_error.cc gcc-12.4.0/libstdc++-v3/src/c++11/system_error.cc
*** gcc-12.3.0/libstdc++-v3/src/c++11/system_error.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/src/c++11/system_error.cc	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 535,545 ****
  
    error_category::~error_category() = default;
  
    const error_category&
!   _V2::system_category() noexcept { return system_category_instance.obj; }
  
    const error_category&
!   _V2::generic_category() noexcept { return generic_category_instance.obj; }
  
    system_error::~system_error() = default;
  
--- 535,549 ----
  
    error_category::~error_category() = default;
  
+ _GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(_V2)
+ 
    const error_category&
!   system_category() noexcept { return system_category_instance.obj; }
  
    const error_category&
!   generic_category() noexcept { return generic_category_instance.obj; }
! 
! _GLIBCXX_END_INLINE_ABI_NAMESPACE(_V2)
  
    system_error::~system_error() = default;
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/src/c++17/fs_ops.cc gcc-12.4.0/libstdc++-v3/src/c++17/fs_ops.cc
*** gcc-12.3.0/libstdc++-v3/src/c++17/fs_ops.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/src/c++17/fs_ops.cc	Thu Jun 20 08:08:10 2024
*************** namespace
*** 577,583 ****
    create_dir(const fs::path& p, fs::perms perm, std::error_code& ec)
    {
      bool created = false;
! #ifdef _GLIBCXX_HAVE_SYS_STAT_H
      posix::mode_t mode = static_cast<std::underlying_type_t<fs::perms>>(perm);
      if (posix::mkdir(p.c_str(), mode))
        {
--- 577,583 ----
    create_dir(const fs::path& p, fs::perms perm, std::error_code& ec)
    {
      bool created = false;
! #if _GLIBCXX_USE_MKDIR
      posix::mode_t mode = static_cast<std::underlying_type_t<fs::perms>>(perm);
      if (posix::mkdir(p.c_str(), mode))
        {
*************** fs::path
*** 735,741 ****
  fs::current_path(error_code& ec)
  {
    path p;
! #if defined _GLIBCXX_HAVE_UNISTD_H && ! defined __AVR__
  #if defined __GLIBC__ || defined _GLIBCXX_FILESYSTEM_IS_WINDOWS
    if (char_ptr cwd = char_ptr{posix::getcwd(nullptr, 0)})
      {
--- 735,741 ----
  fs::current_path(error_code& ec)
  {
    path p;
! #if _GLIBCXX_USE_GETCWD
  #if defined __GLIBC__ || defined _GLIBCXX_FILESYSTEM_IS_WINDOWS
    if (char_ptr cwd = char_ptr{posix::getcwd(nullptr, 0)})
      {
*************** fs::current_path(error_code& ec)
*** 783,789 ****
  	}
      }
  #endif  // __GLIBC__
! #else   // _GLIBCXX_HAVE_UNISTD_H
    ec = std::make_error_code(std::errc::function_not_supported);
  #endif
    return p;
--- 783,789 ----
  	}
      }
  #endif  // __GLIBC__
! #else   // _GLIBCXX_USE_GETCWD
    ec = std::make_error_code(std::errc::function_not_supported);
  #endif
    return p;
*************** fs::current_path(const path& p)
*** 801,807 ****
  void
  fs::current_path(const path& p, error_code& ec) noexcept
  {
! #ifdef _GLIBCXX_HAVE_UNISTD_H
    if (posix::chdir(p.c_str()))
      ec.assign(errno, std::generic_category());
    else
--- 801,807 ----
  void
  fs::current_path(const path& p, error_code& ec) noexcept
  {
! #if _GLIBCXX_USE_CHDIR
    if (posix::chdir(p.c_str()))
      ec.assign(errno, std::generic_category());
    else
*************** fs::equivalent(const path& p1, const pat
*** 897,903 ****
        return st1.st_dev == st2.st_dev && st1.st_ino == st2.st_ino;
  #endif
      }
!   else if (!exists(s1) && !exists(s2))
      ec = std::make_error_code(std::errc::no_such_file_or_directory);
    else if (err)
      ec.assign(err, std::generic_category());
--- 897,903 ----
        return st1.st_dev == st2.st_dev && st1.st_ino == st2.st_ino;
  #endif
      }
!   else if (!exists(s1) || !exists(s2))
      ec = std::make_error_code(std::errc::no_such_file_or_directory);
    else if (err)
      ec.assign(err, std::generic_category());
*************** void
*** 1097,1102 ****
--- 1097,1103 ----
  fs::permissions(const path& p, perms prms, perm_options opts,
  		error_code& ec) noexcept
  {
+ #if _GLIBCXX_USE_FCHMODAT || _GLIBCXX_USE_CHMOD
    const bool replace = is_set(opts, perm_options::replace);
    const bool add = is_set(opts, perm_options::add);
    const bool remove = is_set(opts, perm_options::remove);
*************** fs::permissions(const path& p, perms prm
*** 1138,1143 ****
--- 1139,1147 ----
      ec.assign(err, std::generic_category());
    else
      ec.clear();
+ #else
+   ec = std::make_error_code(std::errc::function_not_supported);
+ #endif
  }
  
  fs::path
diff -Nrcpad gcc-12.3.0/libstdc++-v3/src/c++17/memory_resource.cc gcc-12.4.0/libstdc++-v3/src/c++17/memory_resource.cc
*** gcc-12.3.0/libstdc++-v3/src/c++17/memory_resource.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/src/c++17/memory_resource.cc	Thu Jun 20 08:08:10 2024
*************** namespace pmr
*** 506,512 ****
      }
  
      // Allocated size of chunk:
!     uint32_t _M_bytes = 0;
      // Start of allocated chunk:
      std::byte* _M_p = nullptr;
  
--- 506,512 ----
      }
  
      // Allocated size of chunk:
!     bitset::size_type _M_bytes = 0;
      // Start of allocated chunk:
      std::byte* _M_p = nullptr;
  
*************** namespace pmr
*** 580,586 ****
    // For 16-bit pointers it's five pointers (10 bytes).
    // TODO pad 64-bit to 4*sizeof(void*) to avoid splitting across cache lines?
    static_assert(sizeof(chunk)
!       == sizeof(bitset::size_type) + sizeof(uint32_t) + 2 * sizeof(void*));
  
    // An oversized allocation that doesn't fit in a pool.
    struct big_block
--- 580,586 ----
    // For 16-bit pointers it's five pointers (10 bytes).
    // TODO pad 64-bit to 4*sizeof(void*) to avoid splitting across cache lines?
    static_assert(sizeof(chunk)
!       == 2 * sizeof(bitset::size_type) + 2 * sizeof(void*));
  
    // An oversized allocation that doesn't fit in a pool.
    struct big_block
*************** namespace pmr
*** 735,741 ****
  	  _M_blocks_per_chunk = std::min({
  	      max_blocks,
  	      __opts.max_blocks_per_chunk,
! 	      (size_t)_M_blocks_per_chunk * 2
  	  });
  	}
      }
--- 735,741 ----
  	  _M_blocks_per_chunk = std::min({
  	      max_blocks,
  	      __opts.max_blocks_per_chunk,
! 	      size_t(_M_blocks_per_chunk * 2)
  	  });
  	}
      }
*************** namespace pmr
*** 1058,1064 ****
  	// Decide on initial number of blocks per chunk.
  	// At least 16 blocks per chunk seems reasonable,
  	// more for smaller blocks:
! 	size_t blocks_per_chunk = std::max(size_t(16), 1024 / block_size);
  	// But don't exceed the requested max_blocks_per_chunk:
  	blocks_per_chunk
  	  = std::min(blocks_per_chunk, _M_opts.max_blocks_per_chunk);
--- 1058,1065 ----
  	// Decide on initial number of blocks per chunk.
  	// At least 16 blocks per chunk seems reasonable,
  	// more for smaller blocks:
! 	size_t blocks_per_chunk = 1024 / block_size;
! 	blocks_per_chunk = std::max(size_t(16), blocks_per_chunk);
  	// But don't exceed the requested max_blocks_per_chunk:
  	blocks_per_chunk
  	  = std::min(blocks_per_chunk, _M_opts.max_blocks_per_chunk);
diff -Nrcpad gcc-12.3.0/libstdc++-v3/src/filesystem/ops-common.h gcc-12.4.0/libstdc++-v3/src/filesystem/ops-common.h
*** gcc-12.3.0/libstdc++-v3/src/filesystem/ops-common.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/src/filesystem/ops-common.h	Thu Jun 20 08:08:10 2024
***************
*** 35,41 ****
  # endif
  # if defined(_GLIBCXX_HAVE_SYS_STAT_H) && defined(_GLIBCXX_HAVE_SYS_TYPES_H)
  #  include <sys/types.h>
! #  include <sys/stat.h>
  # endif
  #endif
  #if !_GLIBCXX_USE_UTIMENSAT && _GLIBCXX_HAVE_UTIME_H
--- 35,41 ----
  # endif
  # if defined(_GLIBCXX_HAVE_SYS_STAT_H) && defined(_GLIBCXX_HAVE_SYS_TYPES_H)
  #  include <sys/types.h>
! #  include <sys/stat.h>  // mkdir, chmod
  # endif
  #endif
  #if !_GLIBCXX_USE_UTIMENSAT && _GLIBCXX_HAVE_UTIME_H
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 84,90 ****
    inline error_code
    __unsupported() noexcept
    {
! #if defined ENOTSUP
      return std::make_error_code(std::errc::not_supported);
  #elif defined EOPNOTSUPP
      // This is supposed to be for socket operations
--- 84,95 ----
    inline error_code
    __unsupported() noexcept
    {
! #if defined __AVR__
!     // avr-libc defines ENOTSUP and EOPNOTSUPP but with nonsense values.
!     // ENOSYS is defined though, so use an error_code corresponding to that.
!     // This contradicts the comment above, but we don't have much choice.
!     return std::make_error_code(std::errc::function_not_supported);
! #elif defined ENOTSUP
      return std::make_error_code(std::errc::not_supported);
  #elif defined EOPNOTSUPP
      // This is supposed to be for socket operations
*************** namespace __gnu_posix
*** 124,138 ****
--- 129,147 ----
  
    inline int chmod(const wchar_t* path, mode_t mode)
    { return ::_wchmod(path, mode); }
+ #define _GLIBCXX_USE_CHMOD 1
  
    inline int mkdir(const wchar_t* path, mode_t)
    { return ::_wmkdir(path); }
+ #define _GLIBCXX_USE_MKDIR 1
  
    inline wchar_t* getcwd(wchar_t* buf, size_t size)
    { return ::_wgetcwd(buf, size > (size_t)INT_MAX ? INT_MAX : (int)size); }
+ #define _GLIBCXX_USE_GETCWD 1
  
    inline int chdir(const wchar_t* path)
    { return ::_wchdir(path); }
+ #define _GLIBCXX_USE_CHDIR 1
  
  #if !_GLIBCXX_USE_UTIMENSAT && _GLIBCXX_HAVE_UTIME_H
    using utimbuf = _utimbuf;
*************** namespace __gnu_posix
*** 181,190 ****
--- 190,207 ----
  #  endif
  # endif
    using ::mode_t;
+ # if _GLIBCXX_USE_CHMOD
    using ::chmod;
+ # endif
+ # if _GLIBCXX_USE_MKDIR
    using ::mkdir;
+ # endif
+ # if _GLIBCXX_USE_GETCWD
    using ::getcwd;
+ # endif
+ # if _GLIBCXX_USE_CHDIR
    using ::chdir;
+ # endif
  # if !_GLIBCXX_USE_UTIMENSAT && _GLIBCXX_USE_UTIME
    using ::utimbuf;
    using ::utime;
*************** _GLIBCXX_BEGIN_NAMESPACE_FILESYSTEM
*** 452,476 ****
        int fd;
      };
  
!     int iflag = O_RDONLY;
  #ifdef _GLIBCXX_FILESYSTEM_IS_WINDOWS
!     iflag |= O_BINARY;
  #endif
  
      CloseFD in = { posix::open(from, iflag) };
      if (in.fd == -1)
        {
  	ec.assign(errno, std::generic_category());
  	return false;
        }
!     int oflag = O_WRONLY|O_CREAT;
      if (options.overwrite || options.update)
        oflag |= O_TRUNC;
      else
        oflag |= O_EXCL;
- #ifdef _GLIBCXX_FILESYSTEM_IS_WINDOWS
-     oflag |= O_BINARY;
- #endif
      CloseFD out = { posix::open(to, oflag, S_IWUSR) };
      if (out.fd == -1)
        {
--- 469,494 ----
        int fd;
      };
  
!     int common_flags = 0;
! #ifdef O_CLOEXEC
!     common_flags |= O_CLOEXEC;
! #endif
  #ifdef _GLIBCXX_FILESYSTEM_IS_WINDOWS
!     common_flags |= O_BINARY;
  #endif
  
+     const int iflag = O_RDONLY | common_flags;
      CloseFD in = { posix::open(from, iflag) };
      if (in.fd == -1)
        {
  	ec.assign(errno, std::generic_category());
  	return false;
        }
!     int oflag = O_WRONLY | O_CREAT | common_flags;
      if (options.overwrite || options.update)
        oflag |= O_TRUNC;
      else
        oflag |= O_EXCL;
      CloseFD out = { posix::open(to, oflag, S_IWUSR) };
      if (out.fd == -1)
        {
*************** _GLIBCXX_BEGIN_NAMESPACE_FILESYSTEM
*** 485,492 ****
      if (::fchmod(out.fd, from_st->st_mode))
  #elif defined _GLIBCXX_USE_FCHMODAT && ! defined _GLIBCXX_FILESYSTEM_IS_WINDOWS
      if (::fchmodat(AT_FDCWD, to, from_st->st_mode, 0))
! #else
      if (posix::chmod(to, from_st->st_mode))
  #endif
        {
  	ec.assign(errno, std::generic_category());
--- 503,512 ----
      if (::fchmod(out.fd, from_st->st_mode))
  #elif defined _GLIBCXX_USE_FCHMODAT && ! defined _GLIBCXX_FILESYSTEM_IS_WINDOWS
      if (::fchmodat(AT_FDCWD, to, from_st->st_mode, 0))
! #elif defined _GLIBCXX_USE_CHMOD
      if (posix::chmod(to, from_st->st_mode))
+ #else
+     if (false)
  #endif
        {
  	ec.assign(errno, std::generic_category());
*************** _GLIBCXX_BEGIN_NAMESPACE_FILESYSTEM
*** 495,519 ****
  
      size_t count = from_st->st_size;
  #if defined _GLIBCXX_USE_SENDFILE && ! defined _GLIBCXX_FILESYSTEM_IS_WINDOWS
!     off_t offset = 0;
!     ssize_t n = ::sendfile(out.fd, in.fd, &offset, count);
!     if (n < 0 && errno != ENOSYS && errno != EINVAL)
!       {
! 	ec.assign(errno, std::generic_category());
! 	return false;
!       }
!     if ((size_t)n == count)
        {
! 	if (!out.close() || !in.close())
  	  {
  	    ec.assign(errno, std::generic_category());
  	    return false;
  	  }
! 	ec.clear();
! 	return true;
        }
-     else if (n > 0)
-       count -= n;
  #endif // _GLIBCXX_USE_SENDFILE
  
      using std::ios;
--- 515,543 ----
  
      size_t count = from_st->st_size;
  #if defined _GLIBCXX_USE_SENDFILE && ! defined _GLIBCXX_FILESYSTEM_IS_WINDOWS
!     ssize_t n = 0;
!     if (count != 0)
        {
! 	off_t offset = 0;
! 	n = ::sendfile(out.fd, in.fd, &offset, count);
! 	if (n < 0 && errno != ENOSYS && errno != EINVAL)
  	  {
  	    ec.assign(errno, std::generic_category());
  	    return false;
  	  }
! 	if ((size_t)n == count)
! 	  {
! 	    if (!out.close() || !in.close())
! 	      {
! 		ec.assign(errno, std::generic_category());
! 		return false;
! 	      }
! 	    ec.clear();
! 	    return true;
! 	  }
! 	else if (n > 0)
! 	  count -= n;
        }
  #endif // _GLIBCXX_USE_SENDFILE
  
      using std::ios;
*************** _GLIBCXX_BEGIN_NAMESPACE_FILESYSTEM
*** 543,553 ****
        }
  #endif
  
!     if (count && !(std::ostream(&sbout) << &sbin))
!       {
! 	ec = std::make_error_code(std::errc::io_error);
! 	return false;
!       }
      if (!sbout.close() || !sbin.close())
        {
  	ec.assign(errno, std::generic_category());
--- 567,583 ----
        }
  #endif
  
!     // ostream::operator<<(streambuf*) fails if it extracts no characters,
!     // so don't try to use it for empty files. But from_st->st_size == 0 for
!     // some special files (e.g. procfs, see PR libstdc++/108178) so just try
!     // to read a character to decide whether there is anything to copy or not.
!     if (sbin.sgetc() != char_traits<char>::eof())
!       if (!(std::ostream(&sbout) << &sbin))
! 	{
! 	  ec = std::make_error_code(std::errc::io_error);
! 	  return false;
! 	}
! 
      if (!sbout.close() || !sbin.close())
        {
  	ec.assign(errno, std::generic_category());
*************** _GLIBCXX_BEGIN_NAMESPACE_FILESYSTEM
*** 620,626 ****
        {
  	buf.resize(len);
  	len = GetTempPathW(buf.size(), buf.data());
!       } while (len > buf.size());
  
      if (len == 0)
        ec = __last_system_error();
--- 650,657 ----
        {
  	buf.resize(len);
  	len = GetTempPathW(buf.size(), buf.data());
!       }
!     while (len > buf.size());
  
      if (len == 0)
        ec = __last_system_error();
diff -Nrcpad gcc-12.3.0/libstdc++-v3/src/filesystem/ops.cc gcc-12.4.0/libstdc++-v3/src/filesystem/ops.cc
*** gcc-12.3.0/libstdc++-v3/src/filesystem/ops.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/src/filesystem/ops.cc	Thu Jun 20 08:08:10 2024
*************** namespace
*** 487,493 ****
    create_dir(const fs::path& p, fs::perms perm, std::error_code& ec)
    {
      bool created = false;
! #ifdef _GLIBCXX_HAVE_SYS_STAT_H
      posix::mode_t mode = static_cast<std::underlying_type_t<fs::perms>>(perm);
      if (posix::mkdir(p.c_str(), mode))
        {
--- 487,493 ----
    create_dir(const fs::path& p, fs::perms perm, std::error_code& ec)
    {
      bool created = false;
! #if _GLIBCXX_USE_MKDIR
      posix::mode_t mode = static_cast<std::underlying_type_t<fs::perms>>(perm);
      if (posix::mkdir(p.c_str(), mode))
        {
*************** fs::path
*** 644,650 ****
  fs::current_path(error_code& ec)
  {
    path p;
! #ifdef _GLIBCXX_HAVE_UNISTD_H
  #if defined __GLIBC__ || defined _GLIBCXX_FILESYSTEM_IS_WINDOWS
    if (char_ptr cwd = char_ptr{posix::getcwd(nullptr, 0)})
      {
--- 644,650 ----
  fs::current_path(error_code& ec)
  {
    path p;
! #if _GLIBCXX_USE_GETCWD
  #if defined __GLIBC__ || defined _GLIBCXX_FILESYSTEM_IS_WINDOWS
    if (char_ptr cwd = char_ptr{posix::getcwd(nullptr, 0)})
      {
*************** fs::current_path(const path& p)
*** 710,716 ****
  void
  fs::current_path(const path& p, error_code& ec) noexcept
  {
! #ifdef _GLIBCXX_HAVE_UNISTD_H
    if (posix::chdir(p.c_str()))
      ec.assign(errno, std::generic_category());
    else
--- 710,716 ----
  void
  fs::current_path(const path& p, error_code& ec) noexcept
  {
! #if _GLIBCXX_USE_CHDIR
    if (posix::chdir(p.c_str()))
      ec.assign(errno, std::generic_category());
    else
*************** fs::equivalent(const path& p1, const pat
*** 764,770 ****
  	return false;
        return st1.st_dev == st2.st_dev && st1.st_ino == st2.st_ino;
      }
!   else if (!exists(s1) && !exists(s2))
      ec = std::make_error_code(std::errc::no_such_file_or_directory);
    else if (err)
      ec.assign(err, std::generic_category());
--- 764,770 ----
  	return false;
        return st1.st_dev == st2.st_dev && st1.st_ino == st2.st_ino;
      }
!   else if (!exists(s1) || !exists(s2))
      ec = std::make_error_code(std::errc::no_such_file_or_directory);
    else if (err)
      ec.assign(err, std::generic_category());
*************** fs::permissions(const path& p, perms prm
*** 946,951 ****
--- 946,952 ----
  void
  fs::permissions(const path& p, perms prms, error_code& ec) noexcept
  {
+ #if _GLIBCXX_USE_FCHMODAT || _GLIBCXX_USE_CHMOD
    const bool add = is_set(prms, perms::add_perms);
    const bool remove = is_set(prms, perms::remove_perms);
    const bool nofollow = is_set(prms, perms::symlink_nofollow);
*************** fs::permissions(const path& p, perms prm
*** 986,991 ****
--- 987,995 ----
      ec.assign(err, std::generic_category());
    else
      ec.clear();
+ #else
+   ec = std::make_error_code(std::errc::function_not_supported);
+ #endif
  }
  
  fs::path
diff -Nrcpad gcc-12.3.0/libstdc++-v3/src/libbacktrace/Makefile.am gcc-12.4.0/libstdc++-v3/src/libbacktrace/Makefile.am
*** gcc-12.3.0/libstdc++-v3/src/libbacktrace/Makefile.am	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/src/libbacktrace/Makefile.am	Thu Jun 20 08:08:10 2024
*************** libstdc___libbacktrace_la_CPPFLAGS = \
*** 45,56 ****
  	$(BACKTRACE_CPPFLAGS)
  
  WARN_FLAGS = -W -Wall -Wwrite-strings -Wmissing-format-attribute \
! 	     -Wcast-qual -Werror
  C_WARN_FLAGS = $(WARN_FLAGS) -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -Wno-unused-but-set-variable
  CXX_WARN_FLAGS = $(WARN_FLAGS) -Wno-unused-parameter
! AM_CFLAGS = $(C_WARN_FLAGS)
  AM_CFLAGS += $(EXTRA_CFLAGS)
! AM_CXXFLAGS = $(CXX_WARN_FLAGS) -fno-rtti -fno-exceptions
  AM_CXXFLAGS += $(EXTRA_CXXFLAGS)
  
  obj_prefix = std_stacktrace
--- 45,60 ----
  	$(BACKTRACE_CPPFLAGS)
  
  WARN_FLAGS = -W -Wall -Wwrite-strings -Wmissing-format-attribute \
! 	     -Wcast-qual
  C_WARN_FLAGS = $(WARN_FLAGS) -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -Wno-unused-but-set-variable
  CXX_WARN_FLAGS = $(WARN_FLAGS) -Wno-unused-parameter
! AM_CFLAGS = \
! 	$(glibcxx_lt_pic_flag) $(glibcxx_compiler_shared_flag) \
! 	$(C_WARN_FLAGS)
  AM_CFLAGS += $(EXTRA_CFLAGS)
! AM_CXXFLAGS = \
! 	$(glibcxx_lt_pic_flag) $(glibcxx_compiler_shared_flag) \
! 	$(CXX_WARN_FLAGS) -fno-rtti -fno-exceptions
  AM_CXXFLAGS += $(EXTRA_CXXFLAGS)
  
  obj_prefix = std_stacktrace
diff -Nrcpad gcc-12.3.0/libstdc++-v3/src/libbacktrace/Makefile.in gcc-12.4.0/libstdc++-v3/src/libbacktrace/Makefile.in
*** gcc-12.3.0/libstdc++-v3/src/libbacktrace/Makefile.in	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/src/libbacktrace/Makefile.in	Thu Jun 20 08:08:10 2024
*************** VTV_CXXFLAGS = @VTV_CXXFLAGS@
*** 368,374 ****
  VTV_CXXLINKFLAGS = @VTV_CXXLINKFLAGS@
  VTV_PCH_CXXFLAGS = @VTV_PCH_CXXFLAGS@
  WARN_FLAGS = -W -Wall -Wwrite-strings -Wmissing-format-attribute \
! 	     -Wcast-qual -Werror
  
  XMLCATALOG = @XMLCATALOG@
  XMLLINT = @XMLLINT@
--- 368,374 ----
  VTV_CXXLINKFLAGS = @VTV_CXXLINKFLAGS@
  VTV_PCH_CXXFLAGS = @VTV_PCH_CXXFLAGS@
  WARN_FLAGS = -W -Wall -Wwrite-strings -Wmissing-format-attribute \
! 	     -Wcast-qual
  
  XMLCATALOG = @XMLCATALOG@
  XMLLINT = @XMLLINT@
*************** libstdc___libbacktrace_la_CPPFLAGS = \
*** 498,506 ****
  
  C_WARN_FLAGS = $(WARN_FLAGS) -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -Wno-unused-but-set-variable
  CXX_WARN_FLAGS = $(WARN_FLAGS) -Wno-unused-parameter
! AM_CFLAGS = $(C_WARN_FLAGS) $(EXTRA_CFLAGS)
! AM_CXXFLAGS = $(CXX_WARN_FLAGS) -fno-rtti -fno-exceptions \
! 	$(EXTRA_CXXFLAGS)
  obj_prefix = std_stacktrace
  
  # Each FILE.c in SOURCES will be compiled to SHORTNAME-FILE.o
--- 498,507 ----
  
  C_WARN_FLAGS = $(WARN_FLAGS) -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -Wno-unused-but-set-variable
  CXX_WARN_FLAGS = $(WARN_FLAGS) -Wno-unused-parameter
! AM_CFLAGS = $(glibcxx_lt_pic_flag) $(glibcxx_compiler_shared_flag) \
! 	$(C_WARN_FLAGS) $(EXTRA_CFLAGS)
! AM_CXXFLAGS = $(glibcxx_lt_pic_flag) $(glibcxx_compiler_shared_flag) \
! 	$(CXX_WARN_FLAGS) -fno-rtti -fno-exceptions $(EXTRA_CXXFLAGS)
  obj_prefix = std_stacktrace
  
  # Each FILE.c in SOURCES will be compiled to SHORTNAME-FILE.o
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/17_intro/names.cc gcc-12.4.0/libstdc++-v3/testsuite/17_intro/names.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/17_intro/names.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/17_intro/names.cc	Thu Jun 20 08:08:10 2024
***************
*** 28,34 ****
  #define F (
  #define G (
  #define H (
! #define I (
  #define J (
  #define K (
  #define L (
--- 28,34 ----
  #define F (
  #define G (
  #define H (
! // <complex.h> defines I
  #define J (
  #define K (
  #define L (
***************
*** 106,115 ****
  #endif
  #define z (
  
  #define func (
! #define tmp (
  #define sz (
  #define token (
  
  #if __cplusplus < 201103L
  #define uses_allocator  (
--- 106,125 ----
  #endif
  #define z (
  
+ #define attributes (
+ #define bin_op (
+ #define clockid (
  #define func (
! #define max_val (
! #define min_val (
! #define object (
! #define ostr (
! #define policy (
  #define sz (
+ #define tinfo (
+ #define tmp (
  #define token (
+ #define value_t (
  
  #if __cplusplus < 201103L
  #define uses_allocator  (
***************
*** 146,151 ****
--- 156,162 ----
  #define Alloc			Alloc is not a reserved name
  #define BinaryFunction1		BinaryFunction1 is not a reserved name
  #define BinaryFunction2		BinaryFunction2 is not a reserved name
+ #define BinaryOperation		BinaryOperation is not a reserved name
  #define Char			Char is not a reserved name
  #define CharT			CharT is not a reserved name
  #define Cmp			Cmp is not a reserved name
***************
*** 169,174 ****
--- 180,186 ----
  #define H1			H1 is not a reserved name
  #define H2			H2 is not a reserved name
  #define Head			Head is not a reserved name
+ #define IsVector		IsVector is not a reserved name
  #define It			It is not a reserved name
  #define Iter			Iter is not a reserved name
  #define Iterator		Iterator is not a reserved name
***************
*** 181,196 ****
--- 193,214 ----
  #define Pointer			Pointer is not a reserved name
  #define Policy			Policy is not a reserved name
  #define Pred			Pred is not a reserved name
+ #define Proj			Proj is not a reserved name
+ #define Proj1			Proj1 is not a reserved name
+ #define Proj2			Proj2 is not a reserved name
  #define Ptr			Ptr is not a reserved name
  #define Reference		Reference is not a reserved name
  #define Seq			Seq is not a reserved name
  #define Seq_RAIter		Seq_RAIter is not a reserved name
  #define Series			Series is not a reserved name
  #define Set			Set is not a reserved name
+ #define Size			Size is not a reserved name
  #define String			String is not a reserved name
  #define Tp			Tp is not a reserved name
+ #define TQual			TQual is not a reserved name
  #define Traits			Traits is not a reserved name
  #define Type			Type is not a reserved name
+ #define UQual			UQual is not a reserved name
  #define Value			Value is not a reserved name
  #define ValueT			ValueT is not a reserved name
  #define ValueType		ValueType is not a reserved name
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/18_support/new_nothrow.cc gcc-12.4.0/libstdc++-v3/testsuite/18_support/new_nothrow.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/18_support/new_nothrow.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/18_support/new_nothrow.cc	Thu Jun 20 08:08:10 2024
*************** void* operator new (size_t n)
*** 63,69 ****
      }
  }
  
! void operator delete (void *p)
  {
      ++delete_called;
      if (p)
--- 63,75 ----
      }
  }
  
! #if __cplusplus >= 201103L
! #define NOEXCEPT noexcept
! #else
! #define NOEXCEPT
! #endif
! 
! void operator delete (void *p) NOEXCEPT
  {
      ++delete_called;
      if (p)
*************** void* operator new[] (size_t n)
*** 76,93 ****
      return operator new(n);
  }
  
! void operator delete[] (void *p)
  {
      ++delete_vec_called;
      operator delete(p);
  }
  
  #if __cplusplus >= 201402L
! void operator delete (void *p, std::size_t)
  {
    ::operator delete(p);
  }
! void operator delete[] (void *p, std::size_t)
  {
    ::operator delete[](p);
  }
--- 82,99 ----
      return operator new(n);
  }
  
! void operator delete[] (void *p) NOEXCEPT
  {
      ++delete_vec_called;
      operator delete(p);
  }
  
  #if __cplusplus >= 201402L
! void operator delete (void *p, std::size_t) noexcept
  {
    ::operator delete(p);
  }
! void operator delete[] (void *p, std::size_t) noexcept
  {
    ::operator delete[](p);
  }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/19_diagnostics/stacktrace/hash.cc gcc-12.4.0/libstdc++-v3/testsuite/19_diagnostics/stacktrace/hash.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/19_diagnostics/stacktrace/hash.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/19_diagnostics/stacktrace/hash.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,24 ----
+ // { dg-options "-std=gnu++23 -lstdc++_libbacktrace" }
+ // { dg-do run { target c++23 } }
+ // { dg-require-effective-target stacktrace }
+ 
+ #include <stacktrace>
+ #include <testsuite_allocator.h>
+ #include <testsuite_hooks.h>
+ 
+ void
+ test_hash()
+ {
+   using Alloc = __gnu_test::uneq_allocator<std::stacktrace_entry>;
+   using S = std::basic_stacktrace<Alloc>;
+   S s;
+   S cur = S::current();
+   std::size_t h = std::hash<S>()(s);
+   std::size_t h2 = std::hash<S>()(cur);
+   VERIFY( cur.empty() == (h == h2) );
+ }
+ 
+ int main()
+ {
+   test_hash();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/20_util/any/cons/92156.cc gcc-12.4.0/libstdc++-v3/testsuite/20_util/any/cons/92156.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/20_util/any/cons/92156.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/20_util/any/cons/92156.cc	Thu Jun 20 08:08:10 2024
***************
*** 1,4 ****
--- 1,5 ----
  // { dg-do run { target c++17 } }
+ // { dg-options "-Wno-init-list-lifetime" }
  
  // Copyright (C) 2020-2022 Free Software Foundation, Inc.
  //
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/20_util/any/modifiers/92156.cc gcc-12.4.0/libstdc++-v3/testsuite/20_util/any/modifiers/92156.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/20_util/any/modifiers/92156.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/20_util/any/modifiers/92156.cc	Thu Jun 20 08:08:10 2024
***************
*** 1,4 ****
--- 1,5 ----
  // { dg-do run { target c++17 } }
+ // { dg-options "-Wno-init-list-lifetime" }
  
  // Copyright (C) 2020-2022 Free Software Foundation, Inc.
  //
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/20_util/default_delete/void_neg.cc gcc-12.4.0/libstdc++-v3/testsuite/20_util/default_delete/void_neg.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/20_util/default_delete/void_neg.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/20_util/default_delete/void_neg.cc	Thu Jun 20 08:08:10 2024
*************** void test01()
*** 27,29 ****
--- 27,32 ----
    d(nullptr);   // { dg-error "here" }
    // { dg-error "delete pointer to incomplete type" "" { target *-*-* } 0 }
  }
+ 
+ // { dg-prune-output "invalid application of 'sizeof' to a void type" }
+ // { dg-prune-output "deleting 'void*' is undefined" }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg1.cc gcc-12.4.0/libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg1.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg1.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg1.cc	Thu Jun 20 08:08:10 2024
*************** void test01()
*** 29,32 ****
    test_type d; // { dg-error "required from here" }
  }
  
! // { dg-error "rep cannot be a duration" "" { target *-*-* } 0 }
--- 29,32 ----
    test_type d; // { dg-error "required from here" }
  }
  
! // { dg-error "rep cannot be a std::chrono::duration" "" { target *-*-* } 0 }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg2.cc gcc-12.4.0/libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg2.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg2.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg2.cc	Thu Jun 20 08:08:10 2024
*************** void test01()
*** 30,36 ****
    test_type d;			// { dg-error "required from here" }
  }
  
! // { dg-error "must be a specialization of ratio" "" { target *-*-* } 0 }
  // { dg-prune-output "'num' is not a member of 'int'" }
  // { dg-prune-output "'den' is not a member of 'int'" }
  // { dg-prune-output "'int' is not a class, struct, or union type" }
--- 30,36 ----
    test_type d;			// { dg-error "required from here" }
  }
  
! // { dg-error "must be a specialization of std::ratio" "" { target *-*-* } 0 }
  // { dg-prune-output "'num' is not a member of 'int'" }
  // { dg-prune-output "'den' is not a member of 'int'" }
  // { dg-prune-output "'int' is not a class, struct, or union type" }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/20_util/exchange/constexpr.cc gcc-12.4.0/libstdc++-v3/testsuite/20_util/exchange/constexpr.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/20_util/exchange/constexpr.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/20_util/exchange/constexpr.cc	Thu Jun 20 08:08:10 2024
***************
*** 20,25 ****
--- 20,31 ----
  
  #include <utility>
  
+ #ifndef __cpp_lib_constexpr_algorithms
+ # error "Feature test macro for constexpr std::exchange is missing in <utility>"
+ #elif __cpp_lib_constexpr_algorithms < 201806L
+ # error "Feature test macro for constexpr std::exchange has wrong value in <utility>"
+ #endif
+ 
  constexpr bool
  test()
  {
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/20_util/from_chars/4.cc gcc-12.4.0/libstdc++-v3/testsuite/20_util/from_chars/4.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/20_util/from_chars/4.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/20_util/from_chars/4.cc	Thu Jun 20 08:08:10 2024
***************
*** 18,23 ****
--- 18,24 ----
  // <charconv> is supported in C++14 as a GNU extension
  // { dg-do run { target c++14 } }
  // { dg-add-options ieee }
+ // { dg-additional-options "-DSKIP_LONG_DOUBLE" { target aarch64-*-vxworks* x86_64-*-vxworks* } }
  
  #include <charconv>
  #include <string>
*************** test06()
*** 354,360 ****
  {
    test_max_mantissa<float, unsigned long>();
    test_max_mantissa<double, unsigned long long>();
! #ifdef __GLIBCXX_TYPE_INT_N_0
    test_max_mantissa<long double, unsigned __GLIBCXX_TYPE_INT_N_0>();
  #endif
  }
--- 355,361 ----
  {
    test_max_mantissa<float, unsigned long>();
    test_max_mantissa<double, unsigned long long>();
! #if defined __GLIBCXX_TYPE_INT_N_0 && !defined SKIP_LONG_DOUBLE
    test_max_mantissa<long double, unsigned __GLIBCXX_TYPE_INT_N_0>();
  #endif
  }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/20_util/headers/memory/synopsis.cc gcc-12.4.0/libstdc++-v3/testsuite/20_util/headers/memory/synopsis.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/20_util/headers/memory/synopsis.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/20_util/headers/memory/synopsis.cc	Thu Jun 20 08:08:10 2024
***************
*** 26,45 ****
  # define NOTHROW
  #endif
  
! namespace std {
    //  lib.default.allocator, the default allocator:
    template <class T> class allocator;
    template <> class allocator<void>;
    template <class T, class U>
- #if __cplusplus > 201703L
-   constexpr
- #endif
    bool operator==(const allocator<T>&, const allocator<U>&) throw();
    template <class T, class U>
- #if __cplusplus > 201703L
-   constexpr
- #endif
    bool operator!=(const allocator<T>&, const allocator<U>&) throw();
  
    //  lib.storage.iterator, raw storage iterator:
    template <class OutputIterator, class T> class raw_storage_iterator;
--- 26,60 ----
  # define NOTHROW
  #endif
  
! namespace std
! {
! #if __cplusplus >= 201103L
!   template<class Ptr> struct pointer_traits;
!   template<class T> struct pointer_traits<T*>;
! 
!   void* align(size_t alignment, size_t size, void*& ptr, size_t& space) noexcept;
! 
!   struct allocator_arg_t;
!   extern const allocator_arg_t allocator_arg;
! 
!   template<class T, class Alloc> struct uses_allocator;
! 
!   template<class Alloc> struct allocator_traits;
! #endif // C++11
! 
! #if __STDC_HOSTED__
    //  lib.default.allocator, the default allocator:
    template <class T> class allocator;
+ #if __cplusplus >= 202002L
+   template <class T, class U>
+   constexpr bool operator==(const allocator<T>&, const allocator<U>&) throw();
+ #else
    template <> class allocator<void>;
    template <class T, class U>
    bool operator==(const allocator<T>&, const allocator<U>&) throw();
    template <class T, class U>
    bool operator!=(const allocator<T>&, const allocator<U>&) throw();
+ #endif
  
    //  lib.storage.iterator, raw storage iterator:
    template <class OutputIterator, class T> class raw_storage_iterator;
*************** namespace std {
*** 49,66 ****
--- 64,118 ----
    pair<T*,ptrdiff_t> get_temporary_buffer(ptrdiff_t n) NOTHROW;
    template <class T>
    void return_temporary_buffer(T* p);
+ #endif // HOSTED
  
    //  lib.specialized.algorithms, specialized algorithms:
+ #if __cplusplus >= 201703L
+   template <class T> constexpr T* addressof(T&) noexcept;
+ #elif __cplusplus >= 201402L
+   template <class T> T* addressof(T&) noexcept;
+ #endif
    template <class InputIterator, class ForwardIterator>
    ForwardIterator
    uninitialized_copy(InputIterator first, InputIterator last,
  		     ForwardIterator result);
+ #if __cplusplus >= 201103L
+   template <class InputIterator, class Size, class ForwardIterator>
+   ForwardIterator
+   uninitialized_copy_n(InputIterator first, Size n, ForwardIterator result);
+ #endif
    template <class ForwardIterator, class T>
    void uninitialized_fill(ForwardIterator first, ForwardIterator last,
  			  const T& x);
    template <class ForwardIterator, class Size, class T>
    void uninitialized_fill_n(ForwardIterator first, Size n, const T& x);
  
+ #if __cplusplus >= 201103L
+   template<class T> class default_delete;
+   template<class T> class default_delete<T[]>;
+   template<class T, class D> class unique_ptr;
+   template<class T, class D> class unique_ptr<T[], D>;
+   template<class T, class D>
+     void swap(unique_ptr<T, D>&, unique_ptr<T, D>&) noexcept;
+ #if __cplusplus >= 201402L
+   template<class T, class... Args> unique_ptr<T> make_unique(Args&&...);
+ #endif
+ 
+   class bad_weak_ptr;
+   template<class T> class shared_ptr;
+   template<class T, class... Args> shared_ptr<T> make_shared(Args&&... args);
+   template<class T, class A, class... Args>
+   shared_ptr<T> allocate_shared(const A& a, Args&&... args);
+   template<class T> void swap(shared_ptr<T>&, shared_ptr<T>&) noexcept;
+   template<class T> class weak_ptr;
+   template<class T> void swap(weak_ptr<T>&, weak_ptr<T>&) noexcept;
+   template<class T> class owner_less;
+   template<class T> class enable_shared_from_this;
+ 
+   template<class T, class D> struct hash<unique_ptr<T, D>>;
+   template<class T> struct hash<shared_ptr<T>>;
+ #endif
+ 
    //  lib.auto.ptr, pointers:
    template<class X> class auto_ptr;
  }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/20_util/integer_sequence/112473.cc gcc-12.4.0/libstdc++-v3/testsuite/20_util/integer_sequence/112473.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/20_util/integer_sequence/112473.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/20_util/integer_sequence/112473.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,8 ----
+ // { dg-do compile { target c++20 } }
+ 
+ // PR libstdc++/112473 - integer_sequence accepts non-integer types
+ 
+ #include <utility>
+ 
+ std::integer_sequence<std::pair<int, int>, std::pair<int, int>{0, 0}> ic;
+ // { dg-error "static assertion failed" "" { target *-*-* } 0 }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/20_util/integer_sequence/pr111357.cc gcc-12.4.0/libstdc++-v3/testsuite/20_util/integer_sequence/pr111357.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/20_util/integer_sequence/pr111357.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/20_util/integer_sequence/pr111357.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,34 ----
+ // { dg-do compile { target c++14 } }
+ 
+ // PR c++/111357 - __integer_pack fails to work with values of dependent type
+ // convertible to integers in noexcept context
+ 
+ #include <utility>
+ 
+ using std::integer_sequence;
+ using std::make_integer_sequence;
+ 
+ template<int... V>
+ void g(integer_sequence<int,V...>)
+ {}
+ 
+ template<typename ...T>
+ struct c1
+ {
+   static constexpr int value = 1;
+   constexpr operator int() { return value; }
+ };
+ 
+ template<typename T>
+ struct R
+ {
+   using S = make_integer_sequence<int,c1<T>{}>;
+ 
+   R() noexcept(noexcept(g(S()))) // { dg-bogus "argument to .__integer_pack." }
+   {}
+ };
+ 
+ int main()
+ {
+   R<int>();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/20_util/optional/relops/104606.cc gcc-12.4.0/libstdc++-v3/testsuite/20_util/optional/relops/104606.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/20_util/optional/relops/104606.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/20_util/optional/relops/104606.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,18 ----
+ // { dg-do compile { target c++17 } }
+ 
+ // Bug 104606 comparison operator resolution with std::optional and -std=c++20
+ 
+ #include <optional>
+ #include <variant>
+ #include <vector>
+ 
+ struct Value : std::variant<std::vector<Value>> { };
+ 
+ struct Comparator {
+   template <typename T> bool operator<=(const T &) { return true; }
+ };
+ 
+ std::optional<Value> o;
+ Comparator c;
+ 
+ auto x = c <= o;
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/20_util/pointer_traits/lwg3545.cc gcc-12.4.0/libstdc++-v3/testsuite/20_util/pointer_traits/lwg3545.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/20_util/pointer_traits/lwg3545.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/20_util/pointer_traits/lwg3545.cc	Thu Jun 20 08:08:10 2024
*************** static_assert( is_same<pointer<Ctraits>,
*** 99,101 ****
--- 99,118 ----
  static_assert( is_same<difference_type<Ctraits>, std::ptrdiff_t>::value, "" );
  static_assert( is_same<rebind<Ctraits>, clever_ptr<short>>::value, "" );
  static_assert( is_same<pointer_to<Ctraits>, clever_ptr<char>>::value, "" );
+ 
+ #ifdef __cpp_concepts
+ struct ptr_base { };
+ 
+ // Program-defined specialization must not be ambiguous with primary template.
+ template<typename P> requires std::derived_from<P, ptr_base>
+ struct std::pointer_traits<P>
+ {
+   using element_type = int;
+   using difference_type = long;
+   using pointer = P;
+ };
+ 
+ struct Ptr : ptr_base { using element_type = int; };
+ 
+ using E = std::pointer_traits<Ptr>::element_type;
+ #endif
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/20_util/ratio/requirements/type_constraints.cc gcc-12.4.0/libstdc++-v3/testsuite/20_util/ratio/requirements/type_constraints.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/20_util/ratio/requirements/type_constraints.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/20_util/ratio/requirements/type_constraints.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,34 ----
+ // { dg-do compile { target c++11 } }
+ 
+ // C++11 20.10.1 [ratio.general]
+ // if the template argument types R1 and R2 are not specializations of the
+ // ratio template, the program is ill-formed.
+ 
+ #include <ratio>
+ 
+ using namespace std;
+ 
+ // A type that looks like std::ratio but isn't.
+ template<int> struct Ratty { static constexpr int num = 1, den = 1; };
+ 
+ using T1 = ratio_add<Ratty<1>, Ratty<1>>::type; // { dg-error "here" }
+ using T2 = ratio_subtract<Ratty<3>, Ratty<3>>::type; // { dg-error "here" }
+ using T3 = ratio_multiply<Ratty<3>, Ratty<3>>::type; // { dg-error "here" }
+ using T4 = ratio_divide<Ratty<4>, Ratty<4>>::type; // { dg-error "here" }
+ using T5 = ratio_equal<Ratty<5>, Ratty<5>>::type; // { dg-error "here" }
+ using T6 = ratio_not_equal<Ratty<6>, Ratty<6>>::type; // { dg-error "here" }
+ using T7 = ratio_less<Ratty<7>, Ratty<7>>::type; // { dg-error "here" }
+ using T8 = ratio_less_equal<Ratty<8>, Ratty<8>>::type; // { dg-error "here" }
+ using T9 = ratio_greater<Ratty<9>, Ratty<9>>::type; // { dg-error "here" }
+ using T10 = ratio_greater_equal<Ratty<10>, Ratty<10>>::type; // { dg-error "here" }
+ 
+ #if __cplusplus >= 201703L
+ bool B11 = ratio_equal_v<Ratty<11>, Ratty<11>>; // { dg-error "here" "" { target c++17 } }
+ bool B12 = ratio_not_equal_v<Ratty<12>, Ratty<12>>; // { dg-error "here" "" { target c++17 } }
+ bool B13 = ratio_less_v<Ratty<13>, Ratty<13>>; // { dg-error "here" "" { target c++17 } }
+ bool B14 = ratio_less_equal_v<Ratty<14>, Ratty<14>>; // { dg-error "here" "" { target c++17 } }
+ bool B15 = ratio_greater_v<Ratty<15>, Ratty<15>>; // { dg-error "here" "" { target c++17 } }
+ bool B16 = ratio_greater_equal_v<Ratty<16>, Ratty<16>>; // { dg-error "here" "" { target c++17 } }
+ #endif
+ 
+ // { dg-error "static assertion failed" "" { target *-*-* } 0 }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/20_util/scoped_allocator/noexcept.cc gcc-12.4.0/libstdc++-v3/testsuite/20_util/scoped_allocator/noexcept.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/20_util/scoped_allocator/noexcept.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/20_util/scoped_allocator/noexcept.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,47 ----
+ // { dg-do compile { target c++11 } }
+ 
+ #include <scoped_allocator>
+ 
+ template<typename T>
+ struct Alloc
+ {
+   using value_type = T;
+ 
+   Alloc() noexcept(false) { }
+   Alloc(const Alloc&) noexcept(false) { }
+   template<typename U> Alloc(const Alloc<U>&) noexcept { }
+ 
+   T* allocate(std::size_t);
+   void deallocate(T*, std::size_t);
+ 
+   bool operator==(const Alloc&) const noexcept(false) { return true; }
+   bool operator!=(const Alloc&) const noexcept(false) { return false; }
+ };
+ 
+ using A1 = std::allocator<int>;
+ using A2 = std::allocator<long>;
+ using Ax = Alloc<int>;
+ using SA1 = std::scoped_allocator_adaptor<A1, Ax>;
+ using SA2 = std::scoped_allocator_adaptor<A2, Ax>;
+ static_assert( std::is_default_constructible<SA1>::value
+ 		 && ! std::is_nothrow_default_constructible<SA1>::value,
+ 	       "default constructor is potentially-throwing" );
+ static_assert( std::is_nothrow_constructible<SA1, A1, Ax>::value,
+ 	       "multi-arg constructor is non-throwing" );
+ static_assert( std::is_nothrow_copy_constructible<SA1>::value,
+ 	       "copy constructor is non-throwing" );
+ static_assert( std::is_nothrow_move_constructible<SA1>::value,
+ 	       "move constructor is non-throwing" );
+ static_assert( std::is_nothrow_constructible<SA1, const SA2&>::value,
+ 	       "converting copy constructor is non-throwing" );
+ static_assert( std::is_nothrow_constructible<SA1, SA2>::value,
+ 	       "converting move constructor is non-throwing" );
+ 
+ static_assert( noexcept(std::declval<SA1&>().inner_allocator()),
+ 	       "inner_allocator() is non-throwing" );
+ static_assert( noexcept(std::declval<const SA1&>().inner_allocator()),
+ 	       "inner_allocator() const is non-throwing" );
+ static_assert( noexcept(std::declval<SA1&>().outer_allocator()),
+ 	       "outer_allocator() is non-throwing" );
+ static_assert( noexcept(std::declval<const SA1&>().outer_allocator()),
+ 	       "outer_allocator() const is non-throwing" );
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/20_util/shared_ptr/cons/void_neg.cc gcc-12.4.0/libstdc++-v3/testsuite/20_util/shared_ptr/cons/void_neg.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/20_util/shared_ptr/cons/void_neg.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/20_util/shared_ptr/cons/void_neg.cc	Thu Jun 20 08:08:10 2024
*************** void test01()
*** 30,32 ****
--- 30,34 ----
  using std::shared_ptr;
  using std::is_constructible;
  static_assert(!is_constructible<shared_ptr<void>, const void*>::value, "");
+ 
+ // { dg-prune-output "invalid application of 'sizeof' to a void type" }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/20_util/to_chars/long_double.cc gcc-12.4.0/libstdc++-v3/testsuite/20_util/to_chars/long_double.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/20_util/to_chars/long_double.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/20_util/to_chars/long_double.cc	Thu Jun 20 08:08:10 2024
***************
*** 34,39 ****
--- 34,43 ----
  // more portable and robust to differences in system printf behavior.
  // { dg-xfail-run-if "Non-conforming printf (see PR98384)" { *-*-solaris* *-*-darwin* } }
  
+ // On systems that use double-precision from_chars for long double,
+ // this is expected to fail.
+ // { dg-xfail-run-if "from_chars limited to double-precision" { aarch64-*-vxworks* i*86-*-vxworks* x86_64-*-vxworks* } }
+ 
  // { dg-require-effective-target ieee_floats }
  // { dg-require-effective-target size32plus }
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/20_util/tuple/cons/114147.cc gcc-12.4.0/libstdc++-v3/testsuite/20_util/tuple/cons/114147.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/20_util/tuple/cons/114147.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/20_util/tuple/cons/114147.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,15 ----
+ // { dg-do compile { target c++11 } }
+ 
+ // PR libstdc++/114147
+ // tuple allocator-extended ctor requires non-explicit default ctor
+ 
+ #include <tuple>
+ #include <memory>
+ 
+ struct X { explicit X(); };
+ 
+ std::allocator<int> a;
+ std::tuple<X> t0(std::allocator_arg, a);
+ std::tuple<int, X> t1(std::allocator_arg, a);
+ std::tuple<X, int> t2(std::allocator_arg, a);
+ std::tuple<int, X, int> t3(std::allocator_arg, a);
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/20_util/unique_ptr/creation/for_overwrite.cc gcc-12.4.0/libstdc++-v3/testsuite/20_util/unique_ptr/creation/for_overwrite.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/20_util/unique_ptr/creation/for_overwrite.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/20_util/unique_ptr/creation/for_overwrite.cc	Thu Jun 20 08:08:10 2024
*************** void* operator new(std::size_t n)
*** 40,47 ****
    return p;
  }
  
! void operator delete(void* p) { std::free(p); }
! void operator delete(void* p, std::size_t) { std::free(p); }
  
  void
  test01()
--- 40,47 ----
    return p;
  }
  
! void operator delete(void* p) noexcept { std::free(p); }
! void operator delete(void* p, std::size_t) noexcept { std::free(p); }
  
  void
  test01()
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/resize_and_overwrite.cc gcc-12.4.0/libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/resize_and_overwrite.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/resize_and_overwrite.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/resize_and_overwrite.cc	Thu Jun 20 08:08:10 2024
*************** test03()
*** 84,92 ****
    VERIFY( s == std::string(42, 'a') );
    VERIFY( s[42] == '\0' );
  
!   s.resize_and_overwrite(0, [](auto&& p, auto&& n) {
!     static_assert( std::is_same_v<decltype(p), char*&> );
!     static_assert( std::is_same_v<decltype(n), std::string::size_type&> );
      return 0;
    });
  }
--- 84,94 ----
    VERIFY( s == std::string(42, 'a') );
    VERIFY( s[42] == '\0' );
  
!   s.resize_and_overwrite(0, [](auto p, auto n) {
!     // N.B. these requirements were relaxed by LWG 3645:
!     // resize_and_overwrite is overspecified to call its callback with lvalues
!     static_assert( std::is_same_v<decltype(p), char*> );
!     static_assert( std::is_same_v<decltype(n), std::string::size_type> );
      return 0;
    });
  }
*************** test05()
*** 118,123 ****
--- 120,145 ----
    return true;
  }
  
+ void
+ test06()
+ {
+   std::string s = "0123456789";
+   s.resize_and_overwrite(16, [](char* p, int n) {
+     VERIFY( n == 16 );
+     std::char_traits<char>::copy(p + 10, "0123456798", 6);
+     return n;
+   });
+   VERIFY( s.size() == 16 );
+   VERIFY( s == "0123456789012345" );
+ 
+   s.resize_and_overwrite(4, [](char* p, int n) {
+     VERIFY( n == 4 );
+     std::char_traits<char>::copy(p, "abcd", 4);
+     return n;
+   });
+   VERIFY( s.size() == 4 );
+ }
+ 
  int main()
  {
    test01();
*************** int main()
*** 125,128 ****
--- 147,151 ----
    test03();
    test04();
    static_assert( test05() );
+   test06();
  }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/21_strings/basic_string/cons/char/103919.cc gcc-12.4.0/libstdc++-v3/testsuite/21_strings/basic_string/cons/char/103919.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/21_strings/basic_string/cons/char/103919.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/21_strings/basic_string/cons/char/103919.cc	Thu Jun 20 08:08:10 2024
*************** void* operator new(std::size_t n)
*** 14,25 ****
    return std::malloc(n);
  }
  
! void operator delete(void* p)
  {
    std::free(p);
  }
  
! void operator delete(void* p, std::size_t)
  {
    std::free(p);
  }
--- 14,25 ----
    return std::malloc(n);
  }
  
! void operator delete(void* p) noexcept
  {
    std::free(p);
  }
  
! void operator delete(void* p, std::size_t) noexcept
  {
    std::free(p);
  }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/range_c++20.cc gcc-12.4.0/libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/range_c++20.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/range_c++20.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/range_c++20.cc	Thu Jun 20 08:08:10 2024
*************** test02()
*** 116,138 ****
    static_assert( ! std::is_constructible_v<std::string_view, V1> );
  
    using V2 = std::basic_string_view<char, __gnu_cxx::char_traits<char>>;
!   // V2::traits_type is not the right type
!   static_assert( ! std::is_constructible_v<std::string_view, V2> );
! 
!   struct V3 : V2
!   {
!   private:
!     using V2::traits_type;
!   };
!   // V3::traits_type is not a valid (accessible) type
!   static_assert( std::is_constructible_v<std::string_view, V3> );
! 
!   struct V4 : V2
!   {
!     using traits_type = std::string_view::traits_type;
!   };
!   // V4::traits_type is the right type
!   static_assert( std::is_constructible_v<std::string_view, V4> );
  }
  
  void
--- 116,125 ----
    static_assert( ! std::is_constructible_v<std::string_view, V1> );
  
    using V2 = std::basic_string_view<char, __gnu_cxx::char_traits<char>>;
!   // LWG 3857
!   // basic_string_view should allow explicit conversion when only traits vary
!   static_assert( std::is_constructible_v<std::string_view, V2> );
!   static_assert( ! std::is_convertible_v<V2, std::string_view> );
  }
  
  void
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/range_c++20.cc gcc-12.4.0/libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/range_c++20.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/range_c++20.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/range_c++20.cc	Thu Jun 20 08:08:10 2024
*************** test02()
*** 116,138 ****
    static_assert( ! std::is_constructible_v<std::wstring_view, V1> );
  
    using V2 = std::basic_string_view<wchar_t, __gnu_cxx::char_traits<wchar_t>>;
!   // V2::traits_type is not the right type
!   static_assert( ! std::is_constructible_v<std::wstring_view, V2> );
! 
!   struct V3 : V2
!   {
!   private:
!     using V2::traits_type;
!   };
!   // V3::traits_type is not a valid (accessible) type
!   static_assert( std::is_constructible_v<std::wstring_view, V3> );
! 
!   struct V4 : V2
!   {
!     using traits_type = std::wstring_view::traits_type;
!   };
!   // V4::traits_type is the right type
!   static_assert( std::is_constructible_v<std::wstring_view, V4> );
  }
  
  void
--- 116,125 ----
    static_assert( ! std::is_constructible_v<std::wstring_view, V1> );
  
    using V2 = std::basic_string_view<wchar_t, __gnu_cxx::char_traits<wchar_t>>;
!   // LWG 3857
!   // basic_string_view should allow explicit conversion when only traits vary
!   static_assert( std::is_constructible_v<std::wstring_view, V2> );
!   static_assert( ! std::is_convertible_v<V2, std::wstring_view> );
  }
  
  void
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_prefix/debug.cc gcc-12.4.0/libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_prefix/debug.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_prefix/debug.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_prefix/debug.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,14 ----
+ // { dg-do compile { target c++17 } }
+ 
+ #include <string_view>
+ 
+ constexpr bool
+ check_remove_prefix()
+ {
+   std::string_view sv("123");
+   sv.remove_prefix(4);
+   // { dg-error "not a constant expression" "" { target *-*-* } 0 }
+   return true;
+ }
+ 
+ constexpr bool test = check_remove_prefix();
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_suffix/debug.cc gcc-12.4.0/libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_suffix/debug.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_suffix/debug.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_suffix/debug.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,14 ----
+ // { dg-do compile { target c++17 } }
+ 
+ #include <string_view>
+ 
+ constexpr bool
+ check_remove_suffix()
+ {
+   std::string_view sv("123");
+   sv.remove_suffix(4);
+   // { dg-error "not a constant expression" "" { target *-*-* } 0 }
+   return true;
+ }
+ 
+ constexpr bool test = check_remove_suffix();
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/21_strings/basic_string_view/typedefs.cc gcc-12.4.0/libstdc++-v3/testsuite/21_strings/basic_string_view/typedefs.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/21_strings/basic_string_view/typedefs.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/21_strings/basic_string_view/typedefs.cc	Thu Jun 20 08:08:10 2024
*************** using check2_t = std::string_view;
*** 28,36 ****
  using check3_t = std::u8string_view;
  #endif
  
- #ifdef _GLIBCXX_USE_C99_STDINT_TR1
  using check4_t = std::u16string_view;
  using check5_t = std::u32string_view;
- #endif
  
  using check6_t = std::wstring_view;
--- 28,34 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/21_strings/char_traits/requirements/113200.cc gcc-12.4.0/libstdc++-v3/testsuite/21_strings/char_traits/requirements/113200.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/21_strings/char_traits/requirements/113200.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/21_strings/char_traits/requirements/113200.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,20 ----
+ // { dg-do compile { target c++20 } }
+ 
+ // PR libstdc++/113200
+ // char_traits::move is not constexpr when the argument is a string literal
+ 
+ #include <string_view>
+ 
+ template<std::size_t N> struct S
+ {
+   char data_[ N ];
+ 
+   constexpr S( char const* p ): data_{}
+   {
+     std::char_traits<char>::move( data_, p, N );
+   }
+ };
+ 
+ template<std::size_t N> S( char const(&)[N] ) -> S<N>;
+ 
+ constexpr S s( "test" );
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/22_locale/codecvt/codecvt_unicode.cc gcc-12.4.0/libstdc++-v3/testsuite/22_locale/codecvt/codecvt_unicode.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/22_locale/codecvt/codecvt_unicode.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/22_locale/codecvt/codecvt_unicode.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,68 ----
+ // Copyright (C) 2020-2023 Free Software Foundation, Inc.
+ //
+ // This file is part of the GNU ISO C++ Library.  This library is free
+ // software; you can redistribute it and/or modify it under the
+ // terms of the GNU General Public License as published by the
+ // Free Software Foundation; either version 3, or (at your option)
+ // any later version.
+ 
+ // This library is distributed in the hope that it will be useful,
+ // but WITHOUT ANY WARRANTY; without even the implied warranty of
+ // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ // GNU General Public License for more details.
+ 
+ // You should have received a copy of the GNU General Public License along
+ // with this library; see the file COPYING3.  If not see
+ // <http://www.gnu.org/licenses/>.
+ 
+ // { dg-do run { target c++11 } }
+ 
+ #include "codecvt_unicode.h"
+ 
+ #include <codecvt>
+ 
+ using namespace std;
+ 
+ void
+ test_utf8_utf32_codecvts ()
+ {
+   using codecvt_c32 = codecvt<char32_t, char, mbstate_t>;
+   auto loc_c = locale::classic ();
+   VERIFY (has_facet<codecvt_c32> (loc_c));
+   auto &cvt = use_facet<codecvt_c32> (loc_c);
+   test_utf8_utf32_codecvts (cvt);
+ 
+   auto cvt_ptr = to_unique_ptr (new codecvt_utf8<char32_t> ());
+   test_utf8_utf32_codecvts (*cvt_ptr);
+ }
+ 
+ void
+ test_utf8_utf16_codecvts ()
+ {
+   using codecvt_c16 = codecvt<char16_t, char, mbstate_t>;
+   auto loc_c = locale::classic ();
+   VERIFY (has_facet<codecvt_c16> (loc_c));
+   auto &cvt = use_facet<codecvt_c16> (loc_c);
+   test_utf8_utf16_cvts (cvt);
+ 
+   auto cvt_ptr = to_unique_ptr (new codecvt_utf8_utf16<char16_t> ());
+   test_utf8_utf16_cvts (*cvt_ptr);
+ 
+   auto cvt_ptr2 = to_unique_ptr (new codecvt_utf8_utf16<char32_t> ());
+   test_utf8_utf16_cvts (*cvt_ptr2);
+ }
+ 
+ void
+ test_utf8_ucs2_codecvts ()
+ {
+   auto cvt_ptr = to_unique_ptr (new codecvt_utf8<char16_t> ());
+   test_utf8_ucs2_cvts (*cvt_ptr);
+ }
+ 
+ int
+ main ()
+ {
+   test_utf8_utf32_codecvts ();
+   test_utf8_utf16_codecvts ();
+   test_utf8_ucs2_codecvts ();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/22_locale/codecvt/codecvt_unicode.h gcc-12.4.0/libstdc++-v3/testsuite/22_locale/codecvt/codecvt_unicode.h
*** gcc-12.3.0/libstdc++-v3/testsuite/22_locale/codecvt/codecvt_unicode.h	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/22_locale/codecvt/codecvt_unicode.h	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,1269 ----
+ // Copyright (C) 2020-2023 Free Software Foundation, Inc.
+ //
+ // This file is part of the GNU ISO C++ Library.  This library is free
+ // software; you can redistribute it and/or modify it under the
+ // terms of the GNU General Public License as published by the
+ // Free Software Foundation; either version 3, or (at your option)
+ // any later version.
+ 
+ // This library is distributed in the hope that it will be useful,
+ // but WITHOUT ANY WARRANTY; without even the implied warranty of
+ // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ // GNU General Public License for more details.
+ 
+ // You should have received a copy of the GNU General Public License along
+ // with this library; see the file COPYING3.  If not see
+ // <http://www.gnu.org/licenses/>.
+ 
+ #include <locale>
+ #include <string>
+ #include <memory>
+ #include <testsuite_hooks.h>
+ 
+ template <typename T>
+ std::unique_ptr<T>
+ to_unique_ptr (T *ptr)
+ {
+   return std::unique_ptr<T> (ptr);
+ }
+ 
+ struct test_offsets_ok
+ {
+   size_t in_size, out_size;
+ };
+ struct test_offsets_partial
+ {
+   size_t in_size, out_size, expected_in_next, expected_out_next;
+ };
+ 
+ template <class CharT> struct test_offsets_error
+ {
+   size_t in_size, out_size, expected_in_next, expected_out_next;
+   CharT replace_char;
+   size_t replace_pos;
+ };
+ 
+ template <class T, size_t N>
+ auto constexpr array_size (const T (&)[N]) -> size_t
+ {
+   return N;
+ }
+ 
+ template <class CharT>
+ void
+ utf8_to_utf32_in_ok (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   using namespace std;
+   // UTF-8 string of 1-byte CP, 2-byte CP, 3-byte CP and 4-byte CP
+   const char in[] = "bш\uAAAA\U0010AAAA";
+   const char32_t exp_literal[] = U"bш\uAAAA\U0010AAAA";
+   CharT exp[array_size (exp_literal)] = {};
+   std::copy (begin (exp_literal), end (exp_literal), begin (exp));
+ 
+   static_assert (array_size (in) == 11, "");
+   static_assert (array_size (exp_literal) == 5, "");
+   static_assert (array_size (exp) == 5, "");
+   VERIFY (char_traits<char>::length (in) == 10);
+   VERIFY (char_traits<char32_t>::length (exp_literal) == 4);
+   VERIFY (char_traits<CharT>::length (exp) == 4);
+ 
+   test_offsets_ok offsets[] = {{0, 0}, {1, 1}, {3, 2}, {6, 3}, {10, 4}};
+   for (auto t : offsets)
+     {
+       CharT out[array_size (exp) - 1] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       auto state = mbstate_t{};
+       auto in_next = (const char *) nullptr;
+       auto out_next = (CharT *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res = cvt.in (state, in, in + t.in_size, in_next, out, out + t.out_size,
+ 		    out_next);
+       VERIFY (res == cvt.ok);
+       VERIFY (in_next == in + t.in_size);
+       VERIFY (out_next == out + t.out_size);
+       VERIFY (char_traits<CharT>::compare (out, exp, t.out_size) == 0);
+       if (t.out_size < array_size (out))
+ 	VERIFY (out[t.out_size] == 0);
+     }
+ 
+   for (auto t : offsets)
+     {
+       CharT out[array_size (exp)] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       auto state = mbstate_t{};
+       auto in_next = (const char *) nullptr;
+       auto out_next = (CharT *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res
+ 	= cvt.in (state, in, in + t.in_size, in_next, out, end (out), out_next);
+       VERIFY (res == cvt.ok);
+       VERIFY (in_next == in + t.in_size);
+       VERIFY (out_next == out + t.out_size);
+       VERIFY (char_traits<CharT>::compare (out, exp, t.out_size) == 0);
+       if (t.out_size < array_size (out))
+ 	VERIFY (out[t.out_size] == 0);
+     }
+ }
+ 
+ template <class CharT>
+ void
+ utf8_to_utf32_in_partial (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   using namespace std;
+   // UTF-8 string of 1-byte CP, 2-byte CP, 3-byte CP and 4-byte CP
+   const char in[] = "bш\uAAAA\U0010AAAA";
+   const char32_t exp_literal[] = U"bш\uAAAA\U0010AAAA";
+   CharT exp[array_size (exp_literal)] = {};
+   std::copy (begin (exp_literal), end (exp_literal), begin (exp));
+ 
+   static_assert (array_size (in) == 11, "");
+   static_assert (array_size (exp_literal) == 5, "");
+   static_assert (array_size (exp) == 5, "");
+   VERIFY (char_traits<char>::length (in) == 10);
+   VERIFY (char_traits<char32_t>::length (exp_literal) == 4);
+   VERIFY (char_traits<CharT>::length (exp) == 4);
+ 
+   test_offsets_partial offsets[] = {
+     {1, 0, 0, 0}, // no space for first CP
+ 
+     {3, 1, 1, 1}, // no space for second CP
+     {2, 2, 1, 1}, // incomplete second CP
+     {2, 1, 1, 1}, // incomplete second CP, and no space for it
+ 
+     {6, 2, 3, 2}, // no space for third CP
+     {4, 3, 3, 2}, // incomplete third CP
+     {5, 3, 3, 2}, // incomplete third CP
+     {4, 2, 3, 2}, // incomplete third CP, and no space for it
+     {5, 2, 3, 2}, // incomplete third CP, and no space for it
+ 
+     {10, 3, 6, 3}, // no space for fourth CP
+     {7, 4, 6, 3},  // incomplete fourth CP
+     {8, 4, 6, 3},  // incomplete fourth CP
+     {9, 4, 6, 3},  // incomplete fourth CP
+     {7, 3, 6, 3},  // incomplete fourth CP, and no space for it
+     {8, 3, 6, 3},  // incomplete fourth CP, and no space for it
+     {9, 3, 6, 3},  // incomplete fourth CP, and no space for it
+   };
+ 
+   for (auto t : offsets)
+     {
+       CharT out[array_size (exp) - 1] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       VERIFY (t.expected_in_next <= t.in_size);
+       VERIFY (t.expected_out_next <= t.out_size);
+       auto state = mbstate_t{};
+       auto in_next = (const char *) nullptr;
+       auto out_next = (CharT *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res = cvt.in (state, in, in + t.in_size, in_next, out, out + t.out_size,
+ 		    out_next);
+       VERIFY (res == cvt.partial);
+       VERIFY (in_next == in + t.expected_in_next);
+       VERIFY (out_next == out + t.expected_out_next);
+       VERIFY (char_traits<CharT>::compare (out, exp, t.expected_out_next) == 0);
+       if (t.expected_out_next < array_size (out))
+ 	VERIFY (out[t.expected_out_next] == 0);
+     }
+ }
+ 
+ template <class CharT>
+ void
+ utf8_to_utf32_in_error (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   using namespace std;
+   // UTF-8 string of 1-byte CP, 2-byte CP, 3-byte CP and 4-byte CP
+   const char valid_in[] = "bш\uAAAA\U0010AAAA";
+   const char32_t exp_literal[] = U"bш\uAAAA\U0010AAAA";
+   CharT exp[array_size (exp_literal)] = {};
+   std::copy (begin (exp_literal), end (exp_literal), begin (exp));
+ 
+   static_assert (array_size (valid_in) == 11, "");
+   static_assert (array_size (exp_literal) == 5, "");
+   static_assert (array_size (exp) == 5, "");
+   VERIFY (char_traits<char>::length (valid_in) == 10);
+   VERIFY (char_traits<char32_t>::length (exp_literal) == 4);
+   VERIFY (char_traits<CharT>::length (exp) == 4);
+ 
+   test_offsets_error<char> offsets[] = {
+ 
+     // replace leading byte with invalid byte
+     {1, 4, 0, 0, '\xFF', 0},
+     {3, 4, 1, 1, '\xFF', 1},
+     {6, 4, 3, 2, '\xFF', 3},
+     {10, 4, 6, 3, '\xFF', 6},
+ 
+     // replace first trailing byte with ASCII byte
+     {3, 4, 1, 1, 'z', 2},
+     {6, 4, 3, 2, 'z', 4},
+     {10, 4, 6, 3, 'z', 7},
+ 
+     // replace first trailing byte with invalid byte
+     {3, 4, 1, 1, '\xFF', 2},
+     {6, 4, 3, 2, '\xFF', 4},
+     {10, 4, 6, 3, '\xFF', 7},
+ 
+     // replace second trailing byte with ASCII byte
+     {6, 4, 3, 2, 'z', 5},
+     {10, 4, 6, 3, 'z', 8},
+ 
+     // replace second trailing byte with invalid byte
+     {6, 4, 3, 2, '\xFF', 5},
+     {10, 4, 6, 3, '\xFF', 8},
+ 
+     // replace third trailing byte
+     {10, 4, 6, 3, 'z', 9},
+     {10, 4, 6, 3, '\xFF', 9},
+ 
+     // replace first trailing byte with ASCII byte, also incomplete at end
+     {5, 4, 3, 2, 'z', 4},
+     {8, 4, 6, 3, 'z', 7},
+     {9, 4, 6, 3, 'z', 7},
+ 
+     // replace first trailing byte with invalid byte, also incomplete at end
+     {5, 4, 3, 2, '\xFF', 4},
+     {8, 4, 6, 3, '\xFF', 7},
+     {9, 4, 6, 3, '\xFF', 7},
+ 
+     // replace second trailing byte with ASCII byte, also incomplete at end
+     {9, 4, 6, 3, 'z', 8},
+ 
+     // replace second trailing byte with invalid byte, also incomplete at end
+     {9, 4, 6, 3, '\xFF', 8},
+   };
+   for (auto t : offsets)
+     {
+       char in[array_size (valid_in)] = {};
+       CharT out[array_size (exp) - 1] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       VERIFY (t.expected_in_next <= t.in_size);
+       VERIFY (t.expected_out_next <= t.out_size);
+       char_traits<char>::copy (in, valid_in, array_size (valid_in));
+       in[t.replace_pos] = t.replace_char;
+ 
+       auto state = mbstate_t{};
+       auto in_next = (const char *) nullptr;
+       auto out_next = (CharT *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res = cvt.in (state, in, in + t.in_size, in_next, out, out + t.out_size,
+ 		    out_next);
+       VERIFY (res == cvt.error);
+       VERIFY (in_next == in + t.expected_in_next);
+       VERIFY (out_next == out + t.expected_out_next);
+       VERIFY (char_traits<CharT>::compare (out, exp, t.expected_out_next) == 0);
+       if (t.expected_out_next < array_size (out))
+ 	VERIFY (out[t.expected_out_next] == 0);
+     }
+ }
+ 
+ template <class CharT>
+ void
+ utf8_to_utf32_in (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   utf8_to_utf32_in_ok (cvt);
+   utf8_to_utf32_in_partial (cvt);
+   utf8_to_utf32_in_error (cvt);
+ }
+ 
+ template <class CharT>
+ void
+ utf32_to_utf8_out_ok (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   using namespace std;
+   // UTF-8 string of 1-byte CP, 2-byte CP, 3-byte CP and 4-byte CP
+   const char32_t in_literal[] = U"bш\uAAAA\U0010AAAA";
+   const char exp[] = "bш\uAAAA\U0010AAAA";
+   CharT in[array_size (in_literal)] = {};
+   copy (begin (in_literal), end (in_literal), begin (in));
+ 
+   static_assert (array_size (in_literal) == 5, "");
+   static_assert (array_size (in) == 5, "");
+   static_assert (array_size (exp) == 11, "");
+   VERIFY (char_traits<char32_t>::length (in_literal) == 4);
+   VERIFY (char_traits<CharT>::length (in) == 4);
+   VERIFY (char_traits<char>::length (exp) == 10);
+ 
+   const test_offsets_ok offsets[] = {{0, 0}, {1, 1}, {2, 3}, {3, 6}, {4, 10}};
+   for (auto t : offsets)
+     {
+       char out[array_size (exp) - 1] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       auto state = mbstate_t{};
+       auto in_next = (const CharT *) nullptr;
+       auto out_next = (char *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res = cvt.out (state, in, in + t.in_size, in_next, out, out + t.out_size,
+ 		     out_next);
+       VERIFY (res == cvt.ok);
+       VERIFY (in_next == in + t.in_size);
+       VERIFY (out_next == out + t.out_size);
+       VERIFY (char_traits<char>::compare (out, exp, t.out_size) == 0);
+       if (t.out_size < array_size (out))
+ 	VERIFY (out[t.out_size] == 0);
+     }
+ }
+ 
+ template <class CharT>
+ void
+ utf32_to_utf8_out_partial (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   using namespace std;
+   // UTF-8 string of 1-byte CP, 2-byte CP, 3-byte CP and 4-byte CP
+   const char32_t in_literal[] = U"bш\uAAAA\U0010AAAA";
+   const char exp[] = "bш\uAAAA\U0010AAAA";
+   CharT in[array_size (in_literal)] = {};
+   copy (begin (in_literal), end (in_literal), begin (in));
+ 
+   static_assert (array_size (in_literal) == 5, "");
+   static_assert (array_size (in) == 5, "");
+   static_assert (array_size (exp) == 11, "");
+   VERIFY (char_traits<char32_t>::length (in_literal) == 4);
+   VERIFY (char_traits<CharT>::length (in) == 4);
+   VERIFY (char_traits<char>::length (exp) == 10);
+ 
+   const test_offsets_partial offsets[] = {
+     {1, 0, 0, 0}, // no space for first CP
+ 
+     {2, 1, 1, 1}, // no space for second CP
+     {2, 2, 1, 1}, // no space for second CP
+ 
+     {3, 3, 2, 3}, // no space for third CP
+     {3, 4, 2, 3}, // no space for third CP
+     {3, 5, 2, 3}, // no space for third CP
+ 
+     {4, 6, 3, 6}, // no space for fourth CP
+     {4, 7, 3, 6}, // no space for fourth CP
+     {4, 8, 3, 6}, // no space for fourth CP
+     {4, 9, 3, 6}, // no space for fourth CP
+   };
+   for (auto t : offsets)
+     {
+       char out[array_size (exp) - 1] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       VERIFY (t.expected_in_next <= t.in_size);
+       VERIFY (t.expected_out_next <= t.out_size);
+       auto state = mbstate_t{};
+       auto in_next = (const CharT *) nullptr;
+       auto out_next = (char *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res = cvt.out (state, in, in + t.in_size, in_next, out, out + t.out_size,
+ 		     out_next);
+       VERIFY (res == cvt.partial);
+       VERIFY (in_next == in + t.expected_in_next);
+       VERIFY (out_next == out + t.expected_out_next);
+       VERIFY (char_traits<char>::compare (out, exp, t.expected_out_next) == 0);
+       if (t.expected_out_next < array_size (out))
+ 	VERIFY (out[t.expected_out_next] == 0);
+     }
+ }
+ 
+ template <class CharT>
+ void
+ utf32_to_utf8_out_error (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   using namespace std;
+   const char32_t valid_in[] = U"bш\uAAAA\U0010AAAA";
+   const char exp[] = "bш\uAAAA\U0010AAAA";
+ 
+   static_assert (array_size (valid_in) == 5, "");
+   static_assert (array_size (exp) == 11, "");
+   VERIFY (char_traits<char32_t>::length (valid_in) == 4);
+   VERIFY (char_traits<char>::length (exp) == 10);
+ 
+   test_offsets_error<CharT> offsets[] = {{4, 10, 0, 0, 0x00110000, 0},
+ 					 {4, 10, 1, 1, 0x00110000, 1},
+ 					 {4, 10, 2, 3, 0x00110000, 2},
+ 					 {4, 10, 3, 6, 0x00110000, 3}};
+ 
+   for (auto t : offsets)
+     {
+       CharT in[array_size (valid_in)] = {};
+       char out[array_size (exp) - 1] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       VERIFY (t.expected_in_next <= t.in_size);
+       VERIFY (t.expected_out_next <= t.out_size);
+       copy (begin (valid_in), end (valid_in), begin (in));
+       in[t.replace_pos] = t.replace_char;
+ 
+       auto state = mbstate_t{};
+       auto in_next = (const CharT *) nullptr;
+       auto out_next = (char *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res = cvt.out (state, in, in + t.in_size, in_next, out, out + t.out_size,
+ 		     out_next);
+       VERIFY (res == cvt.error);
+       VERIFY (in_next == in + t.expected_in_next);
+       VERIFY (out_next == out + t.expected_out_next);
+       VERIFY (char_traits<char>::compare (out, exp, t.expected_out_next) == 0);
+       if (t.expected_out_next < array_size (out))
+ 	VERIFY (out[t.expected_out_next] == 0);
+     }
+ }
+ 
+ template <class CharT>
+ void
+ utf32_to_utf8_out (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   utf32_to_utf8_out_ok (cvt);
+   utf32_to_utf8_out_partial (cvt);
+   utf32_to_utf8_out_error (cvt);
+ }
+ 
+ template <class CharT>
+ void
+ test_utf8_utf32_codecvts (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   utf8_to_utf32_in (cvt);
+   utf32_to_utf8_out (cvt);
+ }
+ 
+ template <class CharT>
+ void
+ utf8_to_utf16_in_ok (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   using namespace std;
+   // UTF-8 string of 1-byte CP, 2-byte CP, 3-byte CP and 4-byte CP
+   const char in[] = "bш\uAAAA\U0010AAAA";
+   const char16_t exp_literal[] = u"bш\uAAAA\U0010AAAA";
+   CharT exp[array_size (exp_literal)] = {};
+   copy (begin (exp_literal), end (exp_literal), begin (exp));
+ 
+   static_assert (array_size (in) == 11, "");
+   static_assert (array_size (exp_literal) == 6, "");
+   static_assert (array_size (exp) == 6, "");
+   VERIFY (char_traits<char>::length (in) == 10);
+   VERIFY (char_traits<char16_t>::length (exp_literal) == 5);
+   VERIFY (char_traits<CharT>::length (exp) == 5);
+ 
+   test_offsets_ok offsets[] = {{0, 0}, {1, 1}, {3, 2}, {6, 3}, {10, 5}};
+   for (auto t : offsets)
+     {
+       CharT out[array_size (exp) - 1] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       auto state = mbstate_t{};
+       auto in_next = (const char *) nullptr;
+       auto out_next = (CharT *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res = cvt.in (state, in, in + t.in_size, in_next, out, out + t.out_size,
+ 		    out_next);
+       VERIFY (res == cvt.ok);
+       VERIFY (in_next == in + t.in_size);
+       VERIFY (out_next == out + t.out_size);
+       VERIFY (char_traits<CharT>::compare (out, exp, t.out_size) == 0);
+       if (t.out_size < array_size (out))
+ 	VERIFY (out[t.out_size] == 0);
+     }
+ 
+   for (auto t : offsets)
+     {
+       CharT out[array_size (exp)] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       auto state = mbstate_t{};
+       auto in_next = (const char *) nullptr;
+       auto out_next = (CharT *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res
+ 	= cvt.in (state, in, in + t.in_size, in_next, out, end (out), out_next);
+       VERIFY (res == cvt.ok);
+       VERIFY (in_next == in + t.in_size);
+       VERIFY (out_next == out + t.out_size);
+       VERIFY (char_traits<CharT>::compare (out, exp, t.out_size) == 0);
+       if (t.out_size < array_size (out))
+ 	VERIFY (out[t.out_size] == 0);
+     }
+ }
+ 
+ template <class CharT>
+ void
+ utf8_to_utf16_in_partial (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   using namespace std;
+   // UTF-8 string of 1-byte CP, 2-byte CP, 3-byte CP and 4-byte CP
+   const char in[] = "bш\uAAAA\U0010AAAA";
+   const char16_t exp_literal[] = u"bш\uAAAA\U0010AAAA";
+   CharT exp[array_size (exp_literal)] = {};
+   copy (begin (exp_literal), end (exp_literal), begin (exp));
+ 
+   static_assert (array_size (in) == 11, "");
+   static_assert (array_size (exp_literal) == 6, "");
+   static_assert (array_size (exp) == 6, "");
+   VERIFY (char_traits<char>::length (in) == 10);
+   VERIFY (char_traits<char16_t>::length (exp_literal) == 5);
+   VERIFY (char_traits<CharT>::length (exp) == 5);
+ 
+   test_offsets_partial offsets[] = {
+     {1, 0, 0, 0}, // no space for first CP
+ 
+     {3, 1, 1, 1}, // no space for second CP
+     {2, 2, 1, 1}, // incomplete second CP
+     {2, 1, 1, 1}, // incomplete second CP, and no space for it
+ 
+     {6, 2, 3, 2}, // no space for third CP
+     {4, 3, 3, 2}, // incomplete third CP
+     {5, 3, 3, 2}, // incomplete third CP
+     {4, 2, 3, 2}, // incomplete third CP, and no space for it
+     {5, 2, 3, 2}, // incomplete third CP, and no space for it
+ 
+     {10, 3, 6, 3}, // no space for fourth CP
+     {10, 4, 6, 3}, // no space for fourth CP
+     {7, 5, 6, 3},  // incomplete fourth CP
+     {8, 5, 6, 3},  // incomplete fourth CP
+     {9, 5, 6, 3},  // incomplete fourth CP
+     {7, 3, 6, 3},  // incomplete fourth CP, and no space for it
+     {8, 3, 6, 3},  // incomplete fourth CP, and no space for it
+     {9, 3, 6, 3},  // incomplete fourth CP, and no space for it
+     {7, 4, 6, 3},  // incomplete fourth CP, and no space for it
+     {8, 4, 6, 3},  // incomplete fourth CP, and no space for it
+     {9, 4, 6, 3},  // incomplete fourth CP, and no space for it
+ 
+   };
+ 
+   for (auto t : offsets)
+     {
+       CharT out[array_size (exp) - 1] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       VERIFY (t.expected_in_next <= t.in_size);
+       VERIFY (t.expected_out_next <= t.out_size);
+       auto state = mbstate_t{};
+       auto in_next = (const char *) nullptr;
+       auto out_next = (CharT *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res = cvt.in (state, in, in + t.in_size, in_next, out, out + t.out_size,
+ 		    out_next);
+       VERIFY (res == cvt.partial);
+       VERIFY (in_next == in + t.expected_in_next);
+       VERIFY (out_next == out + t.expected_out_next);
+       VERIFY (char_traits<CharT>::compare (out, exp, t.expected_out_next) == 0);
+       if (t.expected_out_next < array_size (out))
+ 	VERIFY (out[t.expected_out_next] == 0);
+     }
+ }
+ 
+ template <class CharT>
+ void
+ utf8_to_utf16_in_error (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   using namespace std;
+   const char valid_in[] = "bш\uAAAA\U0010AAAA";
+   const char16_t exp_literal[] = u"bш\uAAAA\U0010AAAA";
+   CharT exp[array_size (exp_literal)] = {};
+   copy (begin (exp_literal), end (exp_literal), begin (exp));
+ 
+   static_assert (array_size (valid_in) == 11, "");
+   static_assert (array_size (exp_literal) == 6, "");
+   static_assert (array_size (exp) == 6, "");
+   VERIFY (char_traits<char>::length (valid_in) == 10);
+   VERIFY (char_traits<char16_t>::length (exp_literal) == 5);
+   VERIFY (char_traits<CharT>::length (exp) == 5);
+ 
+   test_offsets_error<char> offsets[] = {
+ 
+     // replace leading byte with invalid byte
+     {1, 5, 0, 0, '\xFF', 0},
+     {3, 5, 1, 1, '\xFF', 1},
+     {6, 5, 3, 2, '\xFF', 3},
+     {10, 5, 6, 3, '\xFF', 6},
+ 
+     // replace first trailing byte with ASCII byte
+     {3, 5, 1, 1, 'z', 2},
+     {6, 5, 3, 2, 'z', 4},
+     {10, 5, 6, 3, 'z', 7},
+ 
+     // replace first trailing byte with invalid byte
+     {3, 5, 1, 1, '\xFF', 2},
+     {6, 5, 3, 2, '\xFF', 4},
+     {10, 5, 6, 3, '\xFF', 7},
+ 
+     // replace second trailing byte with ASCII byte
+     {6, 5, 3, 2, 'z', 5},
+     {10, 5, 6, 3, 'z', 8},
+ 
+     // replace second trailing byte with invalid byte
+     {6, 5, 3, 2, '\xFF', 5},
+     {10, 5, 6, 3, '\xFF', 8},
+ 
+     // replace third trailing byte
+     {10, 5, 6, 3, 'z', 9},
+     {10, 5, 6, 3, '\xFF', 9},
+ 
+     // replace first trailing byte with ASCII byte, also incomplete at end
+     {5, 5, 3, 2, 'z', 4},
+     {8, 5, 6, 3, 'z', 7},
+     {9, 5, 6, 3, 'z', 7},
+ 
+     // replace first trailing byte with invalid byte, also incomplete at end
+     {5, 5, 3, 2, '\xFF', 4},
+     {8, 5, 6, 3, '\xFF', 7},
+     {9, 5, 6, 3, '\xFF', 7},
+ 
+     // replace second trailing byte with ASCII byte, also incomplete at end
+     {9, 5, 6, 3, 'z', 8},
+ 
+     // replace second trailing byte with invalid byte, also incomplete at end
+     {9, 5, 6, 3, '\xFF', 8},
+   };
+   for (auto t : offsets)
+     {
+       char in[array_size (valid_in)] = {};
+       CharT out[array_size (exp) - 1] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       VERIFY (t.expected_in_next <= t.in_size);
+       VERIFY (t.expected_out_next <= t.out_size);
+       char_traits<char>::copy (in, valid_in, array_size (valid_in));
+       in[t.replace_pos] = t.replace_char;
+ 
+       auto state = mbstate_t{};
+       auto in_next = (const char *) nullptr;
+       auto out_next = (CharT *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res = cvt.in (state, in, in + t.in_size, in_next, out, out + t.out_size,
+ 		    out_next);
+       VERIFY (res == cvt.error);
+       VERIFY (in_next == in + t.expected_in_next);
+       VERIFY (out_next == out + t.expected_out_next);
+       VERIFY (char_traits<CharT>::compare (out, exp, t.expected_out_next) == 0);
+       if (t.expected_out_next < array_size (out))
+ 	VERIFY (out[t.expected_out_next] == 0);
+     }
+ }
+ 
+ template <class CharT>
+ void
+ utf8_to_utf16_in (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   utf8_to_utf16_in_ok (cvt);
+   utf8_to_utf16_in_partial (cvt);
+   utf8_to_utf16_in_error (cvt);
+ }
+ 
+ template <class CharT>
+ void
+ utf16_to_utf8_out_ok (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   using namespace std;
+   // UTF-8 string of 1-byte CP, 2-byte CP, 3-byte CP and 4-byte CP
+   const char16_t in_literal[] = u"bш\uAAAA\U0010AAAA";
+   const char exp[] = "bш\uAAAA\U0010AAAA";
+   CharT in[array_size (in_literal)];
+   copy (begin (in_literal), end (in_literal), begin (in));
+ 
+   static_assert (array_size (in_literal) == 6, "");
+   static_assert (array_size (exp) == 11, "");
+   static_assert (array_size (in) == 6, "");
+   VERIFY (char_traits<char16_t>::length (in_literal) == 5);
+   VERIFY (char_traits<char>::length (exp) == 10);
+   VERIFY (char_traits<CharT>::length (in) == 5);
+ 
+   const test_offsets_ok offsets[] = {{0, 0}, {1, 1}, {2, 3}, {3, 6}, {5, 10}};
+   for (auto t : offsets)
+     {
+       char out[array_size (exp) - 1] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       auto state = mbstate_t{};
+       auto in_next = (const CharT *) nullptr;
+       auto out_next = (char *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res = cvt.out (state, in, in + t.in_size, in_next, out, out + t.out_size,
+ 		     out_next);
+       VERIFY (res == cvt.ok);
+       VERIFY (in_next == in + t.in_size);
+       VERIFY (out_next == out + t.out_size);
+       VERIFY (char_traits<char>::compare (out, exp, t.out_size) == 0);
+       if (t.out_size < array_size (out))
+ 	VERIFY (out[t.out_size] == 0);
+     }
+ }
+ 
+ template <class CharT>
+ void
+ utf16_to_utf8_out_partial (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   using namespace std;
+   // UTF-8 string of 1-byte CP, 2-byte CP, 3-byte CP and 4-byte CP
+   const char16_t in_literal[] = u"bш\uAAAA\U0010AAAA";
+   const char exp[] = "bш\uAAAA\U0010AAAA";
+   CharT in[array_size (in_literal)];
+   copy (begin (in_literal), end (in_literal), begin (in));
+ 
+   static_assert (array_size (in_literal) == 6, "");
+   static_assert (array_size (exp) == 11, "");
+   static_assert (array_size (in) == 6, "");
+   VERIFY (char_traits<char16_t>::length (in_literal) == 5);
+   VERIFY (char_traits<char>::length (exp) == 10);
+   VERIFY (char_traits<CharT>::length (in) == 5);
+ 
+   const test_offsets_partial offsets[] = {
+     {1, 0, 0, 0}, // no space for first CP
+ 
+     {2, 1, 1, 1}, // no space for second CP
+     {2, 2, 1, 1}, // no space for second CP
+ 
+     {3, 3, 2, 3}, // no space for third CP
+     {3, 4, 2, 3}, // no space for third CP
+     {3, 5, 2, 3}, // no space for third CP
+ 
+     {5, 6, 3, 6}, // no space for fourth CP
+     {5, 7, 3, 6}, // no space for fourth CP
+     {5, 8, 3, 6}, // no space for fourth CP
+     {5, 9, 3, 6}, // no space for fourth CP
+ 
+     {4, 10, 3, 6}, // incomplete fourth CP
+ 
+     {4, 6, 3, 6}, // incomplete fourth CP, and no space for it
+     {4, 7, 3, 6}, // incomplete fourth CP, and no space for it
+     {4, 8, 3, 6}, // incomplete fourth CP, and no space for it
+     {4, 9, 3, 6}, // incomplete fourth CP, and no space for it
+   };
+   for (auto t : offsets)
+     {
+       char out[array_size (exp) - 1] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       VERIFY (t.expected_in_next <= t.in_size);
+       VERIFY (t.expected_out_next <= t.out_size);
+       auto state = mbstate_t{};
+       auto in_next = (const CharT *) nullptr;
+       auto out_next = (char *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res = cvt.out (state, in, in + t.in_size, in_next, out, out + t.out_size,
+ 		     out_next);
+       VERIFY (res == cvt.partial);
+       VERIFY (in_next == in + t.expected_in_next);
+       VERIFY (out_next == out + t.expected_out_next);
+       VERIFY (char_traits<char>::compare (out, exp, t.expected_out_next) == 0);
+       if (t.expected_out_next < array_size (out))
+ 	VERIFY (out[t.expected_out_next] == 0);
+     }
+ }
+ 
+ template <class CharT>
+ void
+ utf16_to_utf8_out_error (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   using namespace std;
+   const char16_t valid_in[] = u"bш\uAAAA\U0010AAAA";
+   const char exp[] = "bш\uAAAA\U0010AAAA";
+ 
+   static_assert (array_size (valid_in) == 6, "");
+   static_assert (array_size (exp) == 11, "");
+   VERIFY (char_traits<char16_t>::length (valid_in) == 5);
+   VERIFY (char_traits<char>::length (exp) == 10);
+ 
+   test_offsets_error<CharT> offsets[] = {
+     {5, 10, 0, 0, 0xD800, 0},
+     {5, 10, 0, 0, 0xDBFF, 0},
+     {5, 10, 0, 0, 0xDC00, 0},
+     {5, 10, 0, 0, 0xDFFF, 0},
+ 
+     {5, 10, 1, 1, 0xD800, 1},
+     {5, 10, 1, 1, 0xDBFF, 1},
+     {5, 10, 1, 1, 0xDC00, 1},
+     {5, 10, 1, 1, 0xDFFF, 1},
+ 
+     {5, 10, 2, 3, 0xD800, 2},
+     {5, 10, 2, 3, 0xDBFF, 2},
+     {5, 10, 2, 3, 0xDC00, 2},
+     {5, 10, 2, 3, 0xDFFF, 2},
+ 
+     // make the leading surrogate a trailing one
+     {5, 10, 3, 6, 0xDC00, 3},
+     {5, 10, 3, 6, 0xDFFF, 3},
+ 
+     // make the trailing surrogate a leading one
+     {5, 10, 3, 6, 0xD800, 4},
+     {5, 10, 3, 6, 0xDBFF, 4},
+ 
+     // make the trailing surrogate a BMP char
+     {5, 10, 3, 6, u'z', 4},
+   };
+ 
+   for (auto t : offsets)
+     {
+       CharT in[array_size (valid_in)] = {};
+       char out[array_size (exp) - 1] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       VERIFY (t.expected_in_next <= t.in_size);
+       VERIFY (t.expected_out_next <= t.out_size);
+       copy (begin (valid_in), end (valid_in), begin (in));
+       in[t.replace_pos] = t.replace_char;
+ 
+       auto state = mbstate_t{};
+       auto in_next = (const CharT *) nullptr;
+       auto out_next = (char *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res = cvt.out (state, in, in + t.in_size, in_next, out, out + t.out_size,
+ 		     out_next);
+       VERIFY (res == cvt.error);
+       VERIFY (in_next == in + t.expected_in_next);
+       VERIFY (out_next == out + t.expected_out_next);
+       VERIFY (char_traits<char>::compare (out, exp, t.expected_out_next) == 0);
+       if (t.expected_out_next < array_size (out))
+ 	VERIFY (out[t.expected_out_next] == 0);
+     }
+ }
+ 
+ template <class CharT>
+ void
+ utf16_to_utf8_out (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   utf16_to_utf8_out_ok (cvt);
+   utf16_to_utf8_out_partial (cvt);
+   utf16_to_utf8_out_error (cvt);
+ }
+ 
+ template <class CharT>
+ void
+ test_utf8_utf16_cvts (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   utf8_to_utf16_in (cvt);
+   utf16_to_utf8_out (cvt);
+ }
+ 
+ template <class CharT>
+ void
+ utf8_to_ucs2_in_ok (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   using namespace std;
+   // UTF-8 string of 1-byte CP, 2-byte CP and 3-byte CP
+   const char in[] = "bш\uAAAA";
+   const char16_t exp_literal[] = u"bш\uAAAA";
+   CharT exp[array_size (exp_literal)] = {};
+   copy (begin (exp_literal), end (exp_literal), begin (exp));
+ 
+   static_assert (array_size (in) == 7, "");
+   static_assert (array_size (exp_literal) == 4, "");
+   static_assert (array_size (exp) == 4, "");
+   VERIFY (char_traits<char>::length (in) == 6);
+   VERIFY (char_traits<char16_t>::length (exp_literal) == 3);
+   VERIFY (char_traits<CharT>::length (exp) == 3);
+ 
+   test_offsets_ok offsets[] = {{0, 0}, {1, 1}, {3, 2}, {6, 3}};
+   for (auto t : offsets)
+     {
+       CharT out[array_size (exp) - 1] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       auto state = mbstate_t{};
+       auto in_next = (const char *) nullptr;
+       auto out_next = (CharT *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res = cvt.in (state, in, in + t.in_size, in_next, out, out + t.out_size,
+ 		    out_next);
+       VERIFY (res == cvt.ok);
+       VERIFY (in_next == in + t.in_size);
+       VERIFY (out_next == out + t.out_size);
+       VERIFY (char_traits<CharT>::compare (out, exp, t.out_size) == 0);
+       if (t.out_size < array_size (out))
+ 	VERIFY (out[t.out_size] == 0);
+     }
+ 
+   for (auto t : offsets)
+     {
+       CharT out[array_size (exp)] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       auto state = mbstate_t{};
+       auto in_next = (const char *) nullptr;
+       auto out_next = (CharT *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res
+ 	= cvt.in (state, in, in + t.in_size, in_next, out, end (out), out_next);
+       VERIFY (res == cvt.ok);
+       VERIFY (in_next == in + t.in_size);
+       VERIFY (out_next == out + t.out_size);
+       VERIFY (char_traits<CharT>::compare (out, exp, t.out_size) == 0);
+       if (t.out_size < array_size (out))
+ 	VERIFY (out[t.out_size] == 0);
+     }
+ }
+ 
+ template <class CharT>
+ void
+ utf8_to_ucs2_in_partial (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   using namespace std;
+   // UTF-8 string of 1-byte CP, 2-byte CP and 3-byte CP
+   const char in[] = "bш\uAAAA";
+   const char16_t exp_literal[] = u"bш\uAAAA";
+   CharT exp[array_size (exp_literal)] = {};
+   copy (begin (exp_literal), end (exp_literal), begin (exp));
+ 
+   static_assert (array_size (in) == 7, "");
+   static_assert (array_size (exp_literal) == 4, "");
+   static_assert (array_size (exp) == 4, "");
+   VERIFY (char_traits<char>::length (in) == 6);
+   VERIFY (char_traits<char16_t>::length (exp_literal) == 3);
+   VERIFY (char_traits<CharT>::length (exp) == 3);
+ 
+   test_offsets_partial offsets[] = {
+     {1, 0, 0, 0}, // no space for first CP
+ 
+     {3, 1, 1, 1}, // no space for second CP
+     {2, 2, 1, 1}, // incomplete second CP
+     {2, 1, 1, 1}, // incomplete second CP, and no space for it
+ 
+     {6, 2, 3, 2}, // no space for third CP
+     {4, 3, 3, 2}, // incomplete third CP
+     {5, 3, 3, 2}, // incomplete third CP
+     {4, 2, 3, 2}, // incomplete third CP, and no space for it
+     {5, 2, 3, 2}, // incomplete third CP, and no space for it
+   };
+ 
+   for (auto t : offsets)
+     {
+       CharT out[array_size (exp) - 1] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       VERIFY (t.expected_in_next <= t.in_size);
+       VERIFY (t.expected_out_next <= t.out_size);
+       auto state = mbstate_t{};
+       auto in_next = (const char *) nullptr;
+       auto out_next = (CharT *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res = cvt.in (state, in, in + t.in_size, in_next, out, out + t.out_size,
+ 		    out_next);
+       VERIFY (res == cvt.partial);
+       VERIFY (in_next == in + t.expected_in_next);
+       VERIFY (out_next == out + t.expected_out_next);
+       VERIFY (char_traits<CharT>::compare (out, exp, t.expected_out_next) == 0);
+       if (t.expected_out_next < array_size (out))
+ 	VERIFY (out[t.expected_out_next] == 0);
+     }
+ }
+ 
+ template <class CharT>
+ void
+ utf8_to_ucs2_in_error (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   using namespace std;
+   const char valid_in[] = "bш\uAAAA\U0010AAAA";
+   const char16_t exp_literal[] = u"bш\uAAAA\U0010AAAA";
+   CharT exp[array_size (exp_literal)] = {};
+   copy (begin (exp_literal), end (exp_literal), begin (exp));
+ 
+   static_assert (array_size (valid_in) == 11, "");
+   static_assert (array_size (exp_literal) == 6, "");
+   static_assert (array_size (exp) == 6, "");
+   VERIFY (char_traits<char>::length (valid_in) == 10);
+   VERIFY (char_traits<char16_t>::length (exp_literal) == 5);
+   VERIFY (char_traits<CharT>::length (exp) == 5);
+ 
+   test_offsets_error<char> offsets[] = {
+ 
+     // replace leading byte with invalid byte
+     {1, 5, 0, 0, '\xFF', 0},
+     {3, 5, 1, 1, '\xFF', 1},
+     {6, 5, 3, 2, '\xFF', 3},
+     {10, 5, 6, 3, '\xFF', 6},
+ 
+     // replace first trailing byte with ASCII byte
+     {3, 5, 1, 1, 'z', 2},
+     {6, 5, 3, 2, 'z', 4},
+     {10, 5, 6, 3, 'z', 7},
+ 
+     // replace first trailing byte with invalid byte
+     {3, 5, 1, 1, '\xFF', 2},
+     {6, 5, 3, 2, '\xFF', 4},
+     {10, 5, 6, 3, '\xFF', 7},
+ 
+     // replace second trailing byte with ASCII byte
+     {6, 5, 3, 2, 'z', 5},
+     {10, 5, 6, 3, 'z', 8},
+ 
+     // replace second trailing byte with invalid byte
+     {6, 5, 3, 2, '\xFF', 5},
+     {10, 5, 6, 3, '\xFF', 8},
+ 
+     // replace third trailing byte
+     {10, 5, 6, 3, 'z', 9},
+     {10, 5, 6, 3, '\xFF', 9},
+ 
+     // When we see a leading byte of 4-byte CP, we should return error, no
+     // matter if it is incomplete at the end or has errors in the trailing
+     // bytes.
+ 
+     // Don't replace anything, show full 4-byte CP
+     {10, 4, 6, 3, 'b', 0},
+     {10, 5, 6, 3, 'b', 0},
+ 
+     // Don't replace anything, show incomplete 4-byte CP at the end
+     {7, 4, 6, 3, 'b', 0}, // incomplete fourth CP
+     {8, 4, 6, 3, 'b', 0}, // incomplete fourth CP
+     {9, 4, 6, 3, 'b', 0}, // incomplete fourth CP
+     {7, 5, 6, 3, 'b', 0}, // incomplete fourth CP
+     {8, 5, 6, 3, 'b', 0}, // incomplete fourth CP
+     {9, 5, 6, 3, 'b', 0}, // incomplete fourth CP
+ 
+     // replace first trailing byte with ASCII byte, also incomplete at end
+     {5, 5, 3, 2, 'z', 4},
+ 
+     // replace first trailing byte with invalid byte, also incomplete at end
+     {5, 5, 3, 2, '\xFF', 4},
+ 
+     // replace first trailing byte with ASCII byte, also incomplete at end
+     {8, 5, 6, 3, 'z', 7},
+     {9, 5, 6, 3, 'z', 7},
+ 
+     // replace first trailing byte with invalid byte, also incomplete at end
+     {8, 5, 6, 3, '\xFF', 7},
+     {9, 5, 6, 3, '\xFF', 7},
+ 
+     // replace second trailing byte with ASCII byte, also incomplete at end
+     {9, 5, 6, 3, 'z', 8},
+ 
+     // replace second trailing byte with invalid byte, also incomplete at end
+     {9, 5, 6, 3, '\xFF', 8},
+   };
+   for (auto t : offsets)
+     {
+       char in[array_size (valid_in)] = {};
+       CharT out[array_size (exp) - 1] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       VERIFY (t.expected_in_next <= t.in_size);
+       VERIFY (t.expected_out_next <= t.out_size);
+       char_traits<char>::copy (in, valid_in, array_size (valid_in));
+       in[t.replace_pos] = t.replace_char;
+ 
+       auto state = mbstate_t{};
+       auto in_next = (const char *) nullptr;
+       auto out_next = (CharT *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res = cvt.in (state, in, in + t.in_size, in_next, out, out + t.out_size,
+ 		    out_next);
+       VERIFY (res == cvt.error);
+       VERIFY (in_next == in + t.expected_in_next);
+       VERIFY (out_next == out + t.expected_out_next);
+       VERIFY (char_traits<CharT>::compare (out, exp, t.expected_out_next) == 0);
+       if (t.expected_out_next < array_size (out))
+ 	VERIFY (out[t.expected_out_next] == 0);
+     }
+ }
+ 
+ template <class CharT>
+ void
+ utf8_to_ucs2_in (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   utf8_to_ucs2_in_ok (cvt);
+   utf8_to_ucs2_in_partial (cvt);
+   utf8_to_ucs2_in_error (cvt);
+ }
+ 
+ template <class CharT>
+ void
+ ucs2_to_utf8_out_ok (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   using namespace std;
+   // UTF-8 string of 1-byte CP, 2-byte CP and 3-byte CP
+   const char16_t in_literal[] = u"bш\uAAAA";
+   const char exp[] = "bш\uAAAA";
+   CharT in[array_size (in_literal)] = {};
+   copy (begin (in_literal), end (in_literal), begin (in));
+ 
+   static_assert (array_size (in_literal) == 4, "");
+   static_assert (array_size (exp) == 7, "");
+   static_assert (array_size (in) == 4, "");
+   VERIFY (char_traits<char16_t>::length (in_literal) == 3);
+   VERIFY (char_traits<char>::length (exp) == 6);
+   VERIFY (char_traits<CharT>::length (in) == 3);
+ 
+   const test_offsets_ok offsets[] = {{0, 0}, {1, 1}, {2, 3}, {3, 6}};
+   for (auto t : offsets)
+     {
+       char out[array_size (exp) - 1] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       auto state = mbstate_t{};
+       auto in_next = (const CharT *) nullptr;
+       auto out_next = (char *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res = cvt.out (state, in, in + t.in_size, in_next, out, out + t.out_size,
+ 		     out_next);
+       VERIFY (res == cvt.ok);
+       VERIFY (in_next == in + t.in_size);
+       VERIFY (out_next == out + t.out_size);
+       VERIFY (char_traits<char>::compare (out, exp, t.out_size) == 0);
+       if (t.out_size < array_size (out))
+ 	VERIFY (out[t.out_size] == 0);
+     }
+ }
+ 
+ template <class CharT>
+ void
+ ucs2_to_utf8_out_partial (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   using namespace std;
+   // UTF-8 string of 1-byte CP, 2-byte CP and 3-byte CP
+   const char16_t in_literal[] = u"bш\uAAAA";
+   const char exp[] = "bш\uAAAA";
+   CharT in[array_size (in_literal)] = {};
+   copy (begin (in_literal), end (in_literal), begin (in));
+ 
+   static_assert (array_size (in_literal) == 4, "");
+   static_assert (array_size (exp) == 7, "");
+   static_assert (array_size (in) == 4, "");
+   VERIFY (char_traits<char16_t>::length (in_literal) == 3);
+   VERIFY (char_traits<char>::length (exp) == 6);
+   VERIFY (char_traits<CharT>::length (in) == 3);
+ 
+   const test_offsets_partial offsets[] = {
+     {1, 0, 0, 0}, // no space for first CP
+ 
+     {2, 1, 1, 1}, // no space for second CP
+     {2, 2, 1, 1}, // no space for second CP
+ 
+     {3, 3, 2, 3}, // no space for third CP
+     {3, 4, 2, 3}, // no space for third CP
+     {3, 5, 2, 3}, // no space for third CP
+   };
+   for (auto t : offsets)
+     {
+       char out[array_size (exp) - 1] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       VERIFY (t.expected_in_next <= t.in_size);
+       VERIFY (t.expected_out_next <= t.out_size);
+       auto state = mbstate_t{};
+       auto in_next = (const CharT *) nullptr;
+       auto out_next = (char *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res = cvt.out (state, in, in + t.in_size, in_next, out, out + t.out_size,
+ 		     out_next);
+       VERIFY (res == cvt.partial);
+       VERIFY (in_next == in + t.expected_in_next);
+       VERIFY (out_next == out + t.expected_out_next);
+       VERIFY (char_traits<char>::compare (out, exp, t.expected_out_next) == 0);
+       if (t.expected_out_next < array_size (out))
+ 	VERIFY (out[t.expected_out_next] == 0);
+     }
+ }
+ 
+ template <class CharT>
+ void
+ ucs2_to_utf8_out_error (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   using namespace std;
+   const char16_t valid_in[] = u"bш\uAAAA\U0010AAAA";
+   const char exp[] = "bш\uAAAA\U0010AAAA";
+ 
+   static_assert (array_size (valid_in) == 6, "");
+   static_assert (array_size (exp) == 11, "");
+   VERIFY (char_traits<char16_t>::length (valid_in) == 5);
+   VERIFY (char_traits<char>::length (exp) == 10);
+ 
+   test_offsets_error<CharT> offsets[] = {
+     {5, 10, 0, 0, 0xD800, 0},
+     {5, 10, 0, 0, 0xDBFF, 0},
+     {5, 10, 0, 0, 0xDC00, 0},
+     {5, 10, 0, 0, 0xDFFF, 0},
+ 
+     {5, 10, 1, 1, 0xD800, 1},
+     {5, 10, 1, 1, 0xDBFF, 1},
+     {5, 10, 1, 1, 0xDC00, 1},
+     {5, 10, 1, 1, 0xDFFF, 1},
+ 
+     {5, 10, 2, 3, 0xD800, 2},
+     {5, 10, 2, 3, 0xDBFF, 2},
+     {5, 10, 2, 3, 0xDC00, 2},
+     {5, 10, 2, 3, 0xDFFF, 2},
+ 
+     // dont replace anything, just show the surrogate pair
+     {5, 10, 3, 6, u'b', 0},
+ 
+     // make the leading surrogate a trailing one
+     {5, 10, 3, 6, 0xDC00, 3},
+     {5, 10, 3, 6, 0xDFFF, 3},
+ 
+     // make the trailing surrogate a leading one
+     {5, 10, 3, 6, 0xD800, 4},
+     {5, 10, 3, 6, 0xDBFF, 4},
+ 
+     // make the trailing surrogate a BMP char
+     {5, 10, 3, 6, u'z', 4},
+ 
+     {5, 7, 3, 6, u'b', 0}, // no space for fourth CP
+     {5, 8, 3, 6, u'b', 0}, // no space for fourth CP
+     {5, 9, 3, 6, u'b', 0}, // no space for fourth CP
+ 
+     {4, 10, 3, 6, u'b', 0}, // incomplete fourth CP
+     {4, 7, 3, 6, u'b', 0},  // incomplete fourth CP, and no space for it
+     {4, 8, 3, 6, u'b', 0},  // incomplete fourth CP, and no space for it
+     {4, 9, 3, 6, u'b', 0},  // incomplete fourth CP, and no space for it
+ 
+   };
+ 
+   for (auto t : offsets)
+     {
+       CharT in[array_size (valid_in)] = {};
+       char out[array_size (exp) - 1] = {};
+       VERIFY (t.in_size <= array_size (in));
+       VERIFY (t.out_size <= array_size (out));
+       VERIFY (t.expected_in_next <= t.in_size);
+       VERIFY (t.expected_out_next <= t.out_size);
+       copy (begin (valid_in), end (valid_in), begin (in));
+       in[t.replace_pos] = t.replace_char;
+ 
+       auto state = mbstate_t{};
+       auto in_next = (const CharT *) nullptr;
+       auto out_next = (char *) nullptr;
+       auto res = codecvt_base::result ();
+ 
+       res = cvt.out (state, in, in + t.in_size, in_next, out, out + t.out_size,
+ 		     out_next);
+       VERIFY (res == cvt.error);
+       VERIFY (in_next == in + t.expected_in_next);
+       VERIFY (out_next == out + t.expected_out_next);
+       VERIFY (char_traits<char>::compare (out, exp, t.expected_out_next) == 0);
+       if (t.expected_out_next < array_size (out))
+ 	VERIFY (out[t.expected_out_next] == 0);
+     }
+ }
+ 
+ template <class CharT>
+ void
+ ucs2_to_utf8_out (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   ucs2_to_utf8_out_ok (cvt);
+   ucs2_to_utf8_out_partial (cvt);
+   ucs2_to_utf8_out_error (cvt);
+ }
+ 
+ template <class CharT>
+ void
+ test_utf8_ucs2_cvts (const std::codecvt<CharT, char, mbstate_t> &cvt)
+ {
+   utf8_to_ucs2_in (cvt);
+   ucs2_to_utf8_out (cvt);
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/22_locale/codecvt/codecvt_unicode_wchar_t.cc gcc-12.4.0/libstdc++-v3/testsuite/22_locale/codecvt/codecvt_unicode_wchar_t.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/22_locale/codecvt/codecvt_unicode_wchar_t.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/22_locale/codecvt/codecvt_unicode_wchar_t.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,59 ----
+ // Copyright (C) 2020-2023 Free Software Foundation, Inc.
+ //
+ // This file is part of the GNU ISO C++ Library.  This library is free
+ // software; you can redistribute it and/or modify it under the
+ // terms of the GNU General Public License as published by the
+ // Free Software Foundation; either version 3, or (at your option)
+ // any later version.
+ 
+ // This library is distributed in the hope that it will be useful,
+ // but WITHOUT ANY WARRANTY; without even the implied warranty of
+ // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ // GNU General Public License for more details.
+ 
+ // You should have received a copy of the GNU General Public License along
+ // with this library; see the file COPYING3.  If not see
+ // <http://www.gnu.org/licenses/>.
+ 
+ // { dg-do run { target c++11 } }
+ 
+ #include "codecvt_unicode.h"
+ 
+ #include <codecvt>
+ 
+ using namespace std;
+ 
+ void
+ test_utf8_utf32_codecvts ()
+ {
+ #if __SIZEOF_WCHAR_T__ == 4
+   auto cvt_ptr = to_unique_ptr (new codecvt_utf8<wchar_t> ());
+   test_utf8_utf32_codecvts (*cvt_ptr);
+ #endif
+ }
+ 
+ void
+ test_utf8_utf16_codecvts ()
+ {
+ #if __SIZEOF_WCHAR_T__ >= 2
+   auto cvt_ptr = to_unique_ptr (new codecvt_utf8_utf16<wchar_t> ());
+   test_utf8_utf16_cvts (*cvt_ptr);
+ #endif
+ }
+ 
+ void
+ test_utf8_ucs2_codecvts ()
+ {
+ #if __SIZEOF_WCHAR_T__ == 2
+   auto cvt_ptr = to_unique_ptr (new codecvt_utf8<wchar_t> ());
+   test_utf8_ucs2_cvts (*cvt_ptr);
+ #endif
+ }
+ 
+ int
+ main ()
+ {
+   test_utf8_utf32_codecvts ();
+   test_utf8_utf16_codecvts ();
+   test_utf8_ucs2_codecvts ();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/23_containers/array/creation/110167.cc gcc-12.4.0/libstdc++-v3/testsuite/23_containers/array/creation/110167.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/23_containers/array/creation/110167.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/23_containers/array/creation/110167.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,14 ----
+ // { dg-options "-std=gnu++20" }
+ // { dg-do compile { target c++20 } }
+ 
+ // PR libstdc++/110167 - excessive compile time when optimizing std::to_array
+ 
+ #include <array>
+ 
+ constexpr int N = 512 * 512;
+ 
+ std::array<int, N>
+ make_std_array(int (&a)[N])
+ {
+   return std::to_array(a);
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/23_containers/array/creation/111512.cc gcc-12.4.0/libstdc++-v3/testsuite/23_containers/array/creation/111512.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/23_containers/array/creation/111512.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/23_containers/array/creation/111512.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,25 ----
+ // { dg-options "-std=gnu++20" }
+ // { dg-do compile { target c++20 } }
+ 
+ // Bug libstdc++/111511 - Incorrect ADL in std::to_array in GCC 11/12/13
+ // Bug c++/111512 - GCC's __builtin_memcpy can trigger ADL
+ 
+ #include <array>
+ #include <utility>
+ 
+ struct incomplete;
+ 
+ template<class T>
+ struct holder {
+     T t; // { dg-bogus "'holder<T>::t' has incomplete type" }
+ };
+ 
+ // A complete type that cannot be used as an associated type for ADL.
+ using adl_bomb = holder<incomplete>*;
+ 
+ int main()
+ {
+     adl_bomb a[1]{};
+     (void) std::to_array(a);
+     (void) std::to_array(std::move(a));
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/1.cc gcc-12.4.0/libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/1.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/1.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/1.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,70 ----
+ // { dg-do run { target c++11 } }
+ 
+ #include <deque>
+ #include <testsuite_hooks.h>
+ 
+ void
+ test01()
+ {
+   std::deque<int> c;
+   std::deque<int>::iterator pos;
+ 
+   // libstdc++/52799
+   pos = c.emplace(c.begin());
+   VERIFY( c.size() == 1 );
+   VERIFY( c[0] == 0 );
+   VERIFY( pos == c.begin() );
+   pos = c.emplace(c.begin(), 2);
+   VERIFY( c.size() == 2 );
+   VERIFY( c[0] == 2 );
+   VERIFY( c[1] == 0 );
+   VERIFY( pos == c.begin() );
+   pos = c.emplace(c.end(), 3);
+   VERIFY( c.size() == 3 );
+   VERIFY( c[0] == 2 );
+   VERIFY( c[1] == 0 );
+   VERIFY( c[2] == 3 );
+   VERIFY( pos == --c.end() );
+ 
+   // const_iterator
+   pos = c.emplace(c.cbegin());
+   VERIFY( c.size() == 4 );
+   VERIFY( c[0] == 0 );
+   VERIFY( c[1] == 2 );
+   VERIFY( pos == c.cbegin() );
+   pos = c.emplace(c.cbegin() + 2, 22);
+   VERIFY( c.size() == 5 );
+   VERIFY( c[0] == 0 );
+   VERIFY( c[1] == 2 );
+   VERIFY( c[2] == 22 );
+   VERIFY( pos == c.cbegin() + 2 );
+ }
+ 
+ struct V
+ {
+   explicit V(int a, int b = 0) : val(a+b) { }
+   int val;
+ };
+ 
+ void
+ test02()
+ {
+   std::deque<V> c;
+   std::deque<V>::iterator pos;
+ 
+   pos = c.emplace(c.end(), 1);
+   VERIFY( c.size() == 1 );
+   VERIFY( c[0].val == 1 );
+   VERIFY( pos == --c.end() );
+   pos = c.emplace(c.cend(), 2, 3);
+   VERIFY( c.size() == 2 );
+   VERIFY( c[0].val == 1 );
+   VERIFY( c[1].val == 5 );
+   VERIFY( pos == --c.cend() );
+ }
+ 
+ int main()
+ {
+   test01();
+   test02();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/52799.cc gcc-12.4.0/libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/52799.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/52799.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/52799.cc	Thu Jan  1 00:00:00 1970
***************
*** 1,27 ****
- // { dg-do compile { target c++11 } }
- 
- // Copyright (C) 2012-2022 Free Software Foundation, Inc.
- //
- // This file is part of the GNU ISO C++ Library.  This library is free
- // software; you can redistribute it and/or modify it under the
- // terms of the GNU General Public License as published by the
- // Free Software Foundation; either version 3, or (at your option)
- // any later version.
- 
- // This library is distributed in the hope that it will be useful,
- // but WITHOUT ANY WARRANTY; without even the implied warranty of
- // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- // GNU General Public License for more details.
- 
- // You should have received a copy of the GNU General Public License along
- // with this library; see the file COPYING3.  If not see
- // <http://www.gnu.org/licenses/>.
- 
- #include <deque>
- 
- // libstdc++/52799
- int main()
- {
-   std::deque<int> d;
-   d.emplace(d.begin());
- }
--- 0 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/const_iterator.cc gcc-12.4.0/libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/const_iterator.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/const_iterator.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/const_iterator.cc	Thu Jan  1 00:00:00 1970
***************
*** 1,26 ****
- // { dg-do compile { target c++11 } }
- 
- // Copyright (C) 2013-2022 Free Software Foundation, Inc.
- //
- // This file is part of the GNU ISO C++ Library.  This library is free
- // software; you can redistribute it and/or modify it under the
- // terms of the GNU General Public License as published by the
- // Free Software Foundation; either version 3, or (at your option)
- // any later version.
- 
- // This library is distributed in the hope that it will be useful,
- // but WITHOUT ANY WARRANTY; without even the implied warranty of
- // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- // GNU General Public License for more details.
- 
- // You should have received a copy of the GNU General Public License along
- // with this library; see the file COPYING3.  If not see
- // <http://www.gnu.org/licenses/>.
- 
- #include <deque>
- 
- void test01()
- {
-   std::deque<int> d1;
-   d1.emplace(d1.cbegin(), 1);
- }
--- 0 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/1.cc gcc-12.4.0/libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/1.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/1.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/1.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,71 ----
+ // { dg-do run { target c++11 } }
+ 
+ #include <list>
+ #include <testsuite_hooks.h>
+ 
+ void
+ test01()
+ {
+   std::list<int> c;
+   std::list<int>::iterator pos;
+ 
+   // libstdc++/52799
+   pos = c.emplace(c.begin());
+   VERIFY( c.size() == 1 );
+   VERIFY( *pos == 0 );
+   VERIFY( pos == c.begin() );
+   pos = c.emplace(c.begin(), 2);
+   VERIFY( c.size() == 2 );
+   VERIFY( *pos == 2 );
+   VERIFY( pos == c.begin() );
+   VERIFY( *++pos == 0 );
+   pos = c.emplace(c.end(), 3);
+   VERIFY( c.size() == 3 );
+   VERIFY( *pos == 3 );
+   VERIFY( pos == --c.end() );
+   VERIFY( *--pos == 0 );
+   VERIFY( *--pos == 2 );
+ 
+   // const_iterator
+   pos = c.emplace(c.cbegin());
+   VERIFY( c.size() == 4 );
+   VERIFY( *pos == 0 );
+   VERIFY( pos == c.cbegin() );
+   VERIFY( *++pos == 2 );
+   std::list<int>::const_iterator i = std::next(c.cbegin(), 2);
+   pos = c.emplace(i, 22);
+   VERIFY( c.size() == 5 );
+   VERIFY( *pos == 22 );
+   VERIFY( pos == std::prev(i) );
+   VERIFY( *--pos == 2 );
+   VERIFY( *--pos == 0 );
+ }
+ 
+ struct V
+ {
+   explicit V(int a, int b = 0) : val(a+b) { }
+   int val;
+ };
+ 
+ void
+ test02()
+ {
+   std::list<V> c;
+   std::list<V>::iterator pos;
+ 
+   pos = c.emplace(c.end(), 1);
+   VERIFY( c.size() == 1 );
+   VERIFY( pos->val == 1 );
+   VERIFY( pos == --c.end() );
+   pos = c.emplace(c.cend(), 2, 3);
+   VERIFY( c.size() == 2 );
+   VERIFY( pos->val == 5 );
+   VERIFY( pos == --c.cend() );
+   VERIFY( c.front().val == 1 );
+ }
+ 
+ int main()
+ {
+   test01();
+   test02();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/52799.cc gcc-12.4.0/libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/52799.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/52799.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/52799.cc	Thu Jan  1 00:00:00 1970
***************
*** 1,27 ****
- // { dg-do compile { target c++11 } }
- 
- // Copyright (C) 2012-2022 Free Software Foundation, Inc.
- //
- // This file is part of the GNU ISO C++ Library.  This library is free
- // software; you can redistribute it and/or modify it under the
- // terms of the GNU General Public License as published by the
- // Free Software Foundation; either version 3, or (at your option)
- // any later version.
- 
- // This library is distributed in the hope that it will be useful,
- // but WITHOUT ANY WARRANTY; without even the implied warranty of
- // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- // GNU General Public License for more details.
- 
- // You should have received a copy of the GNU General Public License along
- // with this library; see the file COPYING3.  If not see
- // <http://www.gnu.org/licenses/>.
- 
- #include <list>
- 
- // libstdc++/52799
- int main()
- {
-   std::list<int> l;
-   l.emplace(l.begin());
- }
--- 0 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/const_iterator.cc gcc-12.4.0/libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/const_iterator.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/const_iterator.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/const_iterator.cc	Thu Jan  1 00:00:00 1970
***************
*** 1,26 ****
- // { dg-do compile { target c++11 } }
- 
- // Copyright (C) 2013-2022 Free Software Foundation, Inc.
- //
- // This file is part of the GNU ISO C++ Library.  This library is free
- // software; you can redistribute it and/or modify it under the
- // terms of the GNU General Public License as published by the
- // Free Software Foundation; either version 3, or (at your option)
- // any later version.
- 
- // This library is distributed in the hope that it will be useful,
- // but WITHOUT ANY WARRANTY; without even the implied warranty of
- // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- // GNU General Public License for more details.
- 
- // You should have received a copy of the GNU General Public License along
- // with this library; see the file COPYING3.  If not see
- // <http://www.gnu.org/licenses/>.
- 
- #include <list>
- 
- void test01()
- {
-   std::list<int> l1;
-   l1.emplace(l1.cbegin(), 1);
- }
--- 0 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/23_containers/map/modifiers/emplace/92300.cc gcc-12.4.0/libstdc++-v3/testsuite/23_containers/map/modifiers/emplace/92300.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/23_containers/map/modifiers/emplace/92300.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/23_containers/map/modifiers/emplace/92300.cc	Thu Jun 20 08:08:10 2024
*************** void* operator new(std::size_t n)
*** 12,23 ****
    return std::malloc(n);
  }
  
! void operator delete(void* p)
  {
    std::free(p);
  }
  
! void operator delete(void* p, std::size_t)
  {
    std::free(p);
  }
--- 12,23 ----
    return std::malloc(n);
  }
  
! void operator delete(void* p) noexcept
  {
    std::free(p);
  }
  
! void operator delete(void* p, std::size_t) noexcept
  {
    std::free(p);
  }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/23_containers/map/modifiers/insert/92300.cc gcc-12.4.0/libstdc++-v3/testsuite/23_containers/map/modifiers/insert/92300.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/23_containers/map/modifiers/insert/92300.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/23_containers/map/modifiers/insert/92300.cc	Thu Jun 20 08:08:10 2024
*************** void* operator new(std::size_t n)
*** 12,23 ****
    return std::malloc(n);
  }
  
! void operator delete(void* p)
  {
    std::free(p);
  }
  
! void operator delete(void* p, std::size_t)
  {
    std::free(p);
  }
--- 12,23 ----
    return std::malloc(n);
  }
  
! void operator delete(void* p) noexcept
  {
    std::free(p);
  }
  
! void operator delete(void* p, std::size_t) noexcept
  {
    std::free(p);
  }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/23_containers/multiset/modifiers/114401.cc gcc-12.4.0/libstdc++-v3/testsuite/23_containers/multiset/modifiers/114401.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/23_containers/multiset/modifiers/114401.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/23_containers/multiset/modifiers/114401.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,125 ----
+ // { dg-do run { target c++17 } }
+ 
+ // PR libstdc++/114401 allocator destructor omitted when reinserting node_handle
+ 
+ #include <set>
+ #include <memory>
+ #include <testsuite_hooks.h>
+ 
+ template<typename T>
+ struct Alloc
+ {
+   using value_type = T;
+   using propagate_on_container_copy_assignment = std::true_type;
+   using propagate_on_container_move_assignment = std::true_type;
+   using propagate_on_container_swap = std::true_type;
+ 
+   Alloc(int identity) : id(std::make_shared<int>(identity)) { }
+ 
+   template<typename U>
+     Alloc(const Alloc<U> a) : id(a.id) { }
+ 
+   T* allocate(std::size_t n) { return std::allocator<T>().allocate(n); }
+   void deallocate(T* p, std::size_t n) { std::allocator<T>().deallocate(p, n); }
+ 
+   template<typename U>
+     friend bool
+     operator==(const Alloc& a, const Alloc<U>& a2)
+     { return a.id == a2.id; }
+ 
+   template<typename U>
+     friend bool
+     operator!=(const Alloc& a, const Alloc<U>& a2)
+     { return !(a == a2); }
+ 
+   std::shared_ptr<int> id;
+ };
+ 
+ using test_type = std::multiset<int, std::less<int>, Alloc<int>>;
+ 
+ void
+ test_node_ops()
+ {
+   test_type s1({1,3,5}, Alloc<int>(1));
+   test_type s2({2,4,6,8}, Alloc<int>(2));
+   VERIFY( s1.get_allocator() != s2.get_allocator() );
+ 
+   auto node_a = s1.extract(1);
+   VERIFY( ! node_a.empty() );
+   VERIFY( node_a.get_allocator() == s1.get_allocator() );
+ 
+   node_a = std::move(node_a); // self-move
+   VERIFY( node_a.empty() );
+ 
+   swap(node_a, node_a); // self-swap
+   VERIFY( node_a.empty() );
+ 
+   auto node_b = s2.extract(2);
+   VERIFY( node_b.get_allocator() == s2.get_allocator() );
+ 
+   node_a = std::move(node_b); // empty = !empty
+   VERIFY( node_a.get_allocator() == s2.get_allocator() );
+   VERIFY( node_b.empty() );
+ 
+   swap(node_a, node_b); // swap(!empty, empty)
+   VERIFY( node_a.empty() );
+   VERIFY( node_b.get_allocator() == s2.get_allocator() );
+ 
+   swap(node_a, node_b); // swap(empty, !empty)
+   VERIFY( node_a.get_allocator() == s2.get_allocator() );
+   VERIFY( node_b.empty() );
+ 
+   node_a = s1.extract(3); // !empty = !empty
+   VERIFY( node_a.get_allocator() == s1.get_allocator() );
+   node_b = s2.extract(0); // empty = empty
+   VERIFY( node_b.empty() );
+   node_b = s2.extract(6); // empty = !empty
+   VERIFY( node_b.get_allocator() == s2.get_allocator() );
+ 
+   swap(node_a, node_b); // swap(!empty, !empty)
+   VERIFY( node_a.get_allocator() == s2.get_allocator() );
+   VERIFY( node_b.get_allocator() == s1.get_allocator() );
+ 
+   node_a = {};
+   node_b = std::move(node_a); // !empty = empty
+   VERIFY( node_a.empty() );
+   VERIFY( node_b.empty() );
+ 
+   swap(node_a, node_b); // swap(empty, empty)
+   VERIFY( node_a.empty() );
+   VERIFY( node_b.empty() );
+ }
+ 
+ void
+ test_alloc_lifetime()
+ {
+   Alloc<int> a(1);
+   test_type s({1,2,3}, a);
+   VERIFY( a.id.use_count() == 2 ); // a and the copy in s
+ 
+   s.insert(s.extract(1));
+   VERIFY( a.id.use_count() == 2 );
+ 
+   s.insert(s.begin(), s.extract(2));
+   VERIFY( a.id.use_count() == 2 );
+ 
+   auto node = s.extract(1);
+   VERIFY( a.id.use_count() == 3 );
+   node = s.extract(0);
+   VERIFY( a.id.use_count() == 2 );
+ 
+   s.insert(std::move(node));
+   VERIFY( a.id.use_count() == 2 );
+ 
+   s.merge(test_type(s));
+   VERIFY( a.id.use_count() == 2 );
+ 
+   s.merge(test_type({4,5,6}, a));
+   VERIFY( a.id.use_count() == 2 );
+ }
+ 
+ int main()
+ {
+   test_node_ops();
+   test_alloc_lifetime();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/23_containers/set/modifiers/114401.cc gcc-12.4.0/libstdc++-v3/testsuite/23_containers/set/modifiers/114401.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/23_containers/set/modifiers/114401.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/23_containers/set/modifiers/114401.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,125 ----
+ // { dg-do run { target c++17 } }
+ 
+ // PR libstdc++/114401 allocator destructor omitted when reinserting node_handle
+ 
+ #include <set>
+ #include <memory>
+ #include <testsuite_hooks.h>
+ 
+ template<typename T>
+ struct Alloc
+ {
+   using value_type = T;
+   using propagate_on_container_copy_assignment = std::true_type;
+   using propagate_on_container_move_assignment = std::true_type;
+   using propagate_on_container_swap = std::true_type;
+ 
+   Alloc(int identity) : id(std::make_shared<int>(identity)) { }
+ 
+   template<typename U>
+     Alloc(const Alloc<U> a) : id(a.id) { }
+ 
+   T* allocate(std::size_t n) { return std::allocator<T>().allocate(n); }
+   void deallocate(T* p, std::size_t n) { std::allocator<T>().deallocate(p, n); }
+ 
+   template<typename U>
+     friend bool
+     operator==(const Alloc& a, const Alloc<U>& a2)
+     { return a.id == a2.id; }
+ 
+   template<typename U>
+     friend bool
+     operator!=(const Alloc& a, const Alloc<U>& a2)
+     { return !(a == a2); }
+ 
+   std::shared_ptr<int> id;
+ };
+ 
+ using test_type = std::set<int, std::less<int>, Alloc<int>>;
+ 
+ void
+ test_node_ops()
+ {
+   test_type s1({1,3,5}, Alloc<int>(1));
+   test_type s2({2,4,6,8}, Alloc<int>(2));
+   VERIFY( s1.get_allocator() != s2.get_allocator() );
+ 
+   auto node_a = s1.extract(1);
+   VERIFY( ! node_a.empty() );
+   VERIFY( node_a.get_allocator() == s1.get_allocator() );
+ 
+   node_a = std::move(node_a); // self-move
+   VERIFY( node_a.empty() );
+ 
+   swap(node_a, node_a); // self-swap
+   VERIFY( node_a.empty() );
+ 
+   auto node_b = s2.extract(2);
+   VERIFY( node_b.get_allocator() == s2.get_allocator() );
+ 
+   node_a = std::move(node_b); // empty = !empty
+   VERIFY( node_a.get_allocator() == s2.get_allocator() );
+   VERIFY( node_b.empty() );
+ 
+   swap(node_a, node_b); // swap(!empty, empty)
+   VERIFY( node_a.empty() );
+   VERIFY( node_b.get_allocator() == s2.get_allocator() );
+ 
+   swap(node_a, node_b); // swap(empty, !empty)
+   VERIFY( node_a.get_allocator() == s2.get_allocator() );
+   VERIFY( node_b.empty() );
+ 
+   node_a = s1.extract(3); // !empty = !empty
+   VERIFY( node_a.get_allocator() == s1.get_allocator() );
+   node_b = s2.extract(0); // empty = empty
+   VERIFY( node_b.empty() );
+   node_b = s2.extract(6); // empty = !empty
+   VERIFY( node_b.get_allocator() == s2.get_allocator() );
+ 
+   swap(node_a, node_b); // swap(!empty, !empty)
+   VERIFY( node_a.get_allocator() == s2.get_allocator() );
+   VERIFY( node_b.get_allocator() == s1.get_allocator() );
+ 
+   node_a = {};
+   node_b = std::move(node_a); // !empty = empty
+   VERIFY( node_a.empty() );
+   VERIFY( node_b.empty() );
+ 
+   swap(node_a, node_b); // swap(empty, empty)
+   VERIFY( node_a.empty() );
+   VERIFY( node_b.empty() );
+ }
+ 
+ void
+ test_alloc_lifetime()
+ {
+   Alloc<int> a(1);
+   test_type s({1,2,3}, a);
+   VERIFY( a.id.use_count() == 2 ); // a and the copy in s
+ 
+   s.insert(s.extract(1));
+   VERIFY( a.id.use_count() == 2 );
+ 
+   s.insert(s.begin(), s.extract(2));
+   VERIFY( a.id.use_count() == 2 );
+ 
+   auto node = s.extract(1);
+   VERIFY( a.id.use_count() == 3 );
+   node = s.extract(0);
+   VERIFY( a.id.use_count() == 2 );
+ 
+   s.insert(std::move(node));
+   VERIFY( a.id.use_count() == 2 );
+ 
+   s.merge(test_type(s));
+   VERIFY( a.id.use_count() == 2 );
+ 
+   s.merge(test_type({4,5,6}, a));
+   VERIFY( a.id.use_count() == 2 );
+ }
+ 
+ int main()
+ {
+   test_node_ops();
+   test_alloc_lifetime();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/merge.cc gcc-12.4.0/libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/merge.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/merge.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/merge.cc	Thu Jun 20 08:08:10 2024
***************
*** 17,31 ****
  
  // { dg-do run { target c++17 } }
  
  #include <unordered_map>
  #include <algorithm>
  #include <testsuite_hooks.h>
  
  using test_type = std::unordered_map<int, int>;
  
! struct hash {
!   auto operator()(int i) const noexcept { return ~std::hash<int>()(i); }
! };
  struct equal : std::equal_to<> { };
  
  template<typename C1, typename C2>
--- 17,45 ----
  
  // { dg-do run { target c++17 } }
  
+ #include <string>
+ #include <functional>
  #include <unordered_map>
  #include <algorithm>
  #include <testsuite_hooks.h>
  
  using test_type = std::unordered_map<int, int>;
  
! template<typename T>
!   struct xhash
!   {
!     auto operator()(const T& i) const noexcept
!     { return ~std::hash<T>()(i); }
!   };
! 
! 
! namespace std
! {
!   template<typename T>
!     struct __is_fast_hash<xhash<T>> : __is_fast_hash<std::hash<T>>
!     { };
! }
! 
  struct equal : std::equal_to<> { };
  
  template<typename C1, typename C2>
*************** test02()
*** 64,70 ****
  {
    const test_type c0{ {1, 10}, {2, 20}, {3, 30} };
    test_type c1 = c0;
!   std::unordered_map<int, int, hash, equal> c2( c0.begin(), c0.end() );
  
    c1.merge(c2);
    VERIFY( c1 == c0 );
--- 78,84 ----
  {
    const test_type c0{ {1, 10}, {2, 20}, {3, 30} };
    test_type c1 = c0;
!   std::unordered_map<int, int, xhash<int>, equal> c2( c0.begin(), c0.end() );
  
    c1.merge(c2);
    VERIFY( c1 == c0 );
*************** test03()
*** 89,95 ****
  {
    const test_type c0{ {1, 10}, {2, 20}, {3, 30} };
    test_type c1 = c0;
!   std::unordered_multimap<int, int, hash, equal> c2( c0.begin(), c0.end() );
    c1.merge(c2);
    VERIFY( c1 == c0 );
    VERIFY( equal_elements(c2, c0) );
--- 103,109 ----
  {
    const test_type c0{ {1, 10}, {2, 20}, {3, 30} };
    test_type c1 = c0;
!   std::unordered_multimap<int, int, xhash<int>, equal> c2( c0.begin(), c0.end() );
    c1.merge(c2);
    VERIFY( c1 == c0 );
    VERIFY( equal_elements(c2, c0) );
*************** test03()
*** 125,134 ****
--- 139,302 ----
    VERIFY( c2.empty() );
  }
  
+ void
+ test04()
+ {
+   const std::unordered_map<std::string, int> c0
+     { {"one", 10}, {"two", 20}, {"three", 30} };
+ 
+   std::unordered_map<std::string, int> c1 = c0;
+   std::unordered_multimap<std::string, int> c2( c0.begin(), c0.end() );
+   c1.merge(c2);
+   VERIFY( c1 == c0 );
+   VERIFY( equal_elements(c2, c0) );
+ 
+   c1.clear();
+   c1.merge(c2);
+   VERIFY( c1 == c0 );
+   VERIFY( c2.empty() );
+ 
+   c2.merge(c1);
+   VERIFY( c1.empty() );
+   VERIFY( equal_elements(c2, c0) );
+ 
+   c1 = c0;
+   c2.merge(c1);
+   VERIFY( c1.empty() );
+   VERIFY( c2.size() == (2 * c0.size()) );
+   VERIFY( c2.count("one") == 2 );
+   VERIFY( c2.count("two") == 2 );
+   VERIFY( c2.count("three") == 2 );
+ 
+   c1.merge(c2);
+   VERIFY( c1 == c0 );
+   VERIFY( equal_elements(c2, c0) );
+ 
+   c1.merge(std::move(c2));
+   VERIFY( c1 == c0 );
+   VERIFY( equal_elements(c2, c0) );
+ 
+   c1.clear();
+   c1.merge(std::move(c2));
+   VERIFY( c1 == c0 );
+   VERIFY( c2.empty() );
+ }
+ 
+ void
+ test05()
+ {
+   const std::unordered_map<std::string, int> c0
+     { {"one", 10}, {"two", 20}, {"three", 30} };
+ 
+   std::unordered_map<std::string, int> c1 = c0;
+   std::unordered_multimap<std::string, int, xhash<std::string>, equal> c2( c0.begin(), c0.end() );
+   c1.merge(c2);
+   VERIFY( c1 == c0 );
+   VERIFY( equal_elements(c2, c0) );
+ 
+   c1.clear();
+   c1.merge(c2);
+   VERIFY( c1 == c0 );
+   VERIFY( c2.empty() );
+ 
+   c2.merge(c1);
+   VERIFY( c1.empty() );
+   VERIFY( equal_elements(c2, c0) );
+ 
+   c1 = c0;
+   c2.merge(c1);
+   VERIFY( c1.empty() );
+   VERIFY( c2.size() == (2 * c0.size()) );
+   VERIFY( c2.count("one") == 2 );
+   VERIFY( c2.count("two") == 2 );
+   VERIFY( c2.count("three") == 2 );
+ 
+   c1.merge(c2);
+   VERIFY( c1 == c0 );
+   VERIFY( equal_elements(c2, c0) );
+ 
+   c1.merge(std::move(c2));
+   VERIFY( c1 == c0 );
+   VERIFY( equal_elements(c2, c0) );
+ 
+   c1.clear();
+   c1.merge(std::move(c2));
+   VERIFY( c1 == c0 );
+   VERIFY( c2.empty() );
+ }
+ 
+ template<typename T>
+   using hash_f =
+     std::function<std::size_t(const T&)>;
+ 
+ std::size_t
+ hash_func(const std::string& str)
+ { return std::hash<std::string>{}(str);  }
+ 
+ std::size_t
+ xhash_func(const std::string& str)
+ { return xhash<std::string>{}(str); }
+ 
+ namespace std
+ {
+   template<typename T>
+     struct __is_fast_hash<hash_f<T>> : __is_fast_hash<std::hash<T>>
+     { };
+ }
+ 
+ void
+ test06()
+ {
+   const std::unordered_map<std::string, int, hash_f<std::string>, equal>
+     c0({ {"one", 10}, {"two", 20}, {"three", 30} }, 3, &hash_func);
+ 
+   std::unordered_map<std::string, int, hash_f<std::string>, equal>
+     c1(3, &hash_func);
+   c1 = c0;
+   std::unordered_multimap<std::string, int, hash_f<std::string>, equal>
+     c2(c0.begin(), c0.end(), 3, &xhash_func);
+   c1.merge(c2);
+   VERIFY( c1 == c0 );
+   VERIFY( equal_elements(c2, c0) );
+ 
+   c1.clear();
+   c1.merge(c2);
+   VERIFY( c1 == c0 );
+   VERIFY( c2.empty() );
+ 
+   c2.merge(c1);
+   VERIFY( c1.empty() );
+   VERIFY( equal_elements(c2, c0) );
+ 
+   c1 = c0;
+   c2.merge(c1);
+   VERIFY( c1.empty() );
+   VERIFY( c2.size() == (2 * c0.size()) );
+   VERIFY( c2.count("one") == 2 );
+   VERIFY( c2.count("two") == 2 );
+   VERIFY( c2.count("three") == 2 );
+ 
+   c1.merge(c2);
+   VERIFY( c1 == c0 );
+   VERIFY( equal_elements(c2, c0) );
+ 
+   c1.merge(std::move(c2));
+   VERIFY( c1 == c0 );
+   VERIFY( equal_elements(c2, c0) );
+ 
+   c1.clear();
+   c1.merge(std::move(c2));
+   VERIFY( c1 == c0 );
+   VERIFY( c2.empty() );
+ }
+ 
  int
  main()
  {
    test01();
    test02();
    test03();
+   test04();
+   test05();
+   test06();
  }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/23_containers/unordered_multiset/modifiers/114401.cc gcc-12.4.0/libstdc++-v3/testsuite/23_containers/unordered_multiset/modifiers/114401.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/23_containers/unordered_multiset/modifiers/114401.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/23_containers/unordered_multiset/modifiers/114401.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,126 ----
+ // { dg-do run { target c++17 } }
+ 
+ // PR libstdc++/114401 allocator destructor omitted when reinserting node_handle
+ 
+ #include <unordered_set>
+ #include <memory>
+ #include <testsuite_hooks.h>
+ 
+ template<typename T>
+ struct Alloc
+ {
+   using value_type = T;
+   using propagate_on_container_copy_assignment = std::true_type;
+   using propagate_on_container_move_assignment = std::true_type;
+   using propagate_on_container_swap = std::true_type;
+ 
+   Alloc(int identity) : id(std::make_shared<int>(identity)) { }
+ 
+   template<typename U>
+     Alloc(const Alloc<U> a) : id(a.id) { }
+ 
+   T* allocate(std::size_t n) { return std::allocator<T>().allocate(n); }
+   void deallocate(T* p, std::size_t n) { std::allocator<T>().deallocate(p, n); }
+ 
+   template<typename U>
+     friend bool
+     operator==(const Alloc& a, const Alloc<U>& a2)
+     { return a.id == a2.id; }
+ 
+   template<typename U>
+     friend bool
+     operator!=(const Alloc& a, const Alloc<U>& a2)
+     { return !(a == a2); }
+ 
+   std::shared_ptr<int> id;
+ };
+ 
+ using test_type
+   = std::unordered_multiset<int, std::hash<int>, std::equal_to<int>, Alloc<int>>;
+ 
+ void
+ test_node_ops()
+ {
+   test_type s1({1,3,5}, 3, Alloc<int>(1));
+   test_type s2({2,4,6,8}, 4, Alloc<int>(2));
+   VERIFY( s1.get_allocator() != s2.get_allocator() );
+ 
+   auto node_a = s1.extract(1);
+   VERIFY( ! node_a.empty() );
+   VERIFY( node_a.get_allocator() == s1.get_allocator() );
+ 
+   node_a = std::move(node_a); // self-move
+   VERIFY( node_a.empty() );
+ 
+   swap(node_a, node_a); // self-swap
+   VERIFY( node_a.empty() );
+ 
+   auto node_b = s2.extract(2);
+   VERIFY( node_b.get_allocator() == s2.get_allocator() );
+ 
+   node_a = std::move(node_b); // empty = !empty
+   VERIFY( node_a.get_allocator() == s2.get_allocator() );
+   VERIFY( node_b.empty() );
+ 
+   swap(node_a, node_b); // swap(!empty, empty)
+   VERIFY( node_a.empty() );
+   VERIFY( node_b.get_allocator() == s2.get_allocator() );
+ 
+   swap(node_a, node_b); // swap(empty, !empty)
+   VERIFY( node_a.get_allocator() == s2.get_allocator() );
+   VERIFY( node_b.empty() );
+ 
+   node_a = s1.extract(3); // !empty = !empty
+   VERIFY( node_a.get_allocator() == s1.get_allocator() );
+   node_b = s2.extract(0); // empty = empty
+   VERIFY( node_b.empty() );
+   node_b = s2.extract(6); // empty = !empty
+   VERIFY( node_b.get_allocator() == s2.get_allocator() );
+ 
+   swap(node_a, node_b); // swap(!empty, !empty)
+   VERIFY( node_a.get_allocator() == s2.get_allocator() );
+   VERIFY( node_b.get_allocator() == s1.get_allocator() );
+ 
+   node_a = {};
+   node_b = std::move(node_a); // !empty = empty
+   VERIFY( node_a.empty() );
+   VERIFY( node_b.empty() );
+ 
+   swap(node_a, node_b); // swap(empty, empty)
+   VERIFY( node_a.empty() );
+   VERIFY( node_b.empty() );
+ }
+ 
+ void
+ test_alloc_lifetime()
+ {
+   Alloc<int> a(1);
+   test_type s({1,2,3}, 3, a);
+   VERIFY( a.id.use_count() == 2 ); // a and the copy in s
+ 
+   s.insert(s.extract(1));
+   VERIFY( a.id.use_count() == 2 );
+ 
+   s.insert(s.begin(), s.extract(2));
+   VERIFY( a.id.use_count() == 2 );
+ 
+   auto node = s.extract(1);
+   VERIFY( a.id.use_count() == 3 );
+   node = s.extract(0);
+   VERIFY( a.id.use_count() == 2 );
+ 
+   s.insert(std::move(node));
+   VERIFY( a.id.use_count() == 2 );
+ 
+   s.merge(test_type(s));
+   VERIFY( a.id.use_count() == 2 );
+ 
+   s.merge(test_type({4,5,6}, 3, a));
+   VERIFY( a.id.use_count() == 2 );
+ }
+ 
+ int main()
+ {
+   test_node_ops();
+   test_alloc_lifetime();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/23_containers/unordered_set/modifiers/114401.cc gcc-12.4.0/libstdc++-v3/testsuite/23_containers/unordered_set/modifiers/114401.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/23_containers/unordered_set/modifiers/114401.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/23_containers/unordered_set/modifiers/114401.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,126 ----
+ // { dg-do run { target c++17 } }
+ 
+ // PR libstdc++/114401 allocator destructor omitted when reinserting node_handle
+ 
+ #include <unordered_set>
+ #include <memory>
+ #include <testsuite_hooks.h>
+ 
+ template<typename T>
+ struct Alloc
+ {
+   using value_type = T;
+   using propagate_on_container_copy_assignment = std::true_type;
+   using propagate_on_container_move_assignment = std::true_type;
+   using propagate_on_container_swap = std::true_type;
+ 
+   Alloc(int identity) : id(std::make_shared<int>(identity)) { }
+ 
+   template<typename U>
+     Alloc(const Alloc<U> a) : id(a.id) { }
+ 
+   T* allocate(std::size_t n) { return std::allocator<T>().allocate(n); }
+   void deallocate(T* p, std::size_t n) { std::allocator<T>().deallocate(p, n); }
+ 
+   template<typename U>
+     friend bool
+     operator==(const Alloc& a, const Alloc<U>& a2)
+     { return a.id == a2.id; }
+ 
+   template<typename U>
+     friend bool
+     operator!=(const Alloc& a, const Alloc<U>& a2)
+     { return !(a == a2); }
+ 
+   std::shared_ptr<int> id;
+ };
+ 
+ using test_type
+   = std::unordered_set<int, std::hash<int>, std::equal_to<int>, Alloc<int>>;
+ 
+ void
+ test_node_ops()
+ {
+   test_type s1({1,3,5}, 3, Alloc<int>(1));
+   test_type s2({2,4,6,8}, 4, Alloc<int>(2));
+   VERIFY( s1.get_allocator() != s2.get_allocator() );
+ 
+   auto node_a = s1.extract(1);
+   VERIFY( ! node_a.empty() );
+   VERIFY( node_a.get_allocator() == s1.get_allocator() );
+ 
+   node_a = std::move(node_a); // self-move
+   VERIFY( node_a.empty() );
+ 
+   swap(node_a, node_a); // self-swap
+   VERIFY( node_a.empty() );
+ 
+   auto node_b = s2.extract(2);
+   VERIFY( node_b.get_allocator() == s2.get_allocator() );
+ 
+   node_a = std::move(node_b); // empty = !empty
+   VERIFY( node_a.get_allocator() == s2.get_allocator() );
+   VERIFY( node_b.empty() );
+ 
+   swap(node_a, node_b); // swap(!empty, empty)
+   VERIFY( node_a.empty() );
+   VERIFY( node_b.get_allocator() == s2.get_allocator() );
+ 
+   swap(node_a, node_b); // swap(empty, !empty)
+   VERIFY( node_a.get_allocator() == s2.get_allocator() );
+   VERIFY( node_b.empty() );
+ 
+   node_a = s1.extract(3); // !empty = !empty
+   VERIFY( node_a.get_allocator() == s1.get_allocator() );
+   node_b = s2.extract(0); // empty = empty
+   VERIFY( node_b.empty() );
+   node_b = s2.extract(6); // empty = !empty
+   VERIFY( node_b.get_allocator() == s2.get_allocator() );
+ 
+   swap(node_a, node_b); // swap(!empty, !empty)
+   VERIFY( node_a.get_allocator() == s2.get_allocator() );
+   VERIFY( node_b.get_allocator() == s1.get_allocator() );
+ 
+   node_a = {};
+   node_b = std::move(node_a); // !empty = empty
+   VERIFY( node_a.empty() );
+   VERIFY( node_b.empty() );
+ 
+   swap(node_a, node_b); // swap(empty, empty)
+   VERIFY( node_a.empty() );
+   VERIFY( node_b.empty() );
+ }
+ 
+ void
+ test_alloc_lifetime()
+ {
+   Alloc<int> a(1);
+   test_type s({1,2,3}, 3, a);
+   VERIFY( a.id.use_count() == 2 ); // a and the copy in s
+ 
+   s.insert(s.extract(1));
+   VERIFY( a.id.use_count() == 2 );
+ 
+   s.insert(s.begin(), s.extract(2));
+   VERIFY( a.id.use_count() == 2 );
+ 
+   auto node = s.extract(1);
+   VERIFY( a.id.use_count() == 3 );
+   node = s.extract(0);
+   VERIFY( a.id.use_count() == 2 );
+ 
+   s.insert(std::move(node));
+   VERIFY( a.id.use_count() == 2 );
+ 
+   s.merge(test_type(s));
+   VERIFY( a.id.use_count() == 2 );
+ 
+   s.merge(test_type({4,5,6}, 3, a));
+   VERIFY( a.id.use_count() == 2 );
+ }
+ 
+ int main()
+ {
+   test_node_ops();
+   test_alloc_lifetime();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/23_containers/vector/cons/destroy-adl.cc gcc-12.4.0/libstdc++-v3/testsuite/23_containers/vector/cons/destroy-adl.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/23_containers/vector/cons/destroy-adl.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/23_containers/vector/cons/destroy-adl.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,11 ----
+ // { dg-do compile }
+ 
+ #include <vector>
+ 
+ template<class T> struct Holder { T t; }; // { dg-bogus "incomplete type" }
+ struct Incomplete;
+ 
+ void destroy(std::vector<Holder<Incomplete>*>* p)
+ {
+   p->~vector();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/1.cc gcc-12.4.0/libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/1.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/1.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/1.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,70 ----
+ // { dg-do run { target c++11 } }
+ 
+ #include <vector>
+ #include <testsuite_hooks.h>
+ 
+ void
+ test01()
+ {
+   std::vector<int> c;
+   std::vector<int>::iterator pos;
+ 
+   // libstdc++/52799
+   pos = c.emplace(c.begin());
+   VERIFY( c.size() == 1 );
+   VERIFY( c[0] == 0 );
+   VERIFY( pos == c.begin() );
+   pos = c.emplace(c.begin(), 2);
+   VERIFY( c.size() == 2 );
+   VERIFY( c[0] == 2 );
+   VERIFY( c[1] == 0 );
+   VERIFY( pos == c.begin() );
+   pos = c.emplace(c.end(), 3);
+   VERIFY( c.size() == 3 );
+   VERIFY( c[0] == 2 );
+   VERIFY( c[1] == 0 );
+   VERIFY( c[2] == 3 );
+   VERIFY( pos == --c.end() );
+ 
+   // const_iterator
+   pos = c.emplace(c.cbegin());
+   VERIFY( c.size() == 4 );
+   VERIFY( c[0] == 0 );
+   VERIFY( c[1] == 2 );
+   VERIFY( pos == c.cbegin() );
+   pos = c.emplace(c.cbegin() + 2, 22);
+   VERIFY( c.size() == 5 );
+   VERIFY( c[0] == 0 );
+   VERIFY( c[1] == 2 );
+   VERIFY( c[2] == 22 );
+   VERIFY( pos == c.cbegin() + 2 );
+ }
+ 
+ struct V
+ {
+   explicit V(int a, int b = 0) : val(a+b) { }
+   int val;
+ };
+ 
+ void
+ test02()
+ {
+   std::vector<V> c;
+   std::vector<V>::iterator pos;
+ 
+   pos = c.emplace(c.end(), 1);
+   VERIFY( c.size() == 1 );
+   VERIFY( c[0].val == 1 );
+   VERIFY( pos == --c.end() );
+   pos = c.emplace(c.cend(), 2, 3);
+   VERIFY( c.size() == 2 );
+   VERIFY( c[0].val == 1 );
+   VERIFY( c[1].val == 5 );
+   VERIFY( pos == --c.cend() );
+ }
+ 
+ int main()
+ {
+   test01();
+   test02();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/52799.cc gcc-12.4.0/libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/52799.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/52799.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/52799.cc	Thu Jan  1 00:00:00 1970
***************
*** 1,27 ****
- // { dg-do compile { target c++11 } }
- 
- // Copyright (C) 2012-2022 Free Software Foundation, Inc.
- //
- // This file is part of the GNU ISO C++ Library.  This library is free
- // software; you can redistribute it and/or modify it under the
- // terms of the GNU General Public License as published by the
- // Free Software Foundation; either version 3, or (at your option)
- // any later version.
- 
- // This library is distributed in the hope that it will be useful,
- // but WITHOUT ANY WARRANTY; without even the implied warranty of
- // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- // GNU General Public License for more details.
- 
- // You should have received a copy of the GNU General Public License along
- // with this library; see the file COPYING3.  If not see
- // <http://www.gnu.org/licenses/>.
- 
- #include <vector>
- 
- // libstdc++/52799
- int main()
- {
-   std::vector<int> v;
-   v.emplace(v.begin());
- }
--- 0 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/const_iterator.cc gcc-12.4.0/libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/const_iterator.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/const_iterator.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/const_iterator.cc	Thu Jan  1 00:00:00 1970
***************
*** 1,26 ****
- // { dg-do compile { target c++11 } }
- 
- // Copyright (C) 2013-2022 Free Software Foundation, Inc.
- //
- // This file is part of the GNU ISO C++ Library.  This library is free
- // software; you can redistribute it and/or modify it under the
- // terms of the GNU General Public License as published by the
- // Free Software Foundation; either version 3, or (at your option)
- // any later version.
- 
- // This library is distributed in the hope that it will be useful,
- // but WITHOUT ANY WARRANTY; without even the implied warranty of
- // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- // GNU General Public License for more details.
- 
- // You should have received a copy of the GNU General Public License along
- // with this library; see the file COPYING3.  If not see
- // <http://www.gnu.org/licenses/>.
- 
- #include <vector>
- 
- void test01()
- {
-   std::vector<int> v1;
-   v1.emplace(v1.cbegin(), 1);
- }
--- 0 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++11.cc gcc-12.4.0/libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++11.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++11.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++11.cc	Thu Jun 20 08:08:10 2024
*************** namespace std
*** 28,33 ****
    template<class C> auto end(C& c) -> decltype(c.end());
    template<class C> auto end(const C& c) -> decltype(c.end());
  
!   template<class T, size_t N> T* begin(T (&array)[N]);
!   template<class T, size_t N> T* end(T (&array)[N]);
  }
--- 28,33 ----
    template<class C> auto end(C& c) -> decltype(c.end());
    template<class C> auto end(const C& c) -> decltype(c.end());
  
!   template<class T, size_t N> T* begin(T (&array)[N]) noexcept;
!   template<class T, size_t N> T* end(T (&array)[N]) noexcept;
  }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++14.cc gcc-12.4.0/libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++14.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++14.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++14.cc	Thu Jun 20 08:08:10 2024
*************** namespace std
*** 28,35 ****
    template<class C> auto end(C& c) -> decltype(c.end());
    template<class C> auto end(const C& c) -> decltype(c.end());
  
!   template<class T, size_t N> constexpr T* begin(T (&array)[N]);
!   template<class T, size_t N> constexpr T* end(T (&array)[N]);
  
    template<class C> auto cbegin(const C& c) -> decltype(c.begin());
    template<class C> auto cend(const C& c) -> decltype(c.end());
--- 28,35 ----
    template<class C> auto end(C& c) -> decltype(c.end());
    template<class C> auto end(const C& c) -> decltype(c.end());
  
!   template<class T, size_t N> constexpr T* begin(T (&array)[N]) noexcept;
!   template<class T, size_t N> constexpr T* end(T (&array)[N]) noexcept;
  
    template<class C> auto cbegin(const C& c) -> decltype(c.begin());
    template<class C> auto cend(const C& c) -> decltype(c.end());
*************** namespace std
*** 41,54 ****
    template<class C> auto rend(const C& c) -> decltype(c.rend());
  
    template<class T, size_t N>
!     reverse_iterator<T*> rbegin(T (&array)[N]);
    template<class T, size_t N>
!     reverse_iterator<T*> rend(T (&array)[N]);
  
    template<class E>
!     reverse_iterator<const E*> rbegin(initializer_list<E>);
    template<class E>
!     reverse_iterator<const E*> rend(initializer_list<E>);
  
    template<class C>
      auto crbegin(const C& c) -> decltype(std::rbegin(c));
--- 41,54 ----
    template<class C> auto rend(const C& c) -> decltype(c.rend());
  
    template<class T, size_t N>
!     reverse_iterator<T*> rbegin(T (&array)[N]) noexcept;
    template<class T, size_t N>
!     reverse_iterator<T*> rend(T (&array)[N]) noexcept;
  
    template<class E>
!     reverse_iterator<const E*> rbegin(initializer_list<E>) noexcept;
    template<class E>
!     reverse_iterator<const E*> rend(initializer_list<E>) noexcept;
  
    template<class C>
      auto crbegin(const C& c) -> decltype(std::rbegin(c));
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++17.cc gcc-12.4.0/libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++17.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++17.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++17.cc	Thu Jun 20 08:08:10 2024
*************** namespace std
*** 27,34 ****
    template<class C> constexpr auto end(C& c) -> decltype(c.end());
    template<class C> constexpr auto end(const C& c) -> decltype(c.end());
  
!   template<class T, size_t N> constexpr T* begin(T (&array)[N]);
!   template<class T, size_t N> constexpr T* end(T (&array)[N]);
  
    template<class C> constexpr auto cbegin(const C& c) -> decltype(c.begin());
    template<class C> constexpr auto cend(const C& c) -> decltype(c.end());
--- 27,34 ----
    template<class C> constexpr auto end(C& c) -> decltype(c.end());
    template<class C> constexpr auto end(const C& c) -> decltype(c.end());
  
!   template<class T, size_t N> constexpr T* begin(T (&array)[N]) noexcept;
!   template<class T, size_t N> constexpr T* end(T (&array)[N]) noexcept;
  
    template<class C> constexpr auto cbegin(const C& c) -> decltype(c.begin());
    template<class C> constexpr auto cend(const C& c) -> decltype(c.end());
*************** namespace std
*** 40,53 ****
    template<class C> constexpr auto rend(const C& c) -> decltype(c.rend());
  
    template<class T, size_t N>
!     constexpr reverse_iterator<T*> rbegin(T (&array)[N]);
    template<class T, size_t N>
!     constexpr reverse_iterator<T*> rend(T (&array)[N]);
  
    template<class E>
!     constexpr reverse_iterator<const E*> rbegin(initializer_list<E>);
    template<class E>
!     constexpr reverse_iterator<const E*> rend(initializer_list<E>);
  
    template<class C>
      constexpr auto crbegin(const C& c) -> decltype(std::rbegin(c));
--- 40,53 ----
    template<class C> constexpr auto rend(const C& c) -> decltype(c.rend());
  
    template<class T, size_t N>
!     constexpr reverse_iterator<T*> rbegin(T (&array)[N]) noexcept;
    template<class T, size_t N>
!     constexpr reverse_iterator<T*> rend(T (&array)[N]) noexcept;
  
    template<class E>
!     constexpr reverse_iterator<const E*> rbegin(initializer_list<E>) noexcept;
    template<class E>
!     constexpr reverse_iterator<const E*> rend(initializer_list<E>) noexcept;
  
    template<class C>
      constexpr auto crbegin(const C& c) -> decltype(std::rbegin(c));
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/24_iterators/indirect_callable/projected-adl.cc gcc-12.4.0/libstdc++-v3/testsuite/24_iterators/indirect_callable/projected-adl.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/24_iterators/indirect_callable/projected-adl.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/24_iterators/indirect_callable/projected-adl.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,42 ----
+ // { dg-options "-std=gnu++20" }
+ // { dg-do compile { target c++20 } }
+ 
+ // P2538R1 ADL-proof std::projected
+ // https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p2538r1.html
+ 
+ #include <iterator>
+ 
+ template<typename T>
+   concept has_diff_type = requires { typename T::difference_type; };
+ 
+ static_assert( has_diff_type<std::projected<int*, void(*)(int)>> );
+ 
+ struct Indy {
+   using value_type = int;
+   int operator*() const { return 0; }
+ };
+ static_assert( ! std::weakly_incrementable<Indy> );
+ static_assert( ! has_diff_type<std::projected<Indy, void(*)(int)>> );
+ 
+ 
+ // Examples from the paper:
+ 
+ template<class T> struct Holder { T t; };
+ struct Incomplete;
+ 
+ void test_concepts()
+ {
+   using T = Holder<Incomplete>*;
+   static_assert(std::equality_comparable<T>);
+   (void) std::indirectly_comparable<T*, T*, std::equal_to<>>;
+   (void) std::sortable<T*>;
+ }
+ 
+ #include <algorithm>
+ 
+ void test_count()
+ {
+   Holder<Incomplete>* a = nullptr;
+   (void) std::count(&a, &a, nullptr);
+   (void) std::ranges::count(&a, &a, nullptr); // { dg-bogus "." }
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/24_iterators/istream_iterator/cons/constexpr.cc gcc-12.4.0/libstdc++-v3/testsuite/24_iterators/istream_iterator/cons/constexpr.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/24_iterators/istream_iterator/cons/constexpr.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/24_iterators/istream_iterator/cons/constexpr.cc	Thu Jun 20 08:08:10 2024
*************** int main()
*** 24,28 ****
--- 24,33 ----
  {
    __gnu_test::constexpr_default_constructible test;
    test.operator()<std::istream_iterator<char>>();
+ 
+   // LWG 3600. Making istream_iterator copy constructor trivial is an ABI break
+   __gnu_test::constexpr_single_value_constructible test2;
+   test2.operator()<std::istream_iterator<char>, std::istream_iterator<char>>();
+ 
    return 0;
  }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/copy/108846.cc gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/copy/108846.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/copy/108846.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/copy/108846.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,58 ----
+ // { dg-do run }
+ 
+ #include <algorithm>
+ #include <testsuite_hooks.h>
+ 
+ // PR libstdc++/108846 std::copy, std::copy_n and std::copy_backward
+ // on potentially overlapping subobjects
+ 
+ struct B {
+     B(int i, short j) : i(i), j(j) {}
+     int i;
+     short j;
+ };
+ struct D : B {
+     D(int i, short j, short x) : B(i, j), x(x) {}
+     short x; // Stored in tail padding of B
+ };
+ 
+ void
+ test_pr108846()
+ {
+     D ddst(1, 2, 3);
+     D dsrc(4, 5, 6);
+     B *dst = &ddst;
+     B *src = &dsrc;
+     // If this is optimized to memmove it will overwrite tail padding.
+     std::copy(src, src+1, dst);
+     VERIFY(ddst.x == 3);
+ }
+ 
+ struct B2 {
+     B2(int i, short j) : i(i), j(j) {}
+     B2& operator=(B2& b) { i = b.i; j = b.j; return *this; }
+     int i;
+     short j;
+ };
+ struct D2 : B2 {
+     D2(int i, short j, short x) : B2(i, j), x(x) {}
+     short x; // Stored in tail padding of B2
+ };
+ 
+ void
+ test_non_const_copy_assign()
+ {
+     D2 ddst(1, 2, 3);
+     D2 dsrc(4, 5, 6);
+     B2 *dst = &ddst;
+     B2 *src = &dsrc;
+     // Ensure the not-taken trivial copy path works for this type.
+     std::copy(src, src+1, dst);
+     VERIFY(ddst.x == 3);
+ }
+ 
+ int main()
+ {
+   test_pr108846();
+   test_non_const_copy_assign();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/copy_backward/108846.cc gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/copy_backward/108846.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/copy_backward/108846.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/copy_backward/108846.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,58 ----
+ // { dg-do run }
+ 
+ #include <algorithm>
+ #include <testsuite_hooks.h>
+ 
+ // PR libstdc++/108846 std::copy, std::copy_n and std::copy_backward
+ // on potentially overlapping subobjects
+ 
+ struct B {
+     B(int i, short j) : i(i), j(j) {}
+     int i;
+     short j;
+ };
+ struct D : B {
+     D(int i, short j, short x) : B(i, j), x(x) {}
+     short x; // Stored in tail padding of B
+ };
+ 
+ void
+ test_pr108846()
+ {
+     D ddst(1, 2, 3);
+     D dsrc(4, 5, 6);
+     B *dst = &ddst;
+     B *src = &dsrc;
+     // If this is optimized to memmove it will overwrite tail padding.
+     std::copy_backward(src, src+1, dst+1);
+     VERIFY(ddst.x == 3);
+ }
+ 
+ struct B2 {
+     B2(int i, short j) : i(i), j(j) {}
+     B2& operator=(B2& b) { i = b.i; j = b.j; return *this; }
+     int i;
+     short j;
+ };
+ struct D2 : B2 {
+     D2(int i, short j, short x) : B2(i, j), x(x) {}
+     short x; // Stored in tail padding of B2
+ };
+ 
+ void
+ test_non_const_copy_assign()
+ {
+     D2 ddst(1, 2, 3);
+     D2 dsrc(4, 5, 6);
+     B2 *dst = &ddst;
+     B2 *src = &dsrc;
+     // Ensure the not-taken trivial copy path works for this type.
+     std::copy_backward(src, src+1, dst+1);
+     VERIFY(ddst.x == 3);
+ }
+ 
+ int main()
+ {
+   test_pr108846();
+   test_non_const_copy_assign();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/copy_n/108846.cc gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/copy_n/108846.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/copy_n/108846.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/copy_n/108846.cc	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,58 ----
+ // { dg-do run { target c++11 } }
+ 
+ #include <algorithm>
+ #include <testsuite_hooks.h>
+ 
+ // PR libstdc++/108846 std::copy, std::copy_n and std::copy_backward
+ // on potentially overlapping subobjects
+ 
+ struct B {
+     B(int i, short j) : i(i), j(j) {}
+     int i;
+     short j;
+ };
+ struct D : B {
+     D(int i, short j, short x) : B(i, j), x(x) {}
+     short x; // Stored in tail padding of B
+ };
+ 
+ void
+ test_pr108846()
+ {
+     D ddst(1, 2, 3);
+     D dsrc(4, 5, 6);
+     B *dst = &ddst;
+     B *src = &dsrc;
+     // If this is optimized to memmove it will overwrite tail padding.
+     std::copy_n(src, 1, dst);
+     VERIFY(ddst.x == 3);
+ }
+ 
+ struct B2 {
+     B2(int i, short j) : i(i), j(j) {}
+     B2& operator=(B2&) = default;
+     int i;
+     short j;
+ };
+ struct D2 : B2 {
+     D2(int i, short j, short x) : B2(i, j), x(x) {}
+     short x; // Stored in tail padding of B2
+ };
+ 
+ void
+ test_non_const_copy_assign()
+ {
+     D2 ddst(1, 2, 3);
+     D2 dsrc(4, 5, 6);
+     B2 *dst = &ddst;
+     B2 *src = &dsrc;
+     // Ensure the not-taken trivial copy path works for this type.
+     std::copy_n(src, 1, dst);
+     VERIFY(ddst.x == 3);
+ }
+ 
+ int main()
+ {
+   test_pr108846();
+   test_non_const_copy_assign();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/lexicographical_compare_three_way/113960.cc gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/lexicographical_compare_three_way/113960.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/lexicographical_compare_three_way/113960.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/lexicographical_compare_three_way/113960.cc	Thu Jun 20 08:08:11 2024
***************
*** 0 ****
--- 1,15 ----
+ // { dg-do run { target c++20 } }
+ 
+ // PR libstdc++/113960
+ // std::map with std::vector as input overwrites itself with c++20, on s390x
+ 
+ #include <algorithm>
+ #include <testsuite_hooks.h>
+ 
+ int main()
+ {
+   unsigned short a1[] { 1, 2, 3 };
+   unsigned short a2[] { 1, 2, 4 };
+   // Incorrect memcmp comparison for big endian targets.
+   VERIFY( std::lexicographical_compare_three_way(a1, a1+3, a2, a2+3) < 0 );
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/move/108846.cc gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/move/108846.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/move/108846.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/move/108846.cc	Thu Jun 20 08:08:11 2024
***************
*** 0 ****
--- 1,58 ----
+ // { dg-do run { target c++11 } }
+ 
+ #include <algorithm>
+ #include <testsuite_hooks.h>
+ 
+ // PR libstdc++/108846 std::copy, std::copy_n and std::copy_backward
+ // on potentially overlapping subobjects
+ 
+ struct B {
+     B(int i, short j) : i(i), j(j) {}
+     int i;
+     short j;
+ };
+ struct D : B {
+     D(int i, short j, short x) : B(i, j), x(x) {}
+     short x; // Stored in tail padding of B
+ };
+ 
+ void
+ test_pr108846()
+ {
+     D ddst(1, 2, 3);
+     D dsrc(4, 5, 6);
+     B *dst = &ddst;
+     B *src = &dsrc;
+     // If this is optimized to memmove it will overwrite tail padding.
+     std::move(src, src+1, dst);
+     VERIFY(ddst.x == 3);
+ }
+ 
+ struct B3 {
+     B3(int i, short j) : i(i), j(j) {}
+     B3& operator=(B3&&) = default;
+     int i;
+     short j;
+ };
+ struct D3 : B3 {
+     D3(int i, short j, short x) : B3(i, j), x(x) {}
+     short x; // Stored in tail padding of B3
+ };
+ 
+ void
+ test_move_only()
+ {
+     D3 ddst(1, 2, 3);
+     D3 dsrc(4, 5, 6);
+     B3 *dst = &ddst;
+     B3 *src = &dsrc;
+     // Ensure the not-taken trivial copy path works for this type.
+     std::move(src, src+1, dst);
+     VERIFY(ddst.x == 3);
+ }
+ 
+ int main()
+ {
+   test_pr108846();
+   test_move_only();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/move_backward/108846.cc gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/move_backward/108846.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/move_backward/108846.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/move_backward/108846.cc	Thu Jun 20 08:08:11 2024
***************
*** 0 ****
--- 1,58 ----
+ // { dg-do run { target c++11 } }
+ 
+ #include <algorithm>
+ #include <testsuite_hooks.h>
+ 
+ // PR libstdc++/108846 std::copy, std::copy_n and std::copy_backward
+ // on potentially overlapping subobjects
+ 
+ struct B {
+     B(int i, short j) : i(i), j(j) {}
+     int i;
+     short j;
+ };
+ struct D : B {
+     D(int i, short j, short x) : B(i, j), x(x) {}
+     short x; // Stored in tail padding of B
+ };
+ 
+ void
+ test_pr108846()
+ {
+     D ddst(1, 2, 3);
+     D dsrc(4, 5, 6);
+     B *dst = &ddst;
+     B *src = &dsrc;
+     // If this is optimized to memmove it will overwrite tail padding.
+     std::move_backward(src, src+1, dst+1);
+     VERIFY(ddst.x == 3);
+ }
+ 
+ struct B3 {
+     B3(int i, short j) : i(i), j(j) {}
+     B3& operator=(B3&&) = default;
+     int i;
+     short j;
+ };
+ struct D3 : B3 {
+     D3(int i, short j, short x) : B3(i, j), x(x) {}
+     short x; // Stored in tail padding of B3
+ };
+ 
+ void
+ test_move_only()
+ {
+     D3 ddst(1, 2, 3);
+     D3 dsrc(4, 5, 6);
+     B3 *dst = &ddst;
+     B3 *src = &dsrc;
+     // Ensure the not-taken trivial copy path works for this type.
+     std::move_backward(src, src+1, dst+1);
+     VERIFY(ddst.x == 3);
+ }
+ 
+ int main()
+ {
+   test_pr108846();
+   test_move_only();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/random_shuffle/1.cc gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/random_shuffle/1.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/random_shuffle/1.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/random_shuffle/1.cc	Thu Jun 20 08:08:11 2024
***************
*** 15,20 ****
--- 15,21 ----
  // with this library; see the file COPYING3.  If not see
  // <http://www.gnu.org/licenses/>.
  
+ // { dg-options "-Wno-deprecated-declarations" }
  // { dg-add-options using-deprecated }
  
  // 25.2.11 random_shuffle()
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/random_shuffle/59603.cc gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/random_shuffle/59603.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/random_shuffle/59603.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/random_shuffle/59603.cc	Thu Jun 20 08:08:11 2024
***************
*** 16,21 ****
--- 16,22 ----
  // <http://www.gnu.org/licenses/>.
  
  // { dg-do run { target c++11 } }
+ // { dg-options "-Wno-deprecated-declarations" }
  // { dg-add-options using-deprecated }
  // { dg-require-debug-mode "" }
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/random_shuffle/deprecated.cc gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/random_shuffle/deprecated.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/random_shuffle/deprecated.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/random_shuffle/deprecated.cc	Thu Jun 20 08:08:11 2024
***************
*** 0 ****
--- 1,18 ----
+ // { dg-do compile }
+ // { dg-add-options using-deprecated }
+ 
+ // std::random_shuffle was deprecated in C++17 and removed in C++17.
+ 
+ #include <algorithm>
+ 
+ std::ptrdiff_t rando(std::ptrdiff_t n);
+ 
+ void
+ test_depr(int* first, int* last)
+ {
+   std::random_shuffle(first, last);
+   // { dg-warning "deprecated" "" { target c++14 } 13 }
+ 
+   std::random_shuffle(first, last, rando);
+   // { dg-warning "deprecated" "" { target c++14 } 16 }
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/random_shuffle/moveable.cc gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/random_shuffle/moveable.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/25_algorithms/random_shuffle/moveable.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/25_algorithms/random_shuffle/moveable.cc	Thu Jun 20 08:08:11 2024
***************
*** 1,4 ****
--- 1,5 ----
  // { dg-do run { target c++11 } }
+ // { dg-options "-Wno-deprecated-declarations" }
  // { dg-add-options using-deprecated }
  
  // Copyright (C) 2009-2022 Free Software Foundation, Inc.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/26_numerics/headers/cmath/109758.cc gcc-12.4.0/libstdc++-v3/testsuite/26_numerics/headers/cmath/109758.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/26_numerics/headers/cmath/109758.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/26_numerics/headers/cmath/109758.cc	Thu Jun 20 08:08:11 2024
***************
*** 0 ****
--- 1,52 ----
+ // { dg-do run }
+ // PR libstdc++/109758 std::abs(__float128) doesn't support NaN
+ 
+ #include <cmath>
+ #include <testsuite_hooks.h>
+ 
+ #if !defined(__STRICT_ANSI__) && defined(_GLIBCXX_USE_FLOAT128)
+ void
+ test_nan()
+ {
+   __float128 nan = __builtin_nanl("");
+   VERIFY( !__builtin_signbit(std::abs(nan)) );
+   VERIFY( !__builtin_signbit(std::abs(-nan)) );
+ }
+ 
+ void
+ test_zero()
+ {
+   __float128 zero = 0.0;
+   VERIFY( !__builtin_signbit(std::abs(zero)) );
+   VERIFY( !__builtin_signbit(std::abs(zero * -2.0)) );
+ }
+ 
+ void
+ test_neg()
+ {
+   VERIFY( std::abs((__float128)-1.0) == -1.0 );
+   VERIFY( std::abs((__float128)-2e9) == -2e9 );
+   VERIFY( std::abs((__float128)-3e-4) == 3e-4 );
+ }
+ 
+ void
+ test_inf()
+ {
+   __float128 inf = __builtin_huge_vall();
+   VERIFY( std::abs(inf) == inf );
+   VERIFY( std::abs(-inf) == inf );
+ }
+ 
+ #if __cplusplus >= 201103L
+ static_assert( std::abs((__float128)-1.0) == (__float128)1.0,
+ 	       "std::abs(__float128) is usable in constant expressions" );
+ #endif
+ 
+ int main()
+ {
+   test_nan();
+   test_zero();
+ }
+ #else
+ int main() { }
+ #endif
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/transform_reduce.cc gcc-12.4.0/libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/transform_reduce.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/transform_reduce.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/transform_reduce.cc	Thu Jun 20 08:08:11 2024
*************** class MyClass
*** 68,74 ****
      }
      friend MyClass operator*(const MyClass& x, const MyClass& y) { return MyClass(x.my_field * y.my_field); }
      bool
!     operator==(const MyClass& in)
      {
          return my_field == in.my_field;
      }
--- 68,74 ----
      }
      friend MyClass operator*(const MyClass& x, const MyClass& y) { return MyClass(x.my_field * y.my_field); }
      bool
!     operator==(const MyClass& in) const
      {
          return my_field == in.my_field;
      }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/26_numerics/random/binomial_distribution/114359.cc gcc-12.4.0/libstdc++-v3/testsuite/26_numerics/random/binomial_distribution/114359.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/26_numerics/random/binomial_distribution/114359.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/26_numerics/random/binomial_distribution/114359.cc	Thu Jun 20 08:08:11 2024
***************
*** 0 ****
--- 1,12 ----
+ // { dg-do run { target c++11 } }
+ 
+ // Bug 114359 - std::binomial_distribution hangs in infinite loop
+ 
+ #include <random>
+ 
+ int main()
+ {
+   std::default_random_engine g{};
+   std::binomial_distribution<std::uint32_t> b(1U << 30);
+   b(g);  // hangs forever
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/26_numerics/random/pr60037-neg.cc gcc-12.4.0/libstdc++-v3/testsuite/26_numerics/random/pr60037-neg.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/26_numerics/random/pr60037-neg.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/26_numerics/random/pr60037-neg.cc	Thu Jun 20 08:08:11 2024
*************** auto x = std::generate_canonical<std::si
*** 12,15 ****
  
  // { dg-error "static assertion failed: template argument must be a floating point type" "" { target *-*-* } 169 }
  
! // { dg-error "static assertion failed: template argument must be a floating point type" "" { target *-*-* } 3356 }
--- 12,15 ----
  
  // { dg-error "static assertion failed: template argument must be a floating point type" "" { target *-*-* } 169 }
  
! // { dg-error "static assertion failed: template argument must be a floating point type" "" { target *-*-* } 3359 }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/lwg3809.cc gcc-12.4.0/libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/lwg3809.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/lwg3809.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/lwg3809.cc	Thu Jun 20 08:08:11 2024
***************
*** 2,11 ****
  #include <random>
  #include <testsuite_hooks.h>
  
- // LWG 3809. Is std::subtract_with_carry_engine<uint16_t> supposed to work?
  // PR 107466 - invalid -Wnarrowing error with std::subtract_with_carry_engine
  
! int main()
  {
    // It should be possible to construct this engine with a 16-bit result_type:
    std::subtract_with_carry_engine<uint16_t, 12, 5, 12> s16;
--- 2,12 ----
  #include <random>
  #include <testsuite_hooks.h>
  
  // PR 107466 - invalid -Wnarrowing error with std::subtract_with_carry_engine
  
! // LWG 3809. Is std::subtract_with_carry_engine<uint16_t> supposed to work?
! void
! test_lwg3809()
  {
    // It should be possible to construct this engine with a 16-bit result_type:
    std::subtract_with_carry_engine<uint16_t, 12, 5, 12> s16;
*************** int main()
*** 24,26 ****
--- 25,41 ----
    for (int i = 0; i < 10; ++i)
      VERIFY( s16() == s32() );
  }
+ 
+ // LWG 4014. LWG 3809 changes behavior of some existing code
+ void
+ test_lwg4014()
+ {
+   std::ranlux48_base g(-1U + 1LL);
+   VERIFY( g() == 22575453646312 );
+ }
+ 
+ int main()
+ {
+   test_lwg3809();
+   test_lwg4014();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/27_io/basic_istringstream/view/char/1.cc gcc-12.4.0/libstdc++-v3/testsuite/27_io/basic_istringstream/view/char/1.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/27_io/basic_istringstream/view/char/1.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/27_io/basic_istringstream/view/char/1.cc	Thu Jun 20 08:08:11 2024
***************
*** 19,25 ****
  
  // { dg-options "-std=gnu++2a" }
  // { dg-do run { target c++2a } }
- // { dg-require-effective-target cxx11_abi }
  
  #include <sstream>
  #include <string_view>
--- 19,24 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/27_io/basic_istringstream/view/wchar_t/1.cc gcc-12.4.0/libstdc++-v3/testsuite/27_io/basic_istringstream/view/wchar_t/1.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/27_io/basic_istringstream/view/wchar_t/1.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/27_io/basic_istringstream/view/wchar_t/1.cc	Thu Jun 20 08:08:11 2024
***************
*** 19,25 ****
  
  // { dg-options "-std=gnu++2a" }
  // { dg-do run { target c++2a } }
- // { dg-require-effective-target cxx11_abi }
  
  #include <sstream>
  #include <string_view>
--- 19,24 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/27_io/basic_ostringstream/view/char/1.cc gcc-12.4.0/libstdc++-v3/testsuite/27_io/basic_ostringstream/view/char/1.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/27_io/basic_ostringstream/view/char/1.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/27_io/basic_ostringstream/view/char/1.cc	Thu Jun 20 08:08:11 2024
***************
*** 19,25 ****
  
  // { dg-options "-std=gnu++2a" }
  // { dg-do run { target c++2a } }
- // { dg-require-effective-target cxx11_abi }
  
  #include <sstream>
  #include <string_view>
--- 19,24 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/27_io/basic_ostringstream/view/wchar_t/1.cc gcc-12.4.0/libstdc++-v3/testsuite/27_io/basic_ostringstream/view/wchar_t/1.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/27_io/basic_ostringstream/view/wchar_t/1.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/27_io/basic_ostringstream/view/wchar_t/1.cc	Thu Jun 20 08:08:11 2024
***************
*** 19,25 ****
  
  // { dg-options "-std=gnu++2a" }
  // { dg-do run { target c++2a } }
- // { dg-require-effective-target cxx11_abi }
  
  #include <sstream>
  #include <string_view>
--- 19,24 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/27_io/basic_stringbuf/view/char/1.cc gcc-12.4.0/libstdc++-v3/testsuite/27_io/basic_stringbuf/view/char/1.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/27_io/basic_stringbuf/view/char/1.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/27_io/basic_stringbuf/view/char/1.cc	Thu Jun 20 08:08:11 2024
***************
*** 19,25 ****
  
  // { dg-options "-std=gnu++2a" }
  // { dg-do run { target c++2a } }
- // { dg-require-effective-target cxx11_abi }
  
  #include <sstream>
  #include <string_view>
--- 19,24 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/27_io/basic_stringbuf/view/wchar_t/1.cc gcc-12.4.0/libstdc++-v3/testsuite/27_io/basic_stringbuf/view/wchar_t/1.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/27_io/basic_stringbuf/view/wchar_t/1.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/27_io/basic_stringbuf/view/wchar_t/1.cc	Thu Jun 20 08:08:11 2024
***************
*** 19,25 ****
  
  // { dg-options "-std=gnu++2a" }
  // { dg-do run { target c++2a } }
- // { dg-require-effective-target cxx11_abi }
  
  #include <sstream>
  #include <string_view>
--- 19,24 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/27_io/basic_stringstream/view/char/1.cc gcc-12.4.0/libstdc++-v3/testsuite/27_io/basic_stringstream/view/char/1.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/27_io/basic_stringstream/view/char/1.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/27_io/basic_stringstream/view/char/1.cc	Thu Jun 20 08:08:11 2024
***************
*** 19,25 ****
  
  // { dg-options "-std=gnu++2a" }
  // { dg-do run { target c++2a } }
- // { dg-require-effective-target cxx11_abi }
  
  #include <sstream>
  #include <string_view>
--- 19,24 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/27_io/basic_stringstream/view/wchar_t/1.cc gcc-12.4.0/libstdc++-v3/testsuite/27_io/basic_stringstream/view/wchar_t/1.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/27_io/basic_stringstream/view/wchar_t/1.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/27_io/basic_stringstream/view/wchar_t/1.cc	Thu Jun 20 08:08:11 2024
***************
*** 19,25 ****
  
  // { dg-options "-std=gnu++2a" }
  // { dg-do run { target c++2a } }
- // { dg-require-effective-target cxx11_abi }
  
  #include <sstream>
  #include <string_view>
--- 19,24 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/27_io/filesystem/operations/copy_file_108178.cc gcc-12.4.0/libstdc++-v3/testsuite/27_io/filesystem/operations/copy_file_108178.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/27_io/filesystem/operations/copy_file_108178.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/27_io/filesystem/operations/copy_file_108178.cc	Thu Jun 20 08:08:11 2024
***************
*** 0 ****
--- 1,33 ----
+ // { dg-do run { target c++17 } }
+ // { dg-require-filesystem-ts "" }
+ 
+ // C++17 30.10.15.4 Copy [fs.op.copy_file]
+ 
+ #include <filesystem>
+ #include <fstream>
+ #include <unistd.h> // getpid
+ #include <testsuite_fs.h>
+ #include <testsuite_hooks.h>
+ 
+ namespace fs = std::filesystem;
+ 
+ void
+ test_procfs() // PR libstdc++/108178
+ {
+   auto pid = ::getpid();
+   std::string from = "/proc/" + std::to_string(pid) + "/status";
+   if (fs::exists(from))
+   {
+     auto to = __gnu_test::nonexistent_path();
+     fs::copy_file(from, to);
+     std::ifstream f(to);
+     VERIFY(f.is_open());
+     VERIFY(f.peek() != std::char_traits<char>::eof());
+     fs::remove(to);
+   }
+ }
+ 
+ int main()
+ {
+   test_procfs();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/27_io/filesystem/operations/equivalent.cc gcc-12.4.0/libstdc++-v3/testsuite/27_io/filesystem/operations/equivalent.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/27_io/filesystem/operations/equivalent.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/27_io/filesystem/operations/equivalent.cc	Thu Jun 20 08:08:11 2024
*************** test01()
*** 34,46 ****
    bool result;
  
    result = equivalent(p1, p2, ec);
!   VERIFY( ec );
    VERIFY( !result );
  
    __gnu_test::scoped_file f1(p1);
    ec = bad_ec;
    result = equivalent(p1, p2, ec);
!   VERIFY( !ec );
    VERIFY( !result );
  
    __gnu_test::scoped_file f2(p2);
--- 34,46 ----
    bool result;
  
    result = equivalent(p1, p2, ec);
!   VERIFY( ec == std::errc::no_such_file_or_directory );
    VERIFY( !result );
  
    __gnu_test::scoped_file f1(p1);
    ec = bad_ec;
    result = equivalent(p1, p2, ec);
!   VERIFY( ec == std::errc::no_such_file_or_directory );
    VERIFY( !result );
  
    __gnu_test::scoped_file f2(p2);
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/27_io/filesystem/path/108636.cc gcc-12.4.0/libstdc++-v3/testsuite/27_io/filesystem/path/108636.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/27_io/filesystem/path/108636.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/27_io/filesystem/path/108636.cc	Thu Jun 20 08:08:11 2024
***************
*** 1,5 ****
--- 1,6 ----
  // { dg-do link { target c++17 } }
  // { dg-options "-fkeep-inline-functions" }
+ // { dg-require-filesystem-ts "" }
  
  #include <filesystem>
  int main()
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/27_io/filesystem/path/construct/95048.cc gcc-12.4.0/libstdc++-v3/testsuite/27_io/filesystem/path/construct/95048.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/27_io/filesystem/path/construct/95048.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/27_io/filesystem/path/construct/95048.cc	Thu Jun 20 08:08:11 2024
*************** test_wide()
*** 16,21 ****
--- 16,23 ----
    VERIFY( CHECK(L, "\U0001F4C1") ); // folder
    VERIFY( CHECK(L, "\U0001F4C2") ); // open folder
    VERIFY( CHECK(L, "\U0001F4C4") ); // filing cabient
+ 
+   VERIFY( path(u8"\U0001D11E").wstring() == L"\U0001D11E" ); // G Clef
  }
  
  void
*************** test_u16()
*** 25,30 ****
--- 27,34 ----
    VERIFY( CHECK(u, "\U0001F4C1") ); // folder
    VERIFY( CHECK(u, "\U0001F4C2") ); // open folder
    VERIFY( CHECK(u, "\U0001F4C4") ); // filing cabient
+ 
+   VERIFY( path(u8"\U0001D11E").u16string() == u"\U0001D11E" ); // G Clef
  }
  
  void
*************** test_u32()
*** 34,39 ****
--- 38,45 ----
    VERIFY( CHECK(U, "\U0001F4C1") ); // folder
    VERIFY( CHECK(U, "\U0001F4C2") ); // open folder
    VERIFY( CHECK(U, "\U0001F4C4") ); // filing cabient
+ 
+   VERIFY( path(u8"\U0001D11E").u32string() == U"\U0001D11E" ); // G Clef
  }
  
  int
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/char/2.cc gcc-12.4.0/libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/char/2.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/char/2.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/char/2.cc	Thu Jun 20 08:08:11 2024
*************** void test01()
*** 35,43 ****
    VERIFY( loc_de != loc_c );
    istringstream iss;
    iss.imbue(loc_de);
!   iss.str("Di 1971");
!   tm time1;
!   iss >> get_time(&time1, "%a %Y");
    VERIFY(time1.tm_wday == 2);
    VERIFY(time1.tm_year == 71);
  }
--- 35,43 ----
    VERIFY( loc_de != loc_c );
    istringstream iss;
    iss.imbue(loc_de);
!   iss.str("1971 Di."); // %a is "Di" on some targets, "Di." on others.
!   tm time1{};
!   iss >> get_time(&time1, "%Y %a");
    VERIFY(time1.tm_wday == 2);
    VERIFY(time1.tm_year == 71);
  }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/28_regex/algorithms/regex_match/107376.cc gcc-12.4.0/libstdc++-v3/testsuite/28_regex/algorithms/regex_match/107376.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/28_regex/algorithms/regex_match/107376.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/28_regex/algorithms/regex_match/107376.cc	Thu Jun 20 08:08:11 2024
***************
*** 0 ****
--- 1,76 ----
+ // { dg-do run { target c++11 } }
+ #include <regex>
+ #include <testsuite_hooks.h>
+ #include <testsuite_allocator.h>
+ 
+ template<typename T>
+ struct Alloc
+ {
+   using value_type = T;
+   explicit Alloc(int) { }
+   template<typename U> Alloc(const Alloc&) { }
+ 
+   T* allocate(std::size_t n)
+   { return std::allocator<T>().allocate(n); }
+   void deallocate(T* ptr, std::size_t n)
+   { std::allocator<T>().deallocate(ptr, n); }
+ 
+   bool operator==(const Alloc&) const { return true; }
+   bool operator!=(const Alloc&) const { return false; }
+ };
+ 
+ void
+ test_non_default_constructible()
+ {
+   using sub_match = std::sub_match<const char*>;
+   using alloc_type = Alloc<sub_match>;
+   using match_results = std::match_results<const char*, alloc_type>;
+   match_results res(alloc_type(1));
+ 
+   std::regex_match("x", res, std::regex(".")); // PR libstdc++/107376
+ }
+ 
+ template<typename T>
+ struct PropAlloc
+ {
+   int id;
+ 
+   using value_type = T;
+   explicit PropAlloc(int id) : id(id) { }
+   template<typename U> PropAlloc(const PropAlloc& a) : id(a.id) { }
+ 
+   using propagate_on_container_move_assignment = std::true_type;
+   using propagate_on_container_copy_assignment = std::true_type;
+ 
+   PropAlloc select_on_container_copy_construction() const
+   { return PropAlloc(0); }
+ 
+   T* allocate(std::size_t n)
+   { return std::allocator<T>().allocate(n); }
+   void deallocate(T* ptr, std::size_t n)
+   { std::allocator<T>().deallocate(ptr, n); }
+ 
+   bool operator==(const PropAlloc& a) const { return id == a.id; }
+   bool operator!=(const PropAlloc& a) const { return id != a.id; }
+ };
+ 
+ void
+ test_propagation()
+ {
+   using sub_match = std::sub_match<const char*>;
+   using alloc_type = PropAlloc<sub_match>;
+   using match_results = std::match_results<const char*, alloc_type>;
+   alloc_type alloc(107376);
+   match_results res(alloc);
+ 
+   std::regex re("..", std::regex_constants::__polynomial);
+   std::regex_match("xx", res, re);
+ 
+   VERIFY( res.get_allocator() == alloc );
+ }
+ 
+ int main()
+ {
+   test_non_default_constructible();
+   test_propagation();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/28_regex/match_results/ctors/char/alloc.cc gcc-12.4.0/libstdc++-v3/testsuite/28_regex/match_results/ctors/char/alloc.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/28_regex/match_results/ctors/char/alloc.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/28_regex/match_results/ctors/char/alloc.cc	Thu Jun 20 08:08:11 2024
***************
*** 0 ****
--- 1,56 ----
+ // { dg-do run { target c++11 } }
+ 
+ #include <regex>
+ #include <testsuite_hooks.h>
+ #include <testsuite_allocator.h>
+ 
+ // LWG 2195. Missing constructors for match_results
+ 
+ void
+ test01()
+ {
+   using Alloc = std::cmatch::allocator_type;
+   std::cmatch m1;
+   std::cmatch m2(m1, m1.get_allocator());
+   VERIFY( m2 == m1 );
+ 
+   static_assert( ! std::is_nothrow_constructible<std::cmatch,
+ 						 const std::cmatch&,
+ 						 const Alloc&>(),
+ 		 "Allocator-extended copy ctor is potentially-throwing" );
+ 
+   std::cmatch m3(std::move(m1), m2.get_allocator());
+   VERIFY( m3 == m2 );
+ 
+   // Libstdc++ extension:
+   static_assert( std::is_nothrow_constructible<std::cmatch,
+ 					       std::cmatch,
+ 					       const Alloc&>(),
+ 		 "Allocator-extended move ctor is non-throwing" );
+ }
+ 
+ void
+ test02()
+ {
+   using Alloc = __gnu_test::uneq_allocator<std::csub_match>;
+   using MR = std::match_results<const char*, Alloc>;
+ 
+   MR m1(Alloc(1));
+   MR m2(m1, Alloc(2));
+   VERIFY( m2 == m1 );
+ 
+   static_assert( ! std::is_nothrow_constructible<MR, const MR&, const Alloc&>(),
+ 		 "Allocator-extended copy ctor is potentially-throwing" );
+ 
+   MR m3(std::move(m1), Alloc(3));
+   VERIFY( m3 == m2 );
+ 
+   static_assert( ! std::is_nothrow_constructible<MR, MR, const Alloc&>(),
+ 		 "Allocator-extended move ctor is potentially-throwing" );
+ }
+ 
+ int main()
+ {
+   test01();
+   test02();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/30_threads/shared_lock/locking/112089.cc gcc-12.4.0/libstdc++-v3/testsuite/30_threads/shared_lock/locking/112089.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/30_threads/shared_lock/locking/112089.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/30_threads/shared_lock/locking/112089.cc	Thu Jun 20 08:08:11 2024
***************
*** 0 ****
--- 1,23 ----
+ // { dg-do run { target c++14 } }
+ // { dg-require-gthreads "" }
+ // { dg-additional-options "-pthread" { target pthread } }
+ 
+ #include <shared_mutex>
+ #include <system_error>
+ #include <testsuite_hooks.h>
+ 
+ // PR libstdc++/112089 shared_lock::unlock should throw operation_not_permitted
+ 
+ int main()
+ {
+   std::shared_lock<std::shared_timed_mutex> l;
+   try
+   {
+     l.unlock();
+     VERIFY( false );
+   }
+   catch (const std::system_error& e)
+   {
+     VERIFY( e.code() == std::errc::operation_not_permitted );
+   }
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/experimental/feat-cxx14.cc gcc-12.4.0/libstdc++-v3/testsuite/experimental/feat-cxx14.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/experimental/feat-cxx14.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/experimental/feat-cxx14.cc	Thu Jun 20 08:08:11 2024
***************
*** 107,113 ****
  #  error "<shared_mutex>"
  #endif
  
! #if defined(_GLIBCXX_HAS_GTHREADS) && defined(_GLIBCXX_USE_C99_STDINT_TR1)
  #  ifndef  __cpp_lib_shared_timed_mutex
  #    error "__cpp_lib_shared_timed_mutex"
  #  elif  __cpp_lib_shared_timed_mutex != 201402
--- 107,113 ----
  #  error "<shared_mutex>"
  #endif
  
! #if defined(_GLIBCXX_HAS_GTHREADS)
  #  ifndef  __cpp_lib_shared_timed_mutex
  #    error "__cpp_lib_shared_timed_mutex"
  #  elif  __cpp_lib_shared_timed_mutex != 201402
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/experimental/filesystem/operations/equivalent.cc gcc-12.4.0/libstdc++-v3/testsuite/experimental/filesystem/operations/equivalent.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/experimental/filesystem/operations/equivalent.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/experimental/filesystem/operations/equivalent.cc	Thu Jun 20 08:08:11 2024
*************** test01()
*** 35,47 ****
    bool result;
  
    result = equivalent(p1, p2, ec);
!   VERIFY( ec );
    VERIFY( !result );
    const auto bad_ec = ec;
  
    __gnu_test::scoped_file f1(p1);
    result = equivalent(p1, p2, ec);
!   VERIFY( !ec );
    VERIFY( !result );
  
    __gnu_test::scoped_file f2(p2);
--- 35,47 ----
    bool result;
  
    result = equivalent(p1, p2, ec);
!   VERIFY( ec == std::errc::no_such_file_or_directory );
    VERIFY( !result );
    const auto bad_ec = ec;
  
    __gnu_test::scoped_file f1(p1);
    result = equivalent(p1, p2, ec);
!   VERIFY( ec == std::errc::no_such_file_or_directory );
    VERIFY( !result );
  
    __gnu_test::scoped_file f2(p2);
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/experimental/filesystem/path/construct/95048.cc gcc-12.4.0/libstdc++-v3/testsuite/experimental/filesystem/path/construct/95048.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/experimental/filesystem/path/construct/95048.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/experimental/filesystem/path/construct/95048.cc	Thu Jun 20 08:08:11 2024
*************** test_wide()
*** 18,23 ****
--- 18,25 ----
    VERIFY( CHECK(L, "\U0001F4C1") ); // folder
    VERIFY( CHECK(L, "\U0001F4C2") ); // open folder
    VERIFY( CHECK(L, "\U0001F4C4") ); // filing cabient
+ 
+   VERIFY( path(u8"\U0001D11E").wstring() == L"\U0001D11E" ); // G Clef
  }
  
  void
*************** test_u16()
*** 27,32 ****
--- 29,36 ----
    VERIFY( CHECK(u, "\U0001F4C1") ); // folder
    VERIFY( CHECK(u, "\U0001F4C2") ); // open folder
    VERIFY( CHECK(u, "\U0001F4C4") ); // filing cabient
+ 
+   VERIFY( path(u8"\U0001D11E").u16string() == u"\U0001D11E" ); // G Clef
  }
  
  void
*************** test_u32()
*** 36,41 ****
--- 40,47 ----
    VERIFY( CHECK(U, "\U0001F4C1") ); // folder
    VERIFY( CHECK(U, "\U0001F4C2") ); // open folder
    VERIFY( CHECK(U, "\U0001F4C4") ); // filing cabient
+ 
+   VERIFY( path(u8"\U0001D11E").u32string() == U"\U0001D11E" ); // G Clef
  }
  
  int
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/experimental/net/internet/network/v6/cons.cc gcc-12.4.0/libstdc++-v3/testsuite/experimental/net/internet/network/v6/cons.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/experimental/net/internet/network/v6/cons.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/experimental/net/internet/network/v6/cons.cc	Thu Jun 20 08:08:11 2024
***************
*** 0 ****
--- 1,74 ----
+ // { dg-do run { target c++14 } }
+ // { dg-require-effective-target net_ts_ip }
+ // { dg-add-options net_ts }
+ 
+ #include <experimental/internet>
+ #include <stdexcept>
+ #include <testsuite_hooks.h>
+ 
+ using std::experimental::net::ip::network_v6;
+ using std::experimental::net::ip::address_v6;
+ 
+ constexpr void
+ test01()
+ {
+   network_v6 n0;
+   VERIFY( n0.address().is_unspecified() );
+   VERIFY( n0.prefix_length() == 0 );
+ }
+ 
+ constexpr void
+ test02()
+ {
+   address_v6 a0;
+   network_v6 n0{ a0, 0 };
+   VERIFY( n0.address() == a0 );
+   VERIFY( n0.prefix_length() == 0 );
+ 
+   address_v6 a1{ address_v6::bytes_type{ 1, 2, 4, 8, 16, 32, 64, 128,
+ 					 3, 7, 47, 71, 83, 165, 199, 255 } };
+   network_v6 n1{ a1, 99};
+   VERIFY( n1.address() == a1 );
+   VERIFY( n1.prefix_length() == 99 );
+ }
+ 
+ void
+ test02_errors()
+ {
+   address_v6 a0;
+   try
+   {
+     network_v6{a0, -1};
+     VERIFY(false);
+   }
+   catch(const std::out_of_range&)
+   {
+   }
+ 
+   try
+   {
+     network_v6{a0, 129};
+     VERIFY(false);
+   }
+   catch(const std::out_of_range&)
+   {
+   }
+ }
+ 
+ constexpr bool
+ test_constexpr()
+ {
+   test01();
+   test02();
+   return true;
+ }
+ 
+ int
+ main()
+ {
+   test01();
+   test02();
+   test02_errors();
+ 
+   static_assert( test_constexpr(), "valid in constant expressions" );
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/pr109261_constexpr_simd.cc gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/pr109261_constexpr_simd.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/pr109261_constexpr_simd.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/pr109261_constexpr_simd.cc	Thu Jun 20 08:08:11 2024
***************
*** 0 ****
--- 1,92 ----
+ // { dg-options "-std=gnu++17" }
+ // { dg-do compile { target c++17 } }
+ // { dg-require-cmath "" }
+ 
+ #include <experimental/simd>
+ 
+ namespace stdx = std::experimental;
+ 
+ template <typename T, typename V>
+   void
+   test01()
+   {
+     constexpr T data[V::size()] = {};
+     constexpr auto a = V(data, stdx::element_aligned);
+ 
+     constexpr auto b = []() constexpr {
+       V x = T(1);
+       where(x > T(), x) = T();
+       where(x < T(), x) += T();
+       where(x >= T(), x) -= T();
+       where(x <= T(), x) *= T();
+       where(x == T(), x) /= T(1);
+       where(x != T(), x) += T(1);
+       return x;
+     }();
+ 
+     constexpr T c = V()[0];
+ 
+     constexpr auto d = !V() && !!V() || !V() & !V() | !V() ^ !V();
+ 
+     constexpr auto e = []() constexpr {
+       T data[V::size()] = {};
+       V(T(1)).copy_to(data, stdx::element_aligned);
+       V x = T();
+       x[0] = T(1);
+       x.copy_from(data, stdx::element_aligned);
+       bool mask[V::size()] = {};
+       auto k = hmin(x + x - x * x) == x / x;
+       k.copy_to(mask, stdx::element_aligned);
+       mask[0] = false;
+       using M = typename V::mask_type;
+       return M(mask, stdx::element_aligned);
+     }();
+ 
+     static_assert(not e[0]);
+     static_assert(popcount(e) == V::size() - 1);
+ 
+     static_assert(all_of(V(T(1)) == []() constexpr {
+       float data[V::size()] = {};
+       V(T(1)).copy_to(data, stdx::element_aligned);
+       V x = T();
+       x.copy_from(data, stdx::element_aligned);
+       return x;
+     }()));
+ 
+     static_assert(hmin(V()) == T());
+     static_assert(hmax(V()) == T());
+     static_assert(reduce(V(1)) == T(V::size()));
+   }
+ 
+ template <typename T>
+   void
+   iterate_abis()
+   {
+     test01<T, stdx::simd<T, stdx::simd_abi::scalar>>();
+     test01<T, stdx::simd<T>>();
+     test01<T, stdx::native_simd<T>>();
+     test01<T, stdx::fixed_size_simd<T, 3>>();
+     test01<T, stdx::fixed_size_simd<T, stdx::simd_abi::max_fixed_size<T> - 4>>();
+   }
+ 
+ int main()
+ {
+   iterate_abis<char>();
+   iterate_abis<wchar_t>();
+   iterate_abis<char16_t>();
+   iterate_abis<char32_t>();
+ 
+   iterate_abis<signed char>();
+   iterate_abis<unsigned char>();
+   iterate_abis<short>();
+   iterate_abis<unsigned short>();
+   iterate_abis<int>();
+   iterate_abis<unsigned int>();
+   iterate_abis<long>();
+   iterate_abis<unsigned long>();
+   iterate_abis<long long>();
+   iterate_abis<unsigned long long>();
+   iterate_abis<float>();
+   iterate_abis<double>();
+   iterate_abis<long double>();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/pr109822_cast_functions.cc gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/pr109822_cast_functions.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/pr109822_cast_functions.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/pr109822_cast_functions.cc	Thu Jun 20 08:08:11 2024
***************
*** 0 ****
--- 1,63 ----
+ // { dg-options "-std=gnu++17" }
+ // { dg-do compile { target c++17 } }
+ 
+ #include <experimental/simd>
+ 
+ namespace stdx = std::experimental;
+ 
+ template <typename T, typename V>
+   void
+   test01()
+   {
+     using M = typename V::mask_type;
+     [[maybe_unused]] auto x = to_fixed_size(V());
+     [[maybe_unused]] auto k = to_fixed_size(M());
+     if constexpr (stdx::simd<T>::size() == V::size())
+       {
+ 	[[maybe_unused]] auto xx = to_compatible(x);
+ 	[[maybe_unused]] auto kk = to_compatible(k);
+ 	x = to_fixed_size(xx);
+ 	k = to_fixed_size(kk);
+       }
+     if constexpr (stdx::native_simd<T>::size() == V::size())
+       {
+ 	[[maybe_unused]] auto xx = to_native(x);
+ 	[[maybe_unused]] auto kk = to_native(k);
+ 	x = to_fixed_size(xx);
+ 	k = to_fixed_size(kk);
+       }
+   }
+ 
+ template <typename T>
+   void
+   iterate_abis()
+   {
+     test01<T, stdx::simd<T, stdx::simd_abi::scalar>>();
+     test01<T, stdx::simd<T>>();
+     test01<T, stdx::native_simd<T>>();
+     test01<T, stdx::fixed_size_simd<T, 3>>();
+     test01<T, stdx::fixed_size_simd<T, stdx::simd_abi::max_fixed_size<T> - 4>>();
+   }
+ 
+ int
+ main()
+ {
+   iterate_abis<char>();
+   iterate_abis<wchar_t>();
+   iterate_abis<char16_t>();
+   iterate_abis<char32_t>();
+ 
+   iterate_abis<signed char>();
+   iterate_abis<unsigned char>();
+   iterate_abis<short>();
+   iterate_abis<unsigned short>();
+   iterate_abis<int>();
+   iterate_abis<unsigned int>();
+   iterate_abis<long>();
+   iterate_abis<unsigned long>();
+   iterate_abis<long long>();
+   iterate_abis<unsigned long long>();
+   iterate_abis<float>();
+   iterate_abis<double>();
+   iterate_abis<long double>();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/pr114803_vecbuiltin_cvt.cc gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/pr114803_vecbuiltin_cvt.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/pr114803_vecbuiltin_cvt.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/pr114803_vecbuiltin_cvt.cc	Thu Jun 20 08:08:11 2024
***************
*** 0 ****
--- 1,105 ----
+ // { dg-options "-std=gnu++17" }
+ // { dg-do compile { target c++17 } }
+ 
+ #include <experimental/simd>
+ 
+ template <typename T>
+   void
+   maybe_test()
+   {
+     using V = std::experimental::simd<T, std::experimental::simd_abi::_VecBuiltin<16>>;
+     if constexpr (std::is_destructible_v<V>)
+       {
+ 	using V2 [[gnu::vector_size(16)]] = T;
+ 	V x = {};
+ 	V2 x2 = static_cast<V2>(x);
+ 	x = static_cast<V>(x2);
+ 	for (unsigned i = 0; i < V::size(); ++i)
+ 	  {
+ 	    if (x2[i] != 0)
+ 	      __builtin_abort();
+ 	  }
+ #ifdef __SSE__
+ 	if constexpr (std::is_same_v<T, float>)
+ 	  x = static_cast<V>(static_cast<__m128>(x));
+ 	else if constexpr (std::is_same_v<T, double>)
+ 	  x = static_cast<V>(static_cast<__m128d>(x));
+ 	else if constexpr (std::is_integral_v<T>)
+ 	  x = static_cast<V>(static_cast<__m128i>(x));
+ #elif __ALTIVEC__
+ 	if constexpr (std::is_same_v<T, float>)
+ 	  x = static_cast<V>(static_cast<__vector float>(x));
+ #ifdef __VSX__
+ 	else if constexpr (std::is_same_v<T, double>)
+ 	  x = static_cast<V>(static_cast<__vector double>(x));
+ #endif
+ 	else if constexpr (std::is_integral_v<T> && sizeof(T) == sizeof(signed char)
+ 			     && std::is_signed_v<T>)
+ 	  x = static_cast<V>(static_cast<__vector signed char>(x));
+ 	else if constexpr (std::is_integral_v<T> && sizeof(T) == sizeof(signed char))
+ 	  x = static_cast<V>(static_cast<__vector unsigned char>(x));
+ 	else if constexpr (std::is_integral_v<T> && sizeof(T) == sizeof(short)
+ 			     && std::is_signed_v<T>)
+ 	  x = static_cast<V>(static_cast<__vector signed short>(x));
+ 	else if constexpr (std::is_integral_v<T> && sizeof(T) == sizeof(short))
+ 	  x = static_cast<V>(static_cast<__vector unsigned short>(x));
+ 	else if constexpr (std::is_integral_v<T> && sizeof(T) == sizeof(int)
+ 			     && std::is_signed_v<T>)
+ 	  x = static_cast<V>(static_cast<__vector signed int>(x));
+ 	else if constexpr (std::is_integral_v<T> && sizeof(T) == sizeof(int))
+ 	  x = static_cast<V>(static_cast<__vector unsigned int>(x));
+ #ifdef __VSX__
+ 	else if constexpr (std::is_integral_v<T> && sizeof(T) == sizeof(long long)
+ 			     && std::is_signed_v<T>)
+ 	  x = static_cast<V>(static_cast<__vector signed long long>(x));
+ 	else if constexpr (std::is_integral_v<T> && sizeof(T) == sizeof(long long))
+ 	  x = static_cast<V>(static_cast<__vector unsigned long long>(x));
+ #endif
+ #elif __ARM_NEON
+ 	if constexpr (std::is_same_v<T, float>)
+ 	  x = static_cast<V>(static_cast<float32x4_t>(x));
+ #ifdef __aarch64__
+ 	else if constexpr (std::is_same_v<T, double>)
+ 	  x = static_cast<V>(static_cast<float64x2_t>(x));
+ #endif
+ 	else if constexpr (std::is_integral_v<T> && sizeof(T) == 1 && std::is_signed_v<T>)
+ 	  x = static_cast<V>(static_cast<int8x16_t>(x));
+ 	else if constexpr (std::is_integral_v<T> && sizeof(T) == 1)
+ 	  x = static_cast<V>(static_cast<uint8x16_t>(x));
+ 	else if constexpr (std::is_integral_v<T> && sizeof(T) == 2 && std::is_signed_v<T>)
+ 	  x = static_cast<V>(static_cast<int16x8_t>(x));
+ 	else if constexpr (std::is_integral_v<T> && sizeof(T) == 2)
+ 	  x = static_cast<V>(static_cast<uint16x8_t>(x));
+ 	else if constexpr (std::is_integral_v<T> && sizeof(T) == 4 && std::is_signed_v<T>)
+ 	  x = static_cast<V>(static_cast<int32x4_t>(x));
+ 	else if constexpr (std::is_integral_v<T> && sizeof(T) == 4)
+ 	  x = static_cast<V>(static_cast<uint32x4_t>(x));
+ 	else if constexpr (std::is_integral_v<T> && sizeof(T) == 8 && std::is_signed_v<T>)
+ 	  x = static_cast<V>(static_cast<int64x2_t>(x));
+ 	else if constexpr (std::is_integral_v<T> && sizeof(T) == 8)
+ 	  x = static_cast<V>(static_cast<uint64x2_t>(x));
+ #endif
+       }
+   }
+ 
+ int main()
+ {
+   maybe_test<char>();
+   maybe_test<wchar_t>();
+   maybe_test<char16_t>();
+   maybe_test<char32_t>();
+ 
+   maybe_test<signed char>();
+   maybe_test<unsigned char>();
+   maybe_test<short>();
+   maybe_test<unsigned short>();
+   maybe_test<int>();
+   maybe_test<unsigned int>();
+   maybe_test<long>();
+   maybe_test<unsigned long>();
+   maybe_test<long long>();
+   maybe_test<unsigned long long>();
+   maybe_test<float>();
+   maybe_test<double>();
+   maybe_test<long double>();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/tests/fpclassify.cc gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/tests/fpclassify.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/tests/fpclassify.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/tests/fpclassify.cc	Thu Jun 20 08:08:11 2024
*************** template <typename V>
*** 40,48 ****
--- 40,50 ----
    {
      using T = typename V::value_type;
      using intv = std::experimental::fixed_size_simd<int, V::size()>;
+ #if __GCC_IEC_559 >= 2
      constexpr T inf = std::__infinity_v<T>;
      constexpr T denorm_min = std::__infinity_v<T>;
      constexpr T nan = std::__quiet_NaN_v<T>;
+ #endif
      constexpr T max = std::__finite_max_v<T>;
      constexpr T norm_min = std::__norm_min_v<T>;
      test_values<V>(
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/tests/frexp.cc gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/tests/frexp.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/tests/frexp.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/tests/frexp.cc	Thu Jun 20 08:08:11 2024
*************** template <typename V>
*** 27,37 ****
--- 27,43 ----
    {
      using int_v = std::experimental::fixed_size_simd<int, V::size()>;
      using T = typename V::value_type;
+ #if __GCC_IEC_559 >= 2 || defined __STDC_IEC_559__
      constexpr auto denorm_min = std::__denorm_min_v<T>;
+ #endif
+ #if __GCC_IEC_559 >= 2
      constexpr auto norm_min = std::__norm_min_v<T>;
+ #endif
      constexpr auto max = std::__finite_max_v<T>;
+ #if defined __STDC_IEC_559__
      constexpr auto nan = std::__quiet_NaN_v<T>;
      constexpr auto inf = std::__infinity_v<T>;
+ #endif
      test_values<V>(
        {0, 0.25, 0.5, 1, 3, 4, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,
         20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 32, 31, -0., -0.25, -0.5, -1,
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/tests/integer_operators.cc gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/tests/integer_operators.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/tests/integer_operators.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/tests/integer_operators.cc	Thu Jun 20 08:08:11 2024
*************** template <typename V>
*** 180,190 ****
  	  for (int j = 0; j < 100; ++j)
  	    {
  	      const V seq([&](auto i) -> T { return (j + i) % n_promo_bits; });
! 	      COMPARE(V(1) >> seq, V([&](auto i) { return T(T(1) >> seq[i]); }))
! 		<< "seq = " << seq;
! 	      COMPARE(make_value_unknown(V(1)) >> make_value_unknown(seq),
! 		V([&](auto i) { return T(T(1) >> seq[i]); }))
! 		<< "seq = " << seq;
  	    }
  	  for_constexpr<int, 0, n_promo_bits - 1>([](auto shift_ic) {
  	    constexpr int shift = shift_ic;
--- 180,189 ----
  	  for (int j = 0; j < 100; ++j)
  	    {
  	      const V seq([&](auto i) -> T { return (j + i) % n_promo_bits; });
! 	      const V expect([&](auto i) { return seq[i] == 0 ? T(1) : T(0); });
! 	      COMPARE(V(1) >> seq, expect) << "\nseq = " << seq;
! 	      COMPARE(make_value_unknown(V(1)) >> make_value_unknown(seq), expect)
! 		<< "\nseq = " << seq;
  	    }
  	  for_constexpr<int, 0, n_promo_bits - 1>([](auto shift_ic) {
  	    constexpr int shift = shift_ic;
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/tests/ldexp_scalbn_scalbln_modf.cc gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/tests/ldexp_scalbn_scalbln_modf.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/tests/ldexp_scalbn_scalbln_modf.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/tests/ldexp_scalbn_scalbln_modf.cc	Thu Jun 20 08:08:11 2024
*************** template <typename V>
*** 139,145 ****
  	if (modf_is_broken)
  	  return;
  	V integral = {};
- 	const V totest = modf(input, &integral);
  	auto&& expected = [&](const auto& v) -> std::pair<const V, const V> {
  	  std::pair<V, V> tmp = {};
  	  using std::modf;
--- 139,144 ----
*************** template <typename V>
*** 151,158 ****
  	    }
  	  return tmp;
  	};
- 	const auto expect1 = expected(input);
  #ifdef __STDC_IEC_559__
  	COMPARE(isnan(totest), isnan(expect1.first))
  	  << "modf(" << input << ", iptr) = " << totest << " != " << expect1;
  	COMPARE(isnan(integral), isnan(expect1.second))
--- 150,158 ----
  	    }
  	  return tmp;
  	};
  #ifdef __STDC_IEC_559__
+ 	const V totest = modf(input, &integral);
+ 	const auto expect1 = expected(input);
  	COMPARE(isnan(totest), isnan(expect1.first))
  	  << "modf(" << input << ", iptr) = " << totest << " != " << expect1;
  	COMPARE(isnan(integral), isnan(expect1.second))
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/tests/logarithm.cc gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/tests/logarithm.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/tests/logarithm.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/tests/logarithm.cc	Thu Jun 20 08:08:11 2024
*************** template <typename V>
*** 30,40 ****
      vir::test::setFuzzyness<double>(1);
  
      using T = typename V::value_type;
      constexpr T nan = std::__quiet_NaN_v<T>;
      constexpr T inf = std::__infinity_v<T>;
      constexpr T denorm_min = std::__denorm_min_v<T>;
-     constexpr T norm_min = std::__norm_min_v<T>;
      constexpr T min = std::__finite_min_v<T>;
      constexpr T max = std::__finite_max_v<T>;
      test_values<V>({1,
  		    2,
--- 30,42 ----
      vir::test::setFuzzyness<double>(1);
  
      using T = typename V::value_type;
+ #ifdef __STDC_IEC_559__
      constexpr T nan = std::__quiet_NaN_v<T>;
      constexpr T inf = std::__infinity_v<T>;
      constexpr T denorm_min = std::__denorm_min_v<T>;
      constexpr T min = std::__finite_min_v<T>;
+ #endif
+     constexpr T norm_min = std::__norm_min_v<T>;
      constexpr T max = std::__finite_max_v<T>;
      test_values<V>({1,
  		    2,
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/tests/operator_cvt.cc gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/tests/operator_cvt.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/tests/operator_cvt.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/tests/operator_cvt.cc	Thu Jun 20 08:08:11 2024
*************** template <typename V>
*** 220,227 ****
  	binary_op_return_type<vldouble, short>();
  	binary_op_return_type<vldouble, ushort>();
  	binary_op_return_type<vldouble, uint>();
- 	binary_op_return_type<vldouble, long>();
- 	binary_op_return_type<vldouble, ulong>();
  	binary_op_return_type<vldouble, float>();
  	binary_op_return_type<vldouble, double>();
  
--- 220,225 ----
*************** template <typename V>
*** 231,238 ****
  	binary_op_return_type<vf64<long double>, ushort>();
  	binary_op_return_type<vf64<long double>, int>();
  	binary_op_return_type<vf64<long double>, uint>();
- 	binary_op_return_type<vf64<long double>, long>();
- 	binary_op_return_type<vf64<long double>, ulong>();
  	binary_op_return_type<vf64<long double>, float>();
  	binary_op_return_type<vf64<long double>, double>();
  	binary_op_return_type<vf64<long double>, vf64<long double>>();
--- 229,234 ----
*************** template <typename V>
*** 245,252 ****
  	binary_op_return_type<simd<long double, A>, ushort>();
  	binary_op_return_type<simd<long double, A>, int>();
  	binary_op_return_type<simd<long double, A>, uint>();
- 	binary_op_return_type<simd<long double, A>, long>();
- 	binary_op_return_type<simd<long double, A>, ulong>();
  	binary_op_return_type<simd<long double, A>, float>();
  	binary_op_return_type<simd<long double, A>, double>();
  
--- 241,246 ----
*************** template <typename V>
*** 258,263 ****
--- 252,275 ----
  	    VERIFY((is_substitution_failure<vf64<ldouble>, ullong>));
  	    VERIFY((is_substitution_failure<simd<ldouble, A>, llong>));
  	    VERIFY((is_substitution_failure<simd<ldouble, A>, ullong>));
+ 	    if constexpr (sizeof(long) == sizeof(llong))
+ 	      {
+ 		VERIFY((is_substitution_failure<vldouble, long>));
+ 		VERIFY((is_substitution_failure<vldouble, ulong>));
+ 		VERIFY((is_substitution_failure<vf64<ldouble>, long>));
+ 		VERIFY((is_substitution_failure<vf64<ldouble>, ulong>));
+ 		VERIFY((is_substitution_failure<simd<ldouble, A>, long>));
+ 		VERIFY((is_substitution_failure<simd<ldouble, A>, ulong>));
+ 	      }
+ 	    else
+ 	      {
+ 		binary_op_return_type<vldouble, long>();
+ 		binary_op_return_type<vldouble, ulong>();
+ 		binary_op_return_type<vf64<long double>, long>();
+ 		binary_op_return_type<vf64<long double>, ulong>();
+ 		binary_op_return_type<simd<long double, A>, long>();
+ 		binary_op_return_type<simd<long double, A>, ulong>();
+ 	      }
  	  }
  	else
  	  {
*************** template <typename V>
*** 267,272 ****
--- 279,290 ----
  	    binary_op_return_type<vf64<long double>, ullong>();
  	    binary_op_return_type<simd<long double, A>, llong>();
  	    binary_op_return_type<simd<long double, A>, ullong>();
+ 	    binary_op_return_type<vldouble, long>();
+ 	    binary_op_return_type<vldouble, ulong>();
+ 	    binary_op_return_type<vf64<long double>, long>();
+ 	    binary_op_return_type<vf64<long double>, ulong>();
+ 	    binary_op_return_type<simd<long double, A>, long>();
+ 	    binary_op_return_type<simd<long double, A>, ulong>();
  	  }
  
  	VERIFY((is_substitution_failure<vf64<long double>, vldouble>));
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/tests/reductions.cc gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/tests/reductions.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/tests/reductions.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/tests/reductions.cc	Thu Jun 20 08:08:11 2024
*************** template <typename V>
*** 114,119 ****
        T acc = x[0];
        for (size_t i = 1; i < V::size(); ++i)
  	acc += x[i];
!       ULP_COMPARE(reduce(x), acc, V::size() / 2).on_failure("x = ", x);
      });
    }
--- 114,120 ----
        T acc = x[0];
        for (size_t i = 1; i < V::size(); ++i)
  	acc += x[i];
!       const T max_distance = std::is_integral_v<T> ? 0 : V::size() / 2;
!       ULP_COMPARE(reduce(x), acc, max_distance).on_failure("x = ", x);
      });
    }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/tests/trunc_ceil_floor.cc gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/tests/trunc_ceil_floor.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/experimental/simd/tests/trunc_ceil_floor.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/experimental/simd/tests/trunc_ceil_floor.cc	Thu Jun 20 08:08:11 2024
*************** template <typename V>
*** 25,32 ****
--- 25,34 ----
    test()
    {
      using T = typename V::value_type;
+ #ifdef __STDC_IEC_559__
      constexpr T inf = std::__infinity_v<T>;
      constexpr T denorm_min = std::__denorm_min_v<T>;
+ #endif
      constexpr T norm_min = std::__norm_min_v<T>;
      constexpr T max = std::__finite_max_v<T>;
      constexpr T min = std::__finite_min_v<T>;
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/experimental/string_view/typedefs.cc gcc-12.4.0/libstdc++-v3/testsuite/experimental/string_view/typedefs.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/experimental/string_view/typedefs.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/experimental/string_view/typedefs.cc	Thu Jun 20 08:08:11 2024
*************** using check2_t = std::experimental::fund
*** 28,36 ****
  using check3_t = std::experimental::fundamentals_v1::u8string_view;
  #endif
  
- #ifdef _GLIBCXX_USE_C99_STDINT_TR1
  using check4_t = std::experimental::fundamentals_v1::u16string_view;
  using check5_t = std::experimental::fundamentals_v1::u32string_view;
- #endif
  
  using check6_t = std::experimental::fundamentals_v1::wstring_view;
--- 28,34 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/lib/dg-options.exp gcc-12.4.0/libstdc++-v3/testsuite/lib/dg-options.exp
*** gcc-12.3.0/libstdc++-v3/testsuite/lib/dg-options.exp	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/lib/dg-options.exp	Thu Jun 20 08:08:11 2024
*************** proc atomic_link_flags { paths } {
*** 274,280 ****
        if { [file exists "${gccpath}/libatomic/.libs/libatomic.a"]
             || [file exists "${gccpath}/libatomic/.libs/libatomic.${shlib_ext}"] } {
            append flags " -B${gccpath}/libatomic/ "
!           append flags " -L${gccpath}/libatomic/.libs"
            append ld_library_path ":${gccpath}/libatomic/.libs"
        }
      } else {
--- 274,280 ----
        if { [file exists "${gccpath}/libatomic/.libs/libatomic.a"]
             || [file exists "${gccpath}/libatomic/.libs/libatomic.${shlib_ext}"] } {
            append flags " -B${gccpath}/libatomic/ "
!           append flags " -B${gccpath}/libatomic/.libs"
            append ld_library_path ":${gccpath}/libatomic/.libs"
        }
      } else {
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/lib/libstdc++.exp gcc-12.4.0/libstdc++-v3/testsuite/lib/libstdc++.exp
*** gcc-12.3.0/libstdc++-v3/testsuite/lib/libstdc++.exp	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/lib/libstdc++.exp	Thu Jun 20 08:08:11 2024
*************** proc v3_target_compile { source dest typ
*** 510,520 ****
  	}
      }
  
      lappend options "compiler=$cxx_final"
      lappend options "timeout=[timeout_value]"
  
      set comp_output [target_compile $source $dest $type $options]
! 
      return $comp_output
  }
  
--- 510,550 ----
  	}
      }
  
+     # For Windows and Darwin we might want to create a temporary file.
+     # Note that it needs deleting.
+     set file_to_delete ""
+     # Small adjustment for Windows hosts.
+     if { $dest == "/dev/null"
+ 	  && [info exists ::env(OS)] && [string match "Windows*" $::env(OS)] } {
+ 	if { $type == "executable" } {
+ 	    set dest "x.exe"
+ 	    set file_to_delete ${dest}
+ 	} else {
+ 	    # Windows uses special file named "nul" as a substitute for
+ 	    # /dev/null
+ 	    set dest "nul"
+ 	}
+     }
+ 
+     # Using /dev/null as the executable name does not work on Darwin when
+     # debug is enabled, since the debug linker does not accept /dev/null as
+     # a valid executable name.
+     if { $dest == "/dev/null" && [istarget *-*-darwin*]
+          && $type == "executable" } {
+ 	set dest dev-null-[pid].exe
+ 	set file_to_delete ${dest}
+     }
+ 
      lappend options "compiler=$cxx_final"
      lappend options "timeout=[timeout_value]"
  
      set comp_output [target_compile $source $dest $type $options]
!     if { $type == "executable" && $file_to_delete != "" } {
! 	file delete $file_to_delete
! 	if { [istarget *-*-darwin*] && [file exists $file_to_delete.dSYM] } {
! 	    file delete -force $file_to_delete.dSYM
! 	}
!     }
      return $comp_output
  }
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/libstdc++-prettyprinters/cxx11.cc gcc-12.4.0/libstdc++-v3/testsuite/libstdc++-prettyprinters/cxx11.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/libstdc++-prettyprinters/cxx11.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/libstdc++-prettyprinters/cxx11.cc	Thu Jun 20 08:08:11 2024
*************** struct datum
*** 63,68 ****
--- 63,73 ----
  
  std::unique_ptr<datum> global;
  
+ struct custom_cat : std::error_category {
+   const char* name() const noexcept { return "miaow"; }
+   std::string message(int) const { return ""; }
+ };
+ 
  int
  main()
  {
*************** main()
*** 179,188 ****
    std::error_condition ecinval = std::make_error_condition(std::errc::invalid_argument);
    // { dg-final { note-test ecinval {std::error_condition = {"generic": EINVAL}} } }
  
!   struct custom_cat : std::error_category {
!     const char* name() const noexcept { return "miaow"; }
!     std::string message(int) const { return ""; }
!   } cat;
    std::error_code emiaow(42, cat);
    // { dg-final { note-test emiaow {std::error_code = {custom_cat: 42}} } }
    std::error_condition ecmiaow(42, cat);
--- 184,190 ----
    std::error_condition ecinval = std::make_error_condition(std::errc::invalid_argument);
    // { dg-final { note-test ecinval {std::error_condition = {"generic": EINVAL}} } }
  
!   custom_cat cat;
    std::error_code emiaow(42, cat);
    // { dg-final { note-test emiaow {std::error_code = {custom_cat: 42}} } }
    std::error_condition ecmiaow(42, cat);
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/libstdc++-xmethods/deque.cc gcc-12.4.0/libstdc++-v3/testsuite/libstdc++-xmethods/deque.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/libstdc++-xmethods/deque.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/libstdc++-xmethods/deque.cc	Thu Jun 20 08:08:11 2024
*************** main ()
*** 67,72 ****
--- 67,96 ----
  // { dg-final { whatis-test q1.back() int } }
  // { dg-final { whatis-test q3\[0\] int } }
  
+   // PR libstdc++/112491
+   std::deque<int> q5;
+   q5.push_front(5);
+ // { dg-final { note-test q5.size() 1 } }
+ // { dg-final { note-test q5\[0\] 5 } }
+   std::deque<int> q6 = q1;
+   q6.pop_front();
+ // { dg-final { note-test {q6.size() == (q1_size-1)} true } }
+ // { dg-final { note-test q6\[1\] 102 } }
+   std::deque<int> q7 = q2;
+   q7.pop_front();
+   q7.pop_front();
+ // { dg-final { note-test {q7.size() == (q2_size-2)} true } }
+ // { dg-final { note-test q7\[1\] 203 } }
+   std::deque<int> q8 = q3;
+   q8.pop_front();
+   q8.pop_front();
+   q8.pop_front();
+ // { dg-final { note-test {q8.size() == (q3_size-3)} true } }
+ // { dg-final { note-test q8\[1\] 304 } }
+   std::deque<int> q9 = q8;
+   q9.clear();
+ // { dg-final { note-test q9.size() 0 } }
+ 
    return 0;  // Mark SPOT
  }
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/std/ranges/iota/max_size_type.cc gcc-12.4.0/libstdc++-v3/testsuite/std/ranges/iota/max_size_type.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/std/ranges/iota/max_size_type.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/std/ranges/iota/max_size_type.cc	Thu Jun 20 08:08:11 2024
*************** test02()
*** 200,207 ****
    using max_type = std::conditional_t<signed_p, max_diff_t, max_size_t>;
    using shorten_type = std::conditional_t<shorten_p, hw_type, max_type>;
    const int hw_type_bit_size = sizeof(hw_type) * __CHAR_BIT__;
!   const int limit = 1000;
!   const int log2_limit = 10;
    static_assert((1 << log2_limit) >= limit);
    const int min = (signed_p ? -limit : 0);
    const int max = limit;
--- 200,207 ----
    using max_type = std::conditional_t<signed_p, max_diff_t, max_size_t>;
    using shorten_type = std::conditional_t<shorten_p, hw_type, max_type>;
    const int hw_type_bit_size = sizeof(hw_type) * __CHAR_BIT__;
!   const unsigned limit = 100;
!   const int log2_limit = 7;
    static_assert((1 << log2_limit) >= limit);
    const int min = (signed_p ? -limit : 0);
    const int max = limit;
*************** test03()
*** 258,265 ****
    using max_type = std::conditional_t<signed_p, max_diff_t, max_size_t>;
    using base_type = std::conditional_t<toggle_base_p, hw_type, max_type>;
    constexpr int hw_type_bit_size = sizeof(hw_type) * __CHAR_BIT__;
!   constexpr int limit = 1000;
!   constexpr int log2_limit = 10;
    static_assert((1 << log2_limit) >= limit);
    const int min = (signed_p ? -limit : 0);
    const int max = limit;
--- 258,265 ----
    using max_type = std::conditional_t<signed_p, max_diff_t, max_size_t>;
    using base_type = std::conditional_t<toggle_base_p, hw_type, max_type>;
    constexpr int hw_type_bit_size = sizeof(hw_type) * __CHAR_BIT__;
!   constexpr unsigned limit = 100;
!   constexpr int log2_limit = 7;
    static_assert((1 << log2_limit) >= limit);
    const int min = (signed_p ? -limit : 0);
    const int max = limit;
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/std/time/month/1.cc gcc-12.4.0/libstdc++-v3/testsuite/std/time/month/1.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/std/time/month/1.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/std/time/month/1.cc	Thu Jun 20 08:08:11 2024
***************
*** 21,26 ****
--- 21,27 ----
  // Class template day [time.cal.month]
  
  #include <chrono>
+ #include <limits>
  
  constexpr void
  constexpr_month()
*************** constexpr_month()
*** 35,40 ****
--- 36,59 ----
    dm += months{3};
    dm -= months{3};
  
+   // Test for UB (overflow).
+   {
+     using rep = months::rep;
+     using std::numeric_limits;
+ 
+     auto constexpr months_min = months{numeric_limits<rep>::min()};
+     auto constexpr month_000_plus_months_min  = month{ 0 } + months_min;
+     auto constexpr month_255_plus_months_min  = month{255} + months_min;
+     auto constexpr month_000_minus_months_min = month{ 0 } - months_min;
+     auto constexpr month_255_minus_months_min = month{255} - months_min;
+ 
+     auto constexpr months_max = months{numeric_limits<rep>::max()};
+     auto constexpr month_000_plus_months_max  = month{ 0 } + months_max;
+     auto constexpr month_255_plus_months_max  = month{255} + months_max;
+     auto constexpr month_000_minus_months_max = month{ 0 } - months_max;
+     auto constexpr month_255_minus_months_max = month{255} - months_max;
+   }
+ 
    static_assert(February + months{11} == January);
    static_assert(January + months{1200} == January);
    static_assert(January + months{1201} == February);
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/std/time/month/2.cc gcc-12.4.0/libstdc++-v3/testsuite/std/time/month/2.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/std/time/month/2.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/std/time/month/2.cc	Thu Jun 20 08:08:11 2024
***************
*** 0 ****
--- 1,32 ----
+ // { dg-do run { target c++20 } }
+ 
+ // Class month [time.cal.month]
+ 
+ #include <chrono>
+ #include <limits>
+ #include <testsuite_hooks.h>
+ 
+ using namespace std::chrono;
+ 
+ void test_extreme_values(months extreme)
+ {
+   auto const count = extreme.count();
+   auto const safe  = count < 0 ? count + 12 : count;
+   auto const mod   = safe - 12 * ((safe < 0 ? safe - 11 : safe) / 12);
+ 
+   for (unsigned m = 0; m < 256; ++m)
+   {
+     auto const month_plus_extreme = month{m} + extreme;
+     VERIFY(unsigned{month_plus_extreme } == (m + 11 + mod) % 12 + 1);
+ 
+     auto const month_minus_extreme = month{m} - extreme;
+     VERIFY(unsigned{month_minus_extreme} == (m + 11 - mod) % 12 + 1);
+   }
+ }
+ 
+ int main()
+ {
+   test_extreme_values(months{std::numeric_limits<months::rep>::max()});
+   test_extreme_values(months{std::numeric_limits<months::rep>::min()});
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/std/time/weekday/1.cc gcc-12.4.0/libstdc++-v3/testsuite/std/time/weekday/1.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/std/time/weekday/1.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/std/time/weekday/1.cc	Thu Jun 20 08:08:11 2024
***************
*** 21,26 ****
--- 21,27 ----
  // Class template day [time.cal.weekday]
  
  #include <chrono>
+ #include <limits>
  
  constexpr void
  constexpr_weekday()
*************** constexpr_weekday()
*** 38,43 ****
--- 39,64 ----
    static_assert(weekday{3}[2].weekday() == weekday{3});
    static_assert(weekday{3}[last].weekday() == weekday{3});
  
+   // Test for UB (overflow).
+   {
+     using rep = days::rep;
+     using std::numeric_limits;
+ 
+     auto constexpr days_min = days{numeric_limits<rep>::min()};
+     auto constexpr weekday_from_sysdays_min   = weekday{sys_days{days_min}};
+     auto constexpr weekday_000_plus_days_min  = weekday{ 0 } + days_min;
+     auto constexpr weekday_255_plus_days_min  = weekday{255} + days_min;
+     auto constexpr weekday_000_minus_days_min = weekday{ 0 } - days_min;
+     auto constexpr weekday_255_minus_days_min = weekday{255} - days_min;
+ 
+     auto constexpr days_max = days{numeric_limits<rep>::max()};
+     auto constexpr weekday_from_sysdays_max   = weekday{sys_days{days_max}};
+     auto constexpr weekday_000_plus_days_max  = weekday{ 0 } + days_max;
+     auto constexpr weekday_255_plus_days_max  = weekday{255} + days_max;
+     auto constexpr weekday_000_minus_days_max = weekday{ 0 } - days_max;
+     auto constexpr weekday_255_minus_days_max = weekday{255} - days_max;
+   }
+ 
    static_assert(weekday{sys_days{1900y/January/1}} == Monday);
    static_assert(weekday{sys_days{1970y/January/1}} == Thursday);
    static_assert(weekday{sys_days{2020y/August/21}} == Friday);
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/std/time/weekday/2.cc gcc-12.4.0/libstdc++-v3/testsuite/std/time/weekday/2.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/std/time/weekday/2.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/std/time/weekday/2.cc	Thu Jun 20 08:08:11 2024
***************
*** 0 ****
--- 1,32 ----
+ // { dg-do run { target c++20 } }
+ 
+ // Class weekday [time.cal.wd]
+ 
+ #include <chrono>
+ #include <limits>
+ #include <testsuite_hooks.h>
+ 
+ using namespace std::chrono;
+ 
+ void test_extreme_values(days extreme)
+ {
+   auto const count = extreme.count();
+   auto const safe  = count < 0 ? count + 7 : count;
+   auto const mod   = safe - 7 * ((safe < 0 ? safe - 6 : safe) / 7);
+ 
+   for (unsigned d = 0; d < 254; ++d)
+   {
+     auto const weekday_plus_extreme = weekday{d} + extreme;
+     VERIFY(weekday_plus_extreme.c_encoding()  == (d + mod) % 7);
+ 
+     auto const weekday_minus_extreme = weekday{d} - extreme;
+     VERIFY(weekday_minus_extreme.c_encoding() == (d + 7 - mod) % 7);
+   }
+ }
+ 
+ int main()
+ {
+   test_extreme_values(days{std::numeric_limits<days::rep>::max()});
+   test_extreme_values(days{std::numeric_limits<days::rep>::min()});
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdio/functions.cc gcc-12.4.0/libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdio/functions.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdio/functions.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdio/functions.cc	Thu Jun 20 08:08:11 2024
*************** void test01(int dummy, ...)
*** 35,41 ****
    char* s = 0;
    const char* cs = 0;
    const char* format = "%i";
!   FILE* stream = 0;
    std::size_t n = 0;
  
    int ret;
--- 35,41 ----
    char* s = 0;
    const char* cs = 0;
    const char* format = "%i";
!   FILE* stream = va_arg(ap, FILE*);
    std::size_t n = 0;
  
    int ret;
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/tr1/8_c_compatibility/cwchar/functions.cc gcc-12.4.0/libstdc++-v3/testsuite/tr1/8_c_compatibility/cwchar/functions.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/tr1/8_c_compatibility/cwchar/functions.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/tr1/8_c_compatibility/cwchar/functions.cc	Thu Jun 20 08:08:11 2024
*************** void test01(int dummy, ...)
*** 42,48 ****
  #endif
  
  #if _GLIBCXX_HAVE_VFWSCANF
!   FILE* stream = 0;
    const wchar_t* format1 = 0;
    int ret1;
    ret1 = std::tr1::vfwscanf(stream, format1, arg);
--- 42,48 ----
  #endif
  
  #if _GLIBCXX_HAVE_VFWSCANF
!   FILE* stream = va_arg(arg, FILE*);
    const wchar_t* format1 = 0;
    int ret1;
    ret1 = std::tr1::vfwscanf(stream, format1, arg);
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/tr2/dynamic_bitset/string.cc gcc-12.4.0/libstdc++-v3/testsuite/tr2/dynamic_bitset/string.cc
*** gcc-12.3.0/libstdc++-v3/testsuite/tr2/dynamic_bitset/string.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libstdc++-v3/testsuite/tr2/dynamic_bitset/string.cc	Thu Jun 20 08:08:11 2024
***************
*** 0 ****
--- 1,36 ----
+ // { dg-do run { target c++11 } }
+ 
+ #include <tr2/dynamic_bitset>
+ #include <string>
+ #include <testsuite_hooks.h>
+ 
+ void
+ test_string_ctor()
+ {
+   std::tr2::dynamic_bitset<> b("101001");
+   VERIFY( b[0] == true );
+   VERIFY( b[1] == false );
+   VERIFY( b[2] == false );
+   VERIFY( b[3] == true );
+   VERIFY( b[4] == false );
+   VERIFY( b[5] == true );
+ }
+ 
+ void
+ test_alt_chars()
+ {
+   std::string str = "xOIOIOIOx";
+   std::tr2::dynamic_bitset<> b(str, 1, 6, 'I', 'O');
+   VERIFY( b[0] == false );
+   VERIFY( b[1] == true );
+   VERIFY( b[2] == false );
+   VERIFY( b[3] == true );
+   VERIFY( b[4] == false );
+   VERIFY( b[5] == true );
+ }
+ 
+ int main()
+ {
+   test_string_ctor();
+   test_alt_chars();
+ }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/util/pstl/test_utils.h gcc-12.4.0/libstdc++-v3/testsuite/util/pstl/test_utils.h
*** gcc-12.3.0/libstdc++-v3/testsuite/util/pstl/test_utils.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/util/pstl/test_utils.h	Thu Jun 20 08:08:11 2024
*************** struct iterator_invoker<std::forward_ite
*** 1007,1024 ****
  template <typename IsReverse>
  struct reverse_invoker
  {
!     template <typename... Rest>
      void
!     operator()(Rest&&... rest)
      {
          // Random-access iterator
!         iterator_invoker<std::random_access_iterator_tag, IsReverse>()(std::forward<Rest>(rest)...);
  
          // Forward iterator
!         iterator_invoker<std::forward_iterator_tag, IsReverse>()(std::forward<Rest>(rest)...);
  
          // Bidirectional iterator
!         iterator_invoker<std::bidirectional_iterator_tag, IsReverse>()(std::forward<Rest>(rest)...);
      }
  };
  
--- 1007,1024 ----
  template <typename IsReverse>
  struct reverse_invoker
  {
!     template <typename Policy, typename Op, typename... Rest>
      void
!     operator()(Policy&& exec, Op op, Rest&&... rest)
      {
          // Random-access iterator
!         iterator_invoker<std::random_access_iterator_tag, IsReverse>()(std::forward<Policy>(exec), op, rest...);
  
          // Forward iterator
!         iterator_invoker<std::forward_iterator_tag, IsReverse>()(std::forward<Policy>(exec), op, rest...);
  
          // Bidirectional iterator
!         iterator_invoker<std::bidirectional_iterator_tag, IsReverse>()(std::forward<Policy>(exec), op, rest...);
      }
  };
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/testsuite/util/testsuite_allocator.h gcc-12.4.0/libstdc++-v3/testsuite/util/testsuite_allocator.h
*** gcc-12.3.0/libstdc++-v3/testsuite/util/testsuite_allocator.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/testsuite/util/testsuite_allocator.h	Thu Jun 20 08:08:11 2024
*************** namespace __gnu_test
*** 418,424 ****
  	operator==(const uneq_allocator& a,
  		   const uneq_allocator<Tp1,
  		   typename AllocTraits::template rebind<Tp1>::other>& b)
! 	{ return a.personality == b.personality; }
  
        template<typename Tp1>
  	friend inline bool
--- 418,424 ----
  	operator==(const uneq_allocator& a,
  		   const uneq_allocator<Tp1,
  		   typename AllocTraits::template rebind<Tp1>::other>& b)
! 	{ return a.personality == b.get_personality(); }
  
        template<typename Tp1>
  	friend inline bool
diff -Nrcpad gcc-12.3.0/libvtv/ChangeLog gcc-12.4.0/libvtv/ChangeLog
*** gcc-12.3.0/libvtv/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libvtv/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/lto-plugin/ChangeLog gcc-12.4.0/lto-plugin/ChangeLog
*** gcc-12.3.0/lto-plugin/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/lto-plugin/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/maintainer-scripts/ChangeLog gcc-12.4.0/maintainer-scripts/ChangeLog
*** gcc-12.3.0/maintainer-scripts/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/maintainer-scripts/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/zlib/ChangeLog gcc-12.4.0/zlib/ChangeLog
*** gcc-12.3.0/zlib/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/zlib/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
